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2007-12-29  Jakub Jelinek  <jakub@redhat.com>
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	* config/i386/sse.md (sse5_pperm, sse5_pperm_pack_v2di_v4si,
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	sse5_pperm_pack_v4si_v8hi, sse5_pperm_pack_v8hi_v16qi,
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	sse5_perm<mode>): Fix constraints.
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	* gcc.target/i386/i386.exp (check_effective_target_sse5): Use __v8hi
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	rather than __v2di type.
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--- gcc/config/i386/sse.md.jj	2007-12-29 20:58:15.000000000 +0100
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+++ gcc/config/i386/sse.md	2007-12-29 21:12:49.000000000 +0100
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@@ -8350,13 +8350,13 @@
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   [(set_attr "type" "sseiadd1")])
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 ;; SSE5 permute instructions
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 (define_insn "sse5_pperm"
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   [(set (match_operand:V16QI 0 "register_operand" "=x,x,x,x")
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-	(unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "0,0,xm,xm")
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-		       (match_operand:V16QI 2 "nonimmediate_operand" "x,xm,0,x")
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-		       (match_operand:V16QI 3 "nonimmediate_operand" "xm,x,x,0")]
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+	(unspec:V16QI [(match_operand:V16QI 1 "nonimmediate_operand" "0,0,x,xm")
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+		       (match_operand:V16QI 2 "nonimmediate_operand" "x,xm,xm,x")
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+		       (match_operand:V16QI 3 "nonimmediate_operand" "xm,x,0,0")]
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 		     UNSPEC_SSE5_PERMUTE))]
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   "TARGET_SSE5 && ix86_sse5_valid_op_p (operands, insn, 4, true, 1)"
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   "pperm\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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   [(set_attr "type" "sse4arg")
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    (set_attr "mode" "TI")])
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@@ -8453,52 +8453,52 @@
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 ;; SSE5 pack instructions that combine two vectors into a smaller vector
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 (define_insn "sse5_pperm_pack_v2di_v4si"
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   [(set (match_operand:V4SI 0 "register_operand" "=x,x,x,x")
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 	(vec_concat:V4SI
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 	 (truncate:V2SI
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-	  (match_operand:V2DI 1 "nonimmediate_operand" "0,0,xm,xm"))
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+	  (match_operand:V2DI 1 "nonimmediate_operand" "0,0,x,xm"))
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 	 (truncate:V2SI
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-	  (match_operand:V2DI 2 "nonimmediate_operand" "x,xm,0,x"))))
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-   (use (match_operand:V16QI 3 "nonimmediate_operand" "xm,x,x,0"))]
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+	  (match_operand:V2DI 2 "nonimmediate_operand" "x,xm,xm,x"))))
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+   (use (match_operand:V16QI 3 "nonimmediate_operand" "xm,x,0,0"))]
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   "TARGET_SSE5 && ix86_sse5_valid_op_p (operands, insn, 4, true, 1)"
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   "pperm\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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   [(set_attr "type" "sse4arg")
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    (set_attr "mode" "TI")])
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 (define_insn "sse5_pperm_pack_v4si_v8hi"
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   [(set (match_operand:V8HI 0 "register_operand" "=x,x,x,x")
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 	(vec_concat:V8HI
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 	 (truncate:V4HI
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-	  (match_operand:V4SI 1 "nonimmediate_operand" "0,0,xm,xm"))
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+	  (match_operand:V4SI 1 "nonimmediate_operand" "0,0,x,xm"))
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 	 (truncate:V4HI
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-	  (match_operand:V4SI 2 "nonimmediate_operand" "x,xm,0,x"))))
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-   (use (match_operand:V16QI 3 "nonimmediate_operand" "xm,x,x,0"))]
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+	  (match_operand:V4SI 2 "nonimmediate_operand" "x,xm,xm,x"))))
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+   (use (match_operand:V16QI 3 "nonimmediate_operand" "xm,x,0,0"))]
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   "TARGET_SSE5 && ix86_sse5_valid_op_p (operands, insn, 4, true, 1)"
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   "pperm\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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   [(set_attr "type" "sse4arg")
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    (set_attr "mode" "TI")])
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 (define_insn "sse5_pperm_pack_v8hi_v16qi"
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   [(set (match_operand:V16QI 0 "register_operand" "=x,x,x,x")
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 	(vec_concat:V16QI
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 	 (truncate:V8QI
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-	  (match_operand:V8HI 1 "nonimmediate_operand" "0,0,xm,xm"))
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+	  (match_operand:V8HI 1 "nonimmediate_operand" "0,0,x,xm"))
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 	 (truncate:V8QI
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-	  (match_operand:V8HI 2 "nonimmediate_operand" "x,xm,0,x"))))
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-   (use (match_operand:V16QI 3 "nonimmediate_operand" "xm,x,x,0"))]
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+	  (match_operand:V8HI 2 "nonimmediate_operand" "x,xm,xm,x"))))
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+   (use (match_operand:V16QI 3 "nonimmediate_operand" "xm,x,0,0"))]
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   "TARGET_SSE5 && ix86_sse5_valid_op_p (operands, insn, 4, true, 1)"
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   "pperm\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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   [(set_attr "type" "sse4arg")
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    (set_attr "mode" "TI")])
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 ;; Floating point permutation (permps, permpd)
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 (define_insn "sse5_perm<mode>"
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   [(set (match_operand:SSEMODEF2P 0 "register_operand" "=x,x,x,x")
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 	(unspec:SSEMODEF2P
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-	 [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "0,0,xm,xm")
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-	  (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "x,xm,0,x")
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-	  (match_operand:V16QI 3 "nonimmediate_operand" "xm,x,x,0")]
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+	 [(match_operand:SSEMODEF2P 1 "nonimmediate_operand" "0,0,x,xm")
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+	  (match_operand:SSEMODEF2P 2 "nonimmediate_operand" "x,xm,xm,x")
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+	  (match_operand:V16QI 3 "nonimmediate_operand" "xm,x,0,0")]
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 	 UNSPEC_SSE5_PERMUTE))]
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   "TARGET_SSE5 && ix86_sse5_valid_op_p (operands, insn, 4, true, 1)"
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   "perm<ssemodesuffixf4>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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   [(set_attr "type" "sse4arg")
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    (set_attr "mode" "<MODE>")])
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--- gcc/testsuite/gcc.target/i386/i386.exp.jj	2007-09-14 11:54:26.000000000 +0200
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+++ gcc/testsuite/gcc.target/i386/i386.exp	2007-12-29 21:42:08.000000000 +0100
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@@ -68,13 +68,13 @@ proc check_effective_target_sse4a { } {
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 proc check_effective_target_sse5 { } {
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     return [check_no_compiler_messages sse5 object {
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 	typedef long long __m128i __attribute__ ((__vector_size__ (16)));
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-	typedef long long __v2di __attribute__ ((__vector_size__ (16)));
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+	typedef short __v8hi __attribute__ ((__vector_size__ (16)));
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 	__m128i _mm_maccs_epi16(__m128i __A, __m128i __B, __m128i __C)
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 	{
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-	    return (__m128i) __builtin_ia32_pmacssww ((__v2di)__A,
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-						      (__v2di)__B,
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-						      (__v2di)__C);
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+	    return (__m128i) __builtin_ia32_pmacssww ((__v8hi)__A,
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+						      (__v8hi)__B,
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+						      (__v8hi)__C);
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 	}
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     } "-O2 -msse5" ]
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 }