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From 8f5f7f9cb15387ddb010894c17e788b3116fe26d Mon Sep 17 00:00:00 2001
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From: Reid Kleckner <rnk@google.com>
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Date: Wed, 14 Feb 2018 00:33:00 +0000
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Subject: [PATCH 2/4] Merging r324645:
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------------------------------------------------------------------------
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r324645 | dwmw2 | 2018-02-08 12:06:05 -0800 (Thu, 08 Feb 2018) | 5 lines
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[X86] Support 'V' register operand modifier
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This allows the register name to be printed without the leading '%'.
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This can be used for emitting calls to the retpoline thunks from inline
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asm.
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------------------------------------------------------------------------
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_50@325089 91177308-0d34-0410-b5e6-96231b3b80d8
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---
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lib/Target/X86/X86AsmPrinter.cpp | 11 ++++++++++-
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test/CodeGen/X86/inline-asm-modifier-V.ll | 14 ++++++++++++++
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2 files changed, 24 insertions(+), 1 deletion(-)
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create mode 100644 test/CodeGen/X86/inline-asm-modifier-V.ll
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diff --git a/lib/Target/X86/X86AsmPrinter.cpp b/lib/Target/X86/X86AsmPrinter.cpp
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index dc15aea..8c7ddd9 100644
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--- a/lib/Target/X86/X86AsmPrinter.cpp
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+++ b/lib/Target/X86/X86AsmPrinter.cpp
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@@ -344,6 +344,8 @@ static void printIntelMemReference(X86AsmPrinter &P, const MachineInstr *MI,
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static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
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char Mode, raw_ostream &O) {
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unsigned Reg = MO.getReg();
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+ bool EmitPercent = true;
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+
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switch (Mode) {
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default: return true; // Unknown mode.
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case 'b': // Print QImode register
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@@ -358,6 +360,9 @@ static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
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case 'k': // Print SImode register
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Reg = getX86SubSuperRegister(Reg, 32);
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break;
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+ case 'V':
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+ EmitPercent = false;
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+ LLVM_FALLTHROUGH;
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case 'q':
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// Print 64-bit register names if 64-bit integer registers are available.
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// Otherwise, print 32-bit register names.
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@@ -365,7 +370,10 @@ static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
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break;
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}
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- O << '%' << X86ATTInstPrinter::getRegisterName(Reg);
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+ if (EmitPercent)
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+ O << '%';
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+
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+ O << X86ATTInstPrinter::getRegisterName(Reg);
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return false;
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}
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@@ -438,6 +446,7 @@ bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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case 'w': // Print HImode register
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case 'k': // Print SImode register
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case 'q': // Print DImode register
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+ case 'V': // Print native register without '%'
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if (MO.isReg())
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return printAsmMRegister(*this, MO, ExtraCode[0], O);
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printOperand(*this, MI, OpNo, O);
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diff --git a/test/CodeGen/X86/inline-asm-modifier-V.ll b/test/CodeGen/X86/inline-asm-modifier-V.ll
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new file mode 100644
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index 0000000..5a7f3fd
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--- /dev/null
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+++ b/test/CodeGen/X86/inline-asm-modifier-V.ll
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@@ -0,0 +1,14 @@
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+; RUN: llc < %s -mtriple=i686-- -no-integrated-as | FileCheck -check-prefix=X86 %s
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+; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as | FileCheck -check-prefix=X64 %s
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+
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+; If the target does not have 64-bit integer registers, emit 32-bit register
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+; names.
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+
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+; X86: call __x86_indirect_thunk_e{{[abcd]}}x
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+; X64: call __x86_indirect_thunk_r
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+
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+define void @q_modifier(i32* %p) {
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+entry:
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+ tail call void asm sideeffect "call __x86_indirect_thunk_${0:V}", "r,~{dirflag},~{fpsr},~{flags}"(i32* %p)
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+ ret void
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+}
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--
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1.8.3.1
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