From 86dfbfd4c3011e659136e8cfcc603c3f14cfb756 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Mar 04 2013 09:01:40 +0000 Subject: Fix errors reported by version 5.0 of texinfo. --- diff --git a/binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch b/binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch new file mode 100644 index 0000000..d0b657f --- /dev/null +++ b/binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch @@ -0,0 +1,279 @@ +diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-arc.texi gas/doc/c-arc.texi +*** ../binutils-2.23.52.0.1.orig/gas/doc/c-arc.texi 2013-03-04 08:25:32.051931944 +0000 +--- gas/doc/c-arc.texi 2013-03-04 08:26:19.234930452 +0000 +*************** The extension instructions are not macro +*** 220,226 **** + encodings for use of these instructions according to the specification + by the user. The parameters are: + +! @table @bullet + @item @var{name} + Name of the extension instruction + +--- 220,226 ---- + encodings for use of these instructions according to the specification + by the user. The parameters are: + +! @table @code + @item @var{name} + Name of the extension instruction + +diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-arm.texi gas/doc/c-arm.texi +*** ../binutils-2.23.52.0.1.orig/gas/doc/c-arm.texi 2013-03-04 08:25:32.039931945 +0000 +--- gas/doc/c-arm.texi 2013-03-04 08:27:37.462927978 +0000 +*************** ARM and THUMB instructions had their own +*** 390,418 **** + @code{unified} syntax, which can be selected via the @code{.syntax} + directive, and has the following main features: + +! @table @bullet +! @item + Immediate operands do not require a @code{#} prefix. + +! @item + The @code{IT} instruction may appear, and if it does it is validated + against subsequent conditional affixes. In ARM mode it does not + generate machine code, in THUMB mode it does. + +! @item + For ARM instructions the conditional affixes always appear at the end + of the instruction. For THUMB instructions conditional affixes can be + used, but only inside the scope of an @code{IT} instruction. + +! @item + All of the instructions new to the V6T2 architecture (and later) are + available. (Only a few such instructions can be written in the + @code{divided} syntax). + +! @item + The @code{.N} and @code{.W} suffixes are recognized and honored. + +! @item + All instructions set the flags if and only if they have an @code{s} + affix. + @end table +--- 390,418 ---- + @code{unified} syntax, which can be selected via the @code{.syntax} + directive, and has the following main features: + +! @table @code +! @item 1 + Immediate operands do not require a @code{#} prefix. + +! @item 2 + The @code{IT} instruction may appear, and if it does it is validated + against subsequent conditional affixes. In ARM mode it does not + generate machine code, in THUMB mode it does. + +! @item 3 + For ARM instructions the conditional affixes always appear at the end + of the instruction. For THUMB instructions conditional affixes can be + used, but only inside the scope of an @code{IT} instruction. + +! @item 4 + All of the instructions new to the V6T2 architecture (and later) are + available. (Only a few such instructions can be written in the + @code{divided} syntax). + +! @item 5 + The @code{.N} and @code{.W} suffixes are recognized and honored. + +! @item 6 + All instructions set the flags if and only if they have an @code{s} + affix. + @end table +*************** Either @samp{#} or @samp{$} can be used +*** 451,478 **** + @cindex register names, ARM + *TODO* Explain about ARM register naming, and the predefined names. + +- @node ARM-Neon-Alignment +- @subsection NEON Alignment Specifiers +- +- @cindex alignment for NEON instructions +- Some NEON load/store instructions allow an optional address +- alignment qualifier. +- The ARM documentation specifies that this is indicated by +- @samp{@@ @var{align}}. However GAS already interprets +- the @samp{@@} character as a "line comment" start, +- so @samp{: @var{align}} is used instead. For example: +- +- @smallexample +- vld1.8 @{q0@}, [r0, :128] +- @end smallexample +- +- @node ARM Floating Point +- @section Floating Point +- +- @cindex floating point, ARM (@sc{ieee}) +- @cindex ARM floating point (@sc{ieee}) +- The ARM family uses @sc{ieee} floating-point numbers. +- + @node ARM-Relocations + @subsection ARM relocation generation + +--- 451,456 ---- +*************** respectively. For example to load the 3 +*** 519,524 **** +--- 497,524 ---- + MOVT r0, #:upper16:foo + @end smallexample + ++ @node ARM-Neon-Alignment ++ @subsection NEON Alignment Specifiers ++ ++ @cindex alignment for NEON instructions ++ Some NEON load/store instructions allow an optional address ++ alignment qualifier. ++ The ARM documentation specifies that this is indicated by ++ @samp{@@ @var{align}}. However GAS already interprets ++ the @samp{@@} character as a "line comment" start, ++ so @samp{: @var{align}} is used instead. For example: ++ ++ @smallexample ++ vld1.8 @{q0@}, [r0, :128] ++ @end smallexample ++ ++ @node ARM Floating Point ++ @section Floating Point ++ ++ @cindex floating point, ARM (@sc{ieee}) ++ @cindex ARM floating point (@sc{ieee}) ++ The ARM family uses @sc{ieee} floating-point numbers. ++ + @node ARM Directives + @section ARM Machine Directives + +diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-cr16.texi gas/doc/c-cr16.texi +*** ../binutils-2.23.52.0.1.orig/gas/doc/c-cr16.texi 2013-03-04 08:25:32.086931943 +0000 +--- gas/doc/c-cr16.texi 2013-03-04 08:28:09.304926971 +0000 +*************** Operand expression type qualifier is an +*** 44,69 **** + CR16 target operand qualifiers and its size (in bits): + + @table @samp +! @item Immediate Operand +! - s ---- 4 bits +! @item +! - m ---- 16 bits, for movb and movw instructions. +! @item +! - m ---- 20 bits, movd instructions. +! @item +! - l ---- 32 bits +! +! @item Absolute Operand +! - s ---- Illegal specifier for this operand. +! @item +! - m ---- 20 bits, movd instructions. +! +! @item Displacement Operand +! - s ---- 8 bits +! @item +! - m ---- 16 bits +! @item +! - l ---- 24 bits + @end table + + For example: +--- 44,76 ---- + CR16 target operand qualifiers and its size (in bits): + + @table @samp +! @item Immediate Operand: s +! 4 bits. +! +! @item Immediate Operand: m +! 16 bits, for movb and movw instructions. +! +! @item Immediate Operand: m +! 20 bits, movd instructions. +! +! @item Immediate Operand: l +! 32 bits. +! +! @item Absolute Operand: s +! Illegal specifier for this operand. +! +! @item Absolute Operand: m +! 20 bits, movd instructions. +! +! @item Displacement Operand: s +! 8 bits. +! +! @item Displacement Operand: m +! 16 bits. +! +! @item Displacement Operand: l +! 24 bits. +! + @end table + + For example: +diff -cp ../binutils-2.23.52.0.1.orig/gas/doc/c-tic54x.texi gas/doc/c-tic54x.texi +*** ../binutils-2.23.52.0.1.orig/gas/doc/c-tic54x.texi 2013-03-04 08:25:32.035931945 +0000 +--- gas/doc/c-tic54x.texi 2013-03-04 08:28:38.186926057 +0000 +*************** In this example, x is replaced with SYM2 +*** 109,115 **** + is replaced with x. At this point, x has already been encountered + and the substitution stops. + +! @smallexample @code + .asg "x",SYM1 + .asg "SYM1",SYM2 + .asg "SYM2",x +--- 109,115 ---- + is replaced with x. At this point, x has already been encountered + and the substitution stops. + +! @smallexample + .asg "x",SYM1 + .asg "SYM1",SYM2 + .asg "SYM2",x +*************** Substitution may be forced in situations +*** 126,139 **** + ambiguous by placing colons on either side of the subsym. The following + code: + +! @smallexample @code + .eval "10",x + LAB:X: add #x, a + @end smallexample + + When assembled becomes: + +! @smallexample @code + LAB10 add #10, a + @end smallexample + +--- 126,139 ---- + ambiguous by placing colons on either side of the subsym. The following + code: + +! @smallexample + .eval "10",x + LAB:X: add #x, a + @end smallexample + + When assembled becomes: + +! @smallexample + LAB10 add #10, a + @end smallexample + +*************** The @code{LDX} pseudo-op is provided for +*** 309,315 **** + of a label or address. For example, if an address @code{_label} resides + in extended program memory, the value of @code{_label} may be loaded as + follows: +! @smallexample @code + ldx #_label,16,a ; loads extended bits of _label + or #_label,a ; loads lower 16 bits of _label + bacc a ; full address is in accumulator A +--- 309,315 ---- + of a label or address. For example, if an address @code{_label} resides + in extended program memory, the value of @code{_label} may be loaded as + follows: +! @smallexample + ldx #_label,16,a ; loads extended bits of _label + or #_label,a ; loads lower 16 bits of _label + bacc a ; full address is in accumulator A diff --git a/binutils.spec b/binutils.spec index 1c08b3a..5cc67a5 100644 --- a/binutils.spec +++ b/binutils.spec @@ -17,7 +17,7 @@ Summary: A GNU collection of binary utilities Name: %{?cross}binutils%{?_with_debug:-debug} Version: 2.23.52.0.1 -Release: 2%{?dist} +Release: 3%{?dist} License: GPLv3+ Group: Development/Tools URL: http://sources.redhat.com/binutils @@ -42,6 +42,8 @@ Patch09: binutils-2.22.52.0.1-export-demangle.h.patch Patch10: binutils-2.22.52.0.4-no-config-h-check.patch # Fix the creation of the index table in 64-bit thin archives. Patch11: binutils-2.23.52.0.1-64-bit-thin-archives.patch +# Fix errors reported by version 5.0 of texinfo +Patch12: binutils-2.23.52.0.1-as-doc-texinfo-fixes.patch Provides: bundled(libiberty) @@ -149,6 +151,7 @@ using libelf instead of BFD. %patch09 -p0 -b .export-demangle-h~ %patch10 -p0 -b .no-config-h-check~ %patch11 -p0 -b .64bit-thin-archives~ +%patch12 -p0 -b .gas-texinfo~ # We cannot run autotools as there is an exact requirement of autoconf-2.59. @@ -448,6 +451,9 @@ exit 0 %endif # %{isnative} %changelog +* Mon Mar 04 2013 Nick Clifton - 2.23.52.0.1-3 +- Fix errors reported by version 5.0 of texinfo. + * Fri Mar 01 2013 Nick Clifton - 2.23.52.0.1-2 - Fix the creation of index tables in 64-bit thin archives. (#915411) @@ -521,10 +527,10 @@ exit 0 * Thu Jul 05 2012 Nick Clifton - 2.22.52.0.4-5 - Catch attempts to create a broken symbol index with archives > 4Gb in size. (#835957) -* Fri Jun 30 2012 Nick Clifton - 2.22.52.0.4-4 +* Fri Jun 29 2012 Nick Clifton - 2.22.52.0.4-4 - Import fix for ld/14189. (#829311) -* Fri Jun 30 2012 Nick Clifton - 2.22.52.0.4-3 +* Fri Jun 29 2012 Nick Clifton - 2.22.52.0.4-3 - Fix handling of archives > 4Gb in size by importing patch for PR binutils/14302. (#835957) * Tue Jun 19 2012 Jakub Jelinek - 2.22.52.0.4-2 @@ -552,7 +558,7 @@ exit 0 * Fri Mar 16 2012 Jakub Jelinek - 2.22.52.0.1-10 - Fix up handling of hidden ifunc relocs on i?86 -* Wed Mar 13 2012 Jeff Law - 2.22.52.0.1-9 +* Wed Mar 14 2012 Jeff Law - 2.22.52.0.1-9 - Fix c++filt docs (2nd instance) (#797752) * Wed Mar 07 2012 Jakub Jelinek - 2.22.52.0.1-8 @@ -567,7 +573,7 @@ exit 0 * Mon Feb 27 2012 Jeff Law - 2.22.52.0.1-6 - Fix c++filt docs (#797752) -* Wed Feb 14 2012 Mark Wielaard - 2.22.52.0.1-5 +* Wed Feb 15 2012 Mark Wielaard - 2.22.52.0.1-5 - Add upstream ld/13621 'dangling global hidden symbol in symtab' patch. * Wed Feb 08 2012 Adam Williamson - 2.22.52.0.1-4 @@ -598,7 +604,7 @@ exit 0 * Fri Sep 30 2011 Ricky Zhou - 2.21.53.0.2-2 - Rebuild libopcodes.a with -fPIC. -* Tue Aug 08 2011 Nick Clifton - 2.21.53.0.2-1 +* Tue Aug 09 2011 Nick Clifton - 2.21.53.0.2-1 - Rebase on 2.21.53.0.2 tarball. Delete unneeded patches. (BZ 728677) * Tue Aug 02 2011 Nick Clifton - 2.21.53.0.1-3 @@ -625,7 +631,7 @@ exit 0 * Thu Jun 09 2011 Nick Clifton - 2.21.52.0.1-1 - Rebase on 2.21.52.0.1 tarball. (BZ 712025) -* Tue May 19 2011 Nick Clifton - 2.21.51.0.9-1 +* Tue May 17 2011 Nick Clifton - 2.21.51.0.9-1 - Rebase on 2.21.51.0.9 tarball. (BZ 703105) * Mon May 2 2011 Peter Robinson - 2.21.51.0.8-3 @@ -660,7 +666,7 @@ exit 0 - Delete redundant patches. - Fix gold+ld configure command line option. -* Fri Nov 4 2010 Dan Horák - 2.20.51.0.12-2 +* Fri Nov 5 2010 Dan Horák - 2.20.51.0.12-2 - "no" is not valid option for --enable-gold * Thu Oct 28 2010 Nick Clifton - 2.20.51.0.12-1 @@ -1180,18 +1186,18 @@ exit 0 - fix -z relro to make sure end of PT_GNU_RELRO segment is always COMMONPAGESIZE aligned -* Wed Aug 16 2004 Jakub Jelinek 2.15.91.0.2-8 +* Wed Aug 18 2004 Jakub Jelinek 2.15.91.0.2-8 - fix linker segfaults on input objects with SHF_LINK_ORDER with incorrect sh_link (H.J.Lu, Nick Clifton, #130198, BZ #290) -* Wed Aug 16 2004 Jakub Jelinek 2.15.91.0.2-7 +* Wed Aug 18 2004 Jakub Jelinek 2.15.91.0.2-7 - resolve all undefined ppc64 .* syms to the function bodies through .opd, not just those used in brach instructions (Alan Modra) -* Tue Aug 16 2004 Jakub Jelinek 2.15.91.0.2-6 +* Tue Aug 17 2004 Jakub Jelinek 2.15.91.0.2-6 - fix ppc64 ld --dotsyms (Alan Modra) -* Tue Aug 16 2004 Jakub Jelinek 2.15.91.0.2-5 +* Tue Aug 17 2004 Jakub Jelinek 2.15.91.0.2-5 - various ppc64 make check fixes when using non-dot-syms gcc (Alan Modra) - fix --gc-sections - on ia64 create empty .gnu.linkonce.ia64unw*.* sections for