diff --git a/binutils-2.20.51.0.2-ia64-lib64.patch b/binutils-2.20.51.0.2-ia64-lib64.patch deleted file mode 100644 index c1241ac..0000000 --- a/binutils-2.20.51.0.2-ia64-lib64.patch +++ /dev/null @@ -1,21 +0,0 @@ -2004-05-14 Jakub Jelinek - - * emulparams/elf64_ia64.sh (LIBPATH_SUFFIX): Use */lib64 paths on - ia64-linux if /lib64 tree is present. - ---- a/ld/emulparams/elf64_ia64.sh 2008-11-21 16:45:00.000000000 +0000 -+++ b/ld/emulparams/elf64_ia64.sh 2008-11-21 16:55:46.000000000 +0000 -@@ -38,3 +38,13 @@ OTHER_READONLY_SECTIONS="${OTHER_READONL - SMALL_DATA_CTOR=" " - SMALL_DATA_DTOR=" " - SHARABLE_SECTIONS=yes -+ -+# For Linux modify the default library search path -+# to first include a 64-bit specific directory. -+case "$target" in -+ ia64*-linux*) -+ case "$EMULATION_NAME" in -+ *64*) test -d /lib64 && LIBPATH_SUFFIX=64 ;; -+ esac -+ ;; -+esac diff --git a/binutils-2.27-dwarf-parse-speedup.patch b/binutils-2.27-dwarf-parse-speedup.patch new file mode 100644 index 0000000..bab8e5e --- /dev/null +++ b/binutils-2.27-dwarf-parse-speedup.patch @@ -0,0 +1,380 @@ +--- binutils-2.27.orig/bfd/dwarf2.c 2016-11-22 17:26:23.634699582 +0000 ++++ binutils-2.27/bfd/dwarf2.c 2016-11-22 17:26:49.849841652 +0000 +@@ -256,6 +256,12 @@ struct comp_unit + /* A list of the functions found in this comp. unit. */ + struct funcinfo *function_table; + ++ /* A table of function information references searchable by address. */ ++ struct lookup_funcinfo *lookup_funcinfo_table; ++ ++ /* Number of functions in the function_table and sorted_function_table. */ ++ bfd_size_type number_of_functions; ++ + /* A list of the variables found in this comp. unit. */ + struct varinfo *variable_table; + +@@ -1236,6 +1242,8 @@ struct line_sequence + bfd_vma low_pc; + struct line_sequence* prev_sequence; + struct line_info* last_line; /* Largest VMA. */ ++ struct line_info** line_info_lookup; ++ bfd_size_type num_lines; + }; + + struct line_info_table +@@ -1278,6 +1286,20 @@ struct funcinfo + asection *sec; + }; + ++struct lookup_funcinfo ++{ ++ /* Function information corresponding to this lookup table entry. */ ++ struct funcinfo *funcinfo; ++ ++ /* The lowest address for this specific function. */ ++ bfd_vma low_addr; ++ ++ /* The highest address of this function before the lookup table is sorted. ++ The highest address of all prior functions after the lookup table is sorted, ++ which is used for binary search. */ ++ bfd_vma high_addr; ++}; ++ + struct varinfo + { + /* Pointer to previous variable in list of all variables */ +@@ -1578,6 +1600,49 @@ compare_sequences (const void* a, const + return 0; + } + ++/* Construct the line information table for quick lookup. */ ++ ++static bfd_boolean ++build_line_info_table (struct line_info_table* table, struct line_sequence *seq) ++{ ++ bfd_size_type amt; ++ struct line_info** line_info_lookup; ++ struct line_info* each_line; ++ unsigned int num_lines; ++ unsigned int index; ++ ++ if (seq->line_info_lookup != NULL) ++ return TRUE; ++ ++ /* Count the number of line information entries. We could do this while ++ scanning the debug information, but some entries may be added via lcl_head ++ without having a sequence handy to increment the number of lines. */ ++ num_lines = 0; ++ for (each_line = seq->last_line; each_line; each_line = each_line->prev_line) ++ num_lines++; ++ ++ if (num_lines == 0) ++ return TRUE; ++ ++ /* Allocate space for the line information lookup table. */ ++ amt = sizeof (struct line_info*) * num_lines; ++ line_info_lookup = (struct line_info**) bfd_alloc (table->abfd, amt); ++ if (line_info_lookup == NULL) ++ return FALSE; ++ ++ /* Create the line information lookup table. */ ++ index = num_lines; ++ for (each_line = seq->last_line; each_line; each_line = each_line->prev_line) ++ line_info_lookup[--index] = each_line; ++ ++ BFD_ASSERT (index == 0); ++ ++ seq->num_lines = num_lines; ++ seq->line_info_lookup = line_info_lookup; ++ ++ return TRUE; ++} ++ + /* Sort the line sequences for quick lookup. */ + + static bfd_boolean +@@ -1609,6 +1674,8 @@ sort_line_sequences (struct line_info_ta + sequences[n].low_pc = seq->low_pc; + sequences[n].prev_sequence = NULL; + sequences[n].last_line = seq->last_line; ++ sequences[n].line_info_lookup = NULL; ++ sequences[n].num_lines = 0; + seq = seq->prev_sequence; + free (last_seq); + } +@@ -2089,7 +2156,7 @@ lookup_address_in_line_info_table (struc + unsigned int *discriminator_ptr) + { + struct line_sequence *seq = NULL; +- struct line_info *each_line; ++ struct line_info *info; + int low, high, mid; + + /* Binary search the array of sequences. */ +@@ -2107,26 +2174,43 @@ lookup_address_in_line_info_table (struc + break; + } + +- if (seq && addr >= seq->low_pc && addr < seq->last_line->address) ++ /* Check for a valid sequence. */ ++ if (!seq || addr < seq->low_pc || addr >= seq->last_line->address) ++ goto fail; ++ ++ if (!build_line_info_table (table, seq)) ++ goto fail; ++ ++ /* Binary search the array of line information. */ ++ low = 0; ++ high = seq->num_lines; ++ info = NULL; ++ while (low < high) + { +- /* Note: seq->last_line should be a descendingly sorted list. */ +- for (each_line = seq->last_line; +- each_line; +- each_line = each_line->prev_line) +- if (addr >= each_line->address) +- break; ++ mid = (low + high) / 2; ++ info = seq->line_info_lookup[mid]; ++ if (addr < info->address) ++ high = mid; ++ else if (addr >= seq->line_info_lookup[mid + 1]->address) ++ low = mid + 1; ++ else ++ break; ++ } + +- if (each_line +- && !(each_line->end_sequence || each_line == seq->last_line)) +- { +- *filename_ptr = each_line->filename; +- *linenumber_ptr = each_line->line; +- if (discriminator_ptr) +- *discriminator_ptr = each_line->discriminator; +- return seq->last_line->address - seq->low_pc; +- } ++ /* Check for a valid line information entry. */ ++ if (info ++ && addr >= info->address ++ && addr < seq->line_info_lookup[mid + 1]->address ++ && !(info->end_sequence || info == seq->last_line)) ++ { ++ *filename_ptr = info->filename; ++ *linenumber_ptr = info->line; ++ if (discriminator_ptr) ++ *discriminator_ptr = info->discriminator; ++ return seq->last_line->address - seq->low_pc; + } + ++fail: + *filename_ptr = NULL; + return 0; + } +@@ -2144,6 +2228,93 @@ read_debug_ranges (struct comp_unit *uni + + /* Function table functions. */ + ++static int ++compare_lookup_funcinfos (const void* a, const void* b) ++{ ++ const struct lookup_funcinfo *lookup1 = a; ++ const struct lookup_funcinfo *lookup2 = b; ++ int result; ++ ++ if (lookup1->low_addr < lookup2->low_addr) ++ result = -1; ++ else if (lookup1->low_addr > lookup2->low_addr) ++ result = 1; ++ else if (lookup1->high_addr < lookup2->high_addr) ++ result = -1; ++ else if (lookup1->high_addr > lookup1->high_addr) ++ result = 1; ++ else ++ result = 0; ++ ++ return result; ++} ++ ++static bfd_boolean ++build_lookup_funcinfo_table (struct comp_unit *unit) ++{ ++ struct lookup_funcinfo *lookup_funcinfo_table = unit->lookup_funcinfo_table; ++ unsigned int number_of_functions = unit->number_of_functions; ++ struct funcinfo *each; ++ struct lookup_funcinfo *entry; ++ size_t index; ++ struct arange *range; ++ bfd_vma low_addr, high_addr; ++ ++ if (lookup_funcinfo_table || number_of_functions == 0) ++ return TRUE; ++ ++ /* Create the function info lookup table. */ ++ lookup_funcinfo_table = (struct lookup_funcinfo *) ++ bfd_malloc (number_of_functions * sizeof (struct lookup_funcinfo)); ++ if (lookup_funcinfo_table == NULL) ++ return FALSE; ++ ++ /* Populate the function info lookup table. */ ++ index = number_of_functions; ++ for (each = unit->function_table; each; each = each->prev_func) ++ { ++ entry = &lookup_funcinfo_table[--index]; ++ entry->funcinfo = each; ++ ++ /* Calculate the lowest and highest address for this function entry. */ ++ low_addr = entry->funcinfo->arange.low; ++ high_addr = entry->funcinfo->arange.high; ++ ++ for (range = entry->funcinfo->arange.next; range; range = range->next) ++ { ++ if (range->low < low_addr) ++ low_addr = range->low; ++ if (range->high > high_addr) ++ high_addr = range->high; ++ } ++ ++ entry->low_addr = low_addr; ++ entry->high_addr = high_addr; ++ } ++ ++ BFD_ASSERT (index == 0); ++ ++ /* Sort the function by address. */ ++ qsort (lookup_funcinfo_table, ++ number_of_functions, ++ sizeof (struct lookup_funcinfo), ++ compare_lookup_funcinfos); ++ ++ /* Calculate the high watermark for each function in the lookup table. */ ++ high_addr = lookup_funcinfo_table[0].high_addr; ++ for (index = 1; index < number_of_functions; index++) ++ { ++ entry = &lookup_funcinfo_table[index]; ++ if (entry->high_addr > high_addr) ++ high_addr = entry->high_addr; ++ else ++ entry->high_addr = high_addr; ++ } ++ ++ unit->lookup_funcinfo_table = lookup_funcinfo_table; ++ return TRUE; ++} ++ + /* If ADDR is within UNIT's function tables, set FUNCTION_PTR, and return + TRUE. Note that we need to find the function that has the smallest range + that contains ADDR, to handle inlined functions without depending upon +@@ -2154,37 +2325,71 @@ lookup_address_in_function_table (struct + bfd_vma addr, + struct funcinfo **function_ptr) + { +- struct funcinfo* each_func; ++ unsigned int number_of_functions = unit->number_of_functions; ++ struct lookup_funcinfo* lookup_funcinfo = NULL; ++ struct funcinfo* funcinfo = NULL; + struct funcinfo* best_fit = NULL; + bfd_vma best_fit_len = 0; ++ bfd_size_type low, high, mid, first; + struct arange *arange; + +- for (each_func = unit->function_table; +- each_func; +- each_func = each_func->prev_func) ++ if (!build_lookup_funcinfo_table (unit)) ++ return FALSE; ++ ++ /* Find the first function in the lookup table which may contain the ++ specified address. */ ++ low = 0; ++ high = number_of_functions; ++ first = high; ++ while (low < high) + { +- for (arange = &each_func->arange; +- arange; +- arange = arange->next) ++ mid = (low + high) / 2; ++ lookup_funcinfo = &unit->lookup_funcinfo_table[mid]; ++ if (addr < lookup_funcinfo->low_addr) ++ high = mid; ++ else if (addr >= lookup_funcinfo->high_addr) ++ low = mid + 1; ++ else ++ high = first = mid; ++ } ++ ++ /* Find the 'best' match for the address. The prior algorithm defined the ++ best match as the function with the smallest address range containing ++ the specified address. This definition should probably be changed to the ++ innermost inline routine containing the address, but right now we want ++ to get the same results we did before. */ ++ while (first < number_of_functions) ++ { ++ if (addr < unit->lookup_funcinfo_table[first].low_addr) ++ break; ++ funcinfo = unit->lookup_funcinfo_table[first].funcinfo; ++ ++ for (arange = &funcinfo->arange; arange; arange = arange->next) + { +- if (addr >= arange->low && addr < arange->high) ++ if (addr < arange->low || addr >= arange->high) ++ continue; ++ ++ if (!best_fit ++ || arange->high - arange->low < best_fit_len ++ /* The following comparison is designed to return the same ++ match as the previous algorithm for routines which have the ++ same best fit length. */ ++ || (arange->high - arange->low == best_fit_len ++ && funcinfo > best_fit)) + { +- if (!best_fit +- || arange->high - arange->low < best_fit_len) +- { +- best_fit = each_func; +- best_fit_len = arange->high - arange->low; +- } ++ best_fit = funcinfo; ++ best_fit_len = arange->high - arange->low; + } + } +- } + +- if (best_fit) +- { +- *function_ptr = best_fit; +- return TRUE; ++ first++; + } +- return FALSE; ++ ++ if (!best_fit) ++ return FALSE; ++ ++ *function_ptr = best_fit; ++ return TRUE; + } + + /* If SYM at ADDR is within function table of UNIT, set FILENAME_PTR +@@ -2513,6 +2718,7 @@ scan_unit_for_symbols (struct comp_unit + func->tag = abbrev->tag; + func->prev_func = unit->function_table; + unit->function_table = func; ++ unit->number_of_functions++; + BFD_ASSERT (!unit->cached); + + if (func->tag == DW_TAG_inlined_subroutine) +@@ -4241,6 +4447,12 @@ _bfd_dwarf2_cleanup_debug_info (bfd *abf + function_table = function_table->prev_func; + } + ++ if (each->lookup_funcinfo_table) ++ { ++ free (each->lookup_funcinfo_table); ++ each->lookup_funcinfo_table = NULL; ++ } ++ + while (variable_table) + { + if (variable_table->file) diff --git a/binutils-2.27-objdump-improvements.patch b/binutils-2.27-objdump-improvements.patch new file mode 100644 index 0000000..ee2418a --- /dev/null +++ b/binutils-2.27-objdump-improvements.patch @@ -0,0 +1,4350 @@ +--- binutils-2.27.orig/binutils/objdump.c 2016-11-08 15:39:41.094551341 +0000 ++++ binutils-2.27/binutils/objdump.c 2016-11-08 16:04:52.433507357 +0000 +@@ -620,6 +620,18 @@ slurp_dynamic_symtab (bfd *abfd) + return sy; + } + ++/* Some symbol names are significant and should be kept in the ++ table of sorted symbol names, even if they are marked as ++ debugging/section symbols. */ ++ ++static bfd_boolean ++is_significant_symbol_name (const char * name) ++{ ++ return strcmp (name, ".plt") == 0 ++ || strcmp (name, ".got") == 0 ++ || strcmp (name, ".plt.got") == 0; ++} ++ + /* Filter out (in place) symbols that are useless for disassembly. + COUNT is the number of elements in SYMBOLS. + Return the number of useful symbols. */ +@@ -635,7 +647,8 @@ remove_useless_symbols (asymbol **symbol + + if (sym->name == NULL || sym->name[0] == '\0') + continue; +- if (sym->flags & (BSF_DEBUGGING | BSF_SECTION_SYM)) ++ if ((sym->flags & (BSF_DEBUGGING | BSF_SECTION_SYM)) ++ && ! is_significant_symbol_name (sym->name)) + continue; + if (bfd_is_und_section (sym->section) + || bfd_is_com_section (sym->section)) +@@ -903,11 +916,13 @@ find_symbol_for_address (bfd_vma vma, + + /* The symbol we want is now in min, the low end of the range we + were searching. If there are several symbols with the same +- value, we want the first one. */ ++ value, we want the first (non-section/non-debugging) one. */ + thisplace = min; + while (thisplace > 0 + && (bfd_asymbol_value (sorted_syms[thisplace]) +- == bfd_asymbol_value (sorted_syms[thisplace - 1]))) ++ == bfd_asymbol_value (sorted_syms[thisplace - 1])) ++ && ((sorted_syms[thisplace - 1]->flags ++ & (BSF_SECTION_SYM | BSF_DEBUGGING)) == 0)) + --thisplace; + + /* Prefer a symbol in the current section if we have multple symbols +@@ -993,6 +1008,41 @@ find_symbol_for_address (bfd_vma vma, + return NULL; + } + ++ /* If we have not found an exact match for the specified address ++ and we have dynamic relocations available, then we can produce ++ a better result by matching a relocation to the address and ++ using the symbol associated with that relocation. */ ++ if (!want_section ++ && aux->dynrelbuf != NULL ++ && sorted_syms[thisplace]->value != vma ++ /* If we have matched a synthetic symbol, then stick with that. */ ++ && (sorted_syms[thisplace]->flags & BSF_SYNTHETIC) == 0) ++ { ++ arelent ** rel_pp; ++ long rel_count; ++ ++ for (rel_count = aux->dynrelcount, rel_pp = aux->dynrelbuf; ++ rel_count--;) ++ { ++ arelent * rel = rel_pp[rel_count]; ++ ++ if (rel->address == vma ++ && rel->sym_ptr_ptr != NULL ++ /* Absolute relocations do not provide a more helpful symbolic address. */ ++ && ! bfd_is_abs_section ((* rel->sym_ptr_ptr)->section)) ++ { ++ if (place != NULL) ++ * place = thisplace; ++ return * rel->sym_ptr_ptr; ++ } ++ ++ /* We are scanning backwards, so if we go below the target address ++ we have failed. */ ++ if (rel_pp[rel_count]->address < vma) ++ break; ++ } ++ } ++ + if (place != NULL) + *place = thisplace; + +@@ -1031,7 +1081,19 @@ objdump_print_addr_with_sym (bfd *abfd, + { + (*inf->fprintf_func) (inf->stream, " <"); + objdump_print_symname (abfd, inf, sym); +- if (bfd_asymbol_value (sym) > vma) ++ ++ if (bfd_asymbol_value (sym) == vma) ++ ; ++ /* Undefined symbols in an executables and dynamic objects do not have ++ a value associated with them, so it does not make sense to display ++ an offset relative to them. Normally we would not be provided with ++ this kind of symbol, but the target backend might choose to do so, ++ and the code in find_symbol_for_address might return an as yet ++ unresolved symbol associated with a dynamic reloc. */ ++ else if ((bfd_get_file_flags (abfd) & (EXEC_P | DYNAMIC)) ++ && bfd_is_und_section (sym->section)) ++ ; ++ else if (bfd_asymbol_value (sym) > vma) + { + (*inf->fprintf_func) (inf->stream, "-0x"); + objdump_print_value (bfd_asymbol_value (sym) - vma, inf, TRUE); +@@ -1996,7 +2058,7 @@ disassemble_section (bfd *abfd, asection + + /* Decide which set of relocs to use. Load them if necessary. */ + paux = (struct objdump_disasm_info *) pinfo->application_data; +- if (paux->dynrelbuf) ++ if (paux->dynrelbuf && dump_dynamic_reloc_info) + { + rel_pp = paux->dynrelbuf; + rel_count = paux->dynrelcount; +@@ -2273,13 +2335,11 @@ disassemble_data (bfd *abfd) + /* Allow the target to customize the info structure. */ + disassemble_init_for_target (& disasm_info); + +- /* Pre-load the dynamic relocs if we are going +- to be dumping them along with the disassembly. */ +- if (dump_dynamic_reloc_info) ++ /* Pre-load the dynamic relocs as we may need them during the disassembly. */ + { + long relsize = bfd_get_dynamic_reloc_upper_bound (abfd); + +- if (relsize < 0) ++ if (relsize < 0 && dump_dynamic_reloc_info) + bfd_fatal (bfd_get_filename (abfd)); + + if (relsize > 0) +--- binutils-2.27/gas/testsuite/gas/arm/tls.d 2015-11-13 08:27:41.000000000 +0000 ++++ /work/sources/binutils/current/gas/testsuite/gas/arm/tls.d 2016-10-11 12:14:08.383657767 +0100 +@@ -15,7 +15,7 @@ Disassembly of section .text: + 0: e1a00000 nop ; .* + 0: R_ARM_TLS_DESCSEQ af + 4: e59f0014 ldr r0, \[pc, #20\] ; 20 .* +- 8: fa000000 blx 8 ++ 8: fa000000 blx 8 + 8: R_ARM_TLS_CALL ae + c: e1a00000 nop ; .* + 0+10 <.arm_pool>: +@@ -34,7 +34,7 @@ Disassembly of section .text: + 26: 46c0 nop ; .* + 26: R_ARM_THM_TLS_DESCSEQ tf + 28: 4805 ldr r0, \[pc, #20\] ; \(40 .*\) +- 2a: f000 e800 blx 4 ++ 2a: f000 e800 blx 4 + 2a: R_ARM_THM_TLS_CALL te + 2e: 46c0 nop ; .* + 30: 00000002 .word 0x00000002 +diff --git a/ld/testsuite/ld-aarch64/emit-relocs-515-be.d b/ld/testsuite/ld-aarch64/emit-relocs-515-be.d +index 0bd39e3..82d5bd6 100644 +--- a/ld/testsuite/ld-aarch64/emit-relocs-515-be.d ++++ b/ld/testsuite/ld-aarch64/emit-relocs-515-be.d +@@ -12,7 +12,7 @@ Disassembly of section .text: + 10008: 8b020021 add x1, x1, x2 + 1000c: d2a00000 movz x0, #0x0, lsl #16 + 10010: 8b000020 add x0, x1, x0 +- 10014: 9400000c bl 10044 \ ++ 10014: 9400000c bl 10044 \<.*\> + 10018: d503201f nop + 1001c: 00000000 .word 0x00000000 + 10020: 0000ffe4 .word 0x0000ffe4 +diff --git a/ld/testsuite/ld-aarch64/emit-relocs-515.d b/ld/testsuite/ld-aarch64/emit-relocs-515.d +index 67f436b..9d84bf1 100644 +--- a/ld/testsuite/ld-aarch64/emit-relocs-515.d ++++ b/ld/testsuite/ld-aarch64/emit-relocs-515.d +@@ -12,7 +12,7 @@ Disassembly of section .text: + 10008: 8b020021 add x1, x1, x2 + 1000c: d2a00000 movz x0, #0x0, lsl #16 + 10010: 8b000020 add x0, x1, x0 +- 10014: 9400000c bl 10044 \ ++ 10014: 9400000c bl 10044 \<.*\> + 10018: d503201f nop + 1001c: 0000ffe4 .word 0x0000ffe4 + 10020: 00000000 .word 0x00000000 +diff --git a/ld/testsuite/ld-aarch64/emit-relocs-516-be.d b/ld/testsuite/ld-aarch64/emit-relocs-516-be.d +index e3b528d..23332b0 100644 +--- a/ld/testsuite/ld-aarch64/emit-relocs-516-be.d ++++ b/ld/testsuite/ld-aarch64/emit-relocs-516-be.d +@@ -13,7 +13,7 @@ Disassembly of section .text: + 1000c: f2800100 movk x0, #0x8 + 10010: f2800300 movk x0, #0x18 + 10014: 8b000020 add x0, x1, x0 +- 10018: 9400000c bl 10048 \ ++ 10018: 9400000c bl 10048 \<.*\> + 1001c: d503201f nop + 10020: 00000000 .word 0x00000000 + 10024: 0000ffe0 .word 0x0000ffe0 +diff --git a/ld/testsuite/ld-aarch64/emit-relocs-516.d b/ld/testsuite/ld-aarch64/emit-relocs-516.d +index 2ace032..e2ad1d6 100644 +--- a/ld/testsuite/ld-aarch64/emit-relocs-516.d ++++ b/ld/testsuite/ld-aarch64/emit-relocs-516.d +@@ -13,7 +13,7 @@ Disassembly of section .text: + 1000c: f2800100 movk x0, #0x8 + 10010: f2800300 movk x0, #0x18 + 10014: 8b000020 add x0, x1, x0 +- 10018: 9400000c bl 10048 \ ++ 10018: 9400000c bl 10048 \<.*\> + 1001c: d503201f nop + 10020: 0000ffe0 .word 0x0000ffe0 + 10024: 00000000 .word 0x00000000 +diff --git a/ld/testsuite/ld-aarch64/gc-plt-relocs.d b/ld/testsuite/ld-aarch64/gc-plt-relocs.d +index 086968c..d9f9413 100644 +--- a/ld/testsuite/ld-aarch64/gc-plt-relocs.d ++++ b/ld/testsuite/ld-aarch64/gc-plt-relocs.d +@@ -20,7 +20,7 @@ DYNAMIC SYMBOL TABLE: + Disassembly of section .text: + + 0+8000 \<_start\>: +- 8000: 9400000c bl 8030 \ ++ 8000: 9400000c bl 8030 \<.*> + + 0+8004 \: + 8004: 8a000000 and x0, x0, x0 +diff --git a/ld/testsuite/ld-aarch64/tls-tiny-desc.d b/ld/testsuite/ld-aarch64/tls-tiny-desc.d +index 7b88786..c17c448 100644 +--- a/ld/testsuite/ld-aarch64/tls-tiny-desc.d ++++ b/ld/testsuite/ld-aarch64/tls-tiny-desc.d +@@ -6,8 +6,8 @@ + Disassembly of section .text: + + 0000000000010000 \: +- +10000: 58080141 ldr x1, 20028 \<_GLOBAL_OFFSET_TABLE_\+0x28\> +- +10004: 10080120 adr x0, 20028 \<_GLOBAL_OFFSET_TABLE_\+0x28\> ++ +10000: 58080141 ldr x1, 20028 \ ++ +10004: 10080120 adr x0, 20028 \ + +10008: d63f0020 blr x1 + + Disassembly of section .plt: +diff --git a/ld/testsuite/ld-aarch64/tls-tiny-gd.d b/ld/testsuite/ld-aarch64/tls-tiny-gd.d +index 2f55f7b..9133492 100644 +--- a/ld/testsuite/ld-aarch64/tls-tiny-gd.d ++++ b/ld/testsuite/ld-aarch64/tls-tiny-gd.d +@@ -6,8 +6,8 @@ + Disassembly of section .text: + + 0000000000010000 \: +- +10000: 10080040 adr x0, 20008 \<_GLOBAL_OFFSET_TABLE_\+0x8\> +- +10004: 9400000a bl 1002c \ ++ +10000: 10080040 adr x0, 20008 \ ++ +10004: 9400000a bl 1002c \<.*> + +10008: d503201f nop + + Disassembly of section .plt: +diff --git a/ld/testsuite/ld-aarch64/tls-tiny-ie.d b/ld/testsuite/ld-aarch64/tls-tiny-ie.d +index 02aff35..849e73d 100644 +--- a/ld/testsuite/ld-aarch64/tls-tiny-ie.d ++++ b/ld/testsuite/ld-aarch64/tls-tiny-ie.d +@@ -3,6 +3,6 @@ + #objdump: -dr + #... + +10000: d53bd042 mrs x2, tpidr_el0 +- +10004: 58080020 ldr x0, 20008 <_GLOBAL_OFFSET_TABLE_\+0x8> ++ +10004: 58080020 ldr x0, 20008 <.*> + +10008: 8b000040 add x0, x2, x0 + +1000c: b9400000 ldr w0, \[x0\] +diff --git a/ld/testsuite/ld-arm/arm-app-abs32.d b/ld/testsuite/ld-arm/arm-app-abs32.d +index 13221f0..d888929 100644 +--- a/ld/testsuite/ld-arm/arm-app-abs32.d ++++ b/ld/testsuite/ld-arm/arm-app-abs32.d +@@ -6,9 +6,9 @@ start address .* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + +.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- +.*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ +.*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + +.*: e08fe00e add lr, pc, lr + +.*: e5bef008 ldr pc, \[lr, #8\]! + +.*: .* .* +diff --git a/ld/testsuite/ld-arm/arm-app.d b/ld/testsuite/ld-arm/arm-app.d +index 98fc899..dd4cf81 100644 +--- a/ld/testsuite/ld-arm/arm-app.d ++++ b/ld/testsuite/ld-arm/arm-app.d +@@ -6,9 +6,9 @@ start address 0x.* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- .*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* +diff --git a/ld/testsuite/ld-arm/arm-lib-plt32.d b/ld/testsuite/ld-arm/arm-lib-plt32.d +index ecc2cf2..2eaf89a 100644 +--- a/ld/testsuite/ld-arm/arm-lib-plt32.d ++++ b/ld/testsuite/ld-arm/arm-lib-plt32.d +@@ -6,9 +6,9 @@ start address 0x.* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- .*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* +diff --git a/ld/testsuite/ld-arm/arm-lib.d b/ld/testsuite/ld-arm/arm-lib.d +index 0e2a7aa..ac439ea 100644 +--- a/ld/testsuite/ld-arm/arm-lib.d ++++ b/ld/testsuite/ld-arm/arm-lib.d +@@ -6,9 +6,9 @@ start address 0x.* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- .*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* +diff --git a/ld/testsuite/ld-arm/armthumb-lib.d b/ld/testsuite/ld-arm/armthumb-lib.d +index 9a5dea8..4f43b8e 100644 +--- a/ld/testsuite/ld-arm/armthumb-lib.d ++++ b/ld/testsuite/ld-arm/armthumb-lib.d +@@ -6,9 +6,9 @@ start address 0x.* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- .*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* +diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d +index 0f40861..bbf6839 100644 +--- a/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d ++++ b/ld/testsuite/ld-arm/cortex-a8-fix-b-plt.d +@@ -4,9 +4,9 @@ + + Disassembly of section \.plt: + +-00008000 : ++00008000 <.*>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 ++ 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <.*> + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00000ffc \.word 0x00000ffc +diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d +index b6e6fff..079c928 100644 +--- a/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d ++++ b/ld/testsuite/ld-arm/cortex-a8-fix-bcc-plt.d +@@ -4,9 +4,9 @@ + + Disassembly of section \.plt: + +-00008000 : ++00008000 <.plt>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 ++ 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <.*> + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00001004 \.word 0x00001004 +diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d +index baad3d0..e4e6760 100644 +--- a/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d ++++ b/ld/testsuite/ld-arm/cortex-a8-fix-bl-plt.d +@@ -4,9 +4,9 @@ + + Disassembly of section \.plt: + +-00008000 : ++00008000 <.plt>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 ++ 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <.*> + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00000ffc \.word 0x00000ffc +diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d +index c504f79..4a5be27 100644 +--- a/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d ++++ b/ld/testsuite/ld-arm/cortex-a8-fix-bl-rel-plt.d +@@ -4,9 +4,9 @@ + + Disassembly of section \.plt: + +-00008e00 : ++00008e00 <.plt>: + 8e00: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- 8e04: e59fe004 ldr lr, \[pc, #4\] ; 8e10 ++ 8e04: e59fe004 ldr lr, \[pc, #4\] ; 8e10 <.*> + 8e08: e08fe00e add lr, pc, lr + 8e0c: e5bef008 ldr pc, \[lr, #8\]! + 8e10: 0001027c \.word 0x0001027c +diff --git a/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d b/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d +index baad3d0..e4e6760 100644 +--- a/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d ++++ b/ld/testsuite/ld-arm/cortex-a8-fix-blx-plt.d +@@ -4,9 +4,9 @@ + + Disassembly of section \.plt: + +-00008000 : ++00008000 <.plt>: + 8000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 ++ 8004: e59fe004 ldr lr, \[pc, #4\] ; 8010 <.*> + 8008: e08fe00e add lr, pc, lr + 800c: e5bef008 ldr pc, \[lr, #8\]! + 8010: 00000ffc \.word 0x00000ffc +diff --git a/ld/testsuite/ld-arm/farcall-mixed-app-v5.d b/ld/testsuite/ld-arm/farcall-mixed-app-v5.d +index ea0e823..b570bad 100644 +--- a/ld/testsuite/ld-arm/farcall-mixed-app-v5.d ++++ b/ld/testsuite/ld-arm/farcall-mixed-app-v5.d +@@ -6,9 +6,9 @@ start address 0x.* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- .*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* +diff --git a/ld/testsuite/ld-arm/farcall-mixed-app.d b/ld/testsuite/ld-arm/farcall-mixed-app.d +index 86127ef..9fa97dc 100644 +--- a/ld/testsuite/ld-arm/farcall-mixed-app.d ++++ b/ld/testsuite/ld-arm/farcall-mixed-app.d +@@ -6,9 +6,9 @@ start address 0x.* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- .*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* +diff --git a/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d b/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d +index e2dbc1b..fa52ad1 100644 +--- a/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d ++++ b/ld/testsuite/ld-arm/farcall-mixed-lib-v4t.d +@@ -5,9 +5,9 @@ start address 0x.* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- .*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* .word .* +diff --git a/ld/testsuite/ld-arm/farcall-mixed-lib.d b/ld/testsuite/ld-arm/farcall-mixed-lib.d +index b736983..ad7352b 100644 +--- a/ld/testsuite/ld-arm/farcall-mixed-lib.d ++++ b/ld/testsuite/ld-arm/farcall-mixed-lib.d +@@ -5,9 +5,9 @@ start address 0x.* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- .*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* +diff --git a/ld/testsuite/ld-arm/ifunc-10.dd b/ld/testsuite/ld-arm/ifunc-10.dd +index d96c086..05e4be5 100644 +--- a/ld/testsuite/ld-arm/ifunc-10.dd ++++ b/ld/testsuite/ld-arm/ifunc-10.dd +@@ -4,9 +4,9 @@ + + Disassembly of section \.plt: + +-00009000 : ++00009000 <.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 ++ 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! + #------------------------------------------------------------------------------ +diff --git a/ld/testsuite/ld-arm/ifunc-14.dd b/ld/testsuite/ld-arm/ifunc-14.dd +index cbad1c8..281373c 100644 +--- a/ld/testsuite/ld-arm/ifunc-14.dd ++++ b/ld/testsuite/ld-arm/ifunc-14.dd +@@ -4,9 +4,9 @@ + + Disassembly of section \.plt: + +-00009000 : ++00009000 <.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <__irel_end\+0xff0> ++ 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! + #------------------------------------------------------------------------------ +diff --git a/ld/testsuite/ld-arm/ifunc-15.dd b/ld/testsuite/ld-arm/ifunc-15.dd +index f23e8e8..d3fbf9d 100644 +--- a/ld/testsuite/ld-arm/ifunc-15.dd ++++ b/ld/testsuite/ld-arm/ifunc-15.dd +@@ -4,9 +4,9 @@ + + Disassembly of section \.plt: + +-00009000 : ++00009000 <.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <__irel_end\+0xff0> ++ 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! + #------------------------------------------------------------------------------ +diff --git a/ld/testsuite/ld-arm/ifunc-3.dd b/ld/testsuite/ld-arm/ifunc-3.dd +index b267bf1..2297e5a 100644 +--- a/ld/testsuite/ld-arm/ifunc-3.dd ++++ b/ld/testsuite/ld-arm/ifunc-3.dd +@@ -4,9 +4,9 @@ + + Disassembly of section \.plt: + +-00009000 : ++00009000 <.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 ++ 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! + #------------------------------------------------------------------------------ +diff --git a/ld/testsuite/ld-arm/ifunc-4.dd b/ld/testsuite/ld-arm/ifunc-4.dd +index 6ce996b..647a340 100644 +--- a/ld/testsuite/ld-arm/ifunc-4.dd ++++ b/ld/testsuite/ld-arm/ifunc-4.dd +@@ -4,9 +4,9 @@ + + Disassembly of section \.plt: + +-00009000 : ++00009000 <.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 ++ 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! + #------------------------------------------------------------------------------ +diff --git a/ld/testsuite/ld-arm/ifunc-9.dd b/ld/testsuite/ld-arm/ifunc-9.dd +index af7ec4b..cc4afa8 100644 +--- a/ld/testsuite/ld-arm/ifunc-9.dd ++++ b/ld/testsuite/ld-arm/ifunc-9.dd +@@ -4,9 +4,9 @@ + + Disassembly of section \.plt: + +-00009000 : ++00009000 <.plt>: + 9000: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 ++ 9004: e59fe004 ldr lr, \[pc, #4\] ; 9010 <.*> + 9008: e08fe00e add lr, pc, lr + 900c: e5bef008 ldr pc, \[lr, #8\]! + #------------------------------------------------------------------------------ +diff --git a/ld/testsuite/ld-arm/long-plt-format.d b/ld/testsuite/ld-arm/long-plt-format.d +index b0a1abc..b14d9b5 100644 +--- a/ld/testsuite/ld-arm/long-plt-format.d ++++ b/ld/testsuite/ld-arm/long-plt-format.d +@@ -3,7 +3,7 @@ + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: .* + .*: .* + .*: .* +diff --git a/ld/testsuite/ld-arm/mixed-app-v5.d b/ld/testsuite/ld-arm/mixed-app-v5.d +index 0ad39e6..9c734a9 100644 +--- a/ld/testsuite/ld-arm/mixed-app-v5.d ++++ b/ld/testsuite/ld-arm/mixed-app-v5.d +@@ -6,9 +6,9 @@ start address 0x.* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- .*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* +diff --git a/ld/testsuite/ld-arm/mixed-app.d b/ld/testsuite/ld-arm/mixed-app.d +index 6083161..4bcbdad 100644 +--- a/ld/testsuite/ld-arm/mixed-app.d ++++ b/ld/testsuite/ld-arm/mixed-app.d +@@ -6,9 +6,9 @@ start address 0x.* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- .*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* +diff --git a/ld/testsuite/ld-arm/mixed-lib.d b/ld/testsuite/ld-arm/mixed-lib.d +index 271692c..a4bb26b 100644 +--- a/ld/testsuite/ld-arm/mixed-lib.d ++++ b/ld/testsuite/ld-arm/mixed-lib.d +@@ -6,9 +6,9 @@ start address 0x.* + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\) +- .*: e59fe004 ldr lr, \[pc, #4\] ; .* ++ .*: e59fe004 ldr lr, \[pc, #4\] ; .* <.*> + .*: e08fe00e add lr, pc, lr + .*: e5bef008 ldr pc, \[lr, #8\]! + .*: .* +diff --git a/ld/testsuite/ld-arm/tls-lib-loc.d b/ld/testsuite/ld-arm/tls-lib-loc.d +index 27789b4..2e641b3 100644 +--- a/ld/testsuite/ld-arm/tls-lib-loc.d ++++ b/ld/testsuite/ld-arm/tls-lib-loc.d +@@ -28,6 +28,6 @@ Disassembly of section .text: + + [0-9a-f]+ : + [0-9a-f]+: e59f0004 ldr r0, \[pc, #4\] ; 818c .* +- [0-9a-f]+: fafffff2 blx 8154 <.*\+0x8154> ++ [0-9a-f]+: fafffff2 blx 8154 <.*> + [0-9a-f]+: e1a00000 nop ; .* + 818c: 000080a0 .word 0x000080a0 +diff --git a/ld/testsuite/ld-cris/dso-pltdis1.d b/ld/testsuite/ld-cris/dso-pltdis1.d +index 4bc3c70..e2c0f93 100644 +--- a/ld/testsuite/ld-cris/dso-pltdis1.d ++++ b/ld/testsuite/ld-cris/dso-pltdis1.d +@@ -20,7 +20,7 @@ + + Disassembly of section \.plt: + +-0+1b4 <(dsofn4@plt-0x1a|dsofn@plt-0x34)>: ++0+1b4 <.*>: + 1b4: 84e2 subq 4,\$sp + 1b6: 0401 addoq 4,\$r0,\$acr + 1b8: 7e7a move \$mof,\[\$sp\] +@@ -45,7 +45,7 @@ Disassembly of section \.plt: + 1f0: bf09 jump \$acr + 1f2: b005 nop + 1f4: 3f7e .... .... move .*,\$mof +- 1fa: bf0e baff ffff ba 1b4 <(dsofn4@plt-0x1a|dsofn@plt-0x34)> ++ 1fa: bf0e baff ffff ba 1b4 <.*> + 200: b005 nop + + Disassembly of section \.text: +@@ -57,5 +57,5 @@ Disassembly of section \.text: + 0+20a : + 20a: 7f0d ae20 0000 lapc 22b8 <_GLOBAL_OFFSET_TABLE_>,\$r0 + 210: 5f0d 1400 addo\.w 0x14,\$r0,\$acr +- 214: bfbe baff ffff bsr 1ce <(dsofn4@plt|dsofn@plt-0x1a)> ++ 214: bfbe baff ffff bsr 1ce <.*> + #pass +diff --git a/ld/testsuite/ld-cris/dso-pltdis2.d b/ld/testsuite/ld-cris/dso-pltdis2.d +index 5348a8a..24da97a 100644 +--- a/ld/testsuite/ld-cris/dso-pltdis2.d ++++ b/ld/testsuite/ld-cris/dso-pltdis2.d +@@ -12,7 +12,7 @@ + + Disassembly of section \.plt: + +-0+1b4 <(dsofn4@plt-0x1a|dsofn@plt-0x34)>: ++0+1b4 <.*>: + + 1b4: 84e2 subq 4,\$sp + 1b6: 0401 addoq 4,\$r0,\$acr +@@ -44,7 +44,7 @@ Disassembly of section \.plt: + Disassembly of section \.text: + #... + 0+202 : +- 202: bfbe e6ff ffff bsr 1e8 <(dsofn@plt|dsofn4@plt\+0x1a)> ++ 202: bfbe e6ff ffff bsr 1e8 <.*> + 208: b005 nop + + 0+20a : +diff --git a/ld/testsuite/ld-cris/dso12-pltdis.d b/ld/testsuite/ld-cris/dso12-pltdis.d +index 71a1748..187730b 100644 +--- a/ld/testsuite/ld-cris/dso12-pltdis.d ++++ b/ld/testsuite/ld-cris/dso12-pltdis.d +@@ -11,7 +11,7 @@ + + Disassembly of section \.plt: + +-0+1e4 : ++0+1e4 <.plt>: + + 1e4: 84e2 subq 4,\$sp + 1e6: 0401 addoq 4,\$r0,\$acr +@@ -24,21 +24,21 @@ Disassembly of section \.plt: + \.\.\. + + 0+1fe : +- 1fe: 6f0d 0c00 0000 addo\.d c ,\$r0,\$acr ++ 1fe: 6f0d 0c00 0000 addo\.d c <.*>,\$r0,\$acr + 204: 6ffa move\.d \[\$acr\],\$acr + 206: bf09 jump \$acr + 208: b005 nop +- 20a: 3f7e 0000 0000 move 0 ,\$mof +- 210: bf0e d4ff ffff ba 1e4 ++ 20a: 3f7e 0000 0000 move 0 <.*>,\$mof ++ 210: bf0e d4ff ffff ba 1e4 <.*> + 216: b005 nop + + 0+218 : +- 218: 6f0d 1000 0000 addo\.d 10 ,\$r0,\$acr ++ 218: 6f0d 1000 0000 addo\.d 10 <.*>,\$r0,\$acr + 21e: 6ffa move\.d \[\$acr\],\$acr + 220: bf09 jump \$acr + 222: b005 nop +- 224: 3f7e 0c00 0000 move c ,\$mof +- 22a: bf0e baff ffff ba 1e4 ++ 224: 3f7e 0c00 0000 move c <.*>,\$mof ++ 22a: bf0e baff ffff ba 1e4 <.*> + 230: b005 nop + + Disassembly of section \.text: +diff --git a/ld/testsuite/ld-elf/symbolic-func.r b/ld/testsuite/ld-elf/symbolic-func.r +index 3d31f8f..448b01a 100644 +--- a/ld/testsuite/ld-elf/symbolic-func.r ++++ b/ld/testsuite/ld-elf/symbolic-func.r +@@ -14,5 +14,5 @@ + + Relocation section.* + *Offset.* +-0*[1-9a-f][0-9a-f]* +[^ ]+ +[^ ]+ +([0-9a-f]+( +\.text( \+ [0-9a-f]+)?)?)? ++0*[1-9a-f][0-9a-f]* +[^ ]+ +[^ ]+ +([0-9a-f]+( +(\.text|fun)( \+ [0-9a-f]+)?)?)? + #pass +diff --git a/ld/testsuite/ld-frv/fdpic-pie-1.d b/ld/testsuite/ld-frv/fdpic-pie-1.d +index 0e37324..5369d07 100644 +--- a/ld/testsuite/ld-frv/fdpic-pie-1.d ++++ b/ld/testsuite/ld-frv/fdpic-pie-1.d +@@ -42,7 +42,7 @@ Disassembly of section \.data: + [0-9a-f ]+: R_FRV_32 \.text + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0 + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text + [0-9a-f ]+: 00 00 00 02 add\.p gr0,fp,gr0 +diff --git a/ld/testsuite/ld-frv/fdpic-pie-2.d b/ld/testsuite/ld-frv/fdpic-pie-2.d +index 3583a3b..40c1532 100644 +--- a/ld/testsuite/ld-frv/fdpic-pie-2.d ++++ b/ld/testsuite/ld-frv/fdpic-pie-2.d +@@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 \.text + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x18>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0 + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text + [0-9a-f ]+: 00 00 00 02 add\.p gr0,fp,gr0 +diff --git a/ld/testsuite/ld-frv/fdpic-pie-6.d b/ld/testsuite/ld-frv/fdpic-pie-6.d +index c59b304..743166e 100644 +--- a/ld/testsuite/ld-frv/fdpic-pie-6.d ++++ b/ld/testsuite/ld-frv/fdpic-pie-6.d +@@ -9,11 +9,11 @@ Disassembly of section \.plt: + + [0-9a-f ]+<\.plt>: + [0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0 +-[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +-[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0 +-[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0 + [0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4 + [0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\) +@@ -22,7 +22,7 @@ Disassembly of section \.plt: + Disassembly of section \.text: + + [0-9a-f ]+: +-[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ ++[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <.*> + [0-9a-f ]+: 80 40 f0 0c addi gr15,12,gr0 + [0-9a-f ]+: 80 fc 00 24 setlos 0x24,gr0 + [0-9a-f ]+: 80 f4 00 20 setlo 0x20,gr0 +@@ -48,7 +48,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 WFb + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 03 b0 .* + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF9 + [0-9a-f ]+: 00 00 00 02 .* +diff --git a/ld/testsuite/ld-frv/fdpic-pie-7.d b/ld/testsuite/ld-frv/fdpic-pie-7.d +index 7ebd0b7..7eceec2 100644 +--- a/ld/testsuite/ld-frv/fdpic-pie-7.d ++++ b/ld/testsuite/ld-frv/fdpic-pie-7.d +@@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 \.text + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0 + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text + [0-9a-f ]+: 00 00 00 02 add\.p gr0,fp,gr0 +diff --git a/ld/testsuite/ld-frv/fdpic-pie-8.d b/ld/testsuite/ld-frv/fdpic-pie-8.d +index 0de4a81..8f7c344 100644 +--- a/ld/testsuite/ld-frv/fdpic-pie-8.d ++++ b/ld/testsuite/ld-frv/fdpic-pie-8.d +@@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 \.text + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x18>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0 + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text + [0-9a-f ]+: 00 00 00 02 add\.p gr0,fp,gr0 +diff --git a/ld/testsuite/ld-frv/fdpic-shared-1.d b/ld/testsuite/ld-frv/fdpic-shared-1.d +index 7f88e18..4968deb 100644 +--- a/ld/testsuite/ld-frv/fdpic-shared-1.d ++++ b/ld/testsuite/ld-frv/fdpic-shared-1.d +@@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 \.text + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0 + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +diff --git a/ld/testsuite/ld-frv/fdpic-shared-2.d b/ld/testsuite/ld-frv/fdpic-shared-2.d +index cb4b68d..13e140a 100644 +--- a/ld/testsuite/ld-frv/fdpic-shared-2.d ++++ b/ld/testsuite/ld-frv/fdpic-shared-2.d +@@ -9,11 +9,11 @@ Disassembly of section \.plt: + + [0-9a-f ]+ <\.plt>: + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +-[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0 +-[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0 +-[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0 + [0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4 + [0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\) +@@ -22,7 +22,7 @@ Disassembly of section \.plt: + Disassembly of section \.text: + + [0-9a-f ]+: +-[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ ++[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <.*> + + [0-9a-f ]+: + [0-9a-f ]+: 80 40 f0 10 addi gr15,16,gr0 +@@ -55,7 +55,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 GFb + [0-9A-F ]+isassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 04 a4 .* + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE GF9 + [0-9a-f ]+: 00 00 00 00 .* +diff --git a/ld/testsuite/ld-frv/fdpic-shared-3.d b/ld/testsuite/ld-frv/fdpic-shared-3.d +index fceb16a..fc59185 100644 +--- a/ld/testsuite/ld-frv/fdpic-shared-3.d ++++ b/ld/testsuite/ld-frv/fdpic-shared-3.d +@@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 \.text + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0 + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +diff --git a/ld/testsuite/ld-frv/fdpic-shared-4.d b/ld/testsuite/ld-frv/fdpic-shared-4.d +index 4045562..298ae28 100644 +--- a/ld/testsuite/ld-frv/fdpic-shared-4.d ++++ b/ld/testsuite/ld-frv/fdpic-shared-4.d +@@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 \.text + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x18>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0 + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +diff --git a/ld/testsuite/ld-frv/fdpic-shared-5.d b/ld/testsuite/ld-frv/fdpic-shared-5.d +index 009c62c..dbfd143 100644 +--- a/ld/testsuite/ld-frv/fdpic-shared-5.d ++++ b/ld/testsuite/ld-frv/fdpic-shared-5.d +@@ -9,11 +9,11 @@ Disassembly of section \.plt: + + [0-9a-f ]+<\.plt>: + [0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0 +-[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0 +-[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +-[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0 + [0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4 + [0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\) +@@ -22,7 +22,7 @@ Disassembly of section \.plt: + Disassembly of section \.text: + + [0-9a-f ]+: +-[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ ++[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <.*> + [0-9a-f ]+: 80 40 f0 0c addi gr15,12,gr0 + [0-9a-f ]+: 80 fc 00 24 setlos 0x24,gr0 + [0-9a-f ]+: 80 f4 00 20 setlo 0x20,gr0 +@@ -48,7 +48,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 UFb + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 04 7c .* + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE UF9 + [0-9a-f ]+: 00 00 00 00 .* +diff --git a/ld/testsuite/ld-frv/fdpic-shared-6.d b/ld/testsuite/ld-frv/fdpic-shared-6.d +index 06a335f..2191af8 100644 +--- a/ld/testsuite/ld-frv/fdpic-shared-6.d ++++ b/ld/testsuite/ld-frv/fdpic-shared-6.d +@@ -9,11 +9,11 @@ Disassembly of section \.plt: + + [0-9a-f ]+<\.plt>: + [0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0 +-[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 06 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +-[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 04 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 10 add\.p gr0,gr16,gr0 +-[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ ++[0-9a-f ]+: c0 1a 00 02 bra [0-9a-f]+ <.*> + [0-9a-f ]+: 00 00 00 18 add\.p gr0,gr24,gr0 + [0-9a-f ]+: 88 08 f1 40 ldd @\(gr15,gr0\),gr4 + [0-9a-f ]+: 80 30 40 00 jmpl @\(gr4,gr0\) +@@ -22,7 +22,7 @@ Disassembly of section \.plt: + Disassembly of section \.text: + + [0-9a-f ]+: +-[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ ++[0-9a-f ]+: fe 3f ff fe call [0-9a-f]+ <.*> + [0-9a-f ]+: 80 40 f0 0c addi gr15,12,gr0 + [0-9a-f ]+: 80 fc 00 24 setlos 0x24,gr0 + [0-9a-f ]+: 80 f4 00 20 setlo 0x20,gr0 +@@ -48,7 +48,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 WFb + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x20>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 03 60 .* + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE WF9 + [0-9a-f ]+: 00 00 00 00 .* +diff --git a/ld/testsuite/ld-frv/fdpic-shared-7.d b/ld/testsuite/ld-frv/fdpic-shared-7.d +index 2004a84..071dd8f 100644 +--- a/ld/testsuite/ld-frv/fdpic-shared-7.d ++++ b/ld/testsuite/ld-frv/fdpic-shared-7.d +@@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 \.text + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0 + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +diff --git a/ld/testsuite/ld-frv/fdpic-shared-8.d b/ld/testsuite/ld-frv/fdpic-shared-8.d +index 543d313..e50e7b9 100644 +--- a/ld/testsuite/ld-frv/fdpic-shared-8.d ++++ b/ld/testsuite/ld-frv/fdpic-shared-8.d +@@ -42,7 +42,7 @@ Disassembly of section \.text: + [0-9a-f ]+: R_FRV_32 \.text + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0 + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +diff --git a/ld/testsuite/ld-frv/fdpic-shared-local-2.d b/ld/testsuite/ld-frv/fdpic-shared-local-2.d +index 51ca126..0074172 100644 +--- a/ld/testsuite/ld-frv/fdpic-shared-local-2.d ++++ b/ld/testsuite/ld-frv/fdpic-shared-local-2.d +@@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 \.text + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0 + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +diff --git a/ld/testsuite/ld-frv/fdpic-shared-local-8.d b/ld/testsuite/ld-frv/fdpic-shared-local-8.d +index 8d2c67e..7d238e9 100644 +--- a/ld/testsuite/ld-frv/fdpic-shared-local-8.d ++++ b/ld/testsuite/ld-frv/fdpic-shared-local-8.d +@@ -42,7 +42,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: R_FRV_32 \.text + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0 + [0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 +diff --git a/ld/testsuite/ld-frv/fdpic-static-1.d b/ld/testsuite/ld-frv/fdpic-static-1.d +index 1c4dce1..9bab5d7 100644 +--- a/ld/testsuite/ld-frv/fdpic-static-1.d ++++ b/ld/testsuite/ld-frv/fdpic-static-1.d +@@ -51,7 +51,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: 00 01 00 98 addx\.p gr16,gr24,gr0,icc0 + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 01 00 98 addx\.p gr16,gr24,gr0,icc0 + [0-9a-f ]+: 00 01 41 18 sub\.p gr20,gr24,gr0 + +diff --git a/ld/testsuite/ld-frv/fdpic-static-2.d b/ld/testsuite/ld-frv/fdpic-static-2.d +index d2b794f..e388e2c 100644 +--- a/ld/testsuite/ld-frv/fdpic-static-2.d ++++ b/ld/testsuite/ld-frv/fdpic-static-2.d +@@ -67,7 +67,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: 00 01 00 98 addx\.p gr16,gr24,gr0,icc0 + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 01 00 98 addx\.p gr16,gr24,gr0,icc0 + [0-9a-f ]+: 00 01 41 88 subx\.p gr20,gr8,gr0,icc0 + [0-9a-f ]+: 00 01 00 98 addx\.p gr16,gr24,gr0,icc0 +diff --git a/ld/testsuite/ld-frv/fdpic-static-6.d b/ld/testsuite/ld-frv/fdpic-static-6.d +index 491b7c7..1c197a2 100644 +--- a/ld/testsuite/ld-frv/fdpic-static-6.d ++++ b/ld/testsuite/ld-frv/fdpic-static-6.d +@@ -36,7 +36,7 @@ Disassembly of section \.dat[0-9a-f ]+: + \.\.\. + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>: ++[0-9a-f ]+<.got>: + \.\.\. + + [0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>: +diff --git a/ld/testsuite/ld-frv/fdpic-static-7.d b/ld/testsuite/ld-frv/fdpic-static-7.d +index 6f8313c..77899f6 100644 +--- a/ld/testsuite/ld-frv/fdpic-static-7.d ++++ b/ld/testsuite/ld-frv/fdpic-static-7.d +@@ -51,7 +51,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: 00 01 00 9c addx\.p gr16,gr28,gr0,icc0 + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x8>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 01 00 9c addx\.p gr16,gr28,gr0,icc0 + [0-9a-f ]+: 00 01 41 18 sub\.p gr20,gr24,gr0 + +diff --git a/ld/testsuite/ld-frv/fdpic-static-8.d b/ld/testsuite/ld-frv/fdpic-static-8.d +index c0cc732..03e795e 100644 +--- a/ld/testsuite/ld-frv/fdpic-static-8.d ++++ b/ld/testsuite/ld-frv/fdpic-static-8.d +@@ -67,7 +67,7 @@ Disassembly of section \.dat[0-9a-f ]+: + [0-9a-f ]+: 00 01 00 9c addx\.p gr16,gr28,gr0,icc0 + Disassembly of section \.got: + +-[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_-0x38>: ++[0-9a-f ]+<.got>: + [0-9a-f ]+: 00 01 00 9c addx\.p gr16,gr28,gr0,icc0 + [0-9a-f ]+: 00 01 41 88 subx\.p gr20,gr8,gr0,icc0 + [0-9a-f ]+: 00 01 00 9c addx\.p gr16,gr28,gr0,icc0 +diff --git a/ld/testsuite/ld-frv/tls-dynamic-2.d b/ld/testsuite/ld-frv/tls-dynamic-2.d +index 07bf332..d943e86 100644 +--- a/ld/testsuite/ld-frv/tls-dynamic-2.d ++++ b/ld/testsuite/ld-frv/tls-dynamic-2.d +@@ -155,7 +155,7 @@ Disassembly of section \.text: + [0-9a-f ]+: 80 88 00 00 nop + Disassembly of section \.got: + +-[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x60)>: ++[0-9a-f ]+<.*>: + [0-9a-f ]+: 00 01 02 c0 .* + [0-9a-f ]+: 00 00 08 21 .* + [0-9a-f ]+: 00 01 02 c0 .* +diff --git a/ld/testsuite/ld-frv/tls-initial-shared-2.d b/ld/testsuite/ld-frv/tls-initial-shared-2.d +index e4ea6a1..7f73c27 100644 +--- a/ld/testsuite/ld-frv/tls-initial-shared-2.d ++++ b/ld/testsuite/ld-frv/tls-initial-shared-2.d +@@ -149,7 +149,7 @@ Disassembly of section \.text: + [0-9a-f ]+: 92 c8 f0 5c ldi @\(gr15,92\),gr9 + Disassembly of section \.got: + +-[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x20)>: ++[0-9a-f ]+<.*>: + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 + [0-9a-f ]+: R_FRV_TLSDESC_VALUE \.tbss + [0-9a-f ]+: 00 00 10 11 add\.p sp,gr17,gr0 +diff --git a/ld/testsuite/ld-frv/tls-relax-shared-2.d b/ld/testsuite/ld-frv/tls-relax-shared-2.d +index c07bb35..7519247 100644 +--- a/ld/testsuite/ld-frv/tls-relax-shared-2.d ++++ b/ld/testsuite/ld-frv/tls-relax-shared-2.d +@@ -151,7 +151,7 @@ Disassembly of section \.text: + [0-9a-f ]+: 82 30 80 00 calll @\(gr8,gr0\) + Disassembly of section \.got: + +-[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x60)>: ++[0-9a-f ]+<.*>: + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 + [0-9a-f ]+: R_FRV_TLSDESC_VALUE \.tbss + [0-9a-f ]+: 00 00 17 f3 \*unknown\* +diff --git a/ld/testsuite/ld-frv/tls-shared-2.d b/ld/testsuite/ld-frv/tls-shared-2.d +index bd92cdb..1e6b533 100644 +--- a/ld/testsuite/ld-frv/tls-shared-2.d ++++ b/ld/testsuite/ld-frv/tls-shared-2.d +@@ -151,7 +151,7 @@ Disassembly of section \.text: + [0-9a-f ]+: 82 30 80 00 calll @\(gr8,gr0\) + Disassembly of section \.got: + +-[0-9a-f ]+<(__data_start|_GLOBAL_OFFSET_TABLE_-0x60)>: ++[0-9a-f ]+<.*>: + [0-9a-f ]+: 00 00 00 00 add\.p gr0,gr0,gr0 + [0-9a-f ]+: R_FRV_TLSDESC_VALUE \.tbss + [0-9a-f ]+: 00 00 17 f3 \*unknown\* +diff --git a/ld/testsuite/ld-i386/plt-nacl.pd b/ld/testsuite/ld-i386/plt-nacl.pd +index 0f8e114..d95e888e 100644 +--- a/ld/testsuite/ld-i386/plt-nacl.pd ++++ b/ld/testsuite/ld-i386/plt-nacl.pd +@@ -8,7 +8,7 @@ + + Disassembly of section .plt: + +-[0-9a-f]+ : ++[0-9a-f]+ <.plt>: + +[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * pushl 0x[0-9a-f]+ + +[0-9a-f]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[0-9a-f]+,%ecx + +[0-9a-f]+: 83 e1 e0 and \$0xffffffe0,%ecx +@@ -87,7 +87,7 @@ Disassembly of section .plt: + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 68 00 00 00 00 push \$0x0 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt> + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop +@@ -137,7 +137,7 @@ Disassembly of section .plt: + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 68 08 00 00 00 push \$0x8 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt> + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop +diff --git a/ld/testsuite/ld-i386/plt-pic-nacl.pd b/ld/testsuite/ld-i386/plt-pic-nacl.pd +index 77e8a2a..03aa007 100644 +--- a/ld/testsuite/ld-i386/plt-pic-nacl.pd ++++ b/ld/testsuite/ld-i386/plt-pic-nacl.pd +@@ -8,7 +8,7 @@ + + Disassembly of section .plt: + +-[0-9a-f]+ : ++[0-9a-f]+ <.plt>: + +[0-9a-f]+: ff 73 04 pushl 0x4\(%ebx\) + +[0-9a-f]+: 8b 4b 08 mov 0x8\(%ebx\),%ecx + +[0-9a-f]+: 83 e1 e0 and \$0xffffffe0,%ecx +@@ -93,7 +93,7 @@ Disassembly of section .plt: + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 68 00 00 00 00 push \$0x0 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt> + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop +@@ -143,7 +143,7 @@ Disassembly of section .plt: + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 68 08 00 00 00 push \$0x8 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt> + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop + +[0-9a-f]+: 90 nop +diff --git a/ld/testsuite/ld-i386/plt-pic.pd b/ld/testsuite/ld-i386/plt-pic.pd +index 5fe2930..4122c46 100644 +--- a/ld/testsuite/ld-i386/plt-pic.pd ++++ b/ld/testsuite/ld-i386/plt-pic.pd +@@ -8,7 +8,7 @@ + + Disassembly of section .plt: + +-[0-9a-f]+ : ++[0-9a-f]+ <.plt>: + +[0-9a-f]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\) + +[0-9a-f]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\) + #... +@@ -16,9 +16,9 @@ Disassembly of section .plt: + [0-9a-f]+ : + +[0-9a-f]+: ff a3 ([0-9a-f]{2} ){4} * jmp \*0x[0-9a-f]+\(%ebx\) + +[0-9a-f]+: 68 00 00 00 00 push \$0x0 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt> + + [0-9a-f]+ : + +[0-9a-f]+: ff a3 ([0-9a-f]{2} ){4} * jmp \*0x[0-9a-f]+\(%ebx\) + +[0-9a-f]+: 68 08 00 00 00 push \$0x8 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt> +diff --git a/ld/testsuite/ld-i386/plt.pd b/ld/testsuite/ld-i386/plt.pd +index 1b1f57d..a6e6d35 100644 +--- a/ld/testsuite/ld-i386/plt.pd ++++ b/ld/testsuite/ld-i386/plt.pd +@@ -8,7 +8,7 @@ + + Disassembly of section .plt: + +-[0-9a-f]+ : ++[0-9a-f]+ <.plt>: + +[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * pushl 0x[0-9a-f]+ + +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmp \*0x[0-9a-f]+ + #... +@@ -16,9 +16,9 @@ Disassembly of section .plt: + [0-9a-f]+ : + +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmp \*0x[0-9a-f]+ + +[0-9a-f]+: 68 00 00 00 00 push \$0x0 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt> + + [0-9a-f]+ : + +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmp \*0x[0-9a-f]+ + +[0-9a-f]+: 68 08 00 00 00 push \$0x8 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmp [0-9a-f]+ <.plt> +diff --git a/ld/testsuite/ld-i386/pr19636-1d-nacl.d b/ld/testsuite/ld-i386/pr19636-1d-nacl.d +index fef5eea..489eab6 100644 +--- a/ld/testsuite/ld-i386/pr19636-1d-nacl.d ++++ b/ld/testsuite/ld-i386/pr19636-1d-nacl.d +@@ -121,4 +121,4 @@ Disassembly of section .text: + 0+80 <_start>: + [ ]*[a-f0-9]+: 3b 80 f8 ff ff ff cmp -0x8\(%eax\),%eax + [ ]*[a-f0-9]+: ff a0 fc ff ff ff jmp \*-0x4\(%eax\) +-[ ]*[a-f0-9]+: e8 af ff ff ff call 40 <_start-0x40> ++[ ]*[a-f0-9]+: e8 af ff ff ff call 40 <.*> +diff --git a/ld/testsuite/ld-i386/pr19636-1d.d b/ld/testsuite/ld-i386/pr19636-1d.d +index 16e316c..ac86786 100644 +--- a/ld/testsuite/ld-i386/pr19636-1d.d ++++ b/ld/testsuite/ld-i386/pr19636-1d.d +@@ -23,4 +23,4 @@ Disassembly of section .text: + 0+e0 <_start>: + [ ]*[a-f0-9]+: 3b 80 f8 ff ff ff cmp -0x8\(%eax\),%eax + [ ]*[a-f0-9]+: ff a0 fc ff ff ff jmp \*-0x4\(%eax\) +-[ ]*[a-f0-9]+: e8 df ff ff ff call d0 <_start-0x10> ++[ ]*[a-f0-9]+: e8 df ff ff ff call d0 <.*> +diff --git a/ld/testsuite/ld-i386/pr19636-2c-nacl.d b/ld/testsuite/ld-i386/pr19636-2c-nacl.d +index 7543e0e..7a6cce1 100644 +--- a/ld/testsuite/ld-i386/pr19636-2c-nacl.d ++++ b/ld/testsuite/ld-i386/pr19636-2c-nacl.d +@@ -121,6 +121,6 @@ Disassembly of section .text: + 0+80 <_start>: + [ ]*[a-f0-9]+: 3b 80 fc ff ff ff cmp -0x4\(%eax\),%eax + [ ]*[a-f0-9]+: ff a0 fc ff ff ff jmp \*-0x4\(%eax\) +-[ ]*[a-f0-9]+: e8 af ff ff ff call 40 <_start-0x40> ++[ ]*[a-f0-9]+: e8 af ff ff ff call 40 <.*> + [ ]*[a-f0-9]+: 3d 00 00 00 00 cmp \$0x0,%eax +-[ ]*[a-f0-9]+: e8 fc ff ff ff call 97 <_start\+0x17> ++[ ]*[a-f0-9]+: e8 fc ff ff ff call 97 <.*> +diff --git a/ld/testsuite/ld-i386/pr19636-2c.d b/ld/testsuite/ld-i386/pr19636-2c.d +index 98b53aa..08db119 100644 +--- a/ld/testsuite/ld-i386/pr19636-2c.d ++++ b/ld/testsuite/ld-i386/pr19636-2c.d +@@ -23,6 +23,6 @@ Disassembly of section .text: + 0+150 <_start>: + [ ]*[a-f0-9]+: 3b 80 fc ff ff ff cmp -0x4\(%eax\),%eax + [ ]*[a-f0-9]+: ff a0 fc ff ff ff jmp \*-0x4\(%eax\) +-[ ]*[a-f0-9]+: e8 df ff ff ff call 140 <_start-0x10> ++[ ]*[a-f0-9]+: e8 df ff ff ff call 140 <.*> + [ ]*[a-f0-9]+: 3d 00 00 00 00 cmp \$0x0,%eax +-[ ]*[a-f0-9]+: e8 fc ff ff ff call 167 <_start\+0x17> ++[ ]*[a-f0-9]+: e8 fc ff ff ff call 167 <.*> +diff --git a/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d +index 4e3582d..fd42acc 100644 +--- a/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d ++++ b/ld/testsuite/ld-ifunc/ifunc-21-x86-64.d +@@ -9,11 +9,11 @@ + Disassembly of section .text: + + 0+4000c8 <__start>: +- +[a-f0-9]+: ff 15 2a 00 20 00 callq \*0x20002a\(%rip\) # 6000f8 +- +[a-f0-9]+: ff 25 24 00 20 00 jmpq \*0x200024\(%rip\) # 6000f8 +- +[a-f0-9]+: 48 03 05 1d 00 20 00 add 0x20001d\(%rip\),%rax # 6000f8 +- +[a-f0-9]+: 48 8b 05 16 00 20 00 mov 0x200016\(%rip\),%rax # 6000f8 +- +[a-f0-9]+: 48 85 05 0f 00 20 00 test %rax,0x20000f\(%rip\) # 6000f8 ++ +[a-f0-9]+: ff 15 2a 00 20 00 callq \*0x20002a\(%rip\) # 6000f8 <.got> ++ +[a-f0-9]+: ff 25 24 00 20 00 jmpq \*0x200024\(%rip\) # 6000f8 <.got> ++ +[a-f0-9]+: 48 03 05 1d 00 20 00 add 0x20001d\(%rip\),%rax # 6000f8 <.got> ++ +[a-f0-9]+: 48 8b 05 16 00 20 00 mov 0x200016\(%rip\),%rax # 6000f8 <.got> ++ +[a-f0-9]+: 48 85 05 0f 00 20 00 test %rax,0x20000f\(%rip\) # 6000f8 <.got> + +[a-f0-9]+: 48 c7 c0 f1 00 40 00 mov \$0x4000f1,%rax + + 0+4000f0 : +diff --git a/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d b/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d +index 4e3582d..fd42acc 100644 +--- a/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d ++++ b/ld/testsuite/ld-ifunc/ifunc-22-x86-64.d +@@ -9,11 +9,11 @@ + Disassembly of section .text: + + 0+4000c8 <__start>: +- +[a-f0-9]+: ff 15 2a 00 20 00 callq \*0x20002a\(%rip\) # 6000f8 +- +[a-f0-9]+: ff 25 24 00 20 00 jmpq \*0x200024\(%rip\) # 6000f8 +- +[a-f0-9]+: 48 03 05 1d 00 20 00 add 0x20001d\(%rip\),%rax # 6000f8 +- +[a-f0-9]+: 48 8b 05 16 00 20 00 mov 0x200016\(%rip\),%rax # 6000f8 +- +[a-f0-9]+: 48 85 05 0f 00 20 00 test %rax,0x20000f\(%rip\) # 6000f8 ++ +[a-f0-9]+: ff 15 2a 00 20 00 callq \*0x20002a\(%rip\) # 6000f8 <.got> ++ +[a-f0-9]+: ff 25 24 00 20 00 jmpq \*0x200024\(%rip\) # 6000f8 <.got> ++ +[a-f0-9]+: 48 03 05 1d 00 20 00 add 0x20001d\(%rip\),%rax # 6000f8 <.got> ++ +[a-f0-9]+: 48 8b 05 16 00 20 00 mov 0x200016\(%rip\),%rax # 6000f8 <.got> ++ +[a-f0-9]+: 48 85 05 0f 00 20 00 test %rax,0x20000f\(%rip\) # 6000f8 <.got> + +[a-f0-9]+: 48 c7 c0 f1 00 40 00 mov \$0x4000f1,%rax + + 0+4000f0 : +diff --git a/ld/testsuite/ld-ifunc/pr17154-i386.d b/ld/testsuite/ld-ifunc/pr17154-i386.d +index e526223..16fcd4e 100644 +--- a/ld/testsuite/ld-ifunc/pr17154-i386.d ++++ b/ld/testsuite/ld-ifunc/pr17154-i386.d +@@ -5,7 +5,7 @@ + #target: x86_64-*-* i?86-*-* + + #... +-0+1d0 <\*ABS\*@plt-0x10>: ++0+1d0 <.*>: + [ ]*[a-f0-9]+: ff b3 04 00 00 00 pushl 0x4\(%ebx\) + [ ]*[a-f0-9]+: ff a3 08 00 00 00 jmp \*0x8\(%ebx\) + [ ]*[a-f0-9]+: 00 00 add %al,\(%eax\) +@@ -14,22 +14,22 @@ + 0+1e0 <\*ABS\*@plt>: + [ ]*[a-f0-9]+: ff a3 0c 00 00 00 jmp \*0xc\(%ebx\) + [ ]*[a-f0-9]+: 68 18 00 00 00 push \$0x18 +-[ ]*[a-f0-9]+: e9 e0 ff ff ff jmp 1d0 <\*ABS\*@plt-0x10> ++[ ]*[a-f0-9]+: e9 e0 ff ff ff jmp 1d0 <.*> + + 0+1f0 : + [ ]*[a-f0-9]+: ff a3 10 00 00 00 jmp \*0x10\(%ebx\) + [ ]*[a-f0-9]+: 68 00 00 00 00 push \$0x0 +-[ ]*[a-f0-9]+: e9 d0 ff ff ff jmp 1d0 <\*ABS\*@plt-0x10> ++[ ]*[a-f0-9]+: e9 d0 ff ff ff jmp 1d0 <.*> + + 0+200 : + [ ]*[a-f0-9]+: ff a3 14 00 00 00 jmp \*0x14\(%ebx\) + [ ]*[a-f0-9]+: 68 08 00 00 00 push \$0x8 +-[ ]*[a-f0-9]+: e9 c0 ff ff ff jmp 1d0 <\*ABS\*@plt-0x10> ++[ ]*[a-f0-9]+: e9 c0 ff ff ff jmp 1d0 <.*> + + 0+210 <\*ABS\*@plt>: + [ ]*[a-f0-9]+: ff a3 18 00 00 00 jmp \*0x18\(%ebx\) + [ ]*[a-f0-9]+: 68 10 00 00 00 push \$0x10 +-[ ]*[a-f0-9]+: e9 b0 ff ff ff jmp 1d0 <\*ABS\*@plt-0x10> ++[ ]*[a-f0-9]+: e9 b0 ff ff ff jmp 1d0 <.*> + + Disassembly of section .text: + +diff --git a/ld/testsuite/ld-ifunc/pr17154-x86-64.d b/ld/testsuite/ld-ifunc/pr17154-x86-64.d +index 9d2a688..1cdcf50 100644 +--- a/ld/testsuite/ld-ifunc/pr17154-x86-64.d ++++ b/ld/testsuite/ld-ifunc/pr17154-x86-64.d +@@ -5,30 +5,30 @@ + #target: x86_64-*-* + + #... +-0+2b0 <\*ABS\*\+0x30a@plt-0x10>: +-[ ]*[a-f0-9]+: ff 35 5a 01 20 00 pushq 0x20015a\(%rip\) # 200410 <_GLOBAL_OFFSET_TABLE_\+0x8> +-[ ]*[a-f0-9]+: ff 25 5c 01 20 00 jmpq \*0x20015c\(%rip\) # 200418 <_GLOBAL_OFFSET_TABLE_\+0x10> ++0+2b0 <.*>: ++[ ]*[a-f0-9]+: ff 35 5a 01 20 00 pushq 0x20015a\(%rip\) # 200410 <.*> ++[ ]*[a-f0-9]+: ff 25 5c 01 20 00 jmpq \*0x20015c\(%rip\) # 200418 <.*> + [ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\) + + 0+2c0 <\*ABS\*\+0x30a@plt>: +-[ ]*[a-f0-9]+: ff 25 5a 01 20 00 jmpq \*0x20015a\(%rip\) # 200420 <_GLOBAL_OFFSET_TABLE_\+0x18> ++[ ]*[a-f0-9]+: ff 25 5a 01 20 00 jmpq \*0x20015a\(%rip\) # 200420 <.*> + [ ]*[a-f0-9]+: 68 03 00 00 00 pushq \$0x3 +-[ ]*[a-f0-9]+: e9 e0 ff ff ff jmpq 2b0 <\*ABS\*\+0x30a@plt-0x10> ++[ ]*[a-f0-9]+: e9 e0 ff ff ff jmpq 2b0 <.*> + + 0+2d0 : +-[ ]*[a-f0-9]+: ff 25 52 01 20 00 jmpq \*0x200152\(%rip\) # 200428 <_GLOBAL_OFFSET_TABLE_\+0x20> ++[ ]*[a-f0-9]+: ff 25 52 01 20 00 jmpq \*0x200152\(%rip\) # 200428 <.*> + [ ]*[a-f0-9]+: 68 00 00 00 00 pushq \$0x0 +-[ ]*[a-f0-9]+: e9 d0 ff ff ff jmpq 2b0 <\*ABS\*\+0x30a@plt-0x10> ++[ ]*[a-f0-9]+: e9 d0 ff ff ff jmpq 2b0 <.*> + + 0+2e0 : +-[ ]*[a-f0-9]+: ff 25 4a 01 20 00 jmpq \*0x20014a\(%rip\) # 200430 <_GLOBAL_OFFSET_TABLE_\+0x28> ++[ ]*[a-f0-9]+: ff 25 4a 01 20 00 jmpq \*0x20014a\(%rip\) # 200430 <.*> + [ ]*[a-f0-9]+: 68 01 00 00 00 pushq \$0x1 +-[ ]*[a-f0-9]+: e9 c0 ff ff ff jmpq 2b0 <\*ABS\*\+0x30a@plt-0x10> ++[ ]*[a-f0-9]+: e9 c0 ff ff ff jmpq 2b0 <.*> + + 0+2f0 <\*ABS\*\+0x300@plt>: +-[ ]*[a-f0-9]+: ff 25 42 01 20 00 jmpq \*0x200142\(%rip\) # 200438 <_GLOBAL_OFFSET_TABLE_\+0x30> ++[ ]*[a-f0-9]+: ff 25 42 01 20 00 jmpq \*0x200142\(%rip\) # 200438 <.*> + [ ]*[a-f0-9]+: 68 02 00 00 00 pushq \$0x2 +-[ ]*[a-f0-9]+: e9 b0 ff ff ff jmpq 2b0 <\*ABS\*\+0x30a@plt-0x10> ++[ ]*[a-f0-9]+: e9 b0 ff ff ff jmpq 2b0 <.*> + + Disassembly of section .text: + +diff --git a/ld/testsuite/ld-m68k/plt1-68020.d b/ld/testsuite/ld-m68k/plt1-68020.d +index 54463b9..ed3e1c1 100644 +--- a/ld/testsuite/ld-m68k/plt1-68020.d ++++ b/ld/testsuite/ld-m68k/plt1-68020.d +@@ -3,7 +3,7 @@ + + Disassembly of section \.plt: + +-00020800 : ++00020800 <.plt>: + 20800: 2f3b 0170 0000 movel %pc@\(30404 <_GLOBAL_OFFSET_TABLE_\+0x4>\),%sp@- + 20806: fc02 + 20808: 4efb 0171 0000 jmp %pc@\(30408 <_GLOBAL_OFFSET_TABLE_\+0x8>\)@\(0*\) +@@ -11,22 +11,22 @@ Disassembly of section \.plt: + 20810: 0000 0000 orib #0,%d0 + + 00020814 : +- 20814: 4efb 0171 0000 jmp %pc@\(3040c <_GLOBAL_OFFSET_TABLE_\+0xc>\)@\(0*\) ++ 20814: 4efb 0171 0000 jmp %pc@\(3040c \)@\(0*\) + 2081a: fbf6 + 2081c: 2f3c 0000 0000 movel #0,%sp@- +- 20822: 60ff ffff ffdc bral 20800 ++ 20822: 60ff ffff ffdc bral 20800 <.plt> + + 00020828 : +- 20828: 4efb 0171 0000 jmp %pc@\(30410 <_GLOBAL_OFFSET_TABLE_\+0x10>\)@\(0*\) ++ 20828: 4efb 0171 0000 jmp %pc@\(30410 \)@\(0*\) + 2082e: fbe6 + 20830: 2f3c 0000 000c movel #12,%sp@- +- 20836: 60ff ffff ffc8 bral 20800 ++ 20836: 60ff ffff ffc8 bral 20800 <.plt> + + 0002083c : +- 2083c: 4efb 0171 0000 jmp %pc@\(30414 <_GLOBAL_OFFSET_TABLE_\+0x14>\)@\(0*\) ++ 2083c: 4efb 0171 0000 jmp %pc@\(30414 \)@\(0*\) + 20842: fbd6 + 20844: 2f3c 0000 0018 movel #24,%sp@- +- 2084a: 60ff ffff ffb4 bral 20800 ++ 2084a: 60ff ffff ffb4 bral 20800 <.plt> + Disassembly of section \.text: + + 00020c00 <.*>: +diff --git a/ld/testsuite/ld-m68k/plt1-cpu32.d b/ld/testsuite/ld-m68k/plt1-cpu32.d +index a497740..e303cd1 100644 +--- a/ld/testsuite/ld-m68k/plt1-cpu32.d ++++ b/ld/testsuite/ld-m68k/plt1-cpu32.d +@@ -3,7 +3,7 @@ + + Disassembly of section \.plt: + +-00020800 : ++00020800 <.plt>: + 20800: 2f3b 0170 0000 movel %pc@\(30404 <_GLOBAL_OFFSET_TABLE_\+0x4>\),%sp@- + 20806: fc02 + 20808: 227b 0170 0000 moveal %pc@\(30408 <_GLOBAL_OFFSET_TABLE_\+0x8>\),%a1 +@@ -13,27 +13,27 @@ Disassembly of section \.plt: + \.\.\. + + 00020818 : +- 20818: 227b 0170 0000 moveal %pc@\(3040c <_GLOBAL_OFFSET_TABLE_\+0xc>\),%a1 ++ 20818: 227b 0170 0000 moveal %pc@\(3040c \),%a1 + 2081e: fbf2 + 20820: 4ed1 jmp %a1@ + 20822: 2f3c 0000 0000 movel #0,%sp@- +- 20828: 60ff ffff ffd6 bral 20800 ++ 20828: 60ff ffff ffd6 bral 20800 <.plt> + \.\.\. + + 00020830 : +- 20830: 227b 0170 0000 moveal %pc@\(30410 <_GLOBAL_OFFSET_TABLE_\+0x10>\),%a1 ++ 20830: 227b 0170 0000 moveal %pc@\(30410 \),%a1 + 20836: fbde + 20838: 4ed1 jmp %a1@ + 2083a: 2f3c 0000 000c movel #12,%sp@- +- 20840: 60ff ffff ffbe bral 20800 ++ 20840: 60ff ffff ffbe bral 20800 <.plt> + \.\.\. + + 00020848 : +- 20848: 227b 0170 0000 moveal %pc@\(30414 <_GLOBAL_OFFSET_TABLE_\+0x14>\),%a1 ++ 20848: 227b 0170 0000 moveal %pc@\(30414 \),%a1 + 2084e: fbca + 20850: 4ed1 jmp %a1@ + 20852: 2f3c 0000 0018 movel #24,%sp@- +- 20858: 60ff ffff ffa6 bral 20800 ++ 20858: 60ff ffff ffa6 bral 20800 <.plt> + \.\.\. + Disassembly of section \.text: + +diff --git a/ld/testsuite/ld-m68k/plt1-isab.d b/ld/testsuite/ld-m68k/plt1-isab.d +index a9aeacb..00e88b7 100644 +--- a/ld/testsuite/ld-m68k/plt1-isab.d ++++ b/ld/testsuite/ld-m68k/plt1-isab.d +@@ -3,23 +3,23 @@ + + Disassembly of section \.plt: + +-00020800 : ++00020800 <.plt>: + # _GLOBAL_OFFSET_TABLE_ + 4 == 0x30404 == 0x20802 + 0xfc02 + 20800: 203c 0000 fc02 movel #64514,%d0 +- 20806: 2f3b 08fa movel %pc@\(20802 ,%d0:l\),%sp@- ++ 20806: 2f3b 08fa movel %pc@\(20802 <.*>,%d0:l\),%sp@- + # _GLOBAL_OFFSET_TABLE_ + 8 == 0x30408 == 0x2080c + 0xfbfc + 2080a: 203c 0000 fbfc movel #64508,%d0 +- 20810: 207b 08fa moveal %pc@\(2080c ,%d0:l\),%a0 ++ 20810: 207b 08fa moveal %pc@\(2080c <.*>,%d0:l\),%a0 + 20814: 4ed0 jmp %a0@ + 20816: 4e71 nop + + 00020818 : + # _GLOBAL_OFFSET_TABLE_ + 12 == 0x3040c == 0x2081a + 0xfbf2 + 20818: 203c 0000 fbf2 movel #64498,%d0 +- 2081e: 207b 08fa moveal %pc@\(2081a ,%d0:l\),%a0 ++ 2081e: 207b 08fa moveal %pc@\(2081a <.*>,%d0:l\),%a0 + 20822: 4ed0 jmp %a0@ + 20824: 2f3c 0000 0000 movel #0,%sp@- +- 2082a: 60ff ffff ffd4 bral 20800 ++ 2082a: 60ff ffff ffd4 bral 20800 <.plt> + + 00020830 : + # _GLOBAL_OFFSET_TABLE_ + 16 == 0x30410 == 0x20832 + 0xfbde +@@ -27,7 +27,7 @@ Disassembly of section \.plt: + 20836: 207b 08fa moveal %pc@\(20832 ,%d0:l\),%a0 + 2083a: 4ed0 jmp %a0@ + 2083c: 2f3c 0000 000c movel #12,%sp@- +- 20842: 60ff ffff ffbc bral 20800 ++ 20842: 60ff ffff ffbc bral 20800 <.*> + + 00020848 : + # _GLOBAL_OFFSET_TABLE_ + 20 == 0x30414 == 0x2084a + 0xfbca +@@ -35,7 +35,7 @@ Disassembly of section \.plt: + 2084e: 207b 08fa moveal %pc@\(2084a ,%d0:l\),%a0 + 20852: 4ed0 jmp %a0@ + 20854: 2f3c 0000 0018 movel #24,%sp@- +- 2085a: 60ff ffff ffa4 bral 20800 ++ 2085a: 60ff ffff ffa4 bral 20800 <.*> + Disassembly of section \.text: + + 00020c00 <.*>: +diff --git a/ld/testsuite/ld-m68k/plt1-isac.d b/ld/testsuite/ld-m68k/plt1-isac.d +index ae299ce..d3d775e 100644 +--- a/ld/testsuite/ld-m68k/plt1-isac.d ++++ b/ld/testsuite/ld-m68k/plt1-isac.d +@@ -3,13 +3,13 @@ + + Disassembly of section \.plt: + +-00020800 : ++00020800 <.plt>: + # _GLOBAL_OFFSET_TABLE_ + 4 == 0x30404 == 0x20802 + 0xfc02 + 20800: 203c 0000 fc02 movel #64514,%d0 +- 20806: 2ebb 08fa movel %pc@\(20802 ,%d0:l\),%sp@ ++ 20806: 2ebb 08fa movel %pc@\(20802 <.*>,%d0:l\),%sp@ + # _GLOBAL_OFFSET_TABLE_ + 8 == 0x30408 == 0x2080c + 0xfbfc + 2080a: 203c 0000 fbfc movel #64508,%d0 +- 20810: 207b 08fa moveal %pc@\(2080c ,%d0:l\),%a0 ++ 20810: 207b 08fa moveal %pc@\(2080c <.*>,%d0:l\),%a0 + 20814: 4ed0 jmp %a0@ + 20816: 4e71 nop + +@@ -19,7 +19,7 @@ Disassembly of section \.plt: + 2081e: 207b 08fa moveal %pc@\(2081a ,%d0:l\),%a0 + 20822: 4ed0 jmp %a0@ + 20824: 2f3c 0000 0000 movel #0,%sp@- +- 2082a: 61ff ffff ffd4 bsrl 20800 ++ 2082a: 61ff ffff ffd4 bsrl 20800 <.plt> + + 00020830 : + # _GLOBAL_OFFSET_TABLE_ + 16 == 0x30410 == 0x20832 + 0xfbde +@@ -27,7 +27,7 @@ Disassembly of section \.plt: + 20836: 207b 08fa moveal %pc@\(20832 ,%d0:l\),%a0 + 2083a: 4ed0 jmp %a0@ + 2083c: 2f3c 0000 000c movel #12,%sp@- +- 20842: 61ff ffff ffbc bsrl 20800 ++ 20842: 61ff ffff ffbc bsrl 20800 <.plt> + + 00020848 : + # _GLOBAL_OFFSET_TABLE_ + 20 == 0x30414 == 0x2084a + 0xfbca +@@ -35,7 +35,7 @@ Disassembly of section \.plt: + 2084e: 207b 08fa moveal %pc@\(2084a ,%d0:l\),%a0 + 20852: 4ed0 jmp %a0@ + 20854: 2f3c 0000 0018 movel #24,%sp@- +- 2085a: 61ff ffff ffa4 bsrl 20800 ++ 2085a: 61ff ffff ffa4 bsrl 20800 <.plt> + Disassembly of section \.text: + + 00020c00 <.*>: +diff --git a/ld/testsuite/ld-metag/shared.d b/ld/testsuite/ld-metag/shared.d +index 7662dbc..94e48c0 100644 +--- a/ld/testsuite/ld-metag/shared.d ++++ b/ld/testsuite/ld-metag/shared.d +@@ -17,7 +17,7 @@ Disassembly of section .plt: + .*: 82120780 ADD A0.2,A0.2,#0x40f0 + .*: c600806a GETD PC,\[A0.2\] + .*: 03000004 MOV D1Re0,#0 +- .*: a0fffee0 B 184 ++ .*: a0fffee0 B 184 <.*> + Disassembly of section .text: + + .* : +diff --git a/ld/testsuite/ld-metag/stub_pic_app.d b/ld/testsuite/ld-metag/stub_pic_app.d +index 7a763b9..a6cf3d4 100644 +--- a/ld/testsuite/ld-metag/stub_pic_app.d ++++ b/ld/testsuite/ld-metag/stub_pic_app.d +@@ -16,7 +16,7 @@ Disassembly of section .plt: + .*: 821496e0 ADD A0.2,A0.2,#0x92dc + .*: c600806a GETD PC,\[A0.2\] + .*: 03000004 MOV D1Re0,#0 +-.*: a0fffee0 B .* <_lib_func@plt-0x14> ++.*: a0fffee0 B .* <.*> + Disassembly of section .text: + .* <__start-0x10>: + .*: 82188105 MOVT A0.3,#0x1020 +diff --git a/ld/testsuite/ld-metag/stub_pic_shared.d b/ld/testsuite/ld-metag/stub_pic_shared.d +index 41129c3..c422b09 100644 +--- a/ld/testsuite/ld-metag/stub_pic_shared.d ++++ b/ld/testsuite/ld-metag/stub_pic_shared.d +@@ -16,7 +16,7 @@ Disassembly of section .plt: + .*: 82120580 ADD A0.2,A0.2,#0x40b0 + .*: c600806a GETD PC,\[A0.2\] + .*: 03000004 MOV D1Re0,#0 +- .*: a0fffee0 B .* <_far2@plt-0x14> ++ .*: a0fffee0 B .* <.*> + Disassembly of section .text: + .* <__start-0xc>: + .*: 82980101 ADDT A0.3,CPC0,#0x20 +diff --git a/ld/testsuite/ld-metag/stub_shared.d b/ld/testsuite/ld-metag/stub_shared.d +index e937f1e..dbcd4b9 100644 +--- a/ld/testsuite/ld-metag/stub_shared.d ++++ b/ld/testsuite/ld-metag/stub_shared.d +@@ -17,7 +17,7 @@ Disassembly of section .plt: + .*: 82120620 ADD A0.2,A0.2,#0x40c4 + .*: c600806a GETD PC,\[A0.2\] + .*: 03000004 MOV D1Re0,#0 +- .*: a0fffee0 B .* <_far2@plt-0x14> ++ .*: a0fffee0 B .* <.*> + Disassembly of section .text: + + .* <_lib_func>: +diff --git a/ld/testsuite/ld-s390/tlsbin_64.dd b/ld/testsuite/ld-s390/tlsbin_64.dd +index eac7f41..fe11a23 100644 +--- a/ld/testsuite/ld-s390/tlsbin_64.dd ++++ b/ld/testsuite/ld-s390/tlsbin_64.dd +@@ -129,7 +129,7 @@ Disassembly of section .text: + +[0-9a-f]+: eb 43 00 00 00 0d sllg %r4,%r3,0 + +[0-9a-f]+: 41 54 90 00 la %r5,0\(%r4,%r9\) + # IE against global var with larl got access +- +[0-9a-f]+: c0 30 [0-9a-f ]+ larl %r3,[0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x28> ++ +[0-9a-f]+: c0 30 [0-9a-f ]+ larl %r3,[0-9a-f]+ <.*> + +[0-9a-f]+: e3 33 c0 00 00 04 lg %r3,0\(%r3,%r12\) + +[0-9a-f]+: 41 33 90 00 la %r3,0\(%r3,%r9\) + # IE against global var defined in exec with larl got access +diff --git a/ld/testsuite/ld-s390/tlspic_64.dd b/ld/testsuite/ld-s390/tlspic_64.dd +index 274cd16..86fdbbd 100644 +--- a/ld/testsuite/ld-s390/tlspic_64.dd ++++ b/ld/testsuite/ld-s390/tlspic_64.dd +@@ -160,7 +160,7 @@ Disassembly of section .text: + +[0-9a-f]+: e3 43 c0 00 00 04 lg %r4,0\(%r3,%r12\) + +[0-9a-f]+: 41 54 90 00 la %r5,0\(%r4,%r9\) + # IE against global var with larl got access +- +[0-9a-f]+: c0 30 [0-9a-f ]+ larl %r3,[0-9a-f]+ <\_GLOBAL\_OFFSET\_TABLE\_\+0x68> ++ +[0-9a-f]+: c0 30 [0-9a-f ]+ larl %r3,[0-9a-f]+ <.*> + +[0-9a-f]+: e3 33 c0 00 00 04 lg %r3,0\(%r3,%r12\) + +[0-9a-f]+: 41 33 90 00 la %r3,0\(%r3,%r9\) + # IE against local var with larl got access +diff --git a/ld/testsuite/ld-tic6x/shlib-1.dd b/ld/testsuite/ld-tic6x/shlib-1.dd +index d33887e..a00c136 100644 +--- a/ld/testsuite/ld-tic6x/shlib-1.dd ++++ b/ld/testsuite/ld-tic6x/shlib-1.dd +@@ -4,7 +4,7 @@ tmpdir/libtest\.so: file format elf32-tic6x-le + + Disassembly of section \.plt: + +-10000020 : ++10000020 <.plt>: + 10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2 + 10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1 + 10000028:[ \t]*00004000[ \t]*nop 3 +diff --git a/ld/testsuite/ld-tic6x/shlib-1b.dd b/ld/testsuite/ld-tic6x/shlib-1b.dd +index 658da73..fa597d6 100644 +--- a/ld/testsuite/ld-tic6x/shlib-1b.dd ++++ b/ld/testsuite/ld-tic6x/shlib-1b.dd +@@ -4,7 +4,7 @@ tmpdir/libtestb\.so: file format elf32-tic6x-be + + Disassembly of section \.plt: + +-10000020 : ++10000020 <.plt>: + 10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2 + 10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1 + 10000028:[ \t]*00004000[ \t]*nop 3 +diff --git a/ld/testsuite/ld-tic6x/shlib-1rb.dd b/ld/testsuite/ld-tic6x/shlib-1rb.dd +index ee1a607..6b3a2c2 100644 +--- a/ld/testsuite/ld-tic6x/shlib-1rb.dd ++++ b/ld/testsuite/ld-tic6x/shlib-1rb.dd +@@ -4,7 +4,7 @@ tmpdir/libtestrb\.so: file format elf32-tic6x-be + + Disassembly of section \.plt: + +-10000020 : ++10000020 <.plt>: + 10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2 + 10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1 + 10000028:[ \t]*00004000[ \t]*nop 3 +diff --git a/ld/testsuite/ld-tic6x/shlib-app-1.dd b/ld/testsuite/ld-tic6x/shlib-app-1.dd +index 411d47f..9e437bb 100644 +--- a/ld/testsuite/ld-tic6x/shlib-app-1.dd ++++ b/ld/testsuite/ld-tic6x/shlib-app-1.dd +@@ -4,7 +4,7 @@ tmpdir/shlib-dynapp-1: file format elf32-tic6x-le + + Disassembly of section \.plt: + +-10000020 : ++10000020 <.plt>: + 10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2 + 10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1 + 10000028:[ \t]*00004000[ \t]*nop 3 +diff --git a/ld/testsuite/ld-tic6x/shlib-app-1b.dd b/ld/testsuite/ld-tic6x/shlib-app-1b.dd +index 5312ff8..b7cb86b 100644 +--- a/ld/testsuite/ld-tic6x/shlib-app-1b.dd ++++ b/ld/testsuite/ld-tic6x/shlib-app-1b.dd +@@ -4,7 +4,7 @@ tmpdir/shlib-dynapp-1b: file format elf32-tic6x-be + + Disassembly of section \.plt: + +-10000020 : ++10000020 <.plt>: + 10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2 + 10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1 + 10000028:[ \t]*00004000[ \t]*nop 3 +diff --git a/ld/testsuite/ld-tic6x/shlib-app-1r.dd b/ld/testsuite/ld-tic6x/shlib-app-1r.dd +index 3e68bf2..6d7cd09 100644 +--- a/ld/testsuite/ld-tic6x/shlib-app-1r.dd ++++ b/ld/testsuite/ld-tic6x/shlib-app-1r.dd +@@ -4,7 +4,7 @@ tmpdir/shlib-dynapp-1r: file format elf32-tic6x-le + + Disassembly of section \.plt: + +-10000020 : ++10000020 <.plt>: + 10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2 + 10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1 + 10000028:[ \t]*00004000[ \t]*nop 3 +diff --git a/ld/testsuite/ld-tic6x/shlib-app-1rb.dd b/ld/testsuite/ld-tic6x/shlib-app-1rb.dd +index ad1f28e..57809ab 100644 +--- a/ld/testsuite/ld-tic6x/shlib-app-1rb.dd ++++ b/ld/testsuite/ld-tic6x/shlib-app-1rb.dd +@@ -4,7 +4,7 @@ tmpdir/shlib-dynapp-1rb: file format elf32-tic6x-be + + Disassembly of section \.plt: + +-10000020 : ++10000020 <.plt>: + 10000020:[ \t]*0100036e[ \t]*ldw \.D2T2 \*\+b14\(12\),b2 + 10000024:[ \t]*0080046e[ \t]*ldw \.D2T2 \*\+b14\(16\),b1 + 10000028:[ \t]*00004000[ \t]*nop 3 +diff --git a/ld/testsuite/ld-tic6x/shlib-noindex.dd b/ld/testsuite/ld-tic6x/shlib-noindex.dd +index bfdf499..fd37bac 100644 +--- a/ld/testsuite/ld-tic6x/shlib-noindex.dd ++++ b/ld/testsuite/ld-tic6x/shlib-noindex.dd +@@ -4,7 +4,7 @@ tmpdir/libtestn\.so: file format elf32-tic6x-le + + Disassembly of section \.plt: + +-10000020 : ++10000020 <.plt>: + 10000020: 0100036e ldw \.D2T2 \*\+b14\(12\),b2 + 10000024: 0080046e ldw \.D2T2 \*\+b14\(16\),b1 + 10000028: 00004000 nop 3 +diff --git a/ld/testsuite/ld-vax-elf/export-class-data.dd b/ld/testsuite/ld-vax-elf/export-class-data.dd +index c2be30c..7d152c8 100644 +--- a/ld/testsuite/ld-vax-elf/export-class-data.dd ++++ b/ld/testsuite/ld-vax-elf/export-class-data.dd +@@ -5,7 +5,7 @@ Disassembly of section \.text: + + 12340000 : + 12340000: 00 00 \.word 0x0000 # Entry mask: < > +-12340002: 9e ff 2c 00 movab \*12340034 <_GLOBAL_OFFSET_TABLE_\+0x10>,r0 ++12340002: 9e ff 2c 00 movab \*12340034 <.*>,r0 + 12340006: 00 00 50 + 12340009: 9e ef 0c 00 movab 1234001b ,r0 + 1234000d: 00 00 50 +diff --git a/ld/testsuite/ld-vax-elf/plt-local-lib.dd b/ld/testsuite/ld-vax-elf/plt-local-lib.dd +index 95e8176..3c1268c 100644 +--- a/ld/testsuite/ld-vax-elf/plt-local-lib.dd ++++ b/ld/testsuite/ld-vax-elf/plt-local-lib.dd +@@ -2,7 +2,7 @@ + + Disassembly of section \.plt: + +-00001000 : ++00001000 <.plt>: + 1000: dd ef 76 20 pushl 307c <_GLOBAL_OFFSET_TABLE_\+0x4> + 1004: 00 00 + 1006: 17 ff 74 20 jmp \*3080 <_GLOBAL_OFFSET_TABLE_\+0x8> +@@ -10,25 +10,25 @@ Disassembly of section \.plt: + + 0000100c : + 100c: fc 0f \.word 0x0ffc # Entry mask: < r11 r10 r9 r8 r7 r6 r5 r4 r3 r2 > +- 100e: 16 ef ec ff jsb 1000 ++ 100e: 16 ef ec ff jsb 1000 <.plt> + 1012: ff ff + 1014: 00 00 00 00 \.long 0x00000000 + + 00001018 : + 1018: fc 0f \.word 0x0ffc # Entry mask: < r11 r10 r9 r8 r7 r6 r5 r4 r3 r2 > +- 101a: 16 ef e0 ff jsb 1000 ++ 101a: 16 ef e0 ff jsb 1000 <.plt> + 101e: ff ff + 1020: 0c 00 00 00 \.long 0x0000000c + + 00001024 : + 1024: fc 0f \.word 0x0ffc # Entry mask: < r11 r10 r9 r8 r7 r6 r5 r4 r3 r2 > +- 1026: 16 ef d4 ff jsb 1000 ++ 1026: 16 ef d4 ff jsb 1000 <.plt> + 102a: ff ff + 102c: 18 00 00 00 \.long 0x00000018 + + 00001030 : + 1030: fc 0f \.word 0x0ffc # Entry mask: < r11 r10 r9 r8 r7 r6 r5 r4 r3 r2 > +- 1032: 16 ef c8 ff jsb 1000 ++ 1032: 16 ef c8 ff jsb 1000 <.plt> + 1036: ff ff + 1038: 24 00 00 00 \.long 0x00000024 + +@@ -36,56 +36,56 @@ Disassembly of section \.text: + + 00002000 : + 2000: 00 00 \.word 0x0000 # Entry mask: < > +- 2002: fb 00 ff 7f calls \$0x0,\*3088 <_GLOBAL_OFFSET_TABLE_\+0x10> ++ 2002: fb 00 ff 7f calls \$0x0,\*3088 <.*> + 2006: 10 00 00 +- 2009: fb 00 ff 80 calls \$0x0,\*3090 <_GLOBAL_OFFSET_TABLE_\+0x18> ++ 2009: fb 00 ff 80 calls \$0x0,\*3090 <.*> + 200d: 10 00 00 +- 2010: fb 00 ff 6d calls \$0x0,\*3084 <_GLOBAL_OFFSET_TABLE_\+0xc> ++ 2010: fb 00 ff 6d calls \$0x0,\*3084 <.*> + 2014: 10 00 00 + 2017: fb 00 ef 2e calls \$0x0,204c + 201b: 00 00 00 +- 201e: fb 00 ff 67 calls \$0x0,\*308c <_GLOBAL_OFFSET_TABLE_\+0x14> ++ 201e: fb 00 ff 67 calls \$0x0,\*308c <.*> + 2022: 10 00 00 + 2025: 04 ret + + 00002026 : + 2026: 00 00 \.word 0x0000 # Entry mask: < > +- 2028: fb 00 ff 59 calls \$0x0,\*3088 <_GLOBAL_OFFSET_TABLE_\+0x10> ++ 2028: fb 00 ff 59 calls \$0x0,\*3088 <.*> + 202c: 10 00 00 +- 202f: fb 00 ff 5a calls \$0x0,\*3090 <_GLOBAL_OFFSET_TABLE_\+0x18> ++ 202f: fb 00 ff 5a calls \$0x0,\*3090 <.*> + 2033: 10 00 00 +- 2036: fb 00 ff 47 calls \$0x0,\*3084 <_GLOBAL_OFFSET_TABLE_\+0xc> ++ 2036: fb 00 ff 47 calls \$0x0,\*3084 <.*> + 203a: 10 00 00 + 203d: fb 00 ef 08 calls \$0x0,204c + 2041: 00 00 00 +- 2044: fb 00 ff 41 calls \$0x0,\*308c <_GLOBAL_OFFSET_TABLE_\+0x14> ++ 2044: fb 00 ff 41 calls \$0x0,\*308c <.*> + 2048: 10 00 00 + 204b: 04 ret + + 0000204c : + 204c: 00 00 \.word 0x0000 # Entry mask: < > +- 204e: fb 00 ff 33 calls \$0x0,\*3088 <_GLOBAL_OFFSET_TABLE_\+0x10> ++ 204e: fb 00 ff 33 calls \$0x0,\*3088 <.*> + 2052: 10 00 00 +- 2055: fb 00 ff 34 calls \$0x0,\*3090 <_GLOBAL_OFFSET_TABLE_\+0x18> ++ 2055: fb 00 ff 34 calls \$0x0,\*3090 <.*> + 2059: 10 00 00 +- 205c: fb 00 ff 21 calls \$0x0,\*3084 <_GLOBAL_OFFSET_TABLE_\+0xc> ++ 205c: fb 00 ff 21 calls \$0x0,\*3084 <.*> + 2060: 10 00 00 + 2063: fb 00 ef e2 calls \$0x0,204c + 2067: ff ff ff +- 206a: fb 00 ff 1b calls \$0x0,\*308c <_GLOBAL_OFFSET_TABLE_\+0x14> ++ 206a: fb 00 ff 1b calls \$0x0,\*308c <.*> + 206e: 10 00 00 + 2071: 04 ret + + 00002072 : + 2072: 00 00 \.word 0x0000 # Entry mask: < > +- 2074: fb 00 ff 0d calls \$0x0,\*3088 <_GLOBAL_OFFSET_TABLE_\+0x10> ++ 2074: fb 00 ff 0d calls \$0x0,\*3088 <.*> + 2078: 10 00 00 +- 207b: fb 00 ff 0e calls \$0x0,\*3090 <_GLOBAL_OFFSET_TABLE_\+0x18> ++ 207b: fb 00 ff 0e calls \$0x0,\*3090 <.*> + 207f: 10 00 00 +- 2082: fb 00 ff fb calls \$0x0,\*3084 <_GLOBAL_OFFSET_TABLE_\+0xc> ++ 2082: fb 00 ff fb calls \$0x0,\*3084 <.*> + 2086: 0f 00 00 + 2089: fb 00 ef bc calls \$0x0,204c + 208d: ff ff ff +- 2090: fb 00 ff f5 calls \$0x0,\*308c <_GLOBAL_OFFSET_TABLE_\+0x14> ++ 2090: fb 00 ff f5 calls \$0x0,\*308c <.*> + 2094: 0f 00 00 + 2097: 04 ret +diff --git a/ld/testsuite/ld-vax-elf/plt-local.dd b/ld/testsuite/ld-vax-elf/plt-local.dd +index 84eca55..94fbadd 100644 +--- a/ld/testsuite/ld-vax-elf/plt-local.dd ++++ b/ld/testsuite/ld-vax-elf/plt-local.dd +@@ -2,7 +2,7 @@ + + Disassembly of section \.plt: + +-00001000 : ++00001000 <.plt>: + 1000: dd ef 86 20 pushl 308c <_GLOBAL_OFFSET_TABLE_\+0x4> + 1004: 00 00 + 1006: 17 ff 84 20 jmp \*3090 <_GLOBAL_OFFSET_TABLE_\+0x8> +@@ -10,7 +10,7 @@ Disassembly of section \.plt: + + 0000100c : + 100c: fc 0f \.word 0x0ffc # Entry mask: < r11 r10 r9 r8 r7 r6 r5 r4 r3 r2 > +- 100e: 16 ef ec ff jsb 1000 ++ 100e: 16 ef ec ff jsb 1000 <.plt> + 1012: ff ff + 1014: 00 00 00 00 \.long 0x00000000 + +@@ -18,7 +18,7 @@ Disassembly of section \.text: + + 00002000 : + 2000: 00 00 \.word 0x0000 # Entry mask: < > +- 2002: fb 00 ff 8b calls \$0x0,\*3094 <_GLOBAL_OFFSET_TABLE_\+0xc> ++ 2002: fb 00 ff 8b calls \$0x0,\*3094 + 2006: 10 00 00 + 2009: fb 00 ef 3c calls \$0x0,204c + 200d: 00 00 00 +@@ -32,7 +32,7 @@ Disassembly of section \.text: + + 00002026 : + 2026: 00 00 \.word 0x0000 # Entry mask: < > +- 2028: fb 00 ff 65 calls \$0x0,\*3094 <_GLOBAL_OFFSET_TABLE_\+0xc> ++ 2028: fb 00 ff 65 calls \$0x0,\*3094 + 202c: 10 00 00 + 202f: fb 00 ef 16 calls \$0x0,204c + 2033: 00 00 00 +@@ -46,7 +46,7 @@ Disassembly of section \.text: + + 0000204c : + 204c: 00 00 \.word 0x0000 # Entry mask: < > +- 204e: fb 00 ff 3f calls \$0x0,\*3094 <_GLOBAL_OFFSET_TABLE_\+0xc> ++ 204e: fb 00 ff 3f calls \$0x0,\*3094 + 2052: 10 00 00 + 2055: fb 00 ef f0 calls \$0x0,204c + 2059: ff ff ff +@@ -60,7 +60,7 @@ Disassembly of section \.text: + + 00002072 : + 2072: 00 00 \.word 0x0000 # Entry mask: < > +- 2074: fb 00 ff 19 calls \$0x0,\*3094 <_GLOBAL_OFFSET_TABLE_\+0xc> ++ 2074: fb 00 ff 19 calls \$0x0,\*3094 + 2078: 10 00 00 + 207b: fb 00 ef ca calls \$0x0,204c + 207f: ff ff ff +diff --git a/ld/testsuite/ld-x86-64/bnd-ifunc-2.d b/ld/testsuite/ld-x86-64/bnd-ifunc-2.d +index 61750c9..306a17d 100644 +--- a/ld/testsuite/ld-x86-64/bnd-ifunc-2.d ++++ b/ld/testsuite/ld-x86-64/bnd-ifunc-2.d +@@ -8,16 +8,16 @@ + [ ]*[a-f0-9]+: f2 ff 25 7b 01 20 00 bnd jmpq \*0x20017b\(%rip\) # 200438 <_GLOBAL_OFFSET_TABLE_\+0x10> + [ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\) + [ ]*[a-f0-9]+: 68 03 00 00 00 pushq \$0x3 +-[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmpq 2b0 <\*ABS\*\+0x32c@plt-0x50> ++[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmpq 2b0 <.*> + [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) + [ ]*[a-f0-9]+: 68 00 00 00 00 pushq \$0x0 +-[ ]*[a-f0-9]+: f2 e9 d5 ff ff ff bnd jmpq 2b0 <\*ABS\*\+0x32c@plt-0x50> ++[ ]*[a-f0-9]+: f2 e9 d5 ff ff ff bnd jmpq 2b0 <.*> + [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) + [ ]*[a-f0-9]+: 68 01 00 00 00 pushq \$0x1 +-[ ]*[a-f0-9]+: f2 e9 c5 ff ff ff bnd jmpq 2b0 <\*ABS\*\+0x32c@plt-0x50> ++[ ]*[a-f0-9]+: f2 e9 c5 ff ff ff bnd jmpq 2b0 <.*> + [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) + [ ]*[a-f0-9]+: 68 02 00 00 00 pushq \$0x2 +-[ ]*[a-f0-9]+: f2 e9 b5 ff ff ff bnd jmpq 2b0 <\*ABS\*\+0x32c@plt-0x50> ++[ ]*[a-f0-9]+: f2 e9 b5 ff ff ff bnd jmpq 2b0 <.*> + [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) + + Disassembly of section .plt.bnd: +@@ -27,11 +27,11 @@ Disassembly of section .plt.bnd: + [ ]*[a-f0-9]+: 90 nop + + 0+308 : +-[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmpq \*0x200139\(%rip\) # 200448 <_GLOBAL_OFFSET_TABLE_\+0x20> ++[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmpq \*0x200139\(%rip\) # 200448 + [ ]*[a-f0-9]+: 90 nop + + 0+310 : +-[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmpq \*0x200139\(%rip\) # 200450 <_GLOBAL_OFFSET_TABLE_\+0x28> ++[ ]*[a-f0-9]+: f2 ff 25 39 01 20 00 bnd jmpq \*0x200139\(%rip\) # 200450 + [ ]*[a-f0-9]+: 90 nop + + 0+318 <\*ABS\*\+0x320@plt>: +diff --git a/ld/testsuite/ld-x86-64/bnd-plt-1.d b/ld/testsuite/ld-x86-64/bnd-plt-1.d +index 1c1f2d3..6bd50b2 100644 +--- a/ld/testsuite/ld-x86-64/bnd-plt-1.d ++++ b/ld/testsuite/ld-x86-64/bnd-plt-1.d +@@ -13,34 +13,34 @@ Disassembly of section .plt: + [ ]*[a-f0-9]+: f2 ff 25 83 01 20 00 bnd jmpq \*0x200183\(%rip\) # 200420 <_GLOBAL_OFFSET_TABLE_\+0x10> + [ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\) + [ ]*[a-f0-9]+: 68 00 00 00 00 pushq \$0x0 +-[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmpq 290 ++[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmpq 290 <.*> + [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) + [ ]*[a-f0-9]+: 68 01 00 00 00 pushq \$0x1 +-[ ]*[a-f0-9]+: f2 e9 d5 ff ff ff bnd jmpq 290 ++[ ]*[a-f0-9]+: f2 e9 d5 ff ff ff bnd jmpq 290 <.*> + [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) + [ ]*[a-f0-9]+: 68 02 00 00 00 pushq \$0x2 +-[ ]*[a-f0-9]+: f2 e9 c5 ff ff ff bnd jmpq 290 ++[ ]*[a-f0-9]+: f2 e9 c5 ff ff ff bnd jmpq 290 <.*> + [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) + [ ]*[a-f0-9]+: 68 03 00 00 00 pushq \$0x3 +-[ ]*[a-f0-9]+: f2 e9 b5 ff ff ff bnd jmpq 290 ++[ ]*[a-f0-9]+: f2 e9 b5 ff ff ff bnd jmpq 290 <.*> + [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) + + Disassembly of section .plt.bnd: + + 0+2e0 : +-[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200428 <_GLOBAL_OFFSET_TABLE_\+0x18> ++[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200428 + [ ]*[a-f0-9]+: 90 nop + + 0+2e8 : +-[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200430 <_GLOBAL_OFFSET_TABLE_\+0x20> ++[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200430 + [ ]*[a-f0-9]+: 90 nop + + 0+2f0 : +-[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200438 <_GLOBAL_OFFSET_TABLE_\+0x28> ++[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200438 + [ ]*[a-f0-9]+: 90 nop + + 0+2f8 : +-[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200440 <_GLOBAL_OFFSET_TABLE_\+0x30> ++[ ]*[a-f0-9]+: f2 ff 25 41 01 20 00 bnd jmpq \*0x200141\(%rip\) # 200440 + [ ]*[a-f0-9]+: 90 nop + + Disassembly of section .text: +diff --git a/ld/testsuite/ld-x86-64/gotpcrel1.dd b/ld/testsuite/ld-x86-64/gotpcrel1.dd +index 46321db..58450bd 100644 +--- a/ld/testsuite/ld-x86-64/gotpcrel1.dd ++++ b/ld/testsuite/ld-x86-64/gotpcrel1.dd +@@ -2,13 +2,13 @@ + [a-f0-9]+
: + [ ]*[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp + [ ]*[a-f0-9]+: [ a-f0-9]+ addr32 callq [a-f0-9]+ +-[ ]*[a-f0-9]+: [ a-f0-9]+ callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: [ a-f0-9]+ callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: [ a-f0-9]+ callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: [ a-f0-9]+ callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> + [ ]*[a-f0-9]+: [ a-f0-9]+ (rex mov|mov ) \$0x[a-f0-9]+,%(r|e)ax + [ ]*[a-f0-9]+: ff d0 callq \*%rax +-[ ]*[a-f0-9]+: [ a-f0-9]+ mov 0x[a-f0-9]+\(%rip\),%rcx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: [ a-f0-9]+ mov 0x[a-f0-9]+\(%rip\),%rcx # [a-f0-9]+ <.*> + [ ]*[a-f0-9]+: ff d1 callq \*%rcx +-[ ]*[a-f0-9]+: [ a-f0-9]+ mov 0x[a-f0-9]+\(%rip\),%rdx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: [ a-f0-9]+ mov 0x[a-f0-9]+\(%rip\),%rdx # [a-f0-9]+ <.*> + [ ]*[a-f0-9]+: ff d2 callq \*%rdx + [ ]*[a-f0-9]+: 31 ff xor %edi,%edi + [ ]*[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp +diff --git a/ld/testsuite/ld-x86-64/libno-plt-1b.dd b/ld/testsuite/ld-x86-64/libno-plt-1b.dd +index 2892ce4..93d8a7b 100644 +--- a/ld/testsuite/ld-x86-64/libno-plt-1b.dd ++++ b/ld/testsuite/ld-x86-64/libno-plt-1b.dd +@@ -7,9 +7,9 @@ Disassembly of section .text: + + #... + [0-9a-f]+ : +- +[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + +[a-f0-9]+: c3 retq + #... + [0-9a-f]+ : +- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/load1c-nacl.d b/ld/testsuite/ld-x86-64/load1c-nacl.d +index be90480..57bc2c2 100644 +--- a/ld/testsuite/ld-x86-64/load1c-nacl.d ++++ b/ld/testsuite/ld-x86-64/load1c-nacl.d +@@ -9,40 +9,40 @@ + Disassembly of section .text: + + 0+ <_start>: +-[ ]*[a-f0-9]+: 13 05 0a 03 01 10 adc 0x1001030a\(%rip\),%eax # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 03 1d 04 03 01 10 add 0x10010304\(%rip\),%ebx # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 23 0d fe 02 01 10 and 0x100102fe\(%rip\),%ecx # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 3b 15 f8 02 01 10 cmp 0x100102f8\(%rip\),%edx # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 0b 35 f2 02 01 10 or 0x100102f2\(%rip\),%esi # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 1b 3d ec 02 01 10 sbb 0x100102ec\(%rip\),%edi # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 2b 2d e6 02 01 10 sub 0x100102e6\(%rip\),%ebp # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 44 33 05 df 02 01 10 xor 0x100102df\(%rip\),%r8d # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 44 85 3d d8 02 01 10 test %r15d,0x100102d8\(%rip\) # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 13 05 d1 02 01 10 adc 0x100102d1\(%rip\),%rax # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 03 1d ca 02 01 10 add 0x100102ca\(%rip\),%rbx # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 23 0d c3 02 01 10 and 0x100102c3\(%rip\),%rcx # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 3b 15 bc 02 01 10 cmp 0x100102bc\(%rip\),%rdx # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 0b 3d b5 02 01 10 or 0x100102b5\(%rip\),%rdi # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 1b 35 ae 02 01 10 sbb 0x100102ae\(%rip\),%rsi # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 2b 2d a7 02 01 10 sub 0x100102a7\(%rip\),%rbp # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 4c 33 05 a0 02 01 10 xor 0x100102a0\(%rip\),%r8 # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 4c 85 3d 99 02 01 10 test %r15,0x10010299\(%rip\) # 10010310 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 13 05 9b 02 01 10 adc 0x1001029b\(%rip\),%eax # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 03 1d 95 02 01 10 add 0x10010295\(%rip\),%ebx # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 23 0d 8f 02 01 10 and 0x1001028f\(%rip\),%ecx # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 3b 15 89 02 01 10 cmp 0x10010289\(%rip\),%edx # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 0b 35 83 02 01 10 or 0x10010283\(%rip\),%esi # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 1b 3d 7d 02 01 10 sbb 0x1001027d\(%rip\),%edi # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 2b 2d 77 02 01 10 sub 0x10010277\(%rip\),%ebp # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 44 33 05 70 02 01 10 xor 0x10010270\(%rip\),%r8d # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 44 85 3d 69 02 01 10 test %r15d,0x10010269\(%rip\) # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 13 05 62 02 01 10 adc 0x10010262\(%rip\),%rax # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 03 1d 5b 02 01 10 add 0x1001025b\(%rip\),%rbx # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 23 0d 54 02 01 10 and 0x10010254\(%rip\),%rcx # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 3b 15 4d 02 01 10 cmp 0x1001024d\(%rip\),%rdx # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 0b 3d 46 02 01 10 or 0x10010246\(%rip\),%rdi # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 1b 35 3f 02 01 10 sbb 0x1001023f\(%rip\),%rsi # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 2b 2d 38 02 01 10 sub 0x10010238\(%rip\),%rbp # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 4c 33 05 31 02 01 10 xor 0x10010231\(%rip\),%r8 # 10010318 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 4c 85 3d 2a 02 01 10 test %r15,0x1001022a\(%rip\) # 10010318 <_DYNAMIC\+0xe8> ++[ ]*[a-f0-9]+: 13 05 0a 03 01 10 adc 0x1001030a\(%rip\),%eax # 10010310 <.*> ++[ ]*[a-f0-9]+: 03 1d 04 03 01 10 add 0x10010304\(%rip\),%ebx # 10010310 <.*> ++[ ]*[a-f0-9]+: 23 0d fe 02 01 10 and 0x100102fe\(%rip\),%ecx # 10010310 <.*> ++[ ]*[a-f0-9]+: 3b 15 f8 02 01 10 cmp 0x100102f8\(%rip\),%edx # 10010310 <.*> ++[ ]*[a-f0-9]+: 0b 35 f2 02 01 10 or 0x100102f2\(%rip\),%esi # 10010310 <.*> ++[ ]*[a-f0-9]+: 1b 3d ec 02 01 10 sbb 0x100102ec\(%rip\),%edi # 10010310 <.*> ++[ ]*[a-f0-9]+: 2b 2d e6 02 01 10 sub 0x100102e6\(%rip\),%ebp # 10010310 <.*> ++[ ]*[a-f0-9]+: 44 33 05 df 02 01 10 xor 0x100102df\(%rip\),%r8d # 10010310 <.*> ++[ ]*[a-f0-9]+: 44 85 3d d8 02 01 10 test %r15d,0x100102d8\(%rip\) # 10010310 <.*> ++[ ]*[a-f0-9]+: 48 13 05 d1 02 01 10 adc 0x100102d1\(%rip\),%rax # 10010310 <.*> ++[ ]*[a-f0-9]+: 48 03 1d ca 02 01 10 add 0x100102ca\(%rip\),%rbx # 10010310 <.*> ++[ ]*[a-f0-9]+: 48 23 0d c3 02 01 10 and 0x100102c3\(%rip\),%rcx # 10010310 <.*> ++[ ]*[a-f0-9]+: 48 3b 15 bc 02 01 10 cmp 0x100102bc\(%rip\),%rdx # 10010310 <.*> ++[ ]*[a-f0-9]+: 48 0b 3d b5 02 01 10 or 0x100102b5\(%rip\),%rdi # 10010310 <.*> ++[ ]*[a-f0-9]+: 48 1b 35 ae 02 01 10 sbb 0x100102ae\(%rip\),%rsi # 10010310 <.*> ++[ ]*[a-f0-9]+: 48 2b 2d a7 02 01 10 sub 0x100102a7\(%rip\),%rbp # 10010310 <.*> ++[ ]*[a-f0-9]+: 4c 33 05 a0 02 01 10 xor 0x100102a0\(%rip\),%r8 # 10010310 <.*> ++[ ]*[a-f0-9]+: 4c 85 3d 99 02 01 10 test %r15,0x10010299\(%rip\) # 10010310 <.*> ++[ ]*[a-f0-9]+: 13 05 9b 02 01 10 adc 0x1001029b\(%rip\),%eax # 10010318 <.*> ++[ ]*[a-f0-9]+: 03 1d 95 02 01 10 add 0x10010295\(%rip\),%ebx # 10010318 <.*> ++[ ]*[a-f0-9]+: 23 0d 8f 02 01 10 and 0x1001028f\(%rip\),%ecx # 10010318 <.*> ++[ ]*[a-f0-9]+: 3b 15 89 02 01 10 cmp 0x10010289\(%rip\),%edx # 10010318 <.*> ++[ ]*[a-f0-9]+: 0b 35 83 02 01 10 or 0x10010283\(%rip\),%esi # 10010318 <.*> ++[ ]*[a-f0-9]+: 1b 3d 7d 02 01 10 sbb 0x1001027d\(%rip\),%edi # 10010318 <.*> ++[ ]*[a-f0-9]+: 2b 2d 77 02 01 10 sub 0x10010277\(%rip\),%ebp # 10010318 <.*> ++[ ]*[a-f0-9]+: 44 33 05 70 02 01 10 xor 0x10010270\(%rip\),%r8d # 10010318 <.*> ++[ ]*[a-f0-9]+: 44 85 3d 69 02 01 10 test %r15d,0x10010269\(%rip\) # 10010318 <.*> ++[ ]*[a-f0-9]+: 48 13 05 62 02 01 10 adc 0x10010262\(%rip\),%rax # 10010318 <.*> ++[ ]*[a-f0-9]+: 48 03 1d 5b 02 01 10 add 0x1001025b\(%rip\),%rbx # 10010318 <.*> ++[ ]*[a-f0-9]+: 48 23 0d 54 02 01 10 and 0x10010254\(%rip\),%rcx # 10010318 <.*> ++[ ]*[a-f0-9]+: 48 3b 15 4d 02 01 10 cmp 0x1001024d\(%rip\),%rdx # 10010318 <.*> ++[ ]*[a-f0-9]+: 48 0b 3d 46 02 01 10 or 0x10010246\(%rip\),%rdi # 10010318 <.*> ++[ ]*[a-f0-9]+: 48 1b 35 3f 02 01 10 sbb 0x1001023f\(%rip\),%rsi # 10010318 <.*> ++[ ]*[a-f0-9]+: 48 2b 2d 38 02 01 10 sub 0x10010238\(%rip\),%rbp # 10010318 <.*> ++[ ]*[a-f0-9]+: 4c 33 05 31 02 01 10 xor 0x10010231\(%rip\),%r8 # 10010318 <.*> ++[ ]*[a-f0-9]+: 4c 85 3d 2a 02 01 10 test %r15,0x1001022a\(%rip\) # 10010318 <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/load1c.d b/ld/testsuite/ld-x86-64/load1c.d +index d4bf277..a4f7d8a 100644 +--- a/ld/testsuite/ld-x86-64/load1c.d ++++ b/ld/testsuite/ld-x86-64/load1c.d +@@ -9,40 +9,40 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: 13 05 ca 01 20 00 adc 0x2001ca\(%rip\),%eax # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 03 1d c4 01 20 00 add 0x2001c4\(%rip\),%ebx # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 23 0d be 01 20 00 and 0x2001be\(%rip\),%ecx # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 3b 15 b8 01 20 00 cmp 0x2001b8\(%rip\),%edx # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 0b 35 b2 01 20 00 or 0x2001b2\(%rip\),%esi # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 1b 3d ac 01 20 00 sbb 0x2001ac\(%rip\),%edi # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 2b 2d a6 01 20 00 sub 0x2001a6\(%rip\),%ebp # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 44 33 05 9f 01 20 00 xor 0x20019f\(%rip\),%r8d # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 44 85 3d 98 01 20 00 test %r15d,0x200198\(%rip\) # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 13 05 91 01 20 00 adc 0x200191\(%rip\),%rax # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 03 1d 8a 01 20 00 add 0x20018a\(%rip\),%rbx # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 23 0d 83 01 20 00 and 0x200183\(%rip\),%rcx # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 3b 15 7c 01 20 00 cmp 0x20017c\(%rip\),%rdx # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 0b 3d 75 01 20 00 or 0x200175\(%rip\),%rdi # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 1b 35 6e 01 20 00 sbb 0x20016e\(%rip\),%rsi # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 48 2b 2d 67 01 20 00 sub 0x200167\(%rip\),%rbp # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 4c 33 05 60 01 20 00 xor 0x200160\(%rip\),%r8 # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 4c 85 3d 59 01 20 00 test %r15,0x200159\(%rip\) # 2003c8 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: 13 05 5b 01 20 00 adc 0x20015b\(%rip\),%eax # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 03 1d 55 01 20 00 add 0x200155\(%rip\),%ebx # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 23 0d 4f 01 20 00 and 0x20014f\(%rip\),%ecx # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 3b 15 49 01 20 00 cmp 0x200149\(%rip\),%edx # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 0b 35 43 01 20 00 or 0x200143\(%rip\),%esi # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 1b 3d 3d 01 20 00 sbb 0x20013d\(%rip\),%edi # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 2b 2d 37 01 20 00 sub 0x200137\(%rip\),%ebp # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 44 33 05 30 01 20 00 xor 0x200130\(%rip\),%r8d # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 44 85 3d 29 01 20 00 test %r15d,0x200129\(%rip\) # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 13 05 22 01 20 00 adc 0x200122\(%rip\),%rax # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 03 1d 1b 01 20 00 add 0x20011b\(%rip\),%rbx # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 23 0d 14 01 20 00 and 0x200114\(%rip\),%rcx # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 3b 15 0d 01 20 00 cmp 0x20010d\(%rip\),%rdx # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 0b 3d 06 01 20 00 or 0x200106\(%rip\),%rdi # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 1b 35 ff 00 20 00 sbb 0x2000ff\(%rip\),%rsi # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 48 2b 2d f8 00 20 00 sub 0x2000f8\(%rip\),%rbp # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 4c 33 05 f1 00 20 00 xor 0x2000f1\(%rip\),%r8 # 2003d0 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: 4c 85 3d ea 00 20 00 test %r15,0x2000ea\(%rip\) # 2003d0 <_DYNAMIC\+0xe8> ++[ ]*[a-f0-9]+: 13 05 ca 01 20 00 adc 0x2001ca\(%rip\),%eax # 2003c8 <.*> ++[ ]*[a-f0-9]+: 03 1d c4 01 20 00 add 0x2001c4\(%rip\),%ebx # 2003c8 <.*> ++[ ]*[a-f0-9]+: 23 0d be 01 20 00 and 0x2001be\(%rip\),%ecx # 2003c8 <.*> ++[ ]*[a-f0-9]+: 3b 15 b8 01 20 00 cmp 0x2001b8\(%rip\),%edx # 2003c8 <.*> ++[ ]*[a-f0-9]+: 0b 35 b2 01 20 00 or 0x2001b2\(%rip\),%esi # 2003c8 <.*> ++[ ]*[a-f0-9]+: 1b 3d ac 01 20 00 sbb 0x2001ac\(%rip\),%edi # 2003c8 <.*> ++[ ]*[a-f0-9]+: 2b 2d a6 01 20 00 sub 0x2001a6\(%rip\),%ebp # 2003c8 <.*> ++[ ]*[a-f0-9]+: 44 33 05 9f 01 20 00 xor 0x20019f\(%rip\),%r8d # 2003c8 <.*> ++[ ]*[a-f0-9]+: 44 85 3d 98 01 20 00 test %r15d,0x200198\(%rip\) # 2003c8 <.*> ++[ ]*[a-f0-9]+: 48 13 05 91 01 20 00 adc 0x200191\(%rip\),%rax # 2003c8 <.*> ++[ ]*[a-f0-9]+: 48 03 1d 8a 01 20 00 add 0x20018a\(%rip\),%rbx # 2003c8 <.*> ++[ ]*[a-f0-9]+: 48 23 0d 83 01 20 00 and 0x200183\(%rip\),%rcx # 2003c8 <.*> ++[ ]*[a-f0-9]+: 48 3b 15 7c 01 20 00 cmp 0x20017c\(%rip\),%rdx # 2003c8 <.*> ++[ ]*[a-f0-9]+: 48 0b 3d 75 01 20 00 or 0x200175\(%rip\),%rdi # 2003c8 <.*> ++[ ]*[a-f0-9]+: 48 1b 35 6e 01 20 00 sbb 0x20016e\(%rip\),%rsi # 2003c8 <.*> ++[ ]*[a-f0-9]+: 48 2b 2d 67 01 20 00 sub 0x200167\(%rip\),%rbp # 2003c8 <.*> ++[ ]*[a-f0-9]+: 4c 33 05 60 01 20 00 xor 0x200160\(%rip\),%r8 # 2003c8 <.*> ++[ ]*[a-f0-9]+: 4c 85 3d 59 01 20 00 test %r15,0x200159\(%rip\) # 2003c8 <.*> ++[ ]*[a-f0-9]+: 13 05 5b 01 20 00 adc 0x20015b\(%rip\),%eax # 2003d0 <.*> ++[ ]*[a-f0-9]+: 03 1d 55 01 20 00 add 0x200155\(%rip\),%ebx # 2003d0 <.*> ++[ ]*[a-f0-9]+: 23 0d 4f 01 20 00 and 0x20014f\(%rip\),%ecx # 2003d0 <.*> ++[ ]*[a-f0-9]+: 3b 15 49 01 20 00 cmp 0x200149\(%rip\),%edx # 2003d0 <.*> ++[ ]*[a-f0-9]+: 0b 35 43 01 20 00 or 0x200143\(%rip\),%esi # 2003d0 <.*> ++[ ]*[a-f0-9]+: 1b 3d 3d 01 20 00 sbb 0x20013d\(%rip\),%edi # 2003d0 <.*> ++[ ]*[a-f0-9]+: 2b 2d 37 01 20 00 sub 0x200137\(%rip\),%ebp # 2003d0 <.*> ++[ ]*[a-f0-9]+: 44 33 05 30 01 20 00 xor 0x200130\(%rip\),%r8d # 2003d0 <.*> ++[ ]*[a-f0-9]+: 44 85 3d 29 01 20 00 test %r15d,0x200129\(%rip\) # 2003d0 <.*> ++[ ]*[a-f0-9]+: 48 13 05 22 01 20 00 adc 0x200122\(%rip\),%rax # 2003d0 <.*> ++[ ]*[a-f0-9]+: 48 03 1d 1b 01 20 00 add 0x20011b\(%rip\),%rbx # 2003d0 <.*> ++[ ]*[a-f0-9]+: 48 23 0d 14 01 20 00 and 0x200114\(%rip\),%rcx # 2003d0 <.*> ++[ ]*[a-f0-9]+: 48 3b 15 0d 01 20 00 cmp 0x20010d\(%rip\),%rdx # 2003d0 <.*> ++[ ]*[a-f0-9]+: 48 0b 3d 06 01 20 00 or 0x200106\(%rip\),%rdi # 2003d0 <.*> ++[ ]*[a-f0-9]+: 48 1b 35 ff 00 20 00 sbb 0x2000ff\(%rip\),%rsi # 2003d0 <.*> ++[ ]*[a-f0-9]+: 48 2b 2d f8 00 20 00 sub 0x2000f8\(%rip\),%rbp # 2003d0 <.*> ++[ ]*[a-f0-9]+: 4c 33 05 f1 00 20 00 xor 0x2000f1\(%rip\),%r8 # 2003d0 <.*> ++[ ]*[a-f0-9]+: 4c 85 3d ea 00 20 00 test %r15,0x2000ea\(%rip\) # 2003d0 <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/load1d-nacl.d b/ld/testsuite/ld-x86-64/load1d-nacl.d +index 3e9b144..b741917 100644 +--- a/ld/testsuite/ld-x86-64/load1d-nacl.d ++++ b/ld/testsuite/ld-x86-64/load1d-nacl.d +@@ -9,40 +9,40 @@ + Disassembly of section .text: + + 0+ <_start>: +-[ ]*[a-f0-9]+: 13 05 e2 01 01 10 adc 0x100101e2\(%rip\),%eax # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 03 1d dc 01 01 10 add 0x100101dc\(%rip\),%ebx # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 23 0d d6 01 01 10 and 0x100101d6\(%rip\),%ecx # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 3b 15 d0 01 01 10 cmp 0x100101d0\(%rip\),%edx # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 0b 35 ca 01 01 10 or 0x100101ca\(%rip\),%esi # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 1b 3d c4 01 01 10 sbb 0x100101c4\(%rip\),%edi # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 2b 2d be 01 01 10 sub 0x100101be\(%rip\),%ebp # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 44 33 05 b7 01 01 10 xor 0x100101b7\(%rip\),%r8d # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 44 85 3d b0 01 01 10 test %r15d,0x100101b0\(%rip\) # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 13 05 a9 01 01 10 adc 0x100101a9\(%rip\),%rax # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 03 1d a2 01 01 10 add 0x100101a2\(%rip\),%rbx # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 23 0d 9b 01 01 10 and 0x1001019b\(%rip\),%rcx # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 3b 15 94 01 01 10 cmp 0x10010194\(%rip\),%rdx # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 0b 3d 8d 01 01 10 or 0x1001018d\(%rip\),%rdi # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 1b 35 86 01 01 10 sbb 0x10010186\(%rip\),%rsi # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 2b 2d 7f 01 01 10 sub 0x1001017f\(%rip\),%rbp # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 4c 33 05 78 01 01 10 xor 0x10010178\(%rip\),%r8 # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 4c 85 3d 71 01 01 10 test %r15,0x10010171\(%rip\) # 100101e8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 13 05 73 01 01 10 adc 0x10010173\(%rip\),%eax # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 03 1d 6d 01 01 10 add 0x1001016d\(%rip\),%ebx # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 23 0d 67 01 01 10 and 0x10010167\(%rip\),%ecx # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 3b 15 61 01 01 10 cmp 0x10010161\(%rip\),%edx # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 0b 35 5b 01 01 10 or 0x1001015b\(%rip\),%esi # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 1b 3d 55 01 01 10 sbb 0x10010155\(%rip\),%edi # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 2b 2d 4f 01 01 10 sub 0x1001014f\(%rip\),%ebp # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 44 33 05 48 01 01 10 xor 0x10010148\(%rip\),%r8d # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 44 85 3d 41 01 01 10 test %r15d,0x10010141\(%rip\) # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 13 05 3a 01 01 10 adc 0x1001013a\(%rip\),%rax # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 03 1d 33 01 01 10 add 0x10010133\(%rip\),%rbx # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 23 0d 2c 01 01 10 and 0x1001012c\(%rip\),%rcx # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 3b 15 25 01 01 10 cmp 0x10010125\(%rip\),%rdx # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 0b 3d 1e 01 01 10 or 0x1001011e\(%rip\),%rdi # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 1b 35 17 01 01 10 sbb 0x10010117\(%rip\),%rsi # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 2b 2d 10 01 01 10 sub 0x10010110\(%rip\),%rbp # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 4c 33 05 09 01 01 10 xor 0x10010109\(%rip\),%r8 # 100101f0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 4c 85 3d 02 01 01 10 test %r15,0x10010102\(%rip\) # 100101f0 <_DYNAMIC\+0x78> ++[ ]*[a-f0-9]+: 13 05 e2 01 01 10 adc 0x100101e2\(%rip\),%eax # 100101e8 <.*> ++[ ]*[a-f0-9]+: 03 1d dc 01 01 10 add 0x100101dc\(%rip\),%ebx # 100101e8 <.*> ++[ ]*[a-f0-9]+: 23 0d d6 01 01 10 and 0x100101d6\(%rip\),%ecx # 100101e8 <.*> ++[ ]*[a-f0-9]+: 3b 15 d0 01 01 10 cmp 0x100101d0\(%rip\),%edx # 100101e8 <.*> ++[ ]*[a-f0-9]+: 0b 35 ca 01 01 10 or 0x100101ca\(%rip\),%esi # 100101e8 <.*> ++[ ]*[a-f0-9]+: 1b 3d c4 01 01 10 sbb 0x100101c4\(%rip\),%edi # 100101e8 <.*> ++[ ]*[a-f0-9]+: 2b 2d be 01 01 10 sub 0x100101be\(%rip\),%ebp # 100101e8 <.*> ++[ ]*[a-f0-9]+: 44 33 05 b7 01 01 10 xor 0x100101b7\(%rip\),%r8d # 100101e8 <.*> ++[ ]*[a-f0-9]+: 44 85 3d b0 01 01 10 test %r15d,0x100101b0\(%rip\) # 100101e8 <.*> ++[ ]*[a-f0-9]+: 48 13 05 a9 01 01 10 adc 0x100101a9\(%rip\),%rax # 100101e8 <.*> ++[ ]*[a-f0-9]+: 48 03 1d a2 01 01 10 add 0x100101a2\(%rip\),%rbx # 100101e8 <.*> ++[ ]*[a-f0-9]+: 48 23 0d 9b 01 01 10 and 0x1001019b\(%rip\),%rcx # 100101e8 <.*> ++[ ]*[a-f0-9]+: 48 3b 15 94 01 01 10 cmp 0x10010194\(%rip\),%rdx # 100101e8 <.*> ++[ ]*[a-f0-9]+: 48 0b 3d 8d 01 01 10 or 0x1001018d\(%rip\),%rdi # 100101e8 <.*> ++[ ]*[a-f0-9]+: 48 1b 35 86 01 01 10 sbb 0x10010186\(%rip\),%rsi # 100101e8 <.*> ++[ ]*[a-f0-9]+: 48 2b 2d 7f 01 01 10 sub 0x1001017f\(%rip\),%rbp # 100101e8 <.*> ++[ ]*[a-f0-9]+: 4c 33 05 78 01 01 10 xor 0x10010178\(%rip\),%r8 # 100101e8 <.*> ++[ ]*[a-f0-9]+: 4c 85 3d 71 01 01 10 test %r15,0x10010171\(%rip\) # 100101e8 <.*> ++[ ]*[a-f0-9]+: 13 05 73 01 01 10 adc 0x10010173\(%rip\),%eax # 100101f0 <.*> ++[ ]*[a-f0-9]+: 03 1d 6d 01 01 10 add 0x1001016d\(%rip\),%ebx # 100101f0 <.*> ++[ ]*[a-f0-9]+: 23 0d 67 01 01 10 and 0x10010167\(%rip\),%ecx # 100101f0 <.*> ++[ ]*[a-f0-9]+: 3b 15 61 01 01 10 cmp 0x10010161\(%rip\),%edx # 100101f0 <.*> ++[ ]*[a-f0-9]+: 0b 35 5b 01 01 10 or 0x1001015b\(%rip\),%esi # 100101f0 <.*> ++[ ]*[a-f0-9]+: 1b 3d 55 01 01 10 sbb 0x10010155\(%rip\),%edi # 100101f0 <.*> ++[ ]*[a-f0-9]+: 2b 2d 4f 01 01 10 sub 0x1001014f\(%rip\),%ebp # 100101f0 <.*> ++[ ]*[a-f0-9]+: 44 33 05 48 01 01 10 xor 0x10010148\(%rip\),%r8d # 100101f0 <.*> ++[ ]*[a-f0-9]+: 44 85 3d 41 01 01 10 test %r15d,0x10010141\(%rip\) # 100101f0 <.*> ++[ ]*[a-f0-9]+: 48 13 05 3a 01 01 10 adc 0x1001013a\(%rip\),%rax # 100101f0 <.*> ++[ ]*[a-f0-9]+: 48 03 1d 33 01 01 10 add 0x10010133\(%rip\),%rbx # 100101f0 <.*> ++[ ]*[a-f0-9]+: 48 23 0d 2c 01 01 10 and 0x1001012c\(%rip\),%rcx # 100101f0 <.*> ++[ ]*[a-f0-9]+: 48 3b 15 25 01 01 10 cmp 0x10010125\(%rip\),%rdx # 100101f0 <.*> ++[ ]*[a-f0-9]+: 48 0b 3d 1e 01 01 10 or 0x1001011e\(%rip\),%rdi # 100101f0 <.*> ++[ ]*[a-f0-9]+: 48 1b 35 17 01 01 10 sbb 0x10010117\(%rip\),%rsi # 100101f0 <.*> ++[ ]*[a-f0-9]+: 48 2b 2d 10 01 01 10 sub 0x10010110\(%rip\),%rbp # 100101f0 <.*> ++[ ]*[a-f0-9]+: 4c 33 05 09 01 01 10 xor 0x10010109\(%rip\),%r8 # 100101f0 <.*> ++[ ]*[a-f0-9]+: 4c 85 3d 02 01 01 10 test %r15,0x10010102\(%rip\) # 100101f0 <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/load1d.d b/ld/testsuite/ld-x86-64/load1d.d +index 2987048..ee1e3f0 100644 +--- a/ld/testsuite/ld-x86-64/load1d.d ++++ b/ld/testsuite/ld-x86-64/load1d.d +@@ -9,40 +9,40 @@ + Disassembly of section .text: + + 0+[a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: 13 05 5a 01 20 00 adc 0x20015a\(%rip\),%eax # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 03 1d 54 01 20 00 add 0x200154\(%rip\),%ebx # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 23 0d 4e 01 20 00 and 0x20014e\(%rip\),%ecx # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 3b 15 48 01 20 00 cmp 0x200148\(%rip\),%edx # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 0b 35 42 01 20 00 or 0x200142\(%rip\),%esi # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 1b 3d 3c 01 20 00 sbb 0x20013c\(%rip\),%edi # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 2b 2d 36 01 20 00 sub 0x200136\(%rip\),%ebp # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 44 33 05 2f 01 20 00 xor 0x20012f\(%rip\),%r8d # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 44 85 3d 28 01 20 00 test %r15d,0x200128\(%rip\) # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 13 05 21 01 20 00 adc 0x200121\(%rip\),%rax # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 03 1d 1a 01 20 00 add 0x20011a\(%rip\),%rbx # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 23 0d 13 01 20 00 and 0x200113\(%rip\),%rcx # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 3b 15 0c 01 20 00 cmp 0x20010c\(%rip\),%rdx # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 0b 3d 05 01 20 00 or 0x200105\(%rip\),%rdi # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 1b 35 fe 00 20 00 sbb 0x2000fe\(%rip\),%rsi # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 48 2b 2d f7 00 20 00 sub 0x2000f7\(%rip\),%rbp # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 4c 33 05 f0 00 20 00 xor 0x2000f0\(%rip\),%r8 # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 4c 85 3d e9 00 20 00 test %r15,0x2000e9\(%rip\) # 2002b8 <_DYNAMIC\+0x70> +-[ ]*[a-f0-9]+: 13 05 eb 00 20 00 adc 0x2000eb\(%rip\),%eax # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 03 1d e5 00 20 00 add 0x2000e5\(%rip\),%ebx # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 23 0d df 00 20 00 and 0x2000df\(%rip\),%ecx # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 3b 15 d9 00 20 00 cmp 0x2000d9\(%rip\),%edx # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 0b 35 d3 00 20 00 or 0x2000d3\(%rip\),%esi # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 1b 3d cd 00 20 00 sbb 0x2000cd\(%rip\),%edi # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 2b 2d c7 00 20 00 sub 0x2000c7\(%rip\),%ebp # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 44 33 05 c0 00 20 00 xor 0x2000c0\(%rip\),%r8d # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 44 85 3d b9 00 20 00 test %r15d,0x2000b9\(%rip\) # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 13 05 b2 00 20 00 adc 0x2000b2\(%rip\),%rax # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 03 1d ab 00 20 00 add 0x2000ab\(%rip\),%rbx # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 23 0d a4 00 20 00 and 0x2000a4\(%rip\),%rcx # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 3b 15 9d 00 20 00 cmp 0x20009d\(%rip\),%rdx # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 0b 3d 96 00 20 00 or 0x200096\(%rip\),%rdi # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 1b 35 8f 00 20 00 sbb 0x20008f\(%rip\),%rsi # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 48 2b 2d 88 00 20 00 sub 0x200088\(%rip\),%rbp # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 4c 33 05 81 00 20 00 xor 0x200081\(%rip\),%r8 # 2002c0 <_DYNAMIC\+0x78> +-[ ]*[a-f0-9]+: 4c 85 3d 7a 00 20 00 test %r15,0x20007a\(%rip\) # 2002c0 <_DYNAMIC\+0x78> ++[ ]*[a-f0-9]+: 13 05 5a 01 20 00 adc 0x20015a\(%rip\),%eax # 2002b8 <.*> ++[ ]*[a-f0-9]+: 03 1d 54 01 20 00 add 0x200154\(%rip\),%ebx # 2002b8 <.*> ++[ ]*[a-f0-9]+: 23 0d 4e 01 20 00 and 0x20014e\(%rip\),%ecx # 2002b8 <.*> ++[ ]*[a-f0-9]+: 3b 15 48 01 20 00 cmp 0x200148\(%rip\),%edx # 2002b8 <.*> ++[ ]*[a-f0-9]+: 0b 35 42 01 20 00 or 0x200142\(%rip\),%esi # 2002b8 <.*> ++[ ]*[a-f0-9]+: 1b 3d 3c 01 20 00 sbb 0x20013c\(%rip\),%edi # 2002b8 <.*> ++[ ]*[a-f0-9]+: 2b 2d 36 01 20 00 sub 0x200136\(%rip\),%ebp # 2002b8 <.*> ++[ ]*[a-f0-9]+: 44 33 05 2f 01 20 00 xor 0x20012f\(%rip\),%r8d # 2002b8 <.*> ++[ ]*[a-f0-9]+: 44 85 3d 28 01 20 00 test %r15d,0x200128\(%rip\) # 2002b8 <.*> ++[ ]*[a-f0-9]+: 48 13 05 21 01 20 00 adc 0x200121\(%rip\),%rax # 2002b8 <.*> ++[ ]*[a-f0-9]+: 48 03 1d 1a 01 20 00 add 0x20011a\(%rip\),%rbx # 2002b8 <.*> ++[ ]*[a-f0-9]+: 48 23 0d 13 01 20 00 and 0x200113\(%rip\),%rcx # 2002b8 <.*> ++[ ]*[a-f0-9]+: 48 3b 15 0c 01 20 00 cmp 0x20010c\(%rip\),%rdx # 2002b8 <.*> ++[ ]*[a-f0-9]+: 48 0b 3d 05 01 20 00 or 0x200105\(%rip\),%rdi # 2002b8 <.*> ++[ ]*[a-f0-9]+: 48 1b 35 fe 00 20 00 sbb 0x2000fe\(%rip\),%rsi # 2002b8 <.*> ++[ ]*[a-f0-9]+: 48 2b 2d f7 00 20 00 sub 0x2000f7\(%rip\),%rbp # 2002b8 <.*> ++[ ]*[a-f0-9]+: 4c 33 05 f0 00 20 00 xor 0x2000f0\(%rip\),%r8 # 2002b8 <.*> ++[ ]*[a-f0-9]+: 4c 85 3d e9 00 20 00 test %r15,0x2000e9\(%rip\) # 2002b8 <.*> ++[ ]*[a-f0-9]+: 13 05 eb 00 20 00 adc 0x2000eb\(%rip\),%eax # 2002c0 <.*> ++[ ]*[a-f0-9]+: 03 1d e5 00 20 00 add 0x2000e5\(%rip\),%ebx # 2002c0 <.*> ++[ ]*[a-f0-9]+: 23 0d df 00 20 00 and 0x2000df\(%rip\),%ecx # 2002c0 <.*> ++[ ]*[a-f0-9]+: 3b 15 d9 00 20 00 cmp 0x2000d9\(%rip\),%edx # 2002c0 <.*> ++[ ]*[a-f0-9]+: 0b 35 d3 00 20 00 or 0x2000d3\(%rip\),%esi # 2002c0 <.*> ++[ ]*[a-f0-9]+: 1b 3d cd 00 20 00 sbb 0x2000cd\(%rip\),%edi # 2002c0 <.*> ++[ ]*[a-f0-9]+: 2b 2d c7 00 20 00 sub 0x2000c7\(%rip\),%ebp # 2002c0 <.*> ++[ ]*[a-f0-9]+: 44 33 05 c0 00 20 00 xor 0x2000c0\(%rip\),%r8d # 2002c0 <.*> ++[ ]*[a-f0-9]+: 44 85 3d b9 00 20 00 test %r15d,0x2000b9\(%rip\) # 2002c0 <.*> ++[ ]*[a-f0-9]+: 48 13 05 b2 00 20 00 adc 0x2000b2\(%rip\),%rax # 2002c0 <.*> ++[ ]*[a-f0-9]+: 48 03 1d ab 00 20 00 add 0x2000ab\(%rip\),%rbx # 2002c0 <.*> ++[ ]*[a-f0-9]+: 48 23 0d a4 00 20 00 and 0x2000a4\(%rip\),%rcx # 2002c0 <.*> ++[ ]*[a-f0-9]+: 48 3b 15 9d 00 20 00 cmp 0x20009d\(%rip\),%rdx # 2002c0 <.*> ++[ ]*[a-f0-9]+: 48 0b 3d 96 00 20 00 or 0x200096\(%rip\),%rdi # 2002c0 <.*> ++[ ]*[a-f0-9]+: 48 1b 35 8f 00 20 00 sbb 0x20008f\(%rip\),%rsi # 2002c0 <.*> ++[ ]*[a-f0-9]+: 48 2b 2d 88 00 20 00 sub 0x200088\(%rip\),%rbp # 2002c0 <.*> ++[ ]*[a-f0-9]+: 4c 33 05 81 00 20 00 xor 0x200081\(%rip\),%r8 # 2002c0 <.*> ++[ ]*[a-f0-9]+: 4c 85 3d 7a 00 20 00 test %r15,0x20007a\(%rip\) # 2002c0 <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/mov1a.d b/ld/testsuite/ld-x86-64/mov1a.d +index 4ac6d7e..4c26d6f 100644 +--- a/ld/testsuite/ld-x86-64/mov1a.d ++++ b/ld/testsuite/ld-x86-64/mov1a.d +@@ -9,7 +9,7 @@ + Disassembly of section .text: + + #... +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/mov1b.d b/ld/testsuite/ld-x86-64/mov1b.d +index 7421853..51a9190 100644 +--- a/ld/testsuite/ld-x86-64/mov1b.d ++++ b/ld/testsuite/ld-x86-64/mov1b.d +@@ -9,7 +9,7 @@ + Disassembly of section .text: + + #... +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> + [ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 * mov \$0x0,%rax + [ ]*[a-f0-9]+: 48 c7 c0 00 00 00 00 * mov \$0x0,%rax + #pass +diff --git a/ld/testsuite/ld-x86-64/mov1c.d b/ld/testsuite/ld-x86-64/mov1c.d +index bb7bab1..be3337a 100644 +--- a/ld/testsuite/ld-x86-64/mov1c.d ++++ b/ld/testsuite/ld-x86-64/mov1c.d +@@ -9,7 +9,7 @@ + Disassembly of section .text: + + #... +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/mov1d.d b/ld/testsuite/ld-x86-64/mov1d.d +index 7cdab0c..720b150 100644 +--- a/ld/testsuite/ld-x86-64/mov1d.d ++++ b/ld/testsuite/ld-x86-64/mov1d.d +@@ -9,7 +9,7 @@ + Disassembly of section .text: + + #... +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> + [ ]*[a-f0-9]+: 40 c7 c0 00 00 00 00 * rex mov \$0x0,%eax + [ ]*[a-f0-9]+: 40 c7 c0 00 00 00 00 * rex mov \$0x0,%eax + #pass +diff --git a/ld/testsuite/ld-x86-64/mov2a.d b/ld/testsuite/ld-x86-64/mov2a.d +index aaf5707..09f8790 100644 +--- a/ld/testsuite/ld-x86-64/mov2a.d ++++ b/ld/testsuite/ld-x86-64/mov2a.d +@@ -9,7 +9,7 @@ + Disassembly of section .text: + + #... +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/mov2b.d b/ld/testsuite/ld-x86-64/mov2b.d +index ee1b308..41d4b95 100644 +--- a/ld/testsuite/ld-x86-64/mov2b.d ++++ b/ld/testsuite/ld-x86-64/mov2b.d +@@ -9,7 +9,7 @@ + Disassembly of section .text: + + #... +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/mov2c.d b/ld/testsuite/ld-x86-64/mov2c.d +index 8991121..766584c 100644 +--- a/ld/testsuite/ld-x86-64/mov2c.d ++++ b/ld/testsuite/ld-x86-64/mov2c.d +@@ -9,7 +9,7 @@ + Disassembly of section .text: + + #... +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/mov2d.d b/ld/testsuite/ld-x86-64/mov2d.d +index 744028e..6b93947 100644 +--- a/ld/testsuite/ld-x86-64/mov2d.d ++++ b/ld/testsuite/ld-x86-64/mov2d.d +@@ -9,7 +9,7 @@ + Disassembly of section .text: + + #... +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/mpx3.dd b/ld/testsuite/ld-x86-64/mpx3.dd +index eb529f4..d5d8049 100644 +--- a/ld/testsuite/ld-x86-64/mpx3.dd ++++ b/ld/testsuite/ld-x86-64/mpx3.dd +@@ -8,13 +8,13 @@ Disassembly of section .plt: + [ ]*[a-f0-9]+: f2 ff ([0-9a-f]{2} ){5} bnd jmpq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x10> + [ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\) + [ ]*[a-f0-9]+: 68 00 00 00 00 pushq \$0x0 +-[ ]*[a-f0-9]+: f2 e9 ([0-9a-f]{2} ){4} bnd jmpq [a-f0-9]+ ++[ ]*[a-f0-9]+: f2 e9 ([0-9a-f]{2} ){4} bnd jmpq [a-f0-9]+ <.plt> + [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) + + Disassembly of section .plt.bnd: + + 0+[a-f0-9]+ : +-[ ]*[a-f0-9]+: f2 ff ([0-9a-f]{2} ){5} bnd jmpq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_GLOBAL_OFFSET_TABLE_\+0x18> ++[ ]*[a-f0-9]+: f2 ff ([0-9a-f]{2} ){5} bnd jmpq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ + [ ]*[a-f0-9]+: 90 nop + + Disassembly of section .text: +@@ -22,7 +22,7 @@ Disassembly of section .text: + 0+[a-f0-9]+ <_start>: + [ ]*[a-f0-9]+: bf ([0-9a-f]{2} ){4} mov \$0x[a-f0-9]+,%edi + [ ]*[a-f0-9]+: f2 ff d7 bnd callq \*%rdi +-[ ]*[a-f0-9]+: 48 8b ([0-9a-f]{2} ){5} mov 0x[a-f0-9]+\(%rip\),%rdi # [a-f0-9]+ ++[ ]*[a-f0-9]+: 48 8b ([0-9a-f]{2} ){5} mov 0x[a-f0-9]+\(%rip\),%rdi # [a-f0-9]+ + [ ]*[a-f0-9]+: f2 ff d7 bnd callq \*%rdi + [ ]*[a-f0-9]+: c3 retq + #pass +diff --git a/ld/testsuite/ld-x86-64/mpx4.dd b/ld/testsuite/ld-x86-64/mpx4.dd +index 0cf0f75..1bcb13b 100644 +--- a/ld/testsuite/ld-x86-64/mpx4.dd ++++ b/ld/testsuite/ld-x86-64/mpx4.dd +@@ -8,13 +8,13 @@ Disassembly of section .plt: + [ ]*[a-f0-9]+: f2 ff 25 43 01 20 00 bnd jmpq \*0x200143\(%rip\) # 6003b0 <_GLOBAL_OFFSET_TABLE_\+0x10> + [ ]*[a-f0-9]+: 0f 1f 00 nopl \(%rax\) + [ ]*[a-f0-9]+: 68 00 00 00 00 pushq \$0x0 +-[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmpq 400260 ++[ ]*[a-f0-9]+: f2 e9 e5 ff ff ff bnd jmpq 400260 <.plt> + [ ]*[a-f0-9]+: 0f 1f 44 00 00 nopl 0x0\(%rax,%rax,1\) + + Disassembly of section .plt.bnd: + + 0+400280 : +-[ ]*[a-f0-9]+: f2 ff 25 31 01 20 00 bnd jmpq \*0x200131\(%rip\) # 6003b8 <_GLOBAL_OFFSET_TABLE_\+0x18> ++[ ]*[a-f0-9]+: f2 ff 25 31 01 20 00 bnd jmpq \*0x200131\(%rip\) # 6003b8 + [ ]*[a-f0-9]+: 90 nop + + Disassembly of section .text: +diff --git a/ld/testsuite/ld-x86-64/no-plt-1a.dd b/ld/testsuite/ld-x86-64/no-plt-1a.dd +index 7c2f5b2..a8445c7 100644 +--- a/ld/testsuite/ld-x86-64/no-plt-1a.dd ++++ b/ld/testsuite/ld-x86-64/no-plt-1a.dd +@@ -21,8 +21,8 @@ Disassembly of section .text: + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp +- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + #... + [0-9a-f]+ : + +[a-f0-9]+: 4(0|8) c7 c0 ([0-9a-f]{2} ){4}[ ]+(rex |)mov +\$0x[0-9a-f]+,%(e|r)ax +diff --git a/ld/testsuite/ld-x86-64/no-plt-1b.dd b/ld/testsuite/ld-x86-64/no-plt-1b.dd +index 13d24b8..c21e912 100644 +--- a/ld/testsuite/ld-x86-64/no-plt-1b.dd ++++ b/ld/testsuite/ld-x86-64/no-plt-1b.dd +@@ -8,19 +8,19 @@ Disassembly of section .text: + #... + [0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +- +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> ++ +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + +[a-f0-9]+: 75 34 jne [0-9a-f]+ + +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ <.*> + +[a-f0-9]+: 75 2b jne [0-9a-f]+ +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1e jne [0-9a-f]+ +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp +- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/no-plt-1c.dd b/ld/testsuite/ld-x86-64/no-plt-1c.dd +index 75287c9..b41246b 100644 +--- a/ld/testsuite/ld-x86-64/no-plt-1c.dd ++++ b/ld/testsuite/ld-x86-64/no-plt-1c.dd +@@ -8,7 +8,7 @@ Disassembly of section .text: + #... + [0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + +[a-f0-9]+: 48 81 f8 ([0-9a-f]{2} ){4}[ ]+cmp \$0x[0-9a-f]+,%rax + +[a-f0-9]+: 75 34 jne [0-9a-f]+ + +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ <.*> +@@ -16,11 +16,11 @@ Disassembly of section .text: + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1e jne [0-9a-f]+ +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp +- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/no-plt-1e.dd b/ld/testsuite/ld-x86-64/no-plt-1e.dd +index 0126abe..f3b07ab 100644 +--- a/ld/testsuite/ld-x86-64/no-plt-1e.dd ++++ b/ld/testsuite/ld-x86-64/no-plt-1e.dd +@@ -9,7 +9,7 @@ Disassembly of section .text: + [0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ +- +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + +[a-f0-9]+: 75 34 jne [0-9a-f]+ + +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ + +[a-f0-9]+: 75 2b jne [0-9a-f]+ +@@ -21,8 +21,8 @@ Disassembly of section .text: + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp +- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + #... + [0-9a-f]+ : + +[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea -0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ +diff --git a/ld/testsuite/ld-x86-64/no-plt-1f.dd b/ld/testsuite/ld-x86-64/no-plt-1f.dd +index 13d24b8..c21e912 100644 +--- a/ld/testsuite/ld-x86-64/no-plt-1f.dd ++++ b/ld/testsuite/ld-x86-64/no-plt-1f.dd +@@ -8,19 +8,19 @@ Disassembly of section .text: + #... + [0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +- +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> ++ +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + +[a-f0-9]+: 75 34 jne [0-9a-f]+ + +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ <.*> + +[a-f0-9]+: 75 2b jne [0-9a-f]+ +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1e jne [0-9a-f]+ +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp +- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/no-plt-1g.dd b/ld/testsuite/ld-x86-64/no-plt-1g.dd +index 5a3dd17..ca4eb59 100644 +--- a/ld/testsuite/ld-x86-64/no-plt-1g.dd ++++ b/ld/testsuite/ld-x86-64/no-plt-1g.dd +@@ -8,19 +8,19 @@ Disassembly of section .text: + #... + [0-9a-f]+ : + +[a-f0-9]+: 48 83 ec 08 sub \$0x8,%rsp +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +- +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> ++ +[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4}[ ]+cmp 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + +[a-f0-9]+: 75 34 jne [0-9a-f]+ + +[a-f0-9]+: 4(0|8) 39 05 ([0-9a-f]{2} ){4}[ ]+(rex |)cmp +%(e|r)ax,0x[0-9a-f]+\(%rip\) +# [a-f0-9]+ <.*> + +[a-f0-9]+: 75 2b jne [0-9a-f]+ + +[a-f0-9]+: 67 e8 ([0-9a-f]{2} ){4}[ ]+addr32 callq [0-9a-f]+ + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 1e jne [0-9a-f]+ +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + +[a-f0-9]+: 3d 78 56 34 12 cmp \$0x12345678,%eax + +[a-f0-9]+: 75 11 jne [0-9a-f]+ + +[a-f0-9]+: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[a-f0-9]+\(%rip\),%rdi +# [a-f0-9]+.* + +[a-f0-9]+: 48 83 c4 08 add \$0x8,%rsp +- +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> +- +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[a-f0-9]+: ff 25 ([0-9a-f]{2} ){4}[ ]+jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> ++ +[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4}[ ]+callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/plt-main-bnd.dd b/ld/testsuite/ld-x86-64/plt-main-bnd.dd +index 8598e30..91fc945 100644 +--- a/ld/testsuite/ld-x86-64/plt-main-bnd.dd ++++ b/ld/testsuite/ld-x86-64/plt-main-bnd.dd +@@ -2,6 +2,6 @@ + Disassembly of section .plt.got: + + [a-f0-9]+ <.plt.got>: +-[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmpq \*0x20....\(%rip\) # ...... <_DYNAMIC\+0x...> ++[ ]*[a-f0-9]+: f2 ff 25 .. .. 20 00 bnd jmpq \*0x20....\(%rip\) # ...... <.*> + [ ]*[a-f0-9]+: 90 nop + #pass +diff --git a/ld/testsuite/ld-x86-64/plt-nacl.pd b/ld/testsuite/ld-x86-64/plt-nacl.pd +index b17bf71..e0ff471 100644 +--- a/ld/testsuite/ld-x86-64/plt-nacl.pd ++++ b/ld/testsuite/ld-x86-64/plt-nacl.pd +@@ -8,7 +8,7 @@ + + Disassembly of section .plt: + +-[0-9a-f]+ : ++[0-9a-f]+ <.plt>: + +[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * pushq 0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x8> + +[0-9a-f]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[0-9a-f]+\(%rip\),%r11 +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x10> + +[0-9a-f]+: 41 83 e3 e0 and \$0xffffffe0,%r11d +@@ -33,7 +33,7 @@ Disassembly of section .plt: + +[0-9a-f]+: 0f 1f 84 00 00 00 00 * + +[0-9a-f]+: 00 * + +[0-9a-f]+: 68 00 00 00 00 pushq \$0x0 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmpq [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmpq [0-9a-f]+ <.plt> + +[0-9a-f]+: 66 66 66 66 66 66 2e data16 data16 data16 data16 data16 nopw %cs:0x0\(%rax,%rax,1\) + +[0-9a-f]+: 0f 1f 84 00 00 00 00 * + +[0-9a-f]+: 00 * +@@ -48,7 +48,7 @@ Disassembly of section .plt: + +[0-9a-f]+: 0f 1f 84 00 00 00 00 * + +[0-9a-f]+: 00 * + +[0-9a-f]+: 68 01 00 00 00 pushq \$0x1 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmpq [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmpq [0-9a-f]+ <.plt> + +[0-9a-f]+: 66 66 66 66 66 66 2e data16 data16 data16 data16 data16 nopw %cs:0x0\(%rax,%rax,1\) + +[0-9a-f]+: 0f 1f 84 00 00 00 00 * + +[0-9a-f]+: 00 * +diff --git a/ld/testsuite/ld-x86-64/plt.pd b/ld/testsuite/ld-x86-64/plt.pd +index b11cc22..b303d36 100644 +--- a/ld/testsuite/ld-x86-64/plt.pd ++++ b/ld/testsuite/ld-x86-64/plt.pd +@@ -8,17 +8,17 @@ + + Disassembly of section .plt: + +-[0-9a-f]+ : ++[0-9a-f]+ <.plt>: + +[0-9a-f]+: ff 35 ([0-9a-f]{2} ){4} * pushq 0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x8> + +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x10> + +[0-9a-f]+: 0f 1f 40 00 nopl 0x0\(%rax\) + + [0-9a-f]+ : +- +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x18> ++ +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ + +[0-9a-f]+: 68 00 00 00 00 pushq \$0x0 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmpq [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmpq [0-9a-f]+ <.plt> + + [0-9a-f]+ : +- +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x20> ++ +[0-9a-f]+: ff 25 ([0-9a-f]{2} ){4} * jmpq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ + +[0-9a-f]+: 68 01 00 00 00 pushq \$0x1 +- +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmpq [0-9a-f]+ ++ +[0-9a-f]+: e9 ([0-9a-f]{2} ){4} * jmpq [0-9a-f]+ <.plt> +diff --git a/ld/testsuite/ld-x86-64/pr18591.d b/ld/testsuite/ld-x86-64/pr18591.d +index d5c2150..af930f6 100644 +--- a/ld/testsuite/ld-x86-64/pr18591.d ++++ b/ld/testsuite/ld-x86-64/pr18591.d +@@ -8,5 +8,5 @@ + Disassembly of section .text: + + [a-f0-9]+ : +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/pr19609-1c.d b/ld/testsuite/ld-x86-64/pr19609-1c.d +index 3b1e98d..32bf67a 100644 +--- a/ld/testsuite/ld-x86-64/pr19609-1c.d ++++ b/ld/testsuite/ld-x86-64/pr19609-1c.d +@@ -9,15 +9,15 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> +diff --git a/ld/testsuite/ld-x86-64/pr19609-1e.d b/ld/testsuite/ld-x86-64/pr19609-1e.d +index dac5fef..4edc56e 100644 +--- a/ld/testsuite/ld-x86-64/pr19609-1e.d ++++ b/ld/testsuite/ld-x86-64/pr19609-1e.d +@@ -9,15 +9,15 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> +diff --git a/ld/testsuite/ld-x86-64/pr19609-1j.d b/ld/testsuite/ld-x86-64/pr19609-1j.d +index 4a36a70..c8b940a 100644 +--- a/ld/testsuite/ld-x86-64/pr19609-1j.d ++++ b/ld/testsuite/ld-x86-64/pr19609-1j.d +@@ -9,15 +9,15 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> +diff --git a/ld/testsuite/ld-x86-64/pr19609-1l.d b/ld/testsuite/ld-x86-64/pr19609-1l.d +index aedf5d8..5559399 100644 +--- a/ld/testsuite/ld-x86-64/pr19609-1l.d ++++ b/ld/testsuite/ld-x86-64/pr19609-1l.d +@@ -9,15 +9,15 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_start\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_start\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_start\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_start\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <.*> + [ ]*[a-f0-9]+: 48 8d 05 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%rax # 0 <_start-0x[a-f0-9]+> + [ ]*[a-f0-9]+: 8d 0d ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%ecx # 0 <_start-0x[a-f0-9]+> + [ ]*[a-f0-9]+: 4c 8d 1d ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%r11 # 0 <_start-0x[a-f0-9]+> + [ ]*[a-f0-9]+: 44 8d 25 ([0-9a-f]{2} ){4} * lea -0x[a-f0-9]+\(%rip\),%r12d # 0 <_start-0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_start\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_start\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_start\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_start\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> +diff --git a/ld/testsuite/ld-x86-64/pr19609-1m.d b/ld/testsuite/ld-x86-64/pr19609-1m.d +index 8e80cbb..c6831d8 100644 +--- a/ld/testsuite/ld-x86-64/pr19609-1m.d ++++ b/ld/testsuite/ld-x86-64/pr19609-1m.d +@@ -9,15 +9,15 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> +-[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 3b 05 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 3b 0d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 3b 1d ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 3b 25 ([0-9a-f]{2} ){4} * cmp 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 8b 0d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%ecx # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 8b 1d ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r11 # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 8b 25 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%r12d # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 48 85 05 ([0-9a-f]{2} ){4} * test %rax,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 85 0d ([0-9a-f]{2} ){4} * test %ecx,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 4c 85 1d ([0-9a-f]{2} ){4} * test %r11,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> ++[ ]*[a-f0-9]+: 44 85 25 ([0-9a-f]{2} ){4} * test %r12d,0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> +diff --git a/ld/testsuite/ld-x86-64/pr19609-5b.d b/ld/testsuite/ld-x86-64/pr19609-5b.d +index 4183d56..257fa63 100644 +--- a/ld/testsuite/ld-x86-64/pr19609-5b.d ++++ b/ld/testsuite/ld-x86-64/pr19609-5b.d +@@ -9,4 +9,4 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> +diff --git a/ld/testsuite/ld-x86-64/pr19609-5c.d b/ld/testsuite/ld-x86-64/pr19609-5c.d +index 4eaeb2b..1de68b4 100644 +--- a/ld/testsuite/ld-x86-64/pr19609-5c.d ++++ b/ld/testsuite/ld-x86-64/pr19609-5c.d +@@ -9,4 +9,4 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*0x[a-f0-9]+\(%rip\) # [a-f0-9]+ +diff --git a/ld/testsuite/ld-x86-64/pr19609-5e.d b/ld/testsuite/ld-x86-64/pr19609-5e.d +index b6b6c65..90bdb3d 100644 +--- a/ld/testsuite/ld-x86-64/pr19609-5e.d ++++ b/ld/testsuite/ld-x86-64/pr19609-5e.d +@@ -9,4 +9,4 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*-?0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <[0-9a-zA-Z_]+[\+\-]+0x[a-f0-9]+> ++[ ]+[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*-?0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*> +diff --git a/ld/testsuite/ld-x86-64/pr19609-6b.d b/ld/testsuite/ld-x86-64/pr19609-6b.d +index 64e1f5b..810023b 100644 +--- a/ld/testsuite/ld-x86-64/pr19609-6b.d ++++ b/ld/testsuite/ld-x86-64/pr19609-6b.d +@@ -9,5 +9,5 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_start\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.got> + #pass +diff --git a/ld/testsuite/ld-x86-64/pr19609-7b.d b/ld/testsuite/ld-x86-64/pr19609-7b.d +index 2e8fd35..898a5df 100644 +--- a/ld/testsuite/ld-x86-64/pr19609-7b.d ++++ b/ld/testsuite/ld-x86-64/pr19609-7b.d +@@ -9,5 +9,5 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*-?0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*0x[a-f0-9]+> ++[ ]*[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*-?0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.got> + #pass +diff --git a/ld/testsuite/ld-x86-64/pr19609-7d.d b/ld/testsuite/ld-x86-64/pr19609-7d.d +index ba28828..476cafa 100644 +--- a/ld/testsuite/ld-x86-64/pr19609-7d.d ++++ b/ld/testsuite/ld-x86-64/pr19609-7d.d +@@ -9,5 +9,5 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*-?0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.*0x[a-f0-9]+> ++[ ]*[a-f0-9]+: ff 15 ([0-9a-f]{2} ){4} * callq \*-?0x[a-f0-9]+\(%rip\) # [a-f0-9]+ <.got> + #pass +diff --git a/ld/testsuite/ld-x86-64/pr19636-2d.d b/ld/testsuite/ld-x86-64/pr19636-2d.d +index ff25ec1..4f5c1f0 100644 +--- a/ld/testsuite/ld-x86-64/pr19636-2d.d ++++ b/ld/testsuite/ld-x86-64/pr19636-2d.d +@@ -20,6 +20,6 @@ Disassembly of section .plt: + Disassembly of section .text: + + 0+140 <_start>: +-[ ]*[a-f0-9]+: 48 3b 05 f1 00 20 00 cmp 0x2000f1\(%rip\),%rax # 200238 <_DYNAMIC\+0xe0> +-[ ]*[a-f0-9]+: ff 25 f3 00 20 00 jmpq \*0x2000f3\(%rip\) # 200240 <_DYNAMIC\+0xe8> +-[ ]*[a-f0-9]+: e8 de ff ff ff callq 130 <_start-0x10> ++[ ]*[a-f0-9]+: 48 3b 05 f1 00 20 00 cmp 0x2000f1\(%rip\),%rax # 200238 <.*> ++[ ]*[a-f0-9]+: ff 25 f3 00 20 00 jmpq \*0x2000f3\(%rip\) # 200240 <.*> ++[ ]*[a-f0-9]+: e8 de ff ff ff callq 130 <.*> +diff --git a/ld/testsuite/ld-x86-64/pr20093-1.d b/ld/testsuite/ld-x86-64/pr20093-1.d +index de81443..90bb3ab 100644 +--- a/ld/testsuite/ld-x86-64/pr20093-1.d ++++ b/ld/testsuite/ld-x86-64/pr20093-1.d +@@ -8,4 +8,4 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> +diff --git a/ld/testsuite/ld-x86-64/pr20093-2.d b/ld/testsuite/ld-x86-64/pr20093-2.d +index de81443..90bb3ab 100644 +--- a/ld/testsuite/ld-x86-64/pr20093-2.d ++++ b/ld/testsuite/ld-x86-64/pr20093-2.d +@@ -8,4 +8,4 @@ + Disassembly of section .text: + + [a-f0-9]+ <_start>: +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> +diff --git a/ld/testsuite/ld-x86-64/pr20253-1b.d b/ld/testsuite/ld-x86-64/pr20253-1b.d +index 247e042..d68dd46 100644 +--- a/ld/testsuite/ld-x86-64/pr20253-1b.d ++++ b/ld/testsuite/ld-x86-64/pr20253-1b.d +@@ -16,10 +16,10 @@ Disassembly of section .text: + +[a-f0-9]+: c3 retq + + 0+4000e2 <_start>: +- +[a-f0-9]+: ff 15 28 00 20 00 callq \*0x200028\(%rip\) # 600110 <_start\+0x20002e> +- +[a-f0-9]+: ff 25 2a 00 20 00 jmpq \*0x20002a\(%rip\) # 600118 <_start\+0x200036> +- +[a-f0-9]+: 48 c7 05 1f 00 20 00 00 00 00 00 movq \$0x0,0x20001f\(%rip\) # 600118 <_start\+0x200036> +- +[a-f0-9]+: 48 83 3d 0f 00 20 00 00 cmpq \$0x0,0x20000f\(%rip\) # 600110 <_start\+0x20002e> +- +[a-f0-9]+: 48 3b 0d 08 00 20 00 cmp 0x200008\(%rip\),%rcx # 600110 <_start\+0x20002e> +- +[a-f0-9]+: 48 3b 0d 09 00 20 00 cmp 0x200009\(%rip\),%rcx # 600118 <_start\+0x200036> ++ +[a-f0-9]+: ff 15 28 00 20 00 callq \*0x200028\(%rip\) # 600110 <.*> ++ +[a-f0-9]+: ff 25 2a 00 20 00 jmpq \*0x20002a\(%rip\) # 600118 <.*> ++ +[a-f0-9]+: 48 c7 05 1f 00 20 00 00 00 00 00 movq \$0x0,0x20001f\(%rip\) # 600118 <.*> ++ +[a-f0-9]+: 48 83 3d 0f 00 20 00 00 cmpq \$0x0,0x20000f\(%rip\) # 600110 <.*> ++ +[a-f0-9]+: 48 3b 0d 08 00 20 00 cmp 0x200008\(%rip\),%rcx # 600110 <.*> ++ +[a-f0-9]+: 48 3b 0d 09 00 20 00 cmp 0x200009\(%rip\),%rcx # 600118 <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/pr20253-1d.d b/ld/testsuite/ld-x86-64/pr20253-1d.d +index 35c04f8..6953c79 100644 +--- a/ld/testsuite/ld-x86-64/pr20253-1d.d ++++ b/ld/testsuite/ld-x86-64/pr20253-1d.d +@@ -16,10 +16,10 @@ Disassembly of section .text: + +[a-f0-9]+: c3 retq + + 0+1ca <_start>: +- +[a-f0-9]+: ff 15 28 01 20 00 callq \*0x200128\(%rip\) # 2002f8 <_DYNAMIC\+0x100> +- +[a-f0-9]+: ff 25 2a 01 20 00 jmpq \*0x20012a\(%rip\) # 200300 <_DYNAMIC\+0x108> +- +[a-f0-9]+: 48 c7 05 1f 01 20 00 00 00 00 00 movq \$0x0,0x20011f\(%rip\) # 200300 <_DYNAMIC\+0x108> +- +[a-f0-9]+: 48 83 3d 0f 01 20 00 00 cmpq \$0x0,0x20010f\(%rip\) # 2002f8 <_DYNAMIC\+0x100> +- +[a-f0-9]+: 48 3b 0d 08 01 20 00 cmp 0x200108\(%rip\),%rcx # 2002f8 <_DYNAMIC\+0x100> +- +[a-f0-9]+: 48 3b 0d 09 01 20 00 cmp 0x200109\(%rip\),%rcx # 200300 <_DYNAMIC\+0x108> ++ +[a-f0-9]+: ff 15 28 01 20 00 callq \*0x200128\(%rip\) # 2002f8 <.got> ++ +[a-f0-9]+: ff 25 2a 01 20 00 jmpq \*0x20012a\(%rip\) # 200300 <.got\+0x8> ++ +[a-f0-9]+: 48 c7 05 1f 01 20 00 00 00 00 00 movq \$0x0,0x20011f\(%rip\) # 200300 <.got\+0x8> ++ +[a-f0-9]+: 48 83 3d 0f 01 20 00 00 cmpq \$0x0,0x20010f\(%rip\) # 2002f8 <.got> ++ +[a-f0-9]+: 48 3b 0d 08 01 20 00 cmp 0x200108\(%rip\),%rcx # 2002f8 <.got> ++ +[a-f0-9]+: 48 3b 0d 09 01 20 00 cmp 0x200109\(%rip\),%rcx # 200300 <.got\+0x8> + #pass +diff --git a/ld/testsuite/ld-x86-64/pr20253-1f.d b/ld/testsuite/ld-x86-64/pr20253-1f.d +index d84b60e..9319350 100644 +--- a/ld/testsuite/ld-x86-64/pr20253-1f.d ++++ b/ld/testsuite/ld-x86-64/pr20253-1f.d +@@ -16,10 +16,10 @@ Disassembly of section .text: + +[a-f0-9]+: c3 retq + + 0+1fa <_start>: +- +[a-f0-9]+: ff 15 08 01 20 00 callq \*0x200108\(%rip\) # 200308 <_DYNAMIC\+0xe0> +- +[a-f0-9]+: ff 25 0a 01 20 00 jmpq \*0x20010a\(%rip\) # 200310 <_DYNAMIC\+0xe8> +- +[a-f0-9]+: 48 c7 05 ff 00 20 00 00 00 00 00 movq \$0x0,0x2000ff\(%rip\) # 200310 <_DYNAMIC\+0xe8> +- +[a-f0-9]+: 48 83 3d ef 00 20 00 00 cmpq \$0x0,0x2000ef\(%rip\) # 200308 <_DYNAMIC\+0xe0> +- +[a-f0-9]+: 48 3b 0d e8 00 20 00 cmp 0x2000e8\(%rip\),%rcx # 200308 <_DYNAMIC\+0xe0> +- +[a-f0-9]+: 48 3b 0d e9 00 20 00 cmp 0x2000e9\(%rip\),%rcx # 200310 <_DYNAMIC\+0xe8> ++ +[a-f0-9]+: ff 15 08 01 20 00 callq \*0x200108\(%rip\) # 200308 <.*> ++ +[a-f0-9]+: ff 25 0a 01 20 00 jmpq \*0x20010a\(%rip\) # 200310 <.*> ++ +[a-f0-9]+: 48 c7 05 ff 00 20 00 00 00 00 00 movq \$0x0,0x2000ff\(%rip\) # 200310 <.*> ++ +[a-f0-9]+: 48 83 3d ef 00 20 00 00 cmpq \$0x0,0x2000ef\(%rip\) # 200308 <.*> ++ +[a-f0-9]+: 48 3b 0d e8 00 20 00 cmp 0x2000e8\(%rip\),%rcx # 200308 <.*> ++ +[a-f0-9]+: 48 3b 0d e9 00 20 00 cmp 0x2000e9\(%rip\),%rcx # 200310 <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/pr20253-1h.d b/ld/testsuite/ld-x86-64/pr20253-1h.d +index 77ff100..14a8f1b 100644 +--- a/ld/testsuite/ld-x86-64/pr20253-1h.d ++++ b/ld/testsuite/ld-x86-64/pr20253-1h.d +@@ -16,10 +16,10 @@ Disassembly of section .text: + +[a-f0-9]+: c3 retq + + 0+40008e <_start>: +- +[a-f0-9]+: ff 15 28 00 20 00 callq \*0x200028\(%rip\) # 6000bc <_start\+0x20002e> +- +[a-f0-9]+: ff 25 2a 00 20 00 jmpq \*0x20002a\(%rip\) # 6000c4 <_start\+0x200036> +- +[a-f0-9]+: 48 c7 05 1f 00 20 00 00 00 00 00 movq \$0x0,0x20001f\(%rip\) # 6000c4 <_start\+0x200036> +- +[a-f0-9]+: 48 83 3d 0f 00 20 00 00 cmpq \$0x0,0x20000f\(%rip\) # 6000bc <_start\+0x20002e> +- +[a-f0-9]+: 48 3b 0d 08 00 20 00 cmp 0x200008\(%rip\),%rcx # 6000bc <_start\+0x20002e> +- +[a-f0-9]+: 48 3b 0d 09 00 20 00 cmp 0x200009\(%rip\),%rcx # 6000c4 <_start\+0x200036> ++ +[a-f0-9]+: ff 15 28 00 20 00 callq \*0x200028\(%rip\) # 6000bc <.*> ++ +[a-f0-9]+: ff 25 2a 00 20 00 jmpq \*0x20002a\(%rip\) # 6000c4 <.*> ++ +[a-f0-9]+: 48 c7 05 1f 00 20 00 00 00 00 00 movq \$0x0,0x20001f\(%rip\) # 6000c4 <.*> ++ +[a-f0-9]+: 48 83 3d 0f 00 20 00 00 cmpq \$0x0,0x20000f\(%rip\) # 6000bc <.*> ++ +[a-f0-9]+: 48 3b 0d 08 00 20 00 cmp 0x200008\(%rip\),%rcx # 6000bc <.*> ++ +[a-f0-9]+: 48 3b 0d 09 00 20 00 cmp 0x200009\(%rip\),%rcx # 6000c4 <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/pr20253-1j.d b/ld/testsuite/ld-x86-64/pr20253-1j.d +index 6f5d666..5662e0c 100644 +--- a/ld/testsuite/ld-x86-64/pr20253-1j.d ++++ b/ld/testsuite/ld-x86-64/pr20253-1j.d +@@ -16,10 +16,10 @@ Disassembly of section .text: + +[a-f0-9]+: c3 retq + + 0+122 <_start>: +- +[a-f0-9]+: ff 15 a8 00 20 00 callq \*0x2000a8\(%rip\) # 2001d0 <_DYNAMIC\+0x80> +- +[a-f0-9]+: ff 25 aa 00 20 00 jmpq \*0x2000aa\(%rip\) # 2001d8 <_DYNAMIC\+0x88> +- +[a-f0-9]+: 48 c7 05 9f 00 20 00 00 00 00 00 movq \$0x0,0x20009f\(%rip\) # 2001d8 <_DYNAMIC\+0x88> +- +[a-f0-9]+: 48 83 3d 8f 00 20 00 00 cmpq \$0x0,0x20008f\(%rip\) # 2001d0 <_DYNAMIC\+0x80> +- +[a-f0-9]+: 48 3b 0d 88 00 20 00 cmp 0x200088\(%rip\),%rcx # 2001d0 <_DYNAMIC\+0x80> +- +[a-f0-9]+: 48 3b 0d 89 00 20 00 cmp 0x200089\(%rip\),%rcx # 2001d8 <_DYNAMIC\+0x88> ++ +[a-f0-9]+: ff 15 a8 00 20 00 callq \*0x2000a8\(%rip\) # 2001d0 <.*> ++ +[a-f0-9]+: ff 25 aa 00 20 00 jmpq \*0x2000aa\(%rip\) # 2001d8 <.*> ++ +[a-f0-9]+: 48 c7 05 9f 00 20 00 00 00 00 00 movq \$0x0,0x20009f\(%rip\) # 2001d8 <.*> ++ +[a-f0-9]+: 48 83 3d 8f 00 20 00 00 cmpq \$0x0,0x20008f\(%rip\) # 2001d0 <.*> ++ +[a-f0-9]+: 48 3b 0d 88 00 20 00 cmp 0x200088\(%rip\),%rcx # 2001d0 <.*> ++ +[a-f0-9]+: 48 3b 0d 89 00 20 00 cmp 0x200089\(%rip\),%rcx # 2001d8 <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/pr20253-1l.d b/ld/testsuite/ld-x86-64/pr20253-1l.d +index 0276558..83a61db 100644 +--- a/ld/testsuite/ld-x86-64/pr20253-1l.d ++++ b/ld/testsuite/ld-x86-64/pr20253-1l.d +@@ -16,10 +16,10 @@ Disassembly of section .text: + +[a-f0-9]+: c3 retq + + 0+15a <_start>: +- +[a-f0-9]+: ff 15 98 00 20 00 callq \*0x200098\(%rip\) # 2001f8 <_DYNAMIC\+0x70> +- +[a-f0-9]+: ff 25 9a 00 20 00 jmpq \*0x20009a\(%rip\) # 200200 <_DYNAMIC\+0x78> +- +[a-f0-9]+: 48 c7 05 8f 00 20 00 00 00 00 00 movq \$0x0,0x20008f\(%rip\) # 200200 <_DYNAMIC\+0x78> +- +[a-f0-9]+: 48 83 3d 7f 00 20 00 00 cmpq \$0x0,0x20007f\(%rip\) # 2001f8 <_DYNAMIC\+0x70> +- +[a-f0-9]+: 48 3b 0d 78 00 20 00 cmp 0x200078\(%rip\),%rcx # 2001f8 <_DYNAMIC\+0x70> +- +[a-f0-9]+: 48 3b 0d 79 00 20 00 cmp 0x200079\(%rip\),%rcx # 200200 <_DYNAMIC\+0x78> ++ +[a-f0-9]+: ff 15 98 00 20 00 callq \*0x200098\(%rip\) # 2001f8 <.*> ++ +[a-f0-9]+: ff 25 9a 00 20 00 jmpq \*0x20009a\(%rip\) # 200200 <.*> ++ +[a-f0-9]+: 48 c7 05 8f 00 20 00 00 00 00 00 movq \$0x0,0x20008f\(%rip\) # 200200 <.*> ++ +[a-f0-9]+: 48 83 3d 7f 00 20 00 00 cmpq \$0x0,0x20007f\(%rip\) # 2001f8 <.*> ++ +[a-f0-9]+: 48 3b 0d 78 00 20 00 cmp 0x200078\(%rip\),%rcx # 2001f8 <.*> ++ +[a-f0-9]+: 48 3b 0d 79 00 20 00 cmp 0x200079\(%rip\),%rcx # 200200 <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/protected3.d b/ld/testsuite/ld-x86-64/protected3.d +index d8f09da..0c60167 100644 +--- a/ld/testsuite/ld-x86-64/protected3.d ++++ b/ld/testsuite/ld-x86-64/protected3.d +@@ -8,7 +8,7 @@ + Disassembly of section .text: + + 0+[a-f0-9]+ : +-[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 8b 05 ([0-9a-f]{2} ){4} * mov 0x[a-f0-9]+\(%rip\),%rax # [a-f0-9]+ <.*> + [ ]*[a-f0-9]+: 8b 00 mov \(%rax\),%eax + [ ]*[a-f0-9]+: c3 retq * + #pass +diff --git a/ld/testsuite/ld-x86-64/tlsbin.dd b/ld/testsuite/ld-x86-64/tlsbin.dd +index c89e7ee..6bc7ca2 100644 +--- a/ld/testsuite/ld-x86-64/tlsbin.dd ++++ b/ld/testsuite/ld-x86-64/tlsbin.dd +@@ -24,7 +24,7 @@ Disassembly of section .text: + # GD -> IE because variable is not defined in executable + +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +[0-9a-f]+: 00 00 * +- +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x158> ++ +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG1 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -34,7 +34,7 @@ Disassembly of section .text: + # the variable is referenced through IE too + +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +[0-9a-f]+: 00 00 * +- +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x148> ++ +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG2 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -102,7 +102,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 4c 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r9 +# [0-9a-f]+ <_DYNAMIC\+0x148> ++ +[0-9a-f]+: 4c 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r9 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG2 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -143,7 +143,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + # Direct access through %fs + # IE against global var +- +[0-9a-f]+: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x140> ++ +[0-9a-f]+: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG5 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -183,7 +183,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 4c 03 1d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r11 +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +[0-9a-f]+: 4c 03 1d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r11 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG6 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +diff --git a/ld/testsuite/ld-x86-64/tlsbin2.dd b/ld/testsuite/ld-x86-64/tlsbin2.dd +index a73fcef..0010d38 100644 +--- a/ld/testsuite/ld-x86-64/tlsbin2.dd ++++ b/ld/testsuite/ld-x86-64/tlsbin2.dd +@@ -24,7 +24,7 @@ Disassembly of section .text: + # GD -> IE because variable is not defined in executable + +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +[0-9a-f]+: 00 00 * +- +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG1 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -34,7 +34,7 @@ Disassembly of section .text: + # the variable is referenced through IE too + +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +[0-9a-f]+: 00 00 * +- +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x108> ++ +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG2 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -102,7 +102,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 4c 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r9 +# [0-9a-f]+ <_DYNAMIC\+0x108> ++ +[0-9a-f]+: 4c 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r9 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG2 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -143,7 +143,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + # Direct access through %fs + # IE against global var +- +[0-9a-f]+: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x100> ++ +[0-9a-f]+: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG5 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -183,7 +183,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 4c 03 1d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r11 +# [0-9a-f]+ <_DYNAMIC\+0x118> ++ +[0-9a-f]+: 4c 03 1d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r11 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG6 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.dd b/ld/testsuite/ld-x86-64/tlsbindesc.dd +index f77ebf2..50dc6d1 100644 +--- a/ld/testsuite/ld-x86-64/tlsbindesc.dd ++++ b/ld/testsuite/ld-x86-64/tlsbindesc.dd +@@ -22,7 +22,7 @@ Disassembly of section .text: + +[0-9a-f]+: 55[ ]+push %rbp + +[0-9a-f]+: 48 89 e5[ ]+mov %rsp,%rbp + # GD -> IE because variable is not defined in executable +- +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x118> ++ +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG1 + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax + +[0-9a-f]+: 90[ ]+nop * +@@ -31,7 +31,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + # GD -> IE because variable is not defined in executable where + # the variable is referenced through IE too +- +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x108> ++ +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG2 + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax + +[0-9a-f]+: 90[ ]+nop * +@@ -93,7 +93,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 4c 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r9 +# [0-9a-f]+ <_DYNAMIC\+0x108> ++ +[0-9a-f]+: 4c 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r9 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG2 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -134,7 +134,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + # Direct access through %fs + # IE against global var +- +[0-9a-f]+: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x100> ++ +[0-9a-f]+: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG5 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -174,7 +174,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 4c 03 1d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r11 +# [0-9a-f]+ <_DYNAMIC\+0x110> ++ +[0-9a-f]+: 4c 03 1d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r11 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG6 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +diff --git a/ld/testsuite/ld-x86-64/tlsdesc-nacl.pd b/ld/testsuite/ld-x86-64/tlsdesc-nacl.pd +index eff90a8..f744f0e 100644 +--- a/ld/testsuite/ld-x86-64/tlsdesc-nacl.pd ++++ b/ld/testsuite/ld-x86-64/tlsdesc-nacl.pd +@@ -25,7 +25,7 @@ Disassembly of section .plt: + +[0-9a-f]+: 00 * + +[0-9a-f]+: 66 90 xchg %ax,%ax + +[0-9a-f]+: ff 35 .. .. .. .. pushq 0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x8> +- +[0-9a-f]+: 4c 8b 1d .. .. .. .. mov 0x[0-9a-f]+\(%rip\),%r11 +# [0-9a-f]+ <_DYNAMIC\+0x190> ++ +[0-9a-f]+: 4c 8b 1d .. .. .. .. mov 0x[0-9a-f]+\(%rip\),%r11 +# [0-9a-f]+ <.*> + +[0-9a-f]+: 41 83 e3 e0 and \$0xffffffe0,%r11d + +[0-9a-f]+: 4d 01 fb add %r15,%r11 + +[0-9a-f]+: 41 ff e3 jmpq \*%r11 +diff --git a/ld/testsuite/ld-x86-64/tlsdesc.dd b/ld/testsuite/ld-x86-64/tlsdesc.dd +index a6f22b6..c9b1cf8 100644 +--- a/ld/testsuite/ld-x86-64/tlsdesc.dd ++++ b/ld/testsuite/ld-x86-64/tlsdesc.dd +@@ -17,7 +17,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # GD +- +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x48> ++ +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TLSDESC sg1 + +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) + +[0-9a-f]+: 90[ ]+nop * +@@ -25,7 +25,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # GD -> IE because variable is referenced through IE too +- +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x180> ++ +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sg2 + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax + +[0-9a-f]+: 90[ ]+nop * +@@ -41,7 +41,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # GD -> IE against local variable referenced through IE too +- +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x24 + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax + +[0-9a-f]+: 90[ ]+nop * +@@ -57,7 +57,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # GD -> IE against hidden and local variable referenced through IE too +- +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x188> ++ +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x44 + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax + +[0-9a-f]+: 90[ ]+nop * +@@ -73,7 +73,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # GD -> IE against hidden but not local variable referenced through IE too +- +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x160> ++ +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x64 + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax + +[0-9a-f]+: 90[ ]+nop * +@@ -115,7 +115,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x180> ++ +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sg2 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -126,7 +126,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 4c 03 35 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r14 +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +[0-9a-f]+: 4c 03 35 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r14 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x24 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -137,7 +137,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x188> ++ +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x44 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -148,7 +148,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x160> ++ +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x64 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -156,7 +156,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + # Direct access through %fs + # IE against global var +- +[0-9a-f]+: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x168> ++ +[0-9a-f]+: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sg5 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -166,7 +166,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # IE against local var +- +[0-9a-f]+: 4c 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%r10 +# [0-9a-f]+ <_DYNAMIC\+0x158> ++ +[0-9a-f]+: 4c 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%r10 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x30 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -176,7 +176,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # IE against hidden and local var +- +[0-9a-f]+: 48 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rdx +# [0-9a-f]+ <_DYNAMIC\+0x170> ++ +[0-9a-f]+: 48 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rdx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x50 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -186,7 +186,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # IE against hidden but not local var +- +[0-9a-f]+: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x178> ++ +[0-9a-f]+: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x70 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +diff --git a/ld/testsuite/ld-x86-64/tlsdesc.pd b/ld/testsuite/ld-x86-64/tlsdesc.pd +index c24403c..0fa36f3 100644 +--- a/ld/testsuite/ld-x86-64/tlsdesc.pd ++++ b/ld/testsuite/ld-x86-64/tlsdesc.pd +@@ -14,6 +14,6 @@ Disassembly of section .plt: + [0-9a-f]+: ff 25 .. .. 20 00 jmpq \*.*\(%rip\) # 201360 <_GLOBAL_OFFSET_TABLE_\+0x10> + [0-9a-f]+: 0f 1f 40 00 nopl 0x0\(%rax\) + [0-9a-f]+: ff 35 .. .. 20 00 pushq .*\(%rip\) # 201358 <_GLOBAL_OFFSET_TABLE_\+0x8> +- [0-9a-f]+: ff 25 .. .. 20 00 jmpq \*.*\(%rip\) # 201348 <_DYNAMIC\+0x190> ++ [0-9a-f]+: ff 25 .. .. 20 00 jmpq \*.*\(%rip\) # 201348 <.*> + [0-9a-f]+: 0f 1f 40 00 nopl 0x0\(%rax\) + +diff --git a/ld/testsuite/ld-x86-64/tlsgd10.dd b/ld/testsuite/ld-x86-64/tlsgd10.dd +index 448015e..6c3ca5c 100644 +--- a/ld/testsuite/ld-x86-64/tlsgd10.dd ++++ b/ld/testsuite/ld-x86-64/tlsgd10.dd +@@ -15,7 +15,7 @@ Disassembly of section .text: + [ ]*[a-f0-9]+: 4c 8d 3d eb ff ff ff lea -0x15\(%rip\),%r15 # [0-9a-f]+ <_start> + [ ]*[a-f0-9]+: 4d 01 df add %r11,%r15 + [ ]*[a-f0-9]+: 64 48 8b 04 25 00 00 00 00 mov %fs:0x0,%rax +-[ ]*[a-f0-9]+: 48 03 05 ([0-9a-f]{2} ){4} add 0x[0-9a-f]+\(%rip\),%rax # [0-9a-f]+ <_DYNAMIC\+0x140> ++[ ]*[a-f0-9]+: 48 03 05 ([0-9a-f]{2} ){4} add 0x[0-9a-f]+\(%rip\),%rax # [0-9a-f]+ <.*> + [ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\) + [ ]*[a-f0-9]+: 41 5f pop %r15 + [ ]*[a-f0-9]+: 41 5f pop %r15 +diff --git a/ld/testsuite/ld-x86-64/tlsgd5.dd b/ld/testsuite/ld-x86-64/tlsgd5.dd +index 54cf357..c2e2621 100644 +--- a/ld/testsuite/ld-x86-64/tlsgd5.dd ++++ b/ld/testsuite/ld-x86-64/tlsgd5.dd +@@ -10,5 +10,5 @@ Disassembly of section .text: + + [a-f0-9]+ <_start>: + [ ]*[a-f0-9]+: 64 48 8b 04 25 00 00 00 00 mov %fs:0x0,%rax +-[ ]*[a-f0-9]+: 48 03 05 ([0-9a-f]{2} ){4} * add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 03 05 ([0-9a-f]{2} ){4} * add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + #pass +diff --git a/ld/testsuite/ld-x86-64/tlsgd6.dd b/ld/testsuite/ld-x86-64/tlsgd6.dd +index 2cbfda6..08e3b99 100644 +--- a/ld/testsuite/ld-x86-64/tlsgd6.dd ++++ b/ld/testsuite/ld-x86-64/tlsgd6.dd +@@ -10,5 +10,5 @@ Disassembly of section .text: + + [a-f0-9]+ <_start>: + [ ]*[a-f0-9]+: 64 8b 04 25 00 00 00 00 mov %fs:0x0,%eax +-[ ]*[a-f0-9]+: 48 03 05 ([0-9a-f]{2} ){4} * add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[a-f0-9]+> ++[ ]*[a-f0-9]+: 48 03 05 ([0-9a-f]{2} ){4} * add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ + #pass +diff --git a/ld/testsuite/ld-x86-64/tlsgd8.dd b/ld/testsuite/ld-x86-64/tlsgd8.dd +index 1055052..2bb1132 100644 +--- a/ld/testsuite/ld-x86-64/tlsgd8.dd ++++ b/ld/testsuite/ld-x86-64/tlsgd8.dd +@@ -15,7 +15,7 @@ Disassembly of section .text: + [ ]*[a-f0-9]+: 48 8d 1d ed ff ff ff lea -0x13\(%rip\),%rbx # [0-9a-f]+ <_start> + [ ]*[a-f0-9]+: 4c 01 db add %r11,%rbx + [ ]*[a-f0-9]+: 64 48 8b 04 25 00 00 00 00 mov %fs:0x0,%rax +-[ ]*[a-f0-9]+: 48 03 05 ([0-9a-f]{2} ){4} add 0x[0-9a-f]+\(%rip\),%rax # [0-9a-f]+ <_DYNAMIC\+0x140> ++[ ]*[a-f0-9]+: 48 03 05 ([0-9a-f]{2} ){4} add 0x[0-9a-f]+\(%rip\),%rax # [0-9a-f]+ + [ ]*[a-f0-9]+: 66 0f 1f 44 00 00 nopw 0x0\(%rax,%rax,1\) + [ ]*[a-f0-9]+: 5b pop %rbx + [ ]*[a-f0-9]+: 5b pop %rbx +diff --git a/ld/testsuite/ld-x86-64/tlsgdesc.dd b/ld/testsuite/ld-x86-64/tlsgdesc.dd +index a983a75..d0a274b 100644 +--- a/ld/testsuite/ld-x86-64/tlsgdesc.dd ++++ b/ld/testsuite/ld-x86-64/tlsgdesc.dd +@@ -20,7 +20,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG3 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -31,14 +31,14 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x170> ++ +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG4 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # GD, gd first +- +[0-9a-f]+: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x180> ++ +[0-9a-f]+: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + +[0-9a-f]+: [0-9a-f]{2} * + # -> R_X86_64_DTPMOD64 sG1 + +[0-9a-f]+: 66 66 48 e8 ([0-9a-f]{2} ){3}[ ]+data16 data16 rex.W callq [0-9a-f]+ <__tls_get_addr@plt> +@@ -48,7 +48,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x30> ++ +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TLSDESC sG1 + +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) + +[0-9a-f]+: 90[ ]+nop * +@@ -56,14 +56,14 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # GD, desc first +- +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_GLOBAL_OFFSET_TABLE_\+0x20> ++ +[0-9a-f]+: 48 8d 05 ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TLSDESC sG2 + +[0-9a-f]+: ff 10[ ]+callq \*\(%rax\) + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x160> ++ +[0-9a-f]+: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + +[0-9a-f]+: [0-9a-f]{2} * + # -> R_X86_64_DTPMOD64 sG2 + +[0-9a-f]+: 66 66 48 e8 ([0-9a-f]{2} ){3}[ ]+data16 data16 rex.W callq [0-9a-f]+ <__tls_get_addr@plt> +@@ -76,13 +76,13 @@ Disassembly of section .text: + # GD -> IE, gd first, after IE use + +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +[0-9a-f]+: 00 00 * +- +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG3 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG3 + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax + +[0-9a-f]+: 90[ ]+nop * +@@ -90,7 +90,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # GD -> IE, desc first, after IE use +- +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x170> ++ +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG4 + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax + +[0-9a-f]+: 90[ ]+nop * +@@ -99,7 +99,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +[0-9a-f]+: 00 00 * +- +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x170> ++ +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG4 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -108,13 +108,13 @@ Disassembly of section .text: + # GD -> IE, gd first, before IE use + +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +[0-9a-f]+: 00 00 * +- +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x158> ++ +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG5 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x158> ++ +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG5 + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax + +[0-9a-f]+: 90[ ]+nop * +@@ -122,7 +122,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * + # GD -> IE, desc first, before IE use +- +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x178> ++ +[0-9a-f]+: 48 8b 05 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG6 + +[0-9a-f]+: 66 90[ ]+xchg %ax,%ax + +[0-9a-f]+: 90[ ]+nop * +@@ -131,7 +131,7 @@ Disassembly of section .text: + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +[0-9a-f]+: 00 00 * +- +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x178> ++ +[0-9a-f]+: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG6 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -142,7 +142,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x158> ++ +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG5 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +@@ -153,7 +153,7 @@ Disassembly of section .text: + +[0-9a-f]+: 00 00 * + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +- +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x178> ++ +[0-9a-f]+: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sG6 + +[0-9a-f]+: 90[ ]+nop * + +[0-9a-f]+: 90[ ]+nop * +diff --git a/ld/testsuite/ld-x86-64/tlspic.dd b/ld/testsuite/ld-x86-64/tlspic.dd +index bf3ba69..88026c1 100644 +--- a/ld/testsuite/ld-x86-64/tlspic.dd ++++ b/ld/testsuite/ld-x86-64/tlspic.dd +@@ -17,7 +17,7 @@ Disassembly of section .text: + +1006: 90[ ]+nop * + +1007: 90[ ]+nop * + # GD +- +1008: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x180> ++ +1008: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + +100f: [0-9a-f ]+ + # -> R_X86_64_DTPMOD64 sg1 + +1010: 66 66 48 e8 [0-9a-f ]+data16 data16 rex.W callq [0-9a-f]+ <.*> +@@ -30,14 +30,14 @@ Disassembly of section .text: + # GD -> IE because variable is referenced through IE too + +101c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +1023: 00 00 * +- +1025: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x1a0> ++ +1025: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sg2 + +102c: 90[ ]+nop * + +102d: 90[ ]+nop * + +102e: 90[ ]+nop * + +102f: 90[ ]+nop * + # GD against local variable +- +1030: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x130> ++ +1030: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + +1037: [0-9a-f ]+ + # -> R_X86_64_DTPMOD64 [0 0x2000000000000000] + +1038: 66 66 48 e8 [0-9a-f ]+data16 data16 rex.W callq [0-9a-f]+ <.*> +@@ -50,14 +50,14 @@ Disassembly of section .text: + # GD -> IE against local variable referenced through IE too + +1044: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +104b: 00 00 * +- +104d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x140> ++ +104d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x24 + +1054: 90[ ]+nop * + +1055: 90[ ]+nop * + +1056: 90[ ]+nop * + +1057: 90[ ]+nop * + # GD against hidden and local variable +- +1058: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x1a8> ++ +1058: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + +105f: [0-9a-f ]+ + # -> R_X86_64_DTPMOD64 [0 0x4000000000000000] + +1060: 66 66 48 e8 [0-9a-f ]+data16 data16 rex.W callq [0-9a-f]+ <.*> +@@ -70,14 +70,14 @@ Disassembly of section .text: + # GD -> IE against hidden and local variable referenced through IE too + +106c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +1073: 00 00 * +- +1075: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x1b8> ++ +1075: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x44 + +107c: 90[ ]+nop * + +107d: 90[ ]+nop * + +107e: 90[ ]+nop * + +107f: 90[ ]+nop * + # GD against hidden but not local variable +- +1080: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x160> ++ +1080: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + +1087: [0-9a-f ]+ + # -> R_X86_64_DTPMOD64 [0 0x6000000000000000] + +1088: 66 66 48 e8 [0-9a-f ]+data16 data16 rex.W callq [0-9a-f]+ <.*> +@@ -90,14 +90,14 @@ Disassembly of section .text: + # GD -> IE against hidden but not local variable referenced through IE too + +1094: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +109b: 00 00 * +- +109d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x170> ++ +109d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x64 + +10a4: 90[ ]+nop * + +10a5: 90[ ]+nop * + +10a6: 90[ ]+nop * + +10a7: 90[ ]+nop * + # LD +- +10a8: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +10a8: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] + +10af: e8 [0-9a-f ]+callq [0-9a-f]+ <.*> + # -> R_X86_64_JUMP_SLOT __tls_get_addr +@@ -112,7 +112,7 @@ Disassembly of section .text: + +10c8: 90[ ]+nop * + +10c9: 90[ ]+nop * + # LD against hidden and local variables +- +10ca: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +10ca: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] + +10d1: e8 [0-9a-f ]+callq [0-9a-f]+ <.*> + # -> R_X86_64_JUMP_SLOT __tls_get_addr +@@ -127,7 +127,7 @@ Disassembly of section .text: + +10ea: 90[ ]+nop * + +10eb: 90[ ]+nop * + # LD against hidden but not local variables +- +10ec: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +10ec: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] + +10f3: e8 [0-9a-f ]+callq [0-9a-f]+ <.*> + # -> R_X86_64_JUMP_SLOT __tls_get_addr +@@ -144,7 +144,7 @@ Disassembly of section .text: + +1113: 00 00 * + +1115: 90[ ]+nop * + +1116: 90[ ]+nop * +- +1117: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x1a0> ++ +1117: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sg2 + +111e: 90[ ]+nop * + +111f: 90[ ]+nop * +@@ -155,7 +155,7 @@ Disassembly of section .text: + +1129: 00 00 * + +112b: 90[ ]+nop * + +112c: 90[ ]+nop * +- +112d: 4c 03 35 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r14 +# [0-9a-f]+ <_DYNAMIC\+0x140> ++ +112d: 4c 03 35 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r14 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x24 + +1134: 90[ ]+nop * + +1135: 90[ ]+nop * +@@ -166,7 +166,7 @@ Disassembly of section .text: + +113f: 00 00 * + +1141: 90[ ]+nop * + +1142: 90[ ]+nop * +- +1143: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x1b8> ++ +1143: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x44 + +114a: 90[ ]+nop * + +114b: 90[ ]+nop * +@@ -177,7 +177,7 @@ Disassembly of section .text: + +1155: 00 00 * + +1157: 90[ ]+nop * + +1158: 90[ ]+nop * +- +1159: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x170> ++ +1159: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x64 + +1160: 90[ ]+nop * + +1161: 90[ ]+nop * +@@ -185,7 +185,7 @@ Disassembly of section .text: + +1163: 90[ ]+nop * + # Direct access through %fs + # IE against global var +- +1164: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x178> ++ +1164: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sg5 + +116b: 90[ ]+nop * + +116c: 90[ ]+nop * +@@ -195,7 +195,7 @@ Disassembly of section .text: + +1173: 90[ ]+nop * + +1174: 90[ ]+nop * + # IE against local var +- +1175: 4c 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%r10 +# [0-9a-f]+ <_DYNAMIC\+0x148> ++ +1175: 4c 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%r10 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x30 + +117c: 90[ ]+nop * + +117d: 90[ ]+nop * +@@ -205,7 +205,7 @@ Disassembly of section .text: + +1184: 90[ ]+nop * + +1185: 90[ ]+nop * + # IE against hidden and local var +- +1186: 48 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rdx +# [0-9a-f]+ <_DYNAMIC\+0x190> ++ +1186: 48 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rdx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x50 + +118d: 90[ ]+nop * + +118e: 90[ ]+nop * +@@ -215,7 +215,7 @@ Disassembly of section .text: + +1195: 90[ ]+nop * + +1196: 90[ ]+nop * + # IE against hidden but not local var +- +1197: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x198> ++ +1197: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x70 + +119e: 90[ ]+nop * + +119f: 90[ ]+nop * +@@ -237,7 +237,7 @@ Disassembly of section .text: + # -mcmodel=large sequences + # + # -mcmodel=large GD +- +11c2: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x180> ++ +11c2: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 sg1 + +11c9: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_JUMP_SLOT __tls_get_addr +@@ -252,7 +252,7 @@ Disassembly of section .text: + # -> R_X86_64_TPOFF64 sg2 + +11dc: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +11e3: 00 00 +- +11e5: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x1a0> ++ +11e5: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sg2 + +11ec: 66 0f 1f 44 00 00[ ]+nopw 0x0\(%rax,%rax,1\) + +11f2: 90[ ]+nop * +@@ -260,7 +260,7 @@ Disassembly of section .text: + +11f4: 90[ ]+nop * + +11f5: 90[ ]+nop * + # -mcmodel=large GD against local variable +- +11f6: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x130> ++ +11f6: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x2000000000000000] + +11fd: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_JUMP_SLOT __tls_get_addr +@@ -274,7 +274,7 @@ Disassembly of section .text: + # -mcmodel=large GD -> IE against local variable referenced through IE too + +1210: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +1217: 00 00 +- +1219: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x140> ++ +1219: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x24 + +1220: 66 0f 1f 44 00 00[ ]+nopw 0x0\(%rax,%rax,1\) + +1226: 90[ ]+nop * +@@ -282,7 +282,7 @@ Disassembly of section .text: + +1228: 90[ ]+nop * + +1229: 90[ ]+nop * + # -mcmodel=large GD against hidden and local variable +- +122a: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x1a8> ++ +122a: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x4000000000000000] + +1231: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_JUMP_SLOT __tls_get_addr +@@ -296,7 +296,7 @@ Disassembly of section .text: + # -mcmodel=large GD -> IE against hidden and local variable referenced through IE too + +1244: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +124b: 00 00 +- +124d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x1b8> ++ +124d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x44 + +1254: 66 0f 1f 44 00 00[ ]+nopw 0x0\(%rax,%rax,1\) + +125a: 90[ ]+nop * +@@ -304,7 +304,7 @@ Disassembly of section .text: + +125c: 90[ ]+nop * + +125d: 90[ ]+nop * + # -mcmodel=large GD against hidden but not local variable +- +125e: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x160> ++ +125e: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x6000000000000000] + +1265: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_JUMP_SLOT __tls_get_addr +@@ -318,7 +318,7 @@ Disassembly of section .text: + # -mcmodel=large GD -> IE against hidden but not local variable referenced through IE too + +1278: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +127f: 00 00 +- +1281: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x170> ++ +1281: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x64 + +1288: 66 0f 1f 44 00 00[ ]+nopw 0x0\(%rax,%rax,1\) + +128e: 90[ ]+nop * +@@ -326,7 +326,7 @@ Disassembly of section .text: + +1290: 90[ ]+nop * + +1291: 90[ ]+nop * + # -mcmodel=large LD +- +1292: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +1292: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] + +1299: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_JUMP_SLOT __tls_get_addr +@@ -344,7 +344,7 @@ Disassembly of section .text: + +12bc: 90[ ]+nop * + +12bd: 90[ ]+nop * + # -mcmodel=large LD against hidden and local variables +- +12be: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +12be: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] + +12c5: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_JUMP_SLOT __tls_get_addr +@@ -362,7 +362,7 @@ Disassembly of section .text: + +12e8: 90[ ]+nop * + +12e9: 90[ ]+nop * + # -mcmodel=large LD against hidden but not local variables +- +12ea: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x150> ++ +12ea: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] + +12f1: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_JUMP_SLOT __tls_get_addr +diff --git a/ld/testsuite/ld-x86-64/tlspic2.dd b/ld/testsuite/ld-x86-64/tlspic2.dd +index 18358f1..596fcb4 100644 +--- a/ld/testsuite/ld-x86-64/tlspic2.dd ++++ b/ld/testsuite/ld-x86-64/tlspic2.dd +@@ -17,10 +17,10 @@ Disassembly of section .text: + +1006: 90[ ]+nop * + +1007: 90[ ]+nop * + # GD +- +1008: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1008: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + +100f: [0-9a-f ]+ + # -> R_X86_64_DTPMOD64 sg1 +- +1010: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1010: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + # -> R_X86_64_GLOB_DAT __tls_get_addr + +1017: [0-9a-f ]+ + +1018: 90[ ]+nop * +@@ -30,17 +30,17 @@ Disassembly of section .text: + # GD -> IE because variable is referenced through IE too + +101c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +1023: 00 00 * +- +1025: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1025: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sg2 + +102c: 90[ ]+nop * + +102d: 90[ ]+nop * + +102e: 90[ ]+nop * + +102f: 90[ ]+nop * + # GD against local variable +- +1030: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1030: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + +1037: [0-9a-f ]+ + # -> R_X86_64_DTPMOD64 [0 0x2000000000000000] +- +1038: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1038: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + # -> R_X86_64_GLOB_DAT __tls_get_addr + +103f: [0-9a-f ]+ + +1040: 90[ ]+nop * +@@ -50,17 +50,17 @@ Disassembly of section .text: + # GD -> IE against local variable referenced through IE too + +1044: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +104b: 00 00 * +- +104d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +104d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x24 + +1054: 90[ ]+nop * + +1055: 90[ ]+nop * + +1056: 90[ ]+nop * + +1057: 90[ ]+nop * + # GD against hidden and local variable +- +1058: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1058: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + +105f: [0-9a-f ]+ + # -> R_X86_64_DTPMOD64 [0 0x4000000000000000] +- +1060: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1060: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + # -> R_X86_64_GLOB_DAT __tls_get_addr + +1067: [0-9a-f ]+ + +1068: 90[ ]+nop * +@@ -70,17 +70,17 @@ Disassembly of section .text: + # GD -> IE against hidden and local variable referenced through IE too + +106c: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +1073: 00 00 * +- +1075: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1075: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x44 + +107c: 90[ ]+nop * + +107d: 90[ ]+nop * + +107e: 90[ ]+nop * + +107f: 90[ ]+nop * + # GD against hidden but not local variable +- +1080: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1080: 66 48 8d 3d ([0-9a-f]{2} ){3}[ ]+data16 lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + +1087: [0-9a-f ]+ + # -> R_X86_64_DTPMOD64 [0 0x6000000000000000] +- +1088: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1088: 66 48 ff [0-9a-f ]+data16 rex\.W callq \*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + # -> R_X86_64_GLOB_DAT __tls_get_addr + +108f: [0-9a-f ]+ + +1090: 90[ ]+nop * +@@ -90,16 +90,16 @@ Disassembly of section .text: + # GD -> IE against hidden but not local variable referenced through IE too + +1094: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +109b: 00 00 * +- +109d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +109d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x64 + +10a4: 90[ ]+nop * + +10a5: 90[ ]+nop * + +10a6: 90[ ]+nop * + +10a7: 90[ ]+nop * + # LD +- +10a8: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +10a8: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] +- +10af: ff [0-9a-f ]+callq[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +10af: ff [0-9a-f ]+callq[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + # -> R_X86_64_GLOB_DAT __tls_get_addr + +10b5: 90[ ]+nop * + +10b6: 48 8d 90 20 00 00 00[ ]+lea 0x20\(%rax\),%rdx +@@ -111,9 +111,9 @@ Disassembly of section .text: + +10c8: 90[ ]+nop * + +10c9: 90[ ]+nop * + # LD against hidden and local variables +- +10ca: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +10ca: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] +- +10d1: ff [0-9a-f ]+callq[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +10d1: ff [0-9a-f ]+callq[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + # -> R_X86_64_GLOB_DAT __tls_get_addr + +10d7: 90[ ]+nop * + +10d8: 48 8d 90 40 00 00 00[ ]+lea 0x40\(%rax\),%rdx +@@ -125,9 +125,9 @@ Disassembly of section .text: + +10ea: 90[ ]+nop * + +10eb: 90[ ]+nop * + # LD against hidden but not local variables +- +10ec: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +10ec: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] +- +10f3: ff [0-9a-f ]+callq[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +10f3: ff [0-9a-f ]+callq[ ]+\*0x[0-9a-f]+\(%rip\) +# [0-9a-f]+ <.*> + # -> R_X86_64_GLOB_DAT __tls_get_addr + +10f9: 90[ ]+nop * + +10fa: 4c 8d a0 60 00 00 00[ ]+lea 0x60\(%rax\),%r12 +@@ -141,7 +141,7 @@ Disassembly of section .text: + +1113: 00 00 * + +1115: 90[ ]+nop * + +1116: 90[ ]+nop * +- +1117: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1117: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sg2 + +111e: 90[ ]+nop * + +111f: 90[ ]+nop * +@@ -152,7 +152,7 @@ Disassembly of section .text: + +1129: 00 00 * + +112b: 90[ ]+nop * + +112c: 90[ ]+nop * +- +112d: 4c 03 35 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r14 +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +112d: 4c 03 35 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%r14 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x24 + +1134: 90[ ]+nop * + +1135: 90[ ]+nop * +@@ -163,7 +163,7 @@ Disassembly of section .text: + +113f: 00 00 * + +1141: 90[ ]+nop * + +1142: 90[ ]+nop * +- +1143: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1143: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x44 + +114a: 90[ ]+nop * + +114b: 90[ ]+nop * +@@ -174,7 +174,7 @@ Disassembly of section .text: + +1155: 00 00 * + +1157: 90[ ]+nop * + +1158: 90[ ]+nop * +- +1159: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1159: 48 03 0d ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x64 + +1160: 90[ ]+nop * + +1161: 90[ ]+nop * +@@ -182,7 +182,7 @@ Disassembly of section .text: + +1163: 90[ ]+nop * + # Direct access through %fs + # IE against global var +- +1164: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1164: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sg5 + +116b: 90[ ]+nop * + +116c: 90[ ]+nop * +@@ -192,7 +192,7 @@ Disassembly of section .text: + +1173: 90[ ]+nop * + +1174: 90[ ]+nop * + # IE against local var +- +1175: 4c 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%r10 +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1175: 4c 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%r10 +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x30 + +117c: 90[ ]+nop * + +117d: 90[ ]+nop * +@@ -202,7 +202,7 @@ Disassembly of section .text: + +1184: 90[ ]+nop * + +1185: 90[ ]+nop * + # IE against hidden and local var +- +1186: 48 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rdx +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1186: 48 8b 15 ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rdx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x50 + +118d: 90[ ]+nop * + +118e: 90[ ]+nop * +@@ -212,7 +212,7 @@ Disassembly of section .text: + +1195: 90[ ]+nop * + +1196: 90[ ]+nop * + # IE against hidden but not local var +- +1197: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1197: 48 8b 0d ([0-9a-f]{2} ){4}[ ]+mov 0x[0-9a-f]+\(%rip\),%rcx +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x70 + +119e: 90[ ]+nop * + +119f: 90[ ]+nop * +@@ -232,7 +232,7 @@ Disassembly of section .text: + # -mcmodel=large sequences + # + # -mcmodel=large GD +- +11c2: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +11c2: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 sg1 + +11c9: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_GLOB_DAT __tls_get_addr +@@ -247,7 +247,7 @@ Disassembly of section .text: + # -> R_X86_64_TPOFF64 sg2 + +11dc: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +11e3: 00 00 +- +11e5: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +11e5: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 sg2 + +11ec: 66 0f 1f 44 00 00[ ]+nopw 0x0\(%rax,%rax,1\) + +11f2: 90[ ]+nop * +@@ -255,7 +255,7 @@ Disassembly of section .text: + +11f4: 90[ ]+nop * + +11f5: 90[ ]+nop * + # -mcmodel=large GD against local variable +- +11f6: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +11f6: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x2000000000000000] + +11fd: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_GLOB_DAT __tls_get_addr +@@ -269,7 +269,7 @@ Disassembly of section .text: + # -mcmodel=large GD -> IE against local variable referenced through IE too + +1210: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +1217: 00 00 +- +1219: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1219: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x24 + +1220: 66 0f 1f 44 00 00[ ]+nopw 0x0\(%rax,%rax,1\) + +1226: 90[ ]+nop * +@@ -277,7 +277,7 @@ Disassembly of section .text: + +1228: 90[ ]+nop * + +1229: 90[ ]+nop * + # -mcmodel=large GD against hidden and local variable +- +122a: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +122a: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x4000000000000000] + +1231: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_GLOB_DAT __tls_get_addr +@@ -291,7 +291,7 @@ Disassembly of section .text: + # -mcmodel=large GD -> IE against hidden and local variable referenced through IE too + +1244: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +124b: 00 00 +- +124d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +124d: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x44 + +1254: 66 0f 1f 44 00 00[ ]+nopw 0x0\(%rax,%rax,1\) + +125a: 90[ ]+nop * +@@ -299,7 +299,7 @@ Disassembly of section .text: + +125c: 90[ ]+nop * + +125d: 90[ ]+nop * + # -mcmodel=large GD against hidden but not local variable +- +125e: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +125e: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x6000000000000000] + +1265: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_GLOB_DAT __tls_get_addr +@@ -313,7 +313,7 @@ Disassembly of section .text: + # -mcmodel=large GD -> IE against hidden but not local variable referenced through IE too + +1278: 64 48 8b 04 25 00 00[ ]+mov %fs:0x0,%rax + +127f: 00 00 +- +1281: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1281: 48 03 05 ([0-9a-f]{2} ){4}[ ]+add 0x[0-9a-f]+\(%rip\),%rax +# [0-9a-f]+ <.*> + # -> R_X86_64_TPOFF64 *ABS*+0x64 + +1288: 66 0f 1f 44 00 00[ ]+nopw 0x0\(%rax,%rax,1\) + +128e: 90[ ]+nop * +@@ -321,7 +321,7 @@ Disassembly of section .text: + +1290: 90[ ]+nop * + +1291: 90[ ]+nop * + # -mcmodel=large LD +- +1292: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +1292: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] + +1299: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_GLOB_DAT __tls_get_addr +@@ -339,7 +339,7 @@ Disassembly of section .text: + +12bc: 90[ ]+nop * + +12bd: 90[ ]+nop * + # -mcmodel=large LD against hidden and local variables +- +12be: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +12be: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] + +12c5: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_GLOB_DAT __tls_get_addr +@@ -357,7 +357,7 @@ Disassembly of section .text: + +12e8: 90[ ]+nop * + +12e9: 90[ ]+nop * + # -mcmodel=large LD against hidden but not local variables +- +12ea: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <_DYNAMIC\+0x[0-9a-f]+> ++ +12ea: 48 8d 3d ([0-9a-f]{2} ){4}[ ]+lea 0x[0-9a-f]+\(%rip\),%rdi +# [0-9a-f]+ <.*> + # -> R_X86_64_DTPMOD64 [0 0x000000000000000] + +12f1: 48 b8 ([0-9a-f]{2} ){5}[ ]+movabs \$0x[0-9a-f]+,%rax + # -> R_X86_64_GLOB_DAT __tls_get_addr +--- binutils-2.27.orig/ld/testsuite/ld-aarch64/farcall-bl-plt.d 2016-11-08 15:39:42.082556640 +0000 ++++ binutils-2.27/ld/testsuite/ld-aarch64/farcall-bl-plt.d 2016-11-08 16:56:38.410233674 +0000 +@@ -7,7 +7,7 @@ + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: a9bf7bf0 stp x16, x30, \[sp,#-16\]! + .*: .* adrp x16, .* <__foo_veneer\+.*> + .*: .* ldr x17, \[x16,#.*\] +@@ -32,7 +32,7 @@ Disassembly of section .text: + .*: .* b .* <__foo_veneer\+.*> + + .* <__foo_veneer>: +-.*: .* adrp x16, 0 ++.*: .* adrp x16, 0 <.*> + .*: .* add x16, x16, #.* + .*: d61f0200 br x16 + ... +--- binutils-2.27.orig/ld/testsuite/ld-aarch64/farcall-b-plt.d 2016-11-08 15:39:42.082556640 +0000 ++++ binutils-2.27/ld/testsuite/ld-aarch64/farcall-b-plt.d 2016-11-08 16:59:06.733057238 +0000 +@@ -7,7 +7,7 @@ + + Disassembly of section .plt: + +-.* : ++.* <.plt>: + .*: a9bf7bf0 stp x16, x30, \[sp,#-16\]! + .*: .* adrp x16, .* <__foo_veneer\+.*> + .*: .* ldr x17, \[x16,#.*\] +@@ -32,7 +32,7 @@ Disassembly of section .text: + .*: .* b .* <__foo_veneer\+.*> + + .* <__foo_veneer>: +-.*: .* adrp x16, 0 ++.*: .* adrp x16, 0 <.*> + .*: .* add x16, x16, #.* + .*: d61f0200 br x16 + ... +--- binutils-2.27.orig/ld/testsuite/ld-aarch64/tls-desc-ie.d 2016-11-08 15:39:42.091556688 +0000 ++++ binutils-2.27/ld/testsuite/ld-aarch64/tls-desc-ie.d 2016-11-08 17:00:23.757503387 +0000 +@@ -4,7 +4,7 @@ + #... + +10000: 90000080 adrp x0, 20000 <_GLOBAL_OFFSET_TABLE_> + +10004: 91004000 add x0, x0, #0x10 +- +10008: 94000016 bl 10060 ++ +10008: 94000016 bl 10060 <.*> + +1000c: d503201f nop + +10010: 90000080 adrp x0, 20000 <_GLOBAL_OFFSET_TABLE_> + +10014: f9400400 ldr x0, \[x0,#8\] diff --git a/binutils-2.27-skip-rp14918-test-for-arm.patch b/binutils-2.27-skip-rp14918-test-for-arm.patch new file mode 100644 index 0000000..6c62b50 --- /dev/null +++ b/binutils-2.27-skip-rp14918-test-for-arm.patch @@ -0,0 +1,26 @@ +--- binutils-2.27.orig/ld/testsuite/ld-plugin/lto.exp 2016-09-20 14:11:51.866711051 +0100 ++++ binutils-2.27/ld/testsuite/ld-plugin/lto.exp 2016-09-20 14:18:28.528223979 +0100 +@@ -287,11 +287,21 @@ set lto_link_elf_tests [list \ + {dummy.c} {} "pr16746a.exe"] \ + [list "PR ld/16746 (2)" \ + "-O2 -flto -fuse-linker-plugin tmpdir/pr16746c.o tmpdir/pr16746a.o" "-O2 -flto" \ +- {dummy.c} {} "pr16746b.exe"] \ ++ {dummy.c} {} "pr16746b.exe"] \ ++] ++ ++# PR 14918 checks that libgcc is not spuriously included in a shared link of ++# an empty program. The ARM crt1.o startup code however calls __libc_csu_init ++# in /usr/lib/libc_nonshared.a(elf-init.oS). This in turn needs ++# __aeabi_unwind_cpp_pr0@@GCC_3.5 which is provided by libgcc_s.so.1, so the ++# test fails. Hence this code to skip the test. ++if { ! [istarget "arm*-*-*"] } { ++ set lto_link_elf_tests [concat $lto_link_elf_tests [list \ + [list "PR ld/14918" \ + "-flto" "-flto" \ + {pr14918.c} {{"readelf" {-d --wide} "pr14918.d"}} "pr14918.exe" "c"] \ +-] ++ ]] ++} + + # Check final symbols in executables. + set lto_link_symbol_tests [list \ diff --git a/binutils-2.28-gold.patch b/binutils-2.28-gold.patch new file mode 100644 index 0000000..210895b --- /dev/null +++ b/binutils-2.28-gold.patch @@ -0,0 +1,1706 @@ +diff -rup ../binutils-2.27/gold/aarch64.cc gold/aarch64.cc +--- ../binutils-2.27/gold/aarch64.cc 2016-09-26 11:22:18.728811436 +0100 ++++ gold/aarch64.cc 2016-11-03 15:05:31.000000000 +0000 +@@ -6026,6 +6026,23 @@ Target_aarch64::Scan:: + } + break; + ++ case elfcpp::R_AARCH64_MOVW_UABS_G0: // 263 ++ case elfcpp::R_AARCH64_MOVW_UABS_G0_NC: // 264 ++ case elfcpp::R_AARCH64_MOVW_UABS_G1: // 265 ++ case elfcpp::R_AARCH64_MOVW_UABS_G1_NC: // 266 ++ case elfcpp::R_AARCH64_MOVW_UABS_G2: // 267 ++ case elfcpp::R_AARCH64_MOVW_UABS_G2_NC: // 268 ++ case elfcpp::R_AARCH64_MOVW_UABS_G3: // 269 ++ case elfcpp::R_AARCH64_MOVW_SABS_G0: // 270 ++ case elfcpp::R_AARCH64_MOVW_SABS_G1: // 271 ++ case elfcpp::R_AARCH64_MOVW_SABS_G2: // 272 ++ if (parameters->options().output_is_position_independent()) ++ { ++ gold_error(_("%s: unsupported reloc %u in pos independent link."), ++ object->name().c_str(), r_type); ++ } ++ break; ++ + case elfcpp::R_AARCH64_LD_PREL_LO19: // 273 + case elfcpp::R_AARCH64_ADR_PREL_LO21: // 274 + case elfcpp::R_AARCH64_ADR_PREL_PG_HI21: // 275 +@@ -6311,6 +6328,23 @@ Target_aarch64::Scan:: + } + break; + ++ case elfcpp::R_AARCH64_MOVW_UABS_G0: // 263 ++ case elfcpp::R_AARCH64_MOVW_UABS_G0_NC: // 264 ++ case elfcpp::R_AARCH64_MOVW_UABS_G1: // 265 ++ case elfcpp::R_AARCH64_MOVW_UABS_G1_NC: // 266 ++ case elfcpp::R_AARCH64_MOVW_UABS_G2: // 267 ++ case elfcpp::R_AARCH64_MOVW_UABS_G2_NC: // 268 ++ case elfcpp::R_AARCH64_MOVW_UABS_G3: // 269 ++ case elfcpp::R_AARCH64_MOVW_SABS_G0: // 270 ++ case elfcpp::R_AARCH64_MOVW_SABS_G1: // 271 ++ case elfcpp::R_AARCH64_MOVW_SABS_G2: // 272 ++ if (parameters->options().output_is_position_independent()) ++ { ++ gold_error(_("%s: unsupported reloc %u in pos independent link."), ++ object->name().c_str(), r_type); ++ } ++ break; ++ + case elfcpp::R_AARCH64_LD_PREL_LO19: // 273 + case elfcpp::R_AARCH64_ADR_PREL_LO21: // 274 + case elfcpp::R_AARCH64_ADR_PREL_PG_HI21: // 275 +@@ -6993,6 +7027,23 @@ Target_aarch64::Reloca + view, object, psymval, addend, address, reloc_property); + break; + ++ case elfcpp::R_AARCH64_MOVW_UABS_G0: ++ case elfcpp::R_AARCH64_MOVW_UABS_G0_NC: ++ case elfcpp::R_AARCH64_MOVW_UABS_G1: ++ case elfcpp::R_AARCH64_MOVW_UABS_G1_NC: ++ case elfcpp::R_AARCH64_MOVW_UABS_G2: ++ case elfcpp::R_AARCH64_MOVW_UABS_G2_NC: ++ case elfcpp::R_AARCH64_MOVW_UABS_G3: ++ reloc_status = Reloc::template rela_general<32>( ++ view, object, psymval, addend, reloc_property); ++ break; ++ case elfcpp::R_AARCH64_MOVW_SABS_G0: ++ case elfcpp::R_AARCH64_MOVW_SABS_G1: ++ case elfcpp::R_AARCH64_MOVW_SABS_G2: ++ reloc_status = Reloc::movnz(view, psymval->value(object, addend), ++ reloc_property); ++ break; ++ + case elfcpp::R_AARCH64_LD_PREL_LO19: + reloc_status = Reloc::template pcrela_general<32>( + view, object, psymval, addend, address, reloc_property); +@@ -8075,7 +8126,7 @@ Target_aarch64::is_err + typename elfcpp::Swap<32,big_endian>::Valtype insn2) + { + uint32_t rt; +- uint32_t rt2; ++ uint32_t rt2 = 0; + uint32_t rn; + uint32_t rm; + uint32_t ra; +diff -rup ../binutils-2.27/gold/aarch64-reloc.def gold/aarch64-reloc.def +--- ../binutils-2.27/gold/aarch64-reloc.def 2016-08-03 08:36:53.000000000 +0100 ++++ gold/aarch64-reloc.def 2016-11-03 14:38:22.000000000 +0000 +@@ -43,6 +43,20 @@ ARD(PREL32 , STATI + ARD(PREL16 , STATIC , DATA , Y, -1, 15,16 , 0,0 , Symbol::RELATIVE_REF , DATA ) + // Above is from Table 4-6, Data relocations, 257-262. + ++ARD(MOVW_UABS_G0 , STATIC , AARCH64 , Y, 0, 0,16 , 0,15 , Symbol::ABSOLUTE_REF , MOVW ) ++ARD(MOVW_UABS_G0_NC , STATIC , AARCH64 , Y, 0, 0,0 , 0,15 , Symbol::ABSOLUTE_REF , MOVW ) ++ARD(MOVW_UABS_G1 , STATIC , AARCH64 , Y, 0, 0,32 , 16,31 , Symbol::ABSOLUTE_REF , MOVW ) ++ARD(MOVW_UABS_G1_NC , STATIC , AARCH64 , Y, 0, 0,0 , 16,31 , Symbol::ABSOLUTE_REF , MOVW ) ++ARD(MOVW_UABS_G2 , STATIC , AARCH64 , Y, 0, 0,48 , 32,47 , Symbol::ABSOLUTE_REF , MOVW ) ++ARD(MOVW_UABS_G2_NC , STATIC , AARCH64 , Y, 0, 0,0 , 32,47 , Symbol::ABSOLUTE_REF , MOVW ) ++ARD(MOVW_UABS_G3 , STATIC , AARCH64 , Y, 0, 0,0 , 48,63 , Symbol::ABSOLUTE_REF , MOVW ) ++// Above is from Table 4-7, Group relocations to create a 16-, 32-, 48-, or 64-bit unsigned data value or address inline. ++ ++ARD(MOVW_SABS_G0 , STATIC , AARCH64 , Y, 0, 16,16 , 0,15 , Symbol::ABSOLUTE_REF , MOVW ) ++ARD(MOVW_SABS_G1 , STATIC , AARCH64 , Y, 0, 32,32 , 16,31 , Symbol::ABSOLUTE_REF , MOVW ) ++ARD(MOVW_SABS_G2 , STATIC , AARCH64 , Y, 0, 48,48 , 32,47 , Symbol::ABSOLUTE_REF , MOVW ) ++// Above is from Table 4-8, Group relocations to create a 16, 32, 48, or 64 bit signed data or offset value inline. ++ + ARD(LD_PREL_LO19 , STATIC , AARCH64 , Y, -1, 20,20 , 2,20 , Symbol::RELATIVE_REF , LDST ) + ARD(ADR_PREL_LO21 , STATIC , AARCH64 , Y, -1, 20,20 , 0,20 , Symbol::RELATIVE_REF , ADR ) + ARD(ADR_PREL_PG_HI21 , STATIC , AARCH64 , Y, -1, 32,32 , 12,32 , Symbol::RELATIVE_REF , ADRP ) +diff -rup ../binutils-2.27/gold/aarch64-reloc-property.cc gold/aarch64-reloc-property.cc +--- ../binutils-2.27/gold/aarch64-reloc-property.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/aarch64-reloc-property.cc 2016-11-03 15:05:32.000000000 +0000 +@@ -59,17 +59,51 @@ template<> + bool + rvalue_checkup<0, 0>(int64_t) { return true; } + ++namespace ++{ ++ + template +-uint64_t +-rvalue_bit_select(uint64_t x) ++class Rvalue_bit_select_impl + { +- if (U == 63) return x >> L; +- return (x & (((uint64_t)1 << (U+1)) - 1)) >> L; +-} ++public: ++ static uint64_t ++ calc(uint64_t x) ++ { ++ return (x & ((1ULL << (U+1)) - 1)) >> L; ++ } ++}; ++ ++template ++class Rvalue_bit_select_impl ++{ ++public: ++ static uint64_t ++ calc(uint64_t x) ++ { ++ return x >> L; ++ } ++}; + ++// By our convention, L=U=0 means that the whole value should be retrieved. + template<> ++class Rvalue_bit_select_impl<0, 0> ++{ ++public: ++ static uint64_t ++ calc(uint64_t x) ++ { ++ return x; ++ } ++}; ++ ++} // End anonymous namespace. ++ ++template + uint64_t +-rvalue_bit_select<0, 0>(uint64_t x) { return x; } ++rvalue_bit_select(uint64_t x) ++{ ++ return Rvalue_bit_select_impl::calc(x); ++} + + AArch64_reloc_property::AArch64_reloc_property( + unsigned int code, +diff -rup ../binutils-2.27/gold/arm.cc gold/arm.cc +--- ../binutils-2.27/gold/arm.cc 2016-09-26 11:22:18.629810833 +0100 ++++ gold/arm.cc 2016-11-03 15:05:33.000000000 +0000 +@@ -2128,8 +2128,36 @@ class Target_arm : public Sized_target<3 + stub_tables_(), stub_factory_(Stub_factory::get_instance()), + should_force_pic_veneer_(false), + arm_input_section_map_(), attributes_section_data_(NULL), +- fix_cortex_a8_(false), cortex_a8_relocs_info_() +- { } ++ fix_cortex_a8_(false), cortex_a8_relocs_info_(), ++ target1_reloc_(elfcpp::R_ARM_ABS32), ++ // This can be any reloc type but usually is R_ARM_GOT_PREL. ++ target2_reloc_(elfcpp::R_ARM_GOT_PREL) ++ { ++ if (parameters->options().user_set_target1_rel()) ++ { ++ // FIXME: This is not strictly compatible with ld, which allows both ++ // --target1-abs and --target-rel to be given. ++ if (parameters->options().user_set_target1_abs()) ++ gold_error(_("Cannot use both --target1-abs and --target1-rel.")); ++ else ++ this->target1_reloc_ = elfcpp::R_ARM_REL32; ++ } ++ // We don't need to handle --target1-abs because target1_reloc_ is set ++ // to elfcpp::R_ARM_ABS32 in the member initializer list. ++ ++ if (parameters->options().user_set_target2()) ++ { ++ const char* target2 = parameters->options().target2(); ++ if (strcmp(target2, "rel") == 0) ++ this->target2_reloc_ = elfcpp::R_ARM_REL32; ++ else if (strcmp(target2, "abs") == 0) ++ this->target2_reloc_ = elfcpp::R_ARM_ABS32; ++ else if (strcmp(target2, "got-rel") == 0) ++ this->target2_reloc_ = elfcpp::R_ARM_GOT_PREL; ++ else ++ gold_unreachable(); ++ } ++ } + + // Whether we force PCI branch veneers. + bool +@@ -2391,8 +2419,8 @@ class Target_arm : public Sized_target<3 + rel_irelative_section(Layout*); + + // Map platform-specific reloc types +- static unsigned int +- get_real_reloc_type(unsigned int r_type); ++ unsigned int ++ get_real_reloc_type(unsigned int r_type) const; + + // + // Methods to support stub-generations. +@@ -3002,6 +3030,11 @@ class Target_arm : public Sized_target<3 + bool fix_cortex_a8_; + // Map addresses to relocs for Cortex-A8 erratum. + Cortex_a8_relocs_info cortex_a8_relocs_info_; ++ // What R_ARM_TARGET1 maps to. It can be R_ARM_REL32 or R_ARM_ABS32. ++ unsigned int target1_reloc_; ++ // What R_ARM_TARGET2 maps to. It should be one of R_ARM_REL32, R_ARM_ABS32 ++ // and R_ARM_GOT_PREL. ++ unsigned int target2_reloc_; + }; + + template +@@ -6639,6 +6672,80 @@ Arm_relobj::do_relocate_sect + section_address, + section_size); + } ++ // BE8 swapping ++ if (parameters->options().be8()) ++ { ++ section_size_type span_start, span_end; ++ elfcpp::Shdr<32, big_endian> ++ shdr(pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size); ++ Mapping_symbol_position section_start(i, 0); ++ typename Mapping_symbols_info::const_iterator p = ++ this->mapping_symbols_info_.lower_bound(section_start); ++ unsigned char* view = (*pviews)[i].view; ++ Arm_address view_address = (*pviews)[i].address; ++ section_size_type view_size = (*pviews)[i].view_size; ++ while (p != this->mapping_symbols_info_.end() ++ && p->first.first == i) ++ { ++ typename Mapping_symbols_info::const_iterator next = ++ this->mapping_symbols_info_.upper_bound(p->first); ++ ++ // Only swap arm or thumb code. ++ if ((p->second == 'a') || (p->second == 't')) ++ { ++ Output_section* os = this->output_section(i); ++ gold_assert(os != NULL); ++ Arm_address section_address = ++ this->simple_input_section_output_address(i, os); ++ span_start = convert_to_section_size_type(p->first.second); ++ if (next != this->mapping_symbols_info_.end() ++ && next->first.first == i) ++ span_end = ++ convert_to_section_size_type(next->first.second); ++ else ++ span_end = ++ convert_to_section_size_type(shdr.get_sh_size()); ++ unsigned char* section_view = ++ view + (section_address - view_address); ++ uint64_t section_size = this->section_size(i); ++ ++ gold_assert(section_address >= view_address ++ && ((section_address + section_size) ++ <= (view_address + view_size))); ++ ++ // Set Output view for swapping ++ unsigned char *oview = section_view + span_start; ++ unsigned int index = 0; ++ if (p->second == 'a') ++ { ++ while (index + 3 < (span_end - span_start)) ++ { ++ typedef typename elfcpp::Swap<32, big_endian> ++ ::Valtype Valtype; ++ Valtype* wv = ++ reinterpret_cast(oview+index); ++ uint32_t val = elfcpp::Swap<32, false>::readval(wv); ++ elfcpp::Swap<32, true>::writeval(wv, val); ++ index += 4; ++ } ++ } ++ else if (p->second == 't') ++ { ++ while (index + 1 < (span_end - span_start)) ++ { ++ typedef typename elfcpp::Swap<16, big_endian> ++ ::Valtype Valtype; ++ Valtype* wv = ++ reinterpret_cast(oview+index); ++ uint16_t val = elfcpp::Swap<16, false>::readval(wv); ++ elfcpp::Swap<16, true>::writeval(wv, val); ++ index += 2; ++ } ++ } ++ } ++ p = next; ++ } ++ } + } + } + +@@ -7785,7 +7892,18 @@ Output_data_plt_arm_standard + const size_t num_first_plt_words = (sizeof(first_plt_entry) + / sizeof(first_plt_entry[0])); + for (size_t i = 0; i < num_first_plt_words - 1; i++) +- elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]); ++ { ++ if (parameters->options().be8()) ++ { ++ elfcpp::Swap<32, false>::writeval(pov + i * 4, ++ first_plt_entry[i]); ++ } ++ else ++ { ++ elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, ++ first_plt_entry[i]); ++ } ++ } + // Last word in first PLT entry is &GOT[0] - . + elfcpp::Swap<32, big_endian>::writeval(pov + 16, + got_address - (plt_address + 16)); +@@ -7846,11 +7964,21 @@ Output_data_plt_arm_short::d + gold_error(_("PLT offset too large, try linking with --long-plt")); + + uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff); +- elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); + uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff); +- elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); + uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff); +- elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); ++ ++ if (parameters->options().be8()) ++ { ++ elfcpp::Swap<32, false>::writeval(pov, plt_insn0); ++ elfcpp::Swap<32, false>::writeval(pov + 4, plt_insn1); ++ elfcpp::Swap<32, false>::writeval(pov + 8, plt_insn2); ++ } ++ else ++ { ++ elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); ++ elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); ++ elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); ++ } + } + + // This class generates long (16-byte) entries, for arbitrary displacements. +@@ -7906,13 +8034,24 @@ Output_data_plt_arm_long::do + - (plt_address + plt_offset + 8)); + + uint32_t plt_insn0 = plt_entry[0] | (offset >> 28); +- elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); + uint32_t plt_insn1 = plt_entry[1] | ((offset >> 20) & 0xff); +- elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); + uint32_t plt_insn2 = plt_entry[2] | ((offset >> 12) & 0xff); +- elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); + uint32_t plt_insn3 = plt_entry[3] | (offset & 0xfff); +- elfcpp::Swap<32, big_endian>::writeval(pov + 12, plt_insn3); ++ ++ if (parameters->options().be8()) ++ { ++ elfcpp::Swap<32, false>::writeval(pov, plt_insn0); ++ elfcpp::Swap<32, false>::writeval(pov + 4, plt_insn1); ++ elfcpp::Swap<32, false>::writeval(pov + 8, plt_insn2); ++ elfcpp::Swap<32, false>::writeval(pov + 12, plt_insn3); ++ } ++ else ++ { ++ elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0); ++ elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1); ++ elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2); ++ elfcpp::Swap<32, big_endian>::writeval(pov + 12, plt_insn3); ++ } + } + + // Write out the PLT. This uses the hand-coded instructions above, +@@ -8414,7 +8553,7 @@ Target_arm::Scan::local(Symb + if (is_discarded) + return; + +- r_type = get_real_reloc_type(r_type); ++ r_type = target->get_real_reloc_type(r_type); + + // A local STT_GNU_IFUNC symbol may require a PLT entry. + bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC; +@@ -8820,7 +8959,7 @@ Target_arm::Scan::global(Sym + && this->reloc_needs_plt_for_ifunc(object, r_type)) + target->make_plt_entry(symtab, layout, gsym); + +- r_type = get_real_reloc_type(r_type); ++ r_type = target->get_real_reloc_type(r_type); + switch (r_type) + { + case elfcpp::R_ARM_NONE: +@@ -9446,7 +9585,7 @@ Target_arm::Relocate::reloca + + const elfcpp::Rel<32, big_endian> rel(preloc); + unsigned int r_type = elfcpp::elf_r_type<32>(rel.get_r_info()); +- r_type = get_real_reloc_type(r_type); ++ r_type = target->get_real_reloc_type(r_type); + const Arm_reloc_property* reloc_property = + arm_reloc_property_table->get_implemented_static_reloc_property(r_type); + if (reloc_property == NULL) +@@ -10156,7 +10295,9 @@ Target_arm::Classify_reloc:: + unsigned int r_type, + Relobj* object) + { +- r_type = get_real_reloc_type(r_type); ++ Target_arm* arm_target = ++ Target_arm::default_target(); ++ r_type = arm_target->get_real_reloc_type(r_type); + const Arm_reloc_property* arp = + arm_reloc_property_table->get_implemented_static_reloc_property(r_type); + if (arp != NULL) +@@ -10580,17 +10721,15 @@ Target_arm::do_dynsym_value( + // + template + unsigned int +-Target_arm::get_real_reloc_type(unsigned int r_type) ++Target_arm::get_real_reloc_type(unsigned int r_type) const + { + switch (r_type) + { + case elfcpp::R_ARM_TARGET1: +- // This is either R_ARM_ABS32 or R_ARM_REL32; +- return elfcpp::R_ARM_ABS32; ++ return this->target1_reloc_; + + case elfcpp::R_ARM_TARGET2: +- // This can be any reloc type but usually is R_ARM_GOT_PREL +- return elfcpp::R_ARM_GOT_PREL; ++ return this->target2_reloc_; + + default: + return r_type; +@@ -10683,7 +10822,14 @@ Target_arm::do_adjust_elf_he + e_ident[elfcpp::EI_OSABI] = 0; + e_ident[elfcpp::EI_ABIVERSION] = 0; + +- // FIXME: Do EF_ARM_BE8 adjustment. ++ // Do EF_ARM_BE8 adjustment. ++ if (parameters->options().be8() && !big_endian) ++ gold_error("BE8 images only valid in big-endian mode."); ++ if (parameters->options().be8()) ++ { ++ flags |= elfcpp::EF_ARM_BE8; ++ this->set_processor_specific_flags(flags); ++ } + + // If we're working in EABI_VER5, set the hard/soft float ABI flags + // as appropriate. +diff -rup ../binutils-2.27/gold/configure gold/configure +--- ../binutils-2.27/gold/configure 2016-09-26 11:22:19.027813254 +0100 ++++ gold/configure 2016-11-03 14:38:22.000000000 +0000 +@@ -609,6 +609,7 @@ GOLD_LDFLAGS + WARN_CXXFLAGS + WARN_WRITE_STRINGS + NO_WERROR ++WARN_CFLAGS_FOR_BUILD + WARN_CFLAGS + IFUNC_STATIC_FALSE + IFUNC_STATIC_TRUE +@@ -6723,8 +6724,12 @@ fi + # Set the 'development' global. + . $srcdir/../bfd/development.sh + ++# Set acp_cpp_for_build variable ++ac_cpp_for_build="$CC_FOR_BUILD -E $CPPFLAGS_FOR_BUILD" ++ + # Default set of GCC warnings to enable. + GCC_WARN_CFLAGS="-W -Wall -Wstrict-prototypes -Wmissing-prototypes" ++GCC_WARN_CFLAGS_FOR_BUILD="-W -Wall -Wstrict-prototypes -Wmissing-prototypes" + + # Add -Wshadow if the compiler is a sufficiently recent version of GCC. + cat confdefs.h - <<_ACEOF >conftest.$ac_ext +@@ -6769,6 +6774,36 @@ fi + rm -f conftest* + + ++# Verify CC_FOR_BUILD to be compatible with waring flags ++ ++# Add -Wshadow if the compiler is a sufficiently recent version of GCC. ++cat confdefs.h - <<_ACEOF >conftest.$ac_ext ++/* end confdefs.h. */ ++__GNUC__ ++_ACEOF ++if (eval "$ac_cpp_for_build conftest.$ac_ext") 2>&5 | ++ $EGREP "^[0-3]$" >/dev/null 2>&1; then : ++ ++else ++ GCC_WARN_CFLAGS_FOR_BUILD="$GCC_WARN_CFLAGS_FOR_BUILD -Wshadow" ++fi ++rm -f conftest* ++ ++ ++# Add -Wstack-usage if the compiler is a sufficiently recent version of GCC. ++cat confdefs.h - <<_ACEOF >conftest.$ac_ext ++/* end confdefs.h. */ ++__GNUC__ ++_ACEOF ++if (eval "$ac_cpp_for_build conftest.$ac_ext") 2>&5 | ++ $EGREP "^[0-4]$" >/dev/null 2>&1; then : ++ ++else ++ GCC_WARN_CFLAGS_FOR_BUILD="$GCC_WARN_CFLAGS_FOR_BUILD -Wstack-usage=262144" ++fi ++rm -f conftest* ++ ++ + # Check whether --enable-werror was given. + if test "${enable_werror+set}" = set; then : + enableval=$enable_werror; case "${enableval}" in +@@ -6784,6 +6819,7 @@ case "${host}" in + *-*-mingw32*) + if test "${GCC}" = yes -a -z "${ERROR_ON_WARNING}" ; then + GCC_WARN_CFLAGS="$GCC_WARN_CFLAGS -Wno-format" ++ GCC_WARN_CFLAGS_FOR_BUILD="$GCC_WARN_CFLAGS_FOR_BUILD -Wno-format" + fi + ;; + *) ;; +@@ -6797,25 +6833,32 @@ fi + NO_WERROR= + if test "${ERROR_ON_WARNING}" = yes ; then + GCC_WARN_CFLAGS="$GCC_WARN_CFLAGS -Werror" ++ GCC_WARN_CFLAGS_FOR_BUILD="$GCC_WARN_CFLAGS_FOR_BUILD -Werror" + NO_WERROR="-Wno-error" + fi + + if test "${GCC}" = yes ; then + WARN_CFLAGS="${GCC_WARN_CFLAGS}" ++ WARN_CFLAGS_FOR_BUILD="${GCC_WARN_CFLAGS_FOR_BUILD}" + fi + + # Check whether --enable-build-warnings was given. + if test "${enable_build_warnings+set}" = set; then : + enableval=$enable_build_warnings; case "${enableval}" in +- yes) WARN_CFLAGS="${GCC_WARN_CFLAGS}";; ++ yes) WARN_CFLAGS="${GCC_WARN_CFLAGS}" ++ WARN_CFLAGS_FOR_BUILD="${GCC_WARN_CFLAGS_FOR_BUILD}";; + no) if test "${GCC}" = yes ; then + WARN_CFLAGS="-w" ++ WARN_CFLAGS_FOR_BUILD="-w" + fi;; + ,*) t=`echo "${enableval}" | sed -e "s/,/ /g"` +- WARN_CFLAGS="${GCC_WARN_CFLAGS} ${t}";; ++ WARN_CFLAGS="${GCC_WARN_CFLAGS} ${t}" ++ WARN_CFLAGS_FOR_BUILD="${GCC_WARN_CFLAGS_FOR_BUILD} ${t}";; + *,) t=`echo "${enableval}" | sed -e "s/,/ /g"` +- WARN_CFLAGS="${t} ${GCC_WARN_CFLAGS}";; +- *) WARN_CFLAGS=`echo "${enableval}" | sed -e "s/,/ /g"`;; ++ WARN_CFLAGS="${t} ${GCC_WARN_CFLAGS}" ++ WARN_CFLAGS_FOR_BUILD="${t} ${GCC_WARN_CFLAGS_FOR_BUILD}";; ++ *) WARN_CFLAGS=`echo "${enableval}" | sed -e "s/,/ /g"` ++ WARN_CFLAGS_FOR_BUILD=`echo "${enableval}" | sed -e "s/,/ /g"`;; + esac + fi + +diff -rup ../binutils-2.27/gold/debug.h gold/debug.h +--- ../binutils-2.27/gold/debug.h 2016-08-03 08:36:53.000000000 +0100 ++++ gold/debug.h 2016-11-03 15:05:05.000000000 +0000 +@@ -39,10 +39,11 @@ const int DEBUG_FILES = 0x4; + const int DEBUG_RELAXATION = 0x8; + const int DEBUG_INCREMENTAL = 0x10; + const int DEBUG_LOCATION = 0x20; ++const int DEBUG_TARGET = 0x40; + + const int DEBUG_ALL = (DEBUG_TASK | DEBUG_SCRIPT | DEBUG_FILES + | DEBUG_RELAXATION | DEBUG_INCREMENTAL +- | DEBUG_LOCATION); ++ | DEBUG_LOCATION | DEBUG_TARGET); + + // Convert a debug string to the appropriate enum. + inline int +@@ -57,6 +58,7 @@ debug_string_to_enum(const char* arg) + { "relaxation", DEBUG_RELAXATION }, + { "incremental", DEBUG_INCREMENTAL }, + { "location", DEBUG_LOCATION }, ++ { "target", DEBUG_TARGET }, + { "all", DEBUG_ALL } + }; + +@@ -70,11 +72,11 @@ debug_string_to_enum(const char* arg) + // Print a debug message if TYPE is enabled. This is a macro so that + // we only evaluate the arguments if necessary. + +-#define gold_debug(TYPE, FORMAT, ...) \ ++#define gold_debug(TYPE, ...) \ + do \ + { \ + if (is_debugging_enabled(TYPE)) \ +- parameters->errors()->debug(FORMAT, __VA_ARGS__); \ ++ parameters->errors()->debug(__VA_ARGS__); \ + } \ + while (0) + +diff -rup ../binutils-2.27/gold/i386.cc gold/i386.cc +--- ../binutils-2.27/gold/i386.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/i386.cc 2016-11-03 15:05:40.000000000 +0000 +@@ -2794,8 +2794,11 @@ Target_i386::Relocate::relocate(const Re + && r_type != elfcpp::R_386_PC32) + || gsym == NULL + || strcmp(gsym->name(), "___tls_get_addr") != 0) +- gold_error_at_location(relinfo, relnum, rel.get_r_offset(), +- _("missing expected TLS relocation")); ++ { ++ gold_error_at_location(relinfo, relnum, rel.get_r_offset(), ++ _("missing expected TLS relocation")); ++ this->skip_call_tls_get_addr_ = false; ++ } + else + { + this->skip_call_tls_get_addr_ = false; +diff -rup ../binutils-2.27/gold/icf.cc gold/icf.cc +--- ../binutils-2.27/gold/icf.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/icf.cc 2016-11-03 15:05:40.000000000 +0000 +@@ -590,6 +590,7 @@ match_sections(unsigned int iteration_nu + std::vector* num_tracked_relocs, + std::vector* kept_section_id, + const std::vector& id_section, ++ const std::vector& section_addraligns, + std::vector* is_secn_or_group_unique, + std::vector* section_contents) + { +@@ -630,13 +631,7 @@ match_sections(unsigned int iteration_nu + { + if ((*kept_section_id)[i] != i) + { +- // This section is already folded into something. See +- // if it should point to a different kept section. +- unsigned int kept_section = (*kept_section_id)[i]; +- if (kept_section != (*kept_section_id)[kept_section]) +- { +- (*kept_section_id)[i] = (*kept_section_id)[kept_section]; +- } ++ // This section is already folded into something. + continue; + } + this_secn_contents = get_section_contents(false, secn, i, NULL, +@@ -671,7 +666,25 @@ match_sections(unsigned int iteration_nu + this_secn_contents.c_str(), + this_secn_contents.length()) != 0) + continue; +- (*kept_section_id)[i] = kept_section; ++ ++ // Check section alignment here. ++ // The section with the larger alignment requirement ++ // should be kept. We assume alignment can only be ++ // zero or postive integral powers of two. ++ uint64_t align_i = section_addraligns[i]; ++ uint64_t align_kept = section_addraligns[kept_section]; ++ if (align_i <= align_kept) ++ { ++ (*kept_section_id)[i] = kept_section; ++ } ++ else ++ { ++ (*kept_section_id)[kept_section] = i; ++ it->second = i; ++ full_section_contents[kept_section].swap( ++ full_section_contents[i]); ++ } ++ + converged = false; + break; + } +@@ -688,6 +701,26 @@ match_sections(unsigned int iteration_nu + (*is_secn_or_group_unique)[i] = true; + } + ++ // If a section was folded into another section that was later folded ++ // again then the former has to be updated. ++ for (unsigned int i = 0; i < id_section.size(); i++) ++ { ++ // Find the end of the folding chain ++ unsigned int kept = i; ++ while ((*kept_section_id)[kept] != kept) ++ { ++ kept = (*kept_section_id)[kept]; ++ } ++ // Update every element of the chain ++ unsigned int current = i; ++ while ((*kept_section_id)[current] != kept) ++ { ++ unsigned int next = (*kept_section_id)[current]; ++ (*kept_section_id)[current] = kept; ++ current = next; ++ } ++ } ++ + return converged; + } + +@@ -719,6 +752,7 @@ Icf::find_identical_sections(const Input + { + unsigned int section_num = 0; + std::vector num_tracked_relocs; ++ std::vector section_addraligns; + std::vector is_secn_or_group_unique; + std::vector section_contents; + const Target& target = parameters->target(); +@@ -759,6 +793,7 @@ Icf::find_identical_sections(const Input + this->section_id_[Section_id(*p, i)] = section_num; + this->kept_section_id_.push_back(section_num); + num_tracked_relocs.push_back(0); ++ section_addraligns.push_back((*p)->section_addralign(i)); + is_secn_or_group_unique.push_back(false); + section_contents.push_back(""); + section_num++; +@@ -779,8 +814,8 @@ Icf::find_identical_sections(const Input + num_iterations++; + converged = match_sections(num_iterations, symtab, + &num_tracked_relocs, &this->kept_section_id_, +- this->id_section_, &is_secn_or_group_unique, +- §ion_contents); ++ this->id_section_, section_addraligns, ++ &is_secn_or_group_unique, §ion_contents); + } + + if (parameters->options().print_icf_sections()) +diff -rup ../binutils-2.27/gold/layout.cc gold/layout.cc +--- ../binutils-2.27/gold/layout.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/layout.cc 2016-11-03 15:05:42.000000000 +0000 +@@ -2135,7 +2135,7 @@ void + Layout::create_notes() + { + this->create_gold_note(); +- this->create_executable_stack_info(); ++ this->create_stack_segment(); + this->create_build_id(); + } + +@@ -2785,7 +2785,7 @@ Layout::finalize(const Input_objects* in + if (load_seg != NULL) + ehdr_start->set_output_segment(load_seg, Symbol::SEGMENT_START); + else +- ehdr_start->set_undefined(); ++ ehdr_start->set_undefined(); + } + + // Set the file offsets of all the non-data sections we've seen so +@@ -2985,25 +2985,29 @@ Layout::create_gold_note() + // executable. Otherwise, if at least one input file a + // .note.GNU-stack section, and some input file has no .note.GNU-stack + // section, we use the target default for whether the stack should be +-// executable. Otherwise, we don't generate a stack note. When +-// generating a object file, we create a .note.GNU-stack section with +-// the appropriate marking. When generating an executable or shared +-// library, we create a PT_GNU_STACK segment. ++// executable. If -z stack-size was used to set a p_memsz value for ++// PT_GNU_STACK, we generate the segment regardless. Otherwise, we ++// don't generate a stack note. When generating a object file, we ++// create a .note.GNU-stack section with the appropriate marking. ++// When generating an executable or shared library, we create a ++// PT_GNU_STACK segment. + + void +-Layout::create_executable_stack_info() ++Layout::create_stack_segment() + { + bool is_stack_executable; + if (parameters->options().is_execstack_set()) + { + is_stack_executable = parameters->options().is_stack_executable(); + if (!is_stack_executable +- && this->input_requires_executable_stack_ +- && parameters->options().warn_execstack()) ++ && this->input_requires_executable_stack_ ++ && parameters->options().warn_execstack()) + gold_warning(_("one or more inputs require executable stack, " +- "but -z noexecstack was given")); ++ "but -z noexecstack was given")); + } +- else if (!this->input_with_gnu_stack_note_) ++ else if (!this->input_with_gnu_stack_note_ ++ && (!parameters->options().user_set_stack_size() ++ || parameters->options().relocatable())) + return; + else + { +@@ -3032,7 +3036,12 @@ Layout::create_executable_stack_info() + int flags = elfcpp::PF_R | elfcpp::PF_W; + if (is_stack_executable) + flags |= elfcpp::PF_X; +- this->make_output_segment(elfcpp::PT_GNU_STACK, flags); ++ Output_segment* seg = ++ this->make_output_segment(elfcpp::PT_GNU_STACK, flags); ++ seg->set_size(parameters->options().stack_size()); ++ // BFD lets targets override this default alignment, but the only ++ // targets that do so are ones that Gold does not support so far. ++ seg->set_minimum_p_align(16); + } + } + +@@ -3718,7 +3727,9 @@ Layout::set_segment_offsets(const Target + p != this->segment_list_.end(); + ++p) + { +- if ((*p)->type() != elfcpp::PT_LOAD) ++ // PT_GNU_STACK was set up correctly when it was created. ++ if ((*p)->type() != elfcpp::PT_LOAD ++ && (*p)->type() != elfcpp::PT_GNU_STACK) + (*p)->set_offset((*p)->type() == elfcpp::PT_GNU_RELRO + ? increase_relro + : 0); +diff -rup ../binutils-2.27/gold/layout.h gold/layout.h +--- ../binutils-2.27/gold/layout.h 2016-08-03 08:36:53.000000000 +0100 ++++ gold/layout.h 2016-11-03 15:05:12.000000000 +0000 +@@ -1037,9 +1037,9 @@ class Layout + void + create_gold_note(); + +- // Record whether the stack must be executable. ++ // Record whether the stack must be executable, and a user-supplied size. + void +- create_executable_stack_info(); ++ create_stack_segment(); + + // Create a build ID note if needed. + void +diff -rup ../binutils-2.27/gold/Makefile.in gold/Makefile.in +--- ../binutils-2.27/gold/Makefile.in 2016-08-03 08:36:53.000000000 +0100 ++++ gold/Makefile.in 2016-11-03 14:38:22.000000000 +0000 +@@ -87,8 +87,8 @@ subdir = . + DIST_COMMON = NEWS README ChangeLog $(srcdir)/Makefile.in \ + $(srcdir)/Makefile.am $(top_srcdir)/configure \ + $(am__configure_deps) $(srcdir)/config.in \ +- $(srcdir)/../mkinstalldirs $(top_srcdir)/po/Make-in \ +- ftruncate.c pread.c mremap.c ffsll.c yyscript.h yyscript.c \ ++ $(srcdir)/../mkinstalldirs $(top_srcdir)/po/Make-in ffsll.c \ ++ mremap.c ftruncate.c pread.c yyscript.h yyscript.c \ + $(srcdir)/../depcomp $(srcdir)/../ylwrap + ACLOCAL_M4 = $(top_srcdir)/aclocal.m4 + am__aclocal_m4_deps = $(top_srcdir)/../config/depstand.m4 \ +@@ -409,6 +409,7 @@ TARGETOBJS = @TARGETOBJS@ + USE_NLS = @USE_NLS@ + VERSION = @VERSION@ + WARN_CFLAGS = @WARN_CFLAGS@ ++WARN_CFLAGS_FOR_BUILD = @WARN_CFLAGS_FOR_BUILD@ + WARN_CXXFLAGS = @WARN_CXXFLAGS@ + WARN_WRITE_STRINGS = @WARN_WRITE_STRINGS@ + XGETTEXT = @XGETTEXT@ +diff -rup ../binutils-2.27/gold/options.h gold/options.h +--- ../binutils-2.27/gold/options.h 2016-08-03 08:36:53.000000000 +0100 ++++ gold/options.h 2016-11-03 15:05:13.000000000 +0000 +@@ -647,7 +647,7 @@ class General_options + DEFINE_bool(apply_dynamic_relocs, options::TWO_DASHES, '\0', true, + N_("Apply link-time values for dynamic relocations (default)"), + N_("(aarch64 only) Do not apply link-time values " +- "for dynamic relocations")); ++ "for dynamic relocations")); + + DEFINE_bool(as_needed, options::TWO_DASHES, '\0', false, + N_("Only set DT_NEEDED for shared libraries if used"), +@@ -674,6 +674,9 @@ class General_options + DEFINE_bool_alias(dn, Bdynamic, options::ONE_DASH, '\0', + N_("alias for -Bstatic"), NULL, true); + ++ DEFINE_bool(be8,options::TWO_DASHES, '\0', false, ++ N_("Output BE8 format image"), NULL); ++ + DEFINE_bool(Bgroup, options::ONE_DASH, '\0', false, + N_("Use group name lookup rules for shared library"), NULL); + +@@ -1152,6 +1155,17 @@ class General_options + DEFINE_string(sysroot, options::TWO_DASHES, '\0', "", + N_("Set target system root directory"), N_("DIR")); + ++ DEFINE_bool(target1_rel, options::TWO_DASHES, '\0', false, ++ N_("(ARM only) Force R_ARM_TARGET1 type to R_ARM_REL32"), ++ NULL); ++ DEFINE_bool(target1_abs, options::TWO_DASHES, '\0', false, ++ N_("(ARM only) Force R_ARM_TARGET1 type to R_ARM_ABS32"), ++ NULL); ++ DEFINE_enum(target2, options::TWO_DASHES, '\0', NULL, ++ N_("(ARM only) Set R_ARM_TARGET2 relocation type"), ++ N_("[rel, abs, got-rel"), ++ {"rel", "abs", "got-rel"}); ++ + DEFINE_bool(trace, options::TWO_DASHES, 't', false, + N_("Print the name of each input file"), NULL); + +@@ -1293,7 +1307,7 @@ class General_options + N_("Mark output as requiring executable stack"), NULL); + DEFINE_bool(global, options::DASH_Z, '\0', false, + N_("Make symbols in DSO available for subsequently loaded " +- "objects"), NULL); ++ "objects"), NULL); + DEFINE_bool(initfirst, options::DASH_Z, '\0', false, + N_("Mark DSO to be initialized first at runtime"), + NULL); +@@ -1339,6 +1353,8 @@ class General_options + DEFINE_bool(relro, options::DASH_Z, '\0', DEFAULT_LD_Z_RELRO, + N_("Where possible mark variables read-only after relocation"), + N_("Don't mark variables read-only after relocation")); ++ DEFINE_uint64(stack_size, options::DASH_Z, '\0', 0, ++ N_("Set PT_GNU_STACK segment p_memsz to SIZE"), N_("SIZE")); + DEFINE_bool(text, options::DASH_Z, '\0', false, + N_("Do not permit relocations in read-only segments"), + N_("Permit relocations in read-only segments (default)")); +diff -rup ../binutils-2.27/gold/output.cc gold/output.cc +--- ../binutils-2.27/gold/output.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/output.cc 2016-11-03 15:05:44.000000000 +0000 +@@ -4398,7 +4398,7 @@ Output_segment::set_section_addresses(co + this->offset_ = orig_off; + + off_t off = 0; +- uint64_t ret; ++ uint64_t ret = 0; + for (int i = 0; i < static_cast(ORDER_MAX); ++i) + { + if (i == static_cast(ORDER_RELRO_LAST)) +diff -rup ../binutils-2.27/gold/output.h gold/output.h +--- ../binutils-2.27/gold/output.h 2016-08-03 08:36:53.000000000 +0100 ++++ gold/output.h 2016-11-03 15:05:14.000000000 +0000 +@@ -2499,7 +2499,7 @@ class Output_data_got : public Output_da + // entry. + bool + add_local(Relobj* object, unsigned int sym_index, unsigned int got_type, +- uint64_t addend); ++ uint64_t addend); + + // Like add_local, but use the PLT offset of the local symbol if it + // has one. +@@ -2643,7 +2643,7 @@ class Output_data_got : public Output_da + + // Create a local symbol entry plus addend. + Got_entry(Relobj* object, unsigned int local_sym_index, +- bool use_plt_or_tls_offset, uint64_t addend) ++ bool use_plt_or_tls_offset, uint64_t addend) + : local_sym_index_(local_sym_index), + use_plt_or_tls_offset_(use_plt_or_tls_offset), addend_(addend) + { +@@ -4796,6 +4796,13 @@ class Output_segment + this->min_p_align_ = align; + } + ++ // Set the memory size of this segment. ++ void ++ set_size(uint64_t size) ++ { ++ this->memsz_ = size; ++ } ++ + // Set the offset of this segment based on the section. This should + // only be called for a non-PT_LOAD segment. + void +diff -rup ../binutils-2.27/gold/powerpc.cc gold/powerpc.cc +--- ../binutils-2.27/gold/powerpc.cc 2016-09-26 11:22:18.717811369 +0100 ++++ gold/powerpc.cc 2016-11-03 15:05:45.000000000 +0000 +@@ -2439,9 +2439,8 @@ class Stub_control + // the stubbed branches. + Stub_control(int32_t size, bool no_size_errors) + : state_(NO_GROUP), stub_group_size_(abs(size)), +- stub14_group_size_(abs(size) >> 10), + stubs_always_before_branch_(size < 0), +- suppress_size_errors_(no_size_errors), ++ suppress_size_errors_(no_size_errors), group_size_(0), + group_end_addr_(0), owner_(NULL), output_section_(NULL) + { + } +@@ -2479,24 +2478,28 @@ class Stub_control + + State state_; + uint32_t stub_group_size_; +- uint32_t stub14_group_size_; + bool stubs_always_before_branch_; + bool suppress_size_errors_; ++ // Current max size of group. Starts at stub_group_size_ but is ++ // reduced to stub_group_size_/1024 on seeing a section with ++ // external conditional branches. ++ uint32_t group_size_; + uint64_t group_end_addr_; ++ // owner_ and output_section_ specify the section to which stubs are ++ // attached. The stubs are placed at the end of this section. + const Output_section::Input_section* owner_; + Output_section* output_section_; + }; + + // Return true iff input section can be handled by current stub +-// group. ++// group. Sections are presented to this function in reverse order, ++// so the first section is the tail of the group. + + bool + Stub_control::can_add_to_stub_group(Output_section* o, + const Output_section::Input_section* i, + bool has14) + { +- uint32_t group_size +- = has14 ? this->stub14_group_size_ : this->stub_group_size_; + bool whole_sec = o->order() == ORDER_INIT || o->order() == ORDER_FINI; + uint64_t this_size; + uint64_t start_addr = o->address(); +@@ -2510,46 +2513,90 @@ Stub_control::can_add_to_stub_group(Outp + start_addr += i->relobj()->output_section_offset(i->shndx()); + this_size = i->data_size(); + } +- uint64_t end_addr = start_addr + this_size; +- bool toobig = this_size > group_size; + +- if (toobig && !this->suppress_size_errors_) ++ uint32_t group_size = this->stub_group_size_; ++ if (has14) ++ this->group_size_ = group_size = group_size >> 10; ++ ++ if (this_size > group_size && !this->suppress_size_errors_) + gold_warning(_("%s:%s exceeds group size"), + i->relobj()->name().c_str(), + i->relobj()->section_name(i->shndx()).c_str()); + +- if (this->state_ != HAS_STUB_SECTION +- && (!whole_sec || this->output_section_ != o) +- && (this->state_ == NO_GROUP +- || this->group_end_addr_ - end_addr < group_size)) +- { +- this->owner_ = i; +- this->output_section_ = o; +- } +- +- if (this->state_ == NO_GROUP) +- { +- this->state_ = FINDING_STUB_SECTION; +- this->group_end_addr_ = end_addr; +- } +- else if (this->group_end_addr_ - start_addr < group_size) +- ; +- // Adding this section would make the group larger than GROUP_SIZE. +- else if (this->state_ == FINDING_STUB_SECTION +- && !this->stubs_always_before_branch_ +- && !toobig) +- { +- // But wait, there's more! Input sections up to GROUP_SIZE +- // bytes before the stub table can be handled by it too. +- this->state_ = HAS_STUB_SECTION; +- this->group_end_addr_ = end_addr; ++ gold_debug(DEBUG_TARGET, "maybe add%s %s:%s size=%#llx total=%#llx", ++ has14 ? " 14bit" : "", ++ i->relobj()->name().c_str(), ++ i->relobj()->section_name(i->shndx()).c_str(), ++ (long long) this_size, ++ (long long) this->group_end_addr_ - start_addr); ++ ++ uint64_t end_addr = start_addr + this_size; ++ if (this->state_ == HAS_STUB_SECTION) ++ { ++ // Can we add this section, which is before the stubs, to the ++ // group? ++ if (this->group_end_addr_ - start_addr <= this->group_size_) ++ return true; + } + else + { +- this->state_ = NO_GROUP; +- return false; ++ // Stubs are added at the end of "owner_". ++ // The current section can always be the stub owner, except when ++ // whole_sec is true and the current section isn't the last of ++ // the pasted sections. (This restriction for the whole_sec ++ // case is just to simplify the corner case mentioned in ++ // group_sections.) ++ // Note that "owner_" itself is not necessarily part of the ++ // group of sections served by these stubs! ++ if (!whole_sec || this->output_section_ != o) ++ { ++ this->owner_ = i; ++ this->output_section_ = o; ++ } ++ ++ if (this->state_ == FINDING_STUB_SECTION) ++ { ++ if (this->group_end_addr_ - start_addr <= this->group_size_) ++ return true; ++ // The group after the stubs has reached maximum size. ++ // Now see about adding sections before the stubs to the ++ // group. If the current section has a 14-bit branch and ++ // the group after the stubs exceeds group_size_ (because ++ // they didn't have 14-bit branches), don't add sections ++ // before the stubs: The size of stubs for such a large ++ // group may exceed the reach of a 14-bit branch. ++ if (!this->stubs_always_before_branch_ ++ && this_size <= this->group_size_ ++ && this->group_end_addr_ - end_addr <= this->group_size_) ++ { ++ gold_debug(DEBUG_TARGET, "adding before stubs"); ++ this->state_ = HAS_STUB_SECTION; ++ this->group_end_addr_ = end_addr; ++ return true; ++ } ++ } ++ else if (this->state_ == NO_GROUP) ++ { ++ // Only here on very first use of Stub_control ++ this->state_ = FINDING_STUB_SECTION; ++ this->group_size_ = group_size; ++ this->group_end_addr_ = end_addr; ++ return true; ++ } ++ else ++ gold_unreachable(); + } +- return true; ++ ++ gold_debug(DEBUG_TARGET, "nope, didn't fit\n"); ++ ++ // The section fails to fit in the current group. Set up a few ++ // things for the next group. owner_ and output_section_ will be ++ // set later after we've retrieved those values for the current ++ // group. ++ this->state_ = FINDING_STUB_SECTION; ++ this->group_size_ = group_size; ++ this->group_end_addr_ = end_addr; ++ return false; + } + + // Look over all the input sections, deciding where to place stubs. +@@ -2887,7 +2934,7 @@ Target_powerpc::do_rel + } + this->stub_tables_.clear(); + this->stub_group_size_ = this->stub_group_size_ / 4 * 3; +- gold_info(_("%s: stub group size is too large; retrying with %d"), ++ gold_info(_("%s: stub group size is too large; retrying with %#x"), + program_name, this->stub_group_size_); + this->group_sections(layout, task, true); + } +@@ -2982,7 +3029,13 @@ Target_powerpc::do_rel + Stub_table* stub_table + = static_cast*>( + i->relaxed_input_section()); +- off += stub_table->set_address_and_size(os, off); ++ Address stub_table_size = stub_table->set_address_and_size(os, off); ++ off += stub_table_size; ++ // After a few iterations, set current stub table size ++ // as min size threshold, so later stub tables can only ++ // grow in size. ++ if (pass >= 4) ++ stub_table->set_min_size_threshold(stub_table_size); + } + else + off += i->data_size(); +@@ -3634,8 +3687,8 @@ class Stub_table : public Output_relaxed + targ_(targ), plt_call_stubs_(), long_branch_stubs_(), + orig_data_size_(owner->current_data_size()), + plt_size_(0), last_plt_size_(0), +- branch_size_(0), last_branch_size_(0), eh_frame_added_(false), +- need_save_res_(false) ++ branch_size_(0), last_branch_size_(0), min_size_threshold_(0), ++ eh_frame_added_(false), need_save_res_(false) + { + this->set_output_section(output_section); + +@@ -3726,6 +3779,11 @@ class Stub_table : public Output_relaxed + off = align_address(off, this->stub_align()); + // Include original section size and alignment padding in size + my_size += off - start_off; ++ // Ensure new size is always larger than min size ++ // threshold. Alignment requirement is included in "my_size", so ++ // increase "my_size" does not invalidate alignment. ++ if (my_size < this->min_size_threshold_) ++ my_size = this->min_size_threshold_; + this->reset_address_and_file_offset(); + this->set_current_data_size(my_size); + this->set_address_and_file_offset(os->address() + start_off, +@@ -3751,6 +3809,9 @@ class Stub_table : public Output_relaxed + plt_size() const + { return this->plt_size_; } + ++ void set_min_size_threshold(Address min_size) ++ { this->min_size_threshold_ = min_size; } ++ + bool + size_update() + { +@@ -4015,6 +4076,13 @@ class Stub_table : public Output_relaxed + section_size_type orig_data_size_; + // size of stubs + section_size_type plt_size_, last_plt_size_, branch_size_, last_branch_size_; ++ // Some rare cases cause (PR/20529) fluctuation in stub table ++ // size, which leads to an endless relax loop. This is to be fixed ++ // by, after the first few iterations, allowing only increase of ++ // stub table size. This variable sets the minimal possible size of ++ // a stub table, it is zero for the first few iterations, then ++ // increases monotonically. ++ Address min_size_threshold_; + // Whether .eh_frame info has been created for this stub section. + bool eh_frame_added_; + // Set if this stub group needs a copy of out-of-line register +@@ -6024,7 +6092,7 @@ Target_powerpc::Scan:: + ppc_object->set_opd_discard(reloc.get_r_offset()); + break; + } +- // Fall thru ++ // Fall through. + case elfcpp::R_PPC64_UADDR64: + case elfcpp::R_POWERPC_ADDR32: + case elfcpp::R_POWERPC_UADDR32: +@@ -6131,7 +6199,7 @@ Target_powerpc::Scan:: + || gsym->is_preemptible()))) + target->make_plt_entry(symtab, layout, gsym); + } +- // Fall thru ++ // Fall through. + + case elfcpp::R_PPC64_REL64: + case elfcpp::R_POWERPC_REL32: +@@ -7521,6 +7589,7 @@ Target_powerpc::Reloca + if (size != 64) + // R_PPC_TLSGD, R_PPC_TLSLD, R_PPC_EMB_RELST_LO, R_PPC_EMB_RELST_HI + break; ++ // Fall through. + case elfcpp::R_POWERPC_TPREL16: + case elfcpp::R_POWERPC_TPREL16_LO: + case elfcpp::R_POWERPC_TPREL16_HI: +@@ -7544,6 +7613,7 @@ Target_powerpc::Reloca + // R_PPC_EMB_NADDR32, R_PPC_EMB_NADDR16, R_PPC_EMB_NADDR16_LO + // R_PPC_EMB_NADDR16_HI, R_PPC_EMB_NADDR16_HA, R_PPC_EMB_SDAI16 + break; ++ // Fall through. + case elfcpp::R_POWERPC_DTPREL16: + case elfcpp::R_POWERPC_DTPREL16_LO: + case elfcpp::R_POWERPC_DTPREL16_HI: +@@ -7572,6 +7642,7 @@ Target_powerpc::Reloca + case elfcpp::R_POWERPC_ADDR14_BRTAKEN: + case elfcpp::R_POWERPC_REL14_BRTAKEN: + branch_bit = 1 << 21; ++ // Fall through. + case elfcpp::R_POWERPC_ADDR14_BRNTAKEN: + case elfcpp::R_POWERPC_REL14_BRNTAKEN: + { +@@ -7936,6 +8007,7 @@ Target_powerpc::Reloca + maybe_dq_reloc = true; + break; + } ++ // Fall through. + case elfcpp::R_POWERPC_ADDR16: + case elfcpp::R_POWERPC_REL16: + case elfcpp::R_PPC64_TOC16: +@@ -7970,6 +8042,7 @@ Target_powerpc::Reloca + if (size == 32) + // R_PPC_EMB_MRKREF, R_PPC_EMB_RELST_LO, R_PPC_EMB_RELST_HA + goto unsupp; ++ // Fall through. + case elfcpp::R_POWERPC_ADDR16_HI: + case elfcpp::R_POWERPC_REL16_HI: + case elfcpp::R_PPC64_TOC16_HI: +@@ -7990,6 +8063,7 @@ Target_powerpc::Reloca + if (size == 32) + // R_PPC_EMB_RELSEC16, R_PPC_EMB_RELST_HI, R_PPC_EMB_BIT_FLD + goto unsupp; ++ // Fall through. + case elfcpp::R_POWERPC_ADDR16_HA: + case elfcpp::R_POWERPC_REL16_HA: + case elfcpp::R_PPC64_TOC16_HA: +@@ -8012,6 +8086,7 @@ Target_powerpc::Reloca + if (size == 32) + // R_PPC_EMB_NADDR16_LO + goto unsupp; ++ // Fall through. + case elfcpp::R_PPC64_ADDR16_HIGHER: + case elfcpp::R_PPC64_TPREL16_HIGHER: + Reloc::addr16_hi2(view, value); +@@ -8021,6 +8096,7 @@ Target_powerpc::Reloca + if (size == 32) + // R_PPC_EMB_NADDR16_HI + goto unsupp; ++ // Fall through. + case elfcpp::R_PPC64_ADDR16_HIGHERA: + case elfcpp::R_PPC64_TPREL16_HIGHERA: + Reloc::addr16_ha2(view, value); +@@ -8030,6 +8106,7 @@ Target_powerpc::Reloca + if (size == 32) + // R_PPC_EMB_NADDR16_HA + goto unsupp; ++ // Fall through. + case elfcpp::R_PPC64_ADDR16_HIGHEST: + case elfcpp::R_PPC64_TPREL16_HIGHEST: + Reloc::addr16_hi3(view, value); +@@ -8039,6 +8116,7 @@ Target_powerpc::Reloca + if (size == 32) + // R_PPC_EMB_SDAI16 + goto unsupp; ++ // Fall through. + case elfcpp::R_PPC64_ADDR16_HIGHESTA: + case elfcpp::R_PPC64_TPREL16_HIGHESTA: + Reloc::addr16_ha3(view, value); +@@ -8049,11 +8127,13 @@ Target_powerpc::Reloca + if (size == 32) + // R_PPC_EMB_NADDR32, R_PPC_EMB_NADDR16 + goto unsupp; ++ // Fall through. + case elfcpp::R_PPC64_TPREL16_DS: + case elfcpp::R_PPC64_TPREL16_LO_DS: + if (size == 32) + // R_PPC_TLSGD, R_PPC_TLSLD + break; ++ // Fall through. + case elfcpp::R_PPC64_ADDR16_DS: + case elfcpp::R_PPC64_ADDR16_LO_DS: + case elfcpp::R_PPC64_TOC16_DS: +diff -rup ../binutils-2.27/gold/resolve.cc gold/resolve.cc +--- ../binutils-2.27/gold/resolve.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/resolve.cc 2016-11-03 15:05:47.000000000 +0000 +@@ -193,6 +193,7 @@ symbol_to_bits(elfcpp::STB binding, bool + // table. + gold_error(_("invalid STB_LOCAL symbol in external symbols")); + bits = global_flag; ++ break; + + default: + // Any target which wants to handle STB_LOOS, etc., needs to +diff -rup ../binutils-2.27/gold/script.cc gold/script.cc +--- ../binutils-2.27/gold/script.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/script.cc 2016-11-03 15:05:47.000000000 +0000 +@@ -1755,6 +1755,7 @@ script_keyword_parsecodes[] = + { "FLOAT", FLOAT }, + { "FORCE_COMMON_ALLOCATION", FORCE_COMMON_ALLOCATION }, + { "GROUP", GROUP }, ++ { "HIDDEN", HIDDEN }, + { "HLL", HLL }, + { "INCLUDE", INCLUDE }, + { "INFO", INFO }, +diff -rup ../binutils-2.27/gold/script-sections.cc gold/script-sections.cc +--- ../binutils-2.27/gold/script-sections.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/script-sections.cc 2016-11-03 15:05:48.000000000 +0000 +@@ -1503,7 +1503,7 @@ class Input_section_info + private: + // Input section, can be a relaxed section. + Output_section::Input_section input_section_; +- // Name of the section. ++ // Name of the section. + std::string section_name_; + // Section size. + uint64_t size_; +@@ -1545,7 +1545,7 @@ Input_section_sorter::get_init_priority( + // GCC uses the following section names for the init_priority + // attribute with numerical values 101 and 65535 inclusive. A + // lower value means a higher priority. +- // ++ // + // 1: .init_array.NNNN/.fini_array.NNNN: Where NNNN is the + // decimal numerical value of the init_priority attribute. + // The order of execution in .init_array is forward and +@@ -1666,7 +1666,7 @@ Output_section_element_input::set_sectio + while (p != input_sections->end()) + { + Relobj* relobj = p->relobj(); +- unsigned int shndx = p->shndx(); ++ unsigned int shndx = p->shndx(); + Input_section_info isi(*p); + + // Calling section_name and section_addralign is not very +@@ -1758,7 +1758,7 @@ Output_section_element_input::set_sectio + + uint64_t this_subalign = sis.addralign(); + if (!sis.is_input_section()) +- sis.output_section_data()->finalize_data_size(); ++ sis.output_section_data()->finalize_data_size(); + uint64_t data_size = sis.data_size(); + if (this_subalign < subalign) + { +@@ -2029,7 +2029,7 @@ class Output_section_definition : public + void + set_section_vma(Expression* address) + { this->address_ = address; } +- ++ + void + set_section_lma(Expression* address) + { this->load_address_ = address; } +@@ -2037,7 +2037,7 @@ class Output_section_definition : public + const std::string& + get_section_name() const + { return this->name_; } +- ++ + private: + static const char* + script_section_type_name(Script_section_type); +@@ -2402,9 +2402,9 @@ Output_section_definition::set_section_a + uint64_t old_load_address = *load_address; + + // If input section sorting is requested via --section-ordering-file or +- // linker plugins, then do it here. This is important because we want ++ // linker plugins, then do it here. This is important because we want + // any sorting specified in the linker scripts, which will be done after +- // this, to take precedence. The final order of input sections is then ++ // this, to take precedence. The final order of input sections is then + // guaranteed to be according to the linker script specification. + if (this->output_section_ != NULL + && this->output_section_->input_section_order_specified()) +@@ -2495,7 +2495,7 @@ Output_section_definition::set_section_a + // The LMA address was explicitly set to the given region. + laddr = lma_region->get_current_address()->eval(symtab, layout, + false); +- else ++ else + { + // We are not going to use the discovered lma_region, so + // make sure that we do not update it in the code below. +@@ -2987,9 +2987,9 @@ Orphan_output_section::set_section_addre + address = align_address(address, this->os_->addralign()); + + // If input section sorting is requested via --section-ordering-file or +- // linker plugins, then do it here. This is important because we want ++ // linker plugins, then do it here. This is important because we want + // any sorting specified in the linker scripts, which will be done after +- // this, to take precedence. The final order of input sections is then ++ // this, to take precedence. The final order of input sections is then + // guaranteed to be according to the linker script specification. + if (this->os_ != NULL + && this->os_->input_section_order_specified()) +@@ -3023,7 +3023,7 @@ Orphan_output_section::set_section_addre + { + uint64_t addralign = p->addralign(); + if (!p->is_input_section()) +- p->output_section_data()->finalize_data_size(); ++ p->output_section_data()->finalize_data_size(); + uint64_t size = p->data_size(); + address = align_address(address, addralign); + this->os_->add_script_input_section(*p); +@@ -3605,7 +3605,7 @@ Output_segment* + Script_sections::set_section_addresses(Symbol_table* symtab, Layout* layout) + { + gold_assert(this->saw_sections_clause_); +- ++ + // Implement ONLY_IF_RO/ONLY_IF_RW constraints. These are a pain + // for our representation. + for (Sections_elements::iterator p = this->sections_elements_->begin(); +@@ -3674,7 +3674,7 @@ Script_sections::set_section_addresses(S + Output_section* os = (*p)->get_output_section(); + + // Handle -Ttext, -Tdata and -Tbss options. We do this by looking for +- // the special sections by names and doing dot assignments. ++ // the special sections by names and doing dot assignments. + if (use_tsection_options + && os != NULL + && (os->flags() & elfcpp::SHF_ALLOC) != 0) +@@ -3703,7 +3703,7 @@ Script_sections::set_section_addresses(S + + (*p)->set_section_addresses(symtab, layout, &dot_value, &dot_alignment, + &load_address); +- } ++ } + + if (this->phdrs_elements_ != NULL) + { +@@ -3890,7 +3890,7 @@ Script_sections::create_segments(Layout* + layout->get_allocated_sections(§ions); + + // Sort the sections by address. +- std::stable_sort(sections.begin(), sections.end(), ++ std::stable_sort(sections.begin(), sections.end(), + Sort_output_sections(this->sections_elements_)); + + this->create_note_and_tls_segments(layout, §ions); +@@ -4217,7 +4217,7 @@ Script_sections::attach_sections_using_p + // Output sections in the script which do not list segments are + // attached to the same set of segments as the immediately preceding + // output section. +- ++ + String_list* phdr_names = NULL; + bool load_segments_only = false; + for (Sections_elements::const_iterator p = this->sections_elements_->begin(); +@@ -4262,7 +4262,7 @@ Script_sections::attach_sections_using_p + // filtering. + if (old_phdr_names != phdr_names) + load_segments_only = false; +- ++ + // If this is an orphan section--one that was not explicitly + // mentioned in the linker script--then it should not inherit + // any segment type other than PT_LOAD. Otherwise, e.g., the +@@ -4459,6 +4459,7 @@ Script_sections::release_segments() + ++p) + (*p)->release_segment(); + } ++ this->segments_created_ = false; + } + + // Print the SECTIONS clause to F for debugging. +diff -rup ../binutils-2.27/gold/sparc.cc gold/sparc.cc +--- ../binutils-2.27/gold/sparc.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/sparc.cc 2016-11-03 15:05:48.000000000 +0000 +@@ -2150,6 +2150,7 @@ Target_sparc::Scan::ch + case elfcpp::R_SPARC_RELATIVE: + case elfcpp::R_SPARC_IRELATIVE: + case elfcpp::R_SPARC_COPY: ++ case elfcpp::R_SPARC_32: + case elfcpp::R_SPARC_64: + case elfcpp::R_SPARC_GLOB_DAT: + case elfcpp::R_SPARC_JMP_SLOT: +@@ -2304,7 +2305,7 @@ Target_sparc::Scan::lo + reloc.get_r_addend(), is_ifunc); + break; + } +- /* Fall through. */ ++ // Fall through. + + case elfcpp::R_SPARC_HIX22: + case elfcpp::R_SPARC_LOX10: +@@ -2814,6 +2815,7 @@ Target_sparc::Scan::gl + // and code transform the GOT load into an addition. + break; + } ++ // Fall through. + case elfcpp::R_SPARC_GOT10: + case elfcpp::R_SPARC_GOT13: + case elfcpp::R_SPARC_GOT22: +@@ -3353,6 +3355,7 @@ Target_sparc::Relocate + gdop_valid = true; + break; + } ++ // Fall through. + case elfcpp::R_SPARC_GOT10: + case elfcpp::R_SPARC_GOT13: + case elfcpp::R_SPARC_GOT22: +@@ -3468,6 +3471,13 @@ Target_sparc::Relocate + Reloc::lo10(view, object, psymval, addend); + break; + ++ case elfcpp::R_SPARC_GOTDATA_OP_LOX10: ++ if (gdop_valid) ++ { ++ Reloc::gdop_lox10(view, got_offset); ++ break; ++ } ++ // Fall through. + case elfcpp::R_SPARC_GOT10: + Reloc::lo10(view, got_offset, addend); + break; +@@ -3486,13 +3496,6 @@ Target_sparc::Relocate + } + break; + +- case elfcpp::R_SPARC_GOTDATA_OP_LOX10: +- if (gdop_valid) +- { +- Reloc::gdop_lox10(view, got_offset); +- break; +- } +- /* Fall through. */ + case elfcpp::R_SPARC_GOT13: + Reloc::rela32_13(view, got_offset, addend); + break; +@@ -3503,7 +3506,7 @@ Target_sparc::Relocate + Reloc::gdop_hix22(view, got_offset); + break; + } +- /* Fall through. */ ++ // Fall through. + case elfcpp::R_SPARC_GOT22: + Reloc::hi22(view, got_offset, addend); + break; +diff -rup ../binutils-2.27/gold/symtab.cc gold/symtab.cc +--- ../binutils-2.27/gold/symtab.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/symtab.cc 2016-11-03 15:05:49.000000000 +0000 +@@ -882,6 +882,7 @@ Symbol_table::define_default_version(Siz + ; + else if (pdef->second->is_from_dynobj() + && sym->is_from_dynobj() ++ && pdef->second->is_defined() + && pdef->second->object() != sym->object()) + ; + else +@@ -1325,6 +1326,9 @@ Symbol_table::add_from_relobj( + res = this->add_from_object(relobj, name, name_key, ver, ver_key, + is_default_version, *psym, st_shndx, + is_ordinary, orig_st_shndx); ++ ++ if (res == NULL) ++ continue; + + if (is_forced_local) + this->force_local(res); +@@ -1406,6 +1410,9 @@ Symbol_table::add_from_pluginobj( + is_default_version, *sym, st_shndx, + is_ordinary, st_shndx); + ++ if (res == NULL) ++ return NULL; ++ + if (is_forced_local) + this->force_local(res); + +@@ -1602,6 +1609,9 @@ Symbol_table::add_from_dynobj( + } + } + ++ if (res == NULL) ++ continue; ++ + // Note that it is possible that RES was overridden by an + // earlier object, in which case it can't be aliased here. + if (st_shndx != elfcpp::SHN_UNDEF +@@ -1640,7 +1650,6 @@ Symbol_table::add_from_incrobj( + + Stringpool::Key ver_key = 0; + bool is_default_version = false; +- bool is_forced_local = false; + + Stringpool::Key name_key; + name = this->namepool_.add(name, true, &name_key); +@@ -1650,9 +1659,6 @@ Symbol_table::add_from_incrobj( + is_default_version, *sym, st_shndx, + is_ordinary, st_shndx); + +- if (is_forced_local) +- this->force_local(res); +- + return res; + } + +diff -rup ../binutils-2.27/gold/tilegx.cc gold/tilegx.cc +--- ../binutils-2.27/gold/tilegx.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/tilegx.cc 2016-11-03 15:05:50.000000000 +0000 +@@ -4428,6 +4428,7 @@ Target_tilegx::Relocat + psymval = &symval; + always_apply_relocation = true; + addend = 0; ++ // Fall through. + + // when under PIC mode, these relocations are deferred to rtld + case elfcpp::R_TILEGX_IMM16_X0_HW0: +@@ -4618,6 +4619,7 @@ Target_tilegx::Relocat + got_type = GOT_TYPE_TLS_OFFSET; + have_got_offset = true; + } ++ // Fall through. + do_update_value: + if (have_got_offset) { + if (gsym != NULL) { +@@ -4647,10 +4649,8 @@ Target_tilegx::Relocat + } // else if (opt_t == tls::TLSOPT_TO_LE) + // both GD/IE are turned into LE, which + // is absolute relocation. +- // +- // | go through +- // | +- // V ++ // Fall through. ++ + // LE + // + // tp +diff -rup ../binutils-2.27/gold/x86_64.cc gold/x86_64.cc +--- ../binutils-2.27/gold/x86_64.cc 2016-08-03 08:36:53.000000000 +0100 ++++ gold/x86_64.cc 2016-11-03 15:05:52.000000000 +0000 +@@ -2361,7 +2361,7 @@ Target_x86_64::Scan::check_non_pic + && !gsym->is_undefined() + && !gsym->is_preemptible())) + return; +- /* Fall through. */ ++ // Fall through. + case elfcpp::R_X86_64_32: + // R_X86_64_32 is OK for x32. + if (size == 32 && r_type == elfcpp::R_X86_64_32) +@@ -3505,6 +3505,7 @@ Target_x86_64::Relocate::relocate( + if (this->skip_call_tls_get_addr_) + { + if ((r_type != elfcpp::R_X86_64_PLT32 ++ && r_type != elfcpp::R_X86_64_GOTPCREL + && r_type != elfcpp::R_X86_64_GOTPCRELX + && r_type != elfcpp::R_X86_64_PLT32_BND + && r_type != elfcpp::R_X86_64_PC32_BND +@@ -3514,6 +3515,7 @@ Target_x86_64::Relocate::relocate( + { + gold_error_at_location(relinfo, relnum, rela.get_r_offset(), + _("missing expected TLS relocation")); ++ this->skip_call_tls_get_addr_ = false; + } + else + { +diff -rup ../binutils-2.27/gold/yyscript.y gold/yyscript.y +--- ../binutils-2.27/gold/yyscript.y 2016-08-03 08:36:53.000000000 +0100 ++++ gold/yyscript.y 2016-11-03 15:05:59.000000000 +0000 +@@ -137,6 +137,7 @@ + %token FORCE_COMMON_ALLOCATION + %token GLOBAL /* global */ + %token GROUP ++%token HIDDEN + %token HLL + %token INCLUDE + %token INHIBIT_COMMON_ALLOCATION +@@ -864,6 +865,8 @@ assignment: + Expression_ptr e = script_exp_binary_bitwise_or(s, $3); + script_set_symbol(closure, $1.value, $1.length, e, 0, 0); + } ++ | HIDDEN '(' string '=' parse_exp ')' ++ { script_set_symbol(closure, $3.value, $3.length, $5, 0, 1); } + | PROVIDE '(' string '=' parse_exp ')' + { script_set_symbol(closure, $3.value, $3.length, $5, 1, 0); } + | PROVIDE_HIDDEN '(' string '=' parse_exp ')' diff --git a/cross-binutils.spec b/cross-binutils.spec index 9d2baea..024e8c2 100644 --- a/cross-binutils.spec +++ b/cross-binutils.spec @@ -57,7 +57,7 @@ Summary: A GNU collection of cross-compilation binary utilities Name: %{cross}-binutils Version: 2.27 -Release: 3%{?dist} +Release: 4%{?dist} License: GPLv3+ Group: Development/Tools URL: http://sources.redhat.com/binutils @@ -74,8 +74,7 @@ Source2: binutils-2.19.50.0.1-output-format.sed Patch01: binutils-2.20.51.0.2-libtool-lib64.patch Patch02: binutils-2.20.51.0.10-ppc64-pie.patch -# patch 03 has bitrotted -Patch03: binutils-2.20.51.0.2-ia64-lib64.patch +# Patch03: binutils-2.20.51.0.2-ia64-lib64.patch Patch04: binutils-2.25-version.patch Patch05: binutils-2.25-set-long-long.patch Patch06: binutils-2.20.51.0.10-sec-merge-emit.patch @@ -99,6 +98,14 @@ Patch15: binutils-2.27-local-dynsym-count.patch Patch16: binutils-2.27-monotonic-section-offsets.patch # Make ARM and AArch64 ports properly support relro on by default. Patch17: binutils-2.27-arm-aarch64-default-relro.patch +# Skip PR14918 linker test for ARM native targets. +Patch18: binutils-2.27-skip-rp14918-test-for-arm.patch +# Fix GOLD for ARM/AARCh64. +Patch19: binutils-2.28-gold.patch +# Improve objdump's disassembly of dynamic executables. +Patch20: binutils-2.27-objdump-improvements.patch +# Improve objdump's speed when mixing disassembly with source code +Patch21: binutils-2.27-dwarf-parse-speedup.patch %if %{build_sh64} Patch100: cross-binutils-2.25-fixup-for-sh64.patch @@ -241,6 +248,10 @@ cd %{srcdir} %patch15 -p1 %patch16 -p1 %patch17 -p1 +%patch18 -p1 +%patch19 -p0 +%patch20 -p1 +%patch21 -p1 %if %{build_sh64} %patch100 -p1 -b .sh64-fixup~ @@ -373,7 +384,7 @@ function config_target () { CARGS= case $target in i?86*|sparc*|ppc*|powerpc*|s390*|sh*|arm*) - CARGS="$CARGS --enable-64-bit-bfd" + CARGS="$CARGS --enable-64-bit-bfd --enable-targets=x86_64-pep" ;; esac @@ -710,6 +721,9 @@ rm -rf %{buildroot} %do_files xtensa-linux-gnu %{build_xtensa} %changelog +* Fri Dec 9 2016 David Howells - 2.27-4 +- Sync with binutils-2.27-12. + * Thu Sep 15 2016 David Howells - 2.27-3 - Added version to obsoletion of sh64. - Fix changelog date.