From 41db4b5c9178896710632d4eff889359da8f105e Mon Sep 17 00:00:00 2001
From: Filipe Rosset <rosset.filipe@gmail.com>
Date: Apr 09 2018 00:39:55 +0000
Subject: - added gcc as BR


---

diff --git a/irsim.spec b/irsim.spec
index 8c3cbbd..e3a7b9a 100644
--- a/irsim.spec
+++ b/irsim.spec
@@ -1,12 +1,13 @@
 Name:             irsim
 Version:          9.7.96
-Release:          2%{?dist}
+Release:          3%{?dist}
 Summary:          Switch-level simulator used even for VLSI
 
 License:          GPLv2
 Group:            Applications/Engineering
 URL:              http://opencircuitdesign.com/%{name}
 Source0:          http://opencircuitdesign.com/%{name}/archive/%{name}-%{version}.tgz
+BuildRequires:    gcc
 BuildRequires:    tk-devel m4 libXt-devel
 
 %description
@@ -17,7 +18,7 @@ bit more realistic than the ideal, using the RC time constants to predict the
 relative timing of events.
 
 %prep
-%setup -q
+%autosetup
 
 %build
 # ./configure kills CFLAGS
@@ -41,6 +42,9 @@ rm -rf %{buildroot}%{_libdir}/%{name}/doc/
 
 
 %Changelog
+* Mon Apr 09 2018 Filipe Rosset <rosset.filipe@gmail.com> - 9.7.96-3
+- added gcc as BR
+
 * Wed Feb 07 2018 Fedora Release Engineering <releng@fedoraproject.org> - 9.7.96-2
 - Rebuilt for https://fedoraproject.org/wiki/Fedora_28_Mass_Rebuild