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From a21211672c9a1d730a39aa65d4a5b3414700adfb Mon Sep 17 00:00:00 2001
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From: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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Date: Wed, 23 Mar 2016 21:07:39 -0700
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Subject: [PATCH] ACPI / processor: Request native thermal interrupt handling
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via _OSC
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There are several reports of freeze on enabling HWP (Hardware PStates)
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feature on Skylake-based systems by the Intel P-states driver. The root
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cause is identified as the HWP interrupts causing BIOS code to freeze.
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HWP interrupts use the thermal LVT which can be handled by Linux
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natively, but on the affected Skylake-based systems SMM will respond
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to it by default. This is a problem for several reasons:
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- On the affected systems the SMM thermal LVT handler is broken (it
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will crash when invoked) and a BIOS update is necessary to fix it.
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- With thermal interrupt handled in SMM we lose all of the reporting
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features of the arch/x86/kernel/cpu/mcheck/therm_throt driver.
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- Some thermal drivers like x86-package-temp depend on the thermal
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threshold interrupts signaled via the thermal LVT.
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- The HWP interrupts are useful for debugging and tuning
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performance (if the kernel can handle them).
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The native handling of thermal interrupts needs to be enabled
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because of that.
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This requires some way to tell SMM that the OS can handle thermal
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interrupts. That can be done by using _OSC/_PDC in processor
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scope very early during ACPI initialization.
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The meaning of _OSC/_PDC bit 12 in processor scope is whether or
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not the OS supports native handling of interrupts for Collaborative
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Processor Performance Control (CPPC) notifications. Since on
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HWP-capable systems CPPC is a firmware interface to HWP, setting
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this bit effectively tells the firmware that the OS will handle
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thermal interrupts natively going forward.
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For details on _OSC/_PDC refer to:
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http://www.intel.com/content/www/us/en/standards/processor-vendor-specific-acpi-specification.html
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To implement the _OSC/_PDC handshake as described, introduce a new
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function, acpi_early_processor_osc(), that walks the ACPI
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namespace looking for ACPI processor objects and invokes _OSC for
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them with bit 12 in the capabilities buffer set and terminates the
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namespace walk on the first success.
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Also modify intel_thermal_interrupt() to clear HWP status bits in
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the HWP_STATUS MSR to acknowledge HWP interrupts (which prevents
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them from firing continuously).
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Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
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[ rjw: Subject & changelog, function rename ]
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Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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---
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arch/x86/kernel/cpu/mcheck/therm_throt.c | 3 ++
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drivers/acpi/acpi_processor.c | 52 ++++++++++++++++++++++++++++++++
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drivers/acpi/bus.c | 3 ++
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drivers/acpi/internal.h | 6 ++++
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4 files changed, 64 insertions(+)
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diff --git a/arch/x86/kernel/cpu/mcheck/therm_throt.c b/arch/x86/kernel/cpu/mcheck/therm_throt.c
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index 2c5aaf8..0553858 100644
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--- a/arch/x86/kernel/cpu/mcheck/therm_throt.c
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+++ b/arch/x86/kernel/cpu/mcheck/therm_throt.c
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@@ -385,6 +385,9 @@ static void intel_thermal_interrupt(void)
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{
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__u64 msr_val;
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+ if (static_cpu_has(X86_FEATURE_HWP))
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+ wrmsrl_safe(MSR_HWP_STATUS, 0);
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+
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rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
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/* Check for violation of core thermal thresholds*/
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diff --git a/drivers/acpi/acpi_processor.c b/drivers/acpi/acpi_processor.c
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index b5e54f2..0d92d0f 100644
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--- a/drivers/acpi/acpi_processor.c
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+++ b/drivers/acpi/acpi_processor.c
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@@ -491,6 +491,58 @@ static void acpi_processor_remove(struct acpi_device *device)
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}
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#endif /* CONFIG_ACPI_HOTPLUG_CPU */
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+#ifdef CONFIG_X86
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+static bool acpi_hwp_native_thermal_lvt_set;
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+static acpi_status __init acpi_hwp_native_thermal_lvt_osc(acpi_handle handle,
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+ u32 lvl,
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+ void *context,
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+ void **rv)
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+{
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+ u8 sb_uuid_str[] = "4077A616-290C-47BE-9EBD-D87058713953";
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+ u32 capbuf[2];
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+ struct acpi_osc_context osc_context = {
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+ .uuid_str = sb_uuid_str,
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+ .rev = 1,
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+ .cap.length = 8,
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+ .cap.pointer = capbuf,
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+ };
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+
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+ if (acpi_hwp_native_thermal_lvt_set)
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+ return AE_CTRL_TERMINATE;
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+
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+ capbuf[0] = 0x0000;
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+ capbuf[1] = 0x1000; /* set bit 12 */
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+
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+ if (ACPI_SUCCESS(acpi_run_osc(handle, &osc_context))) {
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+ if (osc_context.ret.pointer && osc_context.ret.length > 1) {
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+ u32 *capbuf_ret = osc_context.ret.pointer;
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+
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+ if (capbuf_ret[1] & 0x1000) {
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+ acpi_handle_info(handle,
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+ "_OSC native thermal LVT Acked\n");
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+ acpi_hwp_native_thermal_lvt_set = true;
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+ }
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+ }
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+ kfree(osc_context.ret.pointer);
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+ }
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+
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+ return AE_OK;
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+}
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+
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+void __init acpi_early_processor_osc(void)
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+{
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+ if (boot_cpu_has(X86_FEATURE_HWP)) {
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+ acpi_walk_namespace(ACPI_TYPE_PROCESSOR, ACPI_ROOT_OBJECT,
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+ ACPI_UINT32_MAX,
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+ acpi_hwp_native_thermal_lvt_osc,
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+ NULL, NULL, NULL);
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+ acpi_get_devices(ACPI_PROCESSOR_DEVICE_HID,
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+ acpi_hwp_native_thermal_lvt_osc,
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+ NULL, NULL);
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+ }
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+}
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+#endif
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+
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/*
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* The following ACPI IDs are known to be suitable for representing as
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* processor devices.
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diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c
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index 891c42d..f9081b7 100644
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--- a/drivers/acpi/bus.c
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+++ b/drivers/acpi/bus.c
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@@ -1005,6 +1005,9 @@ static int __init acpi_bus_init(void)
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goto error1;
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}
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+ /* Set capability bits for _OSC under processor scope */
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+ acpi_early_processor_osc();
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+
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/*
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* _OSC method may exist in module level code,
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* so it must be run after ACPI_FULL_INITIALIZATION
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diff --git a/drivers/acpi/internal.h b/drivers/acpi/internal.h
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index 1e6833a..6f41c73 100644
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--- a/drivers/acpi/internal.h
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+++ b/drivers/acpi/internal.h
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@@ -138,6 +138,12 @@ void acpi_early_processor_set_pdc(void);
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static inline void acpi_early_processor_set_pdc(void) {}
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#endif
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+#ifdef CONFIG_X86
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+void acpi_early_processor_osc(void);
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+#else
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+static inline void acpi_early_processor_osc(void) {}
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+#endif
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+
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/* --------------------------------------------------------------------------
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Embedded Controller
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-------------------------------------------------------------------------- */
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--
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2.5.5
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