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From cd21ce996b94fd149b3487398e5250e9f0cc8811 Mon Sep 17 00:00:00 2001
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From: Fedora Kernel Team <kernel-team@fedoraproject.org>
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Date: Mon, 20 Jun 2016 12:39:24 +0200
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Subject: [PATCH 05/17] drm/i915/gen9: Store plane minimum blocks in CRTC wm
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state (v2)
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Upstream: since drm-intel-next-2016-05-22
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commit 86a2100a8b96594902bb59b90614377df4f64ce0
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Author: Matt Roper <matthew.d.roper@intel.com>
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AuthorDate: Thu May 12 07:05:59 2016 -0700
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Commit: Matt Roper <matthew.d.roper@intel.com>
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CommitDate: Fri May 13 07:32:56 2016 -0700
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drm/i915/gen9: Store plane minimum blocks in CRTC wm state (v2)
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This will eventually allow us to re-use old values without
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re-calculating them for unchanged planes (which also helps us avoid
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re-grabbing extra plane states).
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v2:
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- Drop unnecessary memset's; they were meant for a later patch (which
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got reworked anyway to not need them, but were mis-rebased into this
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one. (Maarten)
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Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
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Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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Link: http://patchwork.freedesktop.org/patch/msgid/1463061971-19638-6-git-send-email-matthew.d.roper@intel.com
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---
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drivers/gpu/drm/i915/intel_drv.h | 4 ++++
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drivers/gpu/drm/i915/intel_pm.c | 4 ++--
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2 files changed, 6 insertions(+), 2 deletions(-)
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diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
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index 7c00ab6..d246308 100644
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--- a/drivers/gpu/drm/i915/intel_drv.h
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+++ b/drivers/gpu/drm/i915/intel_drv.h
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@@ -389,6 +389,10 @@ struct intel_crtc_wm_state {
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/* cached plane data rate */
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unsigned plane_data_rate[I915_MAX_PLANES];
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unsigned plane_y_data_rate[I915_MAX_PLANES];
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+
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+ /* minimum block allocation */
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+ uint16_t minimum_blocks[I915_MAX_PLANES];
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+ uint16_t minimum_y_blocks[I915_MAX_PLANES];
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} skl;
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};
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diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
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index b863bfc..00db6e9 100644
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--- a/drivers/gpu/drm/i915/intel_pm.c
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+++ b/drivers/gpu/drm/i915/intel_pm.c
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@@ -3006,8 +3006,8 @@ skl_allocate_pipe_ddb(struct intel_crtc_state *cstate,
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enum pipe pipe = intel_crtc->pipe;
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struct skl_ddb_entry *alloc = &ddb->pipe[pipe];
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uint16_t alloc_size, start, cursor_blocks;
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- uint16_t minimum[I915_MAX_PLANES];
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- uint16_t y_minimum[I915_MAX_PLANES];
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+ uint16_t *minimum = cstate->wm.skl.minimum_blocks;
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+ uint16_t *y_minimum = cstate->wm.skl.minimum_y_blocks;
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unsigned int total_data_rate;
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skl_ddb_get_pipe_allocation_limits(dev, cstate, config, alloc);
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--
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2.7.4
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