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dbc4a9b |
From: Robert Nelson <robertcnelson@gmail.com>
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dbc4a9b |
Date: Tue, 31 Dec 2013 14:18:00 -0600
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dbc4a9b |
Subject: [PATCH] arm: dts: am335x-bone-common: setup default pinmux
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dbc4a9b |
http://elinux.org/Basic_Proto_Cape
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dbc4a9b |
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dbc4a9b |
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
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dbc4a9b |
---
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09b0646 |
arch/arm/boot/dts/am335x-bone-common.dtsi | 222 ++++++++++++++++++++++++++++++
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09b0646 |
1 file changed, 222 insertions(+)
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dbc4a9b |
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dbc4a9b |
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
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af2152e |
index b2e14381dd1c..853079eb0080 100644
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dbc4a9b |
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
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dbc4a9b |
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
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09b0646 |
@@ -95,6 +95,20 @@
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dbc4a9b |
>;
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dbc4a9b |
};
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dbc4a9b |
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dbc4a9b |
+ uart1_pins: pinmux_uart1_pins {
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dbc4a9b |
+ pinctrl-single,pins = <
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dbc4a9b |
+ 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
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dbc4a9b |
+ 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
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dbc4a9b |
+ >;
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dbc4a9b |
+ };
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dbc4a9b |
+
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09b0646 |
+ uart1_pins: pinmux_uart1_pins {
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09b0646 |
+ pinctrl-single,pins = <
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09b0646 |
+ 0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
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09b0646 |
+ 0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
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09b0646 |
+ >;
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09b0646 |
+ };
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09b0646 |
+
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dbc4a9b |
clkout2_pin: pinmux_clkout2_pin {
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pinctrl-single,pins = <
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dbc4a9b |
0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
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09b0646 |
@@ -175,6 +189,60 @@
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dbc4a9b |
0x1c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
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dbc4a9b |
>;
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dbc4a9b |
};
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dbc4a9b |
+
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dbc4a9b |
+ spi0_pins: pinmux_spi0_pins {
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dbc4a9b |
+ pinctrl-single,pins = <
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dbc4a9b |
+ 0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
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dbc4a9b |
+ 0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
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dbc4a9b |
+ 0x158 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
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dbc4a9b |
+ 0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
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dbc4a9b |
+ >;
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dbc4a9b |
+ };
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dbc4a9b |
+
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dbc4a9b |
+ ehrpwm1_pin_p9_14: pinmux_ehrpwm1_pin_p9_14 {
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dbc4a9b |
+ pinctrl-single,pins = <
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dbc4a9b |
+ 0x048 0x6 /* P9_14 (ZCZ ball U14) | MODE 6 */
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dbc4a9b |
+ >;
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dbc4a9b |
+ };
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dbc4a9b |
+
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dbc4a9b |
+ ehrpwm1_pin_p9_16: pinmux_ehrpwm1_pin_p9_16 {
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dbc4a9b |
+ pinctrl-single,pins = <
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dbc4a9b |
+ 0x04c 0x6 /* P9_16 (ZCZ ball T14) | MODE 6 */
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dbc4a9b |
+ >;
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dbc4a9b |
+ };
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dbc4a9b |
+
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dbc4a9b |
+ ecap0_pin_p9_42: pinmux_ecap0_pin_p9_42 {
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dbc4a9b |
+ pinctrl-single,pins = <
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dbc4a9b |
+ 0x164 0x0 /* P9_42 (ZCZ ball C18) | MODE 0 */
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dbc4a9b |
+ >;
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dbc4a9b |
+ };
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09b0646 |
+
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09b0646 |
+ spi0_pins: pinmux_spi0_pins {
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09b0646 |
+ pinctrl-single,pins = <
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09b0646 |
+ 0x150 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_sclk.spi0_sclk */
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09b0646 |
+ 0x154 (PIN_INPUT_PULLUP | MUX_MODE0) /* spi0_d0.spi0_d0 */
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09b0646 |
+ 0x158 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_d1.spi0_d1 */
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09b0646 |
+ 0x15c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
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09b0646 |
+ >;
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09b0646 |
+ };
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09b0646 |
+
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09b0646 |
+ ehrpwm1_pin_p9_14: pinmux_ehrpwm1_pin_p9_14 {
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09b0646 |
+ pinctrl-single,pins = <
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09b0646 |
+ 0x048 0x6 /* P9_14 (ZCZ ball U14) | MODE 6 */
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09b0646 |
+ >;
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09b0646 |
+ };
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09b0646 |
+
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09b0646 |
+ ehrpwm1_pin_p9_16: pinmux_ehrpwm1_pin_p9_16 {
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09b0646 |
+ pinctrl-single,pins = <
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09b0646 |
+ 0x04c 0x6 /* P9_16 (ZCZ ball T14) | MODE 6 */
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09b0646 |
+ >;
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09b0646 |
+ };
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09b0646 |
+
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09b0646 |
+ ecap0_pin_p9_42: pinmux_ecap0_pin_p9_42 {
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09b0646 |
+ pinctrl-single,pins = <
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09b0646 |
+ 0x164 0x0 /* P9_42 (ZCZ ball C18) | MODE 0 */
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09b0646 |
+ >;
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09b0646 |
+ };
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dbc4a9b |
};
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dbc4a9b |
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dbc4a9b |
&uart0 {
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09b0646 |
@@ -184,6 +252,20 @@
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dbc4a9b |
status = "okay";
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dbc4a9b |
};
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dbc4a9b |
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dbc4a9b |
+&uart1 {
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dbc4a9b |
+ pinctrl-names = "default";
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dbc4a9b |
+ pinctrl-0 = <&uart1_pins>;
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dbc4a9b |
+
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dbc4a9b |
+ status = "okay";
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dbc4a9b |
+};
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dbc4a9b |
+
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09b0646 |
+&uart1 {
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09b0646 |
+ pinctrl-names = "default";
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09b0646 |
+ pinctrl-0 = <&uart1_pins>;
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09b0646 |
+
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09b0646 |
+ status = "okay";
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09b0646 |
+};
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09b0646 |
+
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dbc4a9b |
&usb {
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dbc4a9b |
status = "okay";
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dbc4a9b |
};
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09b0646 |
@@ -259,6 +341,106 @@
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dbc4a9b |
};
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dbc4a9b |
};
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dbc4a9b |
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dbc4a9b |
+&epwmss0 {
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dbc4a9b |
+ pinctrl-names = "default";
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dbc4a9b |
+ pinctrl-0 = <&ecap0_pin_p9_42>;
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dbc4a9b |
+ status = "okay";
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dbc4a9b |
+
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dbc4a9b |
+ ecap@48300100 {
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dbc4a9b |
+ status = "okay";
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dbc4a9b |
+ };
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dbc4a9b |
+};
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dbc4a9b |
+
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dbc4a9b |
+&epwmss1 {
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dbc4a9b |
+ pinctrl-names = "default";
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dbc4a9b |
+ pinctrl-0 = <
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dbc4a9b |
+ &ehrpwm1_pin_p9_14
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dbc4a9b |
+ &ehrpwm1_pin_p9_16
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dbc4a9b |
+ >;
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dbc4a9b |
+
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dbc4a9b |
+ status = "okay";
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dbc4a9b |
+
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dbc4a9b |
+ ehrpwm@48302200 {
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dbc4a9b |
+ status = "okay";
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dbc4a9b |
+ };
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dbc4a9b |
+};
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dbc4a9b |
+
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+&spi0 {
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dbc4a9b |
+ pinctrl-names = "default";
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dbc4a9b |
+ pinctrl-0 = <&spi0_pins>;
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dbc4a9b |
+ status = "okay";
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dbc4a9b |
+
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dbc4a9b |
+ spidev0: spi@0 {
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dbc4a9b |
+ compatible = "spidev";
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dbc4a9b |
+ reg = <0>;
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dbc4a9b |
+ spi-max-frequency = <16000000>;
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dbc4a9b |
+ spi-cpha;
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dbc4a9b |
+ };
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dbc4a9b |
+
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dbc4a9b |
+ spidev1: spi@1 {
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dbc4a9b |
+ compatible = "spidev";
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dbc4a9b |
+ reg = <1>;
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dbc4a9b |
+ spi-max-frequency = <16000000>;
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dbc4a9b |
+ };
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dbc4a9b |
+};
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dbc4a9b |
+
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dbc4a9b |
+&tscadc {
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dbc4a9b |
+ status = "okay";
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dbc4a9b |
+ adc {
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dbc4a9b |
+ ti,adc-channels = <4 5 6>;
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dbc4a9b |
+ };
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dbc4a9b |
+};
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dbc4a9b |
+
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09b0646 |
+&epwmss0 {
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09b0646 |
+ pinctrl-names = "default";
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09b0646 |
+ pinctrl-0 = <&ecap0_pin_p9_42>;
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09b0646 |
+ status = "okay";
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09b0646 |
+
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09b0646 |
+ ecap@48300100 {
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+ status = "okay";
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09b0646 |
+ };
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09b0646 |
+};
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09b0646 |
+
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09b0646 |
+&epwmss1 {
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+ pinctrl-names = "default";
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09b0646 |
+ pinctrl-0 = <
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09b0646 |
+ &ehrpwm1_pin_p9_14
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09b0646 |
+ &ehrpwm1_pin_p9_16
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09b0646 |
+ >;
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09b0646 |
+
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09b0646 |
+ status = "okay";
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09b0646 |
+
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+ ehrpwm@48302200 {
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09b0646 |
+ status = "okay";
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09b0646 |
+ };
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09b0646 |
+};
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09b0646 |
+
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09b0646 |
+&spi0 {
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09b0646 |
+ pinctrl-names = "default";
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09b0646 |
+ pinctrl-0 = <&spi0_pins>;
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09b0646 |
+ status = "okay";
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09b0646 |
+
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09b0646 |
+ spidev0: spi@0 {
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09b0646 |
+ compatible = "spidev";
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09b0646 |
+ reg = <0>;
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09b0646 |
+ spi-max-frequency = <16000000>;
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09b0646 |
+ spi-cpha;
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09b0646 |
+ };
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09b0646 |
+
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09b0646 |
+ spidev1: spi@1 {
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09b0646 |
+ compatible = "spidev";
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09b0646 |
+ reg = <1>;
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09b0646 |
+ spi-max-frequency = <16000000>;
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09b0646 |
+ };
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09b0646 |
+};
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09b0646 |
+
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09b0646 |
+&tscadc {
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09b0646 |
+ status = "okay";
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09b0646 |
+ adc {
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09b0646 |
+ ti,adc-channels = <4 5 6>;
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09b0646 |
+ };
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09b0646 |
+};
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09b0646 |
+
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dbc4a9b |
/include/ "tps65217.dtsi"
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dbc4a9b |
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dbc4a9b |
&tps {
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af2152e |
@@ -366,4 +548,44 @@
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09b0646 |
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09b0646 |
&sham {
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09b0646 |
status = "okay";
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09b0646 |
+
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+};
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dbc4a9b |
+
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dbc4a9b |
+/ {
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dbc4a9b |
+ ocp {
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dbc4a9b |
+ //FIXME: these pwm's still need work, this guild isn't working..
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dbc4a9b |
+ //http://elinux.org/EBC_Exercise_13_Pulse_Width_Modulation
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+ pwm_test_P9_14@0 {
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+ compatible = "pwm_test";
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dbc4a9b |
+ pwms = <&ehrpwm1 0 500000 1>;
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dbc4a9b |
+ pwm-names = "PWM_P9_14";
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dbc4a9b |
+ pinctrl-names = "default";
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dbc4a9b |
+ pinctrl-0 = <&ehrpwm1_pin_p9_14>;
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dbc4a9b |
+ enabled = <1>;
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dbc4a9b |
+ duty = <0>;
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dbc4a9b |
+ status = "okay";
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dbc4a9b |
+ };
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dbc4a9b |
+
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dbc4a9b |
+ pwm_test_P9_16@0 {
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dbc4a9b |
+ compatible = "pwm_test";
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dbc4a9b |
+ pwms = <&ehrpwm1 0 500000 1>;
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dbc4a9b |
+ pwm-names = "PWM_P9_16";
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dbc4a9b |
+ pinctrl-names = "default";
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dbc4a9b |
+ pinctrl-0 = <&ehrpwm1_pin_p9_16>;
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dbc4a9b |
+ enabled = <1>;
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dbc4a9b |
+ duty = <0>;
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dbc4a9b |
+ status = "okay";
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dbc4a9b |
+ };
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dbc4a9b |
+
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dbc4a9b |
+ pwm_test_P9_42 {
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dbc4a9b |
+ compatible = "pwm_test";
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dbc4a9b |
+ pwms = <&ecap0 0 500000 1>;
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dbc4a9b |
+ pwm-names = "PWM_P9_42";
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dbc4a9b |
+ pinctrl-names = "default";
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dbc4a9b |
+ pinctrl-0 = <&ecap0_pin_p9_42>;
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dbc4a9b |
+ enabled = <1>;
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dbc4a9b |
+ duty = <0>;
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dbc4a9b |
+ status = "okay";
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dbc4a9b |
+ };
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dbc4a9b |
+ };
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09b0646 |
};
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