d7bf642
commit d10715be03bd8bad59ddc50236cb140c3bd73c7b
d7bf642
Author: Pawel Moll <pawel.moll@arm.com>
d7bf642
Date:   Tue Jun 24 12:55:11 2014 +0100
d7bf642
d7bf642
    video: ARM CLCD: Add DT support
d7bf642
    
d7bf642
    This patch adds basic DT bindings for the PL11x CLCD cells
d7bf642
    and make their fbdev driver use them.
d7bf642
    
d7bf642
    Signed-off-by: Pawel Moll <pawel.moll@arm.com>
d7bf642
    Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
d7bf642
d7bf642
diff --git a/Documentation/devicetree/bindings/video/arm,pl11x.txt b/Documentation/devicetree/bindings/video/arm,pl11x.txt
d7bf642
new file mode 100644
d7bf642
index 0000000..3e3039a
d7bf642
--- /dev/null
d7bf642
+++ b/Documentation/devicetree/bindings/video/arm,pl11x.txt
d7bf642
@@ -0,0 +1,109 @@
d7bf642
+* ARM PrimeCell Color LCD Controller PL110/PL111
d7bf642
+
d7bf642
+See also Documentation/devicetree/bindings/arm/primecell.txt
d7bf642
+
d7bf642
+Required properties:
d7bf642
+
d7bf642
+- compatible: must be one of:
d7bf642
+	"arm,pl110", "arm,primecell"
d7bf642
+	"arm,pl111", "arm,primecell"
d7bf642
+
d7bf642
+- reg: base address and size of the control registers block
d7bf642
+
d7bf642
+- interrupt-names: either the single entry "combined" representing a
d7bf642
+	combined interrupt output (CLCDINTR), or the four entries
d7bf642
+	"mbe", "vcomp", "lnbu", "fuf" representing the individual
d7bf642
+	CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts
d7bf642
+
d7bf642
+- interrupts: contains an interrupt specifier for each entry in
d7bf642
+	interrupt-names
d7bf642
+
d7bf642
+- clock-names: should contain "clcdclk" and "apb_pclk"
d7bf642
+
d7bf642
+- clocks: contains phandle and clock specifier pairs for the entries
d7bf642
+	in the clock-names property. See
d7bf642
+	Documentation/devicetree/binding/clock/clock-bindings.txt
d7bf642
+
d7bf642
+Optional properties:
d7bf642
+
d7bf642
+- memory-region: phandle to a node describing memory (see
d7bf642
+	Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
d7bf642
+	to be used for the framebuffer; if not present, the framebuffer
d7bf642
+	may be located anywhere in the memory
d7bf642
+
d7bf642
+- max-memory-bandwidth: maximum bandwidth in bytes per second that the
d7bf642
+	cell's memory interface can handle; if not present, the memory
d7bf642
+	interface is fast enough to handle all possible video modes
d7bf642
+
d7bf642
+Required sub-nodes:
d7bf642
+
d7bf642
+- port: describes LCD panel signals, following the common binding
d7bf642
+	for video transmitter interfaces; see
d7bf642
+	Documentation/devicetree/bindings/media/video-interfaces.txt;
d7bf642
+	when it is a TFT panel, the port's endpoint must define the
d7bf642
+	following property:
d7bf642
+
d7bf642
+	- arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,
d7bf642
+		defining the way CLD pads are wired up; first value
d7bf642
+		contains index of the "CLD" external pin (pad) used
d7bf642
+		as R0 (first bit of the red component), second value
d7bf642
+	        index of the pad used as G0, third value index of the
d7bf642
+		pad used as B0, see also "LCD panel signal multiplexing
d7bf642
+		details" paragraphs in the PL110/PL111 Technical
d7bf642
+		Reference Manuals; this implicitly defines available
d7bf642
+		color modes, for example:
d7bf642
+		- PL111 TFT 4:4:4 panel:
d7bf642
+			arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
d7bf642
+		- PL110 TFT (1:)5:5:5 panel:
d7bf642
+			arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
d7bf642
+		- PL111 TFT (1:)5:5:5 panel:
d7bf642
+			arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
d7bf642
+		- PL111 TFT 5:6:5 panel:
d7bf642
+			arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
d7bf642
+		- PL110 and PL111 TFT 8:8:8 panel:
d7bf642
+			arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
d7bf642
+		- PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
d7bf642
+			arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
d7bf642
+
d7bf642
+
d7bf642
+Example:
d7bf642
+
d7bf642
+	clcd@10020000 {
d7bf642
+		compatible = "arm,pl111", "arm,primecell";
d7bf642
+		reg = <0x10020000 0x1000>;
d7bf642
+		interrupt-names = "combined";
d7bf642
+		interrupts = <0 44 4>;
d7bf642
+		clocks = <&oscclk1>, <&oscclk2>;
d7bf642
+		clock-names = "clcdclk", "apb_pclk";
d7bf642
+		max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
d7bf642
+
d7bf642
+		port {
d7bf642
+			clcd_pads: endpoint {
d7bf642
+				remote-endpoint = <&clcd_panel>;
d7bf642
+				arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
d7bf642
+			};
d7bf642
+		};
d7bf642
+
d7bf642
+	};
d7bf642
+
d7bf642
+	panel {
d7bf642
+		compatible = "panel-dpi";
d7bf642
+
d7bf642
+		port {
d7bf642
+			clcd_panel: endpoint {
d7bf642
+				remote-endpoint = <&clcd_pads>;
d7bf642
+			};
d7bf642
+		};
d7bf642
+
d7bf642
+		panel-timing {
d7bf642
+			clock-frequency = <25175000>;
d7bf642
+			hactive = <640>;
d7bf642
+			hback-porch = <40>;
d7bf642
+			hfront-porch = <24>;
d7bf642
+			hsync-len = <96>;
d7bf642
+			vactive = <480>;
d7bf642
+			vback-porch = <32>;
d7bf642
+			vfront-porch = <11>;
d7bf642
+			vsync-len = <2>;
d7bf642
+		};
d7bf642
+	};
d7bf642
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
d7bf642
index 4a7098f..6f451ad 100644
d7bf642
--- a/drivers/video/fbdev/Kconfig
d7bf642
+++ b/drivers/video/fbdev/Kconfig
d7bf642
@@ -280,6 +280,7 @@ config FB_ARMCLCD
d7bf642
 	select FB_CFB_FILLRECT
d7bf642
 	select FB_CFB_COPYAREA
d7bf642
 	select FB_CFB_IMAGEBLIT
d7bf642
+	select VIDEOMODE_HELPERS if OF
d7bf642
 	help
d7bf642
 	  This framebuffer device driver is for the ARM PrimeCell PL110
d7bf642
 	  Colour LCD controller.  ARM PrimeCells provide the building
d7bf642
diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
d7bf642
index 14d6b37..23b3519 100644
d7bf642
--- a/drivers/video/fbdev/amba-clcd.c
d7bf642
+++ b/drivers/video/fbdev/amba-clcd.c
d7bf642
@@ -26,6 +26,13 @@
d7bf642
 #include <linux/amba/clcd.h>
d7bf642
 #include <linux/clk.h>
d7bf642
 #include <linux/hardirq.h>
d7bf642
+#include <linux/dma-mapping.h>
d7bf642
+#include <linux/of.h>
d7bf642
+#include <linux/of_address.h>
d7bf642
+#include <linux/of_graph.h>
d7bf642
+#include <video/display_timing.h>
d7bf642
+#include <video/of_display_timing.h>
d7bf642
+#include <video/videomode.h>
d7bf642
 
d7bf642
 #include <asm/sizes.h>
d7bf642
 
d7bf642
@@ -543,6 +550,259 @@ static int clcdfb_register(struct clcd_fb *fb)
d7bf642
 	return ret;
d7bf642
 }
d7bf642
 
d7bf642
+#ifdef CONFIG_OF
d7bf642
+static int clcdfb_of_get_dpi_panel_mode(struct device_node *node,
d7bf642
+		struct fb_videomode *mode)
d7bf642
+{
d7bf642
+	int err;
d7bf642
+	struct display_timing timing;
d7bf642
+	struct videomode video;
d7bf642
+
d7bf642
+	err = of_get_display_timing(node, "panel-timing", &timing);
d7bf642
+	if (err)
d7bf642
+		return err;
d7bf642
+
d7bf642
+	videomode_from_timing(&timing, &video);
d7bf642
+
d7bf642
+	err = fb_videomode_from_videomode(&video, mode);
d7bf642
+	if (err)
d7bf642
+		return err;
d7bf642
+
d7bf642
+	return 0;
d7bf642
+}
d7bf642
+
d7bf642
+static int clcdfb_snprintf_mode(char *buf, int size, struct fb_videomode *mode)
d7bf642
+{
d7bf642
+	return snprintf(buf, size, "%ux%u@%u", mode->xres, mode->yres,
d7bf642
+			mode->refresh);
d7bf642
+}
d7bf642
+
d7bf642
+static int clcdfb_of_get_mode(struct device *dev, struct device_node *endpoint,
d7bf642
+		struct fb_videomode *mode)
d7bf642
+{
d7bf642
+	int err;
d7bf642
+	struct device_node *panel;
d7bf642
+	char *name;
d7bf642
+	int len;
d7bf642
+
d7bf642
+	panel = of_graph_get_remote_port_parent(endpoint);
d7bf642
+	if (!panel)
d7bf642
+		return -ENODEV;
d7bf642
+
d7bf642
+	/* Only directly connected DPI panels supported for now */
d7bf642
+	if (of_device_is_compatible(panel, "panel-dpi"))
d7bf642
+		err = clcdfb_of_get_dpi_panel_mode(panel, mode);
d7bf642
+	else
d7bf642
+		err = -ENOENT;
d7bf642
+	if (err)
d7bf642
+		return err;
d7bf642
+
d7bf642
+	len = clcdfb_snprintf_mode(NULL, 0, mode);
d7bf642
+	name = devm_kzalloc(dev, len + 1, GFP_KERNEL);
d7bf642
+	clcdfb_snprintf_mode(name, len + 1, mode);
d7bf642
+	mode->name = name;
d7bf642
+
d7bf642
+	return 0;
d7bf642
+}
d7bf642
+
d7bf642
+static int clcdfb_of_init_tft_panel(struct clcd_fb *fb, u32 r0, u32 g0, u32 b0)
d7bf642
+{
d7bf642
+	static struct {
d7bf642
+		unsigned int part;
d7bf642
+		u32 r0, g0, b0;
d7bf642
+		u32 caps;
d7bf642
+	} panels[] = {
d7bf642
+		{ 0x110, 1,  7, 13, CLCD_CAP_5551 },
d7bf642
+		{ 0x110, 0,  8, 16, CLCD_CAP_888 },
d7bf642
+		{ 0x111, 4, 14, 20, CLCD_CAP_444 },
d7bf642
+		{ 0x111, 3, 11, 19, CLCD_CAP_444 | CLCD_CAP_5551 },
d7bf642
+		{ 0x111, 3, 10, 19, CLCD_CAP_444 | CLCD_CAP_5551 |
d7bf642
+				    CLCD_CAP_565 },
d7bf642
+		{ 0x111, 0,  8, 16, CLCD_CAP_444 | CLCD_CAP_5551 |
d7bf642
+				    CLCD_CAP_565 | CLCD_CAP_888 },
d7bf642
+	};
d7bf642
+	int i;
d7bf642
+
d7bf642
+	/* Bypass pixel clock divider, data output on the falling edge */
d7bf642
+	fb->panel->tim2 = TIM2_BCD | TIM2_IPC;
d7bf642
+
d7bf642
+	/* TFT display, vert. comp. interrupt at the start of the back porch */
d7bf642
+	fb->panel->cntl |= CNTL_LCDTFT | CNTL_LCDVCOMP(1);
d7bf642
+
d7bf642
+	fb->panel->caps = 0;
d7bf642
+
d7bf642
+	/* Match the setup with known variants */
d7bf642
+	for (i = 0; i < ARRAY_SIZE(panels) && !fb->panel->caps; i++) {
d7bf642
+		if (amba_part(fb->dev) != panels[i].part)
d7bf642
+			continue;
d7bf642
+		if (g0 != panels[i].g0)
d7bf642
+			continue;
d7bf642
+		if (r0 == panels[i].r0 && b0 == panels[i].b0)
d7bf642
+			fb->panel->caps = panels[i].caps & CLCD_CAP_RGB;
d7bf642
+		if (r0 == panels[i].b0 && b0 == panels[i].r0)
d7bf642
+			fb->panel->caps = panels[i].caps & CLCD_CAP_BGR;
d7bf642
+	}
d7bf642
+
d7bf642
+	return fb->panel->caps ? 0 : -EINVAL;
d7bf642
+}
d7bf642
+
d7bf642
+static int clcdfb_of_init_display(struct clcd_fb *fb)
d7bf642
+{
d7bf642
+	struct device_node *endpoint;
d7bf642
+	int err;
d7bf642
+	u32 max_bandwidth;
d7bf642
+	u32 tft_r0b0g0[3];
d7bf642
+
d7bf642
+	fb->panel = devm_kzalloc(&fb->dev->dev, sizeof(*fb->panel), GFP_KERNEL);
d7bf642
+	if (!fb->panel)
d7bf642
+		return -ENOMEM;
d7bf642
+
d7bf642
+	endpoint = of_graph_get_next_endpoint(fb->dev->dev.of_node, NULL);
d7bf642
+	if (!endpoint)
d7bf642
+		return -ENODEV;
d7bf642
+
d7bf642
+	err = clcdfb_of_get_mode(&fb->dev->dev, endpoint, &fb->panel->mode);
d7bf642
+	if (err)
d7bf642
+		return err;
d7bf642
+
d7bf642
+	err = of_property_read_u32(fb->dev->dev.of_node, "max-memory-bandwidth",
d7bf642
+			&max_bandwidth);
d7bf642
+	if (!err)
d7bf642
+		fb->panel->bpp = 8 * max_bandwidth / (fb->panel->mode.xres *
d7bf642
+				fb->panel->mode.yres * fb->panel->mode.refresh);
d7bf642
+	else
d7bf642
+		fb->panel->bpp = 32;
d7bf642
+
d7bf642
+#ifdef CONFIG_CPU_BIG_ENDIAN
d7bf642
+	fb->panel->cntl |= CNTL_BEBO;
d7bf642
+#endif
d7bf642
+	fb->panel->width = -1;
d7bf642
+	fb->panel->height = -1;
d7bf642
+
d7bf642
+	if (of_property_read_u32_array(endpoint,
d7bf642
+			"arm,pl11x,tft-r0g0b0-pads",
d7bf642
+			tft_r0b0g0, ARRAY_SIZE(tft_r0b0g0)) == 0)
d7bf642
+		return clcdfb_of_init_tft_panel(fb, tft_r0b0g0[0],
d7bf642
+				 tft_r0b0g0[1],  tft_r0b0g0[2]);
d7bf642
+
d7bf642
+	return -ENOENT;
d7bf642
+}
d7bf642
+
d7bf642
+static int clcdfb_of_vram_setup(struct clcd_fb *fb)
d7bf642
+{
d7bf642
+	int err;
d7bf642
+	struct device_node *memory;
d7bf642
+	u64 size;
d7bf642
+
d7bf642
+	err = clcdfb_of_init_display(fb);
d7bf642
+	if (err)
d7bf642
+		return err;
d7bf642
+
d7bf642
+	memory = of_parse_phandle(fb->dev->dev.of_node, "memory-region", 0);
d7bf642
+	if (!memory)
d7bf642
+		return -ENODEV;
d7bf642
+
d7bf642
+	fb->fb.screen_base = of_iomap(memory, 0);
d7bf642
+	if (!fb->fb.screen_base)
d7bf642
+		return -ENOMEM;
d7bf642
+
d7bf642
+	fb->fb.fix.smem_start = of_translate_address(memory,
d7bf642
+			of_get_address(memory, 0, &size, NULL));
d7bf642
+	fb->fb.fix.smem_len = size;
d7bf642
+
d7bf642
+	return 0;
d7bf642
+}
d7bf642
+
d7bf642
+static int clcdfb_of_vram_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
d7bf642
+{
d7bf642
+	unsigned long off, user_size, kernel_size;
d7bf642
+
d7bf642
+
d7bf642
+	off = vma->vm_pgoff << PAGE_SHIFT;
d7bf642
+	user_size = vma->vm_end - vma->vm_start;
d7bf642
+	kernel_size = fb->fb.fix.smem_len;
d7bf642
+
d7bf642
+	if (off >= kernel_size || user_size > (kernel_size - off))
d7bf642
+		return -ENXIO;
d7bf642
+
d7bf642
+	return remap_pfn_range(vma, vma->vm_start,
d7bf642
+			__phys_to_pfn(fb->fb.fix.smem_start) + vma->vm_pgoff,
d7bf642
+			user_size,
d7bf642
+			pgprot_writecombine(vma->vm_page_prot));
d7bf642
+}
d7bf642
+
d7bf642
+static void clcdfb_of_vram_remove(struct clcd_fb *fb)
d7bf642
+{
d7bf642
+	iounmap(fb->fb.screen_base);
d7bf642
+}
d7bf642
+
d7bf642
+static int clcdfb_of_dma_setup(struct clcd_fb *fb)
d7bf642
+{
d7bf642
+	unsigned long framesize;
d7bf642
+	dma_addr_t dma;
d7bf642
+	int err;
d7bf642
+
d7bf642
+	err = clcdfb_of_init_display(fb);
d7bf642
+	if (err)
d7bf642
+		return err;
d7bf642
+
d7bf642
+	framesize = fb->panel->mode.xres * fb->panel->mode.yres *
d7bf642
+			fb->panel->bpp / 8;
d7bf642
+	fb->fb.screen_base = dma_alloc_coherent(&fb->dev->dev, framesize,
d7bf642
+			&dma, GFP_KERNEL);
d7bf642
+	if (!fb->fb.screen_base)
d7bf642
+		return -ENOMEM;
d7bf642
+
d7bf642
+	fb->fb.fix.smem_start = dma;
d7bf642
+	fb->fb.fix.smem_len = framesize;
d7bf642
+
d7bf642
+	return 0;
d7bf642
+}
d7bf642
+
d7bf642
+static int clcdfb_of_dma_mmap(struct clcd_fb *fb, struct vm_area_struct *vma)
d7bf642
+{
d7bf642
+	return dma_mmap_writecombine(&fb->dev->dev, vma, fb->fb.screen_base,
d7bf642
+			fb->fb.fix.smem_start, fb->fb.fix.smem_len);
d7bf642
+}
d7bf642
+
d7bf642
+static void clcdfb_of_dma_remove(struct clcd_fb *fb)
d7bf642
+{
d7bf642
+	dma_free_coherent(&fb->dev->dev, fb->fb.fix.smem_len,
d7bf642
+			fb->fb.screen_base, fb->fb.fix.smem_start);
d7bf642
+}
d7bf642
+
d7bf642
+static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
d7bf642
+{
d7bf642
+	struct clcd_board *board = devm_kzalloc(&dev->dev, sizeof(*board),
d7bf642
+			GFP_KERNEL);
d7bf642
+	struct device_node *node = dev->dev.of_node;
d7bf642
+
d7bf642
+	if (!board)
d7bf642
+		return NULL;
d7bf642
+
d7bf642
+	board->name = of_node_full_name(node);
d7bf642
+	board->caps = CLCD_CAP_ALL;
d7bf642
+	board->check = clcdfb_check;
d7bf642
+	board->decode = clcdfb_decode;
d7bf642
+	if (of_find_property(node, "memory-region", NULL)) {
d7bf642
+		board->setup = clcdfb_of_vram_setup;
d7bf642
+		board->mmap = clcdfb_of_vram_mmap;
d7bf642
+		board->remove = clcdfb_of_vram_remove;
d7bf642
+	} else {
d7bf642
+		board->setup = clcdfb_of_dma_setup;
d7bf642
+		board->mmap = clcdfb_of_dma_mmap;
d7bf642
+		board->remove = clcdfb_of_dma_remove;
d7bf642
+	}
d7bf642
+
d7bf642
+	return board;
d7bf642
+}
d7bf642
+#else
d7bf642
+static struct clcd_board *clcdfb_of_get_board(struct amba_dev *dev)
d7bf642
+{
d7bf642
+	return NULL;
d7bf642
+}
d7bf642
+#endif
d7bf642
+
d7bf642
 static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
d7bf642
 {
d7bf642
 	struct clcd_board *board = dev_get_platdata(&dev->dev);
d7bf642
@@ -550,6 +810,9 @@ static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id)
d7bf642
 	int ret;
d7bf642
 
d7bf642
 	if (!board)
d7bf642
+		board = clcdfb_of_get_board(dev);
d7bf642
+
d7bf642
+	if (!board)
d7bf642
 		return -EINVAL;
d7bf642
 
d7bf642
 	ret = dma_set_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32));
d7bf642
commit 1d5167b72ca05b2096760e1200fcd53b5f9a7562
d7bf642
Author: Pawel Moll <pawel.moll@arm.com>
d7bf642
Date:   Fri Aug 1 15:43:34 2014 +0100
d7bf642
d7bf642
    video: ARM CLCD: Fix DT-related build problems
d7bf642
    
d7bf642
    This patch fixes the following error when !CONFIG_OF:
d7bf642
    
d7bf642
    drivers/video/fbdev/amba-clcd.c:800:54: warning: ‘struct amba_dev’ declared inside parameter list [enabled by default]
d7bf642
     static struct clcd_board *clcdfb_of_get_board(struct amba_dev *dev)
d7bf642
                                                          ^
d7bf642
    and adds a missing Kconfig select causing this
d7bf642
    when CONFIG_OF && !CONFIG_FB_MODE_HELPERS:
d7bf642
    
d7bf642
    drivers/video/fbdev/amba-clcd.c:567: undefined reference to `fb_videomode_from_videomode'
d7bf642
    
d7bf642
    Reported-by: Fengguang Wu <fengguang.wu@intel.com>
d7bf642
    Signed-off-by: Pawel Moll <pawel.moll@arm.com>
d7bf642
    Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
d7bf642
d7bf642
diff --git a/drivers/video/fbdev/Kconfig b/drivers/video/fbdev/Kconfig
d7bf642
index 6f451ad..ef94623 100644
d7bf642
--- a/drivers/video/fbdev/Kconfig
d7bf642
+++ b/drivers/video/fbdev/Kconfig
d7bf642
@@ -280,6 +280,7 @@ config FB_ARMCLCD
d7bf642
 	select FB_CFB_FILLRECT
d7bf642
 	select FB_CFB_COPYAREA
d7bf642
 	select FB_CFB_IMAGEBLIT
d7bf642
+	select FB_MODE_HELPERS if OF
d7bf642
 	select VIDEOMODE_HELPERS if OF
d7bf642
 	help
d7bf642
 	  This framebuffer device driver is for the ARM PrimeCell PL110
d7bf642
diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
d7bf642
index 23b3519..beadd3e 100644
d7bf642
--- a/drivers/video/fbdev/amba-clcd.c
d7bf642
+++ b/drivers/video/fbdev/amba-clcd.c
d7bf642
@@ -797,7 +797,7 @@ static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
d7bf642
 	return board;
d7bf642
 }
d7bf642
 #else
d7bf642
-static struct clcd_board *clcdfb_of_get_board(struct amba_dev *dev)
d7bf642
+static struct clcd_board *clcdfb_of_get_board(struct amba_device *dev)
d7bf642
 {
d7bf642
 	return NULL;
d7bf642
 }