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From patchwork Sun Jul 9 16:36:14 2017
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: ARM: tegra: Register host1x node with iommu binding on tegra124
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From: Paul Kocialkowski <contact@paulk.fr>
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X-Patchwork-Id: 9831825
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Message-Id: <20170709163614.6746-1-contact@paulk.fr>
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To: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org,
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linux-kernel@vger.kernel.org
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Cc: Thierry Reding <thierry.reding@gmail.com>,
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Stephen Warren <swarren@wwwdotorg.org>,
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Mikko Perttunen <mperttunen@nvidia.com>,
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Paul Kocialkowski <contact@paulk.fr>,
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Jonathan Hunter <jonathanh@nvidia.com>
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Date: Sun, 9 Jul 2017 19:36:14 +0300
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This registers the host1x node with the SMMU (as HC swgroup) to allow
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the host1x code to attach to it. It avoid failing the probe sequence,
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which resulted in the tegra drm driver not probing and thus nothing
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being displayed on-screen.
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Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
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---
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arch/arm/boot/dts/tegra124.dtsi | 1 +
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1 file changed, 1 insertion(+)
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diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
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index 187a36c6d0fc..b3b89befffeb 100644
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--- a/arch/arm/boot/dts/tegra124.dtsi
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+++ b/arch/arm/boot/dts/tegra124.dtsi
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@@ -85,6 +85,7 @@
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clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
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resets = <&tegra_car 28>;
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reset-names = "host1x";
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+ iommus = <&mc TEGRA_SWGROUP_HC>;
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#address-cells = <2>;
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#size-cells = <2>;
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