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From 18c1ec0b6501f2aa0aabcc8ca75824f9f49bcd91 Mon Sep 17 00:00:00 2001
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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Date: Mon, 10 Sep 2018 20:43:53 +0530
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Subject: [PATCH 1/4] arm64: dts: rockchip: Split out common nodes for Rock960
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based boards
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Since the same family members of Rock960 boards (Rock960 and Ficus)
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share the same configuration, split out the common nodes into a common
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dtsi file for reducing code duplication. The board specific nodes for
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Ficus boards are then placed in corresponding board DTS file.
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Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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---
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arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 429 +----------------
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.../boot/dts/rockchip/rk3399-rock960.dtsi | 439 ++++++++++++++++++
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2 files changed, 440 insertions(+), 428 deletions(-)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
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diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
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index 8978d924eb83..7f6ec37d5a69 100644
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--- a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
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@@ -7,8 +7,7 @@
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*/
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/dts-v1/;
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-#include "rk3399.dtsi"
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-#include "rk3399-opp.dtsi"
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+#include "rk3399-rock960.dtsi"
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/ {
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model = "96boards RK3399 Ficus";
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@@ -25,31 +24,6 @@
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#clock-cells = <0>;
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};
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- vcc1v8_s0: vcc1v8-s0 {
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- compatible = "regulator-fixed";
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- regulator-name = "vcc1v8_s0";
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- regulator-min-microvolt = <1800000>;
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- regulator-max-microvolt = <1800000>;
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- regulator-always-on;
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- };
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-
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- vcc_sys: vcc-sys {
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- compatible = "regulator-fixed";
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- regulator-name = "vcc_sys";
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- regulator-min-microvolt = <5000000>;
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- regulator-max-microvolt = <5000000>;
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- regulator-always-on;
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- };
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-
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- vcc3v3_sys: vcc3v3-sys {
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- compatible = "regulator-fixed";
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- regulator-name = "vcc3v3_sys";
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- regulator-min-microvolt = <3300000>;
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- regulator-max-microvolt = <3300000>;
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- regulator-always-on;
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- vin-supply = <&vcc_sys>;
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- };
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-
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vcc3v3_pcie: vcc3v3-pcie-regulator {
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compatible = "regulator-fixed";
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enable-active-high;
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@@ -75,46 +49,6 @@
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regulator-always-on;
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vin-supply = <&vcc_sys>;
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};
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-
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- vdd_log: vdd-log {
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- compatible = "pwm-regulator";
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- pwms = <&pwm2 0 25000 0>;
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- regulator-name = "vdd_log";
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- regulator-min-microvolt = <800000>;
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- regulator-max-microvolt = <1400000>;
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- regulator-always-on;
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- regulator-boot-on;
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- vin-supply = <&vcc_sys>;
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- };
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-
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-};
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-
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-&cpu_l0 {
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- cpu-supply = <&vdd_cpu_l>;
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-};
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-
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-&cpu_l1 {
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- cpu-supply = <&vdd_cpu_l>;
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-};
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-
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-&cpu_l2 {
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- cpu-supply = <&vdd_cpu_l>;
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-};
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-
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-&cpu_l3 {
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- cpu-supply = <&vdd_cpu_l>;
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-};
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-
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-&cpu_b0 {
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- cpu-supply = <&vdd_cpu_b>;
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-};
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-
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-&cpu_b1 {
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- cpu-supply = <&vdd_cpu_b>;
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-};
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-
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-&emmc_phy {
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- status = "okay";
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};
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&gmac {
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@@ -133,263 +67,6 @@
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status = "okay";
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};
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-&hdmi {
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- ddc-i2c-bus = <&i2c3>;
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- pinctrl-names = "default";
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- pinctrl-0 = <&hdmi_cec>;
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- status = "okay";
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-};
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-
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-&i2c0 {
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- clock-frequency = <400000>;
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- i2c-scl-rising-time-ns = <168>;
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- i2c-scl-falling-time-ns = <4>;
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- status = "okay";
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-
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- vdd_cpu_b: regulator@40 {
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- compatible = "silergy,syr827";
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- reg = <0x40>;
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- fcs,suspend-voltage-selector = <1>;
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- regulator-name = "vdd_cpu_b";
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- regulator-min-microvolt = <712500>;
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- regulator-max-microvolt = <1500000>;
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- regulator-ramp-delay = <1000>;
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- regulator-always-on;
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- regulator-boot-on;
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- vin-supply = <&vcc_sys>;
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- status = "okay";
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-
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- regulator-state-mem {
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- regulator-off-in-suspend;
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- };
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- };
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-
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- vdd_gpu: regulator@41 {
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- compatible = "silergy,syr828";
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- reg = <0x41>;
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- fcs,suspend-voltage-selector = <1>;
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- regulator-name = "vdd_gpu";
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- regulator-min-microvolt = <712500>;
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- regulator-max-microvolt = <1500000>;
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- regulator-ramp-delay = <1000>;
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- regulator-always-on;
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- regulator-boot-on;
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- vin-supply = <&vcc_sys>;
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- regulator-state-mem {
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- regulator-off-in-suspend;
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- };
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- };
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2f12b3e |
-
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- rk808: pmic@1b {
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- compatible = "rockchip,rk808";
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- reg = <0x1b>;
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- interrupt-parent = <&gpio1>;
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- interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
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- pinctrl-names = "default";
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- pinctrl-0 = <&pmic_int_l>;
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- rockchip,system-power-controller;
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- wakeup-source;
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- #clock-cells = <1>;
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- clock-output-names = "xin32k", "rk808-clkout2";
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-
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- vcc1-supply = <&vcc_sys>;
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- vcc2-supply = <&vcc_sys>;
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- vcc3-supply = <&vcc_sys>;
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- vcc4-supply = <&vcc_sys>;
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- vcc6-supply = <&vcc_sys>;
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- vcc7-supply = <&vcc_sys>;
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- vcc8-supply = <&vcc3v3_sys>;
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- vcc9-supply = <&vcc_sys>;
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- vcc10-supply = <&vcc_sys>;
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- vcc11-supply = <&vcc_sys>;
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- vcc12-supply = <&vcc3v3_sys>;
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- vddio-supply = <&vcc_1v8>;
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-
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- regulators {
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- vdd_center: DCDC_REG1 {
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2f12b3e |
- regulator-name = "vdd_center";
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2f12b3e |
- regulator-min-microvolt = <750000>;
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2f12b3e |
- regulator-max-microvolt = <1350000>;
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2f12b3e |
- regulator-always-on;
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2f12b3e |
- regulator-boot-on;
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- regulator-state-mem {
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- regulator-off-in-suspend;
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- };
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- };
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2f12b3e |
-
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- vdd_cpu_l: DCDC_REG2 {
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2f12b3e |
- regulator-name = "vdd_cpu_l";
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2f12b3e |
- regulator-min-microvolt = <750000>;
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2f12b3e |
- regulator-max-microvolt = <1350000>;
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2f12b3e |
- regulator-always-on;
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2f12b3e |
- regulator-boot-on;
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2f12b3e |
- regulator-state-mem {
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2f12b3e |
- regulator-off-in-suspend;
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2f12b3e |
- };
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2f12b3e |
- };
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2f12b3e |
-
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- vcc_ddr: DCDC_REG3 {
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2f12b3e |
- regulator-name = "vcc_ddr";
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2f12b3e |
- regulator-always-on;
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2f12b3e |
- regulator-boot-on;
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2f12b3e |
- regulator-state-mem {
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2f12b3e |
- regulator-on-in-suspend;
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2f12b3e |
- };
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2f12b3e |
- };
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2f12b3e |
-
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2f12b3e |
- vcc_1v8: DCDC_REG4 {
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2f12b3e |
- regulator-name = "vcc_1v8";
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2f12b3e |
- regulator-min-microvolt = <1800000>;
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2f12b3e |
- regulator-max-microvolt = <1800000>;
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2f12b3e |
- regulator-always-on;
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2f12b3e |
- regulator-boot-on;
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2f12b3e |
- regulator-state-mem {
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2f12b3e |
- regulator-on-in-suspend;
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2f12b3e |
- regulator-suspend-microvolt = <1800000>;
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2f12b3e |
- };
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2f12b3e |
- };
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2f12b3e |
-
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2f12b3e |
- vcc1v8_dvp: LDO_REG1 {
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2f12b3e |
- regulator-name = "vcc1v8_dvp";
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2f12b3e |
- regulator-min-microvolt = <1800000>;
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2f12b3e |
- regulator-max-microvolt = <1800000>;
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2f12b3e |
- regulator-always-on;
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2f12b3e |
- regulator-boot-on;
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2f12b3e |
- regulator-state-mem {
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2f12b3e |
- regulator-on-in-suspend;
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2f12b3e |
- regulator-suspend-microvolt = <1800000>;
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2f12b3e |
- };
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2f12b3e |
- };
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2f12b3e |
-
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2f12b3e |
- vcca1v8_hdmi: LDO_REG2 {
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2f12b3e |
- regulator-name = "vcca1v8_hdmi";
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2f12b3e |
- regulator-min-microvolt = <1800000>;
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2f12b3e |
- regulator-max-microvolt = <1800000>;
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2f12b3e |
- regulator-always-on;
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2f12b3e |
- regulator-boot-on;
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2f12b3e |
- regulator-state-mem {
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2f12b3e |
- regulator-on-in-suspend;
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2f12b3e |
- regulator-suspend-microvolt = <1800000>;
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2f12b3e |
- };
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2f12b3e |
- };
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2f12b3e |
-
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2f12b3e |
- vcca_1v8: LDO_REG3 {
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2f12b3e |
- regulator-name = "vcca_1v8";
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2f12b3e |
- regulator-min-microvolt = <1800000>;
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2f12b3e |
- regulator-max-microvolt = <1800000>;
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2f12b3e |
- regulator-always-on;
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2f12b3e |
- regulator-boot-on;
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2f12b3e |
- regulator-state-mem {
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2f12b3e |
- regulator-on-in-suspend;
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2f12b3e |
- regulator-suspend-microvolt = <1800000>;
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2f12b3e |
- };
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2f12b3e |
- };
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2f12b3e |
-
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2f12b3e |
- vcc_sd: LDO_REG4 {
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2f12b3e |
- regulator-name = "vcc_sd";
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2f12b3e |
- regulator-min-microvolt = <1800000>;
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2f12b3e |
- regulator-max-microvolt = <3300000>;
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2f12b3e |
- regulator-always-on;
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2f12b3e |
- regulator-boot-on;
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2f12b3e |
- regulator-state-mem {
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2f12b3e |
- regulator-on-in-suspend;
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2f12b3e |
- regulator-suspend-microvolt = <3300000>;
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2f12b3e |
- };
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2f12b3e |
- };
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2f12b3e |
-
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2f12b3e |
- vcc3v0_sd: LDO_REG5 {
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2f12b3e |
- regulator-name = "vcc3v0_sd";
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|
|
2f12b3e |
- regulator-min-microvolt = <3000000>;
|
|
|
2f12b3e |
- regulator-max-microvolt = <3000000>;
|
|
|
2f12b3e |
- regulator-always-on;
|
|
|
2f12b3e |
- regulator-boot-on;
|
|
|
2f12b3e |
- regulator-state-mem {
|
|
|
2f12b3e |
- regulator-on-in-suspend;
|
|
|
2f12b3e |
- regulator-suspend-microvolt = <3000000>;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
- vcc_1v5: LDO_REG6 {
|
|
|
2f12b3e |
- regulator-name = "vcc_1v5";
|
|
|
2f12b3e |
- regulator-min-microvolt = <1500000>;
|
|
|
2f12b3e |
- regulator-max-microvolt = <1500000>;
|
|
|
2f12b3e |
- regulator-always-on;
|
|
|
2f12b3e |
- regulator-boot-on;
|
|
|
2f12b3e |
- regulator-state-mem {
|
|
|
2f12b3e |
- regulator-on-in-suspend;
|
|
|
2f12b3e |
- regulator-suspend-microvolt = <1500000>;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
- vcca0v9_hdmi: LDO_REG7 {
|
|
|
2f12b3e |
- regulator-name = "vcca0v9_hdmi";
|
|
|
2f12b3e |
- regulator-min-microvolt = <900000>;
|
|
|
2f12b3e |
- regulator-max-microvolt = <900000>;
|
|
|
2f12b3e |
- regulator-always-on;
|
|
|
2f12b3e |
- regulator-boot-on;
|
|
|
2f12b3e |
- regulator-state-mem {
|
|
|
2f12b3e |
- regulator-on-in-suspend;
|
|
|
2f12b3e |
- regulator-suspend-microvolt = <900000>;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
- vcc_3v0: LDO_REG8 {
|
|
|
2f12b3e |
- regulator-name = "vcc_3v0";
|
|
|
2f12b3e |
- regulator-min-microvolt = <3000000>;
|
|
|
2f12b3e |
- regulator-max-microvolt = <3000000>;
|
|
|
2f12b3e |
- regulator-always-on;
|
|
|
2f12b3e |
- regulator-boot-on;
|
|
|
2f12b3e |
- regulator-state-mem {
|
|
|
2f12b3e |
- regulator-on-in-suspend;
|
|
|
2f12b3e |
- regulator-suspend-microvolt = <3000000>;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
- vcc3v3_s3: SWITCH_REG1 {
|
|
|
2f12b3e |
- regulator-name = "vcc3v3_s3";
|
|
|
2f12b3e |
- regulator-always-on;
|
|
|
2f12b3e |
- regulator-boot-on;
|
|
|
2f12b3e |
- regulator-state-mem {
|
|
|
2f12b3e |
- regulator-on-in-suspend;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
- vcc3v3_s0: SWITCH_REG2 {
|
|
|
2f12b3e |
- regulator-name = "vcc3v3_s0";
|
|
|
2f12b3e |
- regulator-always-on;
|
|
|
2f12b3e |
- regulator-boot-on;
|
|
|
2f12b3e |
- regulator-state-mem {
|
|
|
2f12b3e |
- regulator-on-in-suspend;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&i2c1 {
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&i2c2 {
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&i2c3 {
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&i2c4 {
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&io_domains {
|
|
|
2f12b3e |
- bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
|
|
|
2f12b3e |
- audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
|
|
|
2f12b3e |
- sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
|
|
|
2f12b3e |
- gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
&pcie_phy {
|
|
|
2f12b3e |
status = "okay";
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
@@ -403,11 +80,6 @@
|
|
|
2f12b3e |
status = "okay";
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
|
|
|
2f12b3e |
-&pmu_io_domains {
|
|
|
2f12b3e |
- pmu1830-supply = <&vcc_1v8>;
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
&pinctrl {
|
|
|
2f12b3e |
gmac {
|
|
|
2f12b3e |
rgmii_sleep_pins: rgmii-sleep-pins {
|
|
|
2f12b3e |
@@ -416,31 +88,6 @@
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
|
|
|
2f12b3e |
- sdmmc {
|
|
|
2f12b3e |
- sdmmc_bus1: sdmmc-bus1 {
|
|
|
2f12b3e |
- rockchip,pins =
|
|
|
2f12b3e |
- <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
- sdmmc_bus4: sdmmc-bus4 {
|
|
|
2f12b3e |
- rockchip,pins =
|
|
|
2f12b3e |
- <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>,
|
|
|
2f12b3e |
- <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>,
|
|
|
2f12b3e |
- <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>,
|
|
|
2f12b3e |
- <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
- sdmmc_clk: sdmmc-clk {
|
|
|
2f12b3e |
- rockchip,pins =
|
|
|
2f12b3e |
- <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
- sdmmc_cmd: sdmmc-cmd {
|
|
|
2f12b3e |
- rockchip,pins =
|
|
|
2f12b3e |
- <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
pcie {
|
|
|
2f12b3e |
pcie_drv: pcie-drv {
|
|
|
2f12b3e |
rockchip,pins =
|
|
|
2f12b3e |
@@ -448,23 +95,6 @@
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
|
|
|
2f12b3e |
- pmic {
|
|
|
2f12b3e |
- pmic_int_l: pmic-int-l {
|
|
|
2f12b3e |
- rockchip,pins =
|
|
|
2f12b3e |
- <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
- vsel1_gpio: vsel1-gpio {
|
|
|
2f12b3e |
- rockchip,pins =
|
|
|
2f12b3e |
- <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
- vsel2_gpio: vsel2-gpio {
|
|
|
2f12b3e |
- rockchip,pins =
|
|
|
2f12b3e |
- <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
- };
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
usb2 {
|
|
|
2f12b3e |
host_vbus_drv: host-vbus-drv {
|
|
|
2f12b3e |
rockchip,pins =
|
|
|
2f12b3e |
@@ -473,37 +103,6 @@
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
|
|
|
2f12b3e |
-&pwm2 {
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&pwm3 {
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&sdhci {
|
|
|
2f12b3e |
- bus-width = <8>;
|
|
|
2f12b3e |
- mmc-hs400-1_8v;
|
|
|
2f12b3e |
- mmc-hs400-enhanced-strobe;
|
|
|
2f12b3e |
- non-removable;
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&sdmmc {
|
|
|
2f12b3e |
- bus-width = <4>;
|
|
|
2f12b3e |
- cap-mmc-highspeed;
|
|
|
2f12b3e |
- cap-sd-highspeed;
|
|
|
2f12b3e |
- clock-frequency = <100000000>;
|
|
|
2f12b3e |
- clock-freq-min-max = <100000 100000000>;
|
|
|
2f12b3e |
- disable-wp;
|
|
|
2f12b3e |
- sd-uhs-sdr104;
|
|
|
2f12b3e |
- vqmmc-supply = <&vcc_sd>;
|
|
|
2f12b3e |
- card-detect-delay = <800>;
|
|
|
2f12b3e |
- pinctrl-names = "default";
|
|
|
2f12b3e |
- pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
&tcphy0 {
|
|
|
2f12b3e |
status = "okay";
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
@@ -538,16 +137,6 @@
|
|
|
2f12b3e |
status = "okay";
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
|
|
|
2f12b3e |
-&uart0 {
|
|
|
2f12b3e |
- pinctrl-names = "default";
|
|
|
2f12b3e |
- pinctrl-0 = <&uart0_xfer &uart0_cts>;
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&uart2 {
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
&usb_host0_ehci {
|
|
|
2f12b3e |
status = "okay";
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
@@ -581,19 +170,3 @@
|
|
|
2f12b3e |
status = "okay";
|
|
|
2f12b3e |
dr_mode = "host";
|
|
|
2f12b3e |
};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&vopb {
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&vopb_mmu {
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&vopl {
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
-
|
|
|
2f12b3e |
-&vopl_mmu {
|
|
|
2f12b3e |
- status = "okay";
|
|
|
2f12b3e |
-};
|
|
|
2f12b3e |
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
|
|
|
2f12b3e |
new file mode 100644
|
|
|
2f12b3e |
index 000000000000..5a5d8e28ef55
|
|
|
2f12b3e |
--- /dev/null
|
|
|
2f12b3e |
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
|
|
|
2f12b3e |
@@ -0,0 +1,439 @@
|
|
|
2f12b3e |
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
|
2f12b3e |
+/*
|
|
|
2f12b3e |
+ * Copyright (c) 2018 Collabora Ltd.
|
|
|
2f12b3e |
+ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
|
|
|
2f12b3e |
+ * Copyright (c) 2018 Linaro Ltd.
|
|
|
2f12b3e |
+ */
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+#include "rk3399.dtsi"
|
|
|
2f12b3e |
+#include "rk3399-opp.dtsi"
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+/ {
|
|
|
2f12b3e |
+ vcc1v8_s0: vcc1v8-s0 {
|
|
|
2f12b3e |
+ compatible = "regulator-fixed";
|
|
|
2f12b3e |
+ regulator-name = "vcc1v8_s0";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <1800000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <1800000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc_sys: vcc-sys {
|
|
|
2f12b3e |
+ compatible = "regulator-fixed";
|
|
|
2f12b3e |
+ regulator-name = "vcc_sys";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <5000000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <5000000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc3v3_sys: vcc3v3-sys {
|
|
|
2f12b3e |
+ compatible = "regulator-fixed";
|
|
|
2f12b3e |
+ regulator-name = "vcc3v3_sys";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <3300000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <3300000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ vin-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vdd_log: vdd-log {
|
|
|
2f12b3e |
+ compatible = "pwm-regulator";
|
|
|
2f12b3e |
+ pwms = <&pwm2 0 25000 0>;
|
|
|
2f12b3e |
+ regulator-name = "vdd_log";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <800000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <1400000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ vin-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&cpu_l0 {
|
|
|
2f12b3e |
+ cpu-supply = <&vdd_cpu_l>;
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&cpu_l1 {
|
|
|
2f12b3e |
+ cpu-supply = <&vdd_cpu_l>;
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&cpu_l2 {
|
|
|
2f12b3e |
+ cpu-supply = <&vdd_cpu_l>;
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&cpu_l3 {
|
|
|
2f12b3e |
+ cpu-supply = <&vdd_cpu_l>;
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&cpu_b0 {
|
|
|
2f12b3e |
+ cpu-supply = <&vdd_cpu_b>;
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&cpu_b1 {
|
|
|
2f12b3e |
+ cpu-supply = <&vdd_cpu_b>;
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&emmc_phy {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&hdmi {
|
|
|
2f12b3e |
+ ddc-i2c-bus = <&i2c3>;
|
|
|
2f12b3e |
+ pinctrl-names = "default";
|
|
|
2f12b3e |
+ pinctrl-0 = <&hdmi_cec>;
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&i2c0 {
|
|
|
2f12b3e |
+ clock-frequency = <400000>;
|
|
|
2f12b3e |
+ i2c-scl-rising-time-ns = <168>;
|
|
|
2f12b3e |
+ i2c-scl-falling-time-ns = <4>;
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vdd_cpu_b: regulator@40 {
|
|
|
2f12b3e |
+ compatible = "silergy,syr827";
|
|
|
2f12b3e |
+ reg = <0x40>;
|
|
|
2f12b3e |
+ fcs,suspend-voltage-selector = <1>;
|
|
|
2f12b3e |
+ regulator-name = "vdd_cpu_b";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <712500>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <1500000>;
|
|
|
2f12b3e |
+ regulator-ramp-delay = <1000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ vin-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-off-in-suspend;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vdd_gpu: regulator@41 {
|
|
|
2f12b3e |
+ compatible = "silergy,syr828";
|
|
|
2f12b3e |
+ reg = <0x41>;
|
|
|
2f12b3e |
+ fcs,suspend-voltage-selector = <1>;
|
|
|
2f12b3e |
+ regulator-name = "vdd_gpu";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <712500>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <1500000>;
|
|
|
2f12b3e |
+ regulator-ramp-delay = <1000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ vin-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-off-in-suspend;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ rk808: pmic@1b {
|
|
|
2f12b3e |
+ compatible = "rockchip,rk808";
|
|
|
2f12b3e |
+ reg = <0x1b>;
|
|
|
2f12b3e |
+ interrupt-parent = <&gpio1>;
|
|
|
2f12b3e |
+ interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
|
|
|
2f12b3e |
+ pinctrl-names = "default";
|
|
|
2f12b3e |
+ pinctrl-0 = <&pmic_int_l>;
|
|
|
2f12b3e |
+ rockchip,system-power-controller;
|
|
|
2f12b3e |
+ wakeup-source;
|
|
|
2f12b3e |
+ #clock-cells = <1>;
|
|
|
2f12b3e |
+ clock-output-names = "xin32k", "rk808-clkout2";
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc1-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ vcc2-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ vcc3-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ vcc4-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ vcc6-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ vcc7-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ vcc8-supply = <&vcc3v3_sys>;
|
|
|
2f12b3e |
+ vcc9-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ vcc10-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ vcc11-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ vcc12-supply = <&vcc3v3_sys>;
|
|
|
2f12b3e |
+ vddio-supply = <&vcc_1v8>;
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ regulators {
|
|
|
2f12b3e |
+ vdd_center: DCDC_REG1 {
|
|
|
2f12b3e |
+ regulator-name = "vdd_center";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <750000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <1350000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-off-in-suspend;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vdd_cpu_l: DCDC_REG2 {
|
|
|
2f12b3e |
+ regulator-name = "vdd_cpu_l";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <750000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <1350000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-off-in-suspend;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc_ddr: DCDC_REG3 {
|
|
|
2f12b3e |
+ regulator-name = "vcc_ddr";
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc_1v8: DCDC_REG4 {
|
|
|
2f12b3e |
+ regulator-name = "vcc_1v8";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <1800000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <1800000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ regulator-suspend-microvolt = <1800000>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc1v8_dvp: LDO_REG1 {
|
|
|
2f12b3e |
+ regulator-name = "vcc1v8_dvp";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <1800000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <1800000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ regulator-suspend-microvolt = <1800000>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcca1v8_hdmi: LDO_REG2 {
|
|
|
2f12b3e |
+ regulator-name = "vcca1v8_hdmi";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <1800000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <1800000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ regulator-suspend-microvolt = <1800000>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcca_1v8: LDO_REG3 {
|
|
|
2f12b3e |
+ regulator-name = "vcca_1v8";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <1800000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <1800000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ regulator-suspend-microvolt = <1800000>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc_sd: LDO_REG4 {
|
|
|
2f12b3e |
+ regulator-name = "vcc_sd";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <1800000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <3300000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ regulator-suspend-microvolt = <3300000>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc3v0_sd: LDO_REG5 {
|
|
|
2f12b3e |
+ regulator-name = "vcc3v0_sd";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <3000000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <3000000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ regulator-suspend-microvolt = <3000000>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc_1v5: LDO_REG6 {
|
|
|
2f12b3e |
+ regulator-name = "vcc_1v5";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <1500000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <1500000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ regulator-suspend-microvolt = <1500000>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcca0v9_hdmi: LDO_REG7 {
|
|
|
2f12b3e |
+ regulator-name = "vcca0v9_hdmi";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <900000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <900000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ regulator-suspend-microvolt = <900000>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc_3v0: LDO_REG8 {
|
|
|
2f12b3e |
+ regulator-name = "vcc_3v0";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <3000000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <3000000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ regulator-suspend-microvolt = <3000000>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc3v3_s3: SWITCH_REG1 {
|
|
|
2f12b3e |
+ regulator-name = "vcc3v3_s3";
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc3v3_s0: SWITCH_REG2 {
|
|
|
2f12b3e |
+ regulator-name = "vcc3v3_s0";
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-state-mem {
|
|
|
2f12b3e |
+ regulator-on-in-suspend;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&i2c1 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&i2c2 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&i2c3 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&i2c4 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&io_domains {
|
|
|
2f12b3e |
+ bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */
|
|
|
2f12b3e |
+ audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */
|
|
|
2f12b3e |
+ sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */
|
|
|
2f12b3e |
+ gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&pmu_io_domains {
|
|
|
2f12b3e |
+ pmu1830-supply = <&vcc_1v8>;
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&pinctrl {
|
|
|
2f12b3e |
+ sdmmc {
|
|
|
2f12b3e |
+ sdmmc_bus1: sdmmc-bus1 {
|
|
|
2f12b3e |
+ rockchip,pins =
|
|
|
2f12b3e |
+ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ sdmmc_bus4: sdmmc-bus4 {
|
|
|
2f12b3e |
+ rockchip,pins =
|
|
|
2f12b3e |
+ <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>,
|
|
|
2f12b3e |
+ <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>,
|
|
|
2f12b3e |
+ <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>,
|
|
|
2f12b3e |
+ <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ sdmmc_clk: sdmmc-clk {
|
|
|
2f12b3e |
+ rockchip,pins =
|
|
|
2f12b3e |
+ <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ sdmmc_cmd: sdmmc-cmd {
|
|
|
2f12b3e |
+ rockchip,pins =
|
|
|
2f12b3e |
+ <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ pmic {
|
|
|
2f12b3e |
+ pmic_int_l: pmic-int-l {
|
|
|
2f12b3e |
+ rockchip,pins =
|
|
|
2f12b3e |
+ <1 21 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vsel1_gpio: vsel1-gpio {
|
|
|
2f12b3e |
+ rockchip,pins =
|
|
|
2f12b3e |
+ <1 17 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vsel2_gpio: vsel2-gpio {
|
|
|
2f12b3e |
+ rockchip,pins =
|
|
|
2f12b3e |
+ <1 14 RK_FUNC_GPIO &pcfg_pull_down>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&pwm2 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&pwm3 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&sdhci {
|
|
|
2f12b3e |
+ bus-width = <8>;
|
|
|
2f12b3e |
+ mmc-hs400-1_8v;
|
|
|
2f12b3e |
+ mmc-hs400-enhanced-strobe;
|
|
|
2f12b3e |
+ non-removable;
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&sdmmc {
|
|
|
2f12b3e |
+ bus-width = <4>;
|
|
|
2f12b3e |
+ cap-mmc-highspeed;
|
|
|
2f12b3e |
+ cap-sd-highspeed;
|
|
|
2f12b3e |
+ clock-frequency = <100000000>;
|
|
|
2f12b3e |
+ clock-freq-min-max = <100000 100000000>;
|
|
|
2f12b3e |
+ disable-wp;
|
|
|
2f12b3e |
+ sd-uhs-sdr104;
|
|
|
2f12b3e |
+ vqmmc-supply = <&vcc_sd>;
|
|
|
2f12b3e |
+ card-detect-delay = <800>;
|
|
|
2f12b3e |
+ pinctrl-names = "default";
|
|
|
2f12b3e |
+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&uart0 {
|
|
|
2f12b3e |
+ pinctrl-names = "default";
|
|
|
2f12b3e |
+ pinctrl-0 = <&uart0_xfer &uart0_cts>;
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&uart2 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&vopb {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&vopb_mmu {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&vopl {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&vopl_mmu {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
--
|
|
|
2f12b3e |
2.19.0.rc1
|
|
|
2f12b3e |
|
|
|
2f12b3e |
From afb33f3ec13b5ca3d7f2acd0a03dd707cba90638 Mon Sep 17 00:00:00 2001
|
|
|
2f12b3e |
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
|
2f12b3e |
Date: Mon, 10 Sep 2018 20:43:54 +0530
|
|
|
2f12b3e |
Subject: [PATCH 2/4] dt-bindings: arm: rockchip: Add binding for Rock960 board
|
|
|
2f12b3e |
|
|
|
2f12b3e |
Add devicetree binding for Rock960 board from Vamrs Limited.
|
|
|
2f12b3e |
|
|
|
2f12b3e |
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
|
2f12b3e |
---
|
|
|
2f12b3e |
Documentation/devicetree/bindings/arm/rockchip.txt | 4 ++++
|
|
|
2f12b3e |
1 file changed, 4 insertions(+)
|
|
|
2f12b3e |
|
|
|
2f12b3e |
diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt
|
|
|
2f12b3e |
index d46c5d43e27f..4ed03f7e8eb2 100644
|
|
|
2f12b3e |
--- a/Documentation/devicetree/bindings/arm/rockchip.txt
|
|
|
2f12b3e |
+++ b/Documentation/devicetree/bindings/arm/rockchip.txt
|
|
|
2f12b3e |
@@ -5,6 +5,10 @@ Rockchip platforms device tree bindings
|
|
|
2f12b3e |
Required root node properties:
|
|
|
2f12b3e |
- compatible = "vamrs,ficus", "rockchip,rk3399";
|
|
|
2f12b3e |
|
|
|
2f12b3e |
+- 96boards RK3399 Rock960 (ROCK960 Consumer Edition)
|
|
|
2f12b3e |
+ Required root node properties:
|
|
|
2f12b3e |
+ - compatible = "vamrs,rk3399-rock960", "rockchip,rk3399";
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
- Amarula Vyasa RK3288 board
|
|
|
2f12b3e |
Required root node properties:
|
|
|
2f12b3e |
- compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
|
|
|
2f12b3e |
--
|
|
|
2f12b3e |
2.19.0.rc1
|
|
|
2f12b3e |
|
|
|
2f12b3e |
From d7c58c9061b4aee405e328d1c8a60850605aac94 Mon Sep 17 00:00:00 2001
|
|
|
2f12b3e |
From: Peter Robinson <pbrobinson@gmail.com>
|
|
|
2f12b3e |
Date: Mon, 10 Sep 2018 18:26:45 +0100
|
|
|
2f12b3e |
Subject: [PATCH 3/4] arm64: boot: dts: rockchip: Add support for Rock960 board
|
|
|
2f12b3e |
|
|
|
2f12b3e |
Add devicetree support for Rock960 board, one of the Consumer Edition
|
|
|
2f12b3e |
boards of the 96Boards family. This board support utilizes the common
|
|
|
2f12b3e |
Rock960 family board support that includes Ficus 96Board.
|
|
|
2f12b3e |
|
|
|
2f12b3e |
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
|
2f12b3e |
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
|
|
|
2f12b3e |
---
|
|
|
2f12b3e |
arch/arm64/boot/dts/rockchip/Makefile | 1 +
|
|
|
2f12b3e |
.../boot/dts/rockchip/rk3399-rock960.dts | 139 ++++++++++++++++++
|
|
|
2f12b3e |
2 files changed, 140 insertions(+)
|
|
|
2f12b3e |
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
|
|
|
2f12b3e |
|
|
|
2f12b3e |
diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
|
|
|
2f12b3e |
index 2811fb701f12..458cce9e1a05 100644
|
|
|
2f12b3e |
--- a/arch/arm64/boot/dts/rockchip/Makefile
|
|
|
2f12b3e |
+++ b/arch/arm64/boot/dts/rockchip/Makefile
|
|
|
2f12b3e |
@@ -13,5 +13,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ficus.dtb
|
|
|
2f12b3e |
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb
|
|
|
2f12b3e |
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
|
|
|
2f12b3e |
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
|
|
|
2f12b3e |
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rock960.dtb
|
|
|
2f12b3e |
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
|
|
|
2f12b3e |
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
|
|
|
2f12b3e |
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
|
|
|
2f12b3e |
new file mode 100644
|
|
|
2f12b3e |
index 000000000000..281f3d79b38e
|
|
|
2f12b3e |
--- /dev/null
|
|
|
2f12b3e |
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dts
|
|
|
2f12b3e |
@@ -0,0 +1,139 @@
|
|
|
2f12b3e |
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
|
2f12b3e |
+/*
|
|
|
2f12b3e |
+ * Copyright (c) 2018 Linaro Ltd.
|
|
|
2f12b3e |
+ */
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+/dts-v1/;
|
|
|
2f12b3e |
+#include "rk3399-rock960.dtsi"
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+/ {
|
|
|
2f12b3e |
+ model = "96boards Rock960";
|
|
|
2f12b3e |
+ compatible = "vamrs,rk3399-rock960", "rockchip,rk3399";
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ chosen {
|
|
|
2f12b3e |
+ stdout-path = "serial2:1500000n8";
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc3v3_pcie: vcc3v3-pcie-regulator {
|
|
|
2f12b3e |
+ compatible = "regulator-fixed";
|
|
|
2f12b3e |
+ enable-active-high;
|
|
|
2f12b3e |
+ gpio = <&gpio2 5 GPIO_ACTIVE_HIGH>;
|
|
|
2f12b3e |
+ pinctrl-names = "default";
|
|
|
2f12b3e |
+ pinctrl-0 = <&pcie_drv>;
|
|
|
2f12b3e |
+ regulator-boot-on;
|
|
|
2f12b3e |
+ regulator-name = "vcc3v3_pcie";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <3300000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <3300000>;
|
|
|
2f12b3e |
+ vin-supply = <&vcc3v3_sys>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ vcc5v0_host: vcc5v0-host-regulator {
|
|
|
2f12b3e |
+ compatible = "regulator-fixed";
|
|
|
2f12b3e |
+ enable-active-high;
|
|
|
2f12b3e |
+ gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>;
|
|
|
2f12b3e |
+ pinctrl-names = "default";
|
|
|
2f12b3e |
+ pinctrl-0 = <&host_vbus_drv>;
|
|
|
2f12b3e |
+ regulator-name = "vcc5v0_host";
|
|
|
2f12b3e |
+ regulator-min-microvolt = <5000000>;
|
|
|
2f12b3e |
+ regulator-max-microvolt = <5000000>;
|
|
|
2f12b3e |
+ regulator-always-on;
|
|
|
2f12b3e |
+ vin-supply = <&vcc_sys>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&pinctrl {
|
|
|
2f12b3e |
+ pcie {
|
|
|
2f12b3e |
+ pcie_drv: pcie-drv {
|
|
|
2f12b3e |
+ rockchip,pins =
|
|
|
2f12b3e |
+ <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+ usb2 {
|
|
|
2f12b3e |
+ host_vbus_drv: host-vbus-drv {
|
|
|
2f12b3e |
+ rockchip,pins =
|
|
|
2f12b3e |
+ <4 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>;
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+ };
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&pcie_phy {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&pcie0 {
|
|
|
2f12b3e |
+ ep-gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_HIGH>;
|
|
|
2f12b3e |
+ num-lanes = <4>;
|
|
|
2f12b3e |
+ pinctrl-names = "default";
|
|
|
2f12b3e |
+ pinctrl-0 = <&pcie_clkreqn_cpm>;
|
|
|
2f12b3e |
+ vpcie3v3-supply = <&vcc3v3_pcie>;
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&tcphy0 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&tcphy1 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&u2phy0 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&u2phy1 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&u2phy0_host {
|
|
|
2f12b3e |
+ phy-supply = <&vcc5v0_host>;
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&u2phy1_host {
|
|
|
2f12b3e |
+ phy-supply = <&vcc5v0_host>;
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&u2phy0_otg {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&u2phy1_otg {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&usb_host0_ehci {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&usb_host0_ohci {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&usb_host1_ehci {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&usb_host1_ohci {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&usbdrd3_0 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&usbdrd_dwc3_0 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+ dr_mode = "otg";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&usbdrd3_1 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
+
|
|
|
2f12b3e |
+&usbdrd_dwc3_1 {
|
|
|
2f12b3e |
+ status = "okay";
|
|
|
2f12b3e |
+ dr_mode = "host";
|
|
|
2f12b3e |
+};
|
|
|
2f12b3e |
--
|
|
|
2f12b3e |
2.19.0.rc1
|
|
|
2f12b3e |
|
|
|
2f12b3e |
From defb2d89461057066a7d233a3072010da24d774c Mon Sep 17 00:00:00 2001
|
|
|
2f12b3e |
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
|
2f12b3e |
Date: Mon, 10 Sep 2018 20:43:56 +0530
|
|
|
2f12b3e |
Subject: [PATCH 4/4] arm64: dts: rockchip: Enable SD card detection for
|
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|
2f12b3e |
Rock960 boards
|
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|
2f12b3e |
|
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|
2f12b3e |
For proper working of SD cards, let's add the Card Detect GPIO property
|
|
|
2f12b3e |
to the common devicetree for Rock960 family boards.
|
|
|
2f12b3e |
|
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|
2f12b3e |
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
|
|
|
2f12b3e |
---
|
|
|
2f12b3e |
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi | 1 +
|
|
|
2f12b3e |
1 file changed, 1 insertion(+)
|
|
|
2f12b3e |
|
|
|
2f12b3e |
diff --git a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
|
|
|
2f12b3e |
index 5a5d8e28ef55..f68254831ad9 100644
|
|
|
2f12b3e |
--- a/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
|
|
|
2f12b3e |
+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
|
|
|
2f12b3e |
@@ -403,6 +403,7 @@
|
|
|
2f12b3e |
cap-sd-highspeed;
|
|
|
2f12b3e |
clock-frequency = <100000000>;
|
|
|
2f12b3e |
clock-freq-min-max = <100000 100000000>;
|
|
|
2f12b3e |
+ cd-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
|
|
|
2f12b3e |
disable-wp;
|
|
|
2f12b3e |
sd-uhs-sdr104;
|
|
|
2f12b3e |
vqmmc-supply = <&vcc_sd>;
|
|
|
2f12b3e |
--
|
|
|
2f12b3e |
2.19.0.rc1
|
|
|
2f12b3e |
|