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From bbcb8aacb871edf0360e808180162591b11c6a35 Mon Sep 17 00:00:00 2001
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From: Boris Brezillon <boris.brezillon@free-electrons.com>
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Date: Mon, 27 Feb 2017 12:28:01 -0800
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Subject: [PATCH 1/3] dt-bindings: Document the dmas and dma-names properties
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 for VC4 HDMI
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These are optional, but necessary for HDMI audio support.
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Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Acked-by: Rob Herring <robh@kernel.org>
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Link: http://patchwork.freedesktop.org/patch/msgid/20170227202803.12855-1-eric@anholt.net
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---
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 Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt | 3 +++
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 1 file changed, 3 insertions(+)
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diff --git a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
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index 34c7fddcea39..ca02d3e4db91 100644
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--- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
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+++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt
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@@ -34,6 +34,9 @@ Optional properties for HDMI:
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 - hpd-gpios:	The GPIO pin for HDMI hotplug detect (if it doesn't appear
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 		  as an interrupt/status bit in the HDMI controller
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 		  itself).  See bindings/pinctrl/brcm,bcm2835-gpio.txt
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+- dmas:		Should contain one entry pointing to the DMA channel used to
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+		transfer audio data
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+- dma-names:	Should contain "audio-rx"
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 Required properties for DPI:
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 - compatible:	Should be "brcm,bcm2835-dpi"
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-- 
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2.12.0
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From 8e13e0d8ecf2202c707225a612d10c9534d849f7 Mon Sep 17 00:00:00 2001
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From: Eric Anholt <eric@anholt.net>
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Date: Mon, 27 Feb 2017 12:28:02 -0800
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Subject: [PATCH 2/3] drm/vc4: Add HDMI audio support
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The HDMI encoder IP embeds all needed blocks to output audio, with a
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custom DAI called MAI moving audio between the two parts of the HDMI
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core.  This driver now exposes a sound card to let users stream audio
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to their display.
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Using the hdmi-codec driver has been considered here, but MAI meant
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having to significantly rework hdmi-codec, and it would have left
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little shared code with the I2S mode anyway.
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The encoder requires that the audio be SPDIF-formatted frames only,
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which alsalib will format-convert for us.
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This patch is the combined work of Eric Anholt (initial register setup
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with a separate dmaengine driver and using simple-audio-card) and
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Boris Brezillon (moving it all into HDMI, massive debug to get it
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actually working), and which Eric has the permission to release.
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v2: Drop "-audio" from sound card name, since that's already implied
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    (suggestion by Boris)
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Signed-off-by: Eric Anholt <eric@anholt.net>
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Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Link: http://patchwork.freedesktop.org/patch/msgid/20170227202803.12855-2-eric@anholt.net
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---
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 drivers/gpu/drm/vc4/Kconfig    |   4 +
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 drivers/gpu/drm/vc4/vc4_hdmi.c | 494 ++++++++++++++++++++++++++++++++++++++++-
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 drivers/gpu/drm/vc4/vc4_regs.h | 107 ++++++++-
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 3 files changed, 603 insertions(+), 2 deletions(-)
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diff --git a/drivers/gpu/drm/vc4/Kconfig b/drivers/gpu/drm/vc4/Kconfig
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index e1517d07cb7d..973b4203c0b2 100644
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--- a/drivers/gpu/drm/vc4/Kconfig
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+++ b/drivers/gpu/drm/vc4/Kconfig
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@@ -2,11 +2,15 @@ config DRM_VC4
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 	tristate "Broadcom VC4 Graphics"
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 	depends on ARCH_BCM2835 || COMPILE_TEST
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 	depends on DRM
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+	depends on SND && SND_SOC
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 	depends on COMMON_CLK
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 	select DRM_KMS_HELPER
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 	select DRM_KMS_CMA_HELPER
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 	select DRM_GEM_CMA_HELPER
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 	select DRM_PANEL
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+	select SND_PCM
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+	select SND_PCM_ELD
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+	select SND_SOC_GENERIC_DMAENGINE_PCM
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 	select DRM_MIPI_DSI
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 	help
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 	  Choose this option if you have a system that has a Broadcom
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diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
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index 93d5994f3a04..e4abf4bfc464 100644
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--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
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+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
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@@ -31,11 +31,27 @@
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 #include "linux/clk.h"
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 #include "linux/component.h"
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 #include "linux/i2c.h"
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+#include "linux/of_address.h"
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 #include "linux/of_gpio.h"
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 #include "linux/of_platform.h"
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+#include "linux/rational.h"
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+#include "sound/dmaengine_pcm.h"
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+#include "sound/pcm_drm_eld.h"
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+#include "sound/pcm_params.h"
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+#include "sound/soc.h"
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 #include "vc4_drv.h"
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 #include "vc4_regs.h"
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+/* HDMI audio information */
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+struct vc4_hdmi_audio {
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+	struct snd_soc_card card;
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+	struct snd_soc_dai_link link;
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+	int samplerate;
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+	int channels;
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+	struct snd_dmaengine_dai_dma_data dma_data;
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+	struct snd_pcm_substream *substream;
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+};
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+
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 /* General HDMI hardware state. */
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 struct vc4_hdmi {
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 	struct platform_device *pdev;
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@@ -43,6 +59,8 @@ struct vc4_hdmi {
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 	struct drm_encoder *encoder;
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 	struct drm_connector *connector;
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+	struct vc4_hdmi_audio audio;
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+
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 	struct i2c_adapter *ddc;
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 	void __iomem *hdmicore_regs;
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 	void __iomem *hd_regs;
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@@ -98,6 +116,10 @@ static const struct {
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 	HDMI_REG(VC4_HDMI_SW_RESET_CONTROL),
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 	HDMI_REG(VC4_HDMI_HOTPLUG_INT),
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 	HDMI_REG(VC4_HDMI_HOTPLUG),
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+	HDMI_REG(VC4_HDMI_MAI_CHANNEL_MAP),
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+	HDMI_REG(VC4_HDMI_MAI_CONFIG),
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+	HDMI_REG(VC4_HDMI_MAI_FORMAT),
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+	HDMI_REG(VC4_HDMI_AUDIO_PACKET_CONFIG),
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 	HDMI_REG(VC4_HDMI_RAM_PACKET_CONFIG),
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 	HDMI_REG(VC4_HDMI_HORZA),
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 	HDMI_REG(VC4_HDMI_HORZB),
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@@ -108,6 +130,7 @@ static const struct {
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 	HDMI_REG(VC4_HDMI_VERTB0),
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 	HDMI_REG(VC4_HDMI_VERTB1),
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 	HDMI_REG(VC4_HDMI_TX_PHY_RESET_CTL),
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+	HDMI_REG(VC4_HDMI_TX_PHY_CTL0),
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 };
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 static const struct {
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@@ -116,6 +139,9 @@ static const struct {
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 } hd_regs[] = {
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 	HDMI_REG(VC4_HD_M_CTL),
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 	HDMI_REG(VC4_HD_MAI_CTL),
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+	HDMI_REG(VC4_HD_MAI_THR),
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+	HDMI_REG(VC4_HD_MAI_FMT),
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+	HDMI_REG(VC4_HD_MAI_SMP),
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 	HDMI_REG(VC4_HD_VID_CTL),
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 	HDMI_REG(VC4_HD_CSC_CTL),
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 	HDMI_REG(VC4_HD_FRAME_COUNT),
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@@ -215,6 +241,7 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector)
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 	drm_mode_connector_update_edid_property(connector, edid);
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 	ret = drm_add_edid_modes(connector, edid);
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+	drm_edid_to_eld(connector, edid);
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 	return ret;
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 }
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@@ -300,7 +327,7 @@ static void vc4_hdmi_write_infoframe(struct drm_encoder *encoder,
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 	struct drm_device *dev = encoder->dev;
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 	struct vc4_dev *vc4 = to_vc4_dev(dev);
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 	u32 packet_id = frame->any.type - 0x80;
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-	u32 packet_reg = VC4_HDMI_GCP_0 + VC4_HDMI_PACKET_STRIDE * packet_id;
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+	u32 packet_reg = VC4_HDMI_RAM_PACKET(packet_id);
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 	uint8_t buffer[VC4_HDMI_PACKET_STRIDE];
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 	ssize_t len, i;
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 	int ret;
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@@ -381,6 +408,24 @@ static void vc4_hdmi_set_spd_infoframe(struct drm_encoder *encoder)
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 	vc4_hdmi_write_infoframe(encoder, &frame);
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 }
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+static void vc4_hdmi_set_audio_infoframe(struct drm_encoder *encoder)
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+{
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+	struct drm_device *drm = encoder->dev;
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+	struct vc4_dev *vc4 = drm->dev_private;
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+	struct vc4_hdmi *hdmi = vc4->hdmi;
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+	union hdmi_infoframe frame;
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+	int ret;
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+
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+	ret = hdmi_audio_infoframe_init(&frame.audio);
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+
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+	frame.audio.coding_type = HDMI_AUDIO_CODING_TYPE_STREAM;
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+	frame.audio.sample_frequency = HDMI_AUDIO_SAMPLE_FREQUENCY_STREAM;
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+	frame.audio.sample_size = HDMI_AUDIO_SAMPLE_SIZE_STREAM;
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+	frame.audio.channels = hdmi->audio.channels;
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+
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+	vc4_hdmi_write_infoframe(encoder, &frame);
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+}
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+
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 static void vc4_hdmi_set_infoframes(struct drm_encoder *encoder)
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 {
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 	vc4_hdmi_set_avi_infoframe(encoder);
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@@ -589,6 +634,447 @@ static const struct drm_encoder_helper_funcs vc4_hdmi_encoder_helper_funcs = {
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 	.enable = vc4_hdmi_encoder_enable,
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 };
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+/* HDMI audio codec callbacks */
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+static void vc4_hdmi_audio_set_mai_clock(struct vc4_hdmi *hdmi)
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+{
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+	struct drm_device *drm = hdmi->encoder->dev;
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+	struct vc4_dev *vc4 = to_vc4_dev(drm);
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+	u32 hsm_clock = clk_get_rate(hdmi->hsm_clock);
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+	unsigned long n, m;
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+
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+	rational_best_approximation(hsm_clock, hdmi->audio.samplerate,
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+				    VC4_HD_MAI_SMP_N_MASK >>
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+				    VC4_HD_MAI_SMP_N_SHIFT,
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+				    (VC4_HD_MAI_SMP_M_MASK >>
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+				     VC4_HD_MAI_SMP_M_SHIFT) + 1,
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+				    &n, &m);
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+
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+	HD_WRITE(VC4_HD_MAI_SMP,
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+		 VC4_SET_FIELD(n, VC4_HD_MAI_SMP_N) |
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+		 VC4_SET_FIELD(m - 1, VC4_HD_MAI_SMP_M));
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+}
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+
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+static void vc4_hdmi_set_n_cts(struct vc4_hdmi *hdmi)
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+{
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+	struct drm_encoder *encoder = hdmi->encoder;
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+	struct drm_crtc *crtc = encoder->crtc;
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+	struct drm_device *drm = encoder->dev;
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+	struct vc4_dev *vc4 = to_vc4_dev(drm);
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+	const struct drm_display_mode *mode = &crtc->state->adjusted_mode;
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+	u32 samplerate = hdmi->audio.samplerate;
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+	u32 n, cts;
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+	u64 tmp;
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+
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+	n = 128 * samplerate / 1000;
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+	tmp = (u64)(mode->clock * 1000) * n;
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+	do_div(tmp, 128 * samplerate);
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+	cts = tmp;
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+
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+	HDMI_WRITE(VC4_HDMI_CRP_CFG,
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+		   VC4_HDMI_CRP_CFG_EXTERNAL_CTS_EN |
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+		   VC4_SET_FIELD(n, VC4_HDMI_CRP_CFG_N));
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+
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+	/*
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+	 * We could get slightly more accurate clocks in some cases by
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+	 * providing a CTS_1 value.  The two CTS values are alternated
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+	 * between based on the period fields
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+	 */
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+	HDMI_WRITE(VC4_HDMI_CTS_0, cts);
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+	HDMI_WRITE(VC4_HDMI_CTS_1, cts);
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+}
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+
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+static inline struct vc4_hdmi *dai_to_hdmi(struct snd_soc_dai *dai)
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+{
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+	struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
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+
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+	return snd_soc_card_get_drvdata(card);
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+}
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+
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+static int vc4_hdmi_audio_startup(struct snd_pcm_substream *substream,
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+				  struct snd_soc_dai *dai)
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+{
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+	struct vc4_hdmi *hdmi = dai_to_hdmi(dai);
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+	struct drm_encoder *encoder = hdmi->encoder;
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+	struct vc4_dev *vc4 = to_vc4_dev(encoder->dev);
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+	int ret;
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+
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+	if (hdmi->audio.substream && hdmi->audio.substream != substream)
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+		return -EINVAL;
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+
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+	hdmi->audio.substream = substream;
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+
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+	/*
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+	 * If the HDMI encoder hasn't probed, or the encoder is
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+	 * currently in DVI mode, treat the codec dai as missing.
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+	 */
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+	if (!encoder->crtc || !(HDMI_READ(VC4_HDMI_RAM_PACKET_CONFIG) &
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+				VC4_HDMI_RAM_PACKET_ENABLE))
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+		return -ENODEV;
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+
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+	ret = snd_pcm_hw_constraint_eld(substream->runtime,
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+					hdmi->connector->eld);
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+	if (ret)
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+		return ret;
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+
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+	return 0;
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+}
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+
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+static int vc4_hdmi_audio_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
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+{
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+	return 0;
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+}
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+
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+static void vc4_hdmi_audio_reset(struct vc4_hdmi *hdmi)
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+{
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+	struct drm_encoder *encoder = hdmi->encoder;
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+	struct drm_device *drm = encoder->dev;
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+	struct device *dev = &hdmi->pdev->dev;
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+	struct vc4_dev *vc4 = to_vc4_dev(drm);
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+	int ret;
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+
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+	ret = vc4_hdmi_stop_packet(encoder, HDMI_INFOFRAME_TYPE_AUDIO);
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+	if (ret)
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+		dev_err(dev, "Failed to stop audio infoframe: %d\n", ret);
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+
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+	HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_RESET);
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+	HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_ERRORF);
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+	HD_WRITE(VC4_HD_MAI_CTL, VC4_HD_MAI_CTL_FLUSH);
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+}
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+
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+static void vc4_hdmi_audio_shutdown(struct snd_pcm_substream *substream,
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+				    struct snd_soc_dai *dai)
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+{
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+	struct vc4_hdmi *hdmi = dai_to_hdmi(dai);
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+
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+	if (substream != hdmi->audio.substream)
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+		return;
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+
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+	vc4_hdmi_audio_reset(hdmi);
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+
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+	hdmi->audio.substream = NULL;
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+}
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+
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+/* HDMI audio codec callbacks */
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+static int vc4_hdmi_audio_hw_params(struct snd_pcm_substream *substream,
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+				    struct snd_pcm_hw_params *params,
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+				    struct snd_soc_dai *dai)
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+{
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+	struct vc4_hdmi *hdmi = dai_to_hdmi(dai);
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+	struct drm_encoder *encoder = hdmi->encoder;
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+	struct drm_device *drm = encoder->dev;
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+	struct device *dev = &hdmi->pdev->dev;
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+	struct vc4_dev *vc4 = to_vc4_dev(drm);
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+	u32 audio_packet_config, channel_mask;
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+	u32 channel_map, i;
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+
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+	if (substream != hdmi->audio.substream)
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+		return -EINVAL;
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+
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+	dev_dbg(dev, "%s: %u Hz, %d bit, %d channels\n", __func__,
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+		params_rate(params), params_width(params),
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+		params_channels(params));
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+
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+	hdmi->audio.channels = params_channels(params);
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+	hdmi->audio.samplerate = params_rate(params);
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+
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+	HD_WRITE(VC4_HD_MAI_CTL,
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+		 VC4_HD_MAI_CTL_RESET |
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+		 VC4_HD_MAI_CTL_FLUSH |
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+		 VC4_HD_MAI_CTL_DLATE |
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+		 VC4_HD_MAI_CTL_ERRORE |
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+		 VC4_HD_MAI_CTL_ERRORF);
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+
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+	vc4_hdmi_audio_set_mai_clock(hdmi);
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+
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+	audio_packet_config =
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+		VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_SAMPLE_FLAT |
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+		VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_INACTIVE_CHANNELS |
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+		VC4_SET_FIELD(0xf, VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER);
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+
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+	channel_mask = GENMASK(hdmi->audio.channels - 1, 0);
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+	audio_packet_config |= VC4_SET_FIELD(channel_mask,
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+					     VC4_HDMI_AUDIO_PACKET_CEA_MASK);
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+
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+	/* Set the MAI threshold.  This logic mimics the firmware's. */
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+	if (hdmi->audio.samplerate > 96000) {
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+		HD_WRITE(VC4_HD_MAI_THR,
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+			 VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQHIGH) |
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+			 VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW));
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+	} else if (hdmi->audio.samplerate > 48000) {
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+		HD_WRITE(VC4_HD_MAI_THR,
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+			 VC4_SET_FIELD(0x14, VC4_HD_MAI_THR_DREQHIGH) |
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+			 VC4_SET_FIELD(0x12, VC4_HD_MAI_THR_DREQLOW));
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+	} else {
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+		HD_WRITE(VC4_HD_MAI_THR,
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+			 VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICHIGH) |
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+			 VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_PANICLOW) |
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+			 VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQHIGH) |
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+			 VC4_SET_FIELD(0x10, VC4_HD_MAI_THR_DREQLOW));
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+	}
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+
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+	HDMI_WRITE(VC4_HDMI_MAI_CONFIG,
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+		   VC4_HDMI_MAI_CONFIG_BIT_REVERSE |
580d60f
+		   VC4_SET_FIELD(channel_mask, VC4_HDMI_MAI_CHANNEL_MASK));
580d60f
+
580d60f
+	channel_map = 0;
580d60f
+	for (i = 0; i < 8; i++) {
580d60f
+		if (channel_mask & BIT(i))
580d60f
+			channel_map |= i << (3 * i);
580d60f
+	}
580d60f
+
580d60f
+	HDMI_WRITE(VC4_HDMI_MAI_CHANNEL_MAP, channel_map);
580d60f
+	HDMI_WRITE(VC4_HDMI_AUDIO_PACKET_CONFIG, audio_packet_config);
580d60f
+	vc4_hdmi_set_n_cts(hdmi);
580d60f
+
580d60f
+	return 0;
580d60f
+}
580d60f
+
580d60f
+static int vc4_hdmi_audio_trigger(struct snd_pcm_substream *substream, int cmd,
580d60f
+				  struct snd_soc_dai *dai)
580d60f
+{
580d60f
+	struct vc4_hdmi *hdmi = dai_to_hdmi(dai);
580d60f
+	struct drm_encoder *encoder = hdmi->encoder;
580d60f
+	struct drm_device *drm = encoder->dev;
580d60f
+	struct vc4_dev *vc4 = to_vc4_dev(drm);
580d60f
+
580d60f
+	switch (cmd) {
580d60f
+	case SNDRV_PCM_TRIGGER_START:
580d60f
+		vc4_hdmi_set_audio_infoframe(encoder);
580d60f
+		HDMI_WRITE(VC4_HDMI_TX_PHY_CTL0,
580d60f
+			   HDMI_READ(VC4_HDMI_TX_PHY_CTL0) &
580d60f
+			   ~VC4_HDMI_TX_PHY_RNG_PWRDN);
580d60f
+		HD_WRITE(VC4_HD_MAI_CTL,
580d60f
+			 VC4_SET_FIELD(hdmi->audio.channels,
580d60f
+				       VC4_HD_MAI_CTL_CHNUM) |
580d60f
+			 VC4_HD_MAI_CTL_ENABLE);
580d60f
+		break;
580d60f
+	case SNDRV_PCM_TRIGGER_STOP:
580d60f
+		HD_WRITE(VC4_HD_MAI_CTL,
580d60f
+			 VC4_HD_MAI_CTL_DLATE |
580d60f
+			 VC4_HD_MAI_CTL_ERRORE |
580d60f
+			 VC4_HD_MAI_CTL_ERRORF);
580d60f
+		HDMI_WRITE(VC4_HDMI_TX_PHY_CTL0,
580d60f
+			   HDMI_READ(VC4_HDMI_TX_PHY_CTL0) |
580d60f
+			   VC4_HDMI_TX_PHY_RNG_PWRDN);
580d60f
+		break;
580d60f
+	default:
580d60f
+		break;
580d60f
+	}
580d60f
+
580d60f
+	return 0;
580d60f
+}
580d60f
+
580d60f
+static inline struct vc4_hdmi *
580d60f
+snd_component_to_hdmi(struct snd_soc_component *component)
580d60f
+{
580d60f
+	struct snd_soc_card *card = snd_soc_component_get_drvdata(component);
580d60f
+
580d60f
+	return snd_soc_card_get_drvdata(card);
580d60f
+}
580d60f
+
580d60f
+static int vc4_hdmi_audio_eld_ctl_info(struct snd_kcontrol *kcontrol,
580d60f
+				       struct snd_ctl_elem_info *uinfo)
580d60f
+{
580d60f
+	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
580d60f
+	struct vc4_hdmi *hdmi = snd_component_to_hdmi(component);
580d60f
+
580d60f
+	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
580d60f
+	uinfo->count = sizeof(hdmi->connector->eld);
580d60f
+
580d60f
+	return 0;
580d60f
+}
580d60f
+
580d60f
+static int vc4_hdmi_audio_eld_ctl_get(struct snd_kcontrol *kcontrol,
580d60f
+				      struct snd_ctl_elem_value *ucontrol)
580d60f
+{
580d60f
+	struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
580d60f
+	struct vc4_hdmi *hdmi = snd_component_to_hdmi(component);
580d60f
+
580d60f
+	memcpy(ucontrol->value.bytes.data, hdmi->connector->eld,
580d60f
+	       sizeof(hdmi->connector->eld));
580d60f
+
580d60f
+	return 0;
580d60f
+}
580d60f
+
580d60f
+static const struct snd_kcontrol_new vc4_hdmi_audio_controls[] = {
580d60f
+	{
580d60f
+		.access = SNDRV_CTL_ELEM_ACCESS_READ |
580d60f
+			  SNDRV_CTL_ELEM_ACCESS_VOLATILE,
580d60f
+		.iface = SNDRV_CTL_ELEM_IFACE_PCM,
580d60f
+		.name = "ELD",
580d60f
+		.info = vc4_hdmi_audio_eld_ctl_info,
580d60f
+		.get = vc4_hdmi_audio_eld_ctl_get,
580d60f
+	},
580d60f
+};
580d60f
+
580d60f
+static const struct snd_soc_dapm_widget vc4_hdmi_audio_widgets[] = {
580d60f
+	SND_SOC_DAPM_OUTPUT("TX"),
580d60f
+};
580d60f
+
580d60f
+static const struct snd_soc_dapm_route vc4_hdmi_audio_routes[] = {
580d60f
+	{ "TX", NULL, "Playback" },
580d60f
+};
580d60f
+
580d60f
+static const struct snd_soc_codec_driver vc4_hdmi_audio_codec_drv = {
580d60f
+	.component_driver = {
580d60f
+		.controls = vc4_hdmi_audio_controls,
580d60f
+		.num_controls = ARRAY_SIZE(vc4_hdmi_audio_controls),
580d60f
+		.dapm_widgets = vc4_hdmi_audio_widgets,
580d60f
+		.num_dapm_widgets = ARRAY_SIZE(vc4_hdmi_audio_widgets),
580d60f
+		.dapm_routes = vc4_hdmi_audio_routes,
580d60f
+		.num_dapm_routes = ARRAY_SIZE(vc4_hdmi_audio_routes),
580d60f
+	},
580d60f
+};
580d60f
+
580d60f
+static const struct snd_soc_dai_ops vc4_hdmi_audio_dai_ops = {
580d60f
+	.startup = vc4_hdmi_audio_startup,
580d60f
+	.shutdown = vc4_hdmi_audio_shutdown,
580d60f
+	.hw_params = vc4_hdmi_audio_hw_params,
580d60f
+	.set_fmt = vc4_hdmi_audio_set_fmt,
580d60f
+	.trigger = vc4_hdmi_audio_trigger,
580d60f
+};
580d60f
+
580d60f
+static struct snd_soc_dai_driver vc4_hdmi_audio_codec_dai_drv = {
580d60f
+	.name = "vc4-hdmi-hifi",
580d60f
+	.playback = {
580d60f
+		.stream_name = "Playback",
580d60f
+		.channels_min = 2,
580d60f
+		.channels_max = 8,
580d60f
+		.rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
580d60f
+			 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
580d60f
+			 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
580d60f
+			 SNDRV_PCM_RATE_192000,
580d60f
+		.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE,
580d60f
+	},
580d60f
+};
580d60f
+
580d60f
+static const struct snd_soc_component_driver vc4_hdmi_audio_cpu_dai_comp = {
580d60f
+	.name = "vc4-hdmi-cpu-dai-component",
580d60f
+};
580d60f
+
580d60f
+static int vc4_hdmi_audio_cpu_dai_probe(struct snd_soc_dai *dai)
580d60f
+{
580d60f
+	struct vc4_hdmi *hdmi = dai_to_hdmi(dai);
580d60f
+
580d60f
+	snd_soc_dai_init_dma_data(dai, &hdmi->audio.dma_data, NULL);
580d60f
+
580d60f
+	return 0;
580d60f
+}
580d60f
+
580d60f
+static struct snd_soc_dai_driver vc4_hdmi_audio_cpu_dai_drv = {
580d60f
+	.name = "vc4-hdmi-cpu-dai",
580d60f
+	.probe  = vc4_hdmi_audio_cpu_dai_probe,
580d60f
+	.playback = {
580d60f
+		.stream_name = "Playback",
580d60f
+		.channels_min = 1,
580d60f
+		.channels_max = 8,
580d60f
+		.rates = SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |
580d60f
+			 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 |
580d60f
+			 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |
580d60f
+			 SNDRV_PCM_RATE_192000,
580d60f
+		.formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_LE,
580d60f
+	},
580d60f
+	.ops = &vc4_hdmi_audio_dai_ops,
580d60f
+};
580d60f
+
580d60f
+static const struct snd_dmaengine_pcm_config pcm_conf = {
580d60f
+	.chan_names[SNDRV_PCM_STREAM_PLAYBACK] = "audio-rx",
580d60f
+	.prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
580d60f
+};
580d60f
+
580d60f
+static int vc4_hdmi_audio_init(struct vc4_hdmi *hdmi)
580d60f
+{
580d60f
+	struct snd_soc_dai_link *dai_link = &hdmi->audio.link;
580d60f
+	struct snd_soc_card *card = &hdmi->audio.card;
580d60f
+	struct device *dev = &hdmi->pdev->dev;
580d60f
+	const __be32 *addr;
580d60f
+	int ret;
580d60f
+
580d60f
+	if (!of_find_property(dev->of_node, "dmas", NULL)) {
580d60f
+		dev_warn(dev,
580d60f
+			 "'dmas' DT property is missing, no HDMI audio\n");
580d60f
+		return 0;
580d60f
+	}
580d60f
+
580d60f
+	/*
580d60f
+	 * Get the physical address of VC4_HD_MAI_DATA. We need to retrieve
580d60f
+	 * the bus address specified in the DT, because the physical address
580d60f
+	 * (the one returned by platform_get_resource()) is not appropriate
580d60f
+	 * for DMA transfers.
580d60f
+	 * This VC/MMU should probably be exposed to avoid this kind of hacks.
580d60f
+	 */
580d60f
+	addr = of_get_address(dev->of_node, 1, NULL, NULL);
580d60f
+	hdmi->audio.dma_data.addr = be32_to_cpup(addr) + VC4_HD_MAI_DATA;
580d60f
+	hdmi->audio.dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
580d60f
+	hdmi->audio.dma_data.maxburst = 2;
580d60f
+
580d60f
+	ret = devm_snd_dmaengine_pcm_register(dev, &pcm_conf, 0);
580d60f
+	if (ret) {
580d60f
+		dev_err(dev, "Could not register PCM component: %d\n", ret);
580d60f
+		return ret;
580d60f
+	}
580d60f
+
580d60f
+	ret = devm_snd_soc_register_component(dev, &vc4_hdmi_audio_cpu_dai_comp,
580d60f
+					      &vc4_hdmi_audio_cpu_dai_drv, 1);
580d60f
+	if (ret) {
580d60f
+		dev_err(dev, "Could not register CPU DAI: %d\n", ret);
580d60f
+		return ret;
580d60f
+	}
580d60f
+
580d60f
+	/* register codec and codec dai */
580d60f
+	ret = snd_soc_register_codec(dev, &vc4_hdmi_audio_codec_drv,
580d60f
+				     &vc4_hdmi_audio_codec_dai_drv, 1);
580d60f
+	if (ret) {
580d60f
+		dev_err(dev, "Could not register codec: %d\n", ret);
580d60f
+		return ret;
580d60f
+	}
580d60f
+
580d60f
+	dai_link->name = "MAI";
580d60f
+	dai_link->stream_name = "MAI PCM";
580d60f
+	dai_link->codec_dai_name = vc4_hdmi_audio_codec_dai_drv.name;
580d60f
+	dai_link->cpu_dai_name = dev_name(dev);
580d60f
+	dai_link->codec_name = dev_name(dev);
580d60f
+	dai_link->platform_name = dev_name(dev);
580d60f
+
580d60f
+	card->dai_link = dai_link;
580d60f
+	card->num_links = 1;
580d60f
+	card->name = "vc4-hdmi";
580d60f
+	card->dev = dev;
580d60f
+
580d60f
+	/*
580d60f
+	 * Be careful, snd_soc_register_card() calls dev_set_drvdata() and
580d60f
+	 * stores a pointer to the snd card object in dev->driver_data. This
580d60f
+	 * means we cannot use it for something else. The hdmi back-pointer is
580d60f
+	 * now stored in card->drvdata and should be retrieved with
580d60f
+	 * snd_soc_card_get_drvdata() if needed.
580d60f
+	 */
580d60f
+	snd_soc_card_set_drvdata(card, hdmi);
580d60f
+	ret = devm_snd_soc_register_card(dev, card);
580d60f
+	if (ret) {
580d60f
+		dev_err(dev, "Could not register sound card: %d\n", ret);
580d60f
+		goto unregister_codec;
580d60f
+	}
580d60f
+
580d60f
+	return 0;
580d60f
+
580d60f
+unregister_codec:
580d60f
+	snd_soc_unregister_codec(dev);
580d60f
+
580d60f
+	return ret;
580d60f
+}
580d60f
+
580d60f
+static void vc4_hdmi_audio_cleanup(struct vc4_hdmi *hdmi)
580d60f
+{
580d60f
+	struct device *dev = &hdmi->pdev->dev;
580d60f
+
580d60f
+	/*
580d60f
+	 * If drvdata is not set this means the audio card was not
580d60f
+	 * registered, just skip codec unregistration in this case.
580d60f
+	 */
580d60f
+	if (dev_get_drvdata(dev))
580d60f
+		snd_soc_unregister_codec(dev);
580d60f
+}
580d60f
+
580d60f
 static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
580d60f
 {
580d60f
 	struct platform_device *pdev = to_platform_device(dev);
580d60f
@@ -720,6 +1206,10 @@ static int vc4_hdmi_bind(struct device *dev, struct device *master, void *data)
580d60f
 		goto err_destroy_encoder;
580d60f
 	}
580d60f
 
580d60f
+	ret = vc4_hdmi_audio_init(hdmi);
580d60f
+	if (ret)
580d60f
+		goto err_destroy_encoder;
580d60f
+
580d60f
 	return 0;
580d60f
 
580d60f
 err_destroy_encoder:
580d60f
@@ -741,6 +1231,8 @@ static void vc4_hdmi_unbind(struct device *dev, struct device *master,
580d60f
 	struct vc4_dev *vc4 = drm->dev_private;
580d60f
 	struct vc4_hdmi *hdmi = vc4->hdmi;
580d60f
 
580d60f
+	vc4_hdmi_audio_cleanup(hdmi);
580d60f
+
580d60f
 	vc4_hdmi_connector_destroy(hdmi->connector);
580d60f
 	vc4_hdmi_encoder_destroy(hdmi->encoder);
580d60f
 
580d60f
diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
580d60f
index 385405a2df05..932093936178 100644
580d60f
--- a/drivers/gpu/drm/vc4/vc4_regs.h
580d60f
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
580d60f
@@ -446,11 +446,62 @@
580d60f
 #define VC4_HDMI_HOTPLUG			0x00c
580d60f
 # define VC4_HDMI_HOTPLUG_CONNECTED		BIT(0)
580d60f
 
580d60f
+/* 3 bits per field, where each field maps from that corresponding MAI
580d60f
+ * bus channel to the given HDMI channel.
580d60f
+ */
580d60f
+#define VC4_HDMI_MAI_CHANNEL_MAP		0x090
580d60f
+
580d60f
+#define VC4_HDMI_MAI_CONFIG			0x094
580d60f
+# define VC4_HDMI_MAI_CONFIG_FORMAT_REVERSE		BIT(27)
580d60f
+# define VC4_HDMI_MAI_CONFIG_BIT_REVERSE		BIT(26)
580d60f
+# define VC4_HDMI_MAI_CHANNEL_MASK_MASK			VC4_MASK(15, 0)
580d60f
+# define VC4_HDMI_MAI_CHANNEL_MASK_SHIFT		0
580d60f
+
580d60f
+/* Last received format word on the MAI bus. */
580d60f
+#define VC4_HDMI_MAI_FORMAT			0x098
580d60f
+
580d60f
+#define VC4_HDMI_AUDIO_PACKET_CONFIG		0x09c
580d60f
+# define VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_SAMPLE_FLAT		BIT(29)
580d60f
+# define VC4_HDMI_AUDIO_PACKET_ZERO_DATA_ON_INACTIVE_CHANNELS	BIT(24)
580d60f
+# define VC4_HDMI_AUDIO_PACKET_FORCE_SAMPLE_PRESENT		BIT(19)
580d60f
+# define VC4_HDMI_AUDIO_PACKET_FORCE_B_FRAME			BIT(18)
580d60f
+# define VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER_MASK		VC4_MASK(13, 10)
580d60f
+# define VC4_HDMI_AUDIO_PACKET_B_FRAME_IDENTIFIER_SHIFT		10
580d60f
+/* If set, then multichannel, otherwise 2 channel. */
580d60f
+# define VC4_HDMI_AUDIO_PACKET_AUDIO_LAYOUT			BIT(9)
580d60f
+/* If set, then AUDIO_LAYOUT overrides audio_cea_mask */
580d60f
+# define VC4_HDMI_AUDIO_PACKET_FORCE_AUDIO_LAYOUT		BIT(8)
580d60f
+# define VC4_HDMI_AUDIO_PACKET_CEA_MASK_MASK			VC4_MASK(7, 0)
580d60f
+# define VC4_HDMI_AUDIO_PACKET_CEA_MASK_SHIFT			0
580d60f
+
580d60f
 #define VC4_HDMI_RAM_PACKET_CONFIG		0x0a0
580d60f
 # define VC4_HDMI_RAM_PACKET_ENABLE		BIT(16)
580d60f
 
580d60f
 #define VC4_HDMI_RAM_PACKET_STATUS		0x0a4
580d60f
 
580d60f
+#define VC4_HDMI_CRP_CFG			0x0a8
580d60f
+/* When set, the CTS_PERIOD counts based on MAI bus sync pulse instead
580d60f
+ * of pixel clock.
580d60f
+ */
580d60f
+# define VC4_HDMI_CRP_USE_MAI_BUS_SYNC_FOR_CTS	BIT(26)
580d60f
+/* When set, no CRP packets will be sent. */
580d60f
+# define VC4_HDMI_CRP_CFG_DISABLE		BIT(25)
580d60f
+/* If set, generates CTS values based on N, audio clock, and video
580d60f
+ * clock.  N must be divisible by 128.
580d60f
+ */
580d60f
+# define VC4_HDMI_CRP_CFG_EXTERNAL_CTS_EN	BIT(24)
580d60f
+# define VC4_HDMI_CRP_CFG_N_MASK		VC4_MASK(19, 0)
580d60f
+# define VC4_HDMI_CRP_CFG_N_SHIFT		0
580d60f
+
580d60f
+/* 20-bit fields containing CTS values to be transmitted if !EXTERNAL_CTS_EN */
580d60f
+#define VC4_HDMI_CTS_0				0x0ac
580d60f
+#define VC4_HDMI_CTS_1				0x0b0
580d60f
+/* 20-bit fields containing number of clocks to send CTS0/1 before
580d60f
+ * switching to the other one.
580d60f
+ */
580d60f
+#define VC4_HDMI_CTS_PERIOD_0			0x0b4
580d60f
+#define VC4_HDMI_CTS_PERIOD_1			0x0b8
580d60f
+
580d60f
 #define VC4_HDMI_HORZA				0x0c4
580d60f
 # define VC4_HDMI_HORZA_VPOS			BIT(14)
580d60f
 # define VC4_HDMI_HORZA_HPOS			BIT(13)
580d60f
@@ -512,7 +563,11 @@
580d60f
 
580d60f
 #define VC4_HDMI_TX_PHY_RESET_CTL		0x2c0
580d60f
 
580d60f
-#define VC4_HDMI_GCP_0				0x400
580d60f
+#define VC4_HDMI_TX_PHY_CTL0			0x2c4
580d60f
+# define VC4_HDMI_TX_PHY_RNG_PWRDN		BIT(25)
580d60f
+
580d60f
+#define VC4_HDMI_GCP(x)				(0x400 + ((x) * 0x4))
580d60f
+#define VC4_HDMI_RAM_PACKET(x)			(0x400 + ((x) * 0x24))
580d60f
 #define VC4_HDMI_PACKET_STRIDE			0x24
580d60f
 
580d60f
 #define VC4_HD_M_CTL				0x00c
580d60f
@@ -522,6 +577,56 @@
580d60f
 # define VC4_HD_M_ENABLE			BIT(0)
580d60f
 
580d60f
 #define VC4_HD_MAI_CTL				0x014
580d60f
+/* Set when audio stream is received at a slower rate than the
580d60f
+ * sampling period, so MAI fifo goes empty.  Write 1 to clear.
580d60f
+ */
580d60f
+# define VC4_HD_MAI_CTL_DLATE			BIT(15)
580d60f
+# define VC4_HD_MAI_CTL_BUSY			BIT(14)
580d60f
+# define VC4_HD_MAI_CTL_CHALIGN			BIT(13)
580d60f
+# define VC4_HD_MAI_CTL_WHOLSMP			BIT(12)
580d60f
+# define VC4_HD_MAI_CTL_FULL			BIT(11)
580d60f
+# define VC4_HD_MAI_CTL_EMPTY			BIT(10)
580d60f
+# define VC4_HD_MAI_CTL_FLUSH			BIT(9)
580d60f
+/* If set, MAI bus generates SPDIF (bit 31) parity instead of passing
580d60f
+ * through.
580d60f
+ */
580d60f
+# define VC4_HD_MAI_CTL_PAREN			BIT(8)
580d60f
+# define VC4_HD_MAI_CTL_CHNUM_MASK		VC4_MASK(7, 4)
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+# define VC4_HD_MAI_CTL_CHNUM_SHIFT		4
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+# define VC4_HD_MAI_CTL_ENABLE			BIT(3)
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+/* Underflow error status bit, write 1 to clear. */
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+# define VC4_HD_MAI_CTL_ERRORE			BIT(2)
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+/* Overflow error status bit, write 1 to clear. */
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+# define VC4_HD_MAI_CTL_ERRORF			BIT(1)
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+/* Single-shot reset bit.  Read value is undefined. */
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+# define VC4_HD_MAI_CTL_RESET			BIT(0)
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+
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+#define VC4_HD_MAI_THR				0x018
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+# define VC4_HD_MAI_THR_PANICHIGH_MASK		VC4_MASK(29, 24)
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+# define VC4_HD_MAI_THR_PANICHIGH_SHIFT		24
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+# define VC4_HD_MAI_THR_PANICLOW_MASK		VC4_MASK(21, 16)
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+# define VC4_HD_MAI_THR_PANICLOW_SHIFT		16
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+# define VC4_HD_MAI_THR_DREQHIGH_MASK		VC4_MASK(13, 8)
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+# define VC4_HD_MAI_THR_DREQHIGH_SHIFT		8
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+# define VC4_HD_MAI_THR_DREQLOW_MASK		VC4_MASK(5, 0)
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+# define VC4_HD_MAI_THR_DREQLOW_SHIFT		0
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+
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+/* Format header to be placed on the MAI data. Unused. */
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+#define VC4_HD_MAI_FMT				0x01c
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+
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+/* Register for DMAing in audio data to be transported over the MAI
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+ * bus to the Falcon core.
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+ */
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+#define VC4_HD_MAI_DATA				0x020
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+
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+/* Divider from HDMI HSM clock to MAI serial clock.  Sampling period
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+ * converges to N / (M + 1) cycles.
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+ */
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+#define VC4_HD_MAI_SMP				0x02c
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+# define VC4_HD_MAI_SMP_N_MASK			VC4_MASK(31, 8)
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+# define VC4_HD_MAI_SMP_N_SHIFT			8
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+# define VC4_HD_MAI_SMP_M_MASK			VC4_MASK(7, 0)
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+# define VC4_HD_MAI_SMP_M_SHIFT			0
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 #define VC4_HD_VID_CTL				0x038
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 # define VC4_HD_VID_CTL_ENABLE			BIT(31)
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-- 
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2.12.0
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From 25ea82d7f7c869ff81ff8e64d24c5c4a896239fe Mon Sep 17 00:00:00 2001
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From: Boris Brezillon <boris.brezillon@free-electrons.com>
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Date: Mon, 27 Feb 2017 12:28:03 -0800
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Subject: [PATCH 3/3] ARM: dts: bcm283x: Add HDMI audio related properties
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Add the dmas and dma-names properties to support HDMI audio.
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Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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Signed-off-by: Eric Anholt <eric@anholt.net>
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---
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 arch/arm/boot/dts/bcm283x.dtsi | 2 ++
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 1 file changed, 2 insertions(+)
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diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
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index a3106aa446c6..a31b0b303ddc 100644
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--- a/arch/arm/boot/dts/bcm283x.dtsi
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+++ b/arch/arm/boot/dts/bcm283x.dtsi
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@@ -499,6 +499,8 @@
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 			clocks = <&clocks BCM2835_PLLH_PIX>,
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 				 <&clocks BCM2835_CLOCK_HSM>;
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 			clock-names = "pixel", "hdmi";
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+			dmas = <&dma 17>;
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+			dma-names = "audio-rx";
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 			status = "disabled";
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 		};
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-- 
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2.12.0
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