From 4a31f03885ffd6110b3a88104b2328e3121ed5aa Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Jun 29 2018 12:18:57 +0000 Subject: Add a possible i.MX6 sdhci fix, drop some old ARM patches, renumber patches --- diff --git a/arm-clk-bcm2835-hdmi-fixes.patch b/arm-clk-bcm2835-hdmi-fixes.patch deleted file mode 100644 index ae76f39..0000000 --- a/arm-clk-bcm2835-hdmi-fixes.patch +++ /dev/null @@ -1,56 +0,0 @@ -From patchwork Thu Feb 8 13:43:37 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [3/4] clk: bcm2835: De-assert/assert PLL reset signal when appropriate -From: Boris Brezillon -X-Patchwork-Id: 10207157 -Message-Id: <20180208134338.24590-3-boris.brezillon@bootlin.com> -To: Florian Fainelli , Ray Jui , - Scott Branden , - bcm-kernel-feedback-list@broadcom.com, - Stephen Warren , - Lee Jones , Eric Anholt , - linux-rpi-kernel@lists.infradead.org, - Mike Turquette , - Stephen Boyd , linux-clk@vger.kernel.org -Cc: Boris Brezillon , stable@vger.kernel.org -Date: Thu, 8 Feb 2018 14:43:37 +0100 - -In order to enable a PLL, not only the PLL has to be powered up and -locked, but you also have to de-assert the reset signal. The last part -was missing. Add it so PLLs that were not enabled by the FW/bootloader -can be enabled from Linux. - -Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks") -Cc: -Signed-off-by: Boris Brezillon ---- - drivers/clk/bcm/clk-bcm2835.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c -index a07f6451694a..6c5d4a8e426c 100644 ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -602,6 +602,9 @@ static void bcm2835_pll_off(struct clk_hw *hw) - const struct bcm2835_pll_data *data = pll->data; - - spin_lock(&cprman->regs_lock); -+ cprman_write(cprman, data->a2w_ctrl_reg, -+ cprman_read(cprman, data->a2w_ctrl_reg) & -+ ~A2W_PLL_CTRL_PRST_DISABLE); - cprman_write(cprman, data->cm_ctrl_reg, - cprman_read(cprman, data->cm_ctrl_reg) | - CM_PLL_ANARST); -@@ -640,6 +643,10 @@ static int bcm2835_pll_on(struct clk_hw *hw) - cpu_relax(); - } - -+ cprman_write(cprman, data->a2w_ctrl_reg, -+ cprman_read(cprman, data->a2w_ctrl_reg) | -+ A2W_PLL_CTRL_PRST_DISABLE); -+ - return 0; - } - diff --git a/arm-dts-imx6qdl-udoo-Disable-usbh1-to-avoid-kernel-hang.patch b/arm-dts-imx6qdl-udoo-Disable-usbh1-to-avoid-kernel-hang.patch deleted file mode 100644 index 1100a14..0000000 --- a/arm-dts-imx6qdl-udoo-Disable-usbh1-to-avoid-kernel-hang.patch +++ /dev/null @@ -1,41 +0,0 @@ -From patchwork Thu Jan 18 12:34:18 2018 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: ARM: dts: imx6qdl-udoo: Disable usbh1 to avoid kernel hang -From: Fabio Estevam -X-Patchwork-Id: 10173115 -Message-Id: <1516278858-15464-1-git-send-email-fabio.estevam@nxp.com> -To: -Cc: maggu2810@gmail.com, peter.chen@nxp.com, mail@maciej.szmigiero.name, - Fabio Estevam , linux-arm-kernel@lists.infradead.org -Date: Thu, 18 Jan 2018 10:34:18 -0200 - -Currently the kernel hangs when USB Host1 is enabled due to the lack of -support for controlling the USB hub clock and GPIO reset line. - -Peter Chen has made several attempts to fix this problem, but his series -has not been applied yet, so better disable USB host1 for now to avoid -the kernel hang. - -Signed-off-by: Fabio Estevam -Acked-by: Maciej S. Szmigiero -Tested-by: Markus Rathgeb ---- - arch/arm/boot/dts/imx6qdl-udoo.dtsi | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi -index 4161b7d..1f0b9f6 100644 ---- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi -@@ -274,7 +274,8 @@ - pinctrl-0 = <&pinctrl_usbh>; - vbus-supply = <®_usb_h1_vbus>; - clocks = <&clks IMX6QDL_CLK_CKO>; -- status = "okay"; -+ /* currently USB support causes a kernel hang. Disable it for now */ -+ status = "disabled"; - }; - - &usdhc3 { diff --git a/arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch b/arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch deleted file mode 100644 index b55dec0..0000000 --- a/arm-revert-mmc-omap_hsmmc-Use-dma_request_chan-for-reque.patch +++ /dev/null @@ -1,100 +0,0 @@ -From bb3e08008c0e48fd4f51a0f0957eecae61a24d69 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Tue, 1 Nov 2016 09:35:30 +0000 -Subject: [PATCH] Revert "mmc: omap_hsmmc: Use dma_request_chan() for - requesting DMA channel" - -This reverts commit 81eef6ca92014845d40e3f1310e42b7010303acc. ---- - drivers/mmc/host/omap_hsmmc.c | 50 ++++++++++++++++++++++++++++++++++--------- - 1 file changed, 40 insertions(+), 10 deletions(-) - -diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c -index 24ebc9a..3563321 100644 ---- a/drivers/mmc/host/omap_hsmmc.c -+++ b/drivers/mmc/host/omap_hsmmc.c -@@ -32,6 +32,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1992,6 +1993,8 @@ static int omap_hsmmc_probe(struct platform_device *pdev) - struct resource *res; - int ret, irq; - const struct of_device_id *match; -+ dma_cap_mask_t mask; -+ unsigned tx_req, rx_req; - const struct omap_mmc_of_data *data; - void __iomem *base; - -@@ -2121,17 +2124,44 @@ static int omap_hsmmc_probe(struct platform_device *pdev) - - omap_hsmmc_conf_bus_power(host); - -- host->rx_chan = dma_request_chan(&pdev->dev, "rx"); -- if (IS_ERR(host->rx_chan)) { -- dev_err(mmc_dev(host->mmc), "RX DMA channel request failed\n"); -- ret = PTR_ERR(host->rx_chan); -+ if (!pdev->dev.of_node) { -+ res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); -+ if (!res) { -+ dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n"); -+ ret = -ENXIO; -+ goto err_irq; -+ } -+ tx_req = res->start; -+ -+ res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); -+ if (!res) { -+ dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n"); -+ ret = -ENXIO; -+ goto err_irq; -+ } -+ rx_req = res->start; -+ } -+ -+ dma_cap_zero(mask); -+ dma_cap_set(DMA_SLAVE, mask); -+ -+ host->rx_chan = -+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn, -+ &rx_req, &pdev->dev, "rx"); -+ -+ if (!host->rx_chan) { -+ dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel\n"); -+ ret = -ENXIO; - goto err_irq; - } - -- host->tx_chan = dma_request_chan(&pdev->dev, "tx"); -- if (IS_ERR(host->tx_chan)) { -- dev_err(mmc_dev(host->mmc), "TX DMA channel request failed\n"); -- ret = PTR_ERR(host->tx_chan); -+ host->tx_chan = -+ dma_request_slave_channel_compat(mask, omap_dma_filter_fn, -+ &tx_req, &pdev->dev, "tx"); -+ -+ if (!host->tx_chan) { -+ dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel\n"); -+ ret = -ENXIO; - goto err_irq; - } - -@@ -2189,9 +2219,9 @@ err_slot_name: - mmc_remove_host(mmc); - err_irq: - device_init_wakeup(&pdev->dev, false); -- if (!IS_ERR_OR_NULL(host->tx_chan)) -+ if (host->tx_chan) - dma_release_channel(host->tx_chan); -- if (!IS_ERR_OR_NULL(host->rx_chan)) -+ if (host->rx_chan) - dma_release_channel(host->rx_chan); - pm_runtime_dont_use_autosuspend(host->dev); - pm_runtime_put_sync(host->dev); --- -2.9.3 - diff --git a/arm-sdhci-esdhc-imx-fixes.patch b/arm-sdhci-esdhc-imx-fixes.patch new file mode 100644 index 0000000..ecb8d09 --- /dev/null +++ b/arm-sdhci-esdhc-imx-fixes.patch @@ -0,0 +1,238 @@ +From patchwork Thu Jun 28 07:31:36 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: mmc: sdhci-esdhc-imx: support eMMC DDR mode when running at 3.3V +From: Stefan Agner +X-Patchwork-Id: 10493185 +Message-Id: <20180628073136.21748-1-stefan@agner.ch> +To: adrian.hunter@intel.com, ulf.hansson@linaro.org +Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com, + michael@amarulasolutions.com, linux-mmc@vger.kernel.org, + linux-kernel@vger.kernel.org, Stefan Agner +Date: Thu, 28 Jun 2018 09:31:36 +0200 + +The uSDHC supports DDR modes for eMMC devices running at 3.3V. This +allows to run eMMC with 3.3V signaling voltage at DDR52 mode: + + # cat /sys/kernel/debug/mmc1/ios + clock: 52000000 Hz + vdd: 21 (3.3 ~ 3.4 V) + bus mode: 2 (push-pull) + chip select: 0 (don't care) + power mode: 2 (on) + bus width: 3 (8 bits) + timing spec: 8 (mmc DDR52) + signal voltage: 0 (3.30 V) + driver type: 0 (driver type B) + +Signed-off-by: Stefan Agner +--- + drivers/mmc/host/sdhci-esdhc-imx.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c +index b716b933f00a..6f444731754d 100644 +--- a/drivers/mmc/host/sdhci-esdhc-imx.c ++++ b/drivers/mmc/host/sdhci-esdhc-imx.c +@@ -1324,7 +1324,7 @@ static int sdhci_esdhc_imx_probe(struct platform_device *pdev) + + if (esdhc_is_usdhc(imx_data)) { + host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN; +- host->mmc->caps |= MMC_CAP_1_8V_DDR; ++ host->mmc->caps |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR; + if (!(imx_data->socdata->flags & ESDHC_FLAG_HS200)) + host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200; + +From patchwork Thu Jun 28 08:13:29 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [1/3] mmc: sdhci-esdhc-imx: get rid of support_vsel +From: Stefan Agner +X-Patchwork-Id: 10493269 +Message-Id: <20180628081331.13051-2-stefan@agner.ch> +To: adrian.hunter@intel.com, ulf.hansson@linaro.org +Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com, + michael@amarulasolutions.com, rmk+kernel@armlinux.org.uk, + linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, + Stefan Agner +Date: Thu, 28 Jun 2018 10:13:29 +0200 + +The field support_vsel is currently only used in the device tree +case. Get rid of it. No change in behavior. + +Signed-off-by: Stefan Agner +--- + drivers/mmc/host/sdhci-esdhc-imx.c | 8 ++------ + include/linux/platform_data/mmc-esdhc-imx.h | 2 -- + 2 files changed, 2 insertions(+), 8 deletions(-) + +diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c +index 6f444731754d..20a420b765b3 100644 +--- a/drivers/mmc/host/sdhci-esdhc-imx.c ++++ b/drivers/mmc/host/sdhci-esdhc-imx.c +@@ -1145,18 +1145,14 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev, + &boarddata->tuning_start_tap); + + if (of_find_property(np, "no-1-8-v", NULL)) +- boarddata->support_vsel = false; +- else +- boarddata->support_vsel = true; ++ host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; + + if (of_property_read_u32(np, "fsl,delay-line", &boarddata->delay_line)) + boarddata->delay_line = 0; + + mmc_of_parse_voltage(np, &host->ocr_mask); + +- /* sdr50 and sdr104 need work on 1.8v signal voltage */ +- if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data) && +- !IS_ERR(imx_data->pins_default)) { ++ if (esdhc_is_usdhc(imx_data) && !IS_ERR(imx_data->pins_default)) { + imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl, + ESDHC_PINCTRL_STATE_100MHZ); + imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl, +diff --git a/include/linux/platform_data/mmc-esdhc-imx.h b/include/linux/platform_data/mmc-esdhc-imx.h +index 7daa78a2f342..640dec8b5b0c 100644 +--- a/include/linux/platform_data/mmc-esdhc-imx.h ++++ b/include/linux/platform_data/mmc-esdhc-imx.h +@@ -34,7 +34,6 @@ enum cd_types { + * @cd_gpio: gpio for card_detect interrupt + * @wp_type: type of write_protect method (see wp_types enum above) + * @cd_type: type of card_detect method (see cd_types enum above) +- * @support_vsel: indicate it supports 1.8v switching + */ + + struct esdhc_platform_data { +@@ -43,7 +42,6 @@ struct esdhc_platform_data { + enum wp_types wp_type; + enum cd_types cd_type; + int max_bus_width; +- bool support_vsel; + unsigned int delay_line; + unsigned int tuning_step; /* The delay cell steps in tuning procedure */ + unsigned int tuning_start_tap; /* The start delay cell point in tuning procedure */ +From patchwork Thu Jun 28 08:13:30 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [2/3] mmc: sdhci: add quirk to prevent higher speed modes +From: Stefan Agner +X-Patchwork-Id: 10493273 +Message-Id: <20180628081331.13051-3-stefan@agner.ch> +To: adrian.hunter@intel.com, ulf.hansson@linaro.org +Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com, + michael@amarulasolutions.com, rmk+kernel@armlinux.org.uk, + linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, + Stefan Agner +Date: Thu, 28 Jun 2018 10:13:30 +0200 + +Some hosts are capable of running higher speed modes but do not +have the board support for it. Introduce a quirk which prevents +the stack from using modes running at 100MHz or faster. + +Signed-off-by: Stefan Agner +--- + drivers/mmc/host/sdhci.c | 8 ++++++++ + drivers/mmc/host/sdhci.h | 2 ++ + 2 files changed, 10 insertions(+) + +diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c +index 1c828e0e9905..8ac257dfaab3 100644 +--- a/drivers/mmc/host/sdhci.c ++++ b/drivers/mmc/host/sdhci.c +@@ -3749,6 +3749,14 @@ int sdhci_setup_host(struct sdhci_host *host) + } + } + ++ if (host->quirks2 & SDHCI_QUIRK2_NO_UHS_HS200_HS400) { ++ host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | ++ SDHCI_SUPPORT_DDR50); ++ ++ mmc->caps2 &= ~(MMC_CAP2_HSX00_1_8V | MMC_CAP2_HSX00_1_2V | ++ MMC_CAP2_HS400_ES); ++ } ++ + if (host->quirks2 & SDHCI_QUIRK2_NO_1_8_V) { + host->caps1 &= ~(SDHCI_SUPPORT_SDR104 | SDHCI_SUPPORT_SDR50 | + SDHCI_SUPPORT_DDR50); +diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h +index 23966f887da6..cb2433d6d61f 100644 +--- a/drivers/mmc/host/sdhci.h ++++ b/drivers/mmc/host/sdhci.h +@@ -450,6 +450,8 @@ struct sdhci_host { + * obtainable timeout. + */ + #define SDHCI_QUIRK2_DISABLE_HW_TIMEOUT (1<<17) ++/* Do not support any higher speeds (>50MHz) */ ++#define SDHCI_QUIRK2_NO_UHS_HS200_HS400 (1<<18) + + int irq; /* Device IRQ */ + void __iomem *ioaddr; /* Mapped address */ +From patchwork Thu Jun 28 08:13:31 2018 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [3/3] mmc: sdhci-esdhc-imx: prevent stack from using higher speed + modes +From: Stefan Agner +X-Patchwork-Id: 10493271 +Message-Id: <20180628081331.13051-4-stefan@agner.ch> +To: adrian.hunter@intel.com, ulf.hansson@linaro.org +Cc: fabio.estevam@nxp.com, haibo.chen@nxp.com, aisheng.dong@nxp.com, + michael@amarulasolutions.com, rmk+kernel@armlinux.org.uk, + linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, + Stefan Agner +Date: Thu, 28 Jun 2018 10:13:31 +0200 + +If pinctrl configurations for higher speed modes are missing, the +stack currently uses the no 1.8V quirk. This comes close to what +we need but not exactly: E.g. if a eMMC chip uses 1.8V signaling +(by specifying a 1.8V only vqmmc-supply) while not providing any +100MHz/200MHz pinctrl configurations then the SDHCI_QUIRK2_NO_1_8_V +leads the stack to print signaling voltage switch failed errors +continuously: + mmc1: Switching to 3.3V signalling voltage failed + +Presumably because the stack tries to use 3.3V signaling: + + # cat /sys/kernel/debug/mmc1/ios + ... + timing spec: 8 (mmc DDR52) + signal voltage: 0 (3.30 V) + ... + +With using SDHCI_QUIRK2_NO_UHS_HS200_HS400 we prevent the stack +from choosing any modes require speeds higher than 52MHz while +still allowing to select modes using 1.8V at lower speeds (e.g. +DDR52): + + # cat /sys/kernel/debug/mmc1/ios + ... + timing spec: 8 (mmc DDR52) + signal voltage: 1 (1.80 V) + ... + +Signed-off-by: Stefan Agner +--- + drivers/mmc/host/sdhci-esdhc-imx.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-esdhc-imx.c +index 20a420b765b3..4a1c33018072 100644 +--- a/drivers/mmc/host/sdhci-esdhc-imx.c ++++ b/drivers/mmc/host/sdhci-esdhc-imx.c +@@ -1165,10 +1165,10 @@ sdhci_esdhc_imx_probe_dt(struct platform_device *pdev, + * fall back to not supporting uhs by specifying no + * 1.8v quirk + */ +- host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; ++ host->quirks2 |= SDHCI_QUIRK2_NO_UHS_HS200_HS400; + } + } else { +- host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V; ++ host->quirks2 |= SDHCI_QUIRK2_NO_UHS_HS200_HS400; + } + + /* call to generic mmc_of_parse to support additional capabilities */ diff --git a/arm64-Revert-allwinner-a64-pine64-Use-dcdc1-regulato.patch b/arm64-Revert-allwinner-a64-pine64-Use-dcdc1-regulato.patch deleted file mode 100644 index f894874..0000000 --- a/arm64-Revert-allwinner-a64-pine64-Use-dcdc1-regulato.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 90e388ca5d8bbee022f9ed5fc24137b31579fa6e Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Wed, 22 Nov 2017 15:52:36 +0000 -Subject: [PATCH] Revert "arm64: allwinner: a64: pine64: Use dcdc1 regulator - for mmc0" - -This reverts commit 3f241bfa60bdc9c4fde63fa6664a8ce00fd668c6. ---- - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -index d06e34b5d192..caf8b6fbe5e3 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -@@ -61,6 +61,13 @@ - chosen { - stdout-path = "serial0:115200n8"; - }; -+ -+ reg_vcc3v3: vcc3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ }; - }; - - &ehci0 { -@@ -84,7 +91,7 @@ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; -- vmmc-supply = <®_dcdc1>; -+ vmmc-supply = <®_vcc3v3>; - cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; - disable-wp; - bus-width = <4>; --- -2.14.3 - diff --git a/bcm283x-clk-audio-fixes.patch b/bcm283x-clk-audio-fixes.patch deleted file mode 100644 index 03369cc..0000000 --- a/bcm283x-clk-audio-fixes.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 1b6867ee05d84cc6ec23b5ec0b78684187d3190a Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Wed, 7 Mar 2018 15:41:14 +0100 -Subject: [PATCH] clk: bcm2835: Make sure the PLL is gated before changing its - rate - -All bcm2835 PLLs should be gated before their rate can be changed. -Setting CLK_SET_RATE_GATE will let the core enforce that, but this is -not enough to make the code work in all situations. Indeed, the -CLK_SET_RATE_GATE flag prevents a user from changing the rate while -the clock is enabled, but this check only guarantees there's no Linux -users. In our case, the clock might have been enabled by the -bootloader/FW, and, because we have CLK_IGNORE_UNUSED set, Linux never -disables the PLL. So we have to make sure the PLL is actually disabled -before changing the rate. - -Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks") -Cc: -Signed-off-by: Boris Brezillon ---- - drivers/clk/bcm/clk-bcm2835.c | 14 +++++++++++++- - 1 file changed, 13 insertions(+), 1 deletion(-) - -diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c -index 6c5d4a8e426c..051ce769c109 100644 ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -678,6 +678,18 @@ static int bcm2835_pll_set_rate(struct clk_hw *hw, - u32 ana[4]; - int i; - -+ /* -+ * Normally, the CLK_SET_RATE_GATE flag prevents a user from changing -+ * the rate while the clock is enabled, but this check only makes sure -+ * there's no Linux users. -+ * In our case, the clock might have been enabled by the bootloader/FW, -+ * and, since CLK_IGNORE_UNUSED flag is set, Linux never disables it. -+ * So we have to make sure the clk is actually disabled before changing -+ * the rate. -+ */ -+ if (bcm2835_pll_is_on(hw)) -+ bcm2835_pll_off(hw); -+ - if (rate > data->max_fb_rate) { - use_fb_prediv = true; - rate /= 2; -@@ -1318,7 +1330,7 @@ static struct clk_hw *bcm2835_register_pll(struct bcm2835_cprman *cprman, - init.num_parents = 1; - init.name = data->name; - init.ops = &bcm2835_pll_clk_ops; -- init.flags = CLK_IGNORE_UNUSED; -+ init.flags = CLK_IGNORE_UNUSED | CLK_SET_RATE_GATE; - - pll = kzalloc(sizeof(*pll), GFP_KERNEL); - if (!pll) diff --git a/kernel.spec b/kernel.spec index d8a8d32..0418e30 100644 --- a/kernel.spec +++ b/kernel.spec @@ -579,18 +579,16 @@ Patch304: ACPI-irq-Workaround-firmware-issue-on-X-Gene-based-m400.patch # https://patchwork.kernel.org/patch/9820417/ Patch305: qcom-msm89xx-fixes.patch -# https://patchwork.kernel.org/patch/10173115/ -Patch306: arm-dts-imx6qdl-udoo-Disable-usbh1-to-avoid-kernel-hang.patch +# https://patchwork.kernel.org/project/linux-mmc/list/?submitter=71861 +Patch306: sdhci-esdhc-imx-fixes.patch -Patch309: arm-tegra-fix-nouveau-crash.patch - -Patch324: bcm283x-clk-audio-fixes.patch +Patch307: arm-tegra-fix-nouveau-crash.patch # Enabling Patches for the RPi3+ -Patch332: bcm2837-enable-pmu.patch -Patch333: bcm2837-lan78xx-fixes.patch +Patch330: bcm2837-enable-pmu.patch +Patch331: bcm2837-lan78xx-fixes.patch -Patch335: bcm2835-cpufreq-add-CPU-frequency-control-driver.patch +Patch332: bcm2835-cpufreq-add-CPU-frequency-control-driver.patch # 400 - IBM (ppc/s390x) patches @@ -1843,6 +1841,9 @@ fi # # %changelog +* Fri Jun 29 2018 Peter Robinson +- Add a possible i.MX6 sdhci fix + * Thu Jun 28 2018 Laura Abbott - 4.18.0-0.rc2.git3.1 - Linux v4.18-rc2-132-gf57494321cbf