From c75cb4d7fbb5f7292099d5e47350db122c98aba0 Mon Sep 17 00:00:00 2001 From: Jeremy Cline Date: Dec 08 2017 14:47:02 +0000 Subject: Linux v4.14.4 rebase --- diff --git a/0001-PATCH-staging-rtl8822be-fix-wrong-dma-unmap-len.patch b/0001-PATCH-staging-rtl8822be-fix-wrong-dma-unmap-len.patch new file mode 100644 index 0000000..540b925 --- /dev/null +++ b/0001-PATCH-staging-rtl8822be-fix-wrong-dma-unmap-len.patch @@ -0,0 +1,46 @@ +From 37af97ef14c201b1db8dd341aabd262da23e48aa Mon Sep 17 00:00:00 2001 +From: Fedora Kernel Team +Date: Mon, 30 Oct 2017 11:38:27 -0500 +Subject: [PATCH] [PATCH] staging: rtl8822be: fix wrong dma unmap len + +Patch fixes splat: + +r8822be 0000:04:00.0: DMA-API: device driver frees DMA memory with different size +[device address=0x0000000078477000] [map size=4096 bytes] [unmap size=424 bytes] + +Call Trace: + debug_dma_unmap_page+0xa5/0xb0 + ? unmap_single+0x2f/0x40 + _rtl8822be_send_bcn_or_cmd_packet+0x2c5/0x300 [r8822be] + ? _rtl8822be_send_bcn_or_cmd_packet+0x2c5/0x300 [r8822be] + rtl8822b_halmac_cb_write_data_rsvd_page+0x51/0xc0 [r8822be] + _halmac_write_data_rsvd_page+0x22/0x30 [r8822be] + halmac_download_rsvd_page_88xx+0xee/0x1f0 [r8822be] + halmac_dlfw_to_mem_88xx+0x80/0x120 [r8822be] + halmac_download_firmware_88xx.part.47+0x477/0x600 [r8822be] + halmac_download_firmware_88xx+0x32/0x40 [r8822be] + rtl_halmac_dlfw+0x70/0x120 [r8822be] + rtl_halmac_init_hal+0x5f/0x1b0 [r8822be] + rtl8822be_hw_init+0x8a2/0x1040 [r8822be] + +Signed-off-by: Stanislaw Gruszka +--- + drivers/staging/rtlwifi/rtl8822be/fw.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/staging/rtlwifi/rtl8822be/fw.c b/drivers/staging/rtlwifi/rtl8822be/fw.c +index 8e24da1..a2cc548 100644 +--- a/drivers/staging/rtlwifi/rtl8822be/fw.c ++++ b/drivers/staging/rtlwifi/rtl8822be/fw.c +@@ -419,7 +419,7 @@ static bool _rtl8822be_send_bcn_or_cmd_packet(struct ieee80211_hw *hw, + dma_addr = rtlpriv->cfg->ops->get_desc( + hw, (u8 *)pbd_desc, true, HW_DESC_TXBUFF_ADDR); + +- pci_unmap_single(rtlpci->pdev, dma_addr, skb->len, ++ pci_unmap_single(rtlpci->pdev, dma_addr, pskb->len, + PCI_DMA_TODEVICE); + kfree_skb(pskb); + +-- +2.13.6 + diff --git a/0001-fs-locks-Remove-fl_nspid-and-use-fs-specific-l_pid-f.patch b/0001-fs-locks-Remove-fl_nspid-and-use-fs-specific-l_pid-f.patch deleted file mode 100644 index 065132b..0000000 --- a/0001-fs-locks-Remove-fl_nspid-and-use-fs-specific-l_pid-f.patch +++ /dev/null @@ -1,296 +0,0 @@ -From 9d5b86ac13c573795525ecac6ed2db39ab23e2a8 Mon Sep 17 00:00:00 2001 -From: Benjamin Coddington -Date: Sun, 16 Jul 2017 10:28:22 -0400 -Subject: [PATCH] fs/locks: Remove fl_nspid and use fs-specific l_pid for - remote locks - -Since commit c69899a17ca4 "NFSv4: Update of VFS byte range lock must be -atomic with the stateid update", NFSv4 has been inserting locks in rpciod -worker context. The result is that the file_lock's fl_nspid is the -kworker's pid instead of the original userspace pid. - -The fl_nspid is only used to represent the namespaced virtual pid number -when displaying locks or returning from F_GETLK. There's no reason to set -it for every inserted lock, since we can usually just look it up from -fl_pid. So, instead of looking up and holding struct pid for every lock, -let's just look up the virtual pid number from fl_pid when it is needed. -That means we can remove fl_nspid entirely. - -The translaton and presentation of fl_pid should handle the following four -cases: - -1 - F_GETLK on a remote file with a remote lock: - In this case, the filesystem should determine the l_pid to return here. - Filesystems should indicate that the fl_pid represents a non-local pid - value that should not be translated by returning an fl_pid <= 0. - -2 - F_GETLK on a local file with a remote lock: - This should be the l_pid of the lock manager process, and translated. - -3 - F_GETLK on a remote file with a local lock, and -4 - F_GETLK on a local file with a local lock: - These should be the translated l_pid of the local locking process. - -Fuse was already doing the correct thing by translating the pid into the -caller's namespace. With this change we must update fuse to translate -to init's pid namespace, so that the locks API can then translate from -init's pid namespace into the pid namespace of the caller. - -With this change, the locks API will expect that if a filesystem returns -a remote pid as opposed to a local pid for F_GETLK, that remote pid will -be <= 0. This signifies that the pid is remote, and the locks API will -forego translating that pid into the pid namespace of the local calling -process. - -Finally, we convert remote filesystems to present remote pids using -negative numbers. Have lustre, 9p, ceph, cifs, and dlm negate the remote -pid returned for F_GETLK lock requests. - -Since local pids will never be larger than PID_MAX_LIMIT (which is -currently defined as <= 4 million), but pid_t is an unsigned int, we -should have plenty of room to represent remote pids with negative -numbers if we assume that remote pid numbers are similarly limited. - -If this is not the case, then we run the risk of having a remote pid -returned for which there is also a corresponding local pid. This is a -problem we have now, but this patch should reduce the chances of that -occurring, while also returning those remote pid numbers, for whatever -that may be worth. - -Signed-off-by: Benjamin Coddington -Signed-off-by: Jeff Layton ---- - drivers/staging/lustre/lustre/ldlm/ldlm_flock.c | 2 +- - fs/9p/vfs_file.c | 2 +- - fs/ceph/locks.c | 2 +- - fs/cifs/cifssmb.c | 2 +- - fs/dlm/plock.c | 2 +- - fs/fuse/file.c | 6 +-- - fs/locks.c | 62 +++++++++++++++---------- - include/linux/fs.h | 1 - - 8 files changed, 45 insertions(+), 34 deletions(-) - -diff --git a/drivers/staging/lustre/lustre/ldlm/ldlm_flock.c b/drivers/staging/lustre/lustre/ldlm/ldlm_flock.c -index b7f28b39c7b3..abcbf075acc0 100644 ---- a/drivers/staging/lustre/lustre/ldlm/ldlm_flock.c -+++ b/drivers/staging/lustre/lustre/ldlm/ldlm_flock.c -@@ -596,7 +596,7 @@ ldlm_flock_completion_ast(struct ldlm_lock *lock, __u64 flags, void *data) - default: - getlk->fl_type = F_UNLCK; - } -- getlk->fl_pid = (pid_t)lock->l_policy_data.l_flock.pid; -+ getlk->fl_pid = -(pid_t)lock->l_policy_data.l_flock.pid; - getlk->fl_start = (loff_t)lock->l_policy_data.l_flock.start; - getlk->fl_end = (loff_t)lock->l_policy_data.l_flock.end; - } else { -diff --git a/fs/9p/vfs_file.c b/fs/9p/vfs_file.c -index 3de3b4a89d89..43c242e17132 100644 ---- a/fs/9p/vfs_file.c -+++ b/fs/9p/vfs_file.c -@@ -288,7 +288,7 @@ static int v9fs_file_getlock(struct file *filp, struct file_lock *fl) - fl->fl_end = OFFSET_MAX; - else - fl->fl_end = glock.start + glock.length - 1; -- fl->fl_pid = glock.proc_id; -+ fl->fl_pid = -glock.proc_id; - } - kfree(glock.client_id); - return res; -diff --git a/fs/ceph/locks.c b/fs/ceph/locks.c -index 64ae74472046..8cd63e8123d8 100644 ---- a/fs/ceph/locks.c -+++ b/fs/ceph/locks.c -@@ -79,7 +79,7 @@ static int ceph_lock_message(u8 lock_type, u16 operation, struct file *file, - err = ceph_mdsc_do_request(mdsc, inode, req); - - if (operation == CEPH_MDS_OP_GETFILELOCK) { -- fl->fl_pid = le64_to_cpu(req->r_reply_info.filelock_reply->pid); -+ fl->fl_pid = -le64_to_cpu(req->r_reply_info.filelock_reply->pid); - if (CEPH_LOCK_SHARED == req->r_reply_info.filelock_reply->type) - fl->fl_type = F_RDLCK; - else if (CEPH_LOCK_EXCL == req->r_reply_info.filelock_reply->type) -diff --git a/fs/cifs/cifssmb.c b/fs/cifs/cifssmb.c -index 72a53bd19865..118a63e7e221 100644 ---- a/fs/cifs/cifssmb.c -+++ b/fs/cifs/cifssmb.c -@@ -2522,7 +2522,7 @@ CIFSSMBPosixLock(const unsigned int xid, struct cifs_tcon *tcon, - pLockData->fl_start = le64_to_cpu(parm_data->start); - pLockData->fl_end = pLockData->fl_start + - le64_to_cpu(parm_data->length) - 1; -- pLockData->fl_pid = le32_to_cpu(parm_data->pid); -+ pLockData->fl_pid = -le32_to_cpu(parm_data->pid); - } - } - -diff --git a/fs/dlm/plock.c b/fs/dlm/plock.c -index d401425f602a..e631b1689228 100644 ---- a/fs/dlm/plock.c -+++ b/fs/dlm/plock.c -@@ -367,7 +367,7 @@ int dlm_posix_get(dlm_lockspace_t *lockspace, u64 number, struct file *file, - locks_init_lock(fl); - fl->fl_type = (op->info.ex) ? F_WRLCK : F_RDLCK; - fl->fl_flags = FL_POSIX; -- fl->fl_pid = op->info.pid; -+ fl->fl_pid = -op->info.pid; - fl->fl_start = op->info.start; - fl->fl_end = op->info.end; - rv = 0; -diff --git a/fs/fuse/file.c b/fs/fuse/file.c -index 3ee4fdc3da9e..7cd692f51d1d 100644 ---- a/fs/fuse/file.c -+++ b/fs/fuse/file.c -@@ -2101,11 +2101,11 @@ static int convert_fuse_file_lock(struct fuse_conn *fc, - fl->fl_end = ffl->end; - - /* -- * Convert pid into the caller's pid namespace. If the pid -- * does not map into the namespace fl_pid will get set to 0. -+ * Convert pid into init's pid namespace. The locks API will -+ * translate it into the caller's pid namespace. - */ - rcu_read_lock(); -- fl->fl_pid = pid_vnr(find_pid_ns(ffl->pid, fc->pid_ns)); -+ fl->fl_pid = pid_nr_ns(find_pid_ns(ffl->pid, fc->pid_ns), &init_pid_ns); - rcu_read_unlock(); - break; - -diff --git a/fs/locks.c b/fs/locks.c -index d7daa6c8932f..6d0949880ebd 100644 ---- a/fs/locks.c -+++ b/fs/locks.c -@@ -137,6 +137,7 @@ - #define IS_FLOCK(fl) (fl->fl_flags & FL_FLOCK) - #define IS_LEASE(fl) (fl->fl_flags & (FL_LEASE|FL_DELEG|FL_LAYOUT)) - #define IS_OFDLCK(fl) (fl->fl_flags & FL_OFDLCK) -+#define IS_REMOTELCK(fl) (fl->fl_pid <= 0) - - static inline bool is_remote_lock(struct file *filp) - { -@@ -733,7 +734,6 @@ static void locks_wake_up_blocks(struct file_lock *blocker) - static void - locks_insert_lock_ctx(struct file_lock *fl, struct list_head *before) - { -- fl->fl_nspid = get_pid(task_tgid(current)); - list_add_tail(&fl->fl_list, before); - locks_insert_global_locks(fl); - } -@@ -743,10 +743,6 @@ locks_unlink_lock_ctx(struct file_lock *fl) - { - locks_delete_global_locks(fl); - list_del_init(&fl->fl_list); -- if (fl->fl_nspid) { -- put_pid(fl->fl_nspid); -- fl->fl_nspid = NULL; -- } - locks_wake_up_blocks(fl); - } - -@@ -823,8 +819,6 @@ posix_test_lock(struct file *filp, struct file_lock *fl) - list_for_each_entry(cfl, &ctx->flc_posix, fl_list) { - if (posix_locks_conflict(fl, cfl)) { - locks_copy_conflock(fl, cfl); -- if (cfl->fl_nspid) -- fl->fl_pid = pid_vnr(cfl->fl_nspid); - goto out; - } - } -@@ -2048,9 +2042,33 @@ int vfs_test_lock(struct file *filp, struct file_lock *fl) - } - EXPORT_SYMBOL_GPL(vfs_test_lock); - -+/** -+ * locks_translate_pid - translate a file_lock's fl_pid number into a namespace -+ * @fl: The file_lock who's fl_pid should be translated -+ * @ns: The namespace into which the pid should be translated -+ * -+ * Used to tranlate a fl_pid into a namespace virtual pid number -+ */ -+static pid_t locks_translate_pid(struct file_lock *fl, struct pid_namespace *ns) -+{ -+ pid_t vnr; -+ struct pid *pid; -+ -+ if (IS_OFDLCK(fl)) -+ return -1; -+ if (IS_REMOTELCK(fl)) -+ return fl->fl_pid; -+ -+ rcu_read_lock(); -+ pid = find_pid_ns(fl->fl_pid, &init_pid_ns); -+ vnr = pid_nr_ns(pid, ns); -+ rcu_read_unlock(); -+ return vnr; -+} -+ - static int posix_lock_to_flock(struct flock *flock, struct file_lock *fl) - { -- flock->l_pid = IS_OFDLCK(fl) ? -1 : fl->fl_pid; -+ flock->l_pid = locks_translate_pid(fl, task_active_pid_ns(current)); - #if BITS_PER_LONG == 32 - /* - * Make sure we can represent the posix lock via -@@ -2072,7 +2090,7 @@ static int posix_lock_to_flock(struct flock *flock, struct file_lock *fl) - #if BITS_PER_LONG == 32 - static void posix_lock_to_flock64(struct flock64 *flock, struct file_lock *fl) - { -- flock->l_pid = IS_OFDLCK(fl) ? -1 : fl->fl_pid; -+ flock->l_pid = locks_translate_pid(fl, task_active_pid_ns(current)); - flock->l_start = fl->fl_start; - flock->l_len = fl->fl_end == OFFSET_MAX ? 0 : - fl->fl_end - fl->fl_start + 1; -@@ -2584,22 +2602,16 @@ static void lock_get_status(struct seq_file *f, struct file_lock *fl, - { - struct inode *inode = NULL; - unsigned int fl_pid; -+ struct pid_namespace *proc_pidns = file_inode(f->file)->i_sb->s_fs_info; - -- if (fl->fl_nspid) { -- struct pid_namespace *proc_pidns = file_inode(f->file)->i_sb->s_fs_info; -- -- /* Don't let fl_pid change based on who is reading the file */ -- fl_pid = pid_nr_ns(fl->fl_nspid, proc_pidns); -- -- /* -- * If there isn't a fl_pid don't display who is waiting on -- * the lock if we are called from locks_show, or if we are -- * called from __show_fd_info - skip lock entirely -- */ -- if (fl_pid == 0) -- return; -- } else -- fl_pid = fl->fl_pid; -+ fl_pid = locks_translate_pid(fl, proc_pidns); -+ /* -+ * If there isn't a fl_pid don't display who is waiting on -+ * the lock if we are called from locks_show, or if we are -+ * called from __show_fd_info - skip lock entirely -+ */ -+ if (fl_pid == 0) -+ return; - - if (fl->fl_file != NULL) - inode = locks_inode(fl->fl_file); -@@ -2674,7 +2686,7 @@ static int locks_show(struct seq_file *f, void *v) - - fl = hlist_entry(v, struct file_lock, fl_link); - -- if (fl->fl_nspid && !pid_nr_ns(fl->fl_nspid, proc_pidns)) -+ if (locks_translate_pid(fl, proc_pidns) == 0) - return 0; - - lock_get_status(f, fl, iter->li_pos, ""); -diff --git a/include/linux/fs.h b/include/linux/fs.h -index 7b5d6816542b..f0b108af9b02 100644 ---- a/include/linux/fs.h -+++ b/include/linux/fs.h -@@ -999,7 +999,6 @@ struct file_lock { - unsigned char fl_type; - unsigned int fl_pid; - int fl_link_cpu; /* what cpu's list is this on? */ -- struct pid *fl_nspid; - wait_queue_head_t fl_wait; - struct file *fl_file; - loff_t fl_start; --- -2.14.1 - diff --git a/0001-mm-thp-Do-not-make-page-table-dirty-unconditionally-.patch b/0001-mm-thp-Do-not-make-page-table-dirty-unconditionally-.patch deleted file mode 100644 index 2a1d7b7..0000000 --- a/0001-mm-thp-Do-not-make-page-table-dirty-unconditionally-.patch +++ /dev/null @@ -1,108 +0,0 @@ -From a8f97366452ed491d13cf1e44241bc0b5740b1f0 Mon Sep 17 00:00:00 2001 -From: "Kirill A. Shutemov" -Date: Mon, 27 Nov 2017 06:21:25 +0300 -Subject: [PATCH] mm, thp: Do not make page table dirty unconditionally in - touch_p[mu]d() - -Currently, we unconditionally make page table dirty in touch_pmd(). -It may result in false-positive can_follow_write_pmd(). - -We may avoid the situation, if we would only make the page table entry -dirty if caller asks for write access -- FOLL_WRITE. - -The patch also changes touch_pud() in the same way. - -Signed-off-by: Kirill A. Shutemov -Cc: Michal Hocko -Cc: Hugh Dickins -Signed-off-by: Linus Torvalds ---- - mm/huge_memory.c | 36 +++++++++++++----------------------- - 1 file changed, 13 insertions(+), 23 deletions(-) - -diff --git a/mm/huge_memory.c b/mm/huge_memory.c -index 86fe697e8bfb..0e7ded98d114 100644 ---- a/mm/huge_memory.c -+++ b/mm/huge_memory.c -@@ -842,20 +842,15 @@ EXPORT_SYMBOL_GPL(vmf_insert_pfn_pud); - #endif /* CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD */ - - static void touch_pmd(struct vm_area_struct *vma, unsigned long addr, -- pmd_t *pmd) -+ pmd_t *pmd, int flags) - { - pmd_t _pmd; - -- /* -- * We should set the dirty bit only for FOLL_WRITE but for now -- * the dirty bit in the pmd is meaningless. And if the dirty -- * bit will become meaningful and we'll only set it with -- * FOLL_WRITE, an atomic set_bit will be required on the pmd to -- * set the young bit, instead of the current set_pmd_at. -- */ -- _pmd = pmd_mkyoung(pmd_mkdirty(*pmd)); -+ _pmd = pmd_mkyoung(*pmd); -+ if (flags & FOLL_WRITE) -+ _pmd = pmd_mkdirty(_pmd); - if (pmdp_set_access_flags(vma, addr & HPAGE_PMD_MASK, -- pmd, _pmd, 1)) -+ pmd, _pmd, flags & FOLL_WRITE)) - update_mmu_cache_pmd(vma, addr, pmd); - } - -@@ -884,7 +879,7 @@ struct page *follow_devmap_pmd(struct vm_area_struct *vma, unsigned long addr, - return NULL; - - if (flags & FOLL_TOUCH) -- touch_pmd(vma, addr, pmd); -+ touch_pmd(vma, addr, pmd, flags); - - /* - * device mapped pages can only be returned if the -@@ -995,20 +990,15 @@ int copy_huge_pmd(struct mm_struct *dst_mm, struct mm_struct *src_mm, - - #ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD - static void touch_pud(struct vm_area_struct *vma, unsigned long addr, -- pud_t *pud) -+ pud_t *pud, int flags) - { - pud_t _pud; - -- /* -- * We should set the dirty bit only for FOLL_WRITE but for now -- * the dirty bit in the pud is meaningless. And if the dirty -- * bit will become meaningful and we'll only set it with -- * FOLL_WRITE, an atomic set_bit will be required on the pud to -- * set the young bit, instead of the current set_pud_at. -- */ -- _pud = pud_mkyoung(pud_mkdirty(*pud)); -+ _pud = pud_mkyoung(*pud); -+ if (flags & FOLL_WRITE) -+ _pud = pud_mkdirty(_pud); - if (pudp_set_access_flags(vma, addr & HPAGE_PUD_MASK, -- pud, _pud, 1)) -+ pud, _pud, flags & FOLL_WRITE)) - update_mmu_cache_pud(vma, addr, pud); - } - -@@ -1031,7 +1021,7 @@ struct page *follow_devmap_pud(struct vm_area_struct *vma, unsigned long addr, - return NULL; - - if (flags & FOLL_TOUCH) -- touch_pud(vma, addr, pud); -+ touch_pud(vma, addr, pud, flags); - - /* - * device mapped pages can only be returned if the -@@ -1424,7 +1414,7 @@ struct page *follow_trans_huge_pmd(struct vm_area_struct *vma, - page = pmd_page(*pmd); - VM_BUG_ON_PAGE(!PageHead(page) && !is_zone_device_page(page), page); - if (flags & FOLL_TOUCH) -- touch_pmd(vma, addr, pmd); -+ touch_pmd(vma, addr, pmd, flags); - if ((flags & FOLL_MLOCK) && (vma->vm_flags & VM_LOCKED)) { - /* - * We don't mlock() pte-mapped THPs. This way we can avoid --- -2.14.3 - diff --git a/0001-platform-x86-Add-driver-for-ACPI-INT0002-Virtual-GPI.patch b/0001-platform-x86-Add-driver-for-ACPI-INT0002-Virtual-GPI.patch deleted file mode 100644 index a0b6ff0..0000000 --- a/0001-platform-x86-Add-driver-for-ACPI-INT0002-Virtual-GPI.patch +++ /dev/null @@ -1,339 +0,0 @@ -From 3bbfe49a1d965b951527cde0da48f5d7677db264 Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Sun, 21 May 2017 13:15:11 +0200 -Subject: [PATCH 01/16] platform/x86: Add driver for ACPI INT0002 Virtual GPIO - device - -Some peripherals on Bay Trail and Cherry Trail platforms signal a -Power Management Event (PME) to the Power Management Controller (PMC) -to wakeup the system. When this happens software needs to explicitly -clear the PME bus 0 status bit in the GPE0a_STS register to avoid an -IRQ storm on IRQ 9. - -This is modelled in ACPI through the INT0002 ACPI device, which is -called a "Virtual GPIO controller" in ACPI because it defines the -event handler to call when the PME triggers through _AEI and _L02 -methods as would be done for a real GPIO interrupt in ACPI. - -This commit adds a driver which registers the Virtual GPIOs expected -by the DSDT on these devices, letting gpiolib-acpi claim the -virtual GPIO and install a GPIO-interrupt handler which call the _L02 -handler as it would for a real GPIO controller. - -Cc: joeyli -Cc: Takashi Iwai -Signed-off-by: Hans de Goede -Reviewed-by: Andy Shevchenko -Acked-by: Rafael J. Wysocki -Reviewed-by: Linus Walleij ---- -Changes in v2: --Remove dev_err after malloc failure --Remove unused empty runtime pm callbacks --s/GPE0A_PME_/GPE0A_PME_B0_/ --Fixed some checkpatch warnings (I forgot to run checkpatch on v1) - -Changes in v3: --Rewrite as gpiochip driver letting gpiolib-acpi deal with claiming the pin - 0x0002 and calling the _L02 event handler when the virtual gpio-irq triggers --Rebase on 4.12-rc1 - -Changes in v4: --Drop device_init_wakeup() from _probe(), use pm_system_wakeup() instead - of pm_wakeup_hard_event(chip->parent) --Improve commit message - -Changes in v5: --Use BIT() macro for FOO_BIT defines --Drop unneeded ACPI_PTR macro usage - -Changes in v6: --Move back to drivers/platform/x86 --Expand certain acronyms (PME, PMC) --Use linux/gpio/driver.h include instead of linux/gpio.h --Document why the get / set / direction_output functions are dummys --No functional changes - -Changes in v7: --Some minor cleanups from Andy: - -Move asm/ includes below linux/ includes - -s/APCI/ACPI/ - -Use bitmap_clear on chip->irq_valid_mask --Add Linus Walleij's Reviewed-by ---- - drivers/platform/x86/Kconfig | 19 +++ - drivers/platform/x86/Makefile | 1 + - drivers/platform/x86/intel_int0002_vgpio.c | 219 +++++++++++++++++++++++++++++ - 3 files changed, 239 insertions(+) - create mode 100644 drivers/platform/x86/intel_int0002_vgpio.c - -diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig -index 8489020ecf44..a3ccc3c795a5 100644 ---- a/drivers/platform/x86/Kconfig -+++ b/drivers/platform/x86/Kconfig -@@ -794,6 +794,25 @@ config INTEL_CHT_INT33FE - This driver instantiates i2c-clients for these, so that standard - i2c drivers for these chips can bind to the them. - -+config INTEL_INT0002_VGPIO -+ tristate "Intel ACPI INT0002 Virtual GPIO driver" -+ depends on GPIOLIB && ACPI -+ select GPIOLIB_IRQCHIP -+ ---help--- -+ Some peripherals on Bay Trail and Cherry Trail platforms signal a -+ Power Management Event (PME) to the Power Management Controller (PMC) -+ to wakeup the system. When this happens software needs to explicitly -+ clear the PME bus 0 status bit in the GPE0a_STS register to avoid an -+ IRQ storm on IRQ 9. -+ -+ This is modelled in ACPI through the INT0002 ACPI device, which is -+ called a "Virtual GPIO controller" in ACPI because it defines the -+ event handler to call when the PME triggers through _AEI and _L02 -+ methods as would be done for a real GPIO interrupt in ACPI. -+ -+ To compile this driver as a module, choose M here: the module will -+ be called intel_int0002_vgpio. -+ - config INTEL_HID_EVENT - tristate "INTEL HID Event" - depends on ACPI -diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile -index 182a3ed6605a..ab22ce77fb66 100644 ---- a/drivers/platform/x86/Makefile -+++ b/drivers/platform/x86/Makefile -@@ -46,6 +46,7 @@ obj-$(CONFIG_TOSHIBA_BT_RFKILL) += toshiba_bluetooth.o - obj-$(CONFIG_TOSHIBA_HAPS) += toshiba_haps.o - obj-$(CONFIG_TOSHIBA_WMI) += toshiba-wmi.o - obj-$(CONFIG_INTEL_CHT_INT33FE) += intel_cht_int33fe.o -+obj-$(CONFIG_INTEL_INT0002_VGPIO) += intel_int0002_vgpio.o - obj-$(CONFIG_INTEL_HID_EVENT) += intel-hid.o - obj-$(CONFIG_INTEL_VBTN) += intel-vbtn.o - obj-$(CONFIG_INTEL_SCU_IPC) += intel_scu_ipc.o -diff --git a/drivers/platform/x86/intel_int0002_vgpio.c b/drivers/platform/x86/intel_int0002_vgpio.c -new file mode 100644 -index 000000000000..92dc230ef5b2 ---- /dev/null -+++ b/drivers/platform/x86/intel_int0002_vgpio.c -@@ -0,0 +1,219 @@ -+/* -+ * Intel INT0002 "Virtual GPIO" driver -+ * -+ * Copyright (C) 2017 Hans de Goede -+ * -+ * Loosely based on android x86 kernel code which is: -+ * -+ * Copyright (c) 2014, Intel Corporation. -+ * -+ * Author: Dyut Kumar Sil -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ * Some peripherals on Bay Trail and Cherry Trail platforms signal a Power -+ * Management Event (PME) to the Power Management Controller (PMC) to wakeup -+ * the system. When this happens software needs to clear the PME bus 0 status -+ * bit in the GPE0a_STS register to avoid an IRQ storm on IRQ 9. -+ * -+ * This is modelled in ACPI through the INT0002 ACPI device, which is -+ * called a "Virtual GPIO controller" in ACPI because it defines the event -+ * handler to call when the PME triggers through _AEI and _L02 / _E02 -+ * methods as would be done for a real GPIO interrupt in ACPI. Note this -+ * is a hack to define an AML event handler for the PME while using existing -+ * ACPI mechanisms, this is not a real GPIO at all. -+ * -+ * This driver will bind to the INT0002 device, and register as a GPIO -+ * controller, letting gpiolib-acpi.c call the _L02 handler as it would -+ * for a real GPIO controller. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#define DRV_NAME "INT0002 Virtual GPIO" -+ -+/* For some reason the virtual GPIO pin tied to the GPE is numbered pin 2 */ -+#define GPE0A_PME_B0_VIRT_GPIO_PIN 2 -+ -+#define GPE0A_PME_B0_STS_BIT BIT(13) -+#define GPE0A_PME_B0_EN_BIT BIT(13) -+#define GPE0A_STS_PORT 0x420 -+#define GPE0A_EN_PORT 0x428 -+ -+#define ICPU(model) { X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, } -+ -+static const struct x86_cpu_id int0002_cpu_ids[] = { -+/* -+ * Limit ourselves to Cherry Trail for now, until testing shows we -+ * need to handle the INT0002 device on Baytrail too. -+ * ICPU(INTEL_FAM6_ATOM_SILVERMONT1), * Valleyview, Bay Trail * -+ */ -+ ICPU(INTEL_FAM6_ATOM_AIRMONT), /* Braswell, Cherry Trail */ -+ {} -+}; -+ -+/* -+ * As this is not a real GPIO at all, but just a hack to model an event in -+ * ACPI the get / set functions are dummy functions. -+ */ -+ -+static int int0002_gpio_get(struct gpio_chip *chip, unsigned int offset) -+{ -+ return 0; -+} -+ -+static void int0002_gpio_set(struct gpio_chip *chip, unsigned int offset, -+ int value) -+{ -+} -+ -+static int int0002_gpio_direction_output(struct gpio_chip *chip, -+ unsigned int offset, int value) -+{ -+ return 0; -+} -+ -+static void int0002_irq_ack(struct irq_data *data) -+{ -+ outl(GPE0A_PME_B0_STS_BIT, GPE0A_STS_PORT); -+} -+ -+static void int0002_irq_unmask(struct irq_data *data) -+{ -+ u32 gpe_en_reg; -+ -+ gpe_en_reg = inl(GPE0A_EN_PORT); -+ gpe_en_reg |= GPE0A_PME_B0_EN_BIT; -+ outl(gpe_en_reg, GPE0A_EN_PORT); -+} -+ -+static void int0002_irq_mask(struct irq_data *data) -+{ -+ u32 gpe_en_reg; -+ -+ gpe_en_reg = inl(GPE0A_EN_PORT); -+ gpe_en_reg &= ~GPE0A_PME_B0_EN_BIT; -+ outl(gpe_en_reg, GPE0A_EN_PORT); -+} -+ -+static irqreturn_t int0002_irq(int irq, void *data) -+{ -+ struct gpio_chip *chip = data; -+ u32 gpe_sts_reg; -+ -+ gpe_sts_reg = inl(GPE0A_STS_PORT); -+ if (!(gpe_sts_reg & GPE0A_PME_B0_STS_BIT)) -+ return IRQ_NONE; -+ -+ generic_handle_irq(irq_find_mapping(chip->irqdomain, -+ GPE0A_PME_B0_VIRT_GPIO_PIN)); -+ -+ pm_system_wakeup(); -+ -+ return IRQ_HANDLED; -+} -+ -+static struct irq_chip int0002_irqchip = { -+ .name = DRV_NAME, -+ .irq_ack = int0002_irq_ack, -+ .irq_mask = int0002_irq_mask, -+ .irq_unmask = int0002_irq_unmask, -+}; -+ -+static int int0002_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ const struct x86_cpu_id *cpu_id; -+ struct gpio_chip *chip; -+ int irq, ret; -+ -+ /* Menlow has a different INT0002 device? */ -+ cpu_id = x86_match_cpu(int0002_cpu_ids); -+ if (!cpu_id) -+ return -ENODEV; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) { -+ dev_err(dev, "Error getting IRQ: %d\n", irq); -+ return irq; -+ } -+ -+ chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); -+ if (!chip) -+ return -ENOMEM; -+ -+ chip->label = DRV_NAME; -+ chip->parent = dev; -+ chip->owner = THIS_MODULE; -+ chip->get = int0002_gpio_get; -+ chip->set = int0002_gpio_set; -+ chip->direction_input = int0002_gpio_get; -+ chip->direction_output = int0002_gpio_direction_output; -+ chip->base = -1; -+ chip->ngpio = GPE0A_PME_B0_VIRT_GPIO_PIN + 1; -+ chip->irq_need_valid_mask = true; -+ -+ ret = devm_gpiochip_add_data(&pdev->dev, chip, NULL); -+ if (ret) { -+ dev_err(dev, "Error adding gpio chip: %d\n", ret); -+ return ret; -+ } -+ -+ bitmap_clear(chip->irq_valid_mask, 0, GPE0A_PME_B0_VIRT_GPIO_PIN); -+ -+ /* -+ * We manually request the irq here instead of passing a flow-handler -+ * to gpiochip_set_chained_irqchip, because the irq is shared. -+ */ -+ ret = devm_request_irq(dev, irq, int0002_irq, -+ IRQF_SHARED | IRQF_NO_THREAD, "INT0002", chip); -+ if (ret) { -+ dev_err(dev, "Error requesting IRQ %d: %d\n", irq, ret); -+ return ret; -+ } -+ -+ ret = gpiochip_irqchip_add(chip, &int0002_irqchip, 0, handle_edge_irq, -+ IRQ_TYPE_NONE); -+ if (ret) { -+ dev_err(dev, "Error adding irqchip: %d\n", ret); -+ return ret; -+ } -+ -+ gpiochip_set_chained_irqchip(chip, &int0002_irqchip, irq, NULL); -+ -+ return 0; -+} -+ -+static const struct acpi_device_id int0002_acpi_ids[] = { -+ { "INT0002", 0 }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(acpi, int0002_acpi_ids); -+ -+static struct platform_driver int0002_driver = { -+ .driver = { -+ .name = DRV_NAME, -+ .acpi_match_table = int0002_acpi_ids, -+ }, -+ .probe = int0002_probe, -+}; -+ -+module_platform_driver(int0002_driver); -+ -+MODULE_AUTHOR("Hans de Goede "); -+MODULE_DESCRIPTION("Intel INT0002 Virtual GPIO driver"); -+MODULE_LICENSE("GPL"); --- -2.13.0 - diff --git a/0001-power-supply-max17042_battery-Add-support-for-ACPI-e.patch b/0001-power-supply-max17042_battery-Add-support-for-ACPI-e.patch deleted file mode 100644 index 858cd5a..0000000 --- a/0001-power-supply-max17042_battery-Add-support-for-ACPI-e.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 075bb90dbb4d894938c5859e3850987238db9cd8 Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Fri, 11 Aug 2017 22:30:55 +0200 -Subject: [PATCH 1/2] power: supply: max17042_battery: Add support for ACPI - enumeration - -Some x86 devices enumerate a max17047 fuel-gauge through a MAX17047 -ACPI firmware-node, add support for this. - -Signed-off-by: Hans de Goede ---- - drivers/power/supply/max17042_battery.c | 22 +++++++++++++++++++++- - 1 file changed, 21 insertions(+), 1 deletion(-) - -diff --git a/drivers/power/supply/max17042_battery.c b/drivers/power/supply/max17042_battery.c -index aecaaa2b0586..b2ddb7eb69c6 100644 ---- a/drivers/power/supply/max17042_battery.c -+++ b/drivers/power/supply/max17042_battery.c -@@ -22,6 +22,7 @@ - * This driver is based on max17040_battery.c - */ - -+#include - #include - #include - #include -@@ -982,6 +983,8 @@ static int max17042_probe(struct i2c_client *client, - struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); - const struct power_supply_desc *max17042_desc = &max17042_psy_desc; - struct power_supply_config psy_cfg = {}; -+ const struct acpi_device_id *acpi_id; -+ struct device *dev = &client->dev; - struct max17042_chip *chip; - int ret; - int i; -@@ -995,7 +998,15 @@ static int max17042_probe(struct i2c_client *client, - return -ENOMEM; - - chip->client = client; -- chip->chip_type = id->driver_data; -+ if (id) { -+ chip->chip_type = id->driver_data; -+ } else { -+ acpi_id = acpi_match_device(dev->driver->acpi_match_table, dev); -+ if (!acpi_id) -+ return -ENODEV; -+ -+ chip->chip_type = acpi_id->driver_data; -+ } - chip->regmap = devm_regmap_init_i2c(client, &max17042_regmap_config); - if (IS_ERR(chip->regmap)) { - dev_err(&client->dev, "Failed to initialize regmap\n"); -@@ -1104,6 +1115,14 @@ static int max17042_resume(struct device *dev) - static SIMPLE_DEV_PM_OPS(max17042_pm_ops, max17042_suspend, - max17042_resume); - -+#ifdef CONFIG_ACPI -+static const struct acpi_device_id max17042_acpi_match[] = { -+ { "MAX17047", MAXIM_DEVICE_TYPE_MAX17047 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(acpi, max17042_acpi_match); -+#endif -+ - #ifdef CONFIG_OF - static const struct of_device_id max17042_dt_match[] = { - { .compatible = "maxim,max17042" }, -@@ -1125,6 +1144,7 @@ MODULE_DEVICE_TABLE(i2c, max17042_id); - static struct i2c_driver max17042_i2c_driver = { - .driver = { - .name = "max17042", -+ .acpi_match_table = ACPI_PTR(max17042_acpi_match), - .of_match_table = of_match_ptr(max17042_dt_match), - .pm = &max17042_pm_ops, - }, --- -2.13.4 - diff --git a/0001-powerpc-64s-radix-Fix-128TB-512TB-virtual-address-bo.patch b/0001-powerpc-64s-radix-Fix-128TB-512TB-virtual-address-bo.patch deleted file mode 100644 index 4d2bbfa..0000000 --- a/0001-powerpc-64s-radix-Fix-128TB-512TB-virtual-address-bo.patch +++ /dev/null @@ -1,204 +0,0 @@ -From aca20afc84cf8578e044c67c4949672ac98f064a Mon Sep 17 00:00:00 2001 -From: Nicholas Piggin -Date: Tue, 28 Nov 2017 11:26:54 +0100 -Subject: [PATCH 1/5] powerpc/64s/radix: Fix 128TB-512TB virtual address - boundary case allocation - -commit 85e3f1adcb9d49300b0a943bb93f9604be375bfb upstream. - -Radix VA space allocations test addresses against mm->task_size which -is 512TB, even in cases where the intention is to limit allocation to -below 128TB. - -This results in mmap with a hint address below 128TB but address + -length above 128TB succeeding when it should fail (as hash does after -the previous patch). - -Set the high address limit to be considered up front, and base -subsequent allocation checks on that consistently. - -Fixes: f4ea6dcb08ea ("powerpc/mm: Enable mappings above 128TB") -Signed-off-by: Nicholas Piggin -Reviewed-by: Aneesh Kumar K.V -Signed-off-by: Michael Ellerman -Signed-off-by: Greg Kroah-Hartman ---- - arch/powerpc/mm/hugetlbpage-radix.c | 26 ++++++++++++------ - arch/powerpc/mm/mmap.c | 55 ++++++++++++++++++++++--------------- - 2 files changed, 50 insertions(+), 31 deletions(-) - -diff --git a/arch/powerpc/mm/hugetlbpage-radix.c b/arch/powerpc/mm/hugetlbpage-radix.c -index a12e86395025..0a3d71aae175 100644 ---- a/arch/powerpc/mm/hugetlbpage-radix.c -+++ b/arch/powerpc/mm/hugetlbpage-radix.c -@@ -48,17 +48,28 @@ radix__hugetlb_get_unmapped_area(struct file *file, unsigned long addr, - struct mm_struct *mm = current->mm; - struct vm_area_struct *vma; - struct hstate *h = hstate_file(file); -+ int fixed = (flags & MAP_FIXED); -+ unsigned long high_limit; - struct vm_unmapped_area_info info; - -- if (unlikely(addr > mm->context.addr_limit && addr < TASK_SIZE)) -- mm->context.addr_limit = TASK_SIZE; -+ high_limit = DEFAULT_MAP_WINDOW; -+ if (addr >= high_limit || (fixed && (addr + len > high_limit))) -+ high_limit = TASK_SIZE; - - if (len & ~huge_page_mask(h)) - return -EINVAL; -- if (len > mm->task_size) -+ if (len > high_limit) - return -ENOMEM; -+ if (fixed) { -+ if (addr > high_limit - len) -+ return -ENOMEM; -+ } - -- if (flags & MAP_FIXED) { -+ if (unlikely(addr > mm->context.addr_limit && -+ mm->context.addr_limit != TASK_SIZE)) -+ mm->context.addr_limit = TASK_SIZE; -+ -+ if (fixed) { - if (prepare_hugepage_range(file, addr, len)) - return -EINVAL; - return addr; -@@ -67,7 +78,7 @@ radix__hugetlb_get_unmapped_area(struct file *file, unsigned long addr, - if (addr) { - addr = ALIGN(addr, huge_page_size(h)); - vma = find_vma(mm, addr); -- if (mm->task_size - len >= addr && -+ if (high_limit - len >= addr && - (!vma || addr + len <= vm_start_gap(vma))) - return addr; - } -@@ -78,12 +89,9 @@ radix__hugetlb_get_unmapped_area(struct file *file, unsigned long addr, - info.flags = VM_UNMAPPED_AREA_TOPDOWN; - info.length = len; - info.low_limit = PAGE_SIZE; -- info.high_limit = current->mm->mmap_base; -+ info.high_limit = mm->mmap_base + (high_limit - DEFAULT_MAP_WINDOW); - info.align_mask = PAGE_MASK & ~huge_page_mask(h); - info.align_offset = 0; - -- if (addr > DEFAULT_MAP_WINDOW) -- info.high_limit += mm->context.addr_limit - DEFAULT_MAP_WINDOW; -- - return vm_unmapped_area(&info); - } -diff --git a/arch/powerpc/mm/mmap.c b/arch/powerpc/mm/mmap.c -index 5d78b193fec4..6d476a7b5611 100644 ---- a/arch/powerpc/mm/mmap.c -+++ b/arch/powerpc/mm/mmap.c -@@ -106,22 +106,32 @@ radix__arch_get_unmapped_area(struct file *filp, unsigned long addr, - { - struct mm_struct *mm = current->mm; - struct vm_area_struct *vma; -+ int fixed = (flags & MAP_FIXED); -+ unsigned long high_limit; - struct vm_unmapped_area_info info; - -+ high_limit = DEFAULT_MAP_WINDOW; -+ if (addr >= high_limit || (fixed && (addr + len > high_limit))) -+ high_limit = TASK_SIZE; -+ -+ if (len > high_limit) -+ return -ENOMEM; -+ if (fixed) { -+ if (addr > high_limit - len) -+ return -ENOMEM; -+ } -+ - if (unlikely(addr > mm->context.addr_limit && - mm->context.addr_limit != TASK_SIZE)) - mm->context.addr_limit = TASK_SIZE; - -- if (len > mm->task_size - mmap_min_addr) -- return -ENOMEM; -- -- if (flags & MAP_FIXED) -+ if (fixed) - return addr; - - if (addr) { - addr = PAGE_ALIGN(addr); - vma = find_vma(mm, addr); -- if (mm->task_size - len >= addr && addr >= mmap_min_addr && -+ if (high_limit - len >= addr && addr >= mmap_min_addr && - (!vma || addr + len <= vm_start_gap(vma))) - return addr; - } -@@ -129,13 +139,9 @@ radix__arch_get_unmapped_area(struct file *filp, unsigned long addr, - info.flags = 0; - info.length = len; - info.low_limit = mm->mmap_base; -+ info.high_limit = high_limit; - info.align_mask = 0; - -- if (unlikely(addr > DEFAULT_MAP_WINDOW)) -- info.high_limit = mm->context.addr_limit; -- else -- info.high_limit = DEFAULT_MAP_WINDOW; -- - return vm_unmapped_area(&info); - } - -@@ -149,37 +155,42 @@ radix__arch_get_unmapped_area_topdown(struct file *filp, - struct vm_area_struct *vma; - struct mm_struct *mm = current->mm; - unsigned long addr = addr0; -+ int fixed = (flags & MAP_FIXED); -+ unsigned long high_limit; - struct vm_unmapped_area_info info; - -+ high_limit = DEFAULT_MAP_WINDOW; -+ if (addr >= high_limit || (fixed && (addr + len > high_limit))) -+ high_limit = TASK_SIZE; -+ -+ if (len > high_limit) -+ return -ENOMEM; -+ if (fixed) { -+ if (addr > high_limit - len) -+ return -ENOMEM; -+ } -+ - if (unlikely(addr > mm->context.addr_limit && - mm->context.addr_limit != TASK_SIZE)) - mm->context.addr_limit = TASK_SIZE; - -- /* requested length too big for entire address space */ -- if (len > mm->task_size - mmap_min_addr) -- return -ENOMEM; -- -- if (flags & MAP_FIXED) -+ if (fixed) - return addr; - -- /* requesting a specific address */ - if (addr) { - addr = PAGE_ALIGN(addr); - vma = find_vma(mm, addr); -- if (mm->task_size - len >= addr && addr >= mmap_min_addr && -- (!vma || addr + len <= vm_start_gap(vma))) -+ if (high_limit - len >= addr && addr >= mmap_min_addr && -+ (!vma || addr + len <= vm_start_gap(vma))) - return addr; - } - - info.flags = VM_UNMAPPED_AREA_TOPDOWN; - info.length = len; - info.low_limit = max(PAGE_SIZE, mmap_min_addr); -- info.high_limit = mm->mmap_base; -+ info.high_limit = mm->mmap_base + (high_limit - DEFAULT_MAP_WINDOW); - info.align_mask = 0; - -- if (addr > DEFAULT_MAP_WINDOW) -- info.high_limit += mm->context.addr_limit - DEFAULT_MAP_WINDOW; -- - addr = vm_unmapped_area(&info); - if (!(addr & ~PAGE_MASK)) - return addr; --- -2.14.3 - diff --git a/0002-mfd-Add-Cherry-Trail-Whiskey-Cove-PMIC-driver.patch b/0002-mfd-Add-Cherry-Trail-Whiskey-Cove-PMIC-driver.patch deleted file mode 100644 index 4997581..0000000 --- a/0002-mfd-Add-Cherry-Trail-Whiskey-Cove-PMIC-driver.patch +++ /dev/null @@ -1,355 +0,0 @@ -From c0f9254fdd0703ade018b2ff3a8cca433f781a11 Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Sun, 26 Feb 2017 21:07:29 +0100 -Subject: [PATCH 02/16] mfd: Add Cherry Trail Whiskey Cove PMIC driver - -Add mfd driver for Intel CHT Whiskey Cove PMIC, based on various non -upstreamed CHT Whiskey Cove PMIC patches. - -This is a somewhat minimal version which adds irqchip support and cells -for: ACPI PMIC opregion support, the i2c-controller driving the external -charger irc and the pwrsrc/extcon block. - -Further cells can be added in the future if/when drivers are upstreamed -for them. - -Cc: Bin Gao -Cc: Felipe Balbi -Cc: Andy Shevchenko -Signed-off-by: Hans de Goede -Reviewed-by: Andy Shevchenko ---- -Changes in v2: --Since this uses plain mfd and not the intel_soc_pmic stuff give it - its own Kconfig and allow this to be built as a module --Add missing #include - -Changes in v3: --Drop #include again, not the right fix for the build errors --Error out when the upper byte of the register-address passed to the regmap - functions is 0 rather then hardcoding an address in that case --Various minor style tweaks / cleanups --Move defines of regulator register addresses to intel_pmic_chtwc.c, - it is the only place where they are used --Drop now empty include/linux/mfd/intel_chtwc.h --Rename intel_soc_pmic_chtwc.c to intel_cht_wc.c to match Kconfig option name --Add irqchip support --Add external charger cell --Add pwrsrc cell - -Changes in v4: --Use PLATFORM_DEVID_NONE - -Changes in v5: --Change Kconfig option from tristate to boolean and add a select for the - i2c-bus driver, this is necessary because the chtwc PMIC provides an ACPI - OPRegion handler, which must be available before other drivers using it - are loaded, which can only be ensured if the mfd, opregion and i2c-bus - drivers are built in. This fixes errors like these during boot: - mmc0: SDHCI controller on ACPI [80860F14:00] using ADMA - ACPI Error: No handler for Region [REGS] (ffff93543b0cc3a8) [UserDefinedRegion] (20170119/evregion-166) - ACPI Error: Region UserDefinedRegion (ID=143) has no handler (20170119/exfldio-299) - ACPI Error: Method parse/execution failed [\_SB.PCI0.I2C7.PMI5.GET] (Node ffff93543b0cde10), AE_NOT_EXIST (20170119/psparse-543) - ACPI Error: Method parse/execution failed [\_SB.PCI0.SHC1._PS0] (Node ffff93543b0b5cd0), AE_NOT_EXIST (20170119/psparse-543) - acpi 80860F14:02: Failed to change power state to D0 --Some minor style and capitalization fixes from review by Lee Jones - -Changes in v6: --Fix Kconfig depends and selects to fix warning reported by kbuild test robot - -Changes in v7: --Add explanation why this is a bool and why it selects i2c-designwaree - to the help text rather then as comments in the Kconfig - -Changes in v8: --Remove MODULE macros, etc. now that this driver is a bool in Kconfig - -Changes in v9: --Some whitespace tweaks --Return -EINVAL from probe on invalid irq --Use probe_new i2c_driver callback ---- - drivers/mfd/Kconfig | 16 +++ - drivers/mfd/Makefile | 1 + - drivers/mfd/intel_soc_pmic_chtwc.c | 230 +++++++++++++++++++++++++++++++++++++ - 3 files changed, 247 insertions(+) - create mode 100644 drivers/mfd/intel_soc_pmic_chtwc.c - -diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig -index 3eb5c93595f6..5203a86b8f6c 100644 ---- a/drivers/mfd/Kconfig -+++ b/drivers/mfd/Kconfig -@@ -470,6 +470,22 @@ config INTEL_SOC_PMIC_BXTWC - thermal, charger and related power management functions - on these systems. - -+config INTEL_SOC_PMIC_CHTWC -+ bool "Support for Intel Cherry Trail Whiskey Cove PMIC" -+ depends on ACPI && HAS_IOMEM && I2C=y && COMMON_CLK -+ depends on X86 || COMPILE_TEST -+ select MFD_CORE -+ select REGMAP_I2C -+ select REGMAP_IRQ -+ select I2C_DESIGNWARE_PLATFORM -+ help -+ Select this option to enable support for the Intel Cherry Trail -+ Whiskey Cove PMIC found on some Intel Cherry Trail systems. -+ -+ This option is a bool as it provides an ACPI OpRegion which must be -+ available before any devices using it are probed. This option also -+ causes the designware-i2c driver to be builtin for the same reason. -+ - config MFD_INTEL_LPSS - tristate - select COMMON_CLK -diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile -index c16bf1ea0ea9..6f6aed8cfccc 100644 ---- a/drivers/mfd/Makefile -+++ b/drivers/mfd/Makefile -@@ -214,6 +214,7 @@ obj-$(CONFIG_MFD_SKY81452) += sky81452.o - intel-soc-pmic-objs := intel_soc_pmic_core.o intel_soc_pmic_crc.o - obj-$(CONFIG_INTEL_SOC_PMIC) += intel-soc-pmic.o - obj-$(CONFIG_INTEL_SOC_PMIC_BXTWC) += intel_soc_pmic_bxtwc.o -+obj-$(CONFIG_INTEL_SOC_PMIC_CHTWC) += intel_soc_pmic_chtwc.o - obj-$(CONFIG_MFD_MT6397) += mt6397-core.o - - obj-$(CONFIG_MFD_ALTERA_A10SR) += altera-a10sr.o -diff --git a/drivers/mfd/intel_soc_pmic_chtwc.c b/drivers/mfd/intel_soc_pmic_chtwc.c -new file mode 100644 -index 000000000000..b35da01d5bcf ---- /dev/null -+++ b/drivers/mfd/intel_soc_pmic_chtwc.c -@@ -0,0 +1,230 @@ -+/* -+ * MFD core driver for Intel Cherrytrail Whiskey Cove PMIC -+ * -+ * Copyright (C) 2017 Hans de Goede -+ * -+ * Based on various non upstream patches to support the CHT Whiskey Cove PMIC: -+ * Copyright (C) 2013-2015 Intel Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+/* PMIC device registers */ -+#define REG_OFFSET_MASK GENMASK(7, 0) -+#define REG_ADDR_MASK GENMASK(15, 8) -+#define REG_ADDR_SHIFT 8 -+ -+#define CHT_WC_IRQLVL1 0x6e02 -+#define CHT_WC_IRQLVL1_MASK 0x6e0e -+ -+/* Whiskey Cove PMIC share same ACPI ID between different platforms */ -+#define CHT_WC_HRV 3 -+ -+/* Level 1 IRQs (level 2 IRQs are handled in the child device drivers) */ -+enum { -+ CHT_WC_PWRSRC_IRQ = 0, -+ CHT_WC_THRM_IRQ, -+ CHT_WC_BCU_IRQ, -+ CHT_WC_ADC_IRQ, -+ CHT_WC_EXT_CHGR_IRQ, -+ CHT_WC_GPIO_IRQ, -+ /* There is no irq 6 */ -+ CHT_WC_CRIT_IRQ = 7, -+}; -+ -+static struct resource cht_wc_pwrsrc_resources[] = { -+ DEFINE_RES_IRQ(CHT_WC_PWRSRC_IRQ), -+}; -+ -+static struct resource cht_wc_ext_charger_resources[] = { -+ DEFINE_RES_IRQ(CHT_WC_EXT_CHGR_IRQ), -+}; -+ -+static struct mfd_cell cht_wc_dev[] = { -+ { -+ .name = "cht_wcove_pwrsrc", -+ .num_resources = ARRAY_SIZE(cht_wc_pwrsrc_resources), -+ .resources = cht_wc_pwrsrc_resources, -+ }, { -+ .name = "cht_wcove_ext_chgr", -+ .num_resources = ARRAY_SIZE(cht_wc_ext_charger_resources), -+ .resources = cht_wc_ext_charger_resources, -+ }, -+ { .name = "cht_wcove_region", }, -+}; -+ -+/* -+ * The CHT Whiskey Cove covers multiple I2C addresses, with a 1 Byte -+ * register address space per I2C address, so we use 16 bit register -+ * addresses where the high 8 bits contain the I2C client address. -+ */ -+static int cht_wc_byte_reg_read(void *context, unsigned int reg, -+ unsigned int *val) -+{ -+ struct i2c_client *client = context; -+ int ret, orig_addr = client->addr; -+ -+ if (!(reg & REG_ADDR_MASK)) { -+ dev_err(&client->dev, "Error I2C address not specified\n"); -+ return -EINVAL; -+ } -+ -+ client->addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT; -+ ret = i2c_smbus_read_byte_data(client, reg & REG_OFFSET_MASK); -+ client->addr = orig_addr; -+ -+ if (ret < 0) -+ return ret; -+ -+ *val = ret; -+ return 0; -+} -+ -+static int cht_wc_byte_reg_write(void *context, unsigned int reg, -+ unsigned int val) -+{ -+ struct i2c_client *client = context; -+ int ret, orig_addr = client->addr; -+ -+ if (!(reg & REG_ADDR_MASK)) { -+ dev_err(&client->dev, "Error I2C address not specified\n"); -+ return -EINVAL; -+ } -+ -+ client->addr = (reg & REG_ADDR_MASK) >> REG_ADDR_SHIFT; -+ ret = i2c_smbus_write_byte_data(client, reg & REG_OFFSET_MASK, val); -+ client->addr = orig_addr; -+ -+ return ret; -+} -+ -+static const struct regmap_config cht_wc_regmap_cfg = { -+ .reg_bits = 16, -+ .val_bits = 8, -+ .reg_write = cht_wc_byte_reg_write, -+ .reg_read = cht_wc_byte_reg_read, -+}; -+ -+static const struct regmap_irq cht_wc_regmap_irqs[] = { -+ REGMAP_IRQ_REG(CHT_WC_PWRSRC_IRQ, 0, BIT(CHT_WC_PWRSRC_IRQ)), -+ REGMAP_IRQ_REG(CHT_WC_THRM_IRQ, 0, BIT(CHT_WC_THRM_IRQ)), -+ REGMAP_IRQ_REG(CHT_WC_BCU_IRQ, 0, BIT(CHT_WC_BCU_IRQ)), -+ REGMAP_IRQ_REG(CHT_WC_ADC_IRQ, 0, BIT(CHT_WC_ADC_IRQ)), -+ REGMAP_IRQ_REG(CHT_WC_EXT_CHGR_IRQ, 0, BIT(CHT_WC_EXT_CHGR_IRQ)), -+ REGMAP_IRQ_REG(CHT_WC_GPIO_IRQ, 0, BIT(CHT_WC_GPIO_IRQ)), -+ REGMAP_IRQ_REG(CHT_WC_CRIT_IRQ, 0, BIT(CHT_WC_CRIT_IRQ)), -+}; -+ -+static const struct regmap_irq_chip cht_wc_regmap_irq_chip = { -+ .name = "cht_wc_irq_chip", -+ .status_base = CHT_WC_IRQLVL1, -+ .mask_base = CHT_WC_IRQLVL1_MASK, -+ .irqs = cht_wc_regmap_irqs, -+ .num_irqs = ARRAY_SIZE(cht_wc_regmap_irqs), -+ .num_regs = 1, -+}; -+ -+static int cht_wc_probe(struct i2c_client *client) -+{ -+ struct device *dev = &client->dev; -+ struct intel_soc_pmic *pmic; -+ acpi_status status; -+ unsigned long long hrv; -+ int ret; -+ -+ status = acpi_evaluate_integer(ACPI_HANDLE(dev), "_HRV", NULL, &hrv); -+ if (ACPI_FAILURE(status)) { -+ dev_err(dev, "Failed to get PMIC hardware revision\n"); -+ return -ENODEV; -+ } -+ if (hrv != CHT_WC_HRV) { -+ dev_err(dev, "Invalid PMIC hardware revision: %llu\n", hrv); -+ return -ENODEV; -+ } -+ if (client->irq < 0) { -+ dev_err(dev, "Invalid IRQ\n"); -+ return -EINVAL; -+ } -+ -+ pmic = devm_kzalloc(dev, sizeof(*pmic), GFP_KERNEL); -+ if (!pmic) -+ return -ENOMEM; -+ -+ pmic->irq = client->irq; -+ pmic->dev = dev; -+ i2c_set_clientdata(client, pmic); -+ -+ pmic->regmap = devm_regmap_init(dev, NULL, client, &cht_wc_regmap_cfg); -+ if (IS_ERR(pmic->regmap)) -+ return PTR_ERR(pmic->regmap); -+ -+ ret = devm_regmap_add_irq_chip(dev, pmic->regmap, pmic->irq, -+ IRQF_ONESHOT | IRQF_SHARED, 0, -+ &cht_wc_regmap_irq_chip, -+ &pmic->irq_chip_data); -+ if (ret) -+ return ret; -+ -+ return devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, -+ cht_wc_dev, ARRAY_SIZE(cht_wc_dev), NULL, 0, -+ regmap_irq_get_domain(pmic->irq_chip_data)); -+} -+ -+static void cht_wc_shutdown(struct i2c_client *client) -+{ -+ struct intel_soc_pmic *pmic = i2c_get_clientdata(client); -+ -+ disable_irq(pmic->irq); -+} -+ -+static int __maybe_unused cht_wc_suspend(struct device *dev) -+{ -+ struct intel_soc_pmic *pmic = dev_get_drvdata(dev); -+ -+ disable_irq(pmic->irq); -+ -+ return 0; -+} -+ -+static int __maybe_unused cht_wc_resume(struct device *dev) -+{ -+ struct intel_soc_pmic *pmic = dev_get_drvdata(dev); -+ -+ enable_irq(pmic->irq); -+ -+ return 0; -+} -+static SIMPLE_DEV_PM_OPS(cht_wc_pm_ops, cht_wc_suspend, cht_wc_resume); -+ -+static const struct i2c_device_id cht_wc_i2c_id[] = { -+ { } -+}; -+ -+static const struct acpi_device_id cht_wc_acpi_ids[] = { -+ { "INT34D3", }, -+ { } -+}; -+ -+static struct i2c_driver cht_wc_driver = { -+ .driver = { -+ .name = "CHT Whiskey Cove PMIC", -+ .pm = &cht_wc_pm_ops, -+ .acpi_match_table = cht_wc_acpi_ids, -+ }, -+ .probe_new = cht_wc_probe, -+ .shutdown = cht_wc_shutdown, -+ .id_table = cht_wc_i2c_id, -+}; -+builtin_i2c_driver(cht_wc_driver); --- -2.13.0 - diff --git a/0002-power-supply-max17042_battery-Fix-ACPI-interrupt-iss.patch b/0002-power-supply-max17042_battery-Fix-ACPI-interrupt-iss.patch deleted file mode 100644 index 6daecaf..0000000 --- a/0002-power-supply-max17042_battery-Fix-ACPI-interrupt-iss.patch +++ /dev/null @@ -1,80 +0,0 @@ -From 27b9d46d25c873b351757c44ce523bf0ede1d08e Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Mon, 14 Aug 2017 11:02:59 +0200 -Subject: [PATCH 2/2] power: supply: max17042_battery: Fix ACPI interrupt - issues - -On some x86/ACPI boards the DSDT defines an ACPI event handler for -the max17047 IRQ, this causes several problems: - -1) We need to share the IRQ to avoid an error getting it - -2) Even of we are willing to share, we may fail to share because some - DSDTs claim it exclusivly - -3) If we are unable to share the IRQ, or the IRQ is only listed as an - ACPI event source and not in the max1704 firmware node, then the - charge threshold IRQ (which is used to give an IRQ every 1 percent - charge change) becomes a problem, the ACPI event handler will not - update this to the next 1 percent threshold, so the IRQ keeps firing - and we get an IRQ storm pegging 1 CPU core. - - This happens despite the max17042 driver not setting the charge - threshold because Windows uses it and leaves it set on reboot. - - So if we are unable to get the IRQ we need to reprogram the - charge threshold to its disabled setting. - -This commit fixes al of the above, while at it it also makes the error -msg when being unable to get the IRQ consistent with other messages. - -Signed-off-by: Hans de Goede ---- - drivers/power/supply/max17042_battery.c | 20 +++++++++++++++----- - 1 file changed, 15 insertions(+), 5 deletions(-) - -diff --git a/drivers/power/supply/max17042_battery.c b/drivers/power/supply/max17042_battery.c -index b2ddb7eb69c6..18a44e4ed6ff 100644 ---- a/drivers/power/supply/max17042_battery.c -+++ b/drivers/power/supply/max17042_battery.c -@@ -1050,11 +1050,18 @@ static int max17042_probe(struct i2c_client *client, - } - - if (client->irq) { -+ unsigned int flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT; -+ -+ /* -+ * On ACPI systems the IRQ may be handled by ACPI-event code, -+ * so we need to share (if the ACPI code is willing to share). -+ */ -+ if (acpi_id) -+ flags |= IRQF_SHARED | IRQF_PROBE_SHARED; -+ - ret = devm_request_threaded_irq(&client->dev, client->irq, - NULL, -- max17042_thread_handler, -- IRQF_TRIGGER_FALLING | -- IRQF_ONESHOT, -+ max17042_thread_handler, flags, - chip->battery->desc->name, - chip); - if (!ret) { -@@ -1064,10 +1071,13 @@ static int max17042_probe(struct i2c_client *client, - max17042_set_soc_threshold(chip, 1); - } else { - client->irq = 0; -- dev_err(&client->dev, "%s(): cannot get IRQ\n", -- __func__); -+ if (ret != -EBUSY) -+ dev_err(&client->dev, "Failed to get IRQ\n"); - } - } -+ /* Not able to update the charge threshold when exceeded? -> disable */ -+ if (!client->irq) -+ regmap_write(chip->regmap, MAX17042_SALRT_Th, 0xff00); - - regmap_read(chip->regmap, MAX17042_STATUS, &val); - if (val & STATUS_POR_BIT) { --- -2.13.4 - diff --git a/0002-powerpc-64s-hash-Fix-512T-hint-detection-to-use-128T.patch b/0002-powerpc-64s-hash-Fix-512T-hint-detection-to-use-128T.patch deleted file mode 100644 index fc6b806..0000000 --- a/0002-powerpc-64s-hash-Fix-512T-hint-detection-to-use-128T.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 75c7f5172c113af1ea3cf094436c9e03191673e0 Mon Sep 17 00:00:00 2001 -From: Michael Ellerman -Date: Tue, 28 Nov 2017 11:26:55 +0100 -Subject: [PATCH 2/5] powerpc/64s/hash: Fix 512T hint detection to use >= 128T - -commit 7ece370996b694ae263025e056ad785afc1be5ab upstream. - -Currently userspace is able to request mmap() search between 128T-512T -by specifying a hint address that is greater than 128T. But that means -a hint of 128T exactly will return an address below 128T, which is -confusing and wrong. - -So fix the logic to check the hint is greater than *or equal* to 128T. - -Fixes: f4ea6dcb08ea ("powerpc/mm: Enable mappings above 128TB") -Suggested-by: Aneesh Kumar K.V -Suggested-by: Nicholas Piggin -[mpe: Split out of Nick's bigger patch] -Signed-off-by: Michael Ellerman -Signed-off-by: Greg Kroah-Hartman ---- - arch/powerpc/mm/slice.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - -diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c -index 45f6740dd407..48a5312103a1 100644 ---- a/arch/powerpc/mm/slice.c -+++ b/arch/powerpc/mm/slice.c -@@ -419,7 +419,7 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len, - /* - * Check if we need to expland slice area. - */ -- if (unlikely(addr > mm->context.addr_limit && -+ if (unlikely(addr >= mm->context.addr_limit && - mm->context.addr_limit != TASK_SIZE)) { - mm->context.addr_limit = TASK_SIZE; - on_each_cpu(slice_flush_segments, mm, 1); -@@ -427,7 +427,7 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len, - /* - * This mmap request can allocate upt to 512TB - */ -- if (addr > DEFAULT_MAP_WINDOW) -+ if (addr >= DEFAULT_MAP_WINDOW) - high_limit = mm->context.addr_limit; - else - high_limit = DEFAULT_MAP_WINDOW; --- -2.14.3 - diff --git a/0003-power-supply-core-Add-support-for-supplied-from-devi.patch b/0003-power-supply-core-Add-support-for-supplied-from-devi.patch deleted file mode 100644 index ab646e2..0000000 --- a/0003-power-supply-core-Add-support-for-supplied-from-devi.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 69dd0606a0d8680fe0a5e9b959f6662e582e1674 Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Tue, 2 May 2017 13:43:34 +0200 -Subject: [PATCH 03/16] power: supply: core: Add support for supplied-from - device-property - -On devicetree using platforms the devicetree can provide info on which -power-supplies supply another power-supply through phandles. - -This commit adds support for providing this info on non devicetree -platforms through the platform code setting a supplied-from -device-property on the power-supplies parent device. - -Signed-off-by: Hans de Goede ---- - drivers/power/supply/power_supply_core.c | 24 +++++++++++++++++++++++- - 1 file changed, 23 insertions(+), 1 deletion(-) - -diff --git a/drivers/power/supply/power_supply_core.c b/drivers/power/supply/power_supply_core.c -index 7ec7c7c202bd..0c09144193a6 100644 ---- a/drivers/power/supply/power_supply_core.c -+++ b/drivers/power/supply/power_supply_core.c -@@ -274,8 +274,30 @@ static int power_supply_check_supplies(struct power_supply *psy) - return power_supply_populate_supplied_from(psy); - } - #else --static inline int power_supply_check_supplies(struct power_supply *psy) -+static int power_supply_check_supplies(struct power_supply *psy) - { -+ int nval, ret; -+ -+ if (!psy->dev.parent) -+ return 0; -+ -+ nval = device_property_read_string_array(psy->dev.parent, -+ "supplied-from", NULL, 0); -+ if (nval <= 0) -+ return 0; -+ -+ psy->supplied_from = devm_kmalloc_array(&psy->dev, nval, -+ sizeof(char *), GFP_KERNEL); -+ if (!psy->supplied_from) -+ return -ENOMEM; -+ -+ ret = device_property_read_string_array(psy->dev.parent, -+ "supplied-from", (const char **)psy->supplied_from, nval); -+ if (ret < 0) -+ return ret; -+ -+ psy->num_supplies = nval; -+ - return 0; - } - #endif --- -2.13.0 - diff --git a/0003-powerpc-64s-hash-Fix-128TB-512TB-virtual-address-bou.patch b/0003-powerpc-64s-hash-Fix-128TB-512TB-virtual-address-bou.patch deleted file mode 100644 index 009068a..0000000 --- a/0003-powerpc-64s-hash-Fix-128TB-512TB-virtual-address-bou.patch +++ /dev/null @@ -1,129 +0,0 @@ -From e90387a8d2227f95bf5e5b5ffd816d48a87466e2 Mon Sep 17 00:00:00 2001 -From: Nicholas Piggin -Date: Tue, 28 Nov 2017 11:26:56 +0100 -Subject: [PATCH 3/5] powerpc/64s/hash: Fix 128TB-512TB virtual address - boundary case allocation - -commit 6a72dc038b615229a1b285829d6c8378d15c2347 upstream. - -When allocating VA space with a hint that crosses 128TB, the SLB -addr_limit variable is not expanded if addr is not > 128TB, but the -slice allocation looks at task_size, which is 512TB. This results in -slice_check_fit() incorrectly succeeding because the slice_count -truncates off bit 128 of the requested mask, so the comparison to the -available mask succeeds. - -Fix this by using mm->context.addr_limit instead of mm->task_size for -testing allocation limits. This causes such allocations to fail. - -Fixes: f4ea6dcb08ea ("powerpc/mm: Enable mappings above 128TB") -Reported-by: Florian Weimer -Signed-off-by: Nicholas Piggin -Reviewed-by: Aneesh Kumar K.V -Signed-off-by: Michael Ellerman -Signed-off-by: Greg Kroah-Hartman ---- - arch/powerpc/mm/slice.c | 50 ++++++++++++++++++++++++------------------------- - 1 file changed, 24 insertions(+), 26 deletions(-) - -diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c -index 48a5312103a1..3889201b560c 100644 ---- a/arch/powerpc/mm/slice.c -+++ b/arch/powerpc/mm/slice.c -@@ -96,7 +96,7 @@ static int slice_area_is_free(struct mm_struct *mm, unsigned long addr, - { - struct vm_area_struct *vma; - -- if ((mm->task_size - len) < addr) -+ if ((mm->context.addr_limit - len) < addr) - return 0; - vma = find_vma(mm, addr); - return (!vma || (addr + len) <= vm_start_gap(vma)); -@@ -133,7 +133,7 @@ static void slice_mask_for_free(struct mm_struct *mm, struct slice_mask *ret) - if (!slice_low_has_vma(mm, i)) - ret->low_slices |= 1u << i; - -- if (mm->task_size <= SLICE_LOW_TOP) -+ if (mm->context.addr_limit <= SLICE_LOW_TOP) - return; - - for (i = 0; i < GET_HIGH_SLICE_INDEX(mm->context.addr_limit); i++) -@@ -412,25 +412,31 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len, - struct slice_mask compat_mask; - int fixed = (flags & MAP_FIXED); - int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT); -+ unsigned long page_size = 1UL << pshift; - struct mm_struct *mm = current->mm; - unsigned long newaddr; - unsigned long high_limit; - -- /* -- * Check if we need to expland slice area. -- */ -- if (unlikely(addr >= mm->context.addr_limit && -- mm->context.addr_limit != TASK_SIZE)) { -- mm->context.addr_limit = TASK_SIZE; -+ high_limit = DEFAULT_MAP_WINDOW; -+ if (addr >= high_limit) -+ high_limit = TASK_SIZE; -+ -+ if (len > high_limit) -+ return -ENOMEM; -+ if (len & (page_size - 1)) -+ return -EINVAL; -+ if (fixed) { -+ if (addr & (page_size - 1)) -+ return -EINVAL; -+ if (addr > high_limit - len) -+ return -ENOMEM; -+ } -+ -+ if (high_limit > mm->context.addr_limit) { -+ mm->context.addr_limit = high_limit; - on_each_cpu(slice_flush_segments, mm, 1); - } -- /* -- * This mmap request can allocate upt to 512TB -- */ -- if (addr >= DEFAULT_MAP_WINDOW) -- high_limit = mm->context.addr_limit; -- else -- high_limit = DEFAULT_MAP_WINDOW; -+ - /* - * init different masks - */ -@@ -446,27 +452,19 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len, - - /* Sanity checks */ - BUG_ON(mm->task_size == 0); -+ BUG_ON(mm->context.addr_limit == 0); - VM_BUG_ON(radix_enabled()); - - slice_dbg("slice_get_unmapped_area(mm=%p, psize=%d...\n", mm, psize); - slice_dbg(" addr=%lx, len=%lx, flags=%lx, topdown=%d\n", - addr, len, flags, topdown); - -- if (len > mm->task_size) -- return -ENOMEM; -- if (len & ((1ul << pshift) - 1)) -- return -EINVAL; -- if (fixed && (addr & ((1ul << pshift) - 1))) -- return -EINVAL; -- if (fixed && addr > (mm->task_size - len)) -- return -ENOMEM; -- - /* If hint, make sure it matches our alignment restrictions */ - if (!fixed && addr) { -- addr = _ALIGN_UP(addr, 1ul << pshift); -+ addr = _ALIGN_UP(addr, page_size); - slice_dbg(" aligned addr=%lx\n", addr); - /* Ignore hint if it's too large or overlaps a VMA */ -- if (addr > mm->task_size - len || -+ if (addr > high_limit - len || - !slice_area_is_free(mm, addr, len)) - addr = 0; - } --- -2.14.3 - diff --git a/0004-platform-x86-intel_cht_int33fe-Set-supplied-from-pro.patch b/0004-platform-x86-intel_cht_int33fe-Set-supplied-from-pro.patch deleted file mode 100644 index 342a48c..0000000 --- a/0004-platform-x86-intel_cht_int33fe-Set-supplied-from-pro.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 99c44df299d96db6a170ccce9b8108fc2e7f8bae Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Tue, 2 May 2017 13:40:44 +0200 -Subject: [PATCH 04/16] platform/x86: intel_cht_int33fe: Set supplied-from - property on max17047 dev - -Devices with the intel_cht_int33fe ACPI device use a max17047 fuel-gauge -combined with a bq24272i charger, in order for the fuel-gauge driver to -correctly display charging / discharging status it needs to know which -charger is supplying the battery. - -This commit sets the supplied-from device property to the name of the -bq24272i charger for this. - -Signed-off-by: Hans de Goede ---- - drivers/platform/x86/intel_cht_int33fe.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/platform/x86/intel_cht_int33fe.c b/drivers/platform/x86/intel_cht_int33fe.c -index 6a1b2ca5b6fe..da706e2c4232 100644 ---- a/drivers/platform/x86/intel_cht_int33fe.c -+++ b/drivers/platform/x86/intel_cht_int33fe.c -@@ -34,6 +34,13 @@ struct cht_int33fe_data { - struct i2c_client *pi3usb30532; - }; - -+static const char * const max17047_suppliers[] = { "bq24190-charger" }; -+ -+static const struct property_entry max17047_props[] = { -+ PROPERTY_ENTRY_STRING_ARRAY("supplied-from", max17047_suppliers), -+ { } -+}; -+ - static int cht_int33fe_probe(struct i2c_client *client) - { - struct device *dev = &client->dev; -@@ -70,6 +77,7 @@ static int cht_int33fe_probe(struct i2c_client *client) - - memset(&board_info, 0, sizeof(board_info)); - strlcpy(board_info.type, "max17047", I2C_NAME_SIZE); -+ board_info.properties = max17047_props; - - data->max17047 = i2c_acpi_new_device(dev, 1, &board_info); - if (!data->max17047) --- -2.13.0 - diff --git a/0004-powerpc-64s-hash-Fix-fork-with-512TB-process-address.patch b/0004-powerpc-64s-hash-Fix-fork-with-512TB-process-address.patch deleted file mode 100644 index 75d9d32..0000000 --- a/0004-powerpc-64s-hash-Fix-fork-with-512TB-process-address.patch +++ /dev/null @@ -1,48 +0,0 @@ -From fe50aa4374f20333d9b077bbe09397d38112b081 Mon Sep 17 00:00:00 2001 -From: Nicholas Piggin -Date: Tue, 28 Nov 2017 11:26:57 +0100 -Subject: [PATCH 4/5] powerpc/64s/hash: Fix fork() with 512TB process address - space - -commit effc1b25088502fbd30305c79773de2d1f7470a6 upstream. - -Hash unconditionally resets the addr_limit to default (128TB) when the -mm context is initialised. If a process has > 128TB mappings when it -forks, the child will not get the 512TB addr_limit, so accesses to -valid > 128TB mappings will fail in the child. - -Fix this by only resetting the addr_limit to default if it was 0. Non -zero indicates it was duplicated from the parent (0 means exec()). - -Fixes: f4ea6dcb08ea ("powerpc/mm: Enable mappings above 128TB") -Signed-off-by: Nicholas Piggin -Reviewed-by: Aneesh Kumar K.V -Signed-off-by: Michael Ellerman -Signed-off-by: Greg Kroah-Hartman ---- - arch/powerpc/mm/mmu_context_book3s64.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/arch/powerpc/mm/mmu_context_book3s64.c b/arch/powerpc/mm/mmu_context_book3s64.c -index a75f63833284..bb9cdf01fc4f 100644 ---- a/arch/powerpc/mm/mmu_context_book3s64.c -+++ b/arch/powerpc/mm/mmu_context_book3s64.c -@@ -95,11 +95,11 @@ static int hash__init_new_context(struct mm_struct *mm) - return index; - - /* -- * We do switch_slb() early in fork, even before we setup the -- * mm->context.addr_limit. Default to max task size so that we copy the -- * default values to paca which will help us to handle slb miss early. -+ * In the case of exec, use the default limit, -+ * otherwise inherit it from the mm we are duplicating. - */ -- mm->context.addr_limit = DEFAULT_MAP_WINDOW_USER64; -+ if (!mm->context.addr_limit) -+ mm->context.addr_limit = DEFAULT_MAP_WINDOW_USER64; - - /* - * The old code would re-promote on fork, we don't do that when using --- -2.14.3 - diff --git a/0005-ACPI-PMIC-xpower-Add-support-for-the-GPI1-regulator-.patch b/0005-ACPI-PMIC-xpower-Add-support-for-the-GPI1-regulator-.patch deleted file mode 100644 index c6f299c..0000000 --- a/0005-ACPI-PMIC-xpower-Add-support-for-the-GPI1-regulator-.patch +++ /dev/null @@ -1,80 +0,0 @@ -From cc2b0e2c164d02ab42efa736f91f53baf8d8bc36 Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Thu, 20 Apr 2017 22:41:20 +0200 -Subject: [PATCH 05/16] ACPI / PMIC: xpower: Add support for the GPI1 regulator - to the OpRegion handler - -Some Bay Trail devices use a GPI1 regulator field (address 0x4c) in -their 0x8d power OpRegion, add support for this. - -This fixes AE_BAD_PARAMETER errors getting thrown on these devices and -fixes these errors causing these devices to not suspend. - -Signed-off-by: Hans de Goede -Reviewed-by: Andy Shevchenko ---- -Changes in v2: --Simplify reg == 0x92 handling (suggested by Andy Shevchenko) --Add special handling for reg == 0x92 to intel_xpower_pmic_get_power() too -Changes in v3: --Use defines for GPI1 reg and bits, rather then hardcoded hex values ---- - drivers/acpi/pmic/intel_pmic_xpower.c | 21 ++++++++++++++++++++- - 1 file changed, 20 insertions(+), 1 deletion(-) - -diff --git a/drivers/acpi/pmic/intel_pmic_xpower.c b/drivers/acpi/pmic/intel_pmic_xpower.c -index 1a76c784cd4c..3b7d5be5b7ed 100644 ---- a/drivers/acpi/pmic/intel_pmic_xpower.c -+++ b/drivers/acpi/pmic/intel_pmic_xpower.c -@@ -21,6 +21,11 @@ - #include "intel_pmic.h" - - #define XPOWER_GPADC_LOW 0x5b -+#define XPOWER_GPI1_CTRL 0x92 -+ -+#define GPI1_LDO_MASK GENMASK(2, 0) -+#define GPI1_LDO_ON (3 << 0) -+#define GPI1_LDO_OFF (4 << 0) - - static struct pmic_table power_table[] = { - { -@@ -118,6 +123,10 @@ static struct pmic_table power_table[] = { - .reg = 0x10, - .bit = 0x00 - }, /* BUC6 */ -+ { -+ .address = 0x4c, -+ .reg = 0x92, -+ }, /* GPI1 */ - }; - - /* TMP0 - TMP5 are the same, all from GPADC */ -@@ -156,7 +165,12 @@ static int intel_xpower_pmic_get_power(struct regmap *regmap, int reg, - if (regmap_read(regmap, reg, &data)) - return -EIO; - -- *value = (data & BIT(bit)) ? 1 : 0; -+ /* GPIO1 LDO regulator needs special handling */ -+ if (reg == XPOWER_GPI1_CTRL) -+ *value = ((data & GPI1_LDO_MASK) == GPI1_LDO_ON); -+ else -+ *value = (data & BIT(bit)) ? 1 : 0; -+ - return 0; - } - -@@ -165,6 +179,11 @@ static int intel_xpower_pmic_update_power(struct regmap *regmap, int reg, - { - int data; - -+ /* GPIO1 LDO regulator needs special handling */ -+ if (reg == XPOWER_GPI1_CTRL) -+ return regmap_update_bits(regmap, reg, GPI1_LDO_MASK, -+ on ? GPI1_LDO_ON : GPI1_LDO_OFF); -+ - if (regmap_read(regmap, reg, &data)) - return -EIO; - --- -2.13.0 - diff --git a/0005-powerpc-64s-hash-Allow-MAP_FIXED-allocations-to-cros.patch b/0005-powerpc-64s-hash-Allow-MAP_FIXED-allocations-to-cros.patch deleted file mode 100644 index e7e9a4a..0000000 --- a/0005-powerpc-64s-hash-Allow-MAP_FIXED-allocations-to-cros.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 2beb551e379191c2a24e7db8c4fcc64fef4b921a Mon Sep 17 00:00:00 2001 -From: Nicholas Piggin -Date: Tue, 28 Nov 2017 11:26:58 +0100 -Subject: [PATCH 5/5] powerpc/64s/hash: Allow MAP_FIXED allocations to cross - 128TB boundary - -commit 35602f82d0c765f991420e319c8d3a596c921eb8 upstream. - -While mapping hints with a length that cross 128TB are disallowed, -MAP_FIXED allocations that cross 128TB are allowed. These are failing -on hash (on radix they succeed). Add an additional case for fixed -mappings to expand the addr_limit when crossing 128TB. - -Fixes: f4ea6dcb08ea ("powerpc/mm: Enable mappings above 128TB") -Signed-off-by: Nicholas Piggin -Reviewed-by: Aneesh Kumar K.V -Signed-off-by: Michael Ellerman -Signed-off-by: Greg Kroah-Hartman ---- - arch/powerpc/mm/slice.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c -index 3889201b560c..a4f93699194b 100644 ---- a/arch/powerpc/mm/slice.c -+++ b/arch/powerpc/mm/slice.c -@@ -418,7 +418,7 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len, - unsigned long high_limit; - - high_limit = DEFAULT_MAP_WINDOW; -- if (addr >= high_limit) -+ if (addr >= high_limit || (fixed && (addr + len > high_limit))) - high_limit = TASK_SIZE; - - if (len > high_limit) --- -2.14.3 - diff --git a/0006-Input-axp20x-pek-Add-wakeup-support.patch b/0006-Input-axp20x-pek-Add-wakeup-support.patch deleted file mode 100644 index 1ec9659..0000000 --- a/0006-Input-axp20x-pek-Add-wakeup-support.patch +++ /dev/null @@ -1,67 +0,0 @@ -From fbac4c05ec1d7c2d949f50baf1e934cbfbb6a494 Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Mon, 17 Apr 2017 22:06:25 +0200 -Subject: [PATCH 06/16] Input: axp20x-pek - Add wakeup support - -At least on devices with the AXP288 PMIC the device is expected to -wakeup from suspend when the power-button gets pressed, add support -for this. - -Signed-off-by: Hans de Goede ---- - drivers/input/misc/axp20x-pek.c | 28 ++++++++++++++++++++++++++++ - 1 file changed, 28 insertions(+) - -diff --git a/drivers/input/misc/axp20x-pek.c b/drivers/input/misc/axp20x-pek.c -index 400869e61a06..5f16fceaae83 100644 ---- a/drivers/input/misc/axp20x-pek.c -+++ b/drivers/input/misc/axp20x-pek.c -@@ -253,6 +253,9 @@ static int axp20x_pek_probe_input_device(struct axp20x_pek *axp20x_pek, - return error; - } - -+ if (axp20x_pek->axp20x->variant == AXP288_ID) -+ enable_irq_wake(axp20x_pek->irq_dbr); -+ - return 0; - } - -@@ -331,10 +334,35 @@ static int axp20x_pek_probe(struct platform_device *pdev) - return 0; - } - -+static int __maybe_unused axp20x_pek_resume_noirq(struct device *dev) -+{ -+ struct axp20x_pek *axp20x_pek = dev_get_drvdata(dev); -+ -+ if (axp20x_pek->axp20x->variant != AXP288_ID) -+ return 0; -+ -+ /* -+ * Clear interrupts from button presses during suspend, to avoid -+ * a wakeup power-button press getting reported to userspace. -+ */ -+ regmap_write(axp20x_pek->axp20x->regmap, -+ AXP20X_IRQ1_STATE + AXP288_IRQ_POKN / 8, -+ BIT(AXP288_IRQ_POKN % 8)); -+ -+ return 0; -+} -+ -+const struct dev_pm_ops axp20x_pek_pm_ops = { -+#ifdef CONFIG_PM_SLEEP -+ .resume_noirq = axp20x_pek_resume_noirq, -+#endif -+}; -+ - static struct platform_driver axp20x_pek_driver = { - .probe = axp20x_pek_probe, - .driver = { - .name = "axp20x-pek", -+ .pm = &axp20x_pek_pm_ops, - }, - }; - module_platform_driver(axp20x_pek_driver); --- -2.13.0 - diff --git a/0007-platform-x86-silead_dmi-Add-touchscreen-info-for-GP-.patch b/0007-platform-x86-silead_dmi-Add-touchscreen-info-for-GP-.patch deleted file mode 100644 index 0b76334..0000000 --- a/0007-platform-x86-silead_dmi-Add-touchscreen-info-for-GP-.patch +++ /dev/null @@ -1,56 +0,0 @@ -From d95c127c48ef784214671359a41ac505ac30098a Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Sun, 7 May 2017 12:32:11 +0200 -Subject: [PATCH 07/16] platform/x86: silead_dmi: Add touchscreen info for - GP-electronic T701 - -Add touchscreen info for the GP-electronic T701 tablet. - -Signed-off-by: Hans de Goede ---- - drivers/platform/x86/silead_dmi.c | 22 ++++++++++++++++++++++ - 1 file changed, 22 insertions(+) - -diff --git a/drivers/platform/x86/silead_dmi.c b/drivers/platform/x86/silead_dmi.c -index a3a57d93cf06..db3a877d2160 100644 ---- a/drivers/platform/x86/silead_dmi.c -+++ b/drivers/platform/x86/silead_dmi.c -@@ -80,6 +80,19 @@ static const struct silead_ts_dmi_data surftab_wintron70_st70416_6_data = { - .properties = surftab_wintron70_st70416_6_props, - }; - -+static const struct property_entry gp_electronic_t701_props[] = { -+ PROPERTY_ENTRY_U32("touchscreen-size-x", 960), -+ PROPERTY_ENTRY_U32("touchscreen-size-y", 640), -+ PROPERTY_ENTRY_STRING("firmware-name", -+ "gsl1680-gp-electronic-t701.fw"), -+ { } -+}; -+ -+static const struct silead_ts_dmi_data gp_electronic_t701_data = { -+ .acpi_name = "MSSL1680:00", -+ .properties = gp_electronic_t701_props, -+}; -+ - static const struct dmi_system_id silead_ts_dmi_table[] = { - { - /* CUBE iwork8 Air */ -@@ -117,6 +130,15 @@ static const struct dmi_system_id silead_ts_dmi_table[] = { - DMI_MATCH(DMI_BIOS_VERSION, "TREK.G.WI71C.JGBMRBA04"), - }, - }, -+ { -+ /* GP-electronic T701 */ -+ .driver_data = (void *)&gp_electronic_t701_data, -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "Insyde"), -+ DMI_MATCH(DMI_PRODUCT_NAME, "T701"), -+ DMI_MATCH(DMI_BIOS_VERSION, "BYT70A.YNCHENG.WIN.007"), -+ }, -+ }, - { }, - }; - --- -2.13.0 - diff --git a/0008-platform-x86-silead_dmi-Add-touchscreen-info-for-PoV.patch b/0008-platform-x86-silead_dmi-Add-touchscreen-info-for-PoV.patch deleted file mode 100644 index 975deb8..0000000 --- a/0008-platform-x86-silead_dmi-Add-touchscreen-info-for-PoV.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 55b347c61b2850d1e11e159ab02dc71f13b06481 Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Sun, 11 Jun 2017 17:42:31 +0200 -Subject: [PATCH 08/16] platform/x86: silead_dmi: Add touchscreen info for PoV - mobii wintab p800w - -Add touchscreen info for the Point of View mobii wintab p800w tablet. - -Signed-off-by: Hans de Goede ---- - drivers/platform/x86/silead_dmi.c | 25 +++++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - -diff --git a/drivers/platform/x86/silead_dmi.c b/drivers/platform/x86/silead_dmi.c -index db3a877d2160..46c5e1ebfb53 100644 ---- a/drivers/platform/x86/silead_dmi.c -+++ b/drivers/platform/x86/silead_dmi.c -@@ -93,6 +93,20 @@ static const struct silead_ts_dmi_data gp_electronic_t701_data = { - .properties = gp_electronic_t701_props, - }; - -+static const struct property_entry pov_mobii_wintab_p800w_props[] = { -+ PROPERTY_ENTRY_U32("touchscreen-size-x", 1800), -+ PROPERTY_ENTRY_U32("touchscreen-size-y", 1150), -+ PROPERTY_ENTRY_BOOL("touchscreen-swapped-x-y"), -+ PROPERTY_ENTRY_STRING("firmware-name", -+ "gsl3692-pov-mobii-wintab-p800w.fw"), -+ { } -+}; -+ -+static const struct silead_ts_dmi_data pov_mobii_wintab_p800w_data = { -+ .acpi_name = "MSSL1680:00", -+ .properties = pov_mobii_wintab_p800w_props, -+}; -+ - static const struct dmi_system_id silead_ts_dmi_table[] = { - { - /* CUBE iwork8 Air */ -@@ -139,6 +153,17 @@ static const struct dmi_system_id silead_ts_dmi_table[] = { - DMI_MATCH(DMI_BIOS_VERSION, "BYT70A.YNCHENG.WIN.007"), - }, - }, -+ { -+ /* Point of View mobii wintab p800w */ -+ .driver_data = (void *)&pov_mobii_wintab_p800w_data, -+ .matches = { -+ DMI_MATCH(DMI_BOARD_VENDOR, "AMI Corporation"), -+ DMI_MATCH(DMI_BOARD_NAME, "Aptio CRB"), -+ DMI_MATCH(DMI_BIOS_VERSION, "3BAIR1013"), -+ /* Above matches are too generic, add bios-date match */ -+ DMI_MATCH(DMI_BIOS_DATE, "08/22/2014"), -+ }, -+ }, - { }, - }; - --- -2.13.0 - diff --git a/0009-platform-x86-silead_dmi-Add-touchscreen-info-for-Pip.patch b/0009-platform-x86-silead_dmi-Add-touchscreen-info-for-Pip.patch deleted file mode 100644 index 0770395..0000000 --- a/0009-platform-x86-silead_dmi-Add-touchscreen-info-for-Pip.patch +++ /dev/null @@ -1,57 +0,0 @@ -From b239a7a0c2a1435aa5cbab3f233e0c37e82943dd Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Tue, 13 Jun 2017 18:17:07 +0200 -Subject: [PATCH 09/16] platform/x86: silead_dmi: Add touchscreen info for Pipo - W2S tablet - -Add touchscreen info for Pipo W2S tablet. - -Signed-off-by: Hans de Goede ---- - drivers/platform/x86/silead_dmi.c | 23 +++++++++++++++++++++++ - 1 file changed, 23 insertions(+) - -diff --git a/drivers/platform/x86/silead_dmi.c b/drivers/platform/x86/silead_dmi.c -index 46c5e1ebfb53..25cbea307a5e 100644 ---- a/drivers/platform/x86/silead_dmi.c -+++ b/drivers/platform/x86/silead_dmi.c -@@ -107,6 +107,21 @@ static const struct silead_ts_dmi_data pov_mobii_wintab_p800w_data = { - .properties = pov_mobii_wintab_p800w_props, - }; - -+static const struct property_entry pipo_w2s_props[] = { -+ PROPERTY_ENTRY_U32("touchscreen-size-x", 1660), -+ PROPERTY_ENTRY_U32("touchscreen-size-y", 880), -+ PROPERTY_ENTRY_BOOL("touchscreen-inverted-x"), -+ PROPERTY_ENTRY_BOOL("touchscreen-swapped-x-y"), -+ PROPERTY_ENTRY_STRING("firmware-name", -+ "gsl1680-pipo-w2s.fw"), -+ { } -+}; -+ -+static const struct silead_ts_dmi_data pipo_w2s_data = { -+ .acpi_name = "MSSL1680:00", -+ .properties = pipo_w2s_props, -+}; -+ - static const struct dmi_system_id silead_ts_dmi_table[] = { - { - /* CUBE iwork8 Air */ -@@ -164,6 +179,14 @@ static const struct dmi_system_id silead_ts_dmi_table[] = { - DMI_MATCH(DMI_BIOS_DATE, "08/22/2014"), - }, - }, -+ { -+ /* Pipo W2S */ -+ .driver_data = (void *)&pipo_w2s_data, -+ .matches = { -+ DMI_MATCH(DMI_SYS_VENDOR, "PIPO"), -+ DMI_MATCH(DMI_PRODUCT_NAME, "W2S"), -+ }, -+ }, - { }, - }; - --- -2.13.0 - diff --git a/0011-Input-goodix-Add-support-for-capacitive-home-button.patch b/0011-Input-goodix-Add-support-for-capacitive-home-button.patch deleted file mode 100644 index 162357c..0000000 --- a/0011-Input-goodix-Add-support-for-capacitive-home-button.patch +++ /dev/null @@ -1,53 +0,0 @@ -From 2a99775c336303d2efc43eab4f24b34722a28faa Mon Sep 17 00:00:00 2001 -From: "Sergei A. Trusov" -Date: Tue, 20 Jun 2017 18:08:35 +0200 -Subject: [PATCH 11/16] Input: goodix: Add support for capacitive home button - -On some x86 tablets with a Goodix touchscreen, the Windows logo on the -front is a capacitive home button. Touching this button results in a touch -with bit 4 of the first byte set, while only the lower 4 bits (0-3) are -used to indicate the number of touches. - -Report a KEY_LEFTMETA press when this happens. - -Note that the hardware might support more than one button, in which -case the "id" byte of coor_data would identify the button in question. -This is not implemented as we don't have access to hardware with -multiple buttons. - -Signed-off-by: Sergei A. Trusov -Acked-by: Bastien Nocera ---- - drivers/input/touchscreen/goodix.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - -diff --git a/drivers/input/touchscreen/goodix.c b/drivers/input/touchscreen/goodix.c -index 240b16f3ee97..903137d9cf7d 100644 ---- a/drivers/input/touchscreen/goodix.c -+++ b/drivers/input/touchscreen/goodix.c -@@ -267,6 +267,12 @@ static void goodix_process_events(struct goodix_ts_data *ts) - if (touch_num < 0) - return; - -+ /* -+ * Bit 4 of the first byte reports the status of the capacitive -+ * Windows/Home button. -+ */ -+ input_report_key(ts->input_dev, KEY_LEFTMETA, !!(point_data[0] & BIT(4))); -+ - for (i = 0; i < touch_num; i++) - goodix_ts_report_touch(ts, - &point_data[1 + GOODIX_CONTACT_SIZE * i]); -@@ -612,6 +618,9 @@ static int goodix_request_input_dev(struct goodix_ts_data *ts) - ts->input_dev->id.product = ts->id; - ts->input_dev->id.version = ts->version; - -+ /* Capacitive Windows/Home button on some devices */ -+ input_set_capability(ts->input_dev, EV_KEY, KEY_LEFTMETA); -+ - error = input_register_device(ts->input_dev); - if (error) { - dev_err(&ts->client->dev, --- -2.13.0 - diff --git a/0012-Input-gpio_keys-Do-not-report-wake-button-presses-as.patch b/0012-Input-gpio_keys-Do-not-report-wake-button-presses-as.patch deleted file mode 100644 index 9b52e39..0000000 --- a/0012-Input-gpio_keys-Do-not-report-wake-button-presses-as.patch +++ /dev/null @@ -1,150 +0,0 @@ -From 02b823a4d28ffb5fde5192799abd934d9de95630 Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Fri, 6 Jan 2017 20:08:11 +0100 -Subject: [PATCH 12/16] Input: gpio_keys - Do not report wake button presses as - evdev events - -If a button is a wake button, it may still be bouncing from the press -to wakeup the device by the time the gpio interrupts get enabled again -and / or the gpio_keys_report_state call from gpio_keys_resume may -find the button still pressed and report this as a new press. - -This is undesirable, esp. since the powerbutton on tablets is typically -a wakeup source and uses the gpio_keys driver on some tablets, leading -to userspace immediately re-suspending the tablet after the powerbutton -is pressed, due to it seeing a powerbutton press. - -This commit ignores wakeup button presses for the first 1 second after -resume (and while resumed, as the workqueue may run before the resume -function runs), avoiding this problem. - -Signed-off-by: Hans de Goede ---- -Note: maybe we should make WAKE_DEBOUNCE part of gpio_keys_button and -only do this when drivers / platform-data set this to a non-zero value ? ---- - drivers/input/keyboard/gpio_keys.c | 49 ++++++++++++++++++++++++++++++++++++-- - 1 file changed, 47 insertions(+), 2 deletions(-) - -diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c -index da3d362f21b1..e1488b534e7d 100644 ---- a/drivers/input/keyboard/gpio_keys.c -+++ b/drivers/input/keyboard/gpio_keys.c -@@ -31,6 +31,8 @@ - #include - #include - -+#define WAKE_DEBOUNCE msecs_to_jiffies(1000) -+ - struct gpio_button_data { - const struct gpio_keys_button *button; - struct input_dev *input; -@@ -44,10 +46,14 @@ struct gpio_button_data { - struct delayed_work work; - unsigned int software_debounce; /* in msecs, for GPIO-driven buttons */ - -+ unsigned long resume_time; /* in jiffies, for wakeup buttons */ -+ - unsigned int irq; - spinlock_t lock; - bool disabled; - bool key_pressed; -+ bool suspended; -+ bool resume_time_valid; - }; - - struct gpio_keys_drvdata { -@@ -356,6 +362,27 @@ static struct attribute_group gpio_keys_attr_group = { - .attrs = gpio_keys_attrs, - }; - -+static bool gpio_keys_ignore_wakeup_button_press(struct gpio_button_data *bdata) -+{ -+ unsigned long flags; -+ bool ret = false; -+ -+ if (!bdata->button->wakeup) -+ return ret; -+ -+ spin_lock_irqsave(&bdata->lock, flags); -+ -+ if (bdata->suspended) -+ ret = true; /* Our resume method did not run yet */ -+ else if (bdata->resume_time_valid && -+ time_before(jiffies, bdata->resume_time + WAKE_DEBOUNCE)) -+ ret = true; /* Assume this is a wakeup press and ignore */ -+ -+ spin_unlock_irqrestore(&bdata->lock, flags); -+ -+ return ret; -+} -+ - static void gpio_keys_gpio_report_event(struct gpio_button_data *bdata) - { - const struct gpio_keys_button *button = bdata->button; -@@ -370,6 +397,9 @@ static void gpio_keys_gpio_report_event(struct gpio_button_data *bdata) - return; - } - -+ if (state && gpio_keys_ignore_wakeup_button_press(bdata)) -+ return; -+ - if (type == EV_ABS) { - if (state) - input_event(input, type, button->code, button->value); -@@ -429,6 +459,9 @@ static irqreturn_t gpio_keys_irq_isr(int irq, void *dev_id) - - BUG_ON(irq != bdata->irq); - -+ if (gpio_keys_ignore_wakeup_button_press(bdata)) -+ return IRQ_HANDLED; -+ - spin_lock_irqsave(&bdata->lock, flags); - - if (!bdata->key_pressed) { -@@ -848,13 +881,18 @@ static int __maybe_unused gpio_keys_suspend(struct device *dev) - { - struct gpio_keys_drvdata *ddata = dev_get_drvdata(dev); - struct input_dev *input = ddata->input; -+ unsigned long flags; - int i; - - if (device_may_wakeup(dev)) { - for (i = 0; i < ddata->pdata->nbuttons; i++) { - struct gpio_button_data *bdata = &ddata->data[i]; -- if (bdata->button->wakeup) -+ if (bdata->button->wakeup) { -+ spin_lock_irqsave(&bdata->lock, flags); -+ bdata->suspended = true; -+ spin_unlock_irqrestore(&bdata->lock, flags); - enable_irq_wake(bdata->irq); -+ } - } - } else { - mutex_lock(&input->mutex); -@@ -870,14 +908,21 @@ static int __maybe_unused gpio_keys_resume(struct device *dev) - { - struct gpio_keys_drvdata *ddata = dev_get_drvdata(dev); - struct input_dev *input = ddata->input; -+ unsigned long flags; - int error = 0; - int i; - - if (device_may_wakeup(dev)) { - for (i = 0; i < ddata->pdata->nbuttons; i++) { - struct gpio_button_data *bdata = &ddata->data[i]; -- if (bdata->button->wakeup) -+ if (bdata->button->wakeup) { - disable_irq_wake(bdata->irq); -+ spin_lock_irqsave(&bdata->lock, flags); -+ bdata->resume_time = jiffies; -+ bdata->resume_time_valid = true; -+ bdata->suspended = false; -+ spin_unlock_irqrestore(&bdata->lock, flags); -+ } - } - } else { - mutex_lock(&input->mutex); --- -2.13.0 - diff --git a/0013-iio-accel-bmc150-Add-support-for-BOSC0200-ACPI-devic.patch b/0013-iio-accel-bmc150-Add-support-for-BOSC0200-ACPI-devic.patch deleted file mode 100644 index 8eb41ee..0000000 --- a/0013-iio-accel-bmc150-Add-support-for-BOSC0200-ACPI-devic.patch +++ /dev/null @@ -1,32 +0,0 @@ -From bf3e9581e10a19b2ce77a45fe001116d269b4c7f Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Sun, 18 Jun 2017 12:47:38 +0200 -Subject: [PATCH 13/16] iio: accel: bmc150: Add support for BOSC0200 ACPI - device id - -Add support for the BOSC0200 ACPI device id used on some x86 tablets. -note driver_data is not set to a specific model, driver_data is not -used anyways (instead detection is done on the chip_id reg) and the -2 tablets with a BOSC0200 ACPI device id I've have 2 different chips, -one has a BMA250E, the other a BMA222E. - -Signed-off-by: Hans de Goede ---- - drivers/iio/accel/bmc150-accel-i2c.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/iio/accel/bmc150-accel-i2c.c b/drivers/iio/accel/bmc150-accel-i2c.c -index 8ca8041267ef..f85014fbaa12 100644 ---- a/drivers/iio/accel/bmc150-accel-i2c.c -+++ b/drivers/iio/accel/bmc150-accel-i2c.c -@@ -64,6 +64,7 @@ static const struct acpi_device_id bmc150_accel_acpi_match[] = { - {"BMA250E", bma250e}, - {"BMA222E", bma222e}, - {"BMA0280", bma280}, -+ {"BOSC0200"}, - { }, - }; - MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match); --- -2.13.0 - diff --git a/0014-mmc-sdhci-acpi-Workaround-conflict-with-PCI-wifi-on-.patch b/0014-mmc-sdhci-acpi-Workaround-conflict-with-PCI-wifi-on-.patch deleted file mode 100644 index b5c717c..0000000 --- a/0014-mmc-sdhci-acpi-Workaround-conflict-with-PCI-wifi-on-.patch +++ /dev/null @@ -1,143 +0,0 @@ -From 51eb7454942c68c84b82782e47637de3ba37f113 Mon Sep 17 00:00:00 2001 -From: Adrian Hunter -Date: Wed, 21 Jun 2017 15:08:39 +0300 -Subject: [PATCH 14/16] mmc: sdhci-acpi: Workaround conflict with PCI wifi on - GPD Win handheld - -GPDwin uses PCI wifi which conflicts with SDIO's use of -acpi_device_fix_up_power() on child device nodes. Specifically -acpi_device_fix_up_power() causes the wifi module to get turned off. -Identifying GPDwin is problematic, but since SDIO is only used for wifi, -the presence of the PCI wifi card in the expected slot with an ACPI -companion node, is used to indicate that acpi_device_fix_up_power() should -be avoided. - -Signed-off-by: Adrian Hunter -Acked-by: Hans de Goede -Tested-by: Hans de Goede -Cc: stable@vger.kernel.org ---- - drivers/mmc/host/sdhci-acpi.c | 70 +++++++++++++++++++++++++++++++++++++++---- - 1 file changed, 64 insertions(+), 6 deletions(-) - -diff --git a/drivers/mmc/host/sdhci-acpi.c b/drivers/mmc/host/sdhci-acpi.c -index c6a9a1bfaa22..b3fb155f50e4 100644 ---- a/drivers/mmc/host/sdhci-acpi.c -+++ b/drivers/mmc/host/sdhci-acpi.c -@@ -45,6 +45,7 @@ - #include - #include - #include -+#include - #endif - - #include "sdhci.h" -@@ -134,6 +135,16 @@ static bool sdhci_acpi_byt(void) - return x86_match_cpu(byt); - } - -+static bool sdhci_acpi_cht(void) -+{ -+ static const struct x86_cpu_id cht[] = { -+ { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT }, -+ {} -+ }; -+ -+ return x86_match_cpu(cht); -+} -+ - #define BYT_IOSF_SCCEP 0x63 - #define BYT_IOSF_OCP_NETCTRL0 0x1078 - #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8) -@@ -178,6 +189,45 @@ static bool sdhci_acpi_byt_defer(struct device *dev) - return false; - } - -+static bool sdhci_acpi_cht_pci_wifi(unsigned int vendor, unsigned int device, -+ unsigned int slot, unsigned int parent_slot) -+{ -+ struct pci_dev *dev, *parent, *from = NULL; -+ -+ while (1) { -+ dev = pci_get_device(vendor, device, from); -+ pci_dev_put(from); -+ if (!dev) -+ break; -+ parent = pci_upstream_bridge(dev); -+ if (ACPI_COMPANION(&dev->dev) && PCI_SLOT(dev->devfn) == slot && -+ parent && PCI_SLOT(parent->devfn) == parent_slot && -+ !pci_upstream_bridge(parent)) { -+ pci_dev_put(dev); -+ return true; -+ } -+ from = dev; -+ } -+ -+ return false; -+} -+ -+/* -+ * GPDwin uses PCI wifi which conflicts with SDIO's use of -+ * acpi_device_fix_up_power() on child device nodes. Identifying GPDwin is -+ * problematic, but since SDIO is only used for wifi, the presence of the PCI -+ * wifi card in the expected slot with an ACPI companion node, is used to -+ * indicate that acpi_device_fix_up_power() should be avoided. -+ */ -+static inline bool sdhci_acpi_no_fixup_child_power(const char *hid, -+ const char *uid) -+{ -+ return sdhci_acpi_cht() && -+ !strcmp(hid, "80860F14") && -+ !strcmp(uid, "2") && -+ sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28); -+} -+ - #else - - static inline void sdhci_acpi_byt_setting(struct device *dev) -@@ -189,6 +239,12 @@ static inline bool sdhci_acpi_byt_defer(struct device *dev) - return false; - } - -+static inline bool sdhci_acpi_no_fixup_child_power(const char *hid, -+ const char *uid) -+{ -+ return false; -+} -+ - #endif - - static int bxt_get_cd(struct mmc_host *mmc) -@@ -390,11 +446,16 @@ static int sdhci_acpi_probe(struct platform_device *pdev) - if (acpi_bus_get_device(handle, &device)) - return -ENODEV; - -+ hid = acpi_device_hid(device); -+ uid = device->pnp.unique_id; -+ - /* Power on the SDHCI controller and its children */ - acpi_device_fix_up_power(device); -- list_for_each_entry(child, &device->children, node) -- if (child->status.present && child->status.enabled) -- acpi_device_fix_up_power(child); -+ if (!sdhci_acpi_no_fixup_child_power(hid, uid)) { -+ list_for_each_entry(child, &device->children, node) -+ if (child->status.present && child->status.enabled) -+ acpi_device_fix_up_power(child); -+ } - - if (acpi_bus_get_status(device) || !device->status.present) - return -ENODEV; -@@ -402,9 +463,6 @@ static int sdhci_acpi_probe(struct platform_device *pdev) - if (sdhci_acpi_byt_defer(dev)) - return -EPROBE_DEFER; - -- hid = acpi_device_hid(device); -- uid = device->pnp.unique_id; -- - iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!iomem) - return -ENOMEM; --- -2.13.0 - diff --git a/0015-i2c-cht-wc-Add-Intel-Cherry-Trail-Whiskey-Cove-SMBUS.patch b/0015-i2c-cht-wc-Add-Intel-Cherry-Trail-Whiskey-Cove-SMBUS.patch deleted file mode 100644 index 5d7497c..0000000 --- a/0015-i2c-cht-wc-Add-Intel-Cherry-Trail-Whiskey-Cove-SMBUS.patch +++ /dev/null @@ -1,410 +0,0 @@ -From bd0d7169342e47919f68e75d659968f02b62f84b Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Fri, 3 Mar 2017 23:48:50 +0100 -Subject: [PATCH 15/16] i2c-cht-wc: Add Intel Cherry Trail Whiskey Cove SMBUS - controller driver - -The Intel Cherry Trail Whiskey Cove PMIC does not contain a builtin -battery charger, instead boards with this PMIC use an external TI -bq24292i charger IC, which is connected to a SMBUS controller built into -the PMIC. - -This commit adds an i2c-bus driver for the PMIC's builtin SMBUS -controller. The probe function for this i2c-bus will also register an -i2c-client for the TI bq24292i charger after the i2c-bus has been -registered. - -Note that several device-properties are set on the client-device to -tell the bq24190 power-supply driver to integrate the Whiskey Cove PMIC -and e.g. use the PMIC's BC1.2 detection (through extcon) to determine -the maximum input current. - -Cc: Andy Shevchenko -Signed-off-by: Hans de Goede ---- -Changes in v2: --Various style (mostly captialization and variable name) fixes --Use device-properties instead of platform_data for the i2c_board_info ---- - drivers/i2c/busses/Kconfig | 8 + - drivers/i2c/busses/Makefile | 1 + - drivers/i2c/busses/i2c-cht-wc.c | 336 ++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 345 insertions(+) - create mode 100644 drivers/i2c/busses/i2c-cht-wc.c - -diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig -index 144cbadc7c72..18c96178b177 100644 ---- a/drivers/i2c/busses/Kconfig -+++ b/drivers/i2c/busses/Kconfig -@@ -187,6 +187,14 @@ config I2C_PIIX4 - This driver can also be built as a module. If so, the module - will be called i2c-piix4. - -+config I2C_CHT_WC -+ tristate "Intel Cherry Trail Whiskey Cove PMIC smbus controller" -+ depends on INTEL_SOC_PMIC_CHTWC -+ help -+ If you say yes to this option, support will be included for the -+ SMBus controller found in the Intel Cherry Trail Whiskey Cove PMIC -+ found on some Intel Cherry Trail systems. -+ - config I2C_NFORCE2 - tristate "Nvidia nForce2, nForce3 and nForce4" - depends on PCI -diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile -index 30b60855fbcd..f6443fa44f61 100644 ---- a/drivers/i2c/busses/Makefile -+++ b/drivers/i2c/busses/Makefile -@@ -12,6 +12,7 @@ obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o - obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o - obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o - obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o -+obj-$(CONFIG_I2C_CHT_WC) += i2c-cht-wc.o - obj-$(CONFIG_I2C_I801) += i2c-i801.o - obj-$(CONFIG_I2C_ISCH) += i2c-isch.o - obj-$(CONFIG_I2C_ISMT) += i2c-ismt.o -diff --git a/drivers/i2c/busses/i2c-cht-wc.c b/drivers/i2c/busses/i2c-cht-wc.c -new file mode 100644 -index 000000000000..ccf0785bcb75 ---- /dev/null -+++ b/drivers/i2c/busses/i2c-cht-wc.c -@@ -0,0 +1,336 @@ -+/* -+ * Intel CHT Whiskey Cove PMIC I2C Master driver -+ * Copyright (C) 2017 Hans de Goede -+ * -+ * Based on various non upstream patches to support the CHT Whiskey Cove PMIC: -+ * Copyright (C) 2011 - 2014 Intel Corporation. All rights reserved. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License version -+ * 2 as published by the Free Software Foundation. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define CHT_WC_I2C_CTRL 0x5e24 -+#define CHT_WC_I2C_CTRL_WR BIT(0) -+#define CHT_WC_I2C_CTRL_RD BIT(1) -+#define CHT_WC_I2C_CLIENT_ADDR 0x5e25 -+#define CHT_WC_I2C_REG_OFFSET 0x5e26 -+#define CHT_WC_I2C_WRDATA 0x5e27 -+#define CHT_WC_I2C_RDDATA 0x5e28 -+ -+#define CHT_WC_EXTCHGRIRQ 0x6e0a -+#define CHT_WC_EXTCHGRIRQ_CLIENT_IRQ BIT(0) -+#define CHT_WC_EXTCHGRIRQ_WRITE_IRQ BIT(1) -+#define CHT_WC_EXTCHGRIRQ_READ_IRQ BIT(2) -+#define CHT_WC_EXTCHGRIRQ_NACK_IRQ BIT(3) -+#define CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK ((u8)GENMASK(3, 1)) -+#define CHT_WC_EXTCHGRIRQ_MSK 0x6e17 -+ -+struct cht_wc_i2c_adap { -+ struct i2c_adapter adapter; -+ wait_queue_head_t wait; -+ struct irq_chip irqchip; -+ struct mutex irqchip_lock; -+ struct regmap *regmap; -+ struct irq_domain *irq_domain; -+ struct i2c_client *client; -+ int client_irq; -+ u8 irq_mask; -+ u8 old_irq_mask; -+ bool nack; -+ bool done; -+}; -+ -+static irqreturn_t cht_wc_i2c_adap_thread_handler(int id, void *data) -+{ -+ struct cht_wc_i2c_adap *adap = data; -+ int ret, reg; -+ -+ /* Read IRQs */ -+ ret = regmap_read(adap->regmap, CHT_WC_EXTCHGRIRQ, ®); -+ if (ret) { -+ dev_err(&adap->adapter.dev, "Error reading extchgrirq reg\n"); -+ return IRQ_NONE; -+ } -+ -+ reg &= ~adap->irq_mask; -+ -+ /* -+ * Immediately ack IRQs, so that if new IRQs arrives while we're -+ * handling the previous ones our irq will re-trigger when we're done. -+ */ -+ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, reg); -+ if (ret) -+ dev_err(&adap->adapter.dev, "Error writing extchgrirq reg\n"); -+ -+ /* -+ * Do NOT use handle_nested_irq here, the client irq handler will -+ * likely want to do i2c transfers and the i2c controller uses this -+ * interrupt handler as well, so running the client irq handler from -+ * this thread will cause things to lock up. -+ */ -+ if (reg & CHT_WC_EXTCHGRIRQ_CLIENT_IRQ) { -+ /* -+ * generic_handle_irq expects local IRQs to be disabled -+ * as normally it is called from interrupt context. -+ */ -+ local_irq_disable(); -+ generic_handle_irq(adap->client_irq); -+ local_irq_enable(); -+ } -+ -+ if (reg & CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK) { -+ adap->nack = !!(reg & CHT_WC_EXTCHGRIRQ_NACK_IRQ); -+ adap->done = true; -+ wake_up(&adap->wait); -+ } -+ -+ return IRQ_HANDLED; -+} -+ -+static u32 cht_wc_i2c_adap_master_func(struct i2c_adapter *adap) -+{ -+ /* This i2c adapter only supports SMBUS byte transfers */ -+ return I2C_FUNC_SMBUS_BYTE_DATA; -+} -+ -+static int cht_wc_i2c_adap_smbus_xfer(struct i2c_adapter *_adap, u16 addr, -+ unsigned short flags, char read_write, -+ u8 command, int size, -+ union i2c_smbus_data *data) -+{ -+ struct cht_wc_i2c_adap *adap = i2c_get_adapdata(_adap); -+ int ret, reg; -+ -+ adap->nack = false; -+ adap->done = false; -+ -+ ret = regmap_write(adap->regmap, CHT_WC_I2C_CLIENT_ADDR, addr); -+ if (ret) -+ return ret; -+ -+ if (read_write == I2C_SMBUS_WRITE) { -+ ret = regmap_write(adap->regmap, CHT_WC_I2C_WRDATA, data->byte); -+ if (ret) -+ return ret; -+ } -+ -+ ret = regmap_write(adap->regmap, CHT_WC_I2C_REG_OFFSET, command); -+ if (ret) -+ return ret; -+ -+ ret = regmap_write(adap->regmap, CHT_WC_I2C_CTRL, -+ (read_write == I2C_SMBUS_WRITE) ? -+ CHT_WC_I2C_CTRL_WR : CHT_WC_I2C_CTRL_RD); -+ if (ret) -+ return ret; -+ -+ /* 3 second timeout, during cable plug the PMIC responds quite slow */ -+ ret = wait_event_timeout(adap->wait, adap->done, 3 * HZ); -+ if (ret == 0) -+ return -ETIMEDOUT; -+ if (adap->nack) -+ return -EIO; -+ -+ if (read_write == I2C_SMBUS_READ) { -+ ret = regmap_read(adap->regmap, CHT_WC_I2C_RDDATA, ®); -+ if (ret) -+ return ret; -+ -+ data->byte = reg; -+ } -+ -+ return 0; -+} -+ -+static const struct i2c_algorithm cht_wc_i2c_adap_algo = { -+ .functionality = cht_wc_i2c_adap_master_func, -+ .smbus_xfer = cht_wc_i2c_adap_smbus_xfer, -+}; -+ -+/**** irqchip for the client connected to the extchgr i2c adapter ****/ -+static void cht_wc_i2c_irq_lock(struct irq_data *data) -+{ -+ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data); -+ -+ mutex_lock(&adap->irqchip_lock); -+} -+ -+static void cht_wc_i2c_irq_sync_unlock(struct irq_data *data) -+{ -+ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data); -+ int ret; -+ -+ if (adap->irq_mask != adap->old_irq_mask) { -+ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, -+ adap->irq_mask); -+ if (ret == 0) -+ adap->old_irq_mask = adap->irq_mask; -+ else -+ dev_err(&adap->adapter.dev, "Error writing EXTCHGRIRQ_MSK\n"); -+ } -+ -+ mutex_unlock(&adap->irqchip_lock); -+} -+ -+static void cht_wc_i2c_irq_enable(struct irq_data *data) -+{ -+ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data); -+ -+ adap->irq_mask &= ~CHT_WC_EXTCHGRIRQ_CLIENT_IRQ; -+} -+ -+static void cht_wc_i2c_irq_disable(struct irq_data *data) -+{ -+ struct cht_wc_i2c_adap *adap = irq_data_get_irq_chip_data(data); -+ -+ adap->irq_mask |= CHT_WC_EXTCHGRIRQ_CLIENT_IRQ; -+} -+ -+static const struct irq_chip cht_wc_i2c_irq_chip = { -+ .irq_bus_lock = cht_wc_i2c_irq_lock, -+ .irq_bus_sync_unlock = cht_wc_i2c_irq_sync_unlock, -+ .irq_disable = cht_wc_i2c_irq_disable, -+ .irq_enable = cht_wc_i2c_irq_enable, -+ .name = "cht_wc_ext_chrg_irq_chip", -+}; -+ -+static const struct property_entry bq24190_props[] = { -+ PROPERTY_ENTRY_STRING("extcon-name", "cht_wcove_pwrsrc"), -+ PROPERTY_ENTRY_BOOL("omit-battery-class"), -+ PROPERTY_ENTRY_BOOL("disable-reset"), -+ { } -+}; -+ -+static int cht_wc_i2c_adap_i2c_probe(struct platform_device *pdev) -+{ -+ struct intel_soc_pmic *pmic = dev_get_drvdata(pdev->dev.parent); -+ struct cht_wc_i2c_adap *adap; -+ struct i2c_board_info board_info = { -+ .type = "bq24190", -+ .addr = 0x6b, -+ .properties = bq24190_props, -+ }; -+ int ret, irq; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) { -+ dev_err(&pdev->dev, "Error missing irq resource\n"); -+ return -EINVAL; -+ } -+ -+ adap = devm_kzalloc(&pdev->dev, sizeof(*adap), GFP_KERNEL); -+ if (!adap) -+ return -ENOMEM; -+ -+ init_waitqueue_head(&adap->wait); -+ mutex_init(&adap->irqchip_lock); -+ adap->irqchip = cht_wc_i2c_irq_chip; -+ adap->regmap = pmic->regmap; -+ adap->adapter.owner = THIS_MODULE; -+ adap->adapter.class = I2C_CLASS_HWMON; -+ adap->adapter.algo = &cht_wc_i2c_adap_algo; -+ strlcpy(adap->adapter.name, "PMIC I2C Adapter", -+ sizeof(adap->adapter.name)); -+ adap->adapter.dev.parent = &pdev->dev; -+ -+ /* Clear and activate i2c-adapter interrupts, disable client IRQ */ -+ adap->old_irq_mask = adap->irq_mask = ~CHT_WC_EXTCHGRIRQ_ADAP_IRQMASK; -+ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ, ~adap->irq_mask); -+ if (ret) -+ return ret; -+ -+ ret = regmap_write(adap->regmap, CHT_WC_EXTCHGRIRQ_MSK, adap->irq_mask); -+ if (ret) -+ return ret; -+ -+ /* Alloc and register client IRQ */ -+ adap->irq_domain = irq_domain_add_linear(pdev->dev.of_node, 1, -+ &irq_domain_simple_ops, NULL); -+ if (!adap->irq_domain) -+ return -ENOMEM; -+ -+ adap->client_irq = irq_create_mapping(adap->irq_domain, 0); -+ if (!adap->client_irq) { -+ ret = -ENOMEM; -+ goto remove_irq_domain; -+ } -+ -+ irq_set_chip_data(adap->client_irq, adap); -+ irq_set_chip_and_handler(adap->client_irq, &adap->irqchip, -+ handle_simple_irq); -+ -+ ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, -+ cht_wc_i2c_adap_thread_handler, -+ IRQF_ONESHOT, "PMIC I2C Adapter", adap); -+ if (ret) -+ goto remove_irq_domain; -+ -+ i2c_set_adapdata(&adap->adapter, adap); -+ ret = i2c_add_adapter(&adap->adapter); -+ if (ret) -+ goto remove_irq_domain; -+ -+ board_info.irq = adap->client_irq; -+ adap->client = i2c_new_device(&adap->adapter, &board_info); -+ if (!adap->client) { -+ ret = -ENOMEM; -+ goto del_adapter; -+ } -+ -+ platform_set_drvdata(pdev, adap); -+ return 0; -+ -+del_adapter: -+ i2c_del_adapter(&adap->adapter); -+remove_irq_domain: -+ irq_domain_remove(adap->irq_domain); -+ return ret; -+} -+ -+static int cht_wc_i2c_adap_i2c_remove(struct platform_device *pdev) -+{ -+ struct cht_wc_i2c_adap *adap = platform_get_drvdata(pdev); -+ -+ i2c_unregister_device(adap->client); -+ i2c_del_adapter(&adap->adapter); -+ irq_domain_remove(adap->irq_domain); -+ -+ return 0; -+} -+ -+static struct platform_device_id cht_wc_i2c_adap_id_table[] = { -+ { .name = "cht_wcove_ext_chgr" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(platform, cht_wc_i2c_adap_id_table); -+ -+struct platform_driver cht_wc_i2c_adap_driver = { -+ .probe = cht_wc_i2c_adap_i2c_probe, -+ .remove = cht_wc_i2c_adap_i2c_remove, -+ .driver = { -+ .name = "cht_wcove_ext_chgr", -+ }, -+ .id_table = cht_wc_i2c_adap_id_table, -+}; -+module_platform_driver(cht_wc_i2c_adap_driver); -+ -+MODULE_DESCRIPTION("Intel CHT Whiskey Cove PMIC I2C Master driver"); -+MODULE_AUTHOR("Hans de Goede "); -+MODULE_LICENSE("GPL"); --- -2.13.0 - diff --git a/0016-Input-silead-Do-not-try-to-directly-access-the-GPIO-.patch b/0016-Input-silead-Do-not-try-to-directly-access-the-GPIO-.patch deleted file mode 100644 index 14b4c27..0000000 --- a/0016-Input-silead-Do-not-try-to-directly-access-the-GPIO-.patch +++ /dev/null @@ -1,54 +0,0 @@ -From fd4fb1f6633b21042ff084868323e15e708fe1cd Mon Sep 17 00:00:00 2001 -From: Hans de Goede -Date: Sun, 1 Jan 2017 22:11:20 +0100 -Subject: [PATCH 16/16] Input: silead: Do not try to directly access the GPIO - when using ACPI pm - -On some x86 tablets we cannot directly access the GPIOs as they are -claimed by the ACPI tables, so check it the i2c client is not being -power-managed by ACPI before trying to get the power pin GPIO. - -Note this is a workaround patch to fix this until Andy' gpiolib-ACPI -patches which make gpiolib more strict land, once those are landed this -patch is no longer needed. - -Signed-off-by: Hans de Goede ---- - drivers/input/touchscreen/silead.c | 22 ++++++++++++++++------ - 1 file changed, 16 insertions(+), 6 deletions(-) - -diff --git a/drivers/input/touchscreen/silead.c b/drivers/input/touchscreen/silead.c -index c0ba40c09699..30fba3cbe277 100644 ---- a/drivers/input/touchscreen/silead.c -+++ b/drivers/input/touchscreen/silead.c -@@ -517,12 +518,21 @@ static int silead_ts_probe(struct i2c_client *client, - if (error) - return error; - -- /* Power GPIO pin */ -- data->gpio_power = devm_gpiod_get_optional(dev, "power", GPIOD_OUT_LOW); -- if (IS_ERR(data->gpio_power)) { -- if (PTR_ERR(data->gpio_power) != -EPROBE_DEFER) -- dev_err(dev, "Shutdown GPIO request failed\n"); -- return PTR_ERR(data->gpio_power); -+ /* -+ * If device power is not managed by ACPI, get the power_gpio -+ * and manage it ourselves. -+ */ -+#ifdef CONFIG_ACPI -+ if (!acpi_bus_power_manageable(ACPI_HANDLE(dev))) -+#endif -+ { -+ data->gpio_power = devm_gpiod_get_optional(dev, "power", -+ GPIOD_OUT_LOW); -+ if (IS_ERR(data->gpio_power)) { -+ if (PTR_ERR(data->gpio_power) != -EPROBE_DEFER) -+ dev_err(dev, "Power GPIO request failed\n"); -+ return PTR_ERR(data->gpio_power); -+ } - } - - error = silead_ts_setup(client); --- -2.13.0 - diff --git a/1-2-kvm-vmx-Reinstate-support-for-CPUs-without-virtual-NMI.patch b/1-2-kvm-vmx-Reinstate-support-for-CPUs-without-virtual-NMI.patch deleted file mode 100644 index ca079af..0000000 --- a/1-2-kvm-vmx-Reinstate-support-for-CPUs-without-virtual-NMI.patch +++ /dev/null @@ -1,296 +0,0 @@ -From patchwork Mon Nov 6 12:31:12 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/2] kvm: vmx: Reinstate support for CPUs without virtual NMI -From: Paolo Bonzini -X-Patchwork-Id: 10043403 -Message-Id: <1509971473-74491-2-git-send-email-pbonzini@redhat.com> -To: linux-kernel@vger.kernel.org, kvm@vger.kernel.org -Cc: rkrcmar@redhat.com, stable@vger.kernel.org -Date: Mon, 6 Nov 2017 13:31:12 +0100 - -This is more or less a revert of commit 2c82878b0cb3 ("KVM: VMX: require -virtual NMI support", 2017-03-27); it turns out that Core 2 Duo machines -only had virtual NMIs in some SKUs. - -The revert is not trivial because in the meanwhile there have been several -fixes to nested NMI injection. Therefore, the entire vNMI state is moved -to struct loaded_vmcs. - -Another change compared to before the patch is a simplification here: - - if (unlikely(!cpu_has_virtual_nmis() && vmx->soft_vnmi_blocked && - !(is_guest_mode(vcpu) && nested_cpu_has_virtual_nmis( - get_vmcs12(vcpu))))) { - -The final condition here is always true (because nested_cpu_has_virtual_nmis -is always false) and is removed. - -Fixes: 2c82878b0cb38fd516fd612c67852a6bbf282003 -Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1490803 -Cc: stable@vger.kernel.org -Signed-off-by: Paolo Bonzini ---- - arch/x86/kvm/vmx.c | 150 +++++++++++++++++++++++++++++++++++++---------------- - 1 file changed, 106 insertions(+), 44 deletions(-) - -diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c -index e6c8ffa84968..d6b3b12ae1e2 100644 ---- a/arch/x86/kvm/vmx.c -+++ b/arch/x86/kvm/vmx.c -@@ -202,6 +202,10 @@ struct loaded_vmcs { - bool nmi_known_unmasked; - unsigned long vmcs_host_cr3; /* May not match real cr3 */ - unsigned long vmcs_host_cr4; /* May not match real cr4 */ -+ /* Support for vnmi-less CPUs */ -+ int soft_vnmi_blocked; -+ ktime_t entry_time; -+ s64 vnmi_blocked_time; - struct list_head loaded_vmcss_on_cpu_link; - }; - -@@ -1291,6 +1295,11 @@ static inline bool cpu_has_vmx_invpcid(void) - SECONDARY_EXEC_ENABLE_INVPCID; - } - -+static inline bool cpu_has_virtual_nmis(void) -+{ -+ return vmcs_config.pin_based_exec_ctrl & PIN_BASED_VIRTUAL_NMIS; -+} -+ - static inline bool cpu_has_vmx_wbinvd_exit(void) - { - return vmcs_config.cpu_based_2nd_exec_ctrl & -@@ -1348,11 +1357,6 @@ static inline bool nested_cpu_has2(struct vmcs12 *vmcs12, u32 bit) - (vmcs12->secondary_vm_exec_control & bit); - } - --static inline bool nested_cpu_has_virtual_nmis(struct vmcs12 *vmcs12) --{ -- return vmcs12->pin_based_vm_exec_control & PIN_BASED_VIRTUAL_NMIS; --} -- - static inline bool nested_cpu_has_preemption_timer(struct vmcs12 *vmcs12) - { - return vmcs12->pin_based_vm_exec_control & -@@ -3712,9 +3716,9 @@ static __init int setup_vmcs_config(struct vmcs_config *vmcs_conf) - &_vmexit_control) < 0) - return -EIO; - -- min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING | -- PIN_BASED_VIRTUAL_NMIS; -- opt = PIN_BASED_POSTED_INTR | PIN_BASED_VMX_PREEMPTION_TIMER; -+ min = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING; -+ opt = PIN_BASED_VIRTUAL_NMIS | PIN_BASED_POSTED_INTR | -+ PIN_BASED_VMX_PREEMPTION_TIMER; - if (adjust_vmx_controls(min, opt, MSR_IA32_VMX_PINBASED_CTLS, - &_pin_based_exec_control) < 0) - return -EIO; -@@ -5669,7 +5673,8 @@ static void enable_irq_window(struct kvm_vcpu *vcpu) - - static void enable_nmi_window(struct kvm_vcpu *vcpu) - { -- if (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & GUEST_INTR_STATE_STI) { -+ if (!cpu_has_virtual_nmis() || -+ vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & GUEST_INTR_STATE_STI) { - enable_irq_window(vcpu); - return; - } -@@ -5709,6 +5714,19 @@ static void vmx_inject_nmi(struct kvm_vcpu *vcpu) - { - struct vcpu_vmx *vmx = to_vmx(vcpu); - -+ if (!cpu_has_virtual_nmis()) { -+ /* -+ * Tracking the NMI-blocked state in software is built upon -+ * finding the next open IRQ window. This, in turn, depends on -+ * well-behaving guests: They have to keep IRQs disabled at -+ * least as long as the NMI handler runs. Otherwise we may -+ * cause NMI nesting, maybe breaking the guest. But as this is -+ * highly unlikely, we can live with the residual risk. -+ */ -+ vmx->loaded_vmcs->soft_vnmi_blocked = 1; -+ vmx->loaded_vmcs->vnmi_blocked_time = 0; -+ } -+ - ++vcpu->stat.nmi_injections; - vmx->loaded_vmcs->nmi_known_unmasked = false; - -@@ -5727,6 +5745,8 @@ static bool vmx_get_nmi_mask(struct kvm_vcpu *vcpu) - struct vcpu_vmx *vmx = to_vmx(vcpu); - bool masked; - -+ if (!cpu_has_virtual_nmis()) -+ return vmx->loaded_vmcs->soft_vnmi_blocked; - if (vmx->loaded_vmcs->nmi_known_unmasked) - return false; - masked = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & GUEST_INTR_STATE_NMI; -@@ -5738,13 +5758,20 @@ static void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked) - { - struct vcpu_vmx *vmx = to_vmx(vcpu); - -- vmx->loaded_vmcs->nmi_known_unmasked = !masked; -- if (masked) -- vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO, -- GUEST_INTR_STATE_NMI); -- else -- vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO, -- GUEST_INTR_STATE_NMI); -+ if (!cpu_has_virtual_nmis()) { -+ if (vmx->loaded_vmcs->soft_vnmi_blocked != masked) { -+ vmx->loaded_vmcs->soft_vnmi_blocked = masked; -+ vmx->loaded_vmcs->vnmi_blocked_time = 0; -+ } -+ } else { -+ vmx->loaded_vmcs->nmi_known_unmasked = !masked; -+ if (masked) -+ vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO, -+ GUEST_INTR_STATE_NMI); -+ else -+ vmcs_clear_bits(GUEST_INTERRUPTIBILITY_INFO, -+ GUEST_INTR_STATE_NMI); -+ } - } - - static int vmx_nmi_allowed(struct kvm_vcpu *vcpu) -@@ -5752,6 +5779,10 @@ static int vmx_nmi_allowed(struct kvm_vcpu *vcpu) - if (to_vmx(vcpu)->nested.nested_run_pending) - return 0; - -+ if (!cpu_has_virtual_nmis() && -+ to_vmx(vcpu)->loaded_vmcs->soft_vnmi_blocked) -+ return 0; -+ - return !(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & - (GUEST_INTR_STATE_MOV_SS | GUEST_INTR_STATE_STI - | GUEST_INTR_STATE_NMI)); -@@ -6479,6 +6510,7 @@ static int handle_ept_violation(struct kvm_vcpu *vcpu) - * AAK134, BY25. - */ - if (!(to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && -+ cpu_has_virtual_nmis() && - (exit_qualification & INTR_INFO_UNBLOCK_NMI)) - vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO, GUEST_INTR_STATE_NMI); - -@@ -6965,7 +6997,7 @@ static struct loaded_vmcs *nested_get_current_vmcs02(struct vcpu_vmx *vmx) - } - - /* Create a new VMCS */ -- item = kmalloc(sizeof(struct vmcs02_list), GFP_KERNEL); -+ item = kzalloc(sizeof(struct vmcs02_list), GFP_KERNEL); - if (!item) - return NULL; - item->vmcs02.vmcs = alloc_vmcs(); -@@ -7982,6 +8014,7 @@ static int handle_pml_full(struct kvm_vcpu *vcpu) - * "blocked by NMI" bit has to be set before next VM entry. - */ - if (!(to_vmx(vcpu)->idt_vectoring_info & VECTORING_INFO_VALID_MASK) && -+ cpu_has_virtual_nmis() && - (exit_qualification & INTR_INFO_UNBLOCK_NMI)) - vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO, - GUEST_INTR_STATE_NMI); -@@ -8826,6 +8859,25 @@ static int vmx_handle_exit(struct kvm_vcpu *vcpu) - return 0; - } - -+ if (unlikely(!cpu_has_virtual_nmis() && -+ vmx->loaded_vmcs->soft_vnmi_blocked)) { -+ if (vmx_interrupt_allowed(vcpu)) { -+ vmx->loaded_vmcs->soft_vnmi_blocked = 0; -+ } else if (vmx->loaded_vmcs->vnmi_blocked_time > 1000000000LL && -+ vcpu->arch.nmi_pending) { -+ /* -+ * This CPU don't support us in finding the end of an -+ * NMI-blocked window if the guest runs with IRQs -+ * disabled. So we pull the trigger after 1 s of -+ * futile waiting, but inform the user about this. -+ */ -+ printk(KERN_WARNING "%s: Breaking out of NMI-blocked " -+ "state on VCPU %d after 1 s timeout\n", -+ __func__, vcpu->vcpu_id); -+ vmx->loaded_vmcs->soft_vnmi_blocked = 0; -+ } -+ } -+ - if (exit_reason < kvm_vmx_max_exit_handlers - && kvm_vmx_exit_handlers[exit_reason]) - return kvm_vmx_exit_handlers[exit_reason](vcpu); -@@ -9108,33 +9160,38 @@ static void vmx_recover_nmi_blocking(struct vcpu_vmx *vmx) - - idtv_info_valid = vmx->idt_vectoring_info & VECTORING_INFO_VALID_MASK; - -- if (vmx->loaded_vmcs->nmi_known_unmasked) -- return; -- /* -- * Can't use vmx->exit_intr_info since we're not sure what -- * the exit reason is. -- */ -- exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO); -- unblock_nmi = (exit_intr_info & INTR_INFO_UNBLOCK_NMI) != 0; -- vector = exit_intr_info & INTR_INFO_VECTOR_MASK; -- /* -- * SDM 3: 27.7.1.2 (September 2008) -- * Re-set bit "block by NMI" before VM entry if vmexit caused by -- * a guest IRET fault. -- * SDM 3: 23.2.2 (September 2008) -- * Bit 12 is undefined in any of the following cases: -- * If the VM exit sets the valid bit in the IDT-vectoring -- * information field. -- * If the VM exit is due to a double fault. -- */ -- if ((exit_intr_info & INTR_INFO_VALID_MASK) && unblock_nmi && -- vector != DF_VECTOR && !idtv_info_valid) -- vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO, -- GUEST_INTR_STATE_NMI); -- else -- vmx->loaded_vmcs->nmi_known_unmasked = -- !(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) -- & GUEST_INTR_STATE_NMI); -+ if (cpu_has_virtual_nmis()) { -+ if (vmx->loaded_vmcs->nmi_known_unmasked) -+ return; -+ /* -+ * Can't use vmx->exit_intr_info since we're not sure what -+ * the exit reason is. -+ */ -+ exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO); -+ unblock_nmi = (exit_intr_info & INTR_INFO_UNBLOCK_NMI) != 0; -+ vector = exit_intr_info & INTR_INFO_VECTOR_MASK; -+ /* -+ * SDM 3: 27.7.1.2 (September 2008) -+ * Re-set bit "block by NMI" before VM entry if vmexit caused by -+ * a guest IRET fault. -+ * SDM 3: 23.2.2 (September 2008) -+ * Bit 12 is undefined in any of the following cases: -+ * If the VM exit sets the valid bit in the IDT-vectoring -+ * information field. -+ * If the VM exit is due to a double fault. -+ */ -+ if ((exit_intr_info & INTR_INFO_VALID_MASK) && unblock_nmi && -+ vector != DF_VECTOR && !idtv_info_valid) -+ vmcs_set_bits(GUEST_INTERRUPTIBILITY_INFO, -+ GUEST_INTR_STATE_NMI); -+ else -+ vmx->loaded_vmcs->nmi_known_unmasked = -+ !(vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) -+ & GUEST_INTR_STATE_NMI); -+ } else if (unlikely(vmx->loaded_vmcs->soft_vnmi_blocked)) -+ vmx->loaded_vmcs->vnmi_blocked_time += -+ ktime_to_ns(ktime_sub(ktime_get(), -+ vmx->loaded_vmcs->entry_time)); - } - - static void __vmx_complete_interrupts(struct kvm_vcpu *vcpu, -@@ -9251,6 +9308,11 @@ static void __noclone vmx_vcpu_run(struct kvm_vcpu *vcpu) - struct vcpu_vmx *vmx = to_vmx(vcpu); - unsigned long debugctlmsr, cr3, cr4; - -+ /* Record the guest's net vcpu time for enforced NMI injections. */ -+ if (unlikely(!cpu_has_virtual_nmis() && -+ vmx->loaded_vmcs->soft_vnmi_blocked)) -+ vmx->loaded_vmcs->entry_time = ktime_get(); -+ - /* Don't enter VMX if guest state is invalid, let the exit handler - start emulation until we arrive back to a valid state */ - if (vmx->emulation_required) diff --git a/1-3-net-set-tb--fast_sk_family.patch b/1-3-net-set-tb--fast_sk_family.patch deleted file mode 100644 index dbe5250..0000000 --- a/1-3-net-set-tb--fast_sk_family.patch +++ /dev/null @@ -1,50 +0,0 @@ -From patchwork Mon Sep 18 16:28:55 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/3] net: set tb->fast_sk_family -X-Patchwork-Submitter: Josef Bacik -X-Patchwork-Id: 815031 -X-Patchwork-Delegate: davem@davemloft.net -Message-Id: <1505752137-15522-2-git-send-email-jbacik@fb.com> -To: davem@davemloft.net, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, crobinso@redhat.com, - labbott@redhat.com, kernel-team@fb.com -Cc: Josef Bacik , stable@vger.kernel.org -Date: Mon, 18 Sep 2017 12:28:55 -0400 -From: josef@toxicpanda.com -List-Id: - -From: Josef Bacik - -We need to set the tb->fast_sk_family properly so we can use the proper -comparison function for all subsequent reuseport bind requests. - -Cc: stable@vger.kernel.org -Fixes: 637bc8bbe6c0 ("inet: reset tb->fastreuseport when adding a reuseport sk") -Reported-and-tested-by: Cole Robinson -Signed-off-by: Josef Bacik ---- - net/ipv4/inet_connection_sock.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/net/ipv4/inet_connection_sock.c b/net/ipv4/inet_connection_sock.c -index b9c64b40a83a..f87f4805e244 100644 ---- a/net/ipv4/inet_connection_sock.c -+++ b/net/ipv4/inet_connection_sock.c -@@ -328,6 +328,7 @@ int inet_csk_get_port(struct sock *sk, unsigned short snum) - tb->fastuid = uid; - tb->fast_rcv_saddr = sk->sk_rcv_saddr; - tb->fast_ipv6_only = ipv6_only_sock(sk); -+ tb->fast_sk_family = sk->sk_family; - #if IS_ENABLED(CONFIG_IPV6) - tb->fast_v6_rcv_saddr = sk->sk_v6_rcv_saddr; - #endif -@@ -354,6 +355,7 @@ int inet_csk_get_port(struct sock *sk, unsigned short snum) - tb->fastuid = uid; - tb->fast_rcv_saddr = sk->sk_rcv_saddr; - tb->fast_ipv6_only = ipv6_only_sock(sk); -+ tb->fast_sk_family = sk->sk_family; - #if IS_ENABLED(CONFIG_IPV6) - tb->fast_v6_rcv_saddr = sk->sk_v6_rcv_saddr; - #endif diff --git a/2-3-net-use-inet6_rcv_saddr-to-compare-sockets.patch b/2-3-net-use-inet6_rcv_saddr-to-compare-sockets.patch deleted file mode 100644 index 3d64361..0000000 --- a/2-3-net-use-inet6_rcv_saddr-to-compare-sockets.patch +++ /dev/null @@ -1,44 +0,0 @@ -From patchwork Mon Sep 18 16:28:56 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [2/3] net: use inet6_rcv_saddr to compare sockets -X-Patchwork-Submitter: Josef Bacik -X-Patchwork-Id: 815028 -X-Patchwork-Delegate: davem@davemloft.net -Message-Id: <1505752137-15522-3-git-send-email-jbacik@fb.com> -To: davem@davemloft.net, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, crobinso@redhat.com, - labbott@redhat.com, kernel-team@fb.com -Cc: Josef Bacik , stable@vger.kernel.org -Date: Mon, 18 Sep 2017 12:28:56 -0400 -From: josef@toxicpanda.com -List-Id: - -From: Josef Bacik - -In ipv6_rcv_saddr_equal() we need to use inet6_rcv_saddr(sk) for the -ipv6 compare with the fast socket information to make sure we're doing -the proper comparisons. - -Cc: stable@vger.kernel.org -Fixes: 637bc8bbe6c0 ("inet: reset tb->fastreuseport when adding a reuseport sk") -Reported-and-tested-by: Cole Robinson -Signed-off-by: Josef Bacik ---- - net/ipv4/inet_connection_sock.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/net/ipv4/inet_connection_sock.c b/net/ipv4/inet_connection_sock.c -index f87f4805e244..a1bf30438bc5 100644 ---- a/net/ipv4/inet_connection_sock.c -+++ b/net/ipv4/inet_connection_sock.c -@@ -266,7 +266,7 @@ static inline int sk_reuseport_match(struct inet_bind_bucket *tb, - #if IS_ENABLED(CONFIG_IPV6) - if (tb->fast_sk_family == AF_INET6) - return ipv6_rcv_saddr_equal(&tb->fast_v6_rcv_saddr, -- &sk->sk_v6_rcv_saddr, -+ inet6_rcv_saddr(sk), - tb->fast_rcv_saddr, - sk->sk_rcv_saddr, - tb->fast_ipv6_only, diff --git a/3-3-inet-fix-improper-empty-comparison.patch b/3-3-inet-fix-improper-empty-comparison.patch deleted file mode 100644 index 421a235..0000000 --- a/3-3-inet-fix-improper-empty-comparison.patch +++ /dev/null @@ -1,53 +0,0 @@ -From patchwork Mon Sep 18 16:28:57 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [3/3] inet: fix improper empty comparison -X-Patchwork-Submitter: Josef Bacik -X-Patchwork-Id: 815029 -X-Patchwork-Delegate: davem@davemloft.net -Message-Id: <1505752137-15522-4-git-send-email-jbacik@fb.com> -To: davem@davemloft.net, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, crobinso@redhat.com, - labbott@redhat.com, kernel-team@fb.com -Cc: Josef Bacik , stable@vger.kernel.org -Date: Mon, 18 Sep 2017 12:28:57 -0400 -From: josef@toxicpanda.com -List-Id: - -From: Josef Bacik - -When doing my reuseport rework I screwed up and changed a - -if (hlist_empty(&tb->owners)) - -to - -if (!hlist_empty(&tb->owners)) - -This is obviously bad as all of the reuseport/reuse logic was reversed, -which caused weird problems like allowing an ipv4 bind conflict if we -opened an ipv4 only socket on a port followed by an ipv6 only socket on -the same port. - -Cc: stable@vger.kernel.org -Fixes: b9470c27607b ("inet: kill smallest_size and smallest_port") -Reported-by: Cole Robinson -Signed-off-by: Josef Bacik ---- - net/ipv4/inet_connection_sock.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/net/ipv4/inet_connection_sock.c b/net/ipv4/inet_connection_sock.c -index a1bf30438bc5..c039c937ba90 100644 ---- a/net/ipv4/inet_connection_sock.c -+++ b/net/ipv4/inet_connection_sock.c -@@ -321,7 +321,7 @@ int inet_csk_get_port(struct sock *sk, unsigned short snum) - goto fail_unlock; - } - success: -- if (!hlist_empty(&tb->owners)) { -+ if (hlist_empty(&tb->owners)) { - tb->fastreuse = reuse; - if (sk->sk_reuseport) { - tb->fastreuseport = FASTREUSEPORT_ANY; diff --git a/AllWinner-net-emac.patch b/AllWinner-net-emac.patch deleted file mode 100644 index 591b235..0000000 --- a/AllWinner-net-emac.patch +++ /dev/null @@ -1,2554 +0,0 @@ -From patchwork Mon May 1 12:45:01 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, - 01/20] net: stmmac: export stmmac_set_mac_addr/stmmac_get_mac_addr -From: Corentin LABBE -X-Patchwork-Id: 9706455 -Message-Id: <20170501124520.3769-2-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:01 +0200 - -Thoses symbol will be needed for the dwmac-sun8i ethernet driver. -For letting it to be build as module, they need to be exported. - -Signed-off-by: Corentin Labbe ---- - drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c -index 38f9430..67af0bd 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c -+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c -@@ -248,6 +248,7 @@ void stmmac_set_mac_addr(void __iomem *ioaddr, u8 addr[6], - data = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; - writel(data, ioaddr + low); - } -+EXPORT_SYMBOL_GPL(stmmac_set_mac_addr); - - /* Enable disable MAC RX/TX */ - void stmmac_set_mac(void __iomem *ioaddr, bool enable) -@@ -279,4 +280,4 @@ void stmmac_get_mac_addr(void __iomem *ioaddr, unsigned char *addr, - addr[4] = hi_addr & 0xff; - addr[5] = (hi_addr >> 8) & 0xff; - } -- -+EXPORT_SYMBOL_GPL(stmmac_get_mac_addr); - -From patchwork Mon May 1 12:45:02 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,02/20] net: stmmac: add optional setup function -From: Corentin LABBE -X-Patchwork-Id: 9706501 -Message-Id: <20170501124520.3769-3-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:02 +0200 - -Instead of adding more ifthen logic for adding a new mac_device_info -setup function, it is easier to add a function pointer to the function -needed. - -Signed-off-by: Corentin Labbe ---- - drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 +++- - include/linux/stmmac.h | 1 + - 2 files changed, 4 insertions(+), 1 deletion(-) - -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -index cd8c601..b82ab64 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -3947,7 +3947,9 @@ static int stmmac_hw_init(struct stmmac_priv *priv) - struct mac_device_info *mac; - - /* Identify the MAC HW device */ -- if (priv->plat->has_gmac) { -+ if (priv->plat->setup) { -+ mac = priv->plat->setup(priv); -+ } else if (priv->plat->has_gmac) { - priv->dev->priv_flags |= IFF_UNICAST_FLT; - mac = dwmac1000_setup(priv->ioaddr, - priv->plat->multicast_filter_bins, -diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index 3921cb9..8bb550b 100644 ---- a/include/linux/stmmac.h -+++ b/include/linux/stmmac.h -@@ -177,6 +177,7 @@ struct plat_stmmacenet_data { - void (*fix_mac_speed)(void *priv, unsigned int speed); - int (*init)(struct platform_device *pdev, void *priv); - void (*exit)(struct platform_device *pdev, void *priv); -+ struct mac_device_info *(*setup)(void *priv); - void *bsp_priv; - struct clk *stmmac_clk; - struct clk *pclk; - -From patchwork Mon May 1 12:45:03 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, - 03/20] dt-bindings: net: Add DT bindings documentation for Allwinner - dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9706457 -Message-Id: <20170501124520.3769-4-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:03 +0200 - -This patch adds documentation for Device-Tree bindings for the -Allwinner dwmac-sun8i driver. - -Signed-off-by: Corentin Labbe -Acked-by: Rob Herring ---- - .../devicetree/bindings/net/dwmac-sun8i.txt | 77 ++++++++++++++++++++++ - 1 file changed, 77 insertions(+) - create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt - -diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt -new file mode 100644 -index 0000000..05cd067 ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt -@@ -0,0 +1,77 @@ -+* Allwinner sun8i GMAC ethernet controller -+ -+This device is a platform glue layer for stmmac. -+Please see stmmac.txt for the other unchanged properties. -+ -+Required properties: -+- compatible: should be one of the following string: -+ "allwinner,sun8i-a83t-emac" -+ "allwinner,sun8i-h3-emac" -+ "allwinner,sun50i-a64-emac" -+- reg: address and length of the register for the device. -+- interrupts: interrupt for the device -+- interrupt-names: should be "macirq" -+- clocks: A phandle to the reference clock for this device -+- clock-names: should be "stmmaceth" -+- resets: A phandle to the reset control for this device -+- reset-names: should be "stmmaceth" -+- phy-mode: See ethernet.txt -+- phy-handle: See ethernet.txt -+- #address-cells: shall be 1 -+- #size-cells: shall be 0 -+- syscon: A phandle to the syscon of the SoC with one of the following -+ compatible string: -+ - allwinner,sun8i-h3-system-controller -+ - allwinner,sun50i-a64-system-controller -+ - allwinner,sun8i-a83t-system-controller -+ -+Optional properties: -+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0) -+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0) -+Both delay properties need to be a multiple of 100. -+ -+Optional properties for "allwinner,sun8i-h3-emac": -+- allwinner,leds-active-low: EPHY LEDs are active low -+ -+Required child node of emac: -+- mdio bus node: should be named mdio -+ -+Required properties of the mdio node: -+- #address-cells: shall be 1 -+- #size-cells: shall be 0 -+ -+The device node referenced by "phy" or "phy-handle" should be a child node -+of the mdio node. See phy.txt for the generic PHY bindings. -+ -+Required properties of the phy node with "allwinner,sun8i-h3-emac": -+- clocks: a phandle to the reference clock for the EPHY -+- resets: a phandle to the reset control for the EPHY -+ -+Example: -+ -+emac: ethernet@1c0b000 { -+ compatible = "allwinner,sun8i-h3-emac"; -+ syscon = <&syscon>; -+ reg = <0x01c0b000 0x104>; -+ interrupts = ; -+ interrupt-names = "macirq"; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "stmmaceth"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ phy = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ mdio: mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ int_mii_phy: ethernet-phy@1 { -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; -+ }; -+ }; -+}; - -From patchwork Mon May 1 12:45:04 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, 04/20] dt-bindings: syscon: Add DT bindings documentation for - Allwinner syscon -From: Corentin LABBE -X-Patchwork-Id: 9706469 -Message-Id: <20170501124520.3769-5-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:04 +0200 - -This patch adds documentation for Device-Tree bindings for the -syscon present in allwinner devices. - -Signed-off-by: Corentin Labbe ---- - .../devicetree/bindings/misc/allwinner,syscon.txt | 19 +++++++++++++++++++ - 1 file changed, 19 insertions(+) - create mode 100644 Documentation/devicetree/bindings/misc/allwinner,syscon.txt - -diff --git a/Documentation/devicetree/bindings/misc/allwinner,syscon.txt b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt -new file mode 100644 -index 0000000..cb57691 ---- /dev/null -+++ b/Documentation/devicetree/bindings/misc/allwinner,syscon.txt -@@ -0,0 +1,19 @@ -+* Allwinner sun8i system controller -+ -+This file describes the bindings for the system controller present in -+Allwinner SoC H3, A83T and A64. -+The principal function of this syscon is to control EMAC PHY choice and -+config. -+ -+Required properties for the system controller: -+- reg: address and length of the register for the device. -+- compatible: should be "syscon" and one of the following string: -+ "allwinner,sun8i-h3-system-controller" -+ "allwinner,sun50i-a64-system-controller" -+ "allwinner,sun8i-a83t-system-controller" -+ -+Example: -+syscon: syscon@1c00000 { -+ compatible = "allwinner,sun8i-h3-system-controller", "syscon"; -+ reg = <0x01c00000 0x1000>; -+}; - -From patchwork Mon May 1 12:45:05 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,05/20] net: stmmac: Add dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9706473 -Message-Id: <20170501124520.3769-6-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:05 +0200 - -The dwmac-sun8i is a heavy hacked version of stmmac hardware by -allwinner. -In fact the only common part is the descriptor management and the first -register function. - -Signed-off-by: Corentin Labbe ---- - drivers/net/ethernet/stmicro/stmmac/Kconfig | 11 + - drivers/net/ethernet/stmicro/stmmac/Makefile | 1 + - drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 973 +++++++++++++++++++++ - drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 29 + - .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 9 +- - include/linux/stmmac.h | 1 + - 6 files changed, 1022 insertions(+), 2 deletions(-) - create mode 100644 drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c - -diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig -index cfbe363..85c0e41 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/Kconfig -+++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig -@@ -145,6 +145,17 @@ config DWMAC_SUNXI - This selects Allwinner SoC glue layer support for the - stmmac device driver. This driver is used for A20/A31 - GMAC ethernet controller. -+ -+config DWMAC_SUN8I -+ tristate "Allwinner sun8i GMAC support" -+ default ARCH_SUNXI -+ depends on OF && (ARCH_SUNXI || COMPILE_TEST) -+ ---help--- -+ Support for Allwinner H3 A83T A64 EMAC ethernet controllers. -+ -+ This selects Allwinner SoC glue layer support for the -+ stmmac device driver. This driver is used for H3/A83T/A64 -+ EMAC ethernet controller. - endif - - config STMMAC_PCI -diff --git a/drivers/net/ethernet/stmicro/stmmac/Makefile b/drivers/net/ethernet/stmicro/stmmac/Makefile -index 700c603..fd4937a 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/Makefile -+++ b/drivers/net/ethernet/stmicro/stmmac/Makefile -@@ -16,6 +16,7 @@ obj-$(CONFIG_DWMAC_SOCFPGA) += dwmac-altr-socfpga.o - obj-$(CONFIG_DWMAC_STI) += dwmac-sti.o - obj-$(CONFIG_DWMAC_STM32) += dwmac-stm32.o - obj-$(CONFIG_DWMAC_SUNXI) += dwmac-sunxi.o -+obj-$(CONFIG_DWMAC_SUN8I) += dwmac-sun8i.o - obj-$(CONFIG_DWMAC_DWC_QOS_ETH) += dwmac-dwc-qos-eth.o - obj-$(CONFIG_DWMAC_GENERIC) += dwmac-generic.o - stmmac-platform-objs:= stmmac_platform.o -diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -new file mode 100644 -index 0000000..66eb980 ---- /dev/null -+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -@@ -0,0 +1,973 @@ -+/* -+ * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer -+ * -+ * Copyright (C) 2017 Corentin Labbe -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include "stmmac.h" -+#include "stmmac_platform.h" -+ -+/* General notes on dwmac-sun8i: -+ * Locking: no locking is necessary in this file because all necessary locking -+ * is done in the "stmmac files" -+ */ -+ -+/* struct emac_variant - Descrive dwmac-sun8i hardware variant -+ * @default_syscon_value: The default value of the EMAC register in syscon -+ * This value is used for disabling properly EMAC -+ * and used as a good starting value in case of the -+ * boot process(uboot) leave some stuff. -+ * @internal_phy: Does the MAC embed an internal PHY -+ * @support_mii: Does the MAC handle MII -+ * @support_rmii: Does the MAC handle RMII -+ * @support_rgmii: Does the MAC handle RGMII -+ */ -+struct emac_variant { -+ u32 default_syscon_value; -+ int internal_phy; -+ bool support_mii; -+ bool support_rmii; -+ bool support_rgmii; -+}; -+ -+/* struct sunxi_priv_data - hold all sunxi private data -+ * @tx_clk: reference to MAC TX clock -+ * @ephy_clk: reference to the optional EPHY clock for the internal PHY -+ * @regulator: reference to the optional regulator -+ * @rst_ephy: reference to the optional EPHY reset for the internal PHY -+ * @variant: reference to the current board variant -+ * @regmap: regmap for using the syscon -+ * @use_internal_phy: Does the current PHY choice imply using the internal PHY -+ */ -+struct sunxi_priv_data { -+ struct clk *tx_clk; -+ struct clk *ephy_clk; -+ struct regulator *regulator; -+ struct reset_control *rst_ephy; -+ const struct emac_variant *variant; -+ struct regmap *regmap; -+ bool use_internal_phy; -+}; -+ -+static const struct emac_variant emac_variant_h3 = { -+ .default_syscon_value = 0x58000, -+ .internal_phy = PHY_INTERFACE_MODE_MII, -+ .support_mii = true, -+ .support_rmii = true, -+ .support_rgmii = true -+}; -+ -+static const struct emac_variant emac_variant_a83t = { -+ .default_syscon_value = 0, -+ .internal_phy = 0, -+ .support_mii = true, -+ .support_rgmii = true -+}; -+ -+static const struct emac_variant emac_variant_a64 = { -+ .default_syscon_value = 0, -+ .internal_phy = 0, -+ .support_mii = true, -+ .support_rmii = true, -+ .support_rgmii = true -+}; -+ -+#define EMAC_BASIC_CTL0 0x00 -+#define EMAC_BASIC_CTL1 0x04 -+#define EMAC_INT_STA 0x08 -+#define EMAC_INT_EN 0x0C -+#define EMAC_TX_CTL0 0x10 -+#define EMAC_TX_CTL1 0x14 -+#define EMAC_TX_FLOW_CTL 0x1C -+#define EMAC_TX_DESC_LIST 0x20 -+#define EMAC_RX_CTL0 0x24 -+#define EMAC_RX_CTL1 0x28 -+#define EMAC_RX_DESC_LIST 0x34 -+#define EMAC_RX_FRM_FLT 0x38 -+#define EMAC_MDIO_CMD 0x48 -+#define EMAC_MDIO_DATA 0x4C -+#define EMAC_MACADDR_HI(reg) (0x50 + (reg) * 8) -+#define EMAC_MACADDR_LO(reg) (0x54 + (reg) * 8) -+#define EMAC_TX_DMA_STA 0xB0 -+#define EMAC_TX_CUR_DESC 0xB4 -+#define EMAC_TX_CUR_BUF 0xB8 -+#define EMAC_RX_DMA_STA 0xC0 -+#define EMAC_RX_CUR_DESC 0xC4 -+#define EMAC_RX_CUR_BUF 0xC8 -+ -+/* Use in EMAC_BASIC_CTL1 */ -+#define EMAC_BURSTLEN_SHIFT 24 -+ -+/* Used in EMAC_RX_FRM_FLT */ -+#define EMAC_FRM_FLT_RXALL BIT(0) -+#define EMAC_FRM_FLT_CTL BIT(13) -+#define EMAC_FRM_FLT_MULTICAST BIT(16) -+ -+/* Used in RX_CTL1*/ -+#define EMAC_RX_MD BIT(1) -+#define EMAC_RX_TH_MASK GENMASK(4, 5) -+#define EMAC_RX_TH_32 0 -+#define EMAC_RX_TH_64 (0x1 << 4) -+#define EMAC_RX_TH_96 (0x2 << 4) -+#define EMAC_RX_TH_128 (0x3 << 4) -+#define EMAC_RX_DMA_EN BIT(30) -+#define EMAC_RX_DMA_START BIT(31) -+ -+/* Used in TX_CTL1*/ -+#define EMAC_TX_MD BIT(1) -+#define EMAC_TX_NEXT_FRM BIT(2) -+#define EMAC_TX_TH_MASK GENMASK(8, 10) -+#define EMAC_TX_TH_64 0 -+#define EMAC_TX_TH_128 (0x1 << 8) -+#define EMAC_TX_TH_192 (0x2 << 8) -+#define EMAC_TX_TH_256 (0x3 << 8) -+#define EMAC_TX_DMA_EN BIT(30) -+#define EMAC_TX_DMA_START BIT(31) -+ -+/* Used in RX_CTL0 */ -+#define EMAC_RX_RECEIVER_EN BIT(31) -+#define EMAC_RX_DO_CRC BIT(27) -+#define EMAC_RX_FLOW_CTL_EN BIT(16) -+ -+/* Used in TX_CTL0 */ -+#define EMAC_TX_TRANSMITTER_EN BIT(31) -+ -+/* Used in EMAC_TX_FLOW_CTL */ -+#define EMAC_TX_FLOW_CTL_EN BIT(0) -+ -+/* Used in EMAC_INT_STA */ -+#define EMAC_TX_INT BIT(0) -+#define EMAC_TX_DMA_STOP_INT BIT(1) -+#define EMAC_TX_BUF_UA_INT BIT(2) -+#define EMAC_TX_TIMEOUT_INT BIT(3) -+#define EMAC_TX_UNDERFLOW_INT BIT(4) -+#define EMAC_TX_EARLY_INT BIT(5) -+#define EMAC_RX_INT BIT(8) -+#define EMAC_RX_BUF_UA_INT BIT(9) -+#define EMAC_RX_DMA_STOP_INT BIT(10) -+#define EMAC_RX_TIMEOUT_INT BIT(11) -+#define EMAC_RX_OVERFLOW_INT BIT(12) -+#define EMAC_RX_EARLY_INT BIT(13) -+#define EMAC_RGMII_STA_INT BIT(16) -+ -+#define MAC_ADDR_TYPE_DST BIT(31) -+ -+/* H3 specific bits for EPHY */ -+#define H3_EPHY_ADDR_SHIFT 20 -+#define H3_EPHY_LED_POL BIT(17) /* 1: active low, 0: active high */ -+#define H3_EPHY_SHUTDOWN BIT(16) /* 1: shutdown, 0: power up */ -+#define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */ -+ -+/* H3/A64 specific bits */ -+#define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */ -+ -+/* Generic system control EMAC_CLK bits */ -+#define SYSCON_ETXDC_MASK GENMASK(2, 0) -+#define SYSCON_ETXDC_SHIFT 10 -+#define SYSCON_ERXDC_MASK GENMASK(4, 0) -+#define SYSCON_ERXDC_SHIFT 5 -+/* EMAC PHY Interface Type */ -+#define SYSCON_EPIT BIT(2) /* 1: RGMII, 0: MII */ -+#define SYSCON_ETCS_MASK GENMASK(1, 0) -+#define SYSCON_ETCS_MII 0x0 -+#define SYSCON_ETCS_EXT_GMII 0x1 -+#define SYSCON_ETCS_INT_GMII 0x2 -+#define SYSCON_EMAC_REG 0x30 -+ -+/* sun8i_dwmac_dma_reset() - reset the EMAC -+ * Called from stmmac via stmmac_dma_ops->reset -+ */ -+static int sun8i_dwmac_dma_reset(void __iomem *ioaddr) -+{ -+ writel(0, ioaddr + EMAC_RX_CTL1); -+ writel(0, ioaddr + EMAC_TX_CTL1); -+ writel(0, ioaddr + EMAC_RX_FRM_FLT); -+ writel(0, ioaddr + EMAC_RX_DESC_LIST); -+ writel(0, ioaddr + EMAC_TX_DESC_LIST); -+ writel(0, ioaddr + EMAC_INT_EN); -+ writel(0x1FFFFFF, ioaddr + EMAC_INT_STA); -+ return 0; -+} -+ -+/* sun8i_dwmac_dma_init() - initialize the EMAC -+ * Called from stmmac via stmmac_dma_ops->init -+ */ -+static void sun8i_dwmac_dma_init(void __iomem *ioaddr, -+ struct stmmac_dma_cfg *dma_cfg, -+ u32 dma_tx, u32 dma_rx, int atds) -+{ -+ /* Write TX and RX descriptors address */ -+ writel(dma_rx, ioaddr + EMAC_RX_DESC_LIST); -+ writel(dma_tx, ioaddr + EMAC_TX_DESC_LIST); -+ -+ writel(EMAC_RX_INT | EMAC_TX_INT, ioaddr + EMAC_INT_EN); -+ writel(0x1FFFFFF, ioaddr + EMAC_INT_STA); -+} -+ -+/* sun8i_dwmac_dump_regs() - Dump EMAC address space -+ * Called from stmmac_dma_ops->dump_regs -+ * Used for ethtool -+ */ -+static void sun8i_dwmac_dump_regs(void __iomem *ioaddr, u32 *reg_space) -+{ -+ int i; -+ -+ for (i = 0; i < 0xC8; i += 4) { -+ if (i == 0x32 || i == 0x3C) -+ continue; -+ reg_space[i / 4] = readl(ioaddr + i); -+ } -+} -+ -+/* sun8i_dwmac_dump_mac_regs() - Dump EMAC address space -+ * Called from stmmac_ops->dump_regs -+ * Used for ethtool -+ */ -+static void sun8i_dwmac_dump_mac_regs(struct mac_device_info *hw, -+ u32 *reg_space) -+{ -+ int i; -+ void __iomem *ioaddr = hw->pcsr; -+ -+ for (i = 0; i < 0xC8; i += 4) { -+ if (i == 0x32 || i == 0x3C) -+ continue; -+ reg_space[i / 4] = readl(ioaddr + i); -+ } -+} -+ -+static void sun8i_dwmac_enable_dma_irq(void __iomem *ioaddr, u32 chan) -+{ -+ writel(EMAC_RX_INT | EMAC_TX_INT, ioaddr + EMAC_INT_EN); -+} -+ -+static void sun8i_dwmac_disable_dma_irq(void __iomem *ioaddr, u32 chan) -+{ -+ writel(0, ioaddr + EMAC_INT_EN); -+} -+ -+static void sun8i_dwmac_dma_start_tx(void __iomem *ioaddr, u32 chan) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_TX_CTL1); -+ v |= EMAC_TX_DMA_START; -+ v |= EMAC_TX_DMA_EN; -+ writel(v, ioaddr + EMAC_TX_CTL1); -+} -+ -+static void sun8i_dwmac_enable_dma_transmission(void __iomem *ioaddr) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_TX_CTL1); -+ v |= EMAC_TX_DMA_START; -+ v |= EMAC_TX_DMA_EN; -+ writel(v, ioaddr + EMAC_TX_CTL1); -+} -+ -+static void sun8i_dwmac_dma_stop_tx(void __iomem *ioaddr, u32 chan) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_TX_CTL1); -+ v &= ~EMAC_TX_DMA_EN; -+ writel(v, ioaddr + EMAC_TX_CTL1); -+} -+ -+static void sun8i_dwmac_dma_start_rx(void __iomem *ioaddr, u32 chan) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_RX_CTL1); -+ v |= EMAC_RX_DMA_START; -+ v |= EMAC_RX_DMA_EN; -+ writel(v, ioaddr + EMAC_RX_CTL1); -+} -+ -+static void sun8i_dwmac_dma_stop_rx(void __iomem *ioaddr, u32 chan) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_RX_CTL1); -+ v &= ~EMAC_RX_DMA_EN; -+ writel(v, ioaddr + EMAC_RX_CTL1); -+} -+ -+static int sun8i_dwmac_dma_interrupt(void __iomem *ioaddr, -+ struct stmmac_extra_stats *x, u32 chan) -+{ -+ u32 v; -+ int ret = 0; -+ -+ v = readl(ioaddr + EMAC_INT_STA); -+ -+ if (v & EMAC_TX_INT) { -+ ret |= handle_tx; -+ x->tx_normal_irq_n++; -+ } -+ -+ if (v & EMAC_TX_DMA_STOP_INT) -+ x->tx_process_stopped_irq++; -+ -+ if (v & EMAC_TX_BUF_UA_INT) -+ x->tx_process_stopped_irq++; -+ -+ if (v & EMAC_TX_TIMEOUT_INT) -+ ret |= tx_hard_error; -+ -+ if (v & EMAC_TX_UNDERFLOW_INT) { -+ ret |= tx_hard_error; -+ x->tx_undeflow_irq++; -+ } -+ -+ if (v & EMAC_TX_EARLY_INT) -+ x->tx_early_irq++; -+ -+ if (v & EMAC_RX_INT) { -+ ret |= handle_rx; -+ x->rx_normal_irq_n++; -+ } -+ -+ if (v & EMAC_RX_BUF_UA_INT) -+ x->rx_buf_unav_irq++; -+ -+ if (v & EMAC_RX_DMA_STOP_INT) -+ x->rx_process_stopped_irq++; -+ -+ if (v & EMAC_RX_TIMEOUT_INT) -+ ret |= tx_hard_error; -+ -+ if (v & EMAC_RX_OVERFLOW_INT) { -+ ret |= tx_hard_error; -+ x->rx_overflow_irq++; -+ } -+ -+ if (v & EMAC_RX_EARLY_INT) -+ x->rx_early_irq++; -+ -+ if (v & EMAC_RGMII_STA_INT) -+ x->irq_rgmii_n++; -+ -+ writel(v, ioaddr + EMAC_INT_STA); -+ -+ return ret; -+} -+ -+static void sun8i_dwmac_dma_operation_mode(void __iomem *ioaddr, int txmode, -+ int rxmode, int rxfifosz) -+{ -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_TX_CTL1); -+ if (txmode == SF_DMA_MODE) { -+ v |= EMAC_TX_MD; -+ /* Undocumented bit (called TX_NEXT_FRM in BSP), the original -+ * comment is -+ * "Operating on second frame increase the performance -+ * especially when transmit store-and-forward is used." -+ */ -+ v |= EMAC_TX_NEXT_FRM; -+ } else { -+ v &= ~EMAC_TX_MD; -+ v &= ~EMAC_TX_TH_MASK; -+ if (txmode < 64) -+ v |= EMAC_TX_TH_64; -+ else if (txmode < 128) -+ v |= EMAC_TX_TH_128; -+ else if (txmode < 192) -+ v |= EMAC_TX_TH_192; -+ else if (txmode < 256) -+ v |= EMAC_TX_TH_256; -+ } -+ writel(v, ioaddr + EMAC_TX_CTL1); -+ -+ v = readl(ioaddr + EMAC_RX_CTL1); -+ if (rxmode == SF_DMA_MODE) { -+ v |= EMAC_RX_MD; -+ } else { -+ v &= ~EMAC_RX_MD; -+ v &= ~EMAC_RX_TH_MASK; -+ if (rxmode < 32) -+ v |= EMAC_RX_TH_32; -+ else if (rxmode < 64) -+ v |= EMAC_RX_TH_64; -+ else if (rxmode < 96) -+ v |= EMAC_RX_TH_96; -+ else if (rxmode < 128) -+ v |= EMAC_RX_TH_128; -+ } -+ writel(v, ioaddr + EMAC_RX_CTL1); -+} -+ -+static const struct stmmac_dma_ops sun8i_dwmac_dma_ops = { -+ .reset = sun8i_dwmac_dma_reset, -+ .init = sun8i_dwmac_dma_init, -+ .dump_regs = sun8i_dwmac_dump_regs, -+ .dma_mode = sun8i_dwmac_dma_operation_mode, -+ .enable_dma_transmission = sun8i_dwmac_enable_dma_transmission, -+ .enable_dma_irq = sun8i_dwmac_enable_dma_irq, -+ .disable_dma_irq = sun8i_dwmac_disable_dma_irq, -+ .start_tx = sun8i_dwmac_dma_start_tx, -+ .stop_tx = sun8i_dwmac_dma_stop_tx, -+ .start_rx = sun8i_dwmac_dma_start_rx, -+ .stop_rx = sun8i_dwmac_dma_stop_rx, -+ .dma_interrupt = sun8i_dwmac_dma_interrupt, -+}; -+ -+static int sun8i_dwmac_init(struct platform_device *pdev, void *priv) -+{ -+ struct sunxi_priv_data *gmac = priv; -+ int ret; -+ -+ if (gmac->regulator) { -+ ret = regulator_enable(gmac->regulator); -+ if (ret) { -+ dev_err(&pdev->dev, "Fail to enable regulator\n"); -+ return ret; -+ } -+ } -+ -+ ret = clk_prepare_enable(gmac->tx_clk); -+ if (ret) { -+ if (gmac->regulator) -+ regulator_disable(gmac->regulator); -+ dev_err(&pdev->dev, "Could not enable AHB clock\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static void sun8i_dwmac_core_init(struct mac_device_info *hw, int mtu) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ u32 v; -+ -+ v = (8 << EMAC_BURSTLEN_SHIFT); /* burst len */ -+ writel(v, ioaddr + EMAC_BASIC_CTL1); -+} -+ -+static void sun8i_dwmac_set_mac(void __iomem *ioaddr, bool enable) -+{ -+ u32 t, r; -+ -+ t = readl(ioaddr + EMAC_TX_CTL0); -+ r = readl(ioaddr + EMAC_RX_CTL0); -+ if (enable) { -+ t |= EMAC_TX_TRANSMITTER_EN; -+ r |= EMAC_RX_RECEIVER_EN; -+ } else { -+ t &= ~EMAC_TX_TRANSMITTER_EN; -+ r &= ~EMAC_RX_RECEIVER_EN; -+ } -+ writel(t, ioaddr + EMAC_TX_CTL0); -+ writel(r, ioaddr + EMAC_RX_CTL0); -+} -+ -+/* Set MAC address at slot reg_n -+ * All slot > 0 need to be enabled with MAC_ADDR_TYPE_DST -+ * If addr is NULL, clear the slot -+ */ -+static void sun8i_dwmac_set_umac_addr(struct mac_device_info *hw, -+ unsigned char *addr, -+ unsigned int reg_n) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ u32 v; -+ -+ if (!addr) { -+ writel(0, ioaddr + EMAC_MACADDR_HI(reg_n)); -+ return; -+ } -+ -+ stmmac_set_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), -+ EMAC_MACADDR_LO(reg_n)); -+ if (reg_n > 0) { -+ v = readl(ioaddr + EMAC_MACADDR_HI(reg_n)); -+ v |= MAC_ADDR_TYPE_DST; -+ writel(v, ioaddr + EMAC_MACADDR_HI(reg_n)); -+ } -+} -+ -+static void sun8i_dwmac_get_umac_addr(struct mac_device_info *hw, -+ unsigned char *addr, -+ unsigned int reg_n) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ -+ stmmac_get_mac_addr(ioaddr, addr, EMAC_MACADDR_HI(reg_n), -+ EMAC_MACADDR_LO(reg_n)); -+} -+ -+/* caution this function must return non 0 to work */ -+static int sun8i_dwmac_rx_ipc_enable(struct mac_device_info *hw) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ v |= EMAC_RX_DO_CRC; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ -+ return 1; -+} -+ -+static void sun8i_dwmac_set_filter(struct mac_device_info *hw, -+ struct net_device *dev) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ u32 v; -+ int i = 1; -+ struct netdev_hw_addr *ha; -+ int macaddrs = netdev_uc_count(dev) + netdev_mc_count(dev) + 1; -+ -+ v = EMAC_FRM_FLT_CTL; -+ -+ if (dev->flags & IFF_PROMISC) { -+ v = EMAC_FRM_FLT_RXALL; -+ } else if (dev->flags & IFF_ALLMULTI) { -+ v |= EMAC_FRM_FLT_MULTICAST; -+ } else if (macaddrs <= hw->unicast_filter_entries) { -+ if (!netdev_mc_empty(dev)) { -+ netdev_for_each_mc_addr(ha, dev) { -+ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); -+ i++; -+ } -+ } -+ if (!netdev_uc_empty(dev)) { -+ netdev_for_each_uc_addr(ha, dev) { -+ sun8i_dwmac_set_umac_addr(hw, ha->addr, i); -+ i++; -+ } -+ } -+ } else { -+ netdev_info(dev, "Too many address, switching to promiscuous\n"); -+ v = EMAC_FRM_FLT_RXALL; -+ } -+ -+ /* Disable unused address filter slots */ -+ while (i < hw->unicast_filter_entries) -+ sun8i_dwmac_set_umac_addr(hw, NULL, i++); -+ -+ writel(v, ioaddr + EMAC_RX_FRM_FLT); -+} -+ -+static void sun8i_dwmac_flow_ctrl(struct mac_device_info *hw, -+ unsigned int duplex, unsigned int fc, -+ unsigned int pause_time, u32 tx_cnt) -+{ -+ void __iomem *ioaddr = hw->pcsr; -+ u32 v; -+ -+ v = readl(ioaddr + EMAC_RX_CTL0); -+ if (fc == FLOW_AUTO) -+ v |= EMAC_RX_FLOW_CTL_EN; -+ else -+ v &= ~EMAC_RX_FLOW_CTL_EN; -+ writel(v, ioaddr + EMAC_RX_CTL0); -+ -+ v = readl(ioaddr + EMAC_TX_FLOW_CTL); -+ if (fc == FLOW_AUTO) -+ v |= EMAC_TX_FLOW_CTL_EN; -+ else -+ v &= ~EMAC_TX_FLOW_CTL_EN; -+ writel(v, ioaddr + EMAC_TX_FLOW_CTL); -+} -+ -+static int sun8i_dwmac_reset(struct stmmac_priv *priv) -+{ -+ u32 v; -+ int err; -+ -+ v = readl(priv->ioaddr + EMAC_BASIC_CTL1); -+ writel(v | 0x01, priv->ioaddr + EMAC_BASIC_CTL1); -+ -+ err = readl_poll_timeout(priv->ioaddr + EMAC_BASIC_CTL1, v, -+ !(v & 0x01), 100, 10000); -+ -+ if (err) { -+ dev_err(priv->device, "EMAC reset timeout\n"); -+ return -EFAULT; -+ } -+ return 0; -+} -+ -+static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) -+{ -+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; -+ struct device_node *node = priv->device->of_node; -+ int ret; -+ u32 reg, val; -+ -+ regmap_read(gmac->regmap, SYSCON_EMAC_REG, &val); -+ reg = gmac->variant->default_syscon_value; -+ if (reg != val) -+ dev_warn(priv->device, -+ "Current syscon value is not the default %x (expect %x)\n", -+ val, reg); -+ -+ if (gmac->variant->internal_phy) { -+ if (!gmac->use_internal_phy) { -+ /* switch to external PHY interface */ -+ reg &= ~H3_EPHY_SELECT; -+ } else { -+ reg |= H3_EPHY_SELECT; -+ reg &= ~H3_EPHY_SHUTDOWN; -+ dev_dbg(priv->device, "Select internal_phy %x\n", reg); -+ -+ if (of_property_read_bool(priv->plat->phy_node, -+ "allwinner,leds-active-low")) -+ reg |= H3_EPHY_LED_POL; -+ else -+ reg &= ~H3_EPHY_LED_POL; -+ -+ ret = of_mdio_parse_addr(priv->device, -+ priv->plat->phy_node); -+ if (ret < 0) { -+ dev_err(priv->device, "Could not parse MDIO addr\n"); -+ return ret; -+ } -+ /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY -+ * address. No need to mask it again. -+ */ -+ reg |= ret << H3_EPHY_ADDR_SHIFT; -+ } -+ } -+ -+ if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) { -+ if (val % 100) { -+ dev_err(priv->device, "tx-delay must be a multiple of 100\n"); -+ return -EINVAL; -+ } -+ val /= 100; -+ dev_dbg(priv->device, "set tx-delay to %x\n", val); -+ if (val <= SYSCON_ETXDC_MASK) { -+ reg &= ~(SYSCON_ETXDC_MASK << SYSCON_ETXDC_SHIFT); -+ reg |= (val << SYSCON_ETXDC_SHIFT); -+ } else { -+ dev_err(priv->device, "Invalid TX clock delay: %d\n", -+ val); -+ return -EINVAL; -+ } -+ } -+ -+ if (!of_property_read_u32(node, "allwinner,rx-delay-ps", &val)) { -+ if (val % 100) { -+ dev_err(priv->device, "rx-delay must be a multiple of 100\n"); -+ return -EINVAL; -+ } -+ val /= 100; -+ dev_dbg(priv->device, "set rx-delay to %x\n", val); -+ if (val <= SYSCON_ERXDC_MASK) { -+ reg &= ~(SYSCON_ERXDC_MASK << SYSCON_ERXDC_SHIFT); -+ reg |= (val << SYSCON_ERXDC_SHIFT); -+ } else { -+ dev_err(priv->device, "Invalid RX clock delay: %d\n", -+ val); -+ return -EINVAL; -+ } -+ } -+ -+ /* Clear interface mode bits */ -+ reg &= ~(SYSCON_ETCS_MASK | SYSCON_EPIT); -+ if (gmac->variant->support_rmii) -+ reg &= ~SYSCON_RMII_EN; -+ -+ switch (priv->plat->interface) { -+ case PHY_INTERFACE_MODE_MII: -+ /* default */ -+ break; -+ case PHY_INTERFACE_MODE_RGMII: -+ reg |= SYSCON_EPIT | SYSCON_ETCS_INT_GMII; -+ break; -+ case PHY_INTERFACE_MODE_RMII: -+ reg |= SYSCON_RMII_EN | SYSCON_ETCS_EXT_GMII; -+ break; -+ default: -+ dev_err(priv->device, "Unsupported interface mode: %s", -+ phy_modes(priv->plat->interface)); -+ return -EINVAL; -+ } -+ -+ regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg); -+ -+ return 0; -+} -+ -+static void sun8i_dwmac_unset_syscon(struct sunxi_priv_data *gmac) -+{ -+ u32 reg = gmac->variant->default_syscon_value; -+ -+ regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg); -+} -+ -+static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv) -+{ -+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; -+ int ret; -+ -+ if (!gmac->use_internal_phy) -+ return 0; -+ -+ ret = clk_prepare_enable(gmac->ephy_clk); -+ if (ret) { -+ dev_err(priv->device, "Cannot enable ephy\n"); -+ return ret; -+ } -+ -+ ret = reset_control_deassert(gmac->rst_ephy); -+ if (ret) { -+ dev_err(priv->device, "Cannot deassert ephy\n"); -+ clk_disable_unprepare(gmac->ephy_clk); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) -+{ -+ if (!gmac->use_internal_phy) -+ return 0; -+ -+ clk_disable_unprepare(gmac->ephy_clk); -+ reset_control_assert(gmac->rst_ephy); -+ return 0; -+} -+ -+static int sun8i_power_phy(struct stmmac_priv *priv) -+{ -+ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; -+ int ret; -+ -+ ret = sun8i_dwmac_power_internal_phy(priv); -+ if (ret) -+ return ret; -+ -+ ret = sun8i_dwmac_set_syscon(priv); -+ if (ret) -+ goto error_phy; -+ -+ ret = sun8i_dwmac_reset(priv); -+ if (ret) -+ goto error_phy; -+ return 0; -+ -+error_phy: -+ sun8i_dwmac_unset_syscon(gmac); -+ sun8i_dwmac_unpower_internal_phy(gmac); -+ return ret; -+} -+ -+static void sun8i_unpower_phy(struct sunxi_priv_data *gmac) -+{ -+ sun8i_dwmac_unset_syscon(gmac); -+ sun8i_dwmac_unpower_internal_phy(gmac); -+} -+ -+static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) -+{ -+ struct sunxi_priv_data *gmac = priv; -+ -+ sun8i_unpower_phy(gmac); -+ -+ clk_disable_unprepare(gmac->tx_clk); -+ -+ if (gmac->regulator) -+ regulator_disable(gmac->regulator); -+} -+ -+static const struct stmmac_ops sun8i_dwmac_ops = { -+ .core_init = sun8i_dwmac_core_init, -+ .set_mac = sun8i_dwmac_set_mac, -+ .dump_regs = sun8i_dwmac_dump_mac_regs, -+ .rx_ipc = sun8i_dwmac_rx_ipc_enable, -+ .set_filter = sun8i_dwmac_set_filter, -+ .flow_ctrl = sun8i_dwmac_flow_ctrl, -+ .set_umac_addr = sun8i_dwmac_set_umac_addr, -+ .get_umac_addr = sun8i_dwmac_get_umac_addr, -+}; -+ -+static struct mac_device_info *sun8i_dwmac_setup(void *ppriv) -+{ -+ struct mac_device_info *mac; -+ struct stmmac_priv *priv = ppriv; -+ int ret; -+ -+ mac = devm_kzalloc(priv->device, sizeof(*mac), GFP_KERNEL); -+ if (!mac) -+ return NULL; -+ -+ ret = sun8i_power_phy(priv); -+ if (ret) -+ return NULL; -+ -+ mac->pcsr = priv->ioaddr; -+ mac->mac = &sun8i_dwmac_ops; -+ mac->dma = &sun8i_dwmac_dma_ops; -+ -+ mac->link.port = 0; -+ mac->link.duplex = BIT(0); -+ mac->link.speed = 1; -+ mac->mii.addr = EMAC_MDIO_CMD; -+ mac->mii.data = EMAC_MDIO_DATA; -+ mac->mii.reg_shift = 4; -+ mac->mii.reg_mask = GENMASK(8, 4); -+ mac->mii.addr_shift = 12; -+ mac->mii.addr_mask = GENMASK(16, 12); -+ mac->mii.clk_csr_shift = 20; -+ mac->mii.clk_csr_mask = GENMASK(22, 20); -+ mac->unicast_filter_entries = 8; -+ -+ /* Synopsys Id is not available */ -+ priv->synopsys_id = 0; -+ -+ return mac; -+} -+ -+static int sun8i_dwmac_probe(struct platform_device *pdev) -+{ -+ struct plat_stmmacenet_data *plat_dat; -+ struct stmmac_resources stmmac_res; -+ struct sunxi_priv_data *gmac; -+ struct device *dev = &pdev->dev; -+ int ret; -+ -+ ret = stmmac_get_platform_resources(pdev, &stmmac_res); -+ if (ret) -+ return ret; -+ -+ plat_dat = stmmac_probe_config_dt(pdev, &stmmac_res.mac); -+ if (IS_ERR(plat_dat)) -+ return PTR_ERR(plat_dat); -+ -+ gmac = devm_kzalloc(dev, sizeof(*gmac), GFP_KERNEL); -+ if (!gmac) -+ return -ENOMEM; -+ -+ gmac->variant = of_device_get_match_data(&pdev->dev); -+ if (!gmac->variant) { -+ dev_err(&pdev->dev, "Missing dwmac-sun8i variant\n"); -+ return -EINVAL; -+ } -+ -+ gmac->tx_clk = devm_clk_get(dev, "stmmaceth"); -+ if (IS_ERR(gmac->tx_clk)) { -+ dev_err(dev, "Could not get TX clock\n"); -+ return PTR_ERR(gmac->tx_clk); -+ } -+ -+ /* Optional regulator for PHY */ -+ gmac->regulator = devm_regulator_get_optional(dev, "phy"); -+ if (IS_ERR(gmac->regulator)) { -+ if (PTR_ERR(gmac->regulator) == -EPROBE_DEFER) -+ return -EPROBE_DEFER; -+ dev_info(dev, "No regulator found\n"); -+ gmac->regulator = NULL; -+ } -+ -+ gmac->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, -+ "syscon"); -+ if (IS_ERR(gmac->regmap)) { -+ ret = PTR_ERR(gmac->regmap); -+ dev_err(&pdev->dev, "Unable to map syscon: %d\n", ret); -+ return ret; -+ } -+ -+ plat_dat->interface = of_get_phy_mode(dev->of_node); -+ if (plat_dat->interface == gmac->variant->internal_phy) { -+ dev_info(&pdev->dev, "Will use internal PHY\n"); -+ gmac->use_internal_phy = true; -+ gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0); -+ if (IS_ERR(gmac->ephy_clk)) { -+ ret = PTR_ERR(gmac->ephy_clk); -+ dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret); -+ return -EINVAL; -+ } -+ -+ gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL); -+ if (IS_ERR(gmac->rst_ephy)) { -+ ret = PTR_ERR(gmac->rst_ephy); -+ if (ret == -EPROBE_DEFER) -+ return ret; -+ dev_err(&pdev->dev, "No EPHY reset control found %d\n", -+ ret); -+ return -EINVAL; -+ } -+ } else { -+ dev_info(&pdev->dev, "Will use external PHY\n"); -+ gmac->use_internal_phy = false; -+ } -+ -+ /* platform data specifying hardware features and callbacks. -+ * hardware features were copied from Allwinner drivers. -+ */ -+ plat_dat->rx_coe = STMMAC_RX_COE_TYPE2; -+ plat_dat->tx_coe = 1; -+ plat_dat->has_sun8i = true; -+ plat_dat->bsp_priv = gmac; -+ plat_dat->init = sun8i_dwmac_init; -+ plat_dat->exit = sun8i_dwmac_exit; -+ plat_dat->setup = sun8i_dwmac_setup; -+ -+ ret = sun8i_dwmac_init(pdev, plat_dat->bsp_priv); -+ if (ret) -+ return ret; -+ -+ ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); -+ if (ret) -+ sun8i_dwmac_exit(pdev, plat_dat->bsp_priv); -+ -+ return ret; -+} -+ -+static const struct of_device_id sun8i_dwmac_match[] = { -+ { .compatible = "allwinner,sun8i-h3-emac", -+ .data = &emac_variant_h3 }, -+ { .compatible = "allwinner,sun8i-a83t-emac", -+ .data = &emac_variant_a83t }, -+ { .compatible = "allwinner,sun50i-a64-emac", -+ .data = &emac_variant_a64 }, -+ { } -+}; -+MODULE_DEVICE_TABLE(of, sun8i_dwmac_match); -+ -+static struct platform_driver sun8i_dwmac_driver = { -+ .probe = sun8i_dwmac_probe, -+ .remove = stmmac_pltfr_remove, -+ .driver = { -+ .name = "dwmac-sun8i", -+ .pm = &stmmac_pltfr_pm_ops, -+ .of_match_table = sun8i_dwmac_match, -+ }, -+}; -+module_platform_driver(sun8i_dwmac_driver); -+ -+MODULE_AUTHOR("Corentin Labbe "); -+MODULE_DESCRIPTION("Allwinner sun8i DWMAC specific glue layer"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -index b82ab64..39777a7 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c -@@ -235,6 +235,17 @@ static void stmmac_clk_csr_set(struct stmmac_priv *priv) - else if ((clk_rate >= CSR_F_250M) && (clk_rate < CSR_F_300M)) - priv->clk_csr = STMMAC_CSR_250_300M; - } -+ -+ if (priv->plat->has_sun8i) { -+ if (clk_rate > 160000000) -+ priv->clk_csr = 0x03; -+ else if (clk_rate > 80000000) -+ priv->clk_csr = 0x02; -+ else if (clk_rate > 40000000) -+ priv->clk_csr = 0x01; -+ else -+ priv->clk_csr = 0; -+ } - } - - static void print_pkt(unsigned char *buf, int len) -@@ -784,6 +795,14 @@ static void stmmac_adjust_link(struct net_device *dev) - if (phydev->link) { - u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG); - -+ /* dwmac-sun8i handle loopback in MAC_CTRL_REG */ -+ if (priv->plat->has_sun8i) { -+ if (dev->features & NETIF_F_LOOPBACK) -+ ctrl |= BIT(1); -+ else -+ ctrl &= ~BIT(1); -+ } -+ - /* Now we make sure that we can be in full duplex mode. - * If not, we operate in half-duplex mode. */ - if (phydev->duplex != priv->oldduplex) { -@@ -800,6 +819,8 @@ static void stmmac_adjust_link(struct net_device *dev) - - if (phydev->speed != priv->speed) { - new_state = 1; -+ if (priv->plat->has_sun8i) -+ ctrl &= ~GENMASK(3, 2); - switch (phydev->speed) { - case 1000: - if (priv->plat->has_gmac || -@@ -811,6 +832,8 @@ static void stmmac_adjust_link(struct net_device *dev) - priv->plat->has_gmac4) { - ctrl |= priv->hw->link.port; - ctrl |= priv->hw->link.speed; -+ } else if (priv->plat->has_sun8i) { -+ ctrl |= 3 << 2; - } else { - ctrl &= ~priv->hw->link.port; - } -@@ -820,6 +843,8 @@ static void stmmac_adjust_link(struct net_device *dev) - priv->plat->has_gmac4) { - ctrl |= priv->hw->link.port; - ctrl &= ~(priv->hw->link.speed); -+ } else if (priv->plat->has_sun8i) { -+ ctrl |= 2 << 2; - } else { - ctrl &= ~priv->hw->link.port; - } -@@ -3969,6 +3994,10 @@ static int stmmac_hw_init(struct stmmac_priv *priv) - - priv->hw = mac; - -+ /* dwmac-sun8i only work in chain mode */ -+ if (priv->plat->has_sun8i) -+ chain_mode = 1; -+ - /* To use the chained or ring mode */ - if (priv->synopsys_id >= DWMAC_CORE_4_00) { - priv->hw->mode = &dwmac4_ring_mode_ops; -diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -index 7fc3a1e..3840529 100644 ---- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c -@@ -309,6 +309,12 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, - struct device_node *np, struct device *dev) - { - bool mdio = true; -+ static const struct of_device_id need_mdio_ids[] = { -+ { .compatible = "snps,dwc-qos-ethernet-4.10" }, -+ { .compatible = "allwinner,sun8i-a83t-emac" }, -+ { .compatible = "allwinner,sun8i-h3-emac" }, -+ { .compatible = "allwinner,sun50i-a64-emac" }, -+ }; - - /* If phy-handle property is passed from DT, use it as the PHY */ - plat->phy_node = of_parse_phandle(np, "phy-handle", 0); -@@ -325,8 +331,7 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, - mdio = false; - } - -- /* exception for dwmac-dwc-qos-eth glue logic */ -- if (of_device_is_compatible(np, "snps,dwc-qos-ethernet-4.10")) { -+ if (of_match_node(need_mdio_ids, np)) { - plat->mdio_node = of_get_child_by_name(np, "mdio"); - } else { - /** -diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h -index 8bb550b..108739f 100644 ---- a/include/linux/stmmac.h -+++ b/include/linux/stmmac.h -@@ -186,6 +186,7 @@ struct plat_stmmacenet_data { - struct reset_control *stmmac_rst; - struct stmmac_axi *axi; - int has_gmac4; -+ bool has_sun8i; - bool tso_en; - int mac_port_sel_speed; - bool en_tx_lpi_clockgating; - -From patchwork Mon May 1 12:45:06 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, - 06/20] arm: sun8i: sunxi-h3-h5: Add dt node for the syscon control - module -From: Corentin LABBE -X-Patchwork-Id: 9706459 -Message-Id: <20170501124520.3769-7-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:06 +0200 - -This patch add the dt node for the syscon register present on the -Allwinner H3/H5 - -Only two register are present in this syscon and the only one useful is -the one dedicated to EMAC clock.. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sunxi-h3-h5.dtsi | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 1aeeacb..d9691fc 100644 ---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -83,6 +83,12 @@ - #size-cells = <1>; - ranges; - -+ syscon: syscon@1c00000 { -+ compatible = "allwinner,sun8i-h3-system-controller", -+ "syscon"; -+ reg = <0x01c00000 0x1000>; -+ }; -+ - dma: dma-controller@01c02000 { - compatible = "allwinner,sun8i-h3-dma"; - reg = <0x01c02000 0x1000>; - -From patchwork Mon May 1 12:45:07 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,07/20] arm: sun8i: sunxi-h3-h5: add dwmac-sun8i ethernet driver -From: Corentin LABBE -X-Patchwork-Id: 9706465 -Message-Id: <20170501124520.3769-8-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:07 +0200 - -The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 -speed. - -This patch enable the dwmac-sun8i on Allwinner H3/H5 SoC Device-tree. -SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sunxi-h3-h5.dtsi | 34 ++++++++++++++++++++++++++++++++++ - 1 file changed, 34 insertions(+) - -diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index d9691fc..45a9a30 100644 ---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -285,6 +285,14 @@ - interrupt-controller; - #interrupt-cells = <3>; - -+ emac_rgmii_pins: emac0 { -+ pins = "PD0", "PD1", "PD2", "PD3", "PD4", -+ "PD5", "PD7", "PD8", "PD9", "PD10", -+ "PD12", "PD13", "PD15", "PD16", "PD17"; -+ function = "emac"; -+ drive-strength = <40>; -+ }; -+ - i2c0_pins: i2c0 { - pins = "PA11", "PA12"; - function = "i2c0"; -@@ -381,6 +389,32 @@ - clocks = <&osc24M>; - }; - -+ emac: ethernet@1c30000 { -+ compatible = "allwinner,sun8i-h3-emac"; -+ syscon = <&syscon>; -+ reg = <0x01c30000 0x104>; -+ interrupts = ; -+ interrupt-names = "macirq"; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "stmmaceth"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ -+ mdio: mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ int_mii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; -+ }; -+ }; -+ }; -+ - spi0: spi@01c68000 { - compatible = "allwinner,sun8i-h3-spi"; - reg = <0x01c68000 0x1000>; - -From patchwork Mon May 1 12:45:08 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,08/20] arm: sun8i: orangepi-pc: Enable dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9706463 -Message-Id: <20170501124520.3769-9-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:08 +0200 - -The dwmac-sun8i hardware is present on the Orange PI PC. -It uses the internal PHY. - -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -index f148111..52e6575 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts -@@ -52,6 +52,7 @@ - compatible = "xunlong,orangepi-pc", "allwinner,sun8i-h3"; - - aliases { -+ ethernet0 = &emac; - serial0 = &uart0; - }; - -@@ -109,6 +110,13 @@ - status = "okay"; - }; - -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - -From patchwork Mon May 1 12:45:09 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,09/20] arm: sun8i: orangepi-zero: Enable dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9706461 -Message-Id: <20170501124520.3769-10-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:09 +0200 - -The dwmac-sun8i hardware is present on the Orange PI Zero. -It uses the internal PHY. - -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts -index 9e8b082..dd3525a 100644 ---- a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts -+++ b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts -@@ -57,6 +57,7 @@ - aliases { - serial0 = &uart0; - /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ -+ ethernet0 = &emac; - ethernet1 = &xr819; - }; - -@@ -103,6 +104,13 @@ - status = "okay"; - }; - -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>; - -From patchwork Mon May 1 12:45:10 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,10/20] arm: sun8i: orangepi-one: Enable dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9706471 -Message-Id: <20170501124520.3769-11-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:10 +0200 - -The dwmac-sun8i hardware is present on the Orange PI One. -It uses the internal PHY. - -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -index 5fea430..6880268 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-one.dts -@@ -52,6 +52,7 @@ - compatible = "xunlong,orangepi-one", "allwinner,sun8i-h3"; - - aliases { -+ ethernet0 = &emac; - serial0 = &uart0; - }; - -@@ -97,6 +98,13 @@ - status = "okay"; - }; - -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; - -From patchwork Mon May 1 12:45:11 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,11/20] arm: sun8i: orangepi-2: Enable dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9706467 -Message-Id: <20170501124520.3769-12-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:11 +0200 - -The dwmac-sun8i hardware is present on the Orange PI 2. -It uses the internal PHY. - -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -index 5b6d145..cedd326 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-2.dts -@@ -54,6 +54,7 @@ - aliases { - serial0 = &uart0; - /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ -+ ethernet0 = &emac; - ethernet1 = &rtl8189; - }; - -@@ -108,6 +109,13 @@ - status = "okay"; - }; - -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - -From patchwork Mon May 1 12:45:12 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, - 12/20] arm: sun8i: orangepi-pc-plus: Set EMAC activity LEDs to active - high -From: Corentin LABBE -X-Patchwork-Id: 9706481 -Message-Id: <20170501124520.3769-13-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:12 +0200 - -On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet -port were changed from active low to active high. - -Signed-off-by: Chen-Yu Tsai -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -index 8b93f5c..a10281b 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts -@@ -53,6 +53,11 @@ - }; - }; - -+&emac { -+ /* LEDs changed to active high on the plus */ -+ /delete-property/ allwinner,leds-active-low; -+}; -+ - &mmc1 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc1_pins_a>; - -From patchwork Mon May 1 12:45:13 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, 13/20] arm64: allwinner: sun50i-a64: Add dt node for the syscon - control module -From: Corentin LABBE -X-Patchwork-Id: 9706477 -Message-Id: <20170501124520.3769-14-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:13 +0200 - -This patch add the dt node for the syscon register present on the -Allwinner A64. - -Only two register are present in this syscon and the only one useful is -the one dedicated to EMAC clock. - -Signed-off-by: Corentin Labbe ---- - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 6 ++++++ - 1 file changed, 6 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index c7f669f..d7341ba 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -129,6 +129,12 @@ - #size-cells = <1>; - ranges; - -+ syscon: syscon@1c00000 { -+ compatible = "allwinner,sun50i-a64-system-controller", -+ "syscon"; -+ reg = <0x01c00000 0x1000>; -+ }; -+ - mmc0: mmc@1c0f000 { - compatible = "allwinner,sun50i-a64-mmc"; - reg = <0x01c0f000 0x1000>; - -From patchwork Mon May 1 12:45:14 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, - 14/20] arm64: allwinner: sun50i-a64: add dwmac-sun8i Ethernet driver -From: Corentin LABBE -X-Patchwork-Id: 9706485 -Message-Id: <20170501124520.3769-15-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:14 +0200 - -The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit -connections. It is very similar to the device found in the Allwinner -H3, but lacks the internal 100 Mbit PHY and its associated control -bits. -This adds the necessary bits to the Allwinner A64 SoC .dtsi, but keeps -it disabled at this level. - -Signed-off-by: Corentin Labbe ---- - arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 35 +++++++++++++++++++++++++++ - 1 file changed, 35 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index d7341ba..18b3642 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -@@ -287,6 +287,21 @@ - bias-pull-up; - }; - -+ rmii_pins: rmii_pins { -+ pins = "PD10", "PD11", "PD13", "PD14", "PD17", -+ "PD18", "PD19", "PD20", "PD22", "PD23"; -+ function = "emac"; -+ drive-strength = <40>; -+ }; -+ -+ rgmii_pins: rgmii_pins { -+ pins = "PD8", "PD9", "PD10", "PD11", "PD12", -+ "PD13", "PD15", "PD16", "PD17", "PD18", -+ "PD19", "PD20", "PD21", "PD22", "PD23"; -+ function = "emac"; -+ drive-strength = <40>; -+ }; -+ - uart0_pins_a: uart0@0 { - pins = "PB8", "PB9"; - function = "uart0"; -@@ -391,6 +406,26 @@ - #size-cells = <0>; - }; - -+ emac: ethernet@1c30000 { -+ compatible = "allwinner,sun50i-a64-emac"; -+ syscon = <&syscon>; -+ reg = <0x01c30000 0x100>; -+ interrupts = ; -+ interrupt-names = "macirq"; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "stmmaceth"; -+ status = "disabled"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ mdio: mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ }; -+ }; -+ - gic: interrupt-controller@1c81000 { - compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - -From patchwork Mon May 1 12:45:15 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,15/20] arm64: allwinner: pine64: Enable dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9706489 -Message-Id: <20170501124520.3769-16-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:15 +0200 - -The dwmac-sun8i hardware is present on the pine64 -It uses an external PHY via RMII. - -Signed-off-by: Corentin Labbe ---- - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -index c680ed3..3b491c0 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -@@ -70,6 +70,15 @@ - status = "okay"; - }; - -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rmii_pins>; -+ phy-mode = "rmii"; -+ phy-handle = <&ext_rmii_phy1>; -+ status = "okay"; -+ -+}; -+ - &i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; -@@ -80,6 +89,13 @@ - bias-pull-up; - }; - -+&mdio { -+ ext_rmii_phy1: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - -From patchwork Mon May 1 12:45:16 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,16/20] arm64: allwinner: pine64-plus: Enable dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9706511 -Message-Id: <20170501124520.3769-17-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:16 +0200 - -The dwmac-sun8i hardware is present on the pine64 plus. -It uses an external PHY rtl8211e via RGMII. - -Signed-off-by: Corentin Labbe ---- - .../arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 17 ++++++++++++++++- - 1 file changed, 16 insertions(+), 1 deletion(-) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -index 790d14d..24f1aac 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts -@@ -46,5 +46,20 @@ - model = "Pine64+"; - compatible = "pine64,pine64-plus", "allwinner,sun50i-a64"; - -- /* TODO: Camera, Ethernet PHY, touchscreen, etc. */ -+ /* TODO: Camera, touchscreen, etc. */ -+}; -+ -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ phy-mode = "rgmii"; -+ phy-handle = <&ext_rgmii_phy>; -+ status = "okay"; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; - }; - -From patchwork Mon May 1 12:45:17 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,17/20] arm64: allwinner: bananapi-m64: Enable dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9706509 -Message-Id: <20170501124520.3769-18-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:17 +0200 - -The dwmac-sun8i hardware is present on the BananaPi M64. -It uses an external PHY rtl8211e via RGMII. - -Signed-off-by: Corentin Labbe ---- - arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 15 +++++++++++++++ - 1 file changed, 15 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -index 6872135..0d1f026 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -@@ -67,6 +67,14 @@ - }; - }; - -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ phy-mode = "rgmii"; -+ phy-handle = <&ext_rgmii_phy>; -+ status = "okay"; -+}; -+ - &i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; -@@ -77,6 +85,13 @@ - bias-pull-up; - }; - -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins>; - -From patchwork Mon May 1 12:45:18 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,18/20] arm: sunxi: Enable dwmac-sun8i driver on sunxi_defconfig -From: Corentin LABBE -X-Patchwork-Id: 9706507 -Message-Id: <20170501124520.3769-19-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:18 +0200 - -Enable the dwmac-sun8i driver in the sunxi default configuration - -Signed-off-by: Corentin Labbe ---- - arch/arm/configs/sunxi_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig -index 5cd5dd70..504e022 100644 ---- a/arch/arm/configs/sunxi_defconfig -+++ b/arch/arm/configs/sunxi_defconfig -@@ -40,6 +40,7 @@ CONFIG_ATA=y - CONFIG_AHCI_SUNXI=y - CONFIG_NETDEVICES=y - CONFIG_SUN4I_EMAC=y -+CONFIG_DWMAC_SUN8I=y - # CONFIG_NET_VENDOR_ARC is not set - # CONFIG_NET_CADENCE is not set - # CONFIG_NET_VENDOR_BROADCOM is not set - -From patchwork Mon May 1 12:45:19 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5, - 19/20] arm: multi_v7: Enable dwmac-sun8i driver on multi_v7_defconfig -From: Corentin LABBE -X-Patchwork-Id: 9706513 -Message-Id: <20170501124520.3769-20-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:19 +0200 - -Enable the dwmac-sun8i driver in the multi_v7 default configuration - -Signed-off-by: Corentin Labbe ---- - arch/arm/configs/multi_v7_defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig -index 2685e03..6da6af8 100644 ---- a/arch/arm/configs/multi_v7_defconfig -+++ b/arch/arm/configs/multi_v7_defconfig -@@ -257,6 +257,7 @@ CONFIG_SMSC911X=y - CONFIG_STMMAC_ETH=y - CONFIG_STMMAC_PLATFORM=y - CONFIG_DWMAC_DWC_QOS_ETH=y -+CONFIG_DWMAC_SUN8I=y - CONFIG_TI_CPSW=y - CONFIG_XILINX_EMACLITE=y - CONFIG_AT803X_PHY=y - -From patchwork Mon May 1 12:45:20 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v5,20/20] arm64: defconfig: Enable dwmac-sun8i driver on defconfig -From: Corentin LABBE -X-Patchwork-Id: 9706505 -Message-Id: <20170501124520.3769-21-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, wens@csie.org, - linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Corentin Labbe -Date: Mon, 1 May 2017 14:45:20 +0200 - -Enable the dwmac-sun8i ethernet driver as a module in the ARM64 defconfig. - -Signed-off-by: Corentin Labbe ---- - arch/arm64/configs/defconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig -index ce07285..4575fbb 100644 ---- a/arch/arm64/configs/defconfig -+++ b/arch/arm64/configs/defconfig -@@ -193,6 +193,7 @@ CONFIG_RAVB=y - CONFIG_SMC91X=y - CONFIG_SMSC911X=y - CONFIG_STMMAC_ETH=m -+CONFIG_DWMAC_SUN8I=m - CONFIG_MDIO_BUS_MUX_MMIOREG=y - CONFIG_MESON_GXL_PHY=m - CONFIG_MICREL_PHY=y -From patchwork Mon Jun 5 19:21:26 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/5] ARM: sun8i: orangepi-plus: Enable dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9767313 -Message-Id: <20170605192130.25320-2-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, - maxime.ripard@free-electrons.com, wens@csie.org, - catalin.marinas@arm.com, will.deacon@arm.com -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - Corentin Labbe , - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org -Date: Mon, 5 Jun 2017 21:21:26 +0200 - -The dwmac-sun8i hardware is present on the Orange PI plus. -It uses an external PHY rtl8211e via RGMII. - -This patch create the needed regulator, emac and phy nodes. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 32 ++++++++++++++++++++++++++++ - 1 file changed, 32 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -index 8c40ab7bfa72..331ed683ac62 100644 ---- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -@@ -47,6 +47,20 @@ - model = "Xunlong Orange Pi Plus / Plus 2"; - compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3"; - -+ aliases { -+ ethernet0 = &emac; -+ }; -+ -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; -+ - reg_usb3_vbus: usb3-vbus { - compatible = "regulator-fixed"; - pinctrl-names = "default"; -@@ -64,6 +78,24 @@ - status = "okay"; - }; - -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <0>; -+ }; -+}; -+ - &mmc2 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc2_8bit_pins>; -From patchwork Mon Jun 5 19:21:27 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [2/5] ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9767321 -Message-Id: <20170605192130.25320-3-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, - maxime.ripard@free-electrons.com, wens@csie.org, - catalin.marinas@arm.com, will.deacon@arm.com -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - Corentin Labbe , - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org -Date: Mon, 5 Jun 2017 21:21:27 +0200 - -The dwmac-sun8i hardware is present on the Banana Pi M2+ -It uses an external PHY rtl8211e via RGMII. - -This patch create the needed regulator, emac and phy nodes. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 29 +++++++++++++++++++++++++ - 1 file changed, 29 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -index 883072b611fa..d756ff825116 100644 ---- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -+++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -@@ -52,6 +52,7 @@ - compatible = "sinovoip,bpi-m2-plus", "allwinner,sun8i-h3"; - - aliases { -+ ethernet0 = &emac; - serial0 = &uart0; - serial1 = &uart1; - }; -@@ -84,6 +85,16 @@ - }; - }; - -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; -+ - wifi_pwrseq: wifi_pwrseq { - compatible = "mmc-pwrseq-simple"; - pinctrl-names = "default"; -@@ -104,12 +115,30 @@ - status = "okay"; - }; - -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -+ - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - status = "okay"; - }; - -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <0>; -+ }; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; -From patchwork Mon Jun 5 19:21:28 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [3/5] ARM: sun50i: orangepi-pc2: Enable dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9767347 -Message-Id: <20170605192130.25320-4-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, - maxime.ripard@free-electrons.com, wens@csie.org, - catalin.marinas@arm.com, will.deacon@arm.com -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - Corentin Labbe , - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org -Date: Mon, 5 Jun 2017 21:21:28 +0200 - -The dwmac-sun8i hardware is present on the Orange PI PC2. -It uses an external PHY rtl8211e via RGMII. - -This patch create the needed regulator, emac and phy nodes. -Signed-off-by: Corentin Labbe ---- - .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 27 ++++++++++++++++++++++ - 1 file changed, 27 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -index dfecc17dcc92..a8296feee884 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -@@ -59,6 +59,7 @@ - }; - - aliases { -+ ethernet0 = &emac; - serial0 = &uart0; - }; - -@@ -91,6 +92,16 @@ - }; - }; - -+ reg_gmac_3v3: gmac-3v3 { -+ compatible = "regulator-fixed"; -+ regulator-name = "gmac-3v3"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ enable-active-high; -+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; -+ }; -+ - reg_usb0_vbus: usb0-vbus { - compatible = "regulator-fixed"; - regulator-name = "usb0-vbus"; -@@ -126,12 +137,28 @@ - status = "okay"; - }; - -+&emac { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emac_rgmii_pins>; -+ phy-supply = <®_gmac_3v3>; -+ phy-handle = <&ext_rgmii_phy>; -+ phy-mode = "rgmii"; -+ status = "okay"; -+}; -+ - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - status = "okay"; - }; - -+&mdio { -+ ext_rgmii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ }; -+}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; -From patchwork Wed May 31 07:18:44 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v6,13/21] arm: sun8i: nanopi-neo: Enable dwmac-sun8i -From: Corentin LABBE -X-Patchwork-Id: 9756089 -Message-Id: <20170531071852.12422-14-clabbe.montjoie@gmail.com> -To: robh+dt@kernel.org, mark.rutland@arm.com, - maxime.ripard@free-electrons.com, - wens@csie.org, linux@armlinux.org.uk, catalin.marinas@arm.com, - will.deacon@arm.com, peppe.cavallaro@st.com, alexandre.torgue@st.com -Cc: devicetree@vger.kernel.org, netdev@vger.kernel.org, - linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, - Corentin Labbe , - linux-arm-kernel@lists.infradead.org -Date: Wed, 31 May 2017 09:18:44 +0200 - -The dwmac-sun8i hardware is present on the NanoPi Neo. -It uses the internal PHY. -This patch create the needed emac node. - -Signed-off-by: Corentin Labbe ---- - arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts -index 8d2cc6e9a03f..78f6c24952dd 100644 ---- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts -+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts -@@ -46,3 +46,10 @@ - model = "FriendlyARM NanoPi NEO"; - compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3"; - }; -+ -+&emac { -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ status = "okay"; -+}; -From 051516f1c20c7d7c274c91b4c2fa73bc8d7fc372 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Sat, 22 Jul 2017 15:08:12 +0100 -Subject: [PATCH] fix mac assignment so we get static not dynamic MACs - ---- - arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 1 + - arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -index 0d1f026d831a..ba2fde2909f9 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -@@ -51,6 +51,7 @@ - compatible = "sinovoip,bananapi-m64", "allwinner,sun50i-a64"; - - aliases { -+ ethernet0 = &emac; - serial0 = &uart0; - serial1 = &uart1; - }; -diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -index 3b491c0e3b0d..8442eb6c9244 100644 ---- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -@@ -51,6 +51,7 @@ - compatible = "pine64,pine64", "allwinner,sun50i-a64"; - - aliases { -+ ethernet0 = &emac; - serial0 = &uart0; - }; - --- -2.13.3 - diff --git a/CVE-2017-16538.patch b/CVE-2017-16538.patch deleted file mode 100644 index e9cf4b0..0000000 --- a/CVE-2017-16538.patch +++ /dev/null @@ -1,166 +0,0 @@ -From patchwork Tue Sep 26 21:10:20 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/2] media: dvb-usb-v2: lmedm04: Improve logic checking of warm - start. -From: Malcolm Priestley -X-Patchwork-Id: 44566 -Message-Id: <20170926211021.11036-1-tvboxspy@gmail.com> -To: linux-media@vger.kernel.org -Cc: Andrey Konovalov , - Malcolm Priestley -Date: Tue, 26 Sep 2017 22:10:20 +0100 - -Warm start has no check as whether a genuine device has -connected and proceeds to next execution path. - -Check device should read 0x47 at offset of 2 on USB descriptor read -and it is the amount requested of 6 bytes. - -Fix for -kasan: CONFIG_KASAN_INLINE enabled -kasan: GPF could be caused by NULL-ptr deref or user memory access as - -Reported-by: Andrey Konovalov -Signed-off-by: Malcolm Priestley ---- - drivers/media/usb/dvb-usb-v2/lmedm04.c | 26 ++++++++++++++++++-------- - 1 file changed, 18 insertions(+), 8 deletions(-) - -diff --git a/drivers/media/usb/dvb-usb-v2/lmedm04.c b/drivers/media/usb/dvb-usb-v2/lmedm04.c -index 5e320fa4a795..992f2011a6ba 100644 ---- a/drivers/media/usb/dvb-usb-v2/lmedm04.c -+++ b/drivers/media/usb/dvb-usb-v2/lmedm04.c -@@ -494,18 +494,23 @@ static int lme2510_pid_filter(struct dvb_usb_adapter *adap, int index, u16 pid, - - static int lme2510_return_status(struct dvb_usb_device *d) - { -- int ret = 0; -+ int ret; - u8 *data; - -- data = kzalloc(10, GFP_KERNEL); -+ data = kzalloc(6, GFP_KERNEL); - if (!data) - return -ENOMEM; - -- ret |= usb_control_msg(d->udev, usb_rcvctrlpipe(d->udev, 0), -- 0x06, 0x80, 0x0302, 0x00, data, 0x0006, 200); -- info("Firmware Status: %x (%x)", ret , data[2]); -+ ret = usb_control_msg(d->udev, usb_rcvctrlpipe(d->udev, 0), -+ 0x06, 0x80, 0x0302, 0x00, -+ data, 0x6, 200); -+ if (ret != 6) -+ ret = -EINVAL; -+ else -+ ret = data[2]; -+ -+ info("Firmware Status: %6ph", data); - -- ret = (ret < 0) ? -ENODEV : data[2]; - kfree(data); - return ret; - } -@@ -1189,6 +1194,7 @@ static int lme2510_get_adapter_count(struct dvb_usb_device *d) - static int lme2510_identify_state(struct dvb_usb_device *d, const char **name) - { - struct lme2510_state *st = d->priv; -+ int status; - - usb_reset_configuration(d->udev); - -@@ -1197,12 +1203,16 @@ static int lme2510_identify_state(struct dvb_usb_device *d, const char **name) - - st->dvb_usb_lme2510_firmware = dvb_usb_lme2510_firmware; - -- if (lme2510_return_status(d) == 0x44) { -+ status = lme2510_return_status(d); -+ if (status == 0x44) { - *name = lme_firmware_switch(d, 0); - return COLD; - } - -- return 0; -+ if (status != 0x47) -+ return -EINVAL; -+ -+ return WARM; - } - - static int lme2510_get_stream_config(struct dvb_frontend *fe, u8 *ts_type, -From patchwork Tue Sep 26 21:10:21 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [2/2] media: dvb-usb-v2: lmedm04: move ts2020 attach to - dm04_lme2510_tuner -From: Malcolm Priestley -X-Patchwork-Id: 44567 -Message-Id: <20170926211021.11036-2-tvboxspy@gmail.com> -To: linux-media@vger.kernel.org -Cc: Andrey Konovalov , - Malcolm Priestley -Date: Tue, 26 Sep 2017 22:10:21 +0100 - -When the tuner was split from m88rs2000 the attach function is in wrong -place. - -Move to dm04_lme2510_tuner to trap errors on failure and removing -a call to lme_coldreset. - -Prevents driver starting up without any tuner connected. - -Fixes to trap for ts2020 fail. -LME2510(C): FE Found M88RS2000 -ts2020: probe of 0-0060 failed with error -11 -... -LME2510(C): TUN Found RS2000 tuner -kasan: CONFIG_KASAN_INLINE enabled -kasan: GPF could be caused by NULL-ptr deref or user memory access -general protection fault: 0000 [#1] PREEMPT SMP KASAN - -Reported-by: Andrey Konovalov -Signed-off-by: Malcolm Priestley -Tested-by: Andrey Konovalov ---- - drivers/media/usb/dvb-usb-v2/lmedm04.c | 13 ++++++------- - 1 file changed, 6 insertions(+), 7 deletions(-) - -diff --git a/drivers/media/usb/dvb-usb-v2/lmedm04.c b/drivers/media/usb/dvb-usb-v2/lmedm04.c -index 992f2011a6ba..be26c029546b 100644 ---- a/drivers/media/usb/dvb-usb-v2/lmedm04.c -+++ b/drivers/media/usb/dvb-usb-v2/lmedm04.c -@@ -1076,8 +1076,6 @@ static int dm04_lme2510_frontend_attach(struct dvb_usb_adapter *adap) - - if (adap->fe[0]) { - info("FE Found M88RS2000"); -- dvb_attach(ts2020_attach, adap->fe[0], &ts2020_config, -- &d->i2c_adap); - st->i2c_tuner_gate_w = 5; - st->i2c_tuner_gate_r = 5; - st->i2c_tuner_addr = 0x60; -@@ -1143,17 +1141,18 @@ static int dm04_lme2510_tuner(struct dvb_usb_adapter *adap) - ret = st->tuner_config; - break; - case TUNER_RS2000: -- ret = st->tuner_config; -+ if (dvb_attach(ts2020_attach, adap->fe[0], -+ &ts2020_config, &d->i2c_adap)) -+ ret = st->tuner_config; - break; - default: - break; - } - -- if (ret) -+ if (ret) { - info("TUN Found %s tuner", tun_msg[ret]); -- else { -- info("TUN No tuner found --- resetting device"); -- lme_coldreset(d); -+ } else { -+ info("TUN No tuner found"); - return -ENODEV; - } - diff --git a/CVE-2017-7477.patch b/CVE-2017-7477.patch deleted file mode 100644 index 6405614..0000000 --- a/CVE-2017-7477.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 4d6fa57b4dab0d77f4d8e9d9c73d1e63f6fe8fee Mon Sep 17 00:00:00 2001 -From: "Jason A. Donenfeld" -Date: Fri, 21 Apr 2017 23:14:48 +0200 -Subject: macsec: avoid heap overflow in skb_to_sgvec - -While this may appear as a humdrum one line change, it's actually quite -important. An sk_buff stores data in three places: - -1. A linear chunk of allocated memory in skb->data. This is the easiest - one to work with, but it precludes using scatterdata since the memory - must be linear. -2. The array skb_shinfo(skb)->frags, which is of maximum length - MAX_SKB_FRAGS. This is nice for scattergather, since these fragments - can point to different pages. -3. skb_shinfo(skb)->frag_list, which is a pointer to another sk_buff, - which in turn can have data in either (1) or (2). - -The first two are rather easy to deal with, since they're of a fixed -maximum length, while the third one is not, since there can be -potentially limitless chains of fragments. Fortunately dealing with -frag_list is opt-in for drivers, so drivers don't actually have to deal -with this mess. For whatever reason, macsec decided it wanted pain, and -so it explicitly specified NETIF_F_FRAGLIST. - -Because dealing with (1), (2), and (3) is insane, most users of sk_buff -doing any sort of crypto or paging operation calls a convenient function -called skb_to_sgvec (which happens to be recursive if (3) is in use!). -This takes a sk_buff as input, and writes into its output pointer an -array of scattergather list items. Sometimes people like to declare a -fixed size scattergather list on the stack; othertimes people like to -allocate a fixed size scattergather list on the heap. However, if you're -doing it in a fixed-size fashion, you really shouldn't be using -NETIF_F_FRAGLIST too (unless you're also ensuring the sk_buff and its -frag_list children arent't shared and then you check the number of -fragments in total required.) - -Macsec specifically does this: - - size += sizeof(struct scatterlist) * (MAX_SKB_FRAGS + 1); - tmp = kmalloc(size, GFP_ATOMIC); - *sg = (struct scatterlist *)(tmp + sg_offset); - ... - sg_init_table(sg, MAX_SKB_FRAGS + 1); - skb_to_sgvec(skb, sg, 0, skb->len); - -Specifying MAX_SKB_FRAGS + 1 is the right answer usually, but not if you're -using NETIF_F_FRAGLIST, in which case the call to skb_to_sgvec will -overflow the heap, and disaster ensues. - -Signed-off-by: Jason A. Donenfeld -Cc: stable@vger.kernel.org -Cc: security@kernel.org -Signed-off-by: David S. Miller ---- - drivers/net/macsec.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/net/macsec.c b/drivers/net/macsec.c -index ff0a5ed..dbab05a 100644 ---- a/drivers/net/macsec.c -+++ b/drivers/net/macsec.c -@@ -2716,7 +2716,7 @@ static netdev_tx_t macsec_start_xmit(struct sk_buff *skb, - } - - #define MACSEC_FEATURES \ -- (NETIF_F_SG | NETIF_F_HIGHDMA | NETIF_F_FRAGLIST) -+ (NETIF_F_SG | NETIF_F_HIGHDMA) - static struct lock_class_key macsec_netdev_addr_lock_key; - - static int macsec_dev_init(struct net_device *dev) --- -cgit v1.1 - diff --git a/CVE-2017-7645.patch b/CVE-2017-7645.patch new file mode 100644 index 0000000..0be019c --- /dev/null +++ b/CVE-2017-7645.patch @@ -0,0 +1,180 @@ +From: "J. Bruce Fields" +Date: 2017-04-14 15:04:40 +Subject: [PATCH] nfsd: check for oversized NFSv2/v3 arguments + +A client can append random data to the end of an NFSv2 or NFSv3 RPC call +without our complaining; we'll just stop parsing at the end of the +expected data and ignore the rest. + +Encoded arguments and replies are stored together in an array of pages, +and if a call is too large it could leave inadequate space for the +reply. This is normally OK because NFS RPC's typically have either +short arguments and long replies (like READ) or long arguments and short +replies (like WRITE). But a client that sends an incorrectly long reply +can violate those assumptions. This was observed to cause crashes. + +So, insist that the argument not be any longer than we expect. + +Also, several operations increment rq_next_page in the decode routine +before checking the argument size, which can leave rq_next_page pointing +well past the end of the page array, causing trouble later in +svc_free_pages. + +As followup we may also want to rewrite the encoding routines to check +more carefully that they aren't running off the end of the page array. + +Reported-by: Tuomas Haanpää +Reported-by: Ari Kauppi +Cc: stable@vger.kernel.org +Signed-off-by: J. Bruce Fields +--- + fs/nfsd/nfs3xdr.c | 23 +++++++++++++++++------ + fs/nfsd/nfsxdr.c | 13 ++++++++++--- + include/linux/sunrpc/svc.h | 3 +-- + 3 files changed, 28 insertions(+), 11 deletions(-) + +diff --git a/fs/nfsd/nfs3xdr.c b/fs/nfsd/nfs3xdr.c +index dba2ff8eaa68..be66bcadfaea 100644 +--- a/fs/nfsd/nfs3xdr.c ++++ b/fs/nfsd/nfs3xdr.c +@@ -334,8 +334,11 @@ nfs3svc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, + if (!p) + return 0; + p = xdr_decode_hyper(p, &args->offset); +- + args->count = ntohl(*p++); ++ ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; ++ + len = min(args->count, max_blocksize); + + /* set up the kvec */ +@@ -349,7 +352,7 @@ nfs3svc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, + v++; + } + args->vlen = v; +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +@@ -536,9 +539,11 @@ nfs3svc_decode_readlinkargs(struct svc_rqst *rqstp, __be32 *p, + p = decode_fh(p, &args->fh); + if (!p) + return 0; ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; + args->buffer = page_address(*(rqstp->rq_next_page++)); + +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +@@ -564,10 +569,14 @@ nfs3svc_decode_readdirargs(struct svc_rqst *rqstp, __be32 *p, + args->verf = p; p += 2; + args->dircount = ~0; + args->count = ntohl(*p++); ++ ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; ++ + args->count = min_t(u32, args->count, PAGE_SIZE); + args->buffer = page_address(*(rqstp->rq_next_page++)); + +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +@@ -585,6 +594,9 @@ nfs3svc_decode_readdirplusargs(struct svc_rqst *rqstp, __be32 *p, + args->dircount = ntohl(*p++); + args->count = ntohl(*p++); + ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; ++ + len = args->count = min(args->count, max_blocksize); + while (len > 0) { + struct page *p = *(rqstp->rq_next_page++); +@@ -592,8 +604,7 @@ nfs3svc_decode_readdirplusargs(struct svc_rqst *rqstp, __be32 *p, + args->buffer = page_address(p); + len -= PAGE_SIZE; + } +- +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +diff --git a/fs/nfsd/nfsxdr.c b/fs/nfsd/nfsxdr.c +index 41b468a6a90f..79268369f7b3 100644 +--- a/fs/nfsd/nfsxdr.c ++++ b/fs/nfsd/nfsxdr.c +@@ -257,6 +257,9 @@ nfssvc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, + len = args->count = ntohl(*p++); + p++; /* totalcount - unused */ + ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; ++ + len = min_t(unsigned int, len, NFSSVC_MAXBLKSIZE_V2); + + /* set up somewhere to store response. +@@ -272,7 +275,7 @@ nfssvc_decode_readargs(struct svc_rqst *rqstp, __be32 *p, + v++; + } + args->vlen = v; +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +@@ -360,9 +363,11 @@ nfssvc_decode_readlinkargs(struct svc_rqst *rqstp, __be32 *p, struct nfsd_readli + p = decode_fh(p, &args->fh); + if (!p) + return 0; ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; + args->buffer = page_address(*(rqstp->rq_next_page++)); + +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + int +@@ -400,9 +405,11 @@ nfssvc_decode_readdirargs(struct svc_rqst *rqstp, __be32 *p, + args->cookie = ntohl(*p++); + args->count = ntohl(*p++); + args->count = min_t(u32, args->count, PAGE_SIZE); ++ if (!xdr_argsize_check(rqstp, p)) ++ return 0; + args->buffer = page_address(*(rqstp->rq_next_page++)); + +- return xdr_argsize_check(rqstp, p); ++ return 1; + } + + /* +diff --git a/include/linux/sunrpc/svc.h b/include/linux/sunrpc/svc.h +index e770abeed32d..6ef19cf658b4 100644 +--- a/include/linux/sunrpc/svc.h ++++ b/include/linux/sunrpc/svc.h +@@ -336,8 +336,7 @@ xdr_argsize_check(struct svc_rqst *rqstp, __be32 *p) + { + char *cp = (char *)p; + struct kvec *vec = &rqstp->rq_arg.head[0]; +- return cp >= (char*)vec->iov_base +- && cp <= (char*)vec->iov_base + vec->iov_len; ++ return cp == (char *)vec->iov_base + vec->iov_len; + } + + static inline int +-- +2.9.3 + +-- +To unsubscribe from this list: send the line "unsubscribe linux-nfs" in +the body of a message to majordomo@vger.kernel.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/HID-rmi-Check-that-a-device-is-a-RMI-device-before-c.patch b/HID-rmi-Check-that-a-device-is-a-RMI-device-before-c.patch deleted file mode 100644 index d6a8e6a..0000000 --- a/HID-rmi-Check-that-a-device-is-a-RMI-device-before-c.patch +++ /dev/null @@ -1,54 +0,0 @@ -From ef14a4bf0910d06c7e202552914028d4956809cb Mon Sep 17 00:00:00 2001 -From: Andrew Duggan -Date: Tue, 17 Oct 2017 18:37:36 -0700 -Subject: [PATCH] HID: rmi: Check that a device is a RMI device before calling - RMI functions - -The hid-rmi driver may handle non rmi devices on composite USB devices. -Callbacks need to make sure that the current device is a RMI device before -calling RMI specific functions. Most callbacks already have this check, but -this patch adds checks to the remaining callbacks. - -Reported-by: Hendrik Langer -Tested-by: Hendrik Langer -Reviewed-by: Benjamin Tissoires -Signed-off-by: Andrew Duggan -Signed-off-by: Jiri Kosina ---- - drivers/hid/hid-rmi.c | 13 ++++++++++--- - 1 file changed, 10 insertions(+), 3 deletions(-) - -diff --git a/drivers/hid/hid-rmi.c b/drivers/hid/hid-rmi.c -index ef241d66562e..0f43c4292685 100644 ---- a/drivers/hid/hid-rmi.c -+++ b/drivers/hid/hid-rmi.c -@@ -368,6 +368,11 @@ static int rmi_check_sanity(struct hid_device *hdev, u8 *data, int size) - static int rmi_raw_event(struct hid_device *hdev, - struct hid_report *report, u8 *data, int size) - { -+ struct rmi_data *hdata = hid_get_drvdata(hdev); -+ -+ if (!(hdata->device_flags & RMI_DEVICE)) -+ return 0; -+ - size = rmi_check_sanity(hdev, data, size); - if (size < 2) - return 0; -@@ -713,9 +718,11 @@ static void rmi_remove(struct hid_device *hdev) - { - struct rmi_data *hdata = hid_get_drvdata(hdev); - -- clear_bit(RMI_STARTED, &hdata->flags); -- cancel_work_sync(&hdata->reset_work); -- rmi_unregister_transport_device(&hdata->xport); -+ if (hdata->device_flags & RMI_DEVICE) { -+ clear_bit(RMI_STARTED, &hdata->flags); -+ cancel_work_sync(&hdata->reset_work); -+ rmi_unregister_transport_device(&hdata->xport); -+ } - - hid_hw_stop(hdev); - } --- -2.14.3 - diff --git a/Input-synaptics---Disable-kernel-tracking-on-SMBus-devices.patch b/Input-synaptics---Disable-kernel-tracking-on-SMBus-devices.patch deleted file mode 100644 index 81e858f..0000000 --- a/Input-synaptics---Disable-kernel-tracking-on-SMBus-devices.patch +++ /dev/null @@ -1,51 +0,0 @@ -From patchwork Thu Sep 28 20:07:19 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -Subject: Input: synaptics - Disable kernel tracking on SMBus devices -From: Andrew Duggan -X-Patchwork-Id: 9976729 -Message-Id: <1506629239-5940-1-git-send-email-aduggan@synaptics.com> -To: linux-input@vger.kernel.org, linux-kernel@vger.kernel.org -Cc: Andrew Duggan , - Dmitry Torokhov , - Benjamin Tissoires , - =?UTF-8?q?Kamil=20P=C3=A1ral?= -Date: Thu, 28 Sep 2017 13:07:19 -0700 - -In certain situations kernel tracking seems to be getting confused -and incorrectly reporting the slot of a contact. On example is when -the user does a three finger click or tap and then places two fingers -on the touchpad in the same area. The kernel tracking code seems to -continue to think that there are three contacts on the touchpad and -incorrectly alternates the slot of one of the contacts. The result that -is the input subsystem reports a stream of button press and release -events as the reported slot changes. - -Kernel tracking was originally enabled to prevent cursor jumps, but it -is unclear how much of an issue kernel jumps actually are. This patch -simply disabled kernel tracking for now. - -Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1482640 - -Signed-off-by: Andrew Duggan -Tested-by: Kamil Páral -Acked-by: Benjamin Tissoires ---- - drivers/input/mouse/synaptics.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - -diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c -index 5af0b7d..ee5466a 100644 ---- a/drivers/input/mouse/synaptics.c -+++ b/drivers/input/mouse/synaptics.c -@@ -1709,8 +1709,7 @@ static int synaptics_create_intertouch(struct psmouse *psmouse, - .sensor_pdata = { - .sensor_type = rmi_sensor_touchpad, - .axis_align.flip_y = true, -- /* to prevent cursors jumps: */ -- .kernel_tracking = true, -+ .kernel_tracking = false, - .topbuttonpad = topbuttonpad, - }, - .f30_data = { diff --git a/KEYS-Add-a-system-blacklist-keyring.patch b/KEYS-Add-a-system-blacklist-keyring.patch deleted file mode 100644 index 262c960..0000000 --- a/KEYS-Add-a-system-blacklist-keyring.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 2a54526850121cd0d7cf649a321488b4dab5731d Mon Sep 17 00:00:00 2001 -From: Josh Boyer -Date: Fri, 26 Oct 2012 12:36:24 -0400 -Subject: [PATCH 17/20] KEYS: Add a system blacklist keyring - -This adds an additional keyring that is used to store certificates that -are blacklisted. This keyring is searched first when loading signed modules -and if the module's certificate is found, it will refuse to load. This is -useful in cases where third party certificates are used for module signing. - -Signed-off-by: Josh Boyer ---- - certs/system_keyring.c | 22 ++++++++++++++++++++++ - include/keys/system_keyring.h | 4 ++++ - init/Kconfig | 9 +++++++++ - 3 files changed, 35 insertions(+) - -diff --git a/certs/system_keyring.c b/certs/system_keyring.c -index 50979d6dcecd..787eeead2f57 100644 ---- a/certs/system_keyring.c -+++ b/certs/system_keyring.c -@@ -22,6 +22,9 @@ static struct key *builtin_trusted_keys; - #ifdef CONFIG_SECONDARY_TRUSTED_KEYRING - static struct key *secondary_trusted_keys; - #endif -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+struct key *system_blacklist_keyring; -+#endif - - extern __initconst const u8 system_certificate_list[]; - extern __initconst const unsigned long system_certificate_list_size; -@@ -99,6 +102,16 @@ static __init int system_trusted_keyring_init(void) - if (key_link(secondary_trusted_keys, builtin_trusted_keys) < 0) - panic("Can't link trusted keyrings\n"); - #endif -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+ system_blacklist_keyring = keyring_alloc(".system_blacklist_keyring", -+ KUIDT_INIT(0), KGIDT_INIT(0), current_cred(), -+ ((KEY_POS_ALL & ~KEY_POS_SETATTR) | -+ KEY_USR_VIEW | KEY_USR_READ | KEY_USR_SEARCH), -+ KEY_ALLOC_NOT_IN_QUOTA, -+ NULL, NULL); -+ if (IS_ERR(system_blacklist_keyring)) -+ panic("Can't allocate system blacklist keyring\n"); -+#endif - - return 0; - } -@@ -214,6 +227,15 @@ int verify_pkcs7_signature(const void *data, size_t len, - trusted_keys = builtin_trusted_keys; - #endif - } -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+ ret = pkcs7_validate_trust(pkcs7, system_blacklist_keyring); -+ if (!ret) { -+ /* module is signed with a cert in the blacklist. reject */ -+ pr_err("Module key is in the blacklist\n"); -+ ret = -EKEYREJECTED; -+ goto error; -+ } -+#endif - ret = pkcs7_validate_trust(pkcs7, trusted_keys); - if (ret < 0) { - if (ret == -ENOKEY) -diff --git a/include/keys/system_keyring.h b/include/keys/system_keyring.h -index fbd4647767e9..5bc291a3d261 100644 ---- a/include/keys/system_keyring.h -+++ b/include/keys/system_keyring.h -@@ -33,6 +33,10 @@ extern int restrict_link_by_builtin_and_secondary_trusted( - #define restrict_link_by_builtin_and_secondary_trusted restrict_link_by_builtin_trusted - #endif - -+#ifdef CONFIG_SYSTEM_BLACKLIST_KEYRING -+extern struct key *system_blacklist_keyring; -+#endif -+ - #ifdef CONFIG_IMA_BLACKLIST_KEYRING - extern struct key *ima_blacklist_keyring; - -diff --git a/init/Kconfig b/init/Kconfig -index 34407f15e6d3..461ad575a608 100644 ---- a/init/Kconfig -+++ b/init/Kconfig -@@ -1859,6 +1859,15 @@ config SYSTEM_DATA_VERIFICATION - module verification, kexec image verification and firmware blob - verification. - -+config SYSTEM_BLACKLIST_KEYRING -+ bool "Provide system-wide ring of blacklisted keys" -+ depends on KEYS -+ help -+ Provide a system keyring to which blacklisted keys can be added. -+ Keys in the keyring are considered entirely untrusted. Keys in this -+ keyring are used by the module signature checking to reject loading -+ of modules signed with a blacklisted key. -+ - config PROFILING - bool "Profiling support" - help --- -2.9.3 - diff --git a/PCI-aspm-deal-with-missing-root-ports-in-link-state-handling.patch b/PCI-aspm-deal-with-missing-root-ports-in-link-state-handling.patch new file mode 100644 index 0000000..03b0115 --- /dev/null +++ b/PCI-aspm-deal-with-missing-root-ports-in-link-state-handling.patch @@ -0,0 +1,55 @@ +From patchwork Mon Oct 2 14:08:40 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: PCI: aspm: deal with missing root ports in link state handling +From: Ard Biesheuvel +X-Patchwork-Id: 9980861 +Message-Id: <20171002140840.7767-1-ard.biesheuvel@linaro.org> +To: linux-pci@vger.kernel.org, bhelgaas@google.com +Cc: graeme.gregory@linaro.org, leif.lindholm@linaro.org, + daniel.thompson@Linaro.org, Ard Biesheuvel +Date: Mon, 2 Oct 2017 15:08:40 +0100 + +Even though it is unconventional, some PCIe host implementations omit +the root ports entirely, and simply consist of a host bridge (which +is not modeled as a device in the PCI hierarchy) and a link. + +When the downstream device is an endpoint, our current code does not +seem to mind this unusual configuration. However, when PCIe switches +are involved, the ASPM code assumes that any downstream switch port +has a parent, and blindly derefences the bus->parent->self field of +the pci_dev struct to chain the downstream link state to the link +state of the root port. Given that the root port is missing, the link +is not modeled at all, and nor is the link state, and attempting to +access it results in a NULL pointer dereference and a crash. + +So let's avoid this by allowing the link state chain to terminate at +the downstream port if no root port exists. + +Signed-off-by: Ard Biesheuvel +--- + drivers/pci/pcie/aspm.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c +index 1dfa10cc566b..0bea8498b5a5 100644 +--- a/drivers/pci/pcie/aspm.c ++++ b/drivers/pci/pcie/aspm.c +@@ -802,10 +802,14 @@ static struct pcie_link_state *alloc_pcie_link_state(struct pci_dev *pdev) + + /* + * Root Ports and PCI/PCI-X to PCIe Bridges are roots of PCIe +- * hierarchies. ++ * hierarchies. Note that some PCIe host implementations omit ++ * the root ports entirely, in which case a downstream port on ++ * a switch may become the root of the link state chain for all ++ * its subordinate endpoints. + */ + if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT || +- pci_pcie_type(pdev) == PCI_EXP_TYPE_PCIE_BRIDGE) { ++ pci_pcie_type(pdev) == PCI_EXP_TYPE_PCIE_BRIDGE || ++ !pdev->bus->parent->self) { + link->root = link; + } else { + struct pcie_link_state *parent; diff --git a/RFC-audit-fix-a-race-condition-with-the-auditd-tracking-code.patch b/RFC-audit-fix-a-race-condition-with-the-auditd-tracking-code.patch deleted file mode 100644 index d79fd25..0000000 --- a/RFC-audit-fix-a-race-condition-with-the-auditd-tracking-code.patch +++ /dev/null @@ -1,156 +0,0 @@ -From patchwork Thu Jun 15 15:28:58 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [RFC] audit: fix a race condition with the auditd tracking code -From: Paul Moore -X-Patchwork-Id: 9789009 -Message-Id: <149754053819.11365.5047864735077505545.stgit@sifl> -To: linux-audit@redhat.com -Cc: Dusty Mabe -Date: Thu, 15 Jun 2017 11:28:58 -0400 - -From: Paul Moore - -Originally reported by Adam and Dusty, it appears we have a small -race window in kauditd_thread(), as documented in the Fedora BZ: - - * https://bugzilla.redhat.com/show_bug.cgi?id=1459326#c35 - - "This issue is partly due to the read-copy nature of RCU, and - partly due to how we sync the auditd_connection state across - kauditd_thread and the audit control channel. The kauditd_thread - thread is always running so it can service the record queues and - emit the multicast messages, if it happens to be just past the - "main_queue" label, but before the "if (sk == NULL || ...)" - if-statement which calls auditd_reset() when the new auditd - connection is registered it could end up resetting the auditd - connection, regardless of if it is valid or not. This is a rather - small window and the variable nature of multi-core scheduling - explains why this is proving rather difficult to reproduce." - -The fix is to have functions only call auditd_reset() when they -believe that the kernel/auditd connection is still valid, e.g. -non-NULL, and to have these callers pass their local copy of the -auditd_connection pointer to auditd_reset() where it can be compared -with the current connection state before resetting. If the caller -has a stale state tracking pointer then the reset is ignored. - -We also make a small change to kauditd_thread() so that if the -kernel/auditd connection is dead we skip the retry queue and send the -records straight to the hold queue. This is necessary as we used to -rely on auditd_reset() to occasionally purge the retry queue but we -are going to be calling the reset function much less now and we want -to make sure the retry queue doesn't grow unbounded. - -Reported-by: Adam Williamson -Reported-by: Dusty Mabe -Signed-off-by: Paul Moore -Reviewed-by: Richard Guy Briggs ---- - kernel/audit.c | 36 +++++++++++++++++++++++------------- - 1 file changed, 23 insertions(+), 13 deletions(-) - - --- -Linux-audit mailing list -Linux-audit@redhat.com -https://www.redhat.com/mailman/listinfo/linux-audit - -diff --git a/kernel/audit.c b/kernel/audit.c -index b2e877100242..e1e2b3abfb93 100644 ---- a/kernel/audit.c -+++ b/kernel/audit.c -@@ -575,12 +575,16 @@ static void kauditd_retry_skb(struct sk_buff *skb) - - /** - * auditd_reset - Disconnect the auditd connection -+ * @ac: auditd connection state - * - * Description: - * Break the auditd/kauditd connection and move all the queued records into the -- * hold queue in case auditd reconnects. -+ * hold queue in case auditd reconnects. It is important to note that the @ac -+ * pointer should never be dereferenced inside this function as it may be NULL -+ * or invalid, you can only compare the memory address! If @ac is NULL then -+ * the connection will always be reset. - */ --static void auditd_reset(void) -+static void auditd_reset(const struct auditd_connection *ac) - { - unsigned long flags; - struct sk_buff *skb; -@@ -590,6 +594,11 @@ static void auditd_reset(void) - spin_lock_irqsave(&auditd_conn_lock, flags); - ac_old = rcu_dereference_protected(auditd_conn, - lockdep_is_held(&auditd_conn_lock)); -+ if (ac && ac != ac_old) { -+ /* someone already registered a new auditd connection */ -+ spin_unlock_irqrestore(&auditd_conn_lock, flags); -+ return; -+ } - rcu_assign_pointer(auditd_conn, NULL); - spin_unlock_irqrestore(&auditd_conn_lock, flags); - -@@ -649,8 +658,8 @@ static int auditd_send_unicast_skb(struct sk_buff *skb) - return rc; - - err: -- if (rc == -ECONNREFUSED) -- auditd_reset(); -+ if (ac && rc == -ECONNREFUSED) -+ auditd_reset(ac); - return rc; - } - -@@ -795,9 +804,9 @@ static int kauditd_thread(void *dummy) - rc = kauditd_send_queue(sk, portid, - &audit_hold_queue, UNICAST_RETRIES, - NULL, kauditd_rehold_skb); -- if (rc < 0) { -+ if (ac && rc < 0) { - sk = NULL; -- auditd_reset(); -+ auditd_reset(ac); - goto main_queue; - } - -@@ -805,9 +814,9 @@ static int kauditd_thread(void *dummy) - rc = kauditd_send_queue(sk, portid, - &audit_retry_queue, UNICAST_RETRIES, - NULL, kauditd_hold_skb); -- if (rc < 0) { -+ if (ac && rc < 0) { - sk = NULL; -- auditd_reset(); -+ auditd_reset(ac); - goto main_queue; - } - -@@ -815,12 +824,13 @@ static int kauditd_thread(void *dummy) - /* process the main queue - do the multicast send and attempt - * unicast, dump failed record sends to the retry queue; if - * sk == NULL due to previous failures we will just do the -- * multicast send and move the record to the retry queue */ -+ * multicast send and move the record to the hold queue */ - rc = kauditd_send_queue(sk, portid, &audit_queue, 1, - kauditd_send_multicast_skb, -- kauditd_retry_skb); -- if (sk == NULL || rc < 0) -- auditd_reset(); -+ (sk ? -+ kauditd_retry_skb : kauditd_hold_skb)); -+ if (ac && rc < 0) -+ auditd_reset(ac); - sk = NULL; - - /* drop our netns reference, no auditd sends past this line */ -@@ -1230,7 +1240,7 @@ static int audit_receive_msg(struct sk_buff *skb, struct nlmsghdr *nlh) - auditd_pid, 1); - - /* unregister the auditd connection */ -- auditd_reset(); -+ auditd_reset(NULL); - } - } - if (s.mask & AUDIT_STATUS_RATE_LIMIT) { diff --git a/USB-ulpi-fix-bus-node-lookup.patch b/USB-ulpi-fix-bus-node-lookup.patch new file mode 100644 index 0000000..835cf2a --- /dev/null +++ b/USB-ulpi-fix-bus-node-lookup.patch @@ -0,0 +1,48 @@ +From patchwork Sat Nov 11 15:31:18 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: USB: ulpi: fix bus-node lookup +From: Johan Hovold +X-Patchwork-Id: 10054387 +Message-Id: <20171111153118.16038-1-johan@kernel.org> +To: Heikki Krogerus +Cc: Greg Kroah-Hartman , + linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, + linux-arm-msm@vger.kernel.org, Rob Clark , + Peter Robinson , Johan Hovold , + stable +Date: Sat, 11 Nov 2017 16:31:18 +0100 + +Fix bus-node lookup during registration, which ended up searching the whole +device tree depth-first starting at the parent (or grand parent) rather +than just matching on its children. + +To make things worse, the parent (or grand-parent) node could end being +prematurely freed as well. + +Fixes: ef6a7bcfb01c ("usb: ulpi: Support device discovery via DT") +Reported-by: Peter Robinson +Reported-by: Stephen Boyd +Cc: stable # 4.10 +Signed-off-by: Johan Hovold +--- + drivers/usb/common/ulpi.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/usb/common/ulpi.c b/drivers/usb/common/ulpi.c +index 8b351444cc40..9a2ab6751a23 100644 +--- a/drivers/usb/common/ulpi.c ++++ b/drivers/usb/common/ulpi.c +@@ -180,9 +180,9 @@ static int ulpi_of_register(struct ulpi *ulpi) + /* Find a ulpi bus underneath the parent or the grandparent */ + parent = ulpi->dev.parent; + if (parent->of_node) +- np = of_find_node_by_name(parent->of_node, "ulpi"); ++ np = of_get_child_by_name(parent->of_node, "ulpi"); + else if (parent->parent && parent->parent->of_node) +- np = of_find_node_by_name(parent->parent->of_node, "ulpi"); ++ np = of_get_child_by_name(parent->parent->of_node, "ulpi"); + if (!np) + return 0; + diff --git a/V4-acpi-acpica-fix-acpi-parse-and-parseext-cache-leaks.patch b/V4-acpi-acpica-fix-acpi-parse-and-parseext-cache-leaks.patch deleted file mode 100644 index 60cbe6c..0000000 --- a/V4-acpi-acpica-fix-acpi-parse-and-parseext-cache-leaks.patch +++ /dev/null @@ -1,231 +0,0 @@ -From patchwork Fri Jun 23 09:36:37 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 8bit -Subject: [V4] acpi: acpica: fix acpi parse and parseext cache leaks -From: Seunghun Han -X-Patchwork-Id: 9806085 -Message-Id: <1498210597-112293-1-git-send-email-kkamagui@gmail.com> -To: lv.zheng@intel.com -Cc: robert.moore@intel.com, rafael.j.wysocki@intel.com, - linux-acpi@vger.kernel.org, devel@acpica.org, - linux-kernel@vger.kernel.org, Seunghun Han -Date: Fri, 23 Jun 2017 18:36:37 +0900 - -I'm Seunghun Han, and I work for National Security Research Institute of -South Korea. - -I have been doing a research on ACPI and found an ACPI cache leak in ACPI -early abort cases. - -Boot log of ACPI cache leak is as follows: -[ 0.352414] ACPI: Added _OSI(Module Device) -[ 0.353182] ACPI: Added _OSI(Processor Device) -[ 0.353182] ACPI: Added _OSI(3.0 _SCP Extensions) -[ 0.353182] ACPI: Added _OSI(Processor Aggregator Device) -[ 0.356028] ACPI: Unable to start the ACPI Interpreter -[ 0.356799] ACPI Error: Could not remove SCI handler (20170303/evmisc-281) -[ 0.360215] kmem_cache_destroy Acpi-State: Slab cache still has objects -[ 0.360648] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W -4.12.0-rc4-next-20170608+ #10 -[ 0.361273] Hardware name: innotek GmbH VirtualBox/VirtualBox, BIOS -VirtualBox 12/01/2006 -[ 0.361873] Call Trace: -[ 0.362243] ? dump_stack+0x5c/0x81 -[ 0.362591] ? kmem_cache_destroy+0x1aa/0x1c0 -[ 0.362944] ? acpi_sleep_proc_init+0x27/0x27 -[ 0.363296] ? acpi_os_delete_cache+0xa/0x10 -[ 0.363646] ? acpi_ut_delete_caches+0x6d/0x7b -[ 0.364000] ? acpi_terminate+0xa/0x14 -[ 0.364000] ? acpi_init+0x2af/0x34f -[ 0.364000] ? __class_create+0x4c/0x80 -[ 0.364000] ? video_setup+0x7f/0x7f -[ 0.364000] ? acpi_sleep_proc_init+0x27/0x27 -[ 0.364000] ? do_one_initcall+0x4e/0x1a0 -[ 0.364000] ? kernel_init_freeable+0x189/0x20a -[ 0.364000] ? rest_init+0xc0/0xc0 -[ 0.364000] ? kernel_init+0xa/0x100 -[ 0.364000] ? ret_from_fork+0x25/0x30 - -I analyzed this memory leak in detail. I found that “Acpi-State” cache and -“Acpi-Parse” cache were merged because the size of cache objects was same -slab cache size. - -I finally found “Acpi-Parse” cache and “Acpi-ParseExt” cache were leaked -using SLAB_NEVER_MERGE flag in kmem_cache_create() function. - -Real ACPI cache leak point is as follows: -[ 0.360101] ACPI: Added _OSI(Module Device) -[ 0.360101] ACPI: Added _OSI(Processor Device) -[ 0.360101] ACPI: Added _OSI(3.0 _SCP Extensions) -[ 0.361043] ACPI: Added _OSI(Processor Aggregator Device) -[ 0.364016] ACPI: Unable to start the ACPI Interpreter -[ 0.365061] ACPI Error: Could not remove SCI handler (20170303/evmisc-281) -[ 0.368174] kmem_cache_destroy Acpi-Parse: Slab cache still has objects -[ 0.369332] CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W -4.12.0-rc4-next-20170608+ #8 -[ 0.371256] Hardware name: innotek GmbH VirtualBox/VirtualBox, BIOS -VirtualBox 12/01/2006 -[ 0.372000] Call Trace: -[ 0.372000] ? dump_stack+0x5c/0x81 -[ 0.372000] ? kmem_cache_destroy+0x1aa/0x1c0 -[ 0.372000] ? acpi_sleep_proc_init+0x27/0x27 -[ 0.372000] ? acpi_os_delete_cache+0xa/0x10 -[ 0.372000] ? acpi_ut_delete_caches+0x56/0x7b -[ 0.372000] ? acpi_terminate+0xa/0x14 -[ 0.372000] ? acpi_init+0x2af/0x34f -[ 0.372000] ? __class_create+0x4c/0x80 -[ 0.372000] ? video_setup+0x7f/0x7f -[ 0.372000] ? acpi_sleep_proc_init+0x27/0x27 -[ 0.372000] ? do_one_initcall+0x4e/0x1a0 -[ 0.372000] ? kernel_init_freeable+0x189/0x20a -[ 0.372000] ? rest_init+0xc0/0xc0 -[ 0.372000] ? kernel_init+0xa/0x100 -[ 0.372000] ? ret_from_fork+0x25/0x30 -[ 0.388039] kmem_cache_destroy Acpi-ParseExt: Slab cache still has objects -[ 0.389063] CPU: 1 PID: 1 Comm: swapper/0 Tainted: G W -4.12.0-rc4-next-20170608+ #8 -[ 0.390557] Hardware name: innotek GmbH VirtualBox/VirtualBox, BIOS -VirtualBox 12/01/2006 -[ 0.392000] Call Trace: -[ 0.392000] ? dump_stack+0x5c/0x81 -[ 0.392000] ? kmem_cache_destroy+0x1aa/0x1c0 -[ 0.392000] ? acpi_sleep_proc_init+0x27/0x27 -[ 0.392000] ? acpi_os_delete_cache+0xa/0x10 -[ 0.392000] ? acpi_ut_delete_caches+0x6d/0x7b -[ 0.392000] ? acpi_terminate+0xa/0x14 -[ 0.392000] ? acpi_init+0x2af/0x34f -[ 0.392000] ? __class_create+0x4c/0x80 -[ 0.392000] ? video_setup+0x7f/0x7f -[ 0.392000] ? acpi_sleep_proc_init+0x27/0x27 -[ 0.392000] ? do_one_initcall+0x4e/0x1a0 -[ 0.392000] ? kernel_init_freeable+0x189/0x20a -[ 0.392000] ? rest_init+0xc0/0xc0 -[ 0.392000] ? kernel_init+0xa/0x100 -[ 0.392000] ? ret_from_fork+0x25/0x30 - -When early abort is occurred due to invalid ACPI information, Linux kernel -terminates ACPI by calling acpi_terminate() function. The function calls -acpi_ut_delete_caches() function to delete local caches (acpi_gbl_namespace_ -cache, state_cache, operand_cache, ps_node_cache, ps_node_ext_cache). - -But the deletion codes in acpi_ut_delete_caches() function only delete -slab caches using kmem_cache_destroy() function, therefore the cache -objects should be flushed before acpi_ut_delete_caches() function. - -“Acpi-Parse” cache and “Acpi-ParseExt” cache are used in an AML parse -function, acpi_ps_parse_loop(). The function should have flush codes to -handle an error state due to invalid AML codes. - -This cache leak has a security threat because an old kernel (<= 4.9) shows -memory locations of kernel functions in stack dump. Some malicious users -could use this information to neutralize kernel ASLR. - -To fix ACPI cache leak for enhancing security, I made a patch which has -flush codes in acpi_ps_parse_loop() function. - -I hope that this patch improves the security of Linux kernel. - -Thank you. - -Signed-off-by: Seunghun Han ---- -Changes since v3: change control transfer according to reviewer's comments. -Changes since v2: merge flush code with existing code and change comments. -Changes since v1: move flush code to acpi_ps_complete_final_op() function. - - drivers/acpi/acpica/psobject.c | 53 +++++++++++++----------------------------- - 1 file changed, 16 insertions(+), 37 deletions(-) - -diff --git a/drivers/acpi/acpica/psobject.c b/drivers/acpi/acpica/psobject.c -index 5bcb618..4539391 100644 ---- a/drivers/acpi/acpica/psobject.c -+++ b/drivers/acpi/acpica/psobject.c -@@ -608,7 +608,8 @@ acpi_status - acpi_ps_complete_final_op(struct acpi_walk_state *walk_state, - union acpi_parse_object *op, acpi_status status) - { -- acpi_status status2; -+ acpi_status return_status = AE_OK; -+ u8 ascending = TRUE; - - ACPI_FUNCTION_TRACE_PTR(ps_complete_final_op, walk_state); - -@@ -622,7 +623,8 @@ acpi_ps_complete_final_op(struct acpi_walk_state *walk_state, - op)); - do { - if (op) { -- if (walk_state->ascending_callback != NULL) { -+ if (ascending && -+ walk_state->ascending_callback != NULL) { - walk_state->op = op; - walk_state->op_info = - acpi_ps_get_opcode_info(op->common. -@@ -644,49 +646,26 @@ acpi_ps_complete_final_op(struct acpi_walk_state *walk_state, - } - - if (status == AE_CTRL_TERMINATE) { -- status = AE_OK; -- -- /* Clean up */ -- do { -- if (op) { -- status2 = -- acpi_ps_complete_this_op -- (walk_state, op); -- if (ACPI_FAILURE -- (status2)) { -- return_ACPI_STATUS -- (status2); -- } -- } -- -- acpi_ps_pop_scope(& -- (walk_state-> -- parser_state), -- &op, -- &walk_state-> -- arg_types, -- &walk_state-> -- arg_count); -- -- } while (op); -- -- return_ACPI_STATUS(status); -+ ascending = FALSE; -+ return_status = AE_CTRL_TERMINATE; - } - - else if (ACPI_FAILURE(status)) { - - /* First error is most important */ - -- (void) -- acpi_ps_complete_this_op(walk_state, -- op); -- return_ACPI_STATUS(status); -+ ascending = FALSE; -+ return_status = status; - } - } - -- status2 = acpi_ps_complete_this_op(walk_state, op); -- if (ACPI_FAILURE(status2)) { -- return_ACPI_STATUS(status2); -+ status = acpi_ps_complete_this_op(walk_state, op); -+ if (ACPI_FAILURE(status)) { -+ ascending = FALSE; -+ if (ACPI_SUCCESS(return_status) || -+ return_status == AE_CTRL_TERMINATE) { -+ return_status = status; -+ } - } - } - -@@ -696,5 +675,5 @@ acpi_ps_complete_final_op(struct acpi_walk_state *walk_state, - - } while (op); - -- return_ACPI_STATUS(status); -+ return_ACPI_STATUS(return_status); - } diff --git a/acpi-acpica-fix-acpi-operand-cache-leak-in-dsutils.c.patch b/acpi-acpica-fix-acpi-operand-cache-leak-in-dsutils.c.patch deleted file mode 100644 index 9825deb..0000000 --- a/acpi-acpica-fix-acpi-operand-cache-leak-in-dsutils.c.patch +++ /dev/null @@ -1,107 +0,0 @@ -From patchwork Thu Aug 24 05:11:35 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: acpi: acpica: fix acpi operand cache leak in dsutils.c -From: Seunghun Han -X-Patchwork-Id: 9919053 -Message-Id: <1503551495-33286-1-git-send-email-kkamagui@gmail.com> -To: lv.zheng@intel.com -Cc: robert.moore@intel.com, rafael.j.wysocki@intel.com, - linux-acpi@vger.kernel.org, devel@acpica.org, - linux-kernel@vger.kernel.org, security@kernel.org, - Seunghun Han -Date: Thu, 24 Aug 2017 14:11:35 +0900 - -I found an ACPI cache leak in ACPI early termination and boot continuing case. - -When early termination is occurred due to malicious ACPI table, Linux kernel -terminates ACPI function and continues to boot process. While kernel terminates -ACPI function, kmem_cache_destroy() reports Acpi-Operand cache leak. - -Boot log of ACPI operand cache leak is as follows: ->[ 0.585957] ACPI: Added _OSI(Module Device) ->[ 0.587218] ACPI: Added _OSI(Processor Device) ->[ 0.588530] ACPI: Added _OSI(3.0 _SCP Extensions) ->[ 0.589790] ACPI: Added _OSI(Processor Aggregator Device) ->[ 0.591534] ACPI Error: Illegal I/O port address/length above 64K: C806E00000004002/0x2 (20170303/hwvalid-155) ->[ 0.594351] ACPI Exception: AE_LIMIT, Unable to initialize fixed events (20170303/evevent-88) ->[ 0.597858] ACPI: Unable to start the ACPI Interpreter ->[ 0.599162] ACPI Error: Could not remove SCI handler (20170303/evmisc-281) ->[ 0.601836] kmem_cache_destroy Acpi-Operand: Slab cache still has objects ->[ 0.603556] CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.12.0-rc5 #26 ->[ 0.605159] Hardware name: innotek GmbH VirtualBox/VirtualBox, BIOS VirtualBox 12/01/2006 ->[ 0.609177] Call Trace: ->[ 0.610063] ? dump_stack+0x5c/0x81 ->[ 0.611118] ? kmem_cache_destroy+0x1aa/0x1c0 ->[ 0.612632] ? acpi_sleep_proc_init+0x27/0x27 ->[ 0.613906] ? acpi_os_delete_cache+0xa/0x10 ->[ 0.617986] ? acpi_ut_delete_caches+0x3f/0x7b ->[ 0.619293] ? acpi_terminate+0xa/0x14 ->[ 0.620394] ? acpi_init+0x2af/0x34f ->[ 0.621616] ? __class_create+0x4c/0x80 ->[ 0.623412] ? video_setup+0x7f/0x7f ->[ 0.624585] ? acpi_sleep_proc_init+0x27/0x27 ->[ 0.625861] ? do_one_initcall+0x4e/0x1a0 ->[ 0.627513] ? kernel_init_freeable+0x19e/0x21f ->[ 0.628972] ? rest_init+0x80/0x80 ->[ 0.630043] ? kernel_init+0xa/0x100 ->[ 0.631084] ? ret_from_fork+0x25/0x30 ->[ 0.633343] vgaarb: loaded ->[ 0.635036] EDAC MC: Ver: 3.0.0 ->[ 0.638601] PCI: Probing PCI hardware ->[ 0.639833] PCI host bridge to bus 0000:00 ->[ 0.641031] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] -> ... Continue to boot and log is omitted ... - -I analyzed this memory leak in detail and found acpi_ds_obj_stack_pop_and_ -delete() function miscalculated the top of the stack. acpi_ds_obj_stack_push() -function uses walk_state->operand_index for start position of the top, but -acpi_ds_obj_stack_pop_and_delete() function considers index 0 for it. -Therefore, this causes acpi operand memory leak. - -This cache leak causes a security threat because an old kernel (<= 4.9) shows -memory locations of kernel functions in stack dump. Some malicious users -could use this information to neutralize kernel ASLR. - -I made a patch to fix ACPI operand cache leak. - -Signed-off-by: Seunghun Han ---- - drivers/acpi/acpica/dsutils.c | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - -diff --git a/drivers/acpi/acpica/dsutils.c b/drivers/acpi/acpica/dsutils.c -index 0dabd9b..2c8a060 100644 ---- a/drivers/acpi/acpica/dsutils.c -+++ b/drivers/acpi/acpica/dsutils.c -@@ -705,6 +705,8 @@ acpi_ds_create_operands(struct acpi_walk_state *walk_state, - union acpi_parse_object *arguments[ACPI_OBJ_NUM_OPERANDS]; - u32 arg_count = 0; - u32 index = walk_state->num_operands; -+ u32 prev_num_operands = walk_state->num_operands; -+ u32 new_num_operands; - u32 i; - - ACPI_FUNCTION_TRACE_PTR(ds_create_operands, first_arg); -@@ -733,6 +735,7 @@ acpi_ds_create_operands(struct acpi_walk_state *walk_state, - - /* Create the interpreter arguments, in reverse order */ - -+ new_num_operands = index; - index--; - for (i = 0; i < arg_count; i++) { - arg = arguments[index]; -@@ -757,7 +760,11 @@ acpi_ds_create_operands(struct acpi_walk_state *walk_state, - * pop everything off of the operand stack and delete those - * objects - */ -- acpi_ds_obj_stack_pop_and_delete(arg_count, walk_state); -+ walk_state->num_operands = i; -+ acpi_ds_obj_stack_pop_and_delete(new_num_operands, walk_state); -+ -+ /* Restore operand count */ -+ walk_state->num_operands = prev_num_operands; - - ACPI_EXCEPTION((AE_INFO, status, "While creating Arg %u", index)); - return_ACPI_STATUS(status); diff --git a/acpi-acpica-fix-acpi-operand-cache-leak-in-nseval.c.patch b/acpi-acpica-fix-acpi-operand-cache-leak-in-nseval.c.patch deleted file mode 100644 index 3623a4e..0000000 --- a/acpi-acpica-fix-acpi-operand-cache-leak-in-nseval.c.patch +++ /dev/null @@ -1,96 +0,0 @@ -From patchwork Wed Jul 19 07:07:23 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: acpi: acpica: fix acpi operand cache leak in nseval.c -From: Seunghun Han -X-Patchwork-Id: 9850567 -Message-Id: <1500448043-137615-1-git-send-email-kkamagui@gmail.com> -To: Lv Zheng -Cc: Robert Moore , - "Rafael J. Wysocki" , - linux-acpi@vger.kernel.org, devel@acpica.org, - linux-kernel@vger.kernel.org, security@kernel.org, - Seunghun Han -Date: Wed, 19 Jul 2017 16:07:23 +0900 - -I found an ACPI cache leak in ACPI early termination and boot continuing case. - -When early termination occurs due to malicious ACPI table, Linux kernel -terminates ACPI function and continues to boot process. While kernel terminates -ACPI function, kmem_cache_destroy() reports Acpi-Operand cache leak. - -Boot log of ACPI operand cache leak is as follows: ->[ 0.464168] ACPI: Added _OSI(Module Device) ->[ 0.467022] ACPI: Added _OSI(Processor Device) ->[ 0.469376] ACPI: Added _OSI(3.0 _SCP Extensions) ->[ 0.471647] ACPI: Added _OSI(Processor Aggregator Device) ->[ 0.477997] ACPI Error: Null stack entry at ffff880215c0aad8 (20170303/exresop-174) ->[ 0.482706] ACPI Exception: AE_AML_INTERNAL, While resolving operands for [OpcodeName unavailable] (20170303/dswexec-461) ->[ 0.487503] ACPI Error: Method parse/execution failed [\DBG] (Node ffff88021710ab40), AE_AML_INTERNAL (20170303/psparse-543) ->[ 0.492136] ACPI Error: Method parse/execution failed [\_SB._INI] (Node ffff88021710a618), AE_AML_INTERNAL (20170303/psparse-543) ->[ 0.497683] ACPI: Interpreter enabled ->[ 0.499385] ACPI: (supports S0) ->[ 0.501151] ACPI: Using IOAPIC for interrupt routing ->[ 0.503342] ACPI Error: Null stack entry at ffff880215c0aad8 (20170303/exresop-174) ->[ 0.506522] ACPI Exception: AE_AML_INTERNAL, While resolving operands for [OpcodeName unavailable] (20170303/dswexec-461) ->[ 0.510463] ACPI Error: Method parse/execution failed [\DBG] (Node ffff88021710ab40), AE_AML_INTERNAL (20170303/psparse-543) ->[ 0.514477] ACPI Error: Method parse/execution failed [\_PIC] (Node ffff88021710ab18), AE_AML_INTERNAL (20170303/psparse-543) ->[ 0.518867] ACPI Exception: AE_AML_INTERNAL, Evaluating _PIC (20170303/bus-991) ->[ 0.522384] kmem_cache_destroy Acpi-Operand: Slab cache still has objects ->[ 0.524597] CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.12.0-rc5 #26 ->[ 0.526795] Hardware name: innotek GmbH VirtualBox/VirtualBox, BIOS VirtualBox 12/01/2006 ->[ 0.529668] Call Trace: ->[ 0.530811] ? dump_stack+0x5c/0x81 ->[ 0.532240] ? kmem_cache_destroy+0x1aa/0x1c0 ->[ 0.533905] ? acpi_os_delete_cache+0xa/0x10 ->[ 0.535497] ? acpi_ut_delete_caches+0x3f/0x7b ->[ 0.537237] ? acpi_terminate+0xa/0x14 ->[ 0.538701] ? acpi_init+0x2af/0x34f ->[ 0.540008] ? acpi_sleep_proc_init+0x27/0x27 ->[ 0.541593] ? do_one_initcall+0x4e/0x1a0 ->[ 0.543008] ? kernel_init_freeable+0x19e/0x21f ->[ 0.546202] ? rest_init+0x80/0x80 ->[ 0.547513] ? kernel_init+0xa/0x100 ->[ 0.548817] ? ret_from_fork+0x25/0x30 ->[ 0.550587] vgaarb: loaded ->[ 0.551716] EDAC MC: Ver: 3.0.0 ->[ 0.553744] PCI: Probing PCI hardware ->[ 0.555038] PCI host bridge to bus 0000:00 -> ... Continue to boot and log is omitted ... - -I analyzed this memory leak in detail and found acpi_ns_evaluate() function -only removes info->return_object in AE_CTRL_RETURN_VALUE case. But, when errors -occur, the status value is not AE_CTRL_RETURN_VALUE, and info->return_object is -also not null. Therefore, this causes acpi operand memory leak. - -This cache leak causes a security threat because an old kernel (<= 4.9) shows -memory locations of kernel functions in stack dump. Some malicious users -could use this information to neutralize kernel ASLR. - -I made a patch to fix ACPI operand cache leak. - -Signed-off-by: Seunghun Han ---- - drivers/acpi/acpica/nseval.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/acpi/acpica/nseval.c b/drivers/acpi/acpica/nseval.c -index d22167c..f13d3cf 100644 ---- a/drivers/acpi/acpica/nseval.c -+++ b/drivers/acpi/acpica/nseval.c -@@ -308,6 +308,14 @@ acpi_status acpi_ns_evaluate(struct acpi_evaluate_info *info) - /* Map AE_CTRL_RETURN_VALUE to AE_OK, we are done with it */ - - status = AE_OK; -+ } else if (ACPI_FAILURE(status)) { -+ -+ /* If return_object exists, delete it */ -+ -+ if (info->return_object) { -+ acpi_ut_remove_reference(info->return_object); -+ info->return_object = NULL; -+ } - } - - ACPI_DEBUG_PRINT((ACPI_DB_NAMES, diff --git a/allwinner-net-emac.patch b/allwinner-net-emac.patch index f5d680b..bad1e44 100644 --- a/allwinner-net-emac.patch +++ b/allwinner-net-emac.patch @@ -1,18 +1,575 @@ -From 83e18f0ad4793ea83e03cb8e608bdd2939e76d78 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 4 Sep 2017 13:04:34 +0100 -Subject: [PATCH 1/4] Revert "net: stmmac: sun8i: Remove the compatibles" +From 1b28a544627ddce094091946f06f99bc41d0098f Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 24 Oct 2017 19:57:12 +0200 +Subject: [PATCH 01/11] net: stmmac: snps, dwmac-mdio MDIOs are automatically + registered + +stmmac bindings docs said that its mdio node must have +compatible = "snps,dwmac-mdio"; +Since dwmac-sun8i does not have any good reasons to not doing it, all +their MDIO node must have it. + +Since these compatible is automatically registered, dwmac-sun8i compatible +does not need to be in need_mdio_ids. + +Signed-off-by: Corentin Labbe +--- + drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 ---- + 1 file changed, 4 deletions(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +index 6383695004a5..645ef949705f 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +@@ -318,10 +318,6 @@ static int stmmac_dt_phy(struct plat_stmmacenet_data *plat, + bool mdio = true; + static const struct of_device_id need_mdio_ids[] = { + { .compatible = "snps,dwc-qos-ethernet-4.10" }, +- { .compatible = "allwinner,sun8i-a83t-emac" }, +- { .compatible = "allwinner,sun8i-h3-emac" }, +- { .compatible = "allwinner,sun8i-v3s-emac" }, +- { .compatible = "allwinner,sun50i-a64-emac" }, + {}, + }; + +-- +2.14.3 + +From 9a5b1d9a7614b022512744896d889e76f687e90a Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 24 Oct 2017 19:57:13 +0200 +Subject: [PATCH 02/11] net: stmmac: dwmac-sun8i: Handle integrated/external + MDIOs + +The Allwinner H3 SoC have two distinct MDIO bus, only one could be +active at the same time. +The selection of the active MDIO bus are done via some bits in the EMAC +register of the system controller. + +This patch implement this MDIO switch via a custom MDIO-mux. + +Signed-off-by: Corentin Labbe +Reviewed-by: Andrew Lunn +--- + drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 + + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 353 ++++++++++++++-------- + 2 files changed, 224 insertions(+), 130 deletions(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/Kconfig b/drivers/net/ethernet/stmicro/stmmac/Kconfig +index 97035766c291..e28c0d2c58e9 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/Kconfig ++++ b/drivers/net/ethernet/stmicro/stmmac/Kconfig +@@ -159,6 +159,7 @@ config DWMAC_SUN8I + tristate "Allwinner sun8i GMAC support" + default ARCH_SUNXI + depends on OF && (ARCH_SUNXI || COMPILE_TEST) ++ select MDIO_BUS_MUX + ---help--- + Support for Allwinner H3 A83T A64 EMAC ethernet controllers. + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +index 39c2122a4f26..b3eb344bb158 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -41,14 +42,14 @@ + * This value is used for disabling properly EMAC + * and used as a good starting value in case of the + * boot process(uboot) leave some stuff. +- * @internal_phy: Does the MAC embed an internal PHY ++ * @soc_has_internal_phy: Does the MAC embed an internal PHY + * @support_mii: Does the MAC handle MII + * @support_rmii: Does the MAC handle RMII + * @support_rgmii: Does the MAC handle RGMII + */ + struct emac_variant { + u32 default_syscon_value; +- int internal_phy; ++ bool soc_has_internal_phy; + bool support_mii; + bool support_rmii; + bool support_rgmii; +@@ -61,7 +62,8 @@ struct emac_variant { + * @rst_ephy: reference to the optional EPHY reset for the internal PHY + * @variant: reference to the current board variant + * @regmap: regmap for using the syscon +- * @use_internal_phy: Does the current PHY choice imply using the internal PHY ++ * @internal_phy_powered: Does the internal PHY is enabled ++ * @mux_handle: Internal pointer used by mdio-mux lib + */ + struct sunxi_priv_data { + struct clk *tx_clk; +@@ -70,12 +72,13 @@ struct sunxi_priv_data { + struct reset_control *rst_ephy; + const struct emac_variant *variant; + struct regmap *regmap; +- bool use_internal_phy; ++ bool internal_phy_powered; ++ void *mux_handle; + }; + + static const struct emac_variant emac_variant_h3 = { + .default_syscon_value = 0x58000, +- .internal_phy = PHY_INTERFACE_MODE_MII, ++ .soc_has_internal_phy = true, + .support_mii = true, + .support_rmii = true, + .support_rgmii = true +@@ -83,20 +86,20 @@ static const struct emac_variant emac_variant_h3 = { + + static const struct emac_variant emac_variant_v3s = { + .default_syscon_value = 0x38000, +- .internal_phy = PHY_INTERFACE_MODE_MII, ++ .soc_has_internal_phy = true, + .support_mii = true + }; + + static const struct emac_variant emac_variant_a83t = { + .default_syscon_value = 0, +- .internal_phy = 0, ++ .soc_has_internal_phy = false, + .support_mii = true, + .support_rgmii = true + }; + + static const struct emac_variant emac_variant_a64 = { + .default_syscon_value = 0, +- .internal_phy = 0, ++ .soc_has_internal_phy = false, + .support_mii = true, + .support_rmii = true, + .support_rgmii = true +@@ -195,6 +198,9 @@ static const struct emac_variant emac_variant_a64 = { + #define H3_EPHY_LED_POL BIT(17) /* 1: active low, 0: active high */ + #define H3_EPHY_SHUTDOWN BIT(16) /* 1: shutdown, 0: power up */ + #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */ ++#define H3_EPHY_MUX_MASK (H3_EPHY_SHUTDOWN | H3_EPHY_SELECT) ++#define DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID 1 ++#define DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID 2 + + /* H3/A64 specific bits */ + #define SYSCON_RMII_EN BIT(13) /* 1: enable RMII (overrides EPIT) */ +@@ -634,6 +640,159 @@ static int sun8i_dwmac_reset(struct stmmac_priv *priv) + return 0; + } + ++/* Search in mdio-mux node for internal PHY node and get its clk/reset */ ++static int get_ephy_nodes(struct stmmac_priv *priv) ++{ ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ struct device_node *mdio_mux, *iphynode; ++ struct device_node *mdio_internal; ++ int ret; ++ ++ mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux"); ++ if (!mdio_mux) { ++ dev_err(priv->device, "Cannot get mdio-mux node\n"); ++ return -ENODEV; ++ } ++ ++ mdio_internal = of_find_compatible_node(mdio_mux, NULL, ++ "allwinner,sun8i-h3-mdio-internal"); ++ if (!mdio_internal) { ++ dev_err(priv->device, "Cannot get internal_mdio node\n"); ++ return -ENODEV; ++ } ++ ++ /* Seek for internal PHY */ ++ for_each_child_of_node(mdio_internal, iphynode) { ++ gmac->ephy_clk = of_clk_get(iphynode, 0); ++ if (IS_ERR(gmac->ephy_clk)) ++ continue; ++ gmac->rst_ephy = of_reset_control_get_exclusive(iphynode, NULL); ++ if (IS_ERR(gmac->rst_ephy)) { ++ ret = PTR_ERR(gmac->rst_ephy); ++ if (ret == -EPROBE_DEFER) ++ return ret; ++ continue; ++ } ++ dev_info(priv->device, "Found internal PHY node\n"); ++ return 0; ++ } ++ return -ENODEV; ++} ++ ++static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv) ++{ ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ int ret; ++ ++ if (gmac->internal_phy_powered) { ++ dev_warn(priv->device, "Internal PHY already powered\n"); ++ return 0; ++ } ++ ++ dev_info(priv->device, "Powering internal PHY\n"); ++ ret = clk_prepare_enable(gmac->ephy_clk); ++ if (ret) { ++ dev_err(priv->device, "Cannot enable internal PHY\n"); ++ return ret; ++ } ++ ++ /* Make sure the EPHY is properly reseted, as U-Boot may leave ++ * it at deasserted state, and thus it may fail to reset EMAC. ++ */ ++ reset_control_assert(gmac->rst_ephy); ++ ++ ret = reset_control_deassert(gmac->rst_ephy); ++ if (ret) { ++ dev_err(priv->device, "Cannot deassert internal phy\n"); ++ clk_disable_unprepare(gmac->ephy_clk); ++ return ret; ++ } ++ ++ gmac->internal_phy_powered = true; ++ ++ return 0; ++} ++ ++static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) ++{ ++ if (!gmac->internal_phy_powered) ++ return 0; ++ ++ clk_disable_unprepare(gmac->ephy_clk); ++ reset_control_assert(gmac->rst_ephy); ++ gmac->internal_phy_powered = false; ++ return 0; ++} ++ ++/* MDIO multiplexing switch function ++ * This function is called by the mdio-mux layer when it thinks the mdio bus ++ * multiplexer needs to switch. ++ * 'current_child' is the current value of the mux register ++ * 'desired_child' is the value of the 'reg' property of the target child MDIO ++ * node. ++ * The first time this function is called, current_child == -1. ++ * If current_child == desired_child, then the mux is already set to the ++ * correct bus. ++ */ ++static int mdio_mux_syscon_switch_fn(int current_child, int desired_child, ++ void *data) ++{ ++ struct stmmac_priv *priv = data; ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ u32 reg, val; ++ int ret = 0; ++ bool need_power_ephy = false; ++ ++ if (current_child ^ desired_child) { ++ regmap_read(gmac->regmap, SYSCON_EMAC_REG, ®); ++ switch (desired_child) { ++ case DWMAC_SUN8I_MDIO_MUX_INTERNAL_ID: ++ dev_info(priv->device, "Switch mux to internal PHY"); ++ val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT; ++ ++ need_power_ephy = true; ++ break; ++ case DWMAC_SUN8I_MDIO_MUX_EXTERNAL_ID: ++ dev_info(priv->device, "Switch mux to external PHY"); ++ val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SHUTDOWN; ++ need_power_ephy = false; ++ break; ++ default: ++ dev_err(priv->device, "Invalid child ID %x\n", ++ desired_child); ++ return -EINVAL; ++ } ++ regmap_write(gmac->regmap, SYSCON_EMAC_REG, val); ++ if (need_power_ephy) { ++ ret = sun8i_dwmac_power_internal_phy(priv); ++ if (ret) ++ return ret; ++ } else { ++ sun8i_dwmac_unpower_internal_phy(gmac); ++ } ++ /* After changing syscon value, the MAC need reset or it will ++ * use the last value (and so the last PHY set). ++ */ ++ ret = sun8i_dwmac_reset(priv); ++ } ++ return ret; ++} ++ ++static int sun8i_dwmac_register_mdio_mux(struct stmmac_priv *priv) ++{ ++ int ret; ++ struct device_node *mdio_mux; ++ struct sunxi_priv_data *gmac = priv->plat->bsp_priv; ++ ++ mdio_mux = of_get_child_by_name(priv->device->of_node, "mdio-mux"); ++ if (!mdio_mux) ++ return -ENODEV; ++ ++ ret = mdio_mux_init(priv->device, mdio_mux, mdio_mux_syscon_switch_fn, ++ &gmac->mux_handle, priv, priv->mii); ++ return ret; ++} ++ + static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) + { + struct sunxi_priv_data *gmac = priv->plat->bsp_priv; +@@ -648,35 +807,25 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) + "Current syscon value is not the default %x (expect %x)\n", + val, reg); + +- if (gmac->variant->internal_phy) { +- if (!gmac->use_internal_phy) { +- /* switch to external PHY interface */ +- reg &= ~H3_EPHY_SELECT; +- } else { +- reg |= H3_EPHY_SELECT; +- reg &= ~H3_EPHY_SHUTDOWN; +- dev_dbg(priv->device, "Select internal_phy %x\n", reg); +- +- if (of_property_read_bool(priv->plat->phy_node, +- "allwinner,leds-active-low")) +- reg |= H3_EPHY_LED_POL; +- else +- reg &= ~H3_EPHY_LED_POL; +- +- /* Force EPHY xtal frequency to 24MHz. */ +- reg |= H3_EPHY_CLK_SEL; +- +- ret = of_mdio_parse_addr(priv->device, +- priv->plat->phy_node); +- if (ret < 0) { +- dev_err(priv->device, "Could not parse MDIO addr\n"); +- return ret; +- } +- /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY +- * address. No need to mask it again. +- */ +- reg |= ret << H3_EPHY_ADDR_SHIFT; ++ if (gmac->variant->soc_has_internal_phy) { ++ if (of_property_read_bool(priv->plat->phy_node, ++ "allwinner,leds-active-low")) ++ reg |= H3_EPHY_LED_POL; ++ else ++ reg &= ~H3_EPHY_LED_POL; ++ ++ /* Force EPHY xtal frequency to 24MHz. */ ++ reg |= H3_EPHY_CLK_SEL; ++ ++ ret = of_mdio_parse_addr(priv->device, priv->plat->phy_node); ++ if (ret < 0) { ++ dev_err(priv->device, "Could not parse MDIO addr\n"); ++ return ret; + } ++ /* of_mdio_parse_addr returns a valid (0 ~ 31) PHY ++ * address. No need to mask it again. ++ */ ++ reg |= 1 << H3_EPHY_ADDR_SHIFT; + } + + if (!of_property_read_u32(node, "allwinner,tx-delay-ps", &val)) { +@@ -746,81 +895,21 @@ static void sun8i_dwmac_unset_syscon(struct sunxi_priv_data *gmac) + regmap_write(gmac->regmap, SYSCON_EMAC_REG, reg); + } + +-static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv) ++static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) + { +- struct sunxi_priv_data *gmac = priv->plat->bsp_priv; +- int ret; +- +- if (!gmac->use_internal_phy) +- return 0; +- +- ret = clk_prepare_enable(gmac->ephy_clk); +- if (ret) { +- dev_err(priv->device, "Cannot enable ephy\n"); +- return ret; +- } +- +- /* Make sure the EPHY is properly reseted, as U-Boot may leave +- * it at deasserted state, and thus it may fail to reset EMAC. +- */ +- reset_control_assert(gmac->rst_ephy); ++ struct sunxi_priv_data *gmac = priv; + +- ret = reset_control_deassert(gmac->rst_ephy); +- if (ret) { +- dev_err(priv->device, "Cannot deassert ephy\n"); +- clk_disable_unprepare(gmac->ephy_clk); +- return ret; ++ if (gmac->variant->soc_has_internal_phy) { ++ /* sun8i_dwmac_exit could be called with mdiomux uninit */ ++ if (gmac->mux_handle) ++ mdio_mux_uninit(gmac->mux_handle); ++ if (gmac->internal_phy_powered) ++ sun8i_dwmac_unpower_internal_phy(gmac); + } + +- return 0; +-} +- +-static int sun8i_dwmac_unpower_internal_phy(struct sunxi_priv_data *gmac) +-{ +- if (!gmac->use_internal_phy) +- return 0; +- +- clk_disable_unprepare(gmac->ephy_clk); +- reset_control_assert(gmac->rst_ephy); +- return 0; +-} +- +-/* sun8i_power_phy() - Activate the PHY: +- * In case of error, no need to call sun8i_unpower_phy(), +- * it will be called anyway by sun8i_dwmac_exit() +- */ +-static int sun8i_power_phy(struct stmmac_priv *priv) +-{ +- int ret; +- +- ret = sun8i_dwmac_power_internal_phy(priv); +- if (ret) +- return ret; +- +- ret = sun8i_dwmac_set_syscon(priv); +- if (ret) +- return ret; +- +- /* After changing syscon value, the MAC need reset or it will use +- * the last value (and so the last PHY set. +- */ +- ret = sun8i_dwmac_reset(priv); +- if (ret) +- return ret; +- return 0; +-} +- +-static void sun8i_unpower_phy(struct sunxi_priv_data *gmac) +-{ + sun8i_dwmac_unset_syscon(gmac); +- sun8i_dwmac_unpower_internal_phy(gmac); +-} +- +-static void sun8i_dwmac_exit(struct platform_device *pdev, void *priv) +-{ +- struct sunxi_priv_data *gmac = priv; + +- sun8i_unpower_phy(gmac); ++ reset_control_put(gmac->rst_ephy); + + clk_disable_unprepare(gmac->tx_clk); + +@@ -849,7 +938,7 @@ static struct mac_device_info *sun8i_dwmac_setup(void *ppriv) + if (!mac) + return NULL; + +- ret = sun8i_power_phy(priv); ++ ret = sun8i_dwmac_set_syscon(priv); + if (ret) + return NULL; + +@@ -889,6 +978,8 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) + struct sunxi_priv_data *gmac; + struct device *dev = &pdev->dev; + int ret; ++ struct stmmac_priv *priv; ++ struct net_device *ndev; + + ret = stmmac_get_platform_resources(pdev, &stmmac_res); + if (ret) +@@ -932,29 +1023,6 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) + } + + plat_dat->interface = of_get_phy_mode(dev->of_node); +- if (plat_dat->interface == gmac->variant->internal_phy) { +- dev_info(&pdev->dev, "Will use internal PHY\n"); +- gmac->use_internal_phy = true; +- gmac->ephy_clk = of_clk_get(plat_dat->phy_node, 0); +- if (IS_ERR(gmac->ephy_clk)) { +- ret = PTR_ERR(gmac->ephy_clk); +- dev_err(&pdev->dev, "Cannot get EPHY clock: %d\n", ret); +- return -EINVAL; +- } +- +- gmac->rst_ephy = of_reset_control_get(plat_dat->phy_node, NULL); +- if (IS_ERR(gmac->rst_ephy)) { +- ret = PTR_ERR(gmac->rst_ephy); +- if (ret == -EPROBE_DEFER) +- return ret; +- dev_err(&pdev->dev, "No EPHY reset control found %d\n", +- ret); +- return -EINVAL; +- } +- } else { +- dev_info(&pdev->dev, "Will use external PHY\n"); +- gmac->use_internal_phy = false; +- } + + /* platform data specifying hardware features and callbacks. + * hardware features were copied from Allwinner drivers. +@@ -973,9 +1041,34 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) + + ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); + if (ret) +- sun8i_dwmac_exit(pdev, plat_dat->bsp_priv); ++ goto dwmac_exit; ++ ++ ndev = dev_get_drvdata(&pdev->dev); ++ priv = netdev_priv(ndev); ++ /* The mux must be registered after parent MDIO ++ * so after stmmac_dvr_probe() ++ */ ++ if (gmac->variant->soc_has_internal_phy) { ++ ret = get_ephy_nodes(priv); ++ if (ret) ++ goto dwmac_exit; ++ ret = sun8i_dwmac_register_mdio_mux(priv); ++ if (ret) { ++ dev_err(&pdev->dev, "Failed to register mux\n"); ++ goto dwmac_mux; ++ } ++ } else { ++ ret = sun8i_dwmac_reset(priv); ++ if (ret) ++ goto dwmac_exit; ++ } + + return ret; ++dwmac_mux: ++ sun8i_dwmac_unset_syscon(gmac); ++dwmac_exit: ++ sun8i_dwmac_exit(pdev, plat_dat->bsp_priv); ++return ret; + } + + static const struct of_device_id sun8i_dwmac_match[] = { +-- +2.14.3 + +From f58f11ebb67468471ed8f232c576f348dd1a32b1 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 24 Oct 2017 19:57:14 +0200 +Subject: [PATCH 03/11] net: stmmac: sun8i: Restore the compatibles + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore compatibles about dwmac-sun8i +This reverts commit ad4540cc5aa3 ("net: stmmac: sun8i: Remove the compatibles") -This reverts commit ad4540cc5aa3dccb8e1e12458d57f8c40fae5a1c. +Signed-off-by: Corentin Labbe --- drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -index 39c2122a4f26..fffd6d5fc907 100644 +index b3eb344bb158..e5ff734d4f9b 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c -@@ -979,6 +979,14 @@ static int sun8i_dwmac_probe(struct platform_device *pdev) +@@ -1072,6 +1072,14 @@ return ret; } static const struct of_device_id sun8i_dwmac_match[] = { @@ -28,26 +585,483 @@ index 39c2122a4f26..fffd6d5fc907 100644 }; MODULE_DEVICE_TABLE(of, sun8i_dwmac_match); -- -2.13.5 +2.14.3 + +From 54678636d98cd9625f342c831015e302642bf104 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:08 +0100 +Subject: [PATCH 04/11] dt-bindings: net: Restore sun8i dwmac binding + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore dt-bindings documentation about dwmac-sun8i +This reverts commit 8aa33ec2f481 ("dt-bindings: net: Revert sun8i dwmac binding") + +Signed-off-by: Corentin Labbe +Acked-by: Rob Herring +Acked-by: Florian Fainelli +--- + .../devicetree/bindings/net/dwmac-sun8i.txt | 84 ++++++++++++++++++++++ + 1 file changed, 84 insertions(+) + create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt -From fa4788d88903c1e535d034c3dd3fcd386685a02c Mon Sep 17 00:00:00 2001 +diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt +new file mode 100644 +index 000000000000..725f3b187886 +--- /dev/null ++++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt +@@ -0,0 +1,84 @@ ++* Allwinner sun8i GMAC ethernet controller ++ ++This device is a platform glue layer for stmmac. ++Please see stmmac.txt for the other unchanged properties. ++ ++Required properties: ++- compatible: should be one of the following string: ++ "allwinner,sun8i-a83t-emac" ++ "allwinner,sun8i-h3-emac" ++ "allwinner,sun8i-v3s-emac" ++ "allwinner,sun50i-a64-emac" ++- reg: address and length of the register for the device. ++- interrupts: interrupt for the device ++- interrupt-names: should be "macirq" ++- clocks: A phandle to the reference clock for this device ++- clock-names: should be "stmmaceth" ++- resets: A phandle to the reset control for this device ++- reset-names: should be "stmmaceth" ++- phy-mode: See ethernet.txt ++- phy-handle: See ethernet.txt ++- #address-cells: shall be 1 ++- #size-cells: shall be 0 ++- syscon: A phandle to the syscon of the SoC with one of the following ++ compatible string: ++ - allwinner,sun8i-h3-system-controller ++ - allwinner,sun8i-v3s-system-controller ++ - allwinner,sun50i-a64-system-controller ++ - allwinner,sun8i-a83t-system-controller ++ ++Optional properties: ++- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0) ++- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0) ++Both delay properties need to be a multiple of 100. They control the delay for ++external PHY. ++ ++Optional properties for the following compatibles: ++ - "allwinner,sun8i-h3-emac", ++ - "allwinner,sun8i-v3s-emac": ++- allwinner,leds-active-low: EPHY LEDs are active low ++ ++Required child node of emac: ++- mdio bus node: should be named mdio ++ ++Required properties of the mdio node: ++- #address-cells: shall be 1 ++- #size-cells: shall be 0 ++ ++The device node referenced by "phy" or "phy-handle" should be a child node ++of the mdio node. See phy.txt for the generic PHY bindings. ++ ++Required properties of the phy node with the following compatibles: ++ - "allwinner,sun8i-h3-emac", ++ - "allwinner,sun8i-v3s-emac": ++- clocks: a phandle to the reference clock for the EPHY ++- resets: a phandle to the reset control for the EPHY ++ ++Example: ++ ++emac: ethernet@1c0b000 { ++ compatible = "allwinner,sun8i-h3-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c0b000 0x104>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ int_mii_phy: ethernet-phy@1 { ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++}; +-- +2.14.3 + +From 227bc8c6bfad58c32c7a6c3bbc13d99eb6d266c0 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:09 +0100 +Subject: [PATCH 05/11] dt-bindings: net: dwmac-sun8i: update documentation + about integrated PHY + +This patch add documentation about the MDIO switch used on sun8i-h3-emac +for integrated PHY. + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +Reviewed-by: Andrew Lunn +--- + .../devicetree/bindings/net/dwmac-sun8i.txt | 147 +++++++++++++++++++-- + 1 file changed, 135 insertions(+), 12 deletions(-) + +diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt +index 725f3b187886..3d6d5fa0c4d5 100644 +--- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt ++++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt +@@ -4,18 +4,18 @@ This device is a platform glue layer for stmmac. + Please see stmmac.txt for the other unchanged properties. + + Required properties: +-- compatible: should be one of the following string: ++- compatible: must be one of the following string: + "allwinner,sun8i-a83t-emac" + "allwinner,sun8i-h3-emac" + "allwinner,sun8i-v3s-emac" + "allwinner,sun50i-a64-emac" + - reg: address and length of the register for the device. + - interrupts: interrupt for the device +-- interrupt-names: should be "macirq" ++- interrupt-names: must be "macirq" + - clocks: A phandle to the reference clock for this device +-- clock-names: should be "stmmaceth" ++- clock-names: must be "stmmaceth" + - resets: A phandle to the reset control for this device +-- reset-names: should be "stmmaceth" ++- reset-names: must be "stmmaceth" + - phy-mode: See ethernet.txt + - phy-handle: See ethernet.txt + - #address-cells: shall be 1 +@@ -39,23 +39,42 @@ Optional properties for the following compatibles: + - allwinner,leds-active-low: EPHY LEDs are active low + + Required child node of emac: +-- mdio bus node: should be named mdio ++- mdio bus node: should be named mdio with compatible "snps,dwmac-mdio" + + Required properties of the mdio node: + - #address-cells: shall be 1 + - #size-cells: shall be 0 + +-The device node referenced by "phy" or "phy-handle" should be a child node ++The device node referenced by "phy" or "phy-handle" must be a child node + of the mdio node. See phy.txt for the generic PHY bindings. + +-Required properties of the phy node with the following compatibles: ++The following compatibles require that the emac node have a mdio-mux child ++node called "mdio-mux": ++ - "allwinner,sun8i-h3-emac" ++ - "allwinner,sun8i-v3s-emac": ++Required properties for the mdio-mux node: ++ - compatible = "allwinner,sun8i-h3-mdio-mux" ++ - mdio-parent-bus: a phandle to EMAC mdio ++ - one child mdio for the integrated mdio with the compatible ++ "allwinner,sun8i-h3-mdio-internal" ++ - one child mdio for the external mdio if present (V3s have none) ++Required properties for the mdio-mux children node: ++ - reg: 1 for internal MDIO bus, 2 for external MDIO bus ++ ++The following compatibles require a PHY node representing the integrated ++PHY, under the integrated MDIO bus node if an mdio-mux node is used: + - "allwinner,sun8i-h3-emac", + - "allwinner,sun8i-v3s-emac": ++ ++Additional information regarding generic multiplexer properties can be found ++at Documentation/devicetree/bindings/net/mdio-mux.txt ++ ++Required properties of the integrated phy node: + - clocks: a phandle to the reference clock for the EPHY + - resets: a phandle to the reset control for the EPHY ++- Must be a child of the integrated mdio + +-Example: +- ++Example with integrated PHY: + emac: ethernet@1c0b000 { + compatible = "allwinner,sun8i-h3-emac"; + syscon = <&syscon>; +@@ -72,13 +91,117 @@ emac: ethernet@1c0b000 { + phy-handle = <&int_mii_phy>; + phy-mode = "mii"; + allwinner,leds-active-low; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ }; ++ ++ mdio-mux { ++ compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio-parent-bus = <&mdio>; ++ ++ int_mdio: mdio@1 { ++ compatible = "allwinner,sun8i-h3-mdio-internal"; ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ int_mii_phy: ethernet-phy@1 { ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ phy-is-integrated; ++ }; ++ }; ++ ext_mdio: mdio@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ }; ++}; ++ ++Example with external PHY: ++emac: ethernet@1c0b000 { ++ compatible = "allwinner,sun8i-h3-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c0b000 0x104>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ allwinner,leds-active-low; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ compatible = "snps,dwmac-mdio"; ++ }; ++ ++ mdio-mux { ++ compatible = "allwinner,sun8i-h3-mdio-mux"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio-parent-bus = <&mdio>; ++ ++ int_mdio: mdio@1 { ++ compatible = "allwinner,sun8i-h3-mdio-internal"; ++ reg = <1>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ int_mii_phy: ethernet-phy@1 { ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++ ext_mdio: mdio@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ext_rgmii_phy: ethernet-phy@1 { ++ reg = <1>; ++ }; ++ }: ++ }; ++}; ++ ++Example with SoC without integrated PHY ++ ++emac: ethernet@1c0b000 { ++ compatible = "allwinner,sun8i-a83t-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c0b000 0x104>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ + mdio: mdio { ++ compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; +- int_mii_phy: ethernet-phy@1 { ++ ext_rgmii_phy: ethernet-phy@1 { + reg = <1>; +- clocks = <&ccu CLK_BUS_EPHY>; +- resets = <&ccu RST_BUS_EPHY>; + }; + }; + }; +-- +2.14.3 + +From 1de79efa35a1130c7a085f62b9d9b666d79b9a89 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Mon, 4 Sep 2017 13:04:41 +0100 -Subject: [PATCH 2/4] Revert "arm: dts: sunxi: Revert EMAC changes" +Date: Wed, 1 Nov 2017 14:04:20 +0000 +Subject: [PATCH 06/11] arm: dts: sunxi: h3/h5: Restore EMAC changes + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore sunxi-h3-h5.dtsi +This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes") -This reverts commit fe45174b72aead678da581bab9e9a37c9b26a070. +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli --- - arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 ++++++++ - arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 +++++++++++++++++ - arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 ++++++ - arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 +++++++ - arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 +++++++ + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 ++++++++++++++++++++++++++ + 1 file changed, 26 insertions(+) + +diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +index 11240a8313c2..d38282b9e5d4 100644 +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -391,6 +391,32 @@ + clocks = <&osc24M>; + }; + ++ emac: ethernet@1c30000 { ++ compatible = "allwinner,sun8i-h3-emac"; ++ syscon = <&syscon>; ++ reg = <0x01c30000 0x10000>; ++ interrupts = ; ++ interrupt-names = "macirq"; ++ resets = <&ccu RST_BUS_EMAC>; ++ reset-names = "stmmaceth"; ++ clocks = <&ccu CLK_BUS_EMAC>; ++ clock-names = "stmmaceth"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "disabled"; ++ ++ mdio: mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ int_mii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++ }; ++ + spi0: spi@01c68000 { + compatible = "allwinner,sun8i-h3-spi"; + reg = <0x01c68000 0x1000>; +-- +2.14.3 + +From 65233cba93184e0efa8d94f907d65af947d197a1 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:11 +0100 +Subject: [PATCH 07/11] ARM: dts: sunxi: h3/h5: represent the mdio switch used + by sun8i-h3-emac + +Since dwmac-sun8i could use either an integrated PHY or an external PHY +(which could be at same MDIO address), we need to represent this selection +by a MDIO switch. + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +Reviewed-by: Andrew Lunn +--- + arch/arm/boot/dts/sunxi-h3-h5.dtsi | 31 +++++++++++++++++++++++++++---- + 1 file changed, 27 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +index d38282b9e5d4..2721b39c1875 100644 +--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi ++++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi +@@ -408,11 +408,34 @@ + mdio: mdio { + #address-cells = <1>; + #size-cells = <0>; +- int_mii_phy: ethernet-phy@1 { +- compatible = "ethernet-phy-ieee802.3-c22"; ++ compatible = "snps,dwmac-mdio"; ++ }; ++ ++ mdio-mux { ++ compatible = "allwinner,sun8i-h3-mdio-mux"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mdio-parent-bus = <&mdio>; ++ /* Only one MDIO is usable at the time */ ++ internal_mdio: mdio@1 { ++ compatible = "allwinner,sun8i-h3-mdio-internal"; + reg = <1>; +- clocks = <&ccu CLK_BUS_EPHY>; +- resets = <&ccu RST_BUS_EPHY>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ int_mii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ clocks = <&ccu CLK_BUS_EPHY>; ++ resets = <&ccu RST_BUS_EPHY>; ++ }; ++ }; ++ ++ external_mdio: mdio@2 { ++ reg = <2>; ++ #address-cells = <1>; ++ #size-cells = <0>; + }; + }; + }; +-- +2.14.3 + +From b705315d36dbe1b31062f30c987b3a502b437c85 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 1 Nov 2017 14:08:45 +0000 +Subject: [PATCH 08/11] ARM: dts: sunxi: Restore EMAC changes (boards) + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore all boards DT about dwmac-sun8i +This reverts partially commit fe45174b72ae ("arm: dts: sunxi: Revert EMAC changes") + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +--- + arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 +++++++++ + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 +++++++++++++++++++ + arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 19 +++++++++++++++++++ + arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 +++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 ++++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 ++++++++ arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +++++ - arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 +++++++ - arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 +++++++++++++++++++ - arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 16 ++++++++++++++ - arch/arm/boot/dts/sunxi-h3-h5.dtsi | 26 +++++++++++++++++++++++ - 10 files changed, 128 insertions(+) + arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 ++++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 ++++++++++++++++++++++ + arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 16 ++++++++++++++++ + 10 files changed, 121 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts index b1502df7b509..6713d0f2b3f4 100644 @@ -77,7 +1091,7 @@ index b1502df7b509..6713d0f2b3f4 100644 pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>; diff --git a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts -index a337af1de322..d756ff825116 100644 +index a337af1de322..3f95d806355b 100644 --- a/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts @@ -52,6 +52,7 @@ @@ -88,7 +1102,7 @@ index a337af1de322..d756ff825116 100644 serial0 = &uart0; serial1 = &uart1; }; -@@ -114,12 +115,30 @@ +@@ -114,6 +115,24 @@ status = "okay"; }; @@ -103,22 +1117,43 @@ index a337af1de322..d756ff825116 100644 + status = "okay"; +}; + - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - status = "okay"; - }; - -+&mdio { ++&external_mdio { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0>; ++ }; ++}; ++ + &ir { + pinctrl-names = "default"; + pinctrl-0 = <&ir_pins_a>; +diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +index 8ddd1b2cc097..ef0371811296 100644 +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +@@ -62,3 +62,22 @@ + &ohci2 { + status = "okay"; + }; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ ++ allwinner,leds-active-low; ++ ++ status = "okay"; ++}; ++ ++&external_mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <0>; ++ reg = <7>; + }; +}; -+ - &mmc0 { - pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts index 8d2cc6e9a03f..78f6c24952dd 100644 --- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts @@ -229,7 +1264,7 @@ index 1a044b17d6c6..998b60f8d295 100644 pinctrl-names = "default"; pinctrl-0 = <&ir_pins_a>; diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts -index 828ae7a526d9..331ed683ac62 100644 +index 828ae7a526d9..3002c025e187 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts @@ -47,6 +47,10 @@ @@ -258,7 +1293,7 @@ index 828ae7a526d9..331ed683ac62 100644 + status = "okay"; +}; + -+&mdio { ++&external_mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; @@ -269,7 +1304,7 @@ index 828ae7a526d9..331ed683ac62 100644 pinctrl-names = "default"; pinctrl-0 = <&mmc2_8bit_pins>; diff --git a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts -index 97920b12a944..80026f3caafc 100644 +index 97920b12a944..6dbf7b2e0c13 100644 --- a/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts +++ b/arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts @@ -61,3 +61,19 @@ @@ -286,71 +1321,39 @@ index 97920b12a944..80026f3caafc 100644 + status = "okay"; +}; + -+&mdio { ++&external_mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; -diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -index 11240a8313c2..d38282b9e5d4 100644 ---- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -391,6 +391,32 @@ - clocks = <&osc24M>; - }; - -+ emac: ethernet@1c30000 { -+ compatible = "allwinner,sun8i-h3-emac"; -+ syscon = <&syscon>; -+ reg = <0x01c30000 0x10000>; -+ interrupts = ; -+ interrupt-names = "macirq"; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "stmmaceth"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ status = "disabled"; -+ -+ mdio: mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ int_mii_phy: ethernet-phy@1 { -+ compatible = "ethernet-phy-ieee802.3-c22"; -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; -+ }; -+ }; -+ }; -+ - spi0: spi@01c68000 { - compatible = "allwinner,sun8i-h3-spi"; - reg = <0x01c68000 0x1000>; -- -2.13.5 +2.14.3 -From 4aba5ca95496899165ee7ceef5d9c60a6e7b15dd Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Mon, 4 Sep 2017 13:04:47 +0100 -Subject: [PATCH 3/4] Revert "arm64: dts: allwinner: Revert EMAC changes" +From 516b88bfa40cf54732d2ba5e689fdf592a742ec3 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:13 +0100 +Subject: [PATCH 09/11] arm64: dts: allwinner: A64: Restore EMAC changes + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore arm64 DT about dwmac-sun8i for A64 +This reverts commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes") -This reverts commit 87e1f5e8bb4bd584de0a8f3b1e42196dca221d02. +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli --- .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16 ++++++++++++++++ .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 15 +++++++++++++++ arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 +++++++++++++++++ .../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 16 ++++++++++++++++ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 20 ++++++++++++++++++++ - .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +++++++++++++++++ - .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 +++++++++++++++++ - .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 +++++++++++++++++ - 8 files changed, 135 insertions(+) + 5 files changed, 84 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts -index 6872135d7f84..ba2fde2909f9 100644 +index d347f52e27f6..45bdbfb96126 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts @@ -51,6 +51,7 @@ @@ -361,8 +1364,8 @@ index 6872135d7f84..ba2fde2909f9 100644 serial0 = &uart0; serial1 = &uart1; }; -@@ -67,6 +68,14 @@ - }; +@@ -69,6 +70,14 @@ + status = "okay"; }; +&emac { @@ -376,7 +1379,7 @@ index 6872135d7f84..ba2fde2909f9 100644 &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; -@@ -77,6 +86,13 @@ +@@ -79,6 +88,13 @@ bias-pull-up; }; @@ -414,7 +1417,7 @@ index f82ccf332c0f..24f1aac366d6 100644 + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts -index 7c533b6d4ba9..827168bc22ed 100644 +index d06e34b5d192..806442d3e846 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts @@ -51,6 +51,7 @@ @@ -425,7 +1428,7 @@ index 7c533b6d4ba9..827168bc22ed 100644 serial0 = &uart0; serial1 = &uart1; serial2 = &uart2; -@@ -78,6 +79,15 @@ +@@ -71,6 +72,15 @@ status = "okay"; }; @@ -441,7 +1444,7 @@ index 7c533b6d4ba9..827168bc22ed 100644 &i2c1 { pinctrl-names = "default"; pinctrl-0 = <&i2c1_pins>; -@@ -88,6 +98,13 @@ +@@ -81,6 +91,13 @@ bias-pull-up; }; @@ -456,7 +1459,7 @@ index 7c533b6d4ba9..827168bc22ed 100644 pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts -index d891a1a27f6c..216e3a5dafae 100644 +index 17ccc12b58df..0eb2acedf8c3 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts @@ -53,6 +53,7 @@ @@ -490,7 +1493,7 @@ index d891a1a27f6c..216e3a5dafae 100644 pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi -index 68aadc9b96dc..bd0f33b77f57 100644 +index 8c8db1b057df..50f17bab0c07 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi @@ -449,6 +449,26 @@ @@ -520,8 +1523,31 @@ index 68aadc9b96dc..bd0f33b77f57 100644 gic: interrupt-controller@1c81000 { compatible = "arm,gic-400"; reg = <0x01c81000 0x1000>, +-- +2.14.3 + +From 070173449eb88e9cf9c91889c77f53616911f4d0 Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:14 +0100 +Subject: [PATCH 10/11] arm64: dts: allwinner: H5: Restore EMAC changes + +The original dwmac-sun8i DT bindings have some issue on how to handle +integrated PHY and was reverted in last RC of 4.13. +But now we have a solution so we need to get back that was reverted. + +This patch restore arm64 DT about dwmac-sun8i for H5 +This reverts a part of commit 87e1f5e8bb4b ("arm64: dts: allwinner: Revert EMAC changes") + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +--- + arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 +++++++++++++++++ + .../arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 +++++++++++++++++ + .../boot/dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 +++++++++++++++++ + 3 files changed, 51 insertions(+) + diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts -index 1c2387bd5df6..968908761194 100644 +index 1c2387bd5df6..6eb8092d8e57 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts @@ -50,6 +50,7 @@ @@ -545,7 +1571,7 @@ index 1c2387bd5df6..968908761194 100644 + status = "okay"; +}; + -+&mdio { ++&external_mdio { + ext_rgmii_phy: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <7>; @@ -556,7 +1582,7 @@ index 1c2387bd5df6..968908761194 100644 pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts -index 4f77c8470f6c..a8296feee884 100644 +index 4f77c8470f6c..a0ca925175aa 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts @@ -59,6 +59,7 @@ @@ -567,7 +1593,7 @@ index 4f77c8470f6c..a8296feee884 100644 serial0 = &uart0; }; -@@ -136,12 +137,28 @@ +@@ -136,6 +137,22 @@ status = "okay"; }; @@ -580,24 +1606,18 @@ index 4f77c8470f6c..a8296feee884 100644 + status = "okay"; +}; + - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - status = "okay"; - }; - -+&mdio { ++&external_mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + - &mmc0 { + &ir { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + pinctrl-0 = <&ir_pins_a>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts -index 6be06873e5af..d906b302cbcd 100644 +index 6be06873e5af..b47790650144 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts @@ -54,6 +54,7 @@ @@ -608,7 +1628,7 @@ index 6be06873e5af..d906b302cbcd 100644 serial0 = &uart0; }; -@@ -143,12 +144,28 @@ +@@ -143,6 +144,22 @@ status = "okay"; }; @@ -621,126 +1641,334 @@ index 6be06873e5af..d906b302cbcd 100644 + status = "okay"; +}; + - &ir { - pinctrl-names = "default"; - pinctrl-0 = <&ir_pins_a>; - status = "okay"; - }; - -+&mdio { ++&external_mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + - &mmc0 { + &ir { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; + pinctrl-0 = <&ir_pins_a>; +-- +2.14.3 + +From 63118a9f7808a0a67c23e7d276138c996e094eae Mon Sep 17 00:00:00 2001 +From: Corentin LABBE +Date: Tue, 31 Oct 2017 09:19:15 +0100 +Subject: [PATCH 11/11] arm64: dts: allwinner: add snps, dwmac-mdio compatible + to emac/mdio + +stmmac bindings docs said that its mdio node must have +compatible = "snps,dwmac-mdio"; +Since dwmac-sun8i does not have any good reasons to not doing it, all +their MDIO node must have it. + +Signed-off-by: Corentin Labbe +Acked-by: Florian Fainelli +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +index 50f17bab0c07..8fd75c95937a 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -464,6 +464,7 @@ + #size-cells = <0>; + + mdio: mdio { ++ compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + }; -- -2.13.5 +2.14.3 + +From patchwork Fri Nov 10 09:26:54 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: arm64: allwinner: a64: add Ethernet PHY regulator for several boards +From: Icenowy Zheng +X-Patchwork-Id: 10052659 +Message-Id: <20171110092654.10746-1-icenowy@aosc.io> +To: Maxime Ripard , + Chen-Yu Tsai +Cc: linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, Icenowy Zheng +Date: Fri, 10 Nov 2017 17:26:54 +0800 + +On several A64 boards the Ethernet PHY is powered by the DC1SW regulator +on the AXP803 PMIC. + +Add phy-handle property to these boards' emac node. + +Signed-off-by: Icenowy Zheng +Acked-by: Corentin LABBE +Tested-by: Corentin LABBE +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 1 + + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 1 + + arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts | 1 + + 3 files changed, 3 insertions(+) -From 11190f020b948ccdf15061b6df8cc2836a2afcb1 Mon Sep 17 00:00:00 2001 +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +index 45bdbfb96126..4a8d3f83a36e 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts +@@ -75,6 +75,7 @@ + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; ++ phy-supply = <®_dc1sw>; + status = "okay"; + }; + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +index 806442d3e846..604cdaedac38 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +@@ -77,6 +77,7 @@ + pinctrl-0 = <&rmii_pins>; + phy-mode = "rmii"; + phy-handle = <&ext_rmii_phy1>; ++ phy-supply = <®_dc1sw>; + status = "okay"; + + }; +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +index 0eb2acedf8c3..a053a6ac5267 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +@@ -82,6 +82,7 @@ + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; ++ phy-supply = <®_dc1sw>; + status = "okay"; + }; + +From 79e7d6c8bfe67fce8c8fe4953e74ce7f420dd732 Mon Sep 17 00:00:00 2001 From: Peter Robinson -Date: Mon, 4 Sep 2017 13:04:55 +0100 -Subject: [PATCH 4/4] Revert "dt-bindings: net: Revert sun8i dwmac binding" +Date: Tue, 21 Nov 2017 15:43:19 +0000 +Subject: [PATCH] ARM: dts: sunxi: sun8i-h3-nanopi-m1-plus: Add missing + regulator -This reverts commit 8aa33ec2f4812d1ee96f4c02ba013f5b9c514343. +This patch add the missing regulator for sun8i-h3-nanopi-m1-plus. + +Fixes: ("ARM: dts: sunxi: Restore EMAC changes (boards)") +Signed-off-by: Corentin Labbe --- - .../devicetree/bindings/net/dwmac-sun8i.txt | 84 ++++++++++++++++++++++ - 1 file changed, 84 insertions(+) - create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt + arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 11 +++++++++++ + 1 file changed, 11 insertions(+) -diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt -new file mode 100644 -index 000000000000..725f3b187886 ---- /dev/null -+++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt -@@ -0,0 +1,84 @@ -+* Allwinner sun8i GMAC ethernet controller -+ -+This device is a platform glue layer for stmmac. -+Please see stmmac.txt for the other unchanged properties. -+ -+Required properties: -+- compatible: should be one of the following string: -+ "allwinner,sun8i-a83t-emac" -+ "allwinner,sun8i-h3-emac" -+ "allwinner,sun8i-v3s-emac" -+ "allwinner,sun50i-a64-emac" -+- reg: address and length of the register for the device. -+- interrupts: interrupt for the device -+- interrupt-names: should be "macirq" -+- clocks: A phandle to the reference clock for this device -+- clock-names: should be "stmmaceth" -+- resets: A phandle to the reset control for this device -+- reset-names: should be "stmmaceth" -+- phy-mode: See ethernet.txt -+- phy-handle: See ethernet.txt -+- #address-cells: shall be 1 -+- #size-cells: shall be 0 -+- syscon: A phandle to the syscon of the SoC with one of the following -+ compatible string: -+ - allwinner,sun8i-h3-system-controller -+ - allwinner,sun8i-v3s-system-controller -+ - allwinner,sun50i-a64-system-controller -+ - allwinner,sun8i-a83t-system-controller +diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +index ef0371811296..738ef1d9e844 100644 +--- a/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +@@ -45,6 +45,17 @@ + / { + model = "FriendlyArm NanoPi M1 Plus"; + compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3"; + -+Optional properties: -+- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0) -+- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0) -+Both delay properties need to be a multiple of 100. They control the delay for -+external PHY. -+ -+Optional properties for the following compatibles: -+ - "allwinner,sun8i-h3-emac", -+ - "allwinner,sun8i-v3s-emac": -+- allwinner,leds-active-low: EPHY LEDs are active low -+ -+Required child node of emac: -+- mdio bus node: should be named mdio -+ -+Required properties of the mdio node: -+- #address-cells: shall be 1 -+- #size-cells: shall be 0 -+ -+The device node referenced by "phy" or "phy-handle" should be a child node -+of the mdio node. See phy.txt for the generic PHY bindings. -+ -+Required properties of the phy node with the following compatibles: -+ - "allwinner,sun8i-h3-emac", -+ - "allwinner,sun8i-v3s-emac": -+- clocks: a phandle to the reference clock for the EPHY -+- resets: a phandle to the reset control for the EPHY ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; ++ }; + -+Example: + }; + + &ehci1 { +-- +2.14.3 + +From 4497478c60c04d2bf37082e27fc98f4f835db96b Mon Sep 17 00:00:00 2001 +From: Niklas Cassel +Date: Tue, 14 Nov 2017 11:15:54 +0100 +Subject: net: stmmac: fix LPI transitioning for dwmac4 + +The LPI transitioning logic in stmmac_main uses +priv->tx_path_in_lpi_mode to enter/exit LPI. + +However, priv->tx_path_in_lpi_mode is assigned +using the return value from host_irq_status(). + +So for dwmac4, priv->tx_path_in_lpi_mode was always false, +so stmmac_tx_clean() would always try to put us in eee mode, +and stmmac_xmit() would never take us out of eee mode. + +To fix this, make host_irq_status() read and return the LPI +irq status also for dwmac4. + +This also increments the existing LPI counters, so that +ethtool --statistics shows LPI transitions also for dwmac4. + +For dwmac1000, irqs are enabled/disabled using the register +named "Interrupt Mask Register", and thus setting a bit disables +that specific irq. + +For dwmac4 the matching register is named "MAC_Interrupt_Enable", +and thus setting a bit enables that specific irq. + +Looking at dwmac1000_core.c, the irqs that are always enabled are: +LPI and PMT. + +Looking at dwmac4_core.c, the irqs that are always enabled are: +PMT. + +To be able to read the LPI irq status, we need to enable the LPI +irq also for dwmac4. + +Signed-off-by: Niklas Cassel +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 7 ++++++- + drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c | 19 +++++++++++++++++++ + 2 files changed, 25 insertions(+), 1 deletion(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +index aeda3ab..789dad8 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +@@ -98,7 +98,7 @@ + #define GMAC_PCS_IRQ_DEFAULT (GMAC_INT_RGSMIIS | GMAC_INT_PCS_LINK | \ + GMAC_INT_PCS_ANE) + +-#define GMAC_INT_DEFAULT_MASK GMAC_INT_PMT_EN ++#define GMAC_INT_DEFAULT_MASK (GMAC_INT_PMT_EN | GMAC_INT_LPI_EN) + + enum dwmac4_irq_status { + time_stamp_irq = 0x00001000, +@@ -106,6 +106,7 @@ enum dwmac4_irq_status { + mmc_tx_irq = 0x00000400, + mmc_rx_irq = 0x00000200, + mmc_irq = 0x00000100, ++ lpi_irq = 0x00000020, + pmt_irq = 0x00000010, + }; + +@@ -132,6 +133,10 @@ enum power_event { + #define GMAC4_LPI_CTRL_STATUS_LPITXA BIT(19) /* Enable LPI TX Automate */ + #define GMAC4_LPI_CTRL_STATUS_PLS BIT(17) /* PHY Link Status */ + #define GMAC4_LPI_CTRL_STATUS_LPIEN BIT(16) /* LPI Enable */ ++#define GMAC4_LPI_CTRL_STATUS_RLPIEX BIT(3) /* Receive LPI Exit */ ++#define GMAC4_LPI_CTRL_STATUS_RLPIEN BIT(2) /* Receive LPI Entry */ ++#define GMAC4_LPI_CTRL_STATUS_TLPIEX BIT(1) /* Transmit LPI Exit */ ++#define GMAC4_LPI_CTRL_STATUS_TLPIEN BIT(0) /* Transmit LPI Entry */ + + /* MAC Debug bitmap */ + #define GMAC_DEBUG_TFCSTS_MASK GENMASK(18, 17) +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +index 2f7d7ec..f3ed8f7 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c +@@ -580,6 +580,25 @@ static int dwmac4_irq_status(struct mac_device_info *hw, + x->irq_receive_pmt_irq_n++; + } + ++ /* MAC tx/rx EEE LPI entry/exit interrupts */ ++ if (intr_status & lpi_irq) { ++ /* Clear LPI interrupt by reading MAC_LPI_Control_Status */ ++ u32 status = readl(ioaddr + GMAC4_LPI_CTRL_STATUS); + -+emac: ethernet@1c0b000 { -+ compatible = "allwinner,sun8i-h3-emac"; -+ syscon = <&syscon>; -+ reg = <0x01c0b000 0x104>; -+ interrupts = ; -+ interrupt-names = "macirq"; -+ resets = <&ccu RST_BUS_EMAC>; -+ reset-names = "stmmaceth"; -+ clocks = <&ccu CLK_BUS_EMAC>; -+ clock-names = "stmmaceth"; -+ #address-cells = <1>; -+ #size-cells = <0>; ++ if (status & GMAC4_LPI_CTRL_STATUS_TLPIEN) { ++ ret |= CORE_IRQ_TX_PATH_IN_LPI_MODE; ++ x->irq_tx_path_in_lpi_mode_n++; ++ } ++ if (status & GMAC4_LPI_CTRL_STATUS_TLPIEX) { ++ ret |= CORE_IRQ_TX_PATH_EXIT_LPI_MODE; ++ x->irq_tx_path_exit_lpi_mode_n++; ++ } ++ if (status & GMAC4_LPI_CTRL_STATUS_RLPIEN) ++ x->irq_rx_path_in_lpi_mode_n++; ++ if (status & GMAC4_LPI_CTRL_STATUS_RLPIEX) ++ x->irq_rx_path_exit_lpi_mode_n++; ++ } + -+ phy-handle = <&int_mii_phy>; -+ phy-mode = "mii"; -+ allwinner,leds-active-low; -+ mdio: mdio { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ int_mii_phy: ethernet-phy@1 { -+ reg = <1>; -+ clocks = <&ccu CLK_BUS_EPHY>; -+ resets = <&ccu RST_BUS_EPHY>; -+ }; -+ }; -+}; + dwmac_pcs_isr(ioaddr, GMAC_PCS_BASE, intr_status, x); + if (intr_status & PCS_RGSMIIIS_IRQ) + dwmac4_phystatus(ioaddr, x); +-- +cgit v1.1 + +From 1c08ac0c4bd8e9d66c4dde29bc496c3b430dd028 Mon Sep 17 00:00:00 2001 +From: Corentin Labbe +Date: Tue, 28 Nov 2017 17:48:22 +0100 +Subject: net: stmmac: dwmac-sun8i: fix allwinner,leds-active-low handling + +The driver expect "allwinner,leds-active-low" to be in PHY node, but +the binding doc expect it to be in MAC node. + +Since all board DT use it also in MAC node, the driver need to search +allwinner,leds-active-low in MAC node. + +Signed-off-by: Corentin Labbe +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +index e5ff734..9eb7f65 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +@@ -808,8 +808,7 @@ static int sun8i_dwmac_set_syscon(struct stmmac_priv *priv) + val, reg); + + if (gmac->variant->soc_has_internal_phy) { +- if (of_property_read_bool(priv->plat->phy_node, +- "allwinner,leds-active-low")) ++ if (of_property_read_bool(node, "allwinner,leds-active-low")) + reg |= H3_EPHY_LED_POL; + else + reg &= ~H3_EPHY_LED_POL; +-- +cgit v1.1 + +From 45ab4b13e46325d00f4acdb365d406e941a15f81 Mon Sep 17 00:00:00 2001 +From: Lars Persson +Date: Fri, 1 Dec 2017 11:12:44 +0100 +Subject: stmmac: reset last TSO segment size after device open + +The mss variable tracks the last max segment size sent to the TSO +engine. We do not update the hardware as long as we receive skb:s with +the same value in gso_size. + +During a network device down/up cycle (mapped to stmmac_release() and +stmmac_open() callbacks) we issue a reset to the hardware and it +forgets the setting for mss. However we did not zero out our mss +variable so the next transmission of a gso packet happens with an +undefined hardware setting. + +This triggers a hang in the TSO engine and eventuelly the netdev +watchdog will bark. + +Fixes: f748be531d70 ("stmmac: support new GMAC4") +Signed-off-by: Lars Persson +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +index f63c2dd..d725053 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +@@ -2588,6 +2588,7 @@ static int stmmac_open(struct net_device *dev) + + priv->dma_buf_sz = STMMAC_ALIGN(buf_sz); + priv->rx_copybreak = STMMAC_RX_COPYBREAK; ++ priv->mss = 0; + + ret = alloc_dma_desc_resources(priv); + if (ret < 0) { -- -2.13.5 +cgit v1.1 diff --git a/arm-dts-boneblack-wireless-add-WL1835-Bluetooth-device-node.patch b/arm-dts-boneblack-wireless-add-WL1835-Bluetooth-device-node.patch deleted file mode 100644 index b4c9456..0000000 --- a/arm-dts-boneblack-wireless-add-WL1835-Bluetooth-device-node.patch +++ /dev/null @@ -1,40 +0,0 @@ -From patchwork Mon May 22 14:51:38 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: arm: dts: boneblack-wireless: add WL1835 Bluetooth device node -From: Ricardo Salveti -X-Patchwork-Id: 9740719 -Message-Id: <1495464701-12046-1-git-send-email-ricardo.salveti@linaro.org> -To: linux-omap@vger.kernel.org -Cc: Mark Rutland , - Ricardo Salveti , devicetree@vger.kernel.org, - Tony Lindgren , Russell King , - linux-kernel@vger.kernel.org, Rob Herring , - =?UTF-8?q?Beno=C3=AEt=20Cousson?= , - robertcnelson@gmail.com, linux-arm-kernel@lists.infradead.org -Date: Mon, 22 May 2017 11:51:38 -0300 - -This adds the serial slave device for the WL1835 Bluetooth interface. - -Signed-off-by: Ricardo Salveti ---- - arch/arm/boot/dts/am335x-boneblack-wireless.dts | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts -index 105bd10..83f49f6 100644 ---- a/arch/arm/boot/dts/am335x-boneblack-wireless.dts -+++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts -@@ -97,6 +97,11 @@ - pinctrl-names = "default"; - pinctrl-0 = <&uart3_pins &bt_pins>; - status = "okay"; -+ -+ bluetooth { -+ compatible = "ti,wl1835-st"; -+ enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>; -+ }; - }; - - &gpio3 { diff --git a/arm-exynos-fix-usb3.patch b/arm-exynos-fix-usb3.patch new file mode 100644 index 0000000..cb5828a --- /dev/null +++ b/arm-exynos-fix-usb3.patch @@ -0,0 +1,411 @@ +From patchwork Mon Oct 9 12:00:50 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [PATCHv4,1/2] drivers: phy: add calibrate method +From: Andrzej Pietrasiewicz +X-Patchwork-Id: 9992829 +Message-Id: <1507550451-21324-2-git-send-email-andrzej.p@samsung.com> +To: linux-samsung-soc@vger.kernel.org, linux-usb@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org +Cc: Mark Rutland , Felipe Balbi , + Bartlomiej Zolnierkiewicz , + Greg Kroah-Hartman , + Russell King , + Krzysztof Kozlowski , + Kishon Vijay Abraham I , + Rob Herring , Kukjin Kim , + Andrzej Pietrasiewicz , + Marek Szyprowski +Date: Mon, 09 Oct 2017 14:00:50 +0200 + +Some quirky UDCs (like dwc3 on Exynos) need to have their phys calibrated e.g. +for using super speed. This patch adds a new phy_calibrate() method. +When the calibration should be used is dependent on actual chip. + +In case of dwc3 on Exynos the calibration must happen after usb_add_hcd() +(while in host mode), because certain phy parameters like Tx LOS levels +and boost levels need to be calibrated further post initialization of xHCI +controller, to get SuperSpeed operations working. But an hcd must be +prepared first in order to pass it to usb_add_hcd(), so, in particular, dwc3 +registers must be available first, and in order for the latter to happen +the phys must be initialized. This poses a chicken and egg problem if +the calibration were to be performed in phy_init(). To break the circular +dependency a separate method is added which can be called at a desired +moment after phy intialization. + +Signed-off-by: Andrzej Pietrasiewicz +--- + drivers/phy/phy-core.c | 15 +++++++++++++++ + include/linux/phy/phy.h | 10 ++++++++++ + 2 files changed, 25 insertions(+) + +diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c +index a268f4d..b4964b0 100644 +--- a/drivers/phy/phy-core.c ++++ b/drivers/phy/phy-core.c +@@ -372,6 +372,21 @@ int phy_reset(struct phy *phy) + } + EXPORT_SYMBOL_GPL(phy_reset); + ++int phy_calibrate(struct phy *phy) ++{ ++ int ret; ++ ++ if (!phy || !phy->ops->calibrate) ++ return 0; ++ ++ mutex_lock(&phy->mutex); ++ ret = phy->ops->calibrate(phy); ++ mutex_unlock(&phy->mutex); ++ ++ return ret; ++} ++EXPORT_SYMBOL_GPL(phy_calibrate); ++ + /** + * _of_phy_get() - lookup and obtain a reference to a phy by phandle + * @np: device_node for which to get the phy +diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h +index e694d40..87580c8 100644 +--- a/include/linux/phy/phy.h ++++ b/include/linux/phy/phy.h +@@ -39,6 +39,7 @@ enum phy_mode { + * @power_off: powering off the phy + * @set_mode: set the mode of the phy + * @reset: resetting the phy ++ * @calibrate: calibrate the phy + * @owner: the module owner containing the ops + */ + struct phy_ops { +@@ -48,6 +49,7 @@ struct phy_ops { + int (*power_off)(struct phy *phy); + int (*set_mode)(struct phy *phy, enum phy_mode mode); + int (*reset)(struct phy *phy); ++ int (*calibrate)(struct phy *phy); + struct module *owner; + }; + +@@ -141,6 +143,7 @@ static inline void *phy_get_drvdata(struct phy *phy) + int phy_power_off(struct phy *phy); + int phy_set_mode(struct phy *phy, enum phy_mode mode); + int phy_reset(struct phy *phy); ++int phy_calibrate(struct phy *phy); + static inline int phy_get_bus_width(struct phy *phy) + { + return phy->attrs.bus_width; +@@ -262,6 +265,13 @@ static inline int phy_reset(struct phy *phy) + return -ENOSYS; + } + ++static inline int phy_calibrate(struct phy *phy) ++{ ++ if (!phy) ++ return 0; ++ return -ENOSYS; ++} ++ + static inline int phy_get_bus_width(struct phy *phy) + { + return -ENOSYS; +From patchwork Mon Oct 9 12:00:51 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +Subject: [PATCHv4, + 2/2] phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800 +From: Andrzej Pietrasiewicz +X-Patchwork-Id: 9992809 +Message-Id: <1507550451-21324-3-git-send-email-andrzej.p@samsung.com> +To: linux-samsung-soc@vger.kernel.org, linux-usb@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org +Cc: Mark Rutland , Felipe Balbi , + Bartlomiej Zolnierkiewicz , + Greg Kroah-Hartman , + Russell King , + Krzysztof Kozlowski , + Kishon Vijay Abraham I , + Rob Herring , Kukjin Kim , + Andrzej Pietrasiewicz , + Marek Szyprowski +Date: Mon, 09 Oct 2017 14:00:51 +0200 + +From: Vivek Gautam + +Adding phy calibration sequence for USB 3.0 DRD PHY present on +Exynos5420/5800 systems. +This calibration facilitates setting certain PHY parameters viz. +the Loss-of-Signal (LOS) Detector Threshold Level, as well as +Tx-Vboost-Level for Super-Speed operations. +Additionally we also set proper time to wait for RxDetect measurement, +for desired PHY reference clock, so as to solve issue with enumeration +of few USB 3.0 devices, like Samsung SUM-TSB16S 3.0 USB drive +on the controller. + +We are using CR_port for this purpose to send required data +to override the LOS values. + +On testing with USB 3.0 devices on USB 3.0 port present on +SMDK5420, and peach-pit boards should see following message: +usb 2-1: new SuperSpeed USB device number 2 using xhci-hcd + +and without this patch, should see below shown message: +usb 1-1: new high-speed USB device number 2 using xhci-hcd + +[Also removed unnecessary extra lines in the register macro definitions] + +Signed-off-by: Vivek Gautam +[adapted to use phy_calibrate as entry point] +Signed-off-by: Andrzej Pietrasiewicz +--- + drivers/phy/samsung/phy-exynos5-usbdrd.c | 183 +++++++++++++++++++++++++++++++ + drivers/usb/dwc3/core.c | 7 +- + 2 files changed, 188 insertions(+), 2 deletions(-) + +diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c b/drivers/phy/samsung/phy-exynos5-usbdrd.c +index 22c68f5..9e83c15 100644 +--- a/drivers/phy/samsung/phy-exynos5-usbdrd.c ++++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c +@@ -90,7 +90,17 @@ + #define PHYCLKRST_COMMONONN BIT(0) + + #define EXYNOS5_DRD_PHYREG0 0x14 ++#define PHYREG0_SSC_REF_CLK_SEL BIT(21) ++#define PHYREG0_SSC_RANGE BIT(20) ++#define PHYREG0_CR_WRITE BIT(19) ++#define PHYREG0_CR_READ BIT(18) ++#define PHYREG0_CR_DATA_IN(_x) ((_x) << 2) ++#define PHYREG0_CR_CAP_DATA BIT(1) ++#define PHYREG0_CR_CAP_ADDR BIT(0) ++ + #define EXYNOS5_DRD_PHYREG1 0x18 ++#define PHYREG1_CR_DATA_OUT(_x) ((_x) << 1) ++#define PHYREG1_CR_ACK BIT(0) + + #define EXYNOS5_DRD_PHYPARAM0 0x1c + +@@ -119,6 +129,25 @@ + #define EXYNOS5_DRD_PHYRESUME 0x34 + #define EXYNOS5_DRD_LINKPORT 0x44 + ++/* USB 3.0 DRD PHY SS Function Control Reg; accessed by CR_PORT */ ++#define EXYNOS5_DRD_PHYSS_LOSLEVEL_OVRD_IN (0x15) ++#define LOSLEVEL_OVRD_IN_LOS_BIAS_5420 (0x5 << 13) ++#define LOSLEVEL_OVRD_IN_LOS_BIAS_DEFAULT (0x0 << 13) ++#define LOSLEVEL_OVRD_IN_EN (0x1 << 10) ++#define LOSLEVEL_OVRD_IN_LOS_LEVEL_DEFAULT (0x9 << 0) ++ ++#define EXYNOS5_DRD_PHYSS_TX_VBOOSTLEVEL_OVRD_IN (0x12) ++#define TX_VBOOSTLEVEL_OVRD_IN_VBOOST_5420 (0x5 << 13) ++#define TX_VBOOSTLEVEL_OVRD_IN_VBOOST_DEFAULT (0x4 << 13) ++ ++#define EXYNOS5_DRD_PHYSS_LANE0_TX_DEBUG (0x1010) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_19M2_20M (0x4 << 4) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_24M (0x8 << 4) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_25M_26M (0x8 << 4) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_48M_50M_52M (0x20 << 4) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_62M5 (0x20 << 4) ++#define LANE0_TX_DEBUG_RXDET_MEAS_TIME_96M_100M (0x40 << 4) ++ + #define KHZ 1000 + #define MHZ (KHZ * KHZ) + +@@ -527,6 +556,151 @@ static int exynos5_usbdrd_phy_power_off(struct phy *phy) + return 0; + } + ++static int crport_handshake(struct exynos5_usbdrd_phy *phy_drd, ++ u32 val, u32 cmd) ++{ ++ u32 usec = 100; ++ unsigned int result; ++ ++ writel(val | cmd, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); ++ ++ do { ++ result = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1); ++ if (result & PHYREG1_CR_ACK) ++ break; ++ ++ udelay(1); ++ } while (usec-- > 0); ++ ++ if (!usec) { ++ dev_err(phy_drd->dev, ++ "CRPORT handshake timeout1 (0x%08x)\n", val); ++ return -ETIME; ++ } ++ ++ usec = 100; ++ ++ writel(val, phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); ++ ++ do { ++ result = readl(phy_drd->reg_phy + EXYNOS5_DRD_PHYREG1); ++ if (!(result & PHYREG1_CR_ACK)) ++ break; ++ ++ udelay(1); ++ } while (usec-- > 0); ++ ++ if (!usec) { ++ dev_err(phy_drd->dev, ++ "CRPORT handshake timeout2 (0x%08x)\n", val); ++ return -ETIME; ++ } ++ ++ return 0; ++} ++ ++static int crport_ctrl_write(struct exynos5_usbdrd_phy *phy_drd, ++ u32 addr, u32 data) ++{ ++ int ret; ++ ++ /* Write Address */ ++ writel(PHYREG0_CR_DATA_IN(addr), ++ phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); ++ ret = crport_handshake(phy_drd, PHYREG0_CR_DATA_IN(addr), ++ PHYREG0_CR_CAP_ADDR); ++ if (ret) ++ return ret; ++ ++ /* Write Data */ ++ writel(PHYREG0_CR_DATA_IN(data), ++ phy_drd->reg_phy + EXYNOS5_DRD_PHYREG0); ++ ret = crport_handshake(phy_drd, PHYREG0_CR_DATA_IN(data), ++ PHYREG0_CR_CAP_DATA); ++ if (ret) ++ return ret; ++ ++ ret = crport_handshake(phy_drd, PHYREG0_CR_DATA_IN(data), ++ PHYREG0_CR_WRITE); ++ ++ return ret; ++} ++ ++/* ++ * Calibrate few PHY parameters using CR_PORT register to meet ++ * SuperSpeed requirements on Exynos5420 and Exynos5800 systems, ++ * which have 28nm USB 3.0 DRD PHY. ++ */ ++static int exynos5420_usbdrd_phy_calibrate(struct exynos5_usbdrd_phy *phy_drd) ++{ ++ unsigned int temp; ++ int ret = 0; ++ ++ /* ++ * Change los_bias to (0x5) for 28nm PHY from a ++ * default value (0x0); los_level is set as default ++ * (0x9) as also reflected in los_level[30:26] bits ++ * of PHYPARAM0 register. ++ */ ++ temp = LOSLEVEL_OVRD_IN_LOS_BIAS_5420 | ++ LOSLEVEL_OVRD_IN_EN | ++ LOSLEVEL_OVRD_IN_LOS_LEVEL_DEFAULT; ++ ret = crport_ctrl_write(phy_drd, ++ EXYNOS5_DRD_PHYSS_LOSLEVEL_OVRD_IN, ++ temp); ++ if (ret) { ++ dev_err(phy_drd->dev, ++ "Failed setting Loss-of-Signal level for SuperSpeed\n"); ++ return ret; ++ } ++ ++ /* ++ * Set tx_vboost_lvl to (0x5) for 28nm PHY Tuning, ++ * to raise Tx signal level from its default value of (0x4) ++ */ ++ temp = TX_VBOOSTLEVEL_OVRD_IN_VBOOST_5420; ++ ret = crport_ctrl_write(phy_drd, ++ EXYNOS5_DRD_PHYSS_TX_VBOOSTLEVEL_OVRD_IN, ++ temp); ++ if (ret) { ++ dev_err(phy_drd->dev, ++ "Failed setting Tx-Vboost-Level for SuperSpeed\n"); ++ return ret; ++ } ++ ++ /* ++ * Set proper time to wait for RxDetect measurement, for ++ * desired reference clock of PHY, by tuning the CR_PORT ++ * register LANE0.TX_DEBUG which is internal to PHY. ++ * This fixes issue with few USB 3.0 devices, which are ++ * not detected (not even generate interrupts on the bus ++ * on insertion) without this change. ++ * e.g. Samsung SUM-TSB16S 3.0 USB drive. ++ */ ++ switch (phy_drd->extrefclk) { ++ case EXYNOS5_FSEL_50MHZ: ++ temp = LANE0_TX_DEBUG_RXDET_MEAS_TIME_48M_50M_52M; ++ break; ++ case EXYNOS5_FSEL_20MHZ: ++ case EXYNOS5_FSEL_19MHZ2: ++ temp = LANE0_TX_DEBUG_RXDET_MEAS_TIME_19M2_20M; ++ break; ++ case EXYNOS5_FSEL_24MHZ: ++ default: ++ temp = LANE0_TX_DEBUG_RXDET_MEAS_TIME_24M; ++ break; ++ } ++ ++ ret = crport_ctrl_write(phy_drd, ++ EXYNOS5_DRD_PHYSS_LANE0_TX_DEBUG, ++ temp); ++ if (ret) ++ dev_err(phy_drd->dev, ++ "Failed setting RxDetect measurement time for SuperSpeed\n"); ++ ++ return ret; ++} ++ + static struct phy *exynos5_usbdrd_phy_xlate(struct device *dev, + struct of_phandle_args *args) + { +@@ -538,11 +712,20 @@ static struct phy *exynos5_usbdrd_phy_xlate(struct device *dev, + return phy_drd->phys[args->args[0]].phy; + } + ++static int exynos5_usbdrd_phy_calibrate(struct phy *phy) ++{ ++ struct phy_usb_instance *inst = phy_get_drvdata(phy); ++ struct exynos5_usbdrd_phy *phy_drd = to_usbdrd_phy(inst); ++ ++ return exynos5420_usbdrd_phy_calibrate(phy_drd); ++} ++ + static const struct phy_ops exynos5_usbdrd_phy_ops = { + .init = exynos5_usbdrd_phy_init, + .exit = exynos5_usbdrd_phy_exit, + .power_on = exynos5_usbdrd_phy_power_on, + .power_off = exynos5_usbdrd_phy_power_off, ++ .calibrate = exynos5_usbdrd_phy_calibrate, + .owner = THIS_MODULE, + }; + +diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c +index 03474d3..224e0dd 100644 +--- a/drivers/usb/dwc3/core.c ++++ b/drivers/usb/dwc3/core.c +@@ -156,9 +156,10 @@ static void __dwc3_set_mode(struct work_struct *work) + } else { + if (dwc->usb2_phy) + otg_set_vbus(dwc->usb2_phy->otg, true); +- if (dwc->usb2_generic_phy) ++ if (dwc->usb2_generic_phy) { + phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST); +- ++ phy_calibrate(dwc->usb2_generic_phy); ++ } + } + break; + case DWC3_GCTL_PRTCAP_DEVICE: +@@ -955,6 +956,8 @@ static int dwc3_core_init_mode(struct dwc3 *dwc) + dev_err(dev, "failed to initialize host\n"); + return ret; + } ++ if (dwc->usb2_generic_phy) ++ phy_calibrate(dwc->usb2_generic_phy); + break; + case USB_DR_MODE_OTG: + INIT_WORK(&dwc->drd_work, __dwc3_set_mode); diff --git a/arm-of-restrict-dma-configuration.patch b/arm-of-restrict-dma-configuration.patch deleted file mode 100644 index cc9ddd9..0000000 --- a/arm-of-restrict-dma-configuration.patch +++ /dev/null @@ -1,121 +0,0 @@ -From 723288836628bc1c0855f3bb7b64b1803e4b9e4a Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Thu, 31 Aug 2017 11:32:54 +0100 -Subject: of: restrict DMA configuration - -Moving DMA configuration to happen later at driver probe time had the -unnoticed side-effect that we now perform DMA configuration for *every* -device represented in DT, rather than only those explicitly created by -the of_platform and PCI code. - -As Christoph points out, this is not really the best thing to do. Whilst -there may well be other DMA-capable buses that can benefit from having -their children automatically configured after the bridge has probed, -there are also plenty of others like USB, MDIO, etc. that definitely do -not support DMA and should not be indiscriminately processed. - -The good news is that in most cases the DT "dma-ranges" property serves -as an appropriate indicator - per a strict interpretation of the spec, -anything lacking a "dma-ranges" property should be considered not to -have a mapping of DMA address space from its children to its parent, -thus anything for which of_dma_get_range() does not succeed does not -need DMA configuration. Certain bus types have a general expectation of -DMA capability and carry a well-established precedent that an absent -"dma-ranges" implies the same as the empty property, so we automatically -opt those in to DMA configuration regardless, to avoid regressing most -existing platforms. - -Fixes: 09515ef5ddad ("of/acpi: Configure dma operations at probe time for platform/amba/pci bus devices") -Reported-by: Christoph Hellwig -Signed-off-by: Robin Murphy -Acked-by: Rob Herring -Signed-off-by: Christoph Hellwig ---- - drivers/of/device.c | 48 ++++++++++++++++++++++++++++++++---------------- - 1 file changed, 32 insertions(+), 16 deletions(-) - -diff --git a/drivers/of/device.c b/drivers/of/device.c -index e0a28ea..04c4c95 100644 ---- a/drivers/of/device.c -+++ b/drivers/of/device.c -@@ -9,6 +9,9 @@ - #include - #include - #include -+#include -+#include -+#include - - #include - #include "of_private.h" -@@ -84,31 +87,28 @@ int of_device_add(struct platform_device *ofdev) - */ - int of_dma_configure(struct device *dev, struct device_node *np) - { -- u64 dma_addr, paddr, size; -+ u64 dma_addr, paddr, size = 0; - int ret; - bool coherent; - unsigned long offset; - const struct iommu_ops *iommu; - u64 mask; - -- /* -- * Set default coherent_dma_mask to 32 bit. Drivers are expected to -- * setup the correct supported mask. -- */ -- if (!dev->coherent_dma_mask) -- dev->coherent_dma_mask = DMA_BIT_MASK(32); -- -- /* -- * Set it to coherent_dma_mask by default if the architecture -- * code has not set it. -- */ -- if (!dev->dma_mask) -- dev->dma_mask = &dev->coherent_dma_mask; -- - ret = of_dma_get_range(np, &dma_addr, &paddr, &size); - if (ret < 0) { -+ /* -+ * For legacy reasons, we have to assume some devices need -+ * DMA configuration regardless of whether "dma-ranges" is -+ * correctly specified or not. -+ */ -+ if (!dev_is_pci(dev) && -+#ifdef CONFIG_ARM_AMBA -+ dev->bus != &amba_bustype && -+#endif -+ dev->bus != &platform_bus_type) -+ return ret == -ENODEV ? 0 : ret; -+ - dma_addr = offset = 0; -- size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); - } else { - offset = PFN_DOWN(paddr - dma_addr); - -@@ -129,6 +129,22 @@ int of_dma_configure(struct device *dev, struct device_node *np) - dev_dbg(dev, "dma_pfn_offset(%#08lx)\n", offset); - } - -+ /* -+ * Set default coherent_dma_mask to 32 bit. Drivers are expected to -+ * setup the correct supported mask. -+ */ -+ if (!dev->coherent_dma_mask) -+ dev->coherent_dma_mask = DMA_BIT_MASK(32); -+ /* -+ * Set it to coherent_dma_mask by default if the architecture -+ * code has not set it. -+ */ -+ if (!dev->dma_mask) -+ dev->dma_mask = &dev->coherent_dma_mask; -+ -+ if (!size) -+ size = max(dev->coherent_dma_mask, dev->coherent_dma_mask + 1); -+ - dev->dma_pfn_offset = offset; - - /* --- -cgit v1.1 - diff --git a/arm-tegra-fix-gpu-iommu.patch b/arm-tegra-fix-gpu-iommu.patch deleted file mode 100644 index c775c88..0000000 --- a/arm-tegra-fix-gpu-iommu.patch +++ /dev/null @@ -1,39 +0,0 @@ -From patchwork Sun Jul 9 16:36:14 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: ARM: tegra: Register host1x node with iommu binding on tegra124 -From: Paul Kocialkowski -X-Patchwork-Id: 9831825 -Message-Id: <20170709163614.6746-1-contact@paulk.fr> -To: linux-arm-kernel@lists.infradead.org, linux-tegra@vger.kernel.org, - linux-kernel@vger.kernel.org -Cc: Thierry Reding , - Stephen Warren , - Mikko Perttunen , - Paul Kocialkowski , - Jonathan Hunter -Date: Sun, 9 Jul 2017 19:36:14 +0300 - -This registers the host1x node with the SMMU (as HC swgroup) to allow -the host1x code to attach to it. It avoid failing the probe sequence, -which resulted in the tegra drm driver not probing and thus nothing -being displayed on-screen. - -Signed-off-by: Paul Kocialkowski ---- - arch/arm/boot/dts/tegra124.dtsi | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi -index 187a36c6d0fc..b3b89befffeb 100644 ---- a/arch/arm/boot/dts/tegra124.dtsi -+++ b/arch/arm/boot/dts/tegra124.dtsi -@@ -85,6 +85,7 @@ - clocks = <&tegra_car TEGRA124_CLK_HOST1X>; - resets = <&tegra_car 28>; - reset-names = "host1x"; -+ iommus = <&mc TEGRA_SWGROUP_HC>; - - #address-cells = <2>; - #size-cells = <2>; diff --git a/arm-thermal-fixes.patch b/arm-thermal-fixes.patch deleted file mode 100644 index 547731e..0000000 --- a/arm-thermal-fixes.patch +++ /dev/null @@ -1,224 +0,0 @@ -From 0fe4d2181cc4cb3eba303c0e03f878d2558d0f3a Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Fri, 31 Mar 2017 20:03:04 +0000 -Subject: [PATCH] ARM: dts: bcm283x: Add CPU thermal zone with 1 - trip point - -As suggested by Eduardo Valentin this adds the thermal zone for -the bcm2835 SoC with its single thermal sensor. We start with -the criticial trip point and leave the cooling devices empty -since we don't have any at the moment. Since the coefficients -could vary depending on the SoC we need to define them separate. - -Signed-off-by: Stefan Wahren -Signed-off-by: Eric Anholt -Acked-by: Eduardo Valentin ---- - arch/arm/boot/dts/bcm2835.dtsi | 4 ++++ - arch/arm/boot/dts/bcm2836.dtsi | 4 ++++ - arch/arm/boot/dts/bcm283x.dtsi | 21 +++++++++++++++++++++ - 3 files changed, 29 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm2835.dtsi b/arch/arm/boot/dts/bcm2835.dtsi -index 0890d97e674d..659b6e9513b1 100644 ---- a/arch/arm/boot/dts/bcm2835.dtsi -+++ b/arch/arm/boot/dts/bcm2835.dtsi -@@ -24,6 +24,10 @@ - }; - }; - -+&cpu_thermal { -+ coefficients = <(-538) 407000>; -+}; -+ - /* enable thermal sensor with the correct compatible property set */ - &thermal { - compatible = "brcm,bcm2835-thermal"; -diff --git a/arch/arm/boot/dts/bcm2836.dtsi b/arch/arm/boot/dts/bcm2836.dtsi -index 519a44f5d25a..da3deeb42592 100644 ---- a/arch/arm/boot/dts/bcm2836.dtsi -+++ b/arch/arm/boot/dts/bcm2836.dtsi -@@ -77,6 +77,10 @@ - interrupts = <8>; - }; - -+&cpu_thermal { -+ coefficients = <(-538) 407000>; -+}; -+ - /* enable thermal sensor with the correct compatible property set */ - &thermal { - compatible = "brcm,bcm2836-thermal"; -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index 561f27d8d922..86a5db53da8f 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -19,6 +19,26 @@ - bootargs = "earlyprintk console=ttyAMA0"; - }; - -+ thermal-zones { -+ cpu_thermal: cpu-thermal { -+ polling-delay-passive = <0>; -+ polling-delay = <1000>; -+ -+ thermal-sensors = <&thermal>; -+ -+ trips { -+ cpu-crit { -+ temperature = <80000>; -+ hysteresis = <0>; -+ type = "critical"; -+ }; -+ }; -+ -+ cooling-maps { -+ }; -+ }; -+ }; -+ - soc { - compatible = "simple-bus"; - #address-cells = <1>; -@@ -430,6 +450,7 @@ - compatible = "brcm,bcm2835-thermal"; - reg = <0x7e212000 0x8>; - clocks = <&clocks BCM2835_CLOCK_TSENS>; -+ #thermal-sensor-cells = <0>; - status = "disabled"; - }; - --- -2.13.3 - -From 4ae6f954b96c1fea86c6f21ae8fc413f5fc3444e Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Fri, 31 Mar 2017 20:03:05 +0000 -Subject: [PATCH] ARM64: dts: bcm2837: Define CPU thermal coefficients - -This defines the bcm2837 SoC specific thermal coefficients in -order to initialize the thermal driver correctly. - -Signed-off-by: Stefan Wahren -Signed-off-by: Eric Anholt -Acked-by: Eduardo Valentin ---- - arch/arm64/boot/dts/broadcom/bcm2837.dtsi | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi -index 19f2fe620a21..2d5de6f0f78d 100644 ---- a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi -+++ b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi -@@ -75,6 +75,10 @@ - interrupts = <8>; - }; - -+&cpu_thermal { -+ coefficients = <(-538) 412000>; -+}; -+ - /* enable thermal sensor with the correct compatible property set */ - &thermal { - compatible = "brcm,bcm2837-thermal"; --- -2.13.3 - -From 1fe3854a83b580727c9464b37b62ba77ead1d6f6 Mon Sep 17 00:00:00 2001 -From: Dan Carpenter -Date: Wed, 14 Jun 2017 12:13:27 +0300 -Subject: [PATCH] thermal: bcm2835: fix an error code in probe() - -This causes a static checker because we're passing a valid pointer to -PTR_ERR(). "err" is already the correct error code, so we can just -delete this line. - -Fixes: bcb7dd9ef206 ("thermal: bcm2835: add thermal driver for bcm2835 SoC") -Acked-by: Stefan Wahren -Signed-off-by: Dan Carpenter -Signed-off-by: Eduardo Valentin ---- - drivers/thermal/broadcom/bcm2835_thermal.c | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/drivers/thermal/broadcom/bcm2835_thermal.c b/drivers/thermal/broadcom/bcm2835_thermal.c -index 0ecf80890c84..e6863c841662 100644 ---- a/drivers/thermal/broadcom/bcm2835_thermal.c -+++ b/drivers/thermal/broadcom/bcm2835_thermal.c -@@ -245,7 +245,6 @@ static int bcm2835_thermal_probe(struct platform_device *pdev) - */ - err = tz->ops->get_trip_temp(tz, 0, &trip_temp); - if (err < 0) { -- err = PTR_ERR(tz); - dev_err(&pdev->dev, - "Not able to read trip_temp: %d\n", - err); --- -2.13.3 - -From e3bdc8d7623d5875403ad40443e7b049ae200fcd Mon Sep 17 00:00:00 2001 -From: Arvind Yadav -Date: Tue, 6 Jun 2017 15:12:37 +0530 -Subject: [PATCH] thermal: imx: Handle return value of clk_prepare_enable - -clk_prepare_enable() can fail here and we must check its return value. - -Signed-off-by: Arvind Yadav -Signed-off-by: Eduardo Valentin ---- - drivers/thermal/imx_thermal.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/drivers/thermal/imx_thermal.c b/drivers/thermal/imx_thermal.c -index f7ec39f46ee4..4798b4b1fd77 100644 ---- a/drivers/thermal/imx_thermal.c -+++ b/drivers/thermal/imx_thermal.c -@@ -660,8 +660,11 @@ static int imx_thermal_resume(struct device *dev) - { - struct imx_thermal_data *data = dev_get_drvdata(dev); - struct regmap *map = data->tempmon; -+ int ret; - -- clk_prepare_enable(data->thermal_clk); -+ ret = clk_prepare_enable(data->thermal_clk); -+ if (ret) -+ return ret; - /* Enabled thermal sensor after resume */ - regmap_write(map, TEMPSENSE0 + REG_CLR, TEMPSENSE0_POWER_DOWN); - regmap_write(map, TEMPSENSE0 + REG_SET, TEMPSENSE0_MEASURE_TEMP); --- -2.13.3 - -From 919054fdfc8adf58c5512fe9872eb53ea0f5525d Mon Sep 17 00:00:00 2001 -From: Arvind Yadav -Date: Tue, 6 Jun 2017 15:04:46 +0530 -Subject: [PATCH] thermal: hisilicon: Handle return value of clk_prepare_enable - -clk_prepare_enable() can fail here and we must check its return value. - -Signed-off-by: Arvind Yadav -Signed-off-by: Eduardo Valentin ---- - drivers/thermal/hisi_thermal.c | 5 ++++- - 1 file changed, 4 insertions(+), 1 deletion(-) - -diff --git a/drivers/thermal/hisi_thermal.c b/drivers/thermal/hisi_thermal.c -index f6429666a1cf..9c3ce341eb97 100644 ---- a/drivers/thermal/hisi_thermal.c -+++ b/drivers/thermal/hisi_thermal.c -@@ -397,8 +397,11 @@ static int hisi_thermal_suspend(struct device *dev) - static int hisi_thermal_resume(struct device *dev) - { - struct hisi_thermal_data *data = dev_get_drvdata(dev); -+ int ret; - -- clk_prepare_enable(data->clk); -+ ret = clk_prepare_enable(data->clk); -+ if (ret) -+ return ret; - - data->irq_enabled = true; - hisi_thermal_enable_bind_irq_sensor(data); --- -2.13.3 - diff --git a/arm64-Revert-allwinner-a64-pine64-Use-dcdc1-regulato.patch b/arm64-Revert-allwinner-a64-pine64-Use-dcdc1-regulato.patch new file mode 100644 index 0000000..33f9271 --- /dev/null +++ b/arm64-Revert-allwinner-a64-pine64-Use-dcdc1-regulato.patch @@ -0,0 +1,41 @@ +From 90e388ca5d8bbee022f9ed5fc24137b31579fa6e Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Wed, 22 Nov 2017 15:52:36 +0000 +Subject: [PATCH] Revert "arm64: allwinner: a64: pine64: Use dcdc1 regulator + for mmc0" + +This reverts commit 3f241bfa60bdc9c4fde63fa6664a8ce00fd668c6. +--- + arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 9 ++++++++- + 1 file changed, 8 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +index d06e34b5d192..caf8b6fbe5e3 100644 +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +@@ -61,6 +61,13 @@ + chosen { + stdout-path = "serial0:115200n8"; + }; ++ ++ reg_vcc3v3: vcc3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; + }; + + &ehci0 { +@@ -84,7 +91,7 @@ + &mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; +- vmmc-supply = <®_dcdc1>; ++ vmmc-supply = <®_vcc3v3>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; + cd-inverted; + disable-wp; +-- +2.14.3 + diff --git a/arm64-cavium-fixes.patch b/arm64-cavium-fixes.patch deleted file mode 100644 index a898bb7..0000000 --- a/arm64-cavium-fixes.patch +++ /dev/null @@ -1,455 +0,0 @@ -From c03847b4a603846903ee72a5e1baab03e0591423 Mon Sep 17 00:00:00 2001 -From: Ashok Kumar Sekar -Date: Fri, 23 Sep 2016 04:16:19 -0700 -Subject: [PATCH 1/8] PCI: Vulcan: AHCI PCI bar fix for Broadcom Vulcan early - silicon - -PCI BAR 5 is not setup correctly for the on-board AHCI -controller on Broadcom's Vulcan processor. Added a quirk to fix BAR 5 -by using BAR 4's resources which are populated correctly but NOT used -by the AHCI controller actually. - -Signed-off-by: Ashok Kumar Sekar -Signed-off-by: Jayachandran C -Signed-off-by: Robert Richter ---- - drivers/pci/quirks.c | 24 ++++++++++++++++++++++++ - 1 file changed, 24 insertions(+) - -diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c -index dc624fb34e72..94b7bdf63b19 100644 ---- a/drivers/pci/quirks.c -+++ b/drivers/pci/quirks.c -@@ -3994,6 +3994,30 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, 0x9084, - quirk_bridge_cavm_thrx2_pcie_root); - - /* -+ * PCI BAR 5 is not setup correctly for the on-board AHCI controller -+ * on Broadcom's Vulcan processor. Added a quirk to fix BAR 5 by -+ * using BAR 4's resources which are populated correctly and NOT -+ * actually used by the AHCI controller. -+ */ -+static void quirk_fix_vulcan_ahci_bars(struct pci_dev *dev) -+{ -+ struct resource *r = &dev->resource[4]; -+ -+ if (!(r->flags & IORESOURCE_MEM) || (r->start == 0)) -+ return; -+ -+ /* Set BAR5 resource to BAR4 */ -+ dev->resource[5] = *r; -+ -+ /* Update BAR5 in pci config space */ -+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_5, r->start); -+ -+ /* Clear BAR4's resource */ -+ memset(r, 0, sizeof(*r)); -+} -+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, 0x9027, quirk_fix_vulcan_ahci_bars); -+ -+/* - * Intersil/Techwell TW686[4589]-based video capture cards have an empty (zero) - * class code. Fix it. - */ --- -2.11.0 - -From c84892e4b6b671fda7e499a0bb0787bd026de015 Mon Sep 17 00:00:00 2001 -From: Jayachandran C -Date: Fri, 10 Mar 2017 10:04:52 +0000 -Subject: [PATCH 2/8] ahci: thunderx2: Fix for errata that affects stop engine - -Apply workaround for this errata: - Synopsis: Resetting PxCMD.ST may hang the SATA device - - Description: An internal ping-pong buffer state is not reset - correctly for an PxCMD.ST=0 command for a SATA channel. This - may cause the SATA interface to hang when a PxCMD.ST=0 command - is received. - - Workaround: A SATA_BIU_CORE_ENABLE.sw_init_bsi must be asserted - by the driver whenever the PxCMD.ST needs to be de-asserted. This - will reset both the ports. So, it may not always work in a 2 - channel SATA system. - - Resolution: Fix in B0. - -Add the code to ahci_stop_engine() to do this. It is not easy to -stop the other "port" since it is associated with a different AHCI -interface. Please note that with this fix, SATA reset does not -hang any more, but it can cause failures on the other interface -if that is in active use. - -Unfortunately, we have nothing other the the CPU ID to check if the -SATA block has this issue. - -Signed-off-by: Jayachandran C -[added check to restict to pci devs on the soc only] -Signed-off-by: Robert Richter ---- - drivers/ata/libahci.c | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - -diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c -index 3e286d86ab42..9116bba1b07d 100644 ---- a/drivers/ata/libahci.c -+++ b/drivers/ata/libahci.c -@@ -669,6 +669,23 @@ int ahci_stop_engine(struct ata_port *ap) - tmp &= ~PORT_CMD_START; - writel(tmp, port_mmio + PORT_CMD); - -+#ifdef CONFIG_ARM64 -+ /* Rev Ax of Cavium CN99XX needs a hack for port stop */ -+ if (dev_is_pci(ap->host->dev) && -+ to_pci_dev(ap->host->dev)->vendor == 0x14e4 && -+ to_pci_dev(ap->host->dev)->device == 0x9027 && -+ MIDR_IS_CPU_MODEL_RANGE(read_cpuid_id(), -+ MIDR_CPU_MODEL(ARM_CPU_IMP_BRCM, BRCM_CPU_PART_VULCAN), -+ MIDR_CPU_VAR_REV(0, 0), -+ MIDR_CPU_VAR_REV(0, MIDR_REVISION_MASK))) { -+ tmp = readl(hpriv->mmio + 0x8000); -+ writel(tmp | (1 << 26), hpriv->mmio + 0x8000); -+ udelay(1); -+ writel(tmp & ~(1 << 26), hpriv->mmio + 0x8000); -+ dev_warn(ap->host->dev, "CN99XX stop engine fix applied!\n"); -+ } -+#endif -+ - /* wait for engine to stop. This could be as long as 500 msec */ - tmp = ata_wait_register(ap, port_mmio + PORT_CMD, - PORT_CMD_LIST_ON, PORT_CMD_LIST_ON, 1, 500); --- -2.11.0 - -From 98a39621952f6a13c5198e79f1c080ea6fc1d092 Mon Sep 17 00:00:00 2001 -From: Jayachandran C -Date: Sun, 22 Feb 1998 18:42:42 -0800 -Subject: [PATCH 3/8] ahci: thunderx2: stop engine fix update - -The current reset fix fails during continuous reboot test. The failure -happens when both the on-board SATA slots are used and when one of the -controllers are reset. - -The latest ThunderX2 firmware (3.1) enables hardware error interrupts and -when the reset fix fails, we get a hang with the print: -[ 14.839308] sd 1:0:0:0: [sdb] 468862128 512-byte logical blocks: (240 GB/224 GiB) -[ 14.846796] sd 1:0:0:0: [sdb] 4096-byte physical blocks -[ 14.852036] sd 1:0:0:0: [sdb] Write Protect is off -[ 14.856843] sd 1:0:0:0: [sdb] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA -[ 14.866022] ata2.00: Enabling discard_zeroes_data - - *** NBU BAR Error 0x1e25c *** - AddrLo 0x1d80180 AddrHi 0x0 - -To fix this issue, update the SATA reset fix to increase the delays between register writes. - -Signed-off-by: Jayachandran C -Signed-off-by: Robert Richter ---- - drivers/ata/libahci.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - -diff --git a/drivers/ata/libahci.c b/drivers/ata/libahci.c -index 9116bba1b07d..1d3e614bad2b 100644 ---- a/drivers/ata/libahci.c -+++ b/drivers/ata/libahci.c -@@ -679,10 +679,11 @@ int ahci_stop_engine(struct ata_port *ap) - MIDR_CPU_VAR_REV(0, 0), - MIDR_CPU_VAR_REV(0, MIDR_REVISION_MASK))) { - tmp = readl(hpriv->mmio + 0x8000); -+ udelay(100); - writel(tmp | (1 << 26), hpriv->mmio + 0x8000); -- udelay(1); -+ udelay(100); - writel(tmp & ~(1 << 26), hpriv->mmio + 0x8000); -- dev_warn(ap->host->dev, "CN99XX stop engine fix applied!\n"); -+ dev_warn(ap->host->dev, "CN99XX SATA reset workaround applied\n"); - } - #endif - --- -2.11.0 - -From 33c107d2a2b570cd5246262108ad07cc102e9fcd Mon Sep 17 00:00:00 2001 -From: Robert Richter -Date: Thu, 16 Mar 2017 18:01:59 +0100 -Subject: [PATCH 4/8] iommu/arm-smmu, ACPI: Enable Cavium SMMU-v2 - -In next IORT spec release there will be a definition of a Cavium -specific model. Until then, enable the Cavium SMMU using cpu id -registers. All versions of Cavium's SMMUv2 implementation must be -enabled. - -Signed-off-by: Robert Richter ---- - drivers/iommu/arm-smmu.c | 22 +++++++++++++++++++++- - 1 file changed, 21 insertions(+), 1 deletion(-) - -diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c -index d42cad5a3d52..37aee96ccc0e 100644 ---- a/drivers/iommu/arm-smmu.c -+++ b/drivers/iommu/arm-smmu.c -@@ -53,6 +53,8 @@ - - #include - -+#include -+ - #include "io-pgtable.h" - #include "arm-smmu-regs.h" - -@@ -1871,6 +1873,24 @@ static const struct of_device_id arm_smmu_of_match[] = { - MODULE_DEVICE_TABLE(of, arm_smmu_of_match); - - #ifdef CONFIG_ACPI -+ -+static int acpi_smmu_enable_cavium(struct arm_smmu_device *smmu, int ret) -+{ -+ u32 cpu_model; -+ -+ if (!IS_ENABLED(CONFIG_ARM64)) -+ return ret; -+ -+ cpu_model = read_cpuid_id() & MIDR_CPU_MODEL_MASK; -+ if (cpu_model != MIDR_THUNDERX) -+ return ret; -+ -+ smmu->version = ARM_SMMU_V2; -+ smmu->model = CAVIUM_SMMUV2; -+ -+ return 0; -+} -+ - static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) - { - int ret = 0; -@@ -1901,7 +1921,7 @@ static int acpi_smmu_get_data(u32 model, struct arm_smmu_device *smmu) - ret = -ENODEV; - } - -- return ret; -+ return acpi_smmu_enable_cavium(smmu, ret); - } - - static int arm_smmu_device_acpi_probe(struct platform_device *pdev, --- -2.11.0 - -From 5523edb06c95d7ac9e81d94366e71d929c08ebd4 Mon Sep 17 00:00:00 2001 -From: Robert Richter -Date: Wed, 12 Apr 2017 15:06:03 +0200 -Subject: [PATCH 5/8] iommu: Print a message with the default domain type - created - -There are several ways the bypass mode can be enabled. With commit - - fccb4e3b8ab0 iommu: Allow default domain type to be set on the kernel command line - -there is the option to switch into bypass mode. And, depending on -devicetree options, bypass mode can be also enabled. This makes it -hard to determine if direct mapping is enabled. Print message with the -default domain type case. - -Signed-off-by: Robert Richter ---- - drivers/iommu/iommu.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - -diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c -index 3f6ea160afed..7aaafaca6baf 100644 ---- a/drivers/iommu/iommu.c -+++ b/drivers/iommu/iommu.c -@@ -599,7 +599,9 @@ int iommu_group_add_device(struct iommu_group *group, struct device *dev) - - trace_add_device_to_group(group->id, dev); - -- pr_info("Adding device %s to group %d\n", dev_name(dev), group->id); -+ pr_info("Adding device %s to group %d, default domain type %d\n", -+ dev_name(dev), group->id, -+ group->default_domain ? group->default_domain->type : -1); - - return 0; - --- -2.11.0 - -From 71e0ad5ab606077c24a96d69f4bfed58d7ef16c7 Mon Sep 17 00:00:00 2001 -From: Robert Richter -Date: Thu, 4 May 2017 17:48:48 +0200 -Subject: [PATCH 6/8] iommu, aarch64: Set bypass mode per default - -We see a performance degradation if smmu is enabled in non-bypass mode. -This is a problem in the kernel's implememntation. Until that is solved, -enable smmu in bypass mode per default. - -We have tested that SMMU passthrough mode doesn't effect VFIO on both -CN88xx and CN99xx and haven't found any issues. - -Signed-off-by: Robert Richter ---- - drivers/iommu/iommu.c | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c -index 7aaafaca6baf..24de0b934221 100644 ---- a/drivers/iommu/iommu.c -+++ b/drivers/iommu/iommu.c -@@ -36,7 +36,12 @@ - - static struct kset *iommu_group_kset; - static DEFINE_IDA(iommu_group_ida); -+ -+#ifdef CONFIG_ARM64 -+static unsigned int iommu_def_domain_type = IOMMU_DOMAIN_IDENTITY; -+#else - static unsigned int iommu_def_domain_type = IOMMU_DOMAIN_DMA; -+#endif - - struct iommu_callback_data { - const struct iommu_ops *ops; --- -2.11.0 - -From 27f103963f926d6a7a8adaad1ee227fd3b51f591 Mon Sep 17 00:00:00 2001 -From: Robert Richter -Date: Wed, 12 Apr 2017 10:31:15 +0200 -Subject: [PATCH 7/8] iommu/arm-smmu, ACPI: Enable Cavium SMMU-v3 - -In next IORT spec release there will be a definition of a Cavium -specific model. Until then, enable the Cavium SMMU using cpu id -registers. Early silicon versions (A1) of Cavium's CN99xx SMMUv3 -implementation must be enabled. For later silicon versions (B0) the -iort change will be in place. - -Signed-off-by: Robert Richter ---- - drivers/acpi/arm64/iort.c | 16 ++++++++++++++-- - drivers/iommu/arm-smmu-v3.c | 19 +++++++++++++++++++ - 2 files changed, 33 insertions(+), 2 deletions(-) - -diff --git a/drivers/acpi/arm64/iort.c b/drivers/acpi/arm64/iort.c -index a3215ee671c1..b603af92eec2 100644 ---- a/drivers/acpi/arm64/iort.c -+++ b/drivers/acpi/arm64/iort.c -@@ -26,6 +26,8 @@ - #include - #include - -+#include -+ - #define IORT_TYPE_MASK(type) (1 << (type)) - #define IORT_MSI_TYPE (1 << ACPI_IORT_NODE_ITS_GROUP) - #define IORT_IOMMU_TYPE ((1 << ACPI_IORT_NODE_SMMU) | \ -@@ -824,13 +826,22 @@ static int __init arm_smmu_v3_count_resources(struct acpi_iort_node *node) - return num_res; - } - -+static bool is_cavium_cn99xx_smmu_v3(void) -+{ -+ u32 cpu_model = read_cpuid_id() & MIDR_CPU_MODEL_MASK; -+ -+ return cpu_model == MIDR_CPU_MODEL(ARM_CPU_IMP_BRCM, -+ BRCM_CPU_PART_VULCAN); -+} -+ - static bool arm_smmu_v3_is_combined_irq(struct acpi_iort_smmu_v3 *smmu) - { - /* - * Cavium ThunderX2 implementation doesn't not support unique - * irq line. Use single irq line for all the SMMUv3 interrupts. - */ -- if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX) -+ if (smmu->model != ACPI_IORT_SMMU_V3_CAVIUM_CN99XX -+ && !is_cavium_cn99xx_smmu_v3()) - return false; - - /* -@@ -848,7 +859,8 @@ static unsigned long arm_smmu_v3_resource_size(struct acpi_iort_smmu_v3 *smmu) - * Override the size, for Cavium ThunderX2 implementation - * which doesn't support the page 1 SMMU register space. - */ -- if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX) -+ if (smmu->model == ACPI_IORT_SMMU_V3_CAVIUM_CN99XX -+ || is_cavium_cn99xx_smmu_v3()) - return SZ_64K; - - return SZ_128K; -diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c -index 568c400eeaed..d147cb5c7309 100644 ---- a/drivers/iommu/arm-smmu-v3.c -+++ b/drivers/iommu/arm-smmu-v3.c -@@ -39,6 +39,8 @@ - - #include - -+#include -+ - #include "io-pgtable.h" - - /* MMIO registers */ -@@ -2659,6 +2661,21 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) - } - - #ifdef CONFIG_ACPI -+ -+static void acpi_smmu_enable_cavium(struct arm_smmu_device *smmu) -+{ -+ u32 cpu_model; -+ -+ if (!IS_ENABLED(CONFIG_ARM64)) -+ return; -+ -+ cpu_model = read_cpuid_id() & MIDR_CPU_MODEL_MASK; -+ if (cpu_model != MIDR_CPU_MODEL(ARM_CPU_IMP_BRCM, BRCM_CPU_PART_VULCAN)) -+ return; -+ -+ smmu->options |= ARM_SMMU_OPT_PAGE0_REGS_ONLY; -+} -+ - static void acpi_smmu_get_options(u32 model, struct arm_smmu_device *smmu) - { - switch (model) { -@@ -2670,6 +2687,8 @@ static void acpi_smmu_get_options(u32 model, struct arm_smmu_device *smmu) - break; - } - -+ acpi_smmu_enable_cavium(smmu); -+ - dev_notice(smmu->dev, "option mask 0x%x\n", smmu->options); - } - --- -2.11.0 - -From ff677cc625b52b93351dd73d7881251067f0e976 Mon Sep 17 00:00:00 2001 -From: Radha Mohan Chintakuntla -Date: Wed, 20 Aug 2014 15:10:58 -0700 -Subject: [PATCH 8/8] arm64: gicv3: its: Increase FORCE_MAX_ZONEORDER for - Cavium ThunderX - -In case of ARCH_THUNDER, there is a need to allocate the GICv3 ITS table -which is bigger than the allowed max order. So we are forcing it only in -case of 4KB page size. - -Signed-off-by: Radha Mohan Chintakuntla -[rric: use ARM64_4K_PAGES since we have now ARM64_16K_PAGES, change order] -Signed-off-by: Robert Richter ---- - arch/arm64/Kconfig | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig -index 2c3e2d693d76..023867378f45 100644 ---- a/arch/arm64/Kconfig -+++ b/arch/arm64/Kconfig -@@ -784,6 +784,7 @@ config FORCE_MAX_ZONEORDER - default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE) - default "13" if (ARCH_THUNDER && !ARM64_64K_PAGES) - default "12" if (ARM64_16K_PAGES && TRANSPARENT_HUGEPAGE) -+ default "13" if (ARM64_4K_PAGES && ARCH_THUNDER) - default "11" - help - The kernel memory allocator divides physically contiguous memory --- -2.11.0 - diff --git a/arm64-socionext-96b-enablement.patch b/arm64-socionext-96b-enablement.patch new file mode 100644 index 0000000..0a7df3a --- /dev/null +++ b/arm64-socionext-96b-enablement.patch @@ -0,0 +1,3099 @@ +From 58be18a7bbf9dca67f4260ac172a44baa59d0ee9 Mon Sep 17 00:00:00 2001 +From: Ard Biesheuvel +Date: Mon, 21 Aug 2017 10:47:48 +0100 +Subject: arm64: acpi/gtdt: validate CNTFRQ after having enabled the frame + +The ACPI GTDT code validates the CNTFRQ field of each MMIO timer +frame against the CNTFRQ system register of the current CPU, to +ensure that they are equal, which is mandated by the architecture. + +However, reading the CNTFRQ field of a frame is not possible until +the RFRQ bit in the frame's CNTACRn register is set, and doing so +before that willl produce the following error: + + arch_timer: [Firmware Bug]: CNTFRQ mismatch: frame @ 0x00000000e0be0000: (0x00000000), CPU: (0x0ee6b280) + arch_timer: Disabling MMIO timers due to CNTFRQ mismatch + arch_timer: Failed to initialize memory-mapped timer. + +The reason is that the CNTFRQ field is RES0 if access is not enabled. + +So move the validation of CNTFRQ into the loop that iterates over the +timers to find the best frame, but defer it until after we have selected +the best frame, which should also have enabled the RFRQ bit. + +Signed-off-by: Ard Biesheuvel +--- + drivers/clocksource/arm_arch_timer.c | 38 ++++++++++++++++++++---------------- + 1 file changed, 21 insertions(+), 17 deletions(-) + +diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c +index fd4b7f6..14e2419 100644 +--- a/drivers/clocksource/arm_arch_timer.c ++++ b/drivers/clocksource/arm_arch_timer.c +@@ -1268,10 +1268,6 @@ arch_timer_mem_find_best_frame(struct arch_timer_mem *timer_mem) + + iounmap(cntctlbase); + +- if (!best_frame) +- pr_err("Unable to find a suitable frame in timer @ %pa\n", +- &timer_mem->cntctlbase); +- + return best_frame; + } + +@@ -1372,6 +1368,8 @@ static int __init arch_timer_mem_of_init(struct device_node *np) + + frame = arch_timer_mem_find_best_frame(timer_mem); + if (!frame) { ++ pr_err("Unable to find a suitable frame in timer @ %pa\n", ++ &timer_mem->cntctlbase); + ret = -EINVAL; + goto out; + } +@@ -1420,7 +1418,7 @@ arch_timer_mem_verify_cntfrq(struct arch_timer_mem *timer_mem) + static int __init arch_timer_mem_acpi_init(int platform_timer_count) + { + struct arch_timer_mem *timers, *timer; +- struct arch_timer_mem_frame *frame; ++ struct arch_timer_mem_frame *frame, *best_frame = NULL; + int timer_count, i, ret = 0; + + timers = kcalloc(platform_timer_count, sizeof(*timers), +@@ -1432,14 +1430,6 @@ static int __init arch_timer_mem_acpi_init(int platform_timer_count) + if (ret || !timer_count) + goto out; + +- for (i = 0; i < timer_count; i++) { +- ret = arch_timer_mem_verify_cntfrq(&timers[i]); +- if (ret) { +- pr_err("Disabling MMIO timers due to CNTFRQ mismatch\n"); +- goto out; +- } +- } +- + /* + * While unlikely, it's theoretically possible that none of the frames + * in a timer expose the combination of feature we want. +@@ -1448,12 +1438,26 @@ static int __init arch_timer_mem_acpi_init(int platform_timer_count) + timer = &timers[i]; + + frame = arch_timer_mem_find_best_frame(timer); +- if (frame) +- break; ++ if (!best_frame) ++ best_frame = frame; ++ ++ ret = arch_timer_mem_verify_cntfrq(timer); ++ if (ret) { ++ pr_err("Disabling MMIO timers due to CNTFRQ mismatch\n"); ++ goto out; ++ } ++ ++ if (!best_frame) /* implies !frame */ ++ /* ++ * Only complain about missing suitable frames if we ++ * haven't already found one in a previous iteration. ++ */ ++ pr_err("Unable to find a suitable frame in timer @ %pa\n", ++ &timer->cntctlbase); + } + +- if (frame) +- ret = arch_timer_mem_frame_register(frame); ++ if (best_frame) ++ ret = arch_timer_mem_frame_register(best_frame); + out: + kfree(timers); + return ret; +-- +cgit v1.1 + +From 33d983b5bb2929ae242606925e708092b1dfdd8f Mon Sep 17 00:00:00 2001 +From: Ard Biesheuvel +Date: Sat, 2 Sep 2017 11:01:22 +0100 +Subject: drivers/irqchip: gicv3: add workaround for Synquacer pre-ITS + +In their infinite wisdom, the Socionext engineers have decided +that ITS device IDs should not be hardwired, but it should be +left up to the software to assign them, by allowing it to +redirect MSI doorbell writes via a separate hardware block +that issues the doorbell write with a device ID that is +derived from the memory address. This completely breaks any +kind of isolation, or virtualization in general, for that +matter, but add support for it nonetheless. + +Signed-off-by: Ard Biesheuvel +--- + arch/arm64/Kconfig | 8 +++++++ + drivers/irqchip/irq-gic-v3-its.c | 48 +++++++++++++++++++++++++++++++++++----- + 2 files changed, 51 insertions(+), 5 deletions(-) + +diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig +index 0df64a6..c4361df 100644 +--- a/arch/arm64/Kconfig ++++ b/arch/arm64/Kconfig +@@ -539,6 +539,14 @@ config QCOM_QDF2400_ERRATUM_0065 + + If unsure, say Y. + ++config SOCIONEXT_SYNQUACER_PREITS ++ bool "Socionext Synquacer: Workaround for GICv3 pre-ITS" ++ default y ++ help ++ Socionext Synquacer SoCs implement a separate h/w block to generate ++ MSI doorbell writes with non-zero values for the device ID. ++ ++ If unsure, say Y. + endmenu + + +diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c +index e8d8934..0d372f1 100644 +--- a/drivers/irqchip/irq-gic-v3-its.c ++++ b/drivers/irqchip/irq-gic-v3-its.c +@@ -46,6 +46,7 @@ + #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) + #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) + #define ITS_FLAGS_WORKAROUND_CAVIUM_23144 (1ULL << 2) ++#define ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS (1ULL << 3) + + #define RDIST_FLAGS_PROPBASE_NEEDS_FLUSHING (1 << 0) + +@@ -99,6 +100,10 @@ struct its_node { + struct its_collection *collections; + struct list_head its_device_list; + u64 flags; ++#ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS ++ u64 pre_its_base; ++ u64 pre_its_size; ++#endif + u32 ite_size; + u32 device_ids; + int numa_node; +@@ -1102,13 +1107,29 @@ static void its_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) + u64 addr; + + its = its_dev->its; +- addr = its->phys_base + GITS_TRANSLATER; ++ ++#ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS ++ if (its->flags & ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS) ++ ++ /* ++ * The Socionext Synquacer SoC has a so-called 'pre-ITS', ++ * which maps 32-bit writes into a separate window of size ++ * '4 << device_id_bits' onto writes to GITS_TRANSLATER with ++ * device ID taken from bits [device_id_bits + 1:2] of the ++ * window offset. ++ */ ++ addr = its->pre_its_base + (its_dev->device_id << 2); ++ else ++#endif ++ addr = its->phys_base + GITS_TRANSLATER; + + msg->address_lo = lower_32_bits(addr); + msg->address_hi = upper_32_bits(addr); + msg->data = its_get_event_id(d); + +- iommu_dma_map_msi_msg(d->irq, msg); ++ if (!IS_ENABLED(CONFIG_SOCIONEXT_SYNQUACER_PREITS) || ++ !(its->flags & ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS)) ++ iommu_dma_map_msi_msg(d->irq, msg); + } + + static int its_irq_set_irqchip_state(struct irq_data *d, +@@ -1666,6 +1687,11 @@ static int its_alloc_tables(struct its_node *its) + ids = 0x14; /* 20 bits, 8MB */ + } + ++#ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS ++ if (its->flags & ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS) ++ ids = ilog2(its->pre_its_size) - 2; ++#endif ++ + its->device_ids = ids; + + for (i = 0; i < GITS_BASER_NR_REGS; i++) { +@@ -2788,11 +2814,21 @@ static const struct gic_quirk its_quirks[] = { + } + }; + +-static void its_enable_quirks(struct its_node *its) ++static void its_enable_quirks(struct its_node *its, ++ struct fwnode_handle *handle) + { + u32 iidr = readl_relaxed(its->base + GITS_IIDR); + + gic_enable_quirks(iidr, its_quirks, its); ++ ++#ifdef CONFIG_SOCIONEXT_SYNQUACER_PREITS ++ if (!fwnode_property_read_u64_array(handle, ++ "socionext,synquacer-pre-its", ++ &its->pre_its_base, 2)) { ++ its->flags |= ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS; ++ pr_info("ITS: enabling workaround for Socionext Synquacer pre-ITS\n"); ++ } ++#endif + } + + static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) +@@ -2812,7 +2848,9 @@ static int its_init_domain(struct fwnode_handle *handle, struct its_node *its) + + inner_domain->parent = its_parent; + irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); +- inner_domain->flags |= IRQ_DOMAIN_FLAG_MSI_REMAP; ++ ++ if (!(its->flags & ITS_FLAGS_WORKAROUND_SOCIONEXT_PREITS)) ++ inner_domain->flags |= IRQ_DOMAIN_FLAG_MSI_REMAP; + info->ops = &its_msi_domain_ops; + info->data = its; + inner_domain->host_data = info; +@@ -2966,7 +3004,7 @@ static int __init its_probe_one(struct resource *res, + } + its->cmd_write = its->cmd_base; + +- its_enable_quirks(its); ++ its_enable_quirks(its, handle); + + err = its_alloc_tables(its); + if (err) +-- +cgit v1.1 + +From 26e7bb47b0fb03a01be1e391a08c7375b45335a2 Mon Sep 17 00:00:00 2001 +From: Ard Biesheuvel +Date: Mon, 21 Aug 2017 20:29:05 +0100 +Subject: pci: designware: add driver for DWC controller in ECAM shift mode + +Some implementations of the Synopsys Designware PCIe controller implement +a so-called ECAM shift mode, which allows a static memory window to be +configured that covers the configuration space of the entire bus range. + +If the firmware performs all the low level configuration that is required +to expose this controller in a fully ECAM compatible manner, we can +simply describe it as "pci-host-ecam-generic" and be done with it. +However, it appears that in some cases (one of which is the Armada 80x0), +the IP is synthesized with an ATU window size that does not allow the +first bus to be mapped in a way that prevents the device on the +downstream port from appearing more than once. + +So implement a driver that relies on the firmware to perform all low +level initialization, and drives the controller in ECAM mode, but +overrides the config space accessors to take the above quirk into +account. + +Note that, unlike most drivers for this IP, this driver does not expose +a fake bridge device at B/D/F 00:00.0. There is no point in doing so, +given that this is not a true bridge, and does not require any windows +to be configured in order for the downstream device to operate correctly. +Omitting it also prevents the PCI resource allocation routines from +handing out BAR space to it unnecessarily. + +Cc: Bjorn Helgaas +Cc: Jingoo Han +Cc: Joao Pinto +Signed-off-by: Ard Biesheuvel +--- + drivers/pci/dwc/Kconfig | 11 +++++ + drivers/pci/dwc/Makefile | 1 + + drivers/pci/dwc/pcie-designware-ecam.c | 77 ++++++++++++++++++++++++++++++++++ + 3 files changed, 89 insertions(+) + create mode 100644 drivers/pci/dwc/pcie-designware-ecam.c + +diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig +index 22ec82f..19856b1 100644 +--- a/drivers/pci/dwc/Kconfig ++++ b/drivers/pci/dwc/Kconfig +@@ -169,4 +169,15 @@ config PCIE_KIRIN + Say Y here if you want PCIe controller support + on HiSilicon Kirin series SoCs. + ++config PCIE_DW_HOST_ECAM ++ bool "Synopsys DesignWare PCIe controller in ECAM mode" ++ depends on OF && PCI ++ select PCI_HOST_COMMON ++ select IRQ_DOMAIN ++ help ++ Add support for Synopsys DesignWare PCIe controllers configured ++ by the firmware into ECAM shift mode. In some cases, these are ++ fully ECAM compliant, in which case the pci-host-generic driver ++ may be used instead. ++ + endmenu +diff --git a/drivers/pci/dwc/Makefile b/drivers/pci/dwc/Makefile +index c61be97..7d5a23e 100644 +--- a/drivers/pci/dwc/Makefile ++++ b/drivers/pci/dwc/Makefile +@@ -1,5 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0 + obj-$(CONFIG_PCIE_DW) += pcie-designware.o + obj-$(CONFIG_PCIE_DW_HOST) += pcie-designware-host.o ++obj-$(CONFIG_PCIE_DW_HOST_ECAM) += pcie-designware-ecam.o + obj-$(CONFIG_PCIE_DW_EP) += pcie-designware-ep.o + obj-$(CONFIG_PCIE_DW_PLAT) += pcie-designware-plat.o + ifneq ($(filter y,$(CONFIG_PCI_DRA7XX_HOST) $(CONFIG_PCI_DRA7XX_EP)),) +diff --git a/drivers/pci/dwc/pcie-designware-ecam.c b/drivers/pci/dwc/pcie-designware-ecam.c +new file mode 100644 +index 0000000..ede627d +--- /dev/null ++++ b/drivers/pci/dwc/pcie-designware-ecam.c +@@ -0,0 +1,77 @@ ++/* ++ * Driver for mostly ECAM compatible Synopsys dw PCIe controllers ++ * configured by the firmware into RC mode ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Copyright (C) 2014 ARM Limited ++ * Copyright (C) 2017 Linaro Limited ++ * ++ * Authors: Will Deacon ++ * Ard Biesheuvel ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static int pci_dw_ecam_config_read(struct pci_bus *bus, u32 devfn, int where, ++ int size, u32 *val) ++{ ++ struct pci_config_window *cfg = bus->sysdata; ++ ++ /* ++ * The Synopsys dw PCIe controller in RC mode will not filter type 0 ++ * config TLPs sent to devices 1 and up on its downstream port, ++ * resulting in devices appearing multiple times on bus 0 unless we ++ * filter them here. ++ */ ++ if (bus->number == cfg->busr.start && PCI_SLOT(devfn) > 0) { ++ *val = 0xffffffff; ++ return PCIBIOS_DEVICE_NOT_FOUND; ++ } ++ return pci_generic_config_read(bus, devfn, where, size, val); ++} ++ ++static int pci_dw_ecam_config_write(struct pci_bus *bus, u32 devfn, int where, ++ int size, u32 val) ++{ ++ struct pci_config_window *cfg = bus->sysdata; ++ ++ if (bus->number == cfg->busr.start && PCI_SLOT(devfn) > 0) ++ return PCIBIOS_DEVICE_NOT_FOUND; ++ ++ return pci_generic_config_write(bus, devfn, where, size, val); ++} ++ ++static struct pci_ecam_ops pci_dw_ecam_bus_ops = { ++ .pci_ops.map_bus = pci_ecam_map_bus, ++ .pci_ops.read = pci_dw_ecam_config_read, ++ .pci_ops.write = pci_dw_ecam_config_write, ++ .bus_shift = 20, ++}; ++ ++static const struct of_device_id pci_dw_ecam_of_match[] = { ++ { .compatible = "marvell,armada8k-pcie-ecam" }, ++ { .compatible = "socionext,synquacer-pcie-ecam" }, ++ { .compatible = "snps,dw-pcie-ecam" }, ++ { }, ++}; ++ ++static int pci_dw_ecam_probe(struct platform_device *pdev) ++{ ++ return pci_host_common_probe(pdev, &pci_dw_ecam_bus_ops); ++} ++ ++static struct platform_driver pci_dw_ecam_driver = { ++ .driver.name = "pcie-designware-ecam", ++ .driver.of_match_table = pci_dw_ecam_of_match, ++ .driver.suppress_bind_attrs = true, ++ .probe = pci_dw_ecam_probe, ++}; ++builtin_platform_driver(pci_dw_ecam_driver); +-- +cgit v1.1 + +From e3dff048a10f16aa0fd32438442ce39558bbdbef Mon Sep 17 00:00:00 2001 +From: Jassi Brar +Date: Tue, 29 Aug 2017 22:45:59 +0530 +Subject: net: socionext: Add Synquacer NetSec driver + +This driver adds support for Socionext "netsec" IP Gigabit +Ethernet + PHY IP used in the Synquacer SC2A11 SoC. + +Signed-off-by: Jassi Brar +Signed-off-by: Ard Biesheuvel +--- + drivers/net/ethernet/Kconfig | 1 + + drivers/net/ethernet/Makefile | 1 + + drivers/net/ethernet/socionext/Kconfig | 29 + + drivers/net/ethernet/socionext/Makefile | 1 + + drivers/net/ethernet/socionext/netsec/Makefile | 6 + + drivers/net/ethernet/socionext/netsec/netsec.h | 408 ++++++++++++++ + .../socionext/netsec/netsec_desc_ring_access.c | 623 +++++++++++++++++++++ + .../net/ethernet/socionext/netsec/netsec_ethtool.c | 78 +++ + .../ethernet/socionext/netsec/netsec_gmac_access.c | 330 +++++++++++ + .../net/ethernet/socionext/netsec/netsec_netdev.c | 540 ++++++++++++++++++ + .../ethernet/socionext/netsec/netsec_platform.c | 435 ++++++++++++++ + 11 files changed, 2452 insertions(+) + create mode 100644 drivers/net/ethernet/socionext/Kconfig + create mode 100644 drivers/net/ethernet/socionext/Makefile + create mode 100644 drivers/net/ethernet/socionext/netsec/Makefile + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec.h + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec_desc_ring_access.c + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec_ethtool.c + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec_gmac_access.c + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec_netdev.c + create mode 100644 drivers/net/ethernet/socionext/netsec/netsec_platform.c + +diff --git a/drivers/net/ethernet/Kconfig b/drivers/net/ethernet/Kconfig +index c604213..d50519e 100644 +--- a/drivers/net/ethernet/Kconfig ++++ b/drivers/net/ethernet/Kconfig +@@ -170,6 +170,7 @@ source "drivers/net/ethernet/sis/Kconfig" + source "drivers/net/ethernet/sfc/Kconfig" + source "drivers/net/ethernet/sgi/Kconfig" + source "drivers/net/ethernet/smsc/Kconfig" ++source "drivers/net/ethernet/socionext/Kconfig" + source "drivers/net/ethernet/stmicro/Kconfig" + source "drivers/net/ethernet/sun/Kconfig" + source "drivers/net/ethernet/tehuti/Kconfig" +diff --git a/drivers/net/ethernet/Makefile b/drivers/net/ethernet/Makefile +index a0a03d4..6ae1bb9 100644 +--- a/drivers/net/ethernet/Makefile ++++ b/drivers/net/ethernet/Makefile +@@ -81,6 +81,7 @@ obj-$(CONFIG_SFC) += sfc/ + obj-$(CONFIG_SFC_FALCON) += sfc/falcon/ + obj-$(CONFIG_NET_VENDOR_SGI) += sgi/ + obj-$(CONFIG_NET_VENDOR_SMSC) += smsc/ ++obj-$(CONFIG_NET_VENDOR_SNI) += socionext/ + obj-$(CONFIG_NET_VENDOR_STMICRO) += stmicro/ + obj-$(CONFIG_NET_VENDOR_SUN) += sun/ + obj-$(CONFIG_NET_VENDOR_TEHUTI) += tehuti/ +diff --git a/drivers/net/ethernet/socionext/Kconfig b/drivers/net/ethernet/socionext/Kconfig +new file mode 100644 +index 0000000..a6dc195 +--- /dev/null ++++ b/drivers/net/ethernet/socionext/Kconfig +@@ -0,0 +1,29 @@ ++# ++# Socionext Network device configuration ++# ++ ++config NET_VENDOR_SNI ++ bool "Socionext devices" ++ default y ++ ---help--- ++ If you have a network (Ethernet) card belonging to this class, say Y. ++ ++ Note that the answer to this question doesn't directly affect the ++ the questions about Socionext cards. If you say Y, you will be asked ++ for your specific card in the following questions. ++ ++if NET_VENDOR_SNI ++ ++config SNI_NETSEC ++ tristate "NETSEC Driver Support" ++ depends on OF ++ select PHYLIB ++ select MII ++help ++ Enable to add support for the SocioNext NetSec Gigabit Ethernet ++ controller + PHY, as found on the Synquacer SC2A11 SoC ++ ++ To compile this driver as a module, choose M here: the module will be ++ called netsec. If unsure, say N. ++ ++endif # NET_VENDOR_SNI +diff --git a/drivers/net/ethernet/socionext/Makefile b/drivers/net/ethernet/socionext/Makefile +new file mode 100644 +index 0000000..9555899 +--- /dev/null ++++ b/drivers/net/ethernet/socionext/Makefile +@@ -0,0 +1 @@ ++obj-$(CONFIG_SNI_NETSEC) += netsec/ +diff --git a/drivers/net/ethernet/socionext/netsec/Makefile b/drivers/net/ethernet/socionext/netsec/Makefile +new file mode 100644 +index 0000000..18884ed +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/Makefile +@@ -0,0 +1,6 @@ ++obj-$(CONFIG_SNI_NETSEC) := netsec.o ++netsec-objs := netsec_desc_ring_access.o \ ++ netsec_netdev.o \ ++ netsec_ethtool.o \ ++ netsec_platform.o \ ++ netsec_gmac_access.o +diff --git a/drivers/net/ethernet/socionext/netsec/netsec.h b/drivers/net/ethernet/socionext/netsec/netsec.h +new file mode 100644 +index 0000000..3b97661 +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec.h +@@ -0,0 +1,408 @@ ++/** ++ * netsec.h ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++#ifndef NETSEC_INTERNAL_H ++#define NETSEC_INTERNAL_H ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define NETSEC_FLOW_CONTROL_START_THRESHOLD 36 ++#define NETSEC_FLOW_CONTROL_STOP_THRESHOLD 48 ++ ++#define NETSEC_CLK_MHZ 1000000 ++ ++#define NETSEC_RX_PKT_BUF_LEN 1522 ++#define NETSEC_RX_JUMBO_PKT_BUF_LEN 9022 ++ ++#define NETSEC_NETDEV_TX_PKT_SCAT_NUM_MAX 19 ++ ++#define DESC_NUM 128 ++ ++#define NETSEC_TX_SHIFT_OWN_FIELD 31 ++#define NETSEC_TX_SHIFT_LD_FIELD 30 ++#define NETSEC_TX_SHIFT_DRID_FIELD 24 ++#define NETSEC_TX_SHIFT_PT_FIELD 21 ++#define NETSEC_TX_SHIFT_TDRID_FIELD 16 ++#define NETSEC_TX_SHIFT_CC_FIELD 15 ++#define NETSEC_TX_SHIFT_FS_FIELD 9 ++#define NETSEC_TX_LAST 8 ++#define NETSEC_TX_SHIFT_CO 7 ++#define NETSEC_TX_SHIFT_SO 6 ++#define NETSEC_TX_SHIFT_TRS_FIELD 4 ++ ++#define NETSEC_RX_PKT_OWN_FIELD 31 ++#define NETSEC_RX_PKT_LD_FIELD 30 ++#define NETSEC_RX_PKT_SDRID_FIELD 24 ++#define NETSEC_RX_PKT_FR_FIELD 23 ++#define NETSEC_RX_PKT_ER_FIELD 21 ++#define NETSEC_RX_PKT_ERR_FIELD 16 ++#define NETSEC_RX_PKT_TDRID_FIELD 12 ++#define NETSEC_RX_PKT_FS_FIELD 9 ++#define NETSEC_RX_PKT_LS_FIELD 8 ++#define NETSEC_RX_PKT_CO_FIELD 6 ++ ++#define NETSEC_RX_PKT_ERR_MASK 3 ++ ++#define NETSEC_MAX_TX_PKT_LEN 1518 ++#define NETSEC_MAX_TX_JUMBO_PKT_LEN 9018 ++ ++enum netsec_rings { ++ NETSEC_RING_TX, ++ NETSEC_RING_RX ++}; ++ ++#define NETSEC_RING_GMAC 15 ++#define NETSEC_RING_MAX 1 ++ ++#define NETSEC_TCP_SEG_LEN_MAX 1460 ++#define NETSEC_TCP_JUMBO_SEG_LEN_MAX 8960 ++ ++#define NETSEC_RX_CKSUM_NOTAVAIL 0 ++#define NETSEC_RX_CKSUM_OK 1 ++#define NETSEC_RX_CKSUM_NG 2 ++ ++#define NETSEC_TOP_IRQ_REG_CODE_LOAD_END BIT(20) ++#define NETSEC_IRQ_TRANSITION_COMPLETE BIT(4) ++#define NETSEC_IRQ_RX BIT(1) ++#define NETSEC_IRQ_TX BIT(0) ++ ++#define NETSEC_IRQ_EMPTY BIT(17) ++#define NETSEC_IRQ_ERR BIT(16) ++#define NETSEC_IRQ_PKT_CNT BIT(15) ++#define NETSEC_IRQ_TIMEUP BIT(14) ++#define NETSEC_IRQ_RCV (NETSEC_IRQ_PKT_CNT | \ ++ NETSEC_IRQ_TIMEUP) ++ ++#define NETSEC_IRQ_TX_DONE BIT(15) ++#define NETSEC_IRQ_SND (NETSEC_IRQ_TX_DONE | \ ++ NETSEC_IRQ_TIMEUP) ++ ++#define NETSEC_MODE_TRANS_COMP_IRQ_N2T BIT(20) ++#define NETSEC_MODE_TRANS_COMP_IRQ_T2N BIT(19) ++ ++#define NETSEC_DESC_MIN 2 ++#define NETSEC_DESC_MAX 2047 ++#define NETSEC_INT_PKTCNT_MAX 2047 ++ ++#define NETSEC_FLOW_START_TH_MAX 95 ++#define NETSEC_FLOW_STOP_TH_MAX 95 ++#define NETSEC_FLOW_PAUSE_TIME_MIN 5 ++ ++#define NETSEC_CLK_EN_REG_DOM_ALL 0x3f ++ ++#define NETSEC_REG_TOP_STATUS 0x80 ++#define NETSEC_REG_TOP_INTEN 0x81 ++#define NETSEC_REG_INTEN_SET 0x8d ++#define NETSEC_REG_INTEN_CLR 0x8e ++#define NETSEC_REG_NRM_TX_STATUS 0x100 ++#define NETSEC_REG_NRM_TX_INTEN 0x101 ++#define NETSEC_REG_NRM_TX_INTEN_SET 0x10a ++#define NETSEC_REG_NRM_TX_INTEN_CLR 0x10b ++#define NETSEC_REG_NRM_RX_STATUS 0x110 ++#define NETSEC_REG_NRM_RX_INTEN 0x111 ++#define NETSEC_REG_NRM_RX_INTEN_SET 0x11a ++#define NETSEC_REG_NRM_RX_INTEN_CLR 0x11b ++#define NETSEC_REG_RESERVED_RX_DESC_START 0x122 ++#define NETSEC_REG_RESERVED_TX_DESC_START 0x132 ++#define NETSEC_REG_CLK_EN 0x40 ++#define NETSEC_REG_SOFT_RST 0x41 ++#define NETSEC_REG_PKT_CMD_BUF 0x34 ++#define NETSEC_REG_PKT_CTRL 0x50 ++#define NETSEC_REG_COM_INIT 0x48 ++#define NETSEC_REG_DMA_TMR_CTRL 0x83 ++#define NETSEC_REG_F_TAIKI_MC_VER 0x8b ++#define NETSEC_REG_F_TAIKI_VER 0x8c ++#define NETSEC_REG_DMA_HM_CTRL 0x85 ++#define NETSEC_REG_DMA_MH_CTRL 0x88 ++#define NETSEC_REG_ADDR_DIS_CORE 0x86 ++#define NETSEC_REG_DMAC_HM_CMD_BUF 0x84 ++#define NETSEC_REG_DMAC_MH_CMD_BUF 0x87 ++#define NETSEC_REG_NRM_TX_PKTCNT 0x104 ++#define NETSEC_REG_NRM_TX_DONE_TXINT_PKTCNT 0x106 ++#define NETSEC_REG_NRM_RX_RXINT_PKTCNT 0x116 ++#define NETSEC_REG_NRM_TX_TXINT_TMR 0x108 ++#define NETSEC_REG_NRM_RX_RXINT_TMR 0x118 ++#define NETSEC_REG_NRM_TX_DONE_PKTCNT 0x105 ++#define NETSEC_REG_NRM_RX_PKTCNT 0x115 ++#define NETSEC_REG_NRM_TX_TMR 0x107 ++#define NETSEC_REG_NRM_RX_TMR 0x117 ++#define NETSEC_REG_NRM_TX_DESC_START_UP 0x10d ++#define NETSEC_REG_NRM_TX_DESC_START_LW 0x102 ++#define NETSEC_REG_NRM_RX_DESC_START_UP 0x11d ++#define NETSEC_REG_NRM_RX_DESC_START_LW 0x112 ++#define NETSEC_REG_NRM_TX_CONFIG 0x10c ++#define NETSEC_REG_NRM_RX_CONFIG 0x11c ++#define MAC_REG_DATA 0x470 ++#define MAC_REG_CMD 0x471 ++#define MAC_REG_FLOW_TH 0x473 ++#define MAC_REG_INTF_SEL 0x475 ++#define MAC_REG_DESC_INIT 0x47f ++#define MAC_REG_DESC_SOFT_RST 0x481 ++#define NETSEC_REG_MODE_TRANS_COMP_STATUS 0x140 ++#define GMAC_REG_MCR 0x0000 ++#define GMAC_REG_MFFR 0x0004 ++#define GMAC_REG_GAR 0x0010 ++#define GMAC_REG_GDR 0x0014 ++#define GMAC_REG_FCR 0x0018 ++#define GMAC_REG_BMR 0x1000 ++#define GMAC_REG_RDLAR 0x100c ++#define GMAC_REG_TDLAR 0x1010 ++#define GMAC_REG_OMR 0x1018 ++ ++#define NETSEC_PKT_CTRL_REG_MODE_NRM BIT(28) ++#define NETSEC_PKT_CTRL_REG_EN_JUMBO BIT(27) ++#define NETSEC_PKT_CTRL_REG_LOG_CHKSUM_ER BIT(3) ++#define NETSEC_PKT_CTRL_REG_LOG_HD_INCOMPLETE BIT(2) ++#define NETSEC_PKT_CTRL_REG_LOG_HD_ER BIT(1) ++#define NETSEC_PKT_CTRL_REG_DRP_NO_MATCH BIT(0) ++ ++#define NETSEC_CLK_EN_REG_DOM_G BIT(5) ++#define NETSEC_CLK_EN_REG_DOM_C BIT(1) ++#define NETSEC_CLK_EN_REG_DOM_D BIT(0) ++ ++#define NETSEC_COM_INIT_REG_DB BIT(2) ++#define NETSEC_COM_INIT_REG_CLS BIT(1) ++#define NETSEC_COM_INIT_REG_ALL (NETSEC_COM_INIT_REG_CLS | \ ++ NETSEC_COM_INIT_REG_DB) ++ ++#define NETSEC_SOFT_RST_REG_RESET 0 ++#define NETSEC_SOFT_RST_REG_RUN BIT(31) ++ ++#define NETSEC_DMA_CTRL_REG_STOP 1 ++#define MH_CTRL__MODE_TRANS BIT(20) ++ ++#define NETSEC_GMAC_CMD_ST_READ 0 ++#define NETSEC_GMAC_CMD_ST_WRITE BIT(28) ++#define NETSEC_GMAC_CMD_ST_BUSY BIT(31) ++ ++#define NETSEC_GMAC_BMR_REG_COMMON 0x00412080 ++#define NETSEC_GMAC_BMR_REG_RESET 0x00020181 ++#define NETSEC_GMAC_BMR_REG_SWR 0x00000001 ++ ++#define NETSEC_GMAC_OMR_REG_ST BIT(13) ++#define NETSEC_GMAC_OMR_REG_SR BIT(1) ++ ++#define NETSEC_GMAC_MCR_REG_IBN BIT(30) ++#define NETSEC_GMAC_MCR_REG_CST BIT(25) ++#define NETSEC_GMAC_MCR_REG_JE BIT(20) ++#define NETSEC_MCR_PS BIT(15) ++#define NETSEC_GMAC_MCR_REG_FES BIT(14) ++#define NETSEC_GMAC_MCR_REG_FULL_DUPLEX_COMMON 0x0000280c ++#define NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON 0x0001a00c ++ ++#define NETSEC_FCR_RFE BIT(2) ++#define NETSEC_FCR_TFE BIT(1) ++ ++#define NETSEC_GMAC_GAR_REG_GW BIT(1) ++#define NETSEC_GMAC_GAR_REG_GB BIT(0) ++ ++#define NETSEC_GMAC_GAR_REG_SHIFT_PA 11 ++#define NETSEC_GMAC_GAR_REG_SHIFT_GR 6 ++#define GMAC_REG_SHIFT_CR_GAR 2 ++ ++#define NETSEC_GMAC_GAR_REG_CR_25_35_MHZ 2 ++#define NETSEC_GMAC_GAR_REG_CR_35_60_MHZ 3 ++#define NETSEC_GMAC_GAR_REG_CR_60_100_MHZ 0 ++#define NETSEC_GMAC_GAR_REG_CR_100_150_MHZ 1 ++#define NETSEC_GMAC_GAR_REG_CR_150_250_MHZ 4 ++#define NETSEC_GMAC_GAR_REG_CR_250_300_MHZ 5 ++ ++#define NETSEC_GMAC_RDLAR_REG_COMMON 0x18000 ++#define NETSEC_GMAC_TDLAR_REG_COMMON 0x1c000 ++ ++#define NETSEC_REG_NETSEC_VER_F_TAIKI 0x50000 ++ ++#define NETSEC_REG_DESC_RING_CONFIG_CFG_UP BIT(31) ++#define NETSEC_REG_DESC_RING_CONFIG_CH_RST BIT(30) ++#define NETSEC_REG_DESC_TMR_MODE 4 ++#define NETSEC_REG_DESC_ENDIAN 0 ++ ++#define NETSEC_MAC_DESC_SOFT_RST_SOFT_RST 1 ++#define NETSEC_MAC_DESC_INIT_REG_INIT 1 ++ ++#define NETSEC_EEPROM_MAC_ADDRESS 0x00 ++#define NETSEC_EEPROM_HM_ME_ADDRESS_H 0x08 ++#define NETSEC_EEPROM_HM_ME_ADDRESS_L 0x0C ++#define NETSEC_EEPROM_HM_ME_SIZE 0x10 ++#define NETSEC_EEPROM_MH_ME_ADDRESS_H 0x14 ++#define NETSEC_EEPROM_MH_ME_ADDRESS_L 0x18 ++#define NETSEC_EEPROM_MH_ME_SIZE 0x1C ++#define NETSEC_EEPROM_PKT_ME_ADDRESS 0x20 ++#define NETSEC_EEPROM_PKT_ME_SIZE 0x24 ++ ++/* this is used to interpret a register layout */ ++struct netsec_pkt_ctrlaram { ++ u8 log_chksum_er_flag:1; ++ u8 log_hd_imcomplete_flag:1; ++ u8 log_hd_er_flag:1; ++}; ++ ++struct netsec_param { ++ struct netsec_pkt_ctrlaram pkt_ctrlaram; ++ bool use_jumbo_pkt_flag; ++}; ++ ++struct netsec_mac_mode { ++ u16 flow_start_th; ++ u16 flow_stop_th; ++ u16 pause_time; ++ bool flow_ctrl_enable_flag; ++}; ++ ++struct netsec_desc_ring { ++ spinlock_t spinlock_desc; /* protect descriptor access */ ++ phys_addr_t desc_phys; ++ struct netsec_frag_info *frag; ++ struct sk_buff **priv; ++ void *ring_vaddr; ++ enum netsec_rings id; ++ int len; ++ u16 tx_done_num; ++ u16 rx_num; ++ u16 head; ++ u16 tail; ++ bool running; ++ bool full; ++}; ++ ++struct netsec_frag_info { ++ dma_addr_t dma_addr; ++ void *addr; ++ u16 len; ++}; ++ ++struct netsec_priv { ++ struct netsec_desc_ring desc_ring[NETSEC_RING_MAX + 1]; ++ struct ethtool_coalesce et_coalesce; ++ struct netsec_mac_mode mac_mode; ++ struct netsec_param param; ++ struct napi_struct napi; ++ phy_interface_t phy_interface; ++ spinlock_t tx_queue_lock; /* protect transmit queue */ ++ struct netsec_frag_info tx_info[MAX_SKB_FRAGS]; ++ struct net_device *ndev; ++ struct device_node *phy_np; ++ struct phy_device *phydev; ++ struct mii_bus *mii_bus; ++ void __iomem *ioaddr; ++ const void *eeprom_base; ++ struct device *dev; ++ struct clk *clk[3]; ++ u32 rx_pkt_buf_len; ++ u32 msg_enable; ++ u32 freq; ++ int actual_link_speed; ++ int clock_count; ++ bool rx_cksum_offload_flag; ++ bool actual_duplex; ++ bool irq_registered; ++}; ++ ++struct netsec_tx_de { ++ u32 attr; ++ u32 data_buf_addr_up; ++ u32 data_buf_addr_lw; ++ u32 buf_len_info; ++}; ++ ++struct netsec_rx_de { ++ u32 attr; ++ u32 data_buf_addr_up; ++ u32 data_buf_addr_lw; ++ u32 buf_len_info; ++}; ++ ++struct netsec_tx_pkt_ctrl { ++ u16 tcp_seg_len; ++ bool tcp_seg_offload_flag; ++ bool cksum_offload_flag; ++}; ++ ++struct netsec_rx_pkt_info { ++ int rx_cksum_result; ++ int err_code; ++ bool is_fragmented; ++ bool err_flag; ++}; ++ ++struct netsec_skb_cb { ++ bool is_rx; ++}; ++ ++static inline void netsec_writel(struct netsec_priv *priv, ++ u32 reg_addr, u32 val) ++{ ++ writel_relaxed(val, priv->ioaddr + (reg_addr << 2)); ++} ++ ++static inline u32 netsec_readl(struct netsec_priv *priv, u32 reg_addr) ++{ ++ return readl_relaxed(priv->ioaddr + (reg_addr << 2)); ++} ++ ++static inline void netsec_mark_skb_type(struct sk_buff *skb, bool is_rx) ++{ ++ struct netsec_skb_cb *cb = (struct netsec_skb_cb *)skb->cb; ++ ++ cb->is_rx = is_rx; ++} ++ ++static inline bool skb_is_rx(struct sk_buff *skb) ++{ ++ struct netsec_skb_cb *cb = (struct netsec_skb_cb *)skb->cb; ++ ++ return cb->is_rx; ++} ++ ++extern const struct net_device_ops netsec_netdev_ops; ++extern const struct ethtool_ops netsec_ethtool_ops; ++ ++int netsec_start_gmac(struct netsec_priv *priv); ++int netsec_stop_gmac(struct netsec_priv *priv); ++int netsec_mii_register(struct netsec_priv *priv); ++void netsec_mii_unregister(struct netsec_priv *priv); ++int netsec_start_desc_ring(struct netsec_priv *priv, enum netsec_rings id); ++void netsec_stop_desc_ring(struct netsec_priv *priv, enum netsec_rings id); ++u16 netsec_get_rx_num(struct netsec_priv *priv); ++u16 netsec_get_tx_avail_num(struct netsec_priv *priv); ++int netsec_clean_tx_desc_ring(struct netsec_priv *priv); ++int netsec_clean_rx_desc_ring(struct netsec_priv *priv); ++int netsec_set_tx_pkt_data(struct netsec_priv *priv, ++ const struct netsec_tx_pkt_ctrl *tx_ctrl, ++ u8 count_frags, const struct netsec_frag_info *info, ++ struct sk_buff *skb); ++int netsec_get_rx_pkt_data(struct netsec_priv *priv, ++ struct netsec_rx_pkt_info *rxpi, ++ struct netsec_frag_info *frag, u16 *len, ++ struct sk_buff **skb); ++void netsec_ring_irq_enable(struct netsec_priv *priv, ++ enum netsec_rings id, u32 i); ++void netsec_ring_irq_disable(struct netsec_priv *priv, ++ enum netsec_rings id, u32 i); ++int netsec_alloc_desc_ring(struct netsec_priv *priv, enum netsec_rings id); ++void netsec_free_desc_ring(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc); ++int netsec_setup_rx_desc(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc); ++int netsec_netdev_napi_poll(struct napi_struct *napi_p, int budget); ++ ++#endif /* NETSEC_INTERNAL_H */ +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_desc_ring_access.c b/drivers/net/ethernet/socionext/netsec/netsec_desc_ring_access.c +new file mode 100644 +index 0000000..a4e56cd +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec_desc_ring_access.c +@@ -0,0 +1,623 @@ ++/** ++ * drivers/net/ethernet/socionext/netsec/netsec_desc_ring_access.c ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++ ++#include ++#include ++ ++#include "netsec.h" ++ ++static const u32 ads_irq_set[] = { ++ NETSEC_REG_NRM_TX_INTEN_SET, ++ NETSEC_REG_NRM_RX_INTEN_SET, ++}; ++ ++static const u32 desc_ring_irq_inten_clr_reg_addr[] = { ++ NETSEC_REG_NRM_TX_INTEN_CLR, ++ NETSEC_REG_NRM_RX_INTEN_CLR, ++}; ++ ++static const u32 int_tmr_reg_addr[] = { ++ NETSEC_REG_NRM_TX_TXINT_TMR, ++ NETSEC_REG_NRM_RX_RXINT_TMR, ++}; ++ ++static const u32 rx_pkt_cnt_reg_addr[] = { ++ 0, ++ NETSEC_REG_NRM_RX_PKTCNT, ++}; ++ ++static const u32 tx_pkt_cnt_reg_addr[] = { ++ NETSEC_REG_NRM_TX_PKTCNT, ++ 0, ++}; ++ ++static const u32 int_pkt_cnt_reg_addr[] = { ++ NETSEC_REG_NRM_TX_DONE_TXINT_PKTCNT, ++ NETSEC_REG_NRM_RX_RXINT_PKTCNT, ++}; ++ ++static const u32 tx_done_pkt_addr[] = { ++ NETSEC_REG_NRM_TX_DONE_PKTCNT, ++ 0, ++}; ++ ++static const u32 netsec_desc_mask[] = { ++ [NETSEC_RING_TX] = NETSEC_GMAC_OMR_REG_ST, ++ [NETSEC_RING_RX] = NETSEC_GMAC_OMR_REG_SR ++}; ++ ++void netsec_ring_irq_enable(struct netsec_priv *priv, ++ enum netsec_rings id, u32 irqf) ++{ ++ netsec_writel(priv, ads_irq_set[id], irqf); ++} ++ ++void netsec_ring_irq_disable(struct netsec_priv *priv, ++ enum netsec_rings id, u32 irqf) ++{ ++ netsec_writel(priv, desc_ring_irq_inten_clr_reg_addr[id], irqf); ++} ++ ++static struct sk_buff *alloc_rx_pkt_buf(struct netsec_priv *priv, ++ struct netsec_frag_info *info) ++{ ++ struct sk_buff *skb; ++ ++ if (device_get_dma_attr(priv->dev) == DEV_DMA_COHERENT) { ++ skb = netdev_alloc_skb_ip_align(priv->ndev, info->len); ++ } else { ++ info->len = L1_CACHE_ALIGN(info->len); ++ skb = netdev_alloc_skb(priv->ndev, info->len); ++ } ++ if (!skb) ++ return NULL; ++ ++ netsec_mark_skb_type(skb, NETSEC_RING_RX); ++ info->addr = skb->data; ++ info->dma_addr = dma_map_single(priv->dev, info->addr, info->len, ++ DMA_FROM_DEVICE); ++ if (dma_mapping_error(priv->dev, info->dma_addr)) { ++ dev_kfree_skb(skb); ++ return NULL; ++ } ++ return skb; ++} ++ ++int netsec_alloc_desc_ring(struct netsec_priv *priv, enum netsec_rings id) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[id]; ++ int ret = 0; ++ ++ desc->id = id; ++ desc->len = sizeof(struct netsec_tx_de); /* rx and tx desc same size */ ++ ++ spin_lock_init(&desc->spinlock_desc); ++ ++ desc->ring_vaddr = dma_zalloc_coherent(priv->dev, desc->len * DESC_NUM, ++ &desc->desc_phys, GFP_KERNEL); ++ if (!desc->ring_vaddr) { ++ ret = -ENOMEM; ++ goto err; ++ } ++ ++ desc->frag = kcalloc(DESC_NUM, sizeof(*desc->frag), GFP_KERNEL); ++ if (!desc->frag) { ++ ret = -ENOMEM; ++ goto err; ++ } ++ ++ desc->priv = kcalloc(DESC_NUM, sizeof(struct sk_buff *), GFP_KERNEL); ++ if (!desc->priv) { ++ ret = -ENOMEM; ++ goto err; ++ } ++ ++ return 0; ++ ++err: ++ netsec_free_desc_ring(priv, desc); ++ ++ return ret; ++} ++ ++static void netsec_uninit_pkt_desc_ring(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc) ++{ ++ struct netsec_frag_info *frag; ++ u32 status; ++ u16 idx; ++ ++ for (idx = 0; idx < DESC_NUM; idx++) { ++ frag = &desc->frag[idx]; ++ if (!frag->addr) ++ continue; ++ ++ status = *(u32 *)(desc->ring_vaddr + desc->len * idx); ++ ++ dma_unmap_single(priv->dev, frag->dma_addr, frag->len, ++ skb_is_rx(desc->priv[idx]) ? DMA_FROM_DEVICE : ++ DMA_TO_DEVICE); ++ if ((status >> NETSEC_TX_LAST) & 1) ++ dev_kfree_skb(desc->priv[idx]); ++ } ++ ++ memset(desc->frag, 0, sizeof(struct netsec_frag_info) * DESC_NUM); ++ memset(desc->priv, 0, sizeof(struct sk_buff *) * DESC_NUM); ++ memset(desc->ring_vaddr, 0, desc->len * DESC_NUM); ++} ++ ++void netsec_free_desc_ring(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc) ++{ ++ if (desc->ring_vaddr && desc->frag && desc->priv) ++ netsec_uninit_pkt_desc_ring(priv, desc); ++ ++ if (desc->ring_vaddr) { ++ dma_free_coherent(priv->dev, desc->len * DESC_NUM, ++ desc->ring_vaddr, desc->desc_phys); ++ desc->ring_vaddr = NULL; ++ } ++ kfree(desc->frag); ++ desc->frag = NULL; ++ kfree(desc->priv); ++ desc->priv = NULL; ++} ++ ++static void netsec_set_rx_de(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc, u16 idx, ++ const struct netsec_frag_info *info, ++ struct sk_buff *skb) ++{ ++ struct netsec_rx_de *de = desc->ring_vaddr + desc->len * idx; ++ u32 attr = (1 << NETSEC_RX_PKT_OWN_FIELD) | ++ (1 << NETSEC_RX_PKT_FS_FIELD) | ++ (1 << NETSEC_RX_PKT_LS_FIELD); ++ ++ if (idx == DESC_NUM - 1) ++ attr |= (1 << NETSEC_RX_PKT_LD_FIELD); ++ ++ de->data_buf_addr_up = upper_32_bits(info->dma_addr); ++ de->data_buf_addr_lw = lower_32_bits(info->dma_addr); ++ de->buf_len_info = info->len; ++ /* desc->attr makes the descriptor live, so it must be physically ++ * written last after the rest of the descriptor body is already there ++ */ ++ dma_wmb(); ++ de->attr = attr; ++ ++ desc->frag[idx].dma_addr = info->dma_addr; ++ desc->frag[idx].addr = info->addr; ++ desc->frag[idx].len = info->len; ++ ++ desc->priv[idx] = skb; ++} ++ ++int netsec_setup_rx_desc(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc) ++{ ++ struct netsec_frag_info info; ++ struct sk_buff *skb; ++ int n; ++ ++ info.len = priv->rx_pkt_buf_len; ++ ++ for (n = 0; n < DESC_NUM; n++) { ++ skb = alloc_rx_pkt_buf(priv, &info); ++ if (!skb) { ++ netsec_uninit_pkt_desc_ring(priv, desc); ++ return -ENOMEM; ++ } ++ netsec_set_rx_de(priv, desc, n, &info, skb); ++ } ++ ++ return 0; ++} ++ ++static void netsec_set_tx_desc_entry(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc, ++ const struct netsec_tx_pkt_ctrl *tx_ctrl, ++ bool first_flag, bool last_flag, ++ const struct netsec_frag_info *frag, ++ struct sk_buff *skb) ++{ ++ struct netsec_tx_de *tx_desc_entry; ++ int idx = desc->head; ++ u32 attr; ++ ++ tx_desc_entry = desc->ring_vaddr + (desc->len * idx); ++ ++ attr = (1 << NETSEC_TX_SHIFT_OWN_FIELD) | ++ (desc->id << NETSEC_TX_SHIFT_DRID_FIELD) | ++ (1 << NETSEC_TX_SHIFT_PT_FIELD) | ++ (NETSEC_RING_GMAC << NETSEC_TX_SHIFT_TDRID_FIELD) | ++ (first_flag << NETSEC_TX_SHIFT_FS_FIELD) | ++ (last_flag << NETSEC_TX_LAST) | ++ (tx_ctrl->cksum_offload_flag << NETSEC_TX_SHIFT_CO) | ++ (tx_ctrl->tcp_seg_offload_flag << NETSEC_TX_SHIFT_SO) | ++ (1 << NETSEC_TX_SHIFT_TRS_FIELD); ++ if (idx == DESC_NUM - 1) ++ attr |= (1 << NETSEC_TX_SHIFT_LD_FIELD); ++ ++ tx_desc_entry->data_buf_addr_up = upper_32_bits(frag->dma_addr); ++ tx_desc_entry->data_buf_addr_lw = lower_32_bits(frag->dma_addr); ++ tx_desc_entry->buf_len_info = (tx_ctrl->tcp_seg_len << 16) | frag->len; ++ /* desc->attr makes the descriptor live, so it must be physically ++ * written last after the rest of the descriptor body is already there ++ */ ++ dma_wmb(); ++ tx_desc_entry->attr = attr; ++ ++ desc->frag[idx] = *frag; ++ desc->priv[idx] = skb; ++} ++ ++static void netsec_get_rx_de(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc, u16 idx, ++ struct netsec_rx_pkt_info *rxpi, ++ struct netsec_frag_info *frag, u16 *len, ++ struct sk_buff **skb) ++{ ++ struct netsec_rx_de de = {}; ++ ++ *rxpi = (struct netsec_rx_pkt_info){}; ++ memcpy(&de, desc->ring_vaddr + desc->len * idx, desc->len); ++ ++ dev_dbg(priv->dev, "%08x\n", *(u32 *)&de); ++ *len = de.buf_len_info >> 16; ++ ++ rxpi->is_fragmented = (de.attr >> NETSEC_RX_PKT_FR_FIELD) & 1; ++ rxpi->err_flag = (de.attr >> NETSEC_RX_PKT_ER_FIELD) & 1; ++ rxpi->rx_cksum_result = (de.attr >> NETSEC_RX_PKT_CO_FIELD) & 3; ++ rxpi->err_code = (de.attr >> NETSEC_RX_PKT_ERR_FIELD) & ++ NETSEC_RX_PKT_ERR_MASK; ++ *frag = desc->frag[idx]; ++ *skb = desc->priv[idx]; ++} ++ ++static void netsec_inc_desc_head_idx(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc, u16 inc) ++{ ++ u32 sum; ++ ++ sum = desc->head + inc; ++ ++ if (sum >= DESC_NUM) ++ sum -= DESC_NUM; ++ ++ desc->head = sum; ++ desc->full = desc->head == desc->tail; ++} ++ ++static void netsec_inc_desc_tail_idx(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc) ++{ ++ u32 sum; ++ ++ sum = desc->tail + 1; ++ ++ if (sum >= DESC_NUM) ++ sum -= DESC_NUM; ++ ++ desc->tail = sum; ++ desc->full = false; ++} ++ ++static u16 netsec_get_tx_avail_num_sub(struct netsec_priv *priv, ++ const struct netsec_desc_ring *desc) ++{ ++ if (desc->full) ++ return 0; ++ ++ if (desc->tail > desc->head) ++ return desc->tail - desc->head; ++ ++ return DESC_NUM + desc->tail - desc->head; ++} ++ ++static u16 netsec_get_tx_done_num_sub(struct netsec_priv *priv, ++ struct netsec_desc_ring *desc) ++{ ++ desc->tx_done_num += netsec_readl(priv, tx_done_pkt_addr[desc->id]); ++ ++ return desc->tx_done_num; ++} ++ ++static int netsec_set_irq_coalesce_param(struct netsec_priv *priv, ++ enum netsec_rings id) ++{ ++ int max_frames, tmr; ++ ++ switch (id) { ++ case NETSEC_RING_TX: ++ max_frames = priv->et_coalesce.tx_max_coalesced_frames; ++ tmr = priv->et_coalesce.tx_coalesce_usecs; ++ break; ++ case NETSEC_RING_RX: ++ max_frames = priv->et_coalesce.rx_max_coalesced_frames; ++ tmr = priv->et_coalesce.rx_coalesce_usecs; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ netsec_writel(priv, int_pkt_cnt_reg_addr[id], max_frames); ++ netsec_writel(priv, int_tmr_reg_addr[id], ((tmr != 0) << 31) | tmr); ++ ++ return 0; ++} ++ ++int netsec_start_desc_ring(struct netsec_priv *priv, enum netsec_rings id) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[id]; ++ int ret = 0; ++ ++ spin_lock_bh(&desc->spinlock_desc); ++ ++ if (desc->running) { ++ ret = -EBUSY; ++ goto err; ++ } ++ ++ switch (desc->id) { ++ case NETSEC_RING_RX: ++ netsec_writel(priv, ads_irq_set[id], NETSEC_IRQ_RCV); ++ break; ++ case NETSEC_RING_TX: ++ netsec_writel(priv, ads_irq_set[id], NETSEC_IRQ_EMPTY); ++ break; ++ } ++ ++ netsec_set_irq_coalesce_param(priv, desc->id); ++ desc->running = true; ++ ++err: ++ spin_unlock_bh(&desc->spinlock_desc); ++ ++ return ret; ++} ++ ++void netsec_stop_desc_ring(struct netsec_priv *priv, enum netsec_rings id) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[id]; ++ ++ spin_lock_bh(&desc->spinlock_desc); ++ if (desc->running) ++ netsec_writel(priv, desc_ring_irq_inten_clr_reg_addr[id], ++ NETSEC_IRQ_RCV | NETSEC_IRQ_EMPTY | ++ NETSEC_IRQ_SND); ++ ++ desc->running = false; ++ spin_unlock_bh(&desc->spinlock_desc); ++} ++ ++u16 netsec_get_rx_num(struct netsec_priv *priv) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[NETSEC_RING_RX]; ++ u32 result; ++ ++ spin_lock(&desc->spinlock_desc); ++ if (desc->running) { ++ result = netsec_readl(priv, ++ rx_pkt_cnt_reg_addr[NETSEC_RING_RX]); ++ desc->rx_num += result; ++ if (result) ++ netsec_inc_desc_head_idx(priv, desc, result); ++ } ++ spin_unlock(&desc->spinlock_desc); ++ ++ return desc->rx_num; ++} ++ ++u16 netsec_get_tx_avail_num(struct netsec_priv *priv) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[NETSEC_RING_TX]; ++ u16 result; ++ ++ spin_lock(&desc->spinlock_desc); ++ ++ if (!desc->running) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: not running tx desc\n", __func__); ++ result = 0; ++ goto err; ++ } ++ ++ result = netsec_get_tx_avail_num_sub(priv, desc); ++ ++err: ++ spin_unlock(&desc->spinlock_desc); ++ ++ return result; ++} ++ ++int netsec_clean_tx_desc_ring(struct netsec_priv *priv) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[NETSEC_RING_TX]; ++ unsigned int pkts = 0, bytes = 0; ++ struct netsec_frag_info *frag; ++ struct netsec_tx_de *entry; ++ bool is_last; ++ ++ spin_lock(&desc->spinlock_desc); ++ ++ netsec_get_tx_done_num_sub(priv, desc); ++ ++ while ((desc->tail != desc->head || desc->full) && desc->tx_done_num) { ++ frag = &desc->frag[desc->tail]; ++ entry = desc->ring_vaddr + desc->len * desc->tail; ++ is_last = (entry->attr >> NETSEC_TX_LAST) & 1; ++ ++ dma_unmap_single(priv->dev, frag->dma_addr, frag->len, ++ DMA_TO_DEVICE); ++ if (is_last) { ++ pkts++; ++ bytes += desc->priv[desc->tail]->len; ++ dev_kfree_skb(desc->priv[desc->tail]); ++ } ++ *frag = (struct netsec_frag_info){}; ++ netsec_inc_desc_tail_idx(priv, desc); ++ ++ if (is_last) ++ desc->tx_done_num--; ++ } ++ ++ spin_unlock(&desc->spinlock_desc); ++ ++ priv->ndev->stats.tx_packets += pkts; ++ priv->ndev->stats.tx_bytes += bytes; ++ ++ netdev_completed_queue(priv->ndev, pkts, bytes); ++ ++ return 0; ++} ++ ++int netsec_clean_rx_desc_ring(struct netsec_priv *priv) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[NETSEC_RING_RX]; ++ ++ spin_lock(&desc->spinlock_desc); ++ ++ while (desc->full || (desc->tail != desc->head)) { ++ netsec_set_rx_de(priv, desc, desc->tail, ++ &desc->frag[desc->tail], ++ desc->priv[desc->tail]); ++ desc->rx_num--; ++ netsec_inc_desc_tail_idx(priv, desc); ++ } ++ ++ spin_unlock(&desc->spinlock_desc); ++ ++ return 0; ++} ++ ++int netsec_set_tx_pkt_data(struct netsec_priv *priv, ++ const struct netsec_tx_pkt_ctrl *tx_ctrl, ++ u8 count_frags, const struct netsec_frag_info *info, ++ struct sk_buff *skb) ++{ ++ struct netsec_desc_ring *desc; ++ u32 sum_len = 0; ++ unsigned int i; ++ int ret = 0; ++ ++ if (tx_ctrl->tcp_seg_offload_flag && !tx_ctrl->cksum_offload_flag) ++ return -EINVAL; ++ ++ if (tx_ctrl->tcp_seg_offload_flag) { ++ if (tx_ctrl->tcp_seg_len == 0) ++ return -EINVAL; ++ ++ if (priv->param.use_jumbo_pkt_flag) { ++ if (tx_ctrl->tcp_seg_len > NETSEC_TCP_JUMBO_SEG_LEN_MAX) ++ return -EINVAL; ++ } else { ++ if (tx_ctrl->tcp_seg_len > NETSEC_TCP_SEG_LEN_MAX) ++ return -EINVAL; ++ } ++ } else { ++ if (tx_ctrl->tcp_seg_len) ++ return -EINVAL; ++ } ++ ++ if (!count_frags) ++ return -ERANGE; ++ ++ for (i = 0; i < count_frags; i++) { ++ if ((info[i].len == 0) || (info[i].len > 0xffff)) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: bad info len\n", __func__); ++ return -EINVAL; ++ } ++ sum_len += info[i].len; ++ } ++ ++ if (!tx_ctrl->tcp_seg_offload_flag) { ++ if (priv->param.use_jumbo_pkt_flag) { ++ if (sum_len > NETSEC_MAX_TX_JUMBO_PKT_LEN) ++ return -EINVAL; ++ } else { ++ if (sum_len > NETSEC_MAX_TX_PKT_LEN) ++ return -EINVAL; ++ } ++ } ++ ++ desc = &priv->desc_ring[NETSEC_RING_TX]; ++ spin_lock(&desc->spinlock_desc); ++ ++ if (!desc->running) { ++ ret = -ENODEV; ++ goto end; ++ } ++ ++ dma_rmb(); /* we need to see a consistent view of pending tx count */ ++ if (count_frags > netsec_get_tx_avail_num_sub(priv, desc)) { ++ ret = -EBUSY; ++ goto end; ++ } ++ ++ for (i = 0; i < count_frags; i++) { ++ netsec_set_tx_desc_entry(priv, desc, tx_ctrl, i == 0, ++ i == count_frags - 1, &info[i], skb); ++ netsec_inc_desc_head_idx(priv, desc, 1); ++ } ++ ++ dma_wmb(); /* ensure the descriptor is flushed */ ++ netsec_writel(priv, tx_pkt_cnt_reg_addr[NETSEC_RING_TX], 1); ++ ++end: ++ spin_unlock(&desc->spinlock_desc); ++ ++ return ret; ++} ++ ++int netsec_get_rx_pkt_data(struct netsec_priv *priv, ++ struct netsec_rx_pkt_info *rxpi, ++ struct netsec_frag_info *frag, u16 *len, ++ struct sk_buff **skb) ++{ ++ struct netsec_desc_ring *desc = &priv->desc_ring[NETSEC_RING_RX]; ++ struct netsec_frag_info info; ++ struct sk_buff *tmp_skb; ++ int ret = 0; ++ ++ spin_lock(&desc->spinlock_desc); ++ ++ if (desc->rx_num == 0) { ++ dev_err(priv->dev, "%s 0 len rx\n", __func__); ++ ret = -EINVAL; ++ goto err; ++ } ++ ++ info.len = priv->rx_pkt_buf_len; ++ dma_rmb(); /* we need to ensure we only see current data in descriptor */ ++ tmp_skb = alloc_rx_pkt_buf(priv, &info); ++ if (!tmp_skb) { ++ netsec_set_rx_de(priv, desc, desc->tail, ++ &desc->frag[desc->tail], ++ desc->priv[desc->tail]); ++ ret = -ENOMEM; ++ } else { ++ netsec_get_rx_de(priv, desc, desc->tail, rxpi, frag, len, skb); ++ netsec_set_rx_de(priv, desc, desc->tail, &info, tmp_skb); ++ } ++ ++ netsec_inc_desc_tail_idx(priv, desc); ++ desc->rx_num--; ++ ++err: ++ spin_unlock(&desc->spinlock_desc); ++ ++ return ret; ++} +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_ethtool.c b/drivers/net/ethernet/socionext/netsec/netsec_ethtool.c +new file mode 100644 +index 0000000..45830fe +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec_ethtool.c +@@ -0,0 +1,78 @@ ++/** ++ * drivers/net/ethernet/socionext/netsec/netsec_ethtool.c ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++ ++#include "netsec.h" ++ ++static void netsec_et_get_drvinfo(struct net_device *net_device, ++ struct ethtool_drvinfo *info) ++{ ++ strlcpy(info->driver, "netsec", sizeof(info->driver)); ++ strlcpy(info->bus_info, dev_name(net_device->dev.parent), ++ sizeof(info->bus_info)); ++} ++ ++static int netsec_et_get_coalesce(struct net_device *net_device, ++ struct ethtool_coalesce *et_coalesce) ++{ ++ struct netsec_priv *priv = netdev_priv(net_device); ++ ++ *et_coalesce = priv->et_coalesce; ++ ++ return 0; ++} ++ ++static int netsec_et_set_coalesce(struct net_device *net_device, ++ struct ethtool_coalesce *et_coalesce) ++{ ++ struct netsec_priv *priv = netdev_priv(net_device); ++ ++ if (et_coalesce->rx_max_coalesced_frames > NETSEC_INT_PKTCNT_MAX) ++ return -EINVAL; ++ if (et_coalesce->tx_max_coalesced_frames > NETSEC_INT_PKTCNT_MAX) ++ return -EINVAL; ++ if (!et_coalesce->rx_max_coalesced_frames) ++ return -EINVAL; ++ if (!et_coalesce->tx_max_coalesced_frames) ++ return -EINVAL; ++ ++ priv->et_coalesce = *et_coalesce; ++ ++ return 0; ++} ++ ++static u32 netsec_et_get_msglevel(struct net_device *dev) ++{ ++ struct netsec_priv *priv = netdev_priv(dev); ++ ++ return priv->msg_enable; ++} ++ ++static void netsec_et_set_msglevel(struct net_device *dev, u32 datum) ++{ ++ struct netsec_priv *priv = netdev_priv(dev); ++ ++ priv->msg_enable = datum; ++} ++ ++const struct ethtool_ops netsec_ethtool_ops = { ++ .get_drvinfo = netsec_et_get_drvinfo, ++ .get_link_ksettings = phy_ethtool_get_link_ksettings, ++ .set_link_ksettings = phy_ethtool_set_link_ksettings, ++ .get_link = ethtool_op_get_link, ++ .get_coalesce = netsec_et_get_coalesce, ++ .set_coalesce = netsec_et_set_coalesce, ++ .get_msglevel = netsec_et_get_msglevel, ++ .set_msglevel = netsec_et_set_msglevel, ++}; +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_gmac_access.c b/drivers/net/ethernet/socionext/netsec/netsec_gmac_access.c +new file mode 100644 +index 0000000..94e9b7f +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec_gmac_access.c +@@ -0,0 +1,330 @@ ++/** ++ * drivers/net/ethernet/socionext/netsec/netsec_gmac_access.c ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++#include "netsec.h" ++ ++#define TIMEOUT_SPINS_MAC 1000 ++#define TIMEOUT_SECONDARY_MS_MAC 100 ++ ++static u32 netsec_clk_type(u32 freq) ++{ ++ if (freq < 35 * NETSEC_CLK_MHZ) ++ return NETSEC_GMAC_GAR_REG_CR_25_35_MHZ; ++ if (freq < 60 * NETSEC_CLK_MHZ) ++ return NETSEC_GMAC_GAR_REG_CR_35_60_MHZ; ++ if (freq < 100 * NETSEC_CLK_MHZ) ++ return NETSEC_GMAC_GAR_REG_CR_60_100_MHZ; ++ if (freq < 150 * NETSEC_CLK_MHZ) ++ return NETSEC_GMAC_GAR_REG_CR_100_150_MHZ; ++ if (freq < 250 * NETSEC_CLK_MHZ) ++ return NETSEC_GMAC_GAR_REG_CR_150_250_MHZ; ++ ++ return NETSEC_GMAC_GAR_REG_CR_250_300_MHZ; ++} ++ ++static int netsec_wait_while_busy(struct netsec_priv *priv, u32 addr, u32 mask) ++{ ++ u32 timeout = TIMEOUT_SPINS_MAC; ++ ++ while (--timeout && netsec_readl(priv, addr) & mask) ++ cpu_relax(); ++ if (timeout) ++ return 0; ++ ++ timeout = TIMEOUT_SECONDARY_MS_MAC; ++ while (--timeout && netsec_readl(priv, addr) & mask) ++ usleep_range(1000, 2000); ++ ++ if (timeout) ++ return 0; ++ ++ netdev_WARN(priv->ndev, "%s: timeout\n", __func__); ++ ++ return -ETIMEDOUT; ++} ++ ++static int netsec_mac_write(struct netsec_priv *priv, u32 addr, u32 value) ++{ ++ netsec_writel(priv, MAC_REG_DATA, value); ++ netsec_writel(priv, MAC_REG_CMD, addr | NETSEC_GMAC_CMD_ST_WRITE); ++ return netsec_wait_while_busy(priv, ++ MAC_REG_CMD, NETSEC_GMAC_CMD_ST_BUSY); ++} ++ ++static int netsec_mac_read(struct netsec_priv *priv, u32 addr, u32 *read) ++{ ++ int ret; ++ ++ netsec_writel(priv, MAC_REG_CMD, addr | NETSEC_GMAC_CMD_ST_READ); ++ ret = netsec_wait_while_busy(priv, ++ MAC_REG_CMD, NETSEC_GMAC_CMD_ST_BUSY); ++ if (ret) ++ return ret; ++ ++ *read = netsec_readl(priv, MAC_REG_DATA); ++ ++ return 0; ++} ++ ++static int netsec_mac_wait_while_busy(struct netsec_priv *priv, ++ u32 addr, u32 mask) ++{ ++ u32 timeout = TIMEOUT_SPINS_MAC; ++ int ret, data; ++ ++ do { ++ ret = netsec_mac_read(priv, addr, &data); ++ if (ret) ++ break; ++ cpu_relax(); ++ } while (--timeout && (data & mask)); ++ ++ if (timeout) ++ return 0; ++ ++ timeout = TIMEOUT_SECONDARY_MS_MAC; ++ do { ++ usleep_range(1000, 2000); ++ ++ ret = netsec_mac_read(priv, addr, &data); ++ if (ret) ++ break; ++ cpu_relax(); ++ } while (--timeout && (data & mask)); ++ ++ if (timeout && !ret) ++ return 0; ++ ++ netdev_WARN(priv->ndev, "%s: timeout\n", __func__); ++ ++ return -ETIMEDOUT; ++} ++ ++static int netsec_mac_update_to_phy_state(struct netsec_priv *priv) ++{ ++ struct phy_device *phydev = priv->ndev->phydev; ++ u32 value = 0; ++ ++ value = phydev->duplex ? NETSEC_GMAC_MCR_REG_FULL_DUPLEX_COMMON : ++ NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON; ++ ++ if (phydev->speed != SPEED_1000) ++ value |= NETSEC_MCR_PS; ++ ++ if ((priv->phy_interface != PHY_INTERFACE_MODE_GMII) && ++ (phydev->speed == SPEED_100)) ++ value |= NETSEC_GMAC_MCR_REG_FES; ++ ++ value |= NETSEC_GMAC_MCR_REG_CST | NETSEC_GMAC_MCR_REG_JE; ++ ++ if (priv->phy_interface == PHY_INTERFACE_MODE_RGMII) ++ value |= NETSEC_GMAC_MCR_REG_IBN; ++ ++ if (netsec_mac_write(priv, GMAC_REG_MCR, value)) ++ return -ETIMEDOUT; ++ ++ priv->actual_link_speed = phydev->speed; ++ priv->actual_duplex = phydev->duplex; ++ ++ return 0; ++} ++ ++/* NB netsec_start_gmac() only called from adjust_link */ ++ ++int netsec_start_gmac(struct netsec_priv *priv) ++{ ++ struct phy_device *phydev = priv->ndev->phydev; ++ u32 value = 0; ++ int ret; ++ ++ if (priv->desc_ring[NETSEC_RING_TX].running && ++ priv->desc_ring[NETSEC_RING_RX].running) ++ return 0; ++ ++ if (!priv->desc_ring[NETSEC_RING_RX].running && ++ !priv->desc_ring[NETSEC_RING_TX].running) { ++ if (phydev->speed != SPEED_1000) ++ value = (NETSEC_GMAC_MCR_REG_CST | ++ NETSEC_GMAC_MCR_REG_HALF_DUPLEX_COMMON); ++ ++ if (netsec_mac_write(priv, GMAC_REG_MCR, value)) ++ return -ETIMEDOUT; ++ if (netsec_mac_write(priv, GMAC_REG_BMR, ++ NETSEC_GMAC_BMR_REG_RESET)) ++ return -ETIMEDOUT; ++ ++ /* Wait soft reset */ ++ usleep_range(1000, 5000); ++ ++ ret = netsec_mac_read(priv, GMAC_REG_BMR, &value); ++ if (ret) ++ return ret; ++ if (value & NETSEC_GMAC_BMR_REG_SWR) ++ return -EAGAIN; ++ ++ netsec_writel(priv, MAC_REG_DESC_SOFT_RST, 1); ++ if (netsec_wait_while_busy(priv, MAC_REG_DESC_SOFT_RST, 1)) ++ return -ETIMEDOUT; ++ ++ netsec_writel(priv, MAC_REG_DESC_INIT, 1); ++ if (netsec_wait_while_busy(priv, MAC_REG_DESC_INIT, 1)) ++ return -ETIMEDOUT; ++ ++ if (netsec_mac_write(priv, GMAC_REG_BMR, ++ NETSEC_GMAC_BMR_REG_COMMON)) ++ return -ETIMEDOUT; ++ if (netsec_mac_write(priv, GMAC_REG_RDLAR, ++ NETSEC_GMAC_RDLAR_REG_COMMON)) ++ return -ETIMEDOUT; ++ if (netsec_mac_write(priv, GMAC_REG_TDLAR, ++ NETSEC_GMAC_TDLAR_REG_COMMON)) ++ return -ETIMEDOUT; ++ if (netsec_mac_write(priv, GMAC_REG_MFFR, 0x80000001)) ++ return -ETIMEDOUT; ++ ++ ret = netsec_mac_update_to_phy_state(priv); ++ if (ret) ++ return ret; ++ ++ if (priv->mac_mode.flow_ctrl_enable_flag) { ++ netsec_writel(priv, MAC_REG_FLOW_TH, ++ (priv->mac_mode.flow_stop_th << 16) | ++ priv->mac_mode.flow_start_th); ++ if (netsec_mac_write(priv, GMAC_REG_FCR, ++ (priv->mac_mode.pause_time << 16) | ++ NETSEC_FCR_RFE | NETSEC_FCR_TFE)) ++ return -ETIMEDOUT; ++ } ++ } ++ ++ ret = netsec_mac_read(priv, GMAC_REG_OMR, &value); ++ if (ret) ++ return ret; ++ ++ if (!priv->desc_ring[NETSEC_RING_RX].running) { ++ value |= NETSEC_GMAC_OMR_REG_SR; ++ netsec_start_desc_ring(priv, NETSEC_RING_RX); ++ } ++ if (!priv->desc_ring[NETSEC_RING_TX].running) { ++ value |= NETSEC_GMAC_OMR_REG_ST; ++ netsec_start_desc_ring(priv, NETSEC_RING_TX); ++ } ++ ++ if (netsec_mac_write(priv, GMAC_REG_OMR, value)) ++ return -ETIMEDOUT; ++ ++ netsec_writel(priv, NETSEC_REG_INTEN_SET, ++ NETSEC_IRQ_TX | NETSEC_IRQ_RX); ++ ++ return 0; ++} ++ ++int netsec_stop_gmac(struct netsec_priv *priv) ++{ ++ u32 value; ++ int ret; ++ ++ ret = netsec_mac_read(priv, GMAC_REG_OMR, &value); ++ if (ret) ++ return ret; ++ ++ if (priv->desc_ring[NETSEC_RING_RX].running) { ++ value &= ~NETSEC_GMAC_OMR_REG_SR; ++ netsec_stop_desc_ring(priv, NETSEC_RING_RX); ++ } ++ if (priv->desc_ring[NETSEC_RING_TX].running) { ++ value &= ~NETSEC_GMAC_OMR_REG_ST; ++ netsec_stop_desc_ring(priv, NETSEC_RING_TX); ++ } ++ ++ priv->actual_link_speed = 0; ++ priv->actual_duplex = false; ++ ++ return netsec_mac_write(priv, GMAC_REG_OMR, value); ++} ++ ++static int netsec_phy_write(struct mii_bus *bus, ++ int phy_addr, int reg, u16 val) ++{ ++ struct netsec_priv *priv = bus->priv; ++ ++ if (netsec_mac_write(priv, GMAC_REG_GDR, val)) ++ return -ETIMEDOUT; ++ if (netsec_mac_write(priv, GMAC_REG_GAR, ++ phy_addr << NETSEC_GMAC_GAR_REG_SHIFT_PA | ++ reg << NETSEC_GMAC_GAR_REG_SHIFT_GR | ++ NETSEC_GMAC_GAR_REG_GW | NETSEC_GMAC_GAR_REG_GB | ++ (netsec_clk_type(priv->freq) << ++ GMAC_REG_SHIFT_CR_GAR))) ++ return -ETIMEDOUT; ++ ++ return netsec_mac_wait_while_busy(priv, GMAC_REG_GAR, ++ NETSEC_GMAC_GAR_REG_GB); ++} ++ ++static int netsec_phy_read(struct mii_bus *bus, int phy_addr, int reg_addr) ++{ ++ struct netsec_priv *priv = bus->priv; ++ u32 data; ++ int ret; ++ ++ if (netsec_mac_write(priv, GMAC_REG_GAR, NETSEC_GMAC_GAR_REG_GB | ++ phy_addr << NETSEC_GMAC_GAR_REG_SHIFT_PA | ++ reg_addr << NETSEC_GMAC_GAR_REG_SHIFT_GR | ++ (netsec_clk_type(priv->freq) << ++ GMAC_REG_SHIFT_CR_GAR))) ++ return -ETIMEDOUT; ++ ++ ret = netsec_mac_wait_while_busy(priv, GMAC_REG_GAR, ++ NETSEC_GMAC_GAR_REG_GB); ++ if (ret) ++ return ret; ++ ++ ret = netsec_mac_read(priv, GMAC_REG_GDR, &data); ++ if (ret) ++ return ret; ++ ++ return data; ++} ++ ++int netsec_mii_register(struct netsec_priv *priv) ++{ ++ struct mii_bus *bus = devm_mdiobus_alloc(priv->dev); ++ int ret; ++ ++ if (!bus) ++ return -ENOMEM; ++ ++ snprintf(bus->id, MII_BUS_ID_SIZE, "%s", dev_name(priv->dev)); ++ bus->priv = priv; ++ bus->name = "SNI NETSEC MDIO"; ++ bus->read = netsec_phy_read; ++ bus->write = netsec_phy_write; ++ bus->parent = priv->dev; ++ priv->mii_bus = bus; ++ ++ if (dev_of_node(priv->dev)) { ++ ret = of_mdiobus_register(bus, dev_of_node(priv->dev)); ++ } else { ++ /* Mask out all PHYs from auto probing. */ ++ bus->phy_mask = ~0; ++ ret = mdiobus_register(bus); ++ } ++ return ret; ++} ++ ++void netsec_mii_unregister(struct netsec_priv *priv) ++{ ++ mdiobus_unregister(priv->mii_bus); ++} +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_netdev.c b/drivers/net/ethernet/socionext/netsec/netsec_netdev.c +new file mode 100644 +index 0000000..e99cf0e +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec_netdev.c +@@ -0,0 +1,540 @@ ++/** ++ * drivers/net/ethernet/socionext/netsec/netsec_netdev.c ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "netsec.h" ++ ++#define WAIT_FW_RDY_TIMEOUT 50 ++ ++static const u32 desc_ring_irq_status_reg_addr[] = { ++ NETSEC_REG_NRM_TX_STATUS, ++ NETSEC_REG_NRM_RX_STATUS, ++}; ++ ++static const u32 desc_ads[] = { ++ NETSEC_REG_NRM_TX_CONFIG, ++ NETSEC_REG_NRM_RX_CONFIG, ++}; ++ ++static const u32 netsec_desc_start_reg_addr_up[] = { ++ NETSEC_REG_NRM_TX_DESC_START_UP, ++ NETSEC_REG_NRM_RX_DESC_START_UP, ++}; ++ ++static const u32 netsec_desc_start_reg_addr_lw[] = { ++ NETSEC_REG_NRM_TX_DESC_START_LW, ++ NETSEC_REG_NRM_RX_DESC_START_LW, ++}; ++ ++static u32 netsec_calc_pkt_ctrl_reg_param(const struct netsec_pkt_ctrlaram ++ *pkt_ctrlaram_p) ++{ ++ u32 param = NETSEC_PKT_CTRL_REG_MODE_NRM; ++ ++ if (pkt_ctrlaram_p->log_chksum_er_flag) ++ param |= NETSEC_PKT_CTRL_REG_LOG_CHKSUM_ER; ++ ++ if (pkt_ctrlaram_p->log_hd_imcomplete_flag) ++ param |= NETSEC_PKT_CTRL_REG_LOG_HD_INCOMPLETE; ++ ++ if (pkt_ctrlaram_p->log_hd_er_flag) ++ param |= NETSEC_PKT_CTRL_REG_LOG_HD_ER; ++ ++ return param; ++} ++ ++static int netsec_netdev_load_ucode_region(struct netsec_priv *priv, u32 reg, ++ u32 addr_h, u32 addr_l, u32 size) ++{ ++ u64 base = (u64)addr_h << 32 | addr_l; ++ __le32 *ucode; ++ u32 i; ++ ++ ucode = memremap(base, size * sizeof(u32), MEMREMAP_WT); ++ if (!ucode) ++ return -ENOMEM; ++ ++ for (i = 0; i < size; i++) ++ netsec_writel(priv, reg, le32_to_cpu(ucode[i])); ++ ++ memunmap(ucode); ++ return 0; ++} ++ ++static int netsec_netdev_load_microcode(struct netsec_priv *priv) ++{ ++ int err; ++ ++ err = netsec_netdev_load_ucode_region( ++ priv, NETSEC_REG_DMAC_HM_CMD_BUF, ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_HM_ME_ADDRESS_H), ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_HM_ME_ADDRESS_L), ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_HM_ME_SIZE)); ++ if (err) ++ return err; ++ ++ err = netsec_netdev_load_ucode_region( ++ priv, NETSEC_REG_DMAC_MH_CMD_BUF, ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_MH_ME_ADDRESS_H), ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_MH_ME_ADDRESS_L), ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_MH_ME_SIZE)); ++ if (err) ++ return err; ++ ++ err = netsec_netdev_load_ucode_region( ++ priv, NETSEC_REG_PKT_CMD_BUF, ++ 0, ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_PKT_ME_ADDRESS), ++ le32_to_cpup(priv->eeprom_base + NETSEC_EEPROM_PKT_ME_SIZE)); ++ if (err) ++ return err; ++ ++ return 0; ++} ++ ++static int netsec_init_hardware(struct netsec_priv *priv) ++{ ++ u32 value; ++ int err; ++ ++ /* set desc_start addr */ ++ netsec_writel(priv, netsec_desc_start_reg_addr_up[NETSEC_RING_RX], ++ upper_32_bits(priv->desc_ring[NETSEC_RING_RX].desc_phys)); ++ netsec_writel(priv, netsec_desc_start_reg_addr_lw[NETSEC_RING_RX], ++ lower_32_bits(priv->desc_ring[NETSEC_RING_RX].desc_phys)); ++ ++ netsec_writel(priv, netsec_desc_start_reg_addr_up[NETSEC_RING_TX], ++ upper_32_bits(priv->desc_ring[NETSEC_RING_TX].desc_phys)); ++ netsec_writel(priv, netsec_desc_start_reg_addr_lw[NETSEC_RING_TX], ++ lower_32_bits(priv->desc_ring[NETSEC_RING_TX].desc_phys)); ++ ++ /* set normal tx desc ring config */ ++ netsec_writel(priv, desc_ads[NETSEC_RING_TX], ++ 1 << NETSEC_REG_DESC_ENDIAN); ++ netsec_writel(priv, desc_ads[NETSEC_RING_RX], ++ 1 << NETSEC_REG_DESC_ENDIAN); ++ ++ err = netsec_netdev_load_microcode(priv); ++ if (err) { ++ netif_err(priv, probe, priv->ndev, ++ "%s: failed to load microcode (%d)\n", __func__, err); ++ return err; ++ } ++ ++ /* start DMA engines */ ++ netsec_writel(priv, NETSEC_REG_DMA_TMR_CTRL, priv->freq / 1000000 - 1); ++ netsec_writel(priv, NETSEC_REG_ADDR_DIS_CORE, 0); ++ ++ usleep_range(1000, 2000); ++ ++ if (!(netsec_readl(priv, NETSEC_REG_TOP_STATUS) & ++ NETSEC_TOP_IRQ_REG_CODE_LOAD_END)) { ++ netif_err(priv, drv, priv->ndev, "microengine start failed\n"); ++ return -ENXIO; ++ } ++ netsec_writel(priv, NETSEC_REG_TOP_STATUS, ++ NETSEC_TOP_IRQ_REG_CODE_LOAD_END); ++ ++ value = netsec_calc_pkt_ctrl_reg_param(&priv->param.pkt_ctrlaram); ++ ++ if (priv->param.use_jumbo_pkt_flag) ++ value |= NETSEC_PKT_CTRL_REG_EN_JUMBO; ++ ++ /* change to normal mode */ ++ netsec_writel(priv, NETSEC_REG_DMA_MH_CTRL, MH_CTRL__MODE_TRANS); ++ netsec_writel(priv, NETSEC_REG_PKT_CTRL, value); ++ ++ while ((netsec_readl(priv, NETSEC_REG_MODE_TRANS_COMP_STATUS) & ++ NETSEC_MODE_TRANS_COMP_IRQ_T2N) == 0) ++ cpu_relax(); ++ ++ return 0; ++} ++ ++static void netsec_ring_irq_clr(struct netsec_priv *priv, ++ unsigned int id, u32 value) ++{ ++ netsec_writel(priv, desc_ring_irq_status_reg_addr[id], ++ value & (NETSEC_IRQ_EMPTY | NETSEC_IRQ_ERR)); ++} ++ ++static void netsec_napi_tx_processing(struct netsec_priv *priv) ++{ ++ netsec_ring_irq_clr(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ netsec_clean_tx_desc_ring(priv); ++ ++ if (netif_queue_stopped(priv->ndev) && ++ netsec_get_tx_avail_num(priv) >= NETSEC_NETDEV_TX_PKT_SCAT_NUM_MAX) ++ netif_wake_queue(priv->ndev); ++} ++ ++int netsec_netdev_napi_poll(struct napi_struct *napi_p, int budget) ++{ ++ struct netsec_priv *priv = container_of(napi_p, struct netsec_priv, ++ napi); ++ struct net_device *ndev = priv->ndev; ++ struct netsec_rx_pkt_info rx_info; ++ int ret, done = 0, rx_num = 0; ++ struct netsec_frag_info frag; ++ struct sk_buff *skb; ++ u16 len; ++ ++ netsec_napi_tx_processing(priv); ++ ++ while (done < budget) { ++ if (!rx_num) { ++ rx_num = netsec_get_rx_num(priv); ++ if (!rx_num) ++ break; ++ } ++ done++; ++ rx_num--; ++ ret = netsec_get_rx_pkt_data(priv, &rx_info, &frag, &len, &skb); ++ if (unlikely(ret == -ENOMEM)) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: rx fail %d\n", __func__, ret); ++ ndev->stats.rx_dropped++; ++ continue; ++ } ++ dma_unmap_single(priv->dev, frag.dma_addr, frag.len, ++ DMA_FROM_DEVICE); ++ skb_put(skb, len); ++ skb->protocol = eth_type_trans(skb, priv->ndev); ++ ++ if (priv->rx_cksum_offload_flag && ++ rx_info.rx_cksum_result == NETSEC_RX_CKSUM_OK) ++ skb->ip_summed = CHECKSUM_UNNECESSARY; ++ ++ if (napi_gro_receive(napi_p, skb) != GRO_DROP) { ++ ndev->stats.rx_packets++; ++ ndev->stats.rx_bytes += len; ++ } ++ } ++ ++ if (done < budget && napi_complete_done(napi_p, done)) ++ netsec_writel(priv, NETSEC_REG_INTEN_SET, ++ NETSEC_IRQ_TX | NETSEC_IRQ_RX); ++ return done; ++} ++ ++static netdev_tx_t netsec_netdev_start_xmit(struct sk_buff *skb, ++ struct net_device *ndev) ++{ ++ struct netsec_priv *priv = netdev_priv(ndev); ++ struct netsec_tx_pkt_ctrl tx_ctrl = {}; ++ u16 pend_tx, tso_seg_len = 0; ++ skb_frag_t *frag; ++ int count_frags; ++ int ret, i; ++ ++ netsec_ring_irq_clr(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ ++ count_frags = skb_shinfo(skb)->nr_frags + 1; ++ ++ if (skb->ip_summed == CHECKSUM_PARTIAL) { ++ if ((skb->protocol == htons(ETH_P_IP) && ++ ip_hdr(skb)->protocol == IPPROTO_TCP) || ++ (skb->protocol == htons(ETH_P_IPV6) && ++ ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)) ++ tx_ctrl.cksum_offload_flag = true; ++ else ++ skb_checksum_help(skb); ++ } ++ ++ if (skb_is_gso(skb)) ++ tso_seg_len = skb_shinfo(skb)->gso_size; ++ ++ if (tso_seg_len > 0) { ++ if (skb->protocol == htons(ETH_P_IP)) { ++ ip_hdr(skb)->tot_len = 0; ++ tcp_hdr(skb)->check = ++ ~tcp_v4_check(0, ip_hdr(skb)->saddr, ++ ip_hdr(skb)->daddr, 0); ++ } else { ++ ipv6_hdr(skb)->payload_len = 0; ++ tcp_hdr(skb)->check = ++ ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, ++ &ipv6_hdr(skb)->daddr, ++ 0, IPPROTO_TCP, 0); ++ } ++ ++ tx_ctrl.tcp_seg_offload_flag = true; ++ tx_ctrl.tcp_seg_len = tso_seg_len; ++ } ++ ++ priv->tx_info[0].dma_addr = dma_map_single(priv->dev, skb->data, ++ skb_headlen(skb), ++ DMA_TO_DEVICE); ++ if (dma_mapping_error(priv->dev, priv->tx_info[0].dma_addr)) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: DMA mapping failed\n", __func__); ++ return NETDEV_TX_OK; ++ } ++ priv->tx_info[0].addr = skb->data; ++ priv->tx_info[0].len = skb_headlen(skb); ++ ++ for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { ++ frag = &skb_shinfo(skb)->frags[i]; ++ priv->tx_info[i + 1].dma_addr = ++ skb_frag_dma_map(priv->dev, frag, 0, ++ skb_frag_size(frag), DMA_TO_DEVICE); ++ priv->tx_info[i + 1].addr = skb_frag_address(frag); ++ priv->tx_info[i + 1].len = frag->size; ++ } ++ ++ netsec_mark_skb_type(skb, NETSEC_RING_TX); ++ ++ ret = netsec_set_tx_pkt_data(priv, &tx_ctrl, count_frags, ++ priv->tx_info, skb); ++ if (ret) { ++ netif_info(priv, drv, priv->ndev, ++ "set tx pkt failed %d\n", ret); ++ for (i = 0; i < count_frags; i++) ++ dma_unmap_single(priv->dev, priv->tx_info[i].dma_addr, ++ priv->tx_info[i].len, DMA_TO_DEVICE); ++ ndev->stats.tx_dropped++; ++ ++ return NETDEV_TX_OK; ++ } ++ ++ netdev_sent_queue(priv->ndev, skb->len); ++ ++ spin_lock(&priv->tx_queue_lock); ++ pend_tx = netsec_get_tx_avail_num(priv); ++ ++ if (pend_tx < NETSEC_NETDEV_TX_PKT_SCAT_NUM_MAX) { ++ netsec_ring_irq_enable(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ netif_stop_queue(ndev); ++ goto err; ++ } ++ if (pend_tx <= DESC_NUM - 2) { ++ netsec_ring_irq_enable(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ goto err; ++ } ++ netsec_ring_irq_disable(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ ++err: ++ spin_unlock(&priv->tx_queue_lock); ++ ++ return NETDEV_TX_OK; ++} ++ ++static int netsec_netdev_set_features(struct net_device *ndev, ++ netdev_features_t features) ++{ ++ struct netsec_priv *priv = netdev_priv(ndev); ++ ++ priv->rx_cksum_offload_flag = !!(features & NETIF_F_RXCSUM); ++ ++ return 0; ++} ++ ++static void netsec_phy_adjust_link(struct net_device *ndev) ++{ ++ struct netsec_priv *priv = netdev_priv(ndev); ++ ++ if (priv->actual_link_speed == ndev->phydev->speed && ++ priv->actual_duplex == ndev->phydev->duplex) ++ return; ++ ++ phy_print_status(ndev->phydev); ++ ++ netsec_stop_gmac(priv); ++ netsec_start_gmac(priv); ++} ++ ++static irqreturn_t netsec_irq_handler(int irq, void *dev_id) ++{ ++ struct netsec_priv *priv = dev_id; ++ u32 status = netsec_readl(priv, NETSEC_REG_TOP_STATUS) & ++ netsec_readl(priv, NETSEC_REG_TOP_INTEN); ++ ++ if (!status) ++ return IRQ_NONE; ++ ++ if (status & (NETSEC_IRQ_TX | NETSEC_IRQ_RX)) { ++ netsec_writel(priv, NETSEC_REG_INTEN_CLR, ++ status & (NETSEC_IRQ_TX | NETSEC_IRQ_RX)); ++ napi_schedule(&priv->napi); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static void netsec_reset_hardware(struct netsec_priv *priv) ++{ ++ /* stop DMA engines */ ++ if (!netsec_readl(priv, NETSEC_REG_ADDR_DIS_CORE)) { ++ netsec_writel(priv, NETSEC_REG_DMA_HM_CTRL, ++ NETSEC_DMA_CTRL_REG_STOP); ++ netsec_writel(priv, NETSEC_REG_DMA_MH_CTRL, ++ NETSEC_DMA_CTRL_REG_STOP); ++ ++ while (netsec_readl(priv, NETSEC_REG_DMA_HM_CTRL) & ++ NETSEC_DMA_CTRL_REG_STOP) ++ cpu_relax(); ++ ++ while (netsec_readl(priv, NETSEC_REG_DMA_MH_CTRL) & ++ NETSEC_DMA_CTRL_REG_STOP) ++ cpu_relax(); ++ } ++ ++ netsec_writel(priv, NETSEC_REG_SOFT_RST, NETSEC_SOFT_RST_REG_RESET); ++ netsec_writel(priv, NETSEC_REG_SOFT_RST, NETSEC_SOFT_RST_REG_RUN); ++ netsec_writel(priv, NETSEC_REG_COM_INIT, NETSEC_COM_INIT_REG_ALL); ++ ++ while (netsec_readl(priv, NETSEC_REG_COM_INIT) != 0) ++ cpu_relax(); ++} ++ ++static int netsec_netdev_open(struct net_device *ndev) ++{ ++ struct netsec_priv *priv = netdev_priv(ndev); ++ int ret, n; ++ ++ pm_runtime_get_sync(priv->dev); ++ ++ netsec_reset_hardware(priv); ++ ++ for (n = 0; n <= NETSEC_RING_MAX; n++) { ++ ret = netsec_alloc_desc_ring(priv, n); ++ if (ret) { ++ netif_err(priv, probe, priv->ndev, ++ "%s: alloc ring failed\n", __func__); ++ goto err; ++ } ++ } ++ ++ ret = netsec_setup_rx_desc(priv, &priv->desc_ring[NETSEC_RING_RX]); ++ if (ret) { ++ netif_err(priv, probe, priv->ndev, ++ "%s: fail setup ring\n", __func__); ++ goto err1; ++ } ++ ++ ret = netsec_init_hardware(priv); ++ if (ret) { ++ netif_err(priv, probe, priv->ndev, ++ "%s: netsec_init_hardware fail %d\n", __func__, ret); ++ goto err1; ++ } ++ ++ ret = request_irq(priv->ndev->irq, netsec_irq_handler, ++ IRQF_SHARED, "netsec", priv); ++ if (ret) { ++ netif_err(priv, drv, priv->ndev, "request_irq failed\n"); ++ goto err1; ++ } ++ priv->irq_registered = true; ++ ++ ret = netsec_clean_rx_desc_ring(priv); ++ if (ret) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: clean rx desc fail\n", __func__); ++ goto err2; ++ } ++ ++ ret = netsec_clean_tx_desc_ring(priv); ++ if (ret) { ++ netif_err(priv, drv, priv->ndev, ++ "%s: clean tx desc fail\n", __func__); ++ goto err2; ++ } ++ ++ netsec_ring_irq_clr(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ ++ if (dev_of_node(priv->dev)) { ++ if (!of_phy_connect(priv->ndev, priv->phy_np, ++ netsec_phy_adjust_link, 0, ++ priv->phy_interface)) { ++ netif_err(priv, link, priv->ndev, "missing PHY\n"); ++ goto err2; ++ } ++ } else { ++ ret = phy_connect_direct(priv->ndev, priv->phydev, ++ netsec_phy_adjust_link, ++ priv->phy_interface); ++ if (ret) { ++ netif_err(priv, link, priv->ndev, ++ "phy_connect_direct() failed (%d)\n", ret); ++ goto err2; ++ } ++ } ++ ++ phy_start_aneg(ndev->phydev); ++ ++ netsec_ring_irq_disable(priv, NETSEC_RING_TX, NETSEC_IRQ_EMPTY); ++ ++ netsec_start_gmac(priv); ++ napi_enable(&priv->napi); ++ netif_start_queue(ndev); ++ ++ netsec_writel(priv, NETSEC_REG_INTEN_SET, ++ NETSEC_IRQ_TX | NETSEC_IRQ_RX); ++ ++ return 0; ++ ++err2: ++ pm_runtime_put_sync(priv->dev); ++ free_irq(priv->ndev->irq, priv); ++ priv->irq_registered = false; ++err1: ++ for (n = 0; n <= NETSEC_RING_MAX; n++) ++ netsec_free_desc_ring(priv, &priv->desc_ring[n]); ++err: ++ pm_runtime_put_sync(priv->dev); ++ ++ return ret; ++} ++ ++static int netsec_netdev_stop(struct net_device *ndev) ++{ ++ struct netsec_priv *priv = netdev_priv(ndev); ++ int n; ++ ++ phy_stop(ndev->phydev); ++ phy_disconnect(ndev->phydev); ++ ++ netif_stop_queue(priv->ndev); ++ napi_disable(&priv->napi); ++ ++ netsec_writel(priv, NETSEC_REG_INTEN_CLR, ~0); ++ netsec_stop_gmac(priv); ++ ++ pm_runtime_put_sync(priv->dev); ++ ++ for (n = 0; n <= NETSEC_RING_MAX; n++) ++ netsec_free_desc_ring(priv, &priv->desc_ring[n]); ++ ++ free_irq(priv->ndev->irq, priv); ++ priv->irq_registered = false; ++ ++ return 0; ++} ++ ++const struct net_device_ops netsec_netdev_ops = { ++ .ndo_open = netsec_netdev_open, ++ .ndo_stop = netsec_netdev_stop, ++ .ndo_start_xmit = netsec_netdev_start_xmit, ++ .ndo_set_features = netsec_netdev_set_features, ++ .ndo_set_mac_address = eth_mac_addr, ++ .ndo_validate_addr = eth_validate_addr, ++}; +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_platform.c b/drivers/net/ethernet/socionext/netsec/netsec_platform.c +new file mode 100644 +index 0000000..624f6a7 +--- /dev/null ++++ b/drivers/net/ethernet/socionext/netsec/netsec_platform.c +@@ -0,0 +1,435 @@ ++/** ++ * drivers/net/ethernet/socionext/netsec/netsec_platform.c ++ * ++ * Copyright (C) 2013-2014 Fujitsu Semiconductor Limited. ++ * Copyright (C) 2014-2017 Linaro Ltd. All rights reserved. ++ * Andy Green ++ * Jassi Brar ++ * Ard Biesheuvel ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version 2 ++ * of the License, or (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "netsec.h" ++ ++#define NETSEC_F_NETSEC_VER_MAJOR_NUM(x) (x & 0xffff0000) ++ ++static int napi_weight = 64; ++static u16 pause_time = 256; ++ ++static int netsec_of_probe(struct platform_device *pdev, ++ struct netsec_priv *priv) ++{ ++ int clk_count, ret, i; ++ ++ priv->phy_np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0); ++ if (!priv->phy_np) { ++ dev_err(&pdev->dev, "missing required property 'phy-handle'\n"); ++ return -EINVAL; ++ } ++ ++ /* we require named clocks if there is more than one */ ++ clk_count = of_property_count_strings(pdev->dev.of_node, "clock-names"); ++ if (clk_count > 1) { ++ if (clk_count > ARRAY_SIZE(priv->clk)) { ++ dev_err(&pdev->dev, "too many clocks specified (%d)\n", ++ clk_count); ++ return -EINVAL; ++ } ++ ++ for (i = 0; i < clk_count; i++) { ++ const char *clk_name; ++ ++ ret = of_property_read_string_index(pdev->dev.of_node, ++ "clock-names", i, ++ &clk_name); ++ if (ret) { ++ dev_err(&pdev->dev, ++ "failed to parse 'clock-names'\n"); ++ return ret; ++ } ++ priv->clk[i] = devm_clk_get(&pdev->dev, clk_name); ++ if (!strcmp(clk_name, "phy_refclk")) { ++ priv->freq = clk_get_rate(priv->clk[i]); ++ dev_dbg(&pdev->dev, ++ "found PHY refclock #%d freq %u\n", ++ i, priv->freq); ++ } ++ } ++ priv->clock_count = clk_count; ++ } else { ++ priv->clk[0] = devm_clk_get(&pdev->dev, NULL); ++ if (IS_ERR(priv->clk)) { ++ dev_err(&pdev->dev, ++ "missing required property 'clocks'\n"); ++ return PTR_ERR(priv->clk); ++ } ++ priv->freq = clk_get_rate(priv->clk[0]); ++ priv->clock_count = 1; ++ } ++ return 0; ++} ++ ++static int netsec_acpi_probe(struct platform_device *pdev, ++ struct netsec_priv *priv, u32 *phy_addr) ++{ ++ int ret; ++ ++ if (!IS_ENABLED(CONFIG_ACPI)) ++ return -ENODEV; ++ ++ ret = device_property_read_u32(&pdev->dev, "phy-channel", phy_addr); ++ if (ret) { ++ dev_err(&pdev->dev, ++ "missing required property 'phy-channel'\n"); ++ return ret; ++ } ++ ++ ret = device_property_read_u32(&pdev->dev, ++ "socionext,phy-clock-frequency", ++ &priv->freq); ++ if (ret) ++ dev_err(&pdev->dev, ++ "missing required property 'socionext,phy-clock-frequency'\n"); ++ return ret; ++} ++ ++static int netsec_probe(struct platform_device *pdev) ++{ ++ struct net_device *ndev; ++ struct netsec_priv *priv; ++ struct resource *mmio_res, *eeprom_res, *irq_res; ++ u8 *mac, macbuf[ETH_ALEN]; ++ u32 hw_ver, phy_addr; ++ int ret; ++ ++ mmio_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!mmio_res) { ++ dev_err(&pdev->dev, "No MMIO resource found.\n"); ++ return -ENODEV; ++ } ++ ++ eeprom_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!eeprom_res) { ++ dev_info(&pdev->dev, "No EEPROM resource found.\n"); ++ return -ENODEV; ++ } ++ ++ irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); ++ if (!irq_res) { ++ dev_err(&pdev->dev, "No IRQ resource found.\n"); ++ return -ENODEV; ++ } ++ ++ ndev = alloc_etherdev(sizeof(*priv)); ++ if (!ndev) ++ return -ENOMEM; ++ ++ priv = netdev_priv(ndev); ++ priv->ndev = ndev; ++ SET_NETDEV_DEV(ndev, &pdev->dev); ++ platform_set_drvdata(pdev, priv); ++ priv->dev = &pdev->dev; ++ ++ priv->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | ++ NETIF_MSG_LINK | NETIF_MSG_PROBE; ++ ++ ndev->irq = irq_res->start; ++ ++ priv->phy_interface = device_get_phy_mode(&pdev->dev); ++ if (priv->phy_interface < 0) { ++ dev_err(&pdev->dev, "missing required property 'phy-mode'\n"); ++ ret = -ENODEV; ++ goto free_ndev; ++ } ++ ++ priv->ioaddr = devm_ioremap(&pdev->dev, mmio_res->start, ++ resource_size(mmio_res)); ++ if (!priv->ioaddr) { ++ dev_err(&pdev->dev, "devm_ioremap() failed\n"); ++ ret = -ENXIO; ++ goto free_ndev; ++ } ++ ++ priv->eeprom_base = devm_memremap(&pdev->dev, eeprom_res->start, ++ resource_size(eeprom_res), ++ MEMREMAP_WT); ++ if (!priv->eeprom_base) { ++ dev_err(&pdev->dev, "devm_memremap() failed for EEPROM\n"); ++ ret = -ENXIO; ++ goto free_ndev; ++ } ++ ++ mac = device_get_mac_address(&pdev->dev, macbuf, sizeof(macbuf)); ++ if (mac) ++ ether_addr_copy(ndev->dev_addr, mac); ++ ++ if (priv->eeprom_base && ++ (!mac || !is_valid_ether_addr(ndev->dev_addr))) { ++ const u8 *macp = priv->eeprom_base + NETSEC_EEPROM_MAC_ADDRESS; ++ ++ ndev->dev_addr[0] = macp[3]; ++ ndev->dev_addr[1] = macp[2]; ++ ndev->dev_addr[2] = macp[1]; ++ ndev->dev_addr[3] = macp[0]; ++ ndev->dev_addr[4] = macp[7]; ++ ndev->dev_addr[5] = macp[6]; ++ } ++ ++ if (!is_valid_ether_addr(ndev->dev_addr)) { ++ dev_warn(&pdev->dev, "No MAC address found, using random\n"); ++ eth_hw_addr_random(ndev); ++ } ++ ++ if (dev_of_node(&pdev->dev)) ++ ret = netsec_of_probe(pdev, priv); ++ else ++ ret = netsec_acpi_probe(pdev, priv, &phy_addr); ++ if (ret) ++ goto free_ndev; ++ ++ if (!priv->freq) { ++ dev_err(&pdev->dev, "missing PHY reference clock frequency\n"); ++ ret = -ENODEV; ++ goto free_ndev; ++ } ++ ++ /* disable by default */ ++ priv->et_coalesce.rx_coalesce_usecs = 0; ++ priv->et_coalesce.rx_max_coalesced_frames = 1; ++ priv->et_coalesce.tx_coalesce_usecs = 0; ++ priv->et_coalesce.tx_max_coalesced_frames = 1; ++ ++ ret = device_property_read_u32(&pdev->dev, "max-frame-size", ++ &ndev->max_mtu); ++ if (ret < 0) ++ ndev->max_mtu = ETH_DATA_LEN; ++ ++ priv->rx_pkt_buf_len = ndev->max_mtu + 22; ++ priv->param.use_jumbo_pkt_flag = (ndev->max_mtu > ETH_DATA_LEN); ++ ++ pm_runtime_enable(&pdev->dev); ++ /* runtime_pm coverage just for probe, open/close also cover it */ ++ pm_runtime_get_sync(&pdev->dev); ++ ++ hw_ver = netsec_readl(priv, NETSEC_REG_F_TAIKI_VER); ++ /* this driver only supports F_TAIKI style NETSEC */ ++ if (NETSEC_F_NETSEC_VER_MAJOR_NUM(hw_ver) != ++ NETSEC_F_NETSEC_VER_MAJOR_NUM(NETSEC_REG_NETSEC_VER_F_TAIKI)) { ++ ret = -ENODEV; ++ goto pm_disable; ++ } ++ ++ dev_info(&pdev->dev, "hardware revision %d.%d\n", ++ hw_ver >> 16, hw_ver & 0xffff); ++ ++ priv->mac_mode.flow_start_th = NETSEC_FLOW_CONTROL_START_THRESHOLD; ++ priv->mac_mode.flow_stop_th = NETSEC_FLOW_CONTROL_STOP_THRESHOLD; ++ priv->mac_mode.pause_time = pause_time; ++ priv->mac_mode.flow_ctrl_enable_flag = false; ++ ++ netif_napi_add(ndev, &priv->napi, netsec_netdev_napi_poll, napi_weight); ++ ++ ndev->netdev_ops = &netsec_netdev_ops; ++ ndev->ethtool_ops = &netsec_ethtool_ops; ++ ndev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | ++ NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_GSO | ++ NETIF_F_HIGHDMA | NETIF_F_RXCSUM; ++ ndev->hw_features = ndev->features; ++ ++ priv->rx_cksum_offload_flag = true; ++ spin_lock_init(&priv->tx_queue_lock); ++ ++ ret = netsec_mii_register(priv); ++ if (ret) { ++ dev_err(&pdev->dev, "mii bus registration failed (%d)\n", ret); ++ goto pm_disable; ++ } ++ ++ if (!dev_of_node(&pdev->dev)) { /* ACPI */ ++ priv->phydev = get_phy_device(priv->mii_bus, phy_addr, false); ++ if (IS_ERR(priv->phydev)) { ++ dev_err(&pdev->dev, "get_phy_device() failed (%ld)\n", ++ PTR_ERR(priv->phydev)); ++ ret = PTR_ERR(priv->phydev); ++ goto unregister_mii; ++ } ++ ++ ret = phy_device_register(priv->phydev); ++ if (ret) { ++ dev_err(&pdev->dev, ++ "phy_device_register() failed (%d)\n", ret); ++ phy_device_free(priv->phydev); ++ goto unregister_mii; ++ } ++ } ++ ++ /* disable all other interrupt sources */ ++ netsec_writel(priv, NETSEC_REG_INTEN_CLR, ~0); ++ netsec_writel(priv, NETSEC_REG_INTEN_SET, ++ NETSEC_IRQ_TX | NETSEC_IRQ_RX); ++ ++ if (dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) ++ dev_warn(&pdev->dev, "Failed to enable 64-bit DMA\n"); ++ ++ ret = register_netdev(ndev); ++ if (ret) { ++ netif_err(priv, probe, ndev, "register_netdev() failed\n"); ++ goto unregister_mii; ++ } ++ ++ pm_runtime_put_sync_suspend(&pdev->dev); ++ ++ return 0; ++ ++unregister_mii: ++ netsec_mii_unregister(priv); ++ ++pm_disable: ++ pm_runtime_put_sync_suspend(&pdev->dev); ++ pm_runtime_disable(&pdev->dev); ++ ++free_ndev: ++ free_netdev(ndev); ++ ++ dev_err(&pdev->dev, "init failed\n"); ++ ++ return ret; ++} ++ ++static int netsec_remove(struct platform_device *pdev) ++{ ++ struct netsec_priv *priv = platform_get_drvdata(pdev); ++ ++ unregister_netdev(priv->ndev); ++ if (!dev_of_node(&pdev->dev)) { /* ACPI */ ++ phy_device_remove(priv->phydev); ++ phy_device_free(priv->phydev); ++ } ++ netsec_mii_unregister(priv); ++ pm_runtime_disable(&pdev->dev); ++ free_netdev(priv->ndev); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int netsec_runtime_suspend(struct device *dev) ++{ ++ struct netsec_priv *priv = dev_get_drvdata(dev); ++ int n; ++ ++ netif_dbg(priv, drv, priv->ndev, "%s\n", __func__); ++ ++ if (priv->irq_registered) ++ disable_irq(priv->ndev->irq); ++ ++ netsec_writel(priv, NETSEC_REG_CLK_EN, 0); ++ ++ for (n = priv->clock_count - 1; n >= 0; n--) ++ clk_disable_unprepare(priv->clk[n]); ++ ++ return 0; ++} ++ ++static int netsec_runtime_resume(struct device *dev) ++{ ++ struct netsec_priv *priv = dev_get_drvdata(dev); ++ int n; ++ ++ netif_dbg(priv, drv, priv->ndev, "%s\n", __func__); ++ ++ /* first let the clocks back on */ ++ ++ for (n = 0; n < priv->clock_count; n++) ++ clk_prepare_enable(priv->clk[n]); ++ ++ netsec_writel(priv, NETSEC_REG_CLK_EN, NETSEC_CLK_EN_REG_DOM_D | ++ NETSEC_CLK_EN_REG_DOM_C | ++ NETSEC_CLK_EN_REG_DOM_G); ++ ++ if (priv->irq_registered) ++ enable_irq(priv->ndev->irq); ++ ++ return 0; ++} ++ ++static int netsec_pm_suspend(struct device *dev) ++{ ++ struct netsec_priv *priv = dev_get_drvdata(dev); ++ ++ netif_dbg(priv, drv, priv->ndev, "%s\n", __func__); ++ ++ if (pm_runtime_status_suspended(dev)) ++ return 0; ++ ++ return netsec_runtime_suspend(dev); ++} ++ ++static int netsec_pm_resume(struct device *dev) ++{ ++ struct netsec_priv *priv = dev_get_drvdata(dev); ++ ++ netif_dbg(priv, drv, priv->ndev, "%s\n", __func__); ++ ++ if (pm_runtime_status_suspended(dev)) ++ return 0; ++ ++ return netsec_runtime_resume(dev); ++} ++#endif ++ ++static const struct dev_pm_ops netsec_pm_ops = { ++ SET_SYSTEM_SLEEP_PM_OPS(netsec_pm_suspend, netsec_pm_resume) ++ SET_RUNTIME_PM_OPS(netsec_runtime_suspend, netsec_runtime_resume, NULL) ++}; ++ ++static const struct of_device_id netsec_dt_ids[] = { ++ { .compatible = "socionext,synquacer-netsec" }, ++ { } ++}; ++MODULE_DEVICE_TABLE(of, netsec_dt_ids); ++ ++#ifdef CONFIG_ACPI ++static const struct acpi_device_id netsec_acpi_ids[] = { ++ { "SCX0001" }, ++ { } ++}; ++MODULE_DEVICE_TABLE(acpi, netsec_acpi_ids); ++#endif ++ ++static struct platform_driver netsec_driver = { ++ .probe = netsec_probe, ++ .remove = netsec_remove, ++ .driver.name = "netsec", ++ .driver.of_match_table = netsec_dt_ids, ++ .driver.acpi_match_table = ACPI_PTR(netsec_acpi_ids), ++ .driver.pm = &netsec_pm_ops, ++}; ++module_platform_driver(netsec_driver); ++ ++MODULE_AUTHOR("Andy Green "); ++MODULE_AUTHOR("Jassi Brar "); ++MODULE_AUTHOR("Ard Biesheuvel "); ++MODULE_DESCRIPTION("NETSEC Ethernet driver"); ++MODULE_LICENSE("GPL"); +-- +cgit v1.1 + +From 31a61532e7b859a797d36595ec5ab7485a9b24d5 Mon Sep 17 00:00:00 2001 +From: Jassi Brar +Date: Wed, 30 Aug 2017 15:55:52 +0530 +Subject: dt-bindings: net: Add DT bindings for Socionext Netsec + +This patch adds documentation for Device-Tree bindings for the +Socionext NetSec Controller driver. + +Signed-off-by: Jassi Brar +Signed-off-by: Ard Biesheuvel +--- + .../devicetree/bindings/net/socionext-netsec.txt | 43 ++++++++++++++++++++++ + 1 file changed, 43 insertions(+) + create mode 100644 Documentation/devicetree/bindings/net/socionext-netsec.txt + +diff --git a/Documentation/devicetree/bindings/net/socionext-netsec.txt b/Documentation/devicetree/bindings/net/socionext-netsec.txt +new file mode 100644 +index 0000000..4695969 +--- /dev/null ++++ b/Documentation/devicetree/bindings/net/socionext-netsec.txt +@@ -0,0 +1,43 @@ ++* Socionext NetSec Ethernet Controller IP ++ ++Required properties: ++- compatible: Should be "socionext,synquacer-netsec" ++- reg: Address and length of the control register area, followed by the ++ address and length of the EEPROM holding the MAC address and ++ microengine firmware ++- interrupts: Should contain ethernet controller interrupt ++- clocks: phandle to the PHY reference clock, and any other clocks to be ++ switched by runtime_pm ++- clock-names: Required only if more than a single clock is listed in 'clocks'. ++ The PHY reference clock must be named 'phy_refclk' ++- phy-mode: See ethernet.txt file in the same directory ++- phy-handle: phandle to select child phy ++ ++Optional properties: (See ethernet.txt file in the same directory) ++- local-mac-address ++- mac-address ++- max-speed ++- max-frame-size ++ ++Required properties for the child phy: ++- reg: phy address ++ ++Example: ++ eth0: netsec@522D0000 { ++ compatible = "socionext,synquacer-netsec"; ++ reg = <0 0x522D0000 0x0 0x10000>, <0 0x10000000 0x0 0x10000>; ++ interrupts = ; ++ clocks = <&clk_netsec>; ++ phy-mode = "rgmii"; ++ max-speed = <1000>; ++ max-frame-size = <9000>; ++ phy-handle = <ðphy0>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ ethphy0: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++ }; +-- +cgit v1.1 + +From d2fc584f8237746a84e6ec8690d8884f148fc449 Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Tue, 10 Oct 2017 11:35:51 +0100 +Subject: [PATCH] add interrupt.h, sort alphabetically + +Signed-off-by: Peter Robinson +--- + drivers/net/ethernet/socionext/netsec/netsec_platform.c | 17 +++++++++-------- + 1 file changed, 9 insertions(+), 8 deletions(-) + +diff --git a/drivers/net/ethernet/socionext/netsec/netsec_platform.c b/drivers/net/ethernet/socionext/netsec/netsec_platform.c +index 624f6a7093f6..79072bae917d 100644 +--- a/drivers/net/ethernet/socionext/netsec/netsec_platform.c ++++ b/drivers/net/ethernet/socionext/netsec/netsec_platform.c +@@ -14,21 +14,22 @@ + */ + + #include +-#include +-#include +-#include +-#include + #include ++#include ++#include ++#include + #include ++#include ++#include + #include +-#include +-#include +-#include ++#include + #include + #include + #include +-#include ++#include + #include ++#include ++#include + + #include "netsec.h" + +-- +2.14.2 + diff --git a/arm64-thunderX-fix-ipv6-checksum-offload.patch b/arm64-thunderX-fix-ipv6-checksum-offload.patch new file mode 100644 index 0000000..2211899 --- /dev/null +++ b/arm64-thunderX-fix-ipv6-checksum-offload.patch @@ -0,0 +1,39 @@ +From fa6d7cb5d76cf0467c61420fc9238045aedfd379 Mon Sep 17 00:00:00 2001 +From: Sunil Goutham +Date: Thu, 23 Nov 2017 22:34:31 +0300 +Subject: net: thunderx: Fix TCP/UDP checksum offload for IPv6 pkts + +Don't offload IP header checksum to NIC. + +This fixes a previous patch which enabled checksum offloading +for both IPv4 and IPv6 packets. So L3 checksum offload was +getting enabled for IPv6 pkts. And HW is dropping these pkts +as it assumes the pkt is IPv4 when IP csum offload is set +in the SQ descriptor. + +Fixes: 3a9024f52c2e ("net: thunderx: Enable TSO and checksum offloads for ipv6") +Signed-off-by: Sunil Goutham +Signed-off-by: Aleksey Makarov +Reviewed-by: Eric Dumazet +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/cavium/thunder/nicvf_queues.c | 1 - + 1 file changed, 1 deletion(-) + +(limited to 'drivers/net/ethernet/cavium/thunder/nicvf_queues.c') + +diff --git a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c b/drivers/net/ethernet/cavium/thunder/nicvf_queues.c +index d4496e9..8b2c31e 100644 +--- a/drivers/net/ethernet/cavium/thunder/nicvf_queues.c ++++ b/drivers/net/ethernet/cavium/thunder/nicvf_queues.c +@@ -1355,7 +1355,6 @@ nicvf_sq_add_hdr_subdesc(struct nicvf *nic, struct snd_queue *sq, int qentry, + + /* Offload checksum calculation to HW */ + if (skb->ip_summed == CHECKSUM_PARTIAL) { +- hdr->csum_l3 = 1; /* Enable IP csum calculation */ + hdr->l3_offset = skb_network_offset(skb); + hdr->l4_offset = skb_transport_offset(skb); + +-- +cgit v1.1 + diff --git a/arm64-xgene-acpi-fix.patch b/arm64-xgene-acpi-fix.patch deleted file mode 100644 index e0df833..0000000 --- a/arm64-xgene-acpi-fix.patch +++ /dev/null @@ -1,38 +0,0 @@ -From bdb9458a3382ba745a66be5526d3899103c76eda Mon Sep 17 00:00:00 2001 -From: Loc Ho -Date: Fri, 21 Jul 2017 11:24:37 -0700 -Subject: ACPI: APEI: Enable APEI multiple GHES source to share a single - external IRQ - -X-Gene platforms describe multiple GHES error sources with the same -hardware error notification type (external interrupt) and interrupt -number. - -Change the GHES interrupt request to support sharing the same IRQ. - -This change includs contributions from Tuan Phan . - -Signed-off-by: Loc Ho -Acked-by: Borislav Petkov -Signed-off-by: Rafael J. Wysocki ---- - drivers/acpi/apei/ghes.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - -diff --git a/drivers/acpi/apei/ghes.c b/drivers/acpi/apei/ghes.c -index d661d45..eed09fc 100644 ---- a/drivers/acpi/apei/ghes.c -+++ b/drivers/acpi/apei/ghes.c -@@ -1157,7 +1157,8 @@ static int ghes_probe(struct platform_device *ghes_dev) - generic->header.source_id); - goto err_edac_unreg; - } -- rc = request_irq(ghes->irq, ghes_irq_func, 0, "GHES IRQ", ghes); -+ rc = request_irq(ghes->irq, ghes_irq_func, IRQF_SHARED, -+ "GHES IRQ", ghes); - if (rc) { - pr_err(GHES_PFX "Failed to register IRQ for generic hardware error source: %d\n", - generic->header.source_id); --- -cgit v1.1 - diff --git a/baseconfig/CONFIG_ALLOW_LOCKDOWN_LIFT_BY_SYSRQ b/baseconfig/CONFIG_ALLOW_LOCKDOWN_LIFT_BY_SYSRQ new file mode 100644 index 0000000..40a287f --- /dev/null +++ b/baseconfig/CONFIG_ALLOW_LOCKDOWN_LIFT_BY_SYSRQ @@ -0,0 +1 @@ +CONFIG_ALLOW_LOCKDOWN_LIFT_BY_SYSRQ=y diff --git a/baseconfig/CONFIG_ALTERA_MSGDMA b/baseconfig/CONFIG_ALTERA_MSGDMA new file mode 100644 index 0000000..7a1edd8 --- /dev/null +++ b/baseconfig/CONFIG_ALTERA_MSGDMA @@ -0,0 +1 @@ +CONFIG_ALTERA_MSGDMA=m diff --git a/baseconfig/CONFIG_ATH10K_USB b/baseconfig/CONFIG_ATH10K_USB new file mode 100644 index 0000000..2902150 --- /dev/null +++ b/baseconfig/CONFIG_ATH10K_USB @@ -0,0 +1 @@ +CONFIG_ATH10K_USB=m diff --git a/baseconfig/CONFIG_BATTERY_MAX1721X b/baseconfig/CONFIG_BATTERY_MAX1721X new file mode 100644 index 0000000..98c0456 --- /dev/null +++ b/baseconfig/CONFIG_BATTERY_MAX1721X @@ -0,0 +1 @@ +# CONFIG_BATTERY_MAX1721X is not set diff --git a/baseconfig/CONFIG_BLK_CPQ_CISS_DA b/baseconfig/CONFIG_BLK_CPQ_CISS_DA deleted file mode 100644 index be78700..0000000 --- a/baseconfig/CONFIG_BLK_CPQ_CISS_DA +++ /dev/null @@ -1 +0,0 @@ -CONFIG_BLK_CPQ_CISS_DA=m diff --git a/baseconfig/CONFIG_BLK_DEV_UB b/baseconfig/CONFIG_BLK_DEV_UB deleted file mode 100644 index 6fbfd13..0000000 --- a/baseconfig/CONFIG_BLK_DEV_UB +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_BLK_DEV_UB is not set diff --git a/baseconfig/CONFIG_BNXT_FLOWER_OFFLOAD b/baseconfig/CONFIG_BNXT_FLOWER_OFFLOAD new file mode 100644 index 0000000..170bbf3 --- /dev/null +++ b/baseconfig/CONFIG_BNXT_FLOWER_OFFLOAD @@ -0,0 +1 @@ +CONFIG_BNXT_FLOWER_OFFLOAD=y diff --git a/baseconfig/CONFIG_BPF_STREAM_PARSER b/baseconfig/CONFIG_BPF_STREAM_PARSER new file mode 100644 index 0000000..7cf7835 --- /dev/null +++ b/baseconfig/CONFIG_BPF_STREAM_PARSER @@ -0,0 +1 @@ +CONFIG_BPF_STREAM_PARSER=y diff --git a/baseconfig/CONFIG_BT_SCO b/baseconfig/CONFIG_BT_SCO deleted file mode 100644 index c047609..0000000 --- a/baseconfig/CONFIG_BT_SCO +++ /dev/null @@ -1 +0,0 @@ -CONFIG_BT_SCO=y diff --git a/baseconfig/CONFIG_CCS811 b/baseconfig/CONFIG_CCS811 new file mode 100644 index 0000000..931f14e --- /dev/null +++ b/baseconfig/CONFIG_CCS811 @@ -0,0 +1 @@ +# CONFIG_CCS811 is not set diff --git a/baseconfig/CONFIG_CEC_PIN b/baseconfig/CONFIG_CEC_PIN new file mode 100644 index 0000000..395ddfb --- /dev/null +++ b/baseconfig/CONFIG_CEC_PIN @@ -0,0 +1 @@ +CONFIG_CEC_PIN=y diff --git a/baseconfig/CONFIG_CHARGER_QCOM_SMBB b/baseconfig/CONFIG_CHARGER_QCOM_SMBB deleted file mode 100644 index c06d8f1..0000000 --- a/baseconfig/CONFIG_CHARGER_QCOM_SMBB +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_CHARGER_QCOM_SMBB is not set diff --git a/baseconfig/CONFIG_CISS_SCSI_TAPE b/baseconfig/CONFIG_CISS_SCSI_TAPE deleted file mode 100644 index 2170cc8..0000000 --- a/baseconfig/CONFIG_CISS_SCSI_TAPE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_CISS_SCSI_TAPE=y diff --git a/baseconfig/CONFIG_CLK_HSDK b/baseconfig/CONFIG_CLK_HSDK new file mode 100644 index 0000000..e1788bb --- /dev/null +++ b/baseconfig/CONFIG_CLK_HSDK @@ -0,0 +1 @@ +# CONFIG_CLK_HSDK is not set diff --git a/baseconfig/CONFIG_CLOCK_THERMAL b/baseconfig/CONFIG_CLOCK_THERMAL new file mode 100644 index 0000000..72ca05f --- /dev/null +++ b/baseconfig/CONFIG_CLOCK_THERMAL @@ -0,0 +1 @@ +# CONFIG_CLOCK_THERMAL is not set diff --git a/baseconfig/CONFIG_CRYPTO_DEV_SP_CCP b/baseconfig/CONFIG_CRYPTO_DEV_SP_CCP new file mode 100644 index 0000000..c494dcc --- /dev/null +++ b/baseconfig/CONFIG_CRYPTO_DEV_SP_CCP @@ -0,0 +1 @@ +# CONFIG_CRYPTO_DEV_SP_CCP is not set diff --git a/baseconfig/CONFIG_DEVFREQ_THERMAL b/baseconfig/CONFIG_DEVFREQ_THERMAL new file mode 100644 index 0000000..5b90f90 --- /dev/null +++ b/baseconfig/CONFIG_DEVFREQ_THERMAL @@ -0,0 +1 @@ +# CONFIG_DEVFREQ_THERMAL is not set diff --git a/baseconfig/CONFIG_DVB_DDBRIDGE_MSIENABLE b/baseconfig/CONFIG_DVB_DDBRIDGE_MSIENABLE new file mode 100644 index 0000000..4f0814b --- /dev/null +++ b/baseconfig/CONFIG_DVB_DDBRIDGE_MSIENABLE @@ -0,0 +1 @@ +# CONFIG_DVB_DDBRIDGE_MSIENABLE is not set diff --git a/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC b/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC index c50a31a..47e8f40 100644 --- a/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC +++ b/baseconfig/CONFIG_EARLY_PRINTK_USB_XDBC @@ -1 +1 @@ -# CONFIG_EARLY_PRINTK_USB_XDBC is not set +CONFIG_EARLY_PRINTK_USB_XDBC=y diff --git a/baseconfig/CONFIG_EXPERIMENTAL b/baseconfig/CONFIG_EXPERIMENTAL deleted file mode 100644 index 8c91d40..0000000 --- a/baseconfig/CONFIG_EXPERIMENTAL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_EXPERIMENTAL=y diff --git a/baseconfig/CONFIG_GPIO_BD9571MWV b/baseconfig/CONFIG_GPIO_BD9571MWV new file mode 100644 index 0000000..0cdd67b --- /dev/null +++ b/baseconfig/CONFIG_GPIO_BD9571MWV @@ -0,0 +1 @@ +CONFIG_GPIO_BD9571MWV=m diff --git a/baseconfig/CONFIG_GPIO_IT87 b/baseconfig/CONFIG_GPIO_IT87 index 00746d7..aaeb504 100644 --- a/baseconfig/CONFIG_GPIO_IT87 +++ b/baseconfig/CONFIG_GPIO_IT87 @@ -1 +1 @@ -CONFIG_GPIO_IT87=m +# CONFIG_GPIO_IT87 is not set diff --git a/baseconfig/CONFIG_GPIO_TPS68470 b/baseconfig/CONFIG_GPIO_TPS68470 new file mode 100644 index 0000000..3176e95 --- /dev/null +++ b/baseconfig/CONFIG_GPIO_TPS68470 @@ -0,0 +1 @@ +CONFIG_GPIO_TPS68470=y diff --git a/baseconfig/CONFIG_HID_CP2112 b/baseconfig/CONFIG_HID_CP2112 index 3f9425d..d0f72fa 100644 --- a/baseconfig/CONFIG_HID_CP2112 +++ b/baseconfig/CONFIG_HID_CP2112 @@ -1 +1 @@ -# CONFIG_HID_CP2112 is not set +CONFIG_HID_CP2112=m diff --git a/baseconfig/CONFIG_I2C_PARPORT b/baseconfig/CONFIG_I2C_PARPORT deleted file mode 100644 index 58827a2..0000000 --- a/baseconfig/CONFIG_I2C_PARPORT +++ /dev/null @@ -1 +0,0 @@ -CONFIG_I2C_PARPORT=m diff --git a/baseconfig/CONFIG_I2C_PARPORT_LIGHT b/baseconfig/CONFIG_I2C_PARPORT_LIGHT index 1dbc688..e182392 100644 --- a/baseconfig/CONFIG_I2C_PARPORT_LIGHT +++ b/baseconfig/CONFIG_I2C_PARPORT_LIGHT @@ -1 +1 @@ -CONFIG_I2C_PARPORT_LIGHT=m +# CONFIG_I2C_PARPORT_LIGHT is not set diff --git a/baseconfig/CONFIG_INFINIBAND_EXP_USER_ACCESS b/baseconfig/CONFIG_INFINIBAND_EXP_USER_ACCESS new file mode 100644 index 0000000..478415c --- /dev/null +++ b/baseconfig/CONFIG_INFINIBAND_EXP_USER_ACCESS @@ -0,0 +1 @@ +# CONFIG_INFINIBAND_EXP_USER_ACCESS is not set diff --git a/baseconfig/CONFIG_INOTIFY b/baseconfig/CONFIG_INOTIFY deleted file mode 100644 index 78343a1..0000000 --- a/baseconfig/CONFIG_INOTIFY +++ /dev/null @@ -1 +0,0 @@ -CONFIG_INOTIFY=y diff --git a/baseconfig/CONFIG_INPUT_PWM_VIBRA b/baseconfig/CONFIG_INPUT_PWM_VIBRA new file mode 100644 index 0000000..39a51b4 --- /dev/null +++ b/baseconfig/CONFIG_INPUT_PWM_VIBRA @@ -0,0 +1 @@ +# CONFIG_INPUT_PWM_VIBRA is not set diff --git a/baseconfig/CONFIG_INPUT_RK805_PWRKEY b/baseconfig/CONFIG_INPUT_RK805_PWRKEY new file mode 100644 index 0000000..4ce96f5 --- /dev/null +++ b/baseconfig/CONFIG_INPUT_RK805_PWRKEY @@ -0,0 +1 @@ +CONFIG_INPUT_RK805_PWRKEY=m diff --git a/baseconfig/CONFIG_IP_DCCP b/baseconfig/CONFIG_IP_DCCP index 26ba413..6ecb43a 100644 --- a/baseconfig/CONFIG_IP_DCCP +++ b/baseconfig/CONFIG_IP_DCCP @@ -1 +1 @@ -CONFIG_IP_DCCP=m +# CONFIG_IP_DCCP is not set diff --git a/baseconfig/CONFIG_IR_GPIO_TX b/baseconfig/CONFIG_IR_GPIO_TX new file mode 100644 index 0000000..4b6b484 --- /dev/null +++ b/baseconfig/CONFIG_IR_GPIO_TX @@ -0,0 +1 @@ +CONFIG_IR_GPIO_TX=m diff --git a/baseconfig/CONFIG_IR_PWM_TX b/baseconfig/CONFIG_IR_PWM_TX new file mode 100644 index 0000000..4dfd418 --- /dev/null +++ b/baseconfig/CONFIG_IR_PWM_TX @@ -0,0 +1 @@ +CONFIG_IR_PWM_TX=m diff --git a/baseconfig/CONFIG_LEDS_AS3645A b/baseconfig/CONFIG_LEDS_AS3645A new file mode 100644 index 0000000..25d6f9f --- /dev/null +++ b/baseconfig/CONFIG_LEDS_AS3645A @@ -0,0 +1 @@ +CONFIG_LEDS_AS3645A=m diff --git a/baseconfig/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT b/baseconfig/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT new file mode 100644 index 0000000..3365285 --- /dev/null +++ b/baseconfig/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT @@ -0,0 +1 @@ +# CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT is not set diff --git a/baseconfig/CONFIG_LTC2471 b/baseconfig/CONFIG_LTC2471 new file mode 100644 index 0000000..5d272ac --- /dev/null +++ b/baseconfig/CONFIG_LTC2471 @@ -0,0 +1 @@ +# CONFIG_LTC2471 is not set diff --git a/baseconfig/CONFIG_MDIO_I2C b/baseconfig/CONFIG_MDIO_I2C new file mode 100644 index 0000000..df7d9e0 --- /dev/null +++ b/baseconfig/CONFIG_MDIO_I2C @@ -0,0 +1 @@ +CONFIG_MDIO_I2C=m diff --git a/baseconfig/CONFIG_MFD_BD9571MWV b/baseconfig/CONFIG_MFD_BD9571MWV new file mode 100644 index 0000000..28d27a0 --- /dev/null +++ b/baseconfig/CONFIG_MFD_BD9571MWV @@ -0,0 +1 @@ +CONFIG_MFD_BD9571MWV=m diff --git a/baseconfig/CONFIG_MFD_TPS68470 b/baseconfig/CONFIG_MFD_TPS68470 new file mode 100644 index 0000000..10fd404 --- /dev/null +++ b/baseconfig/CONFIG_MFD_TPS68470 @@ -0,0 +1 @@ +CONFIG_MFD_TPS68470=y diff --git a/baseconfig/CONFIG_MLX5_ESWITCH b/baseconfig/CONFIG_MLX5_ESWITCH new file mode 100644 index 0000000..8a69e06 --- /dev/null +++ b/baseconfig/CONFIG_MLX5_ESWITCH @@ -0,0 +1 @@ +CONFIG_MLX5_ESWITCH=y diff --git a/baseconfig/CONFIG_MLX5_MPFS b/baseconfig/CONFIG_MLX5_MPFS new file mode 100644 index 0000000..6799ed4 --- /dev/null +++ b/baseconfig/CONFIG_MLX5_MPFS @@ -0,0 +1 @@ +CONFIG_MLX5_MPFS=y diff --git a/baseconfig/CONFIG_MMC_BLOCK_BOUNCE b/baseconfig/CONFIG_MMC_BLOCK_BOUNCE deleted file mode 100644 index 4470e83..0000000 --- a/baseconfig/CONFIG_MMC_BLOCK_BOUNCE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MMC_BLOCK_BOUNCE=y diff --git a/baseconfig/CONFIG_NET_NSH b/baseconfig/CONFIG_NET_NSH new file mode 100644 index 0000000..2a9a24e --- /dev/null +++ b/baseconfig/CONFIG_NET_NSH @@ -0,0 +1 @@ +CONFIG_NET_NSH=m diff --git a/baseconfig/CONFIG_NET_VENDOR_HUAWEI b/baseconfig/CONFIG_NET_VENDOR_HUAWEI new file mode 100644 index 0000000..ae01b91 --- /dev/null +++ b/baseconfig/CONFIG_NET_VENDOR_HUAWEI @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_HUAWEI is not set diff --git a/baseconfig/CONFIG_NET_VENDOR_SNI b/baseconfig/CONFIG_NET_VENDOR_SNI new file mode 100644 index 0000000..4f301f9 --- /dev/null +++ b/baseconfig/CONFIG_NET_VENDOR_SNI @@ -0,0 +1 @@ +# CONFIG_NET_VENDOR_SNI is not set diff --git a/baseconfig/CONFIG_NFT_FIB_NETDEV b/baseconfig/CONFIG_NFT_FIB_NETDEV new file mode 100644 index 0000000..273bfeb --- /dev/null +++ b/baseconfig/CONFIG_NFT_FIB_NETDEV @@ -0,0 +1 @@ +CONFIG_NFT_FIB_NETDEV=m diff --git a/baseconfig/CONFIG_PARPORT b/baseconfig/CONFIG_PARPORT index 5891569..9dd8f33 100644 --- a/baseconfig/CONFIG_PARPORT +++ b/baseconfig/CONFIG_PARPORT @@ -1 +1 @@ -CONFIG_PARPORT=m +# CONFIG_PARPORT is not set diff --git a/baseconfig/CONFIG_PARPORT_1284 b/baseconfig/CONFIG_PARPORT_1284 deleted file mode 100644 index 585684f..0000000 --- a/baseconfig/CONFIG_PARPORT_1284 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PARPORT_1284=y diff --git a/baseconfig/CONFIG_PARPORT_AX88796 b/baseconfig/CONFIG_PARPORT_AX88796 deleted file mode 100644 index 6214b2b..0000000 --- a/baseconfig/CONFIG_PARPORT_AX88796 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PARPORT_AX88796 is not set diff --git a/baseconfig/CONFIG_PARPORT_PC b/baseconfig/CONFIG_PARPORT_PC index b9aa6e8..e2a0d36 100644 --- a/baseconfig/CONFIG_PARPORT_PC +++ b/baseconfig/CONFIG_PARPORT_PC @@ -1 +1 @@ -CONFIG_PARPORT_PC=m +# CONFIG_PARPORT_PC is not set diff --git a/baseconfig/CONFIG_PARPORT_PC_FIFO b/baseconfig/CONFIG_PARPORT_PC_FIFO deleted file mode 100644 index 62562af..0000000 --- a/baseconfig/CONFIG_PARPORT_PC_FIFO +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PARPORT_PC_FIFO is not set diff --git a/baseconfig/CONFIG_PARPORT_PC_PCMCIA b/baseconfig/CONFIG_PARPORT_PC_PCMCIA deleted file mode 100644 index cae4b9a..0000000 --- a/baseconfig/CONFIG_PARPORT_PC_PCMCIA +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PARPORT_PC_PCMCIA=m diff --git a/baseconfig/CONFIG_PARPORT_PC_SUPERIO b/baseconfig/CONFIG_PARPORT_PC_SUPERIO deleted file mode 100644 index b6858ce..0000000 --- a/baseconfig/CONFIG_PARPORT_PC_SUPERIO +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PARPORT_PC_SUPERIO is not set diff --git a/baseconfig/CONFIG_PARPORT_SERIAL b/baseconfig/CONFIG_PARPORT_SERIAL deleted file mode 100644 index 8e90201..0000000 --- a/baseconfig/CONFIG_PARPORT_SERIAL +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PARPORT_SERIAL=m diff --git a/baseconfig/CONFIG_PCIE_DW_HOST_ECAM b/baseconfig/CONFIG_PCIE_DW_HOST_ECAM new file mode 100644 index 0000000..c73d5c1 --- /dev/null +++ b/baseconfig/CONFIG_PCIE_DW_HOST_ECAM @@ -0,0 +1 @@ +# CONFIG_PCIE_DW_HOST_ECAM is not set diff --git a/baseconfig/CONFIG_PHYLINK b/baseconfig/CONFIG_PHYLINK new file mode 100644 index 0000000..cc1e23e --- /dev/null +++ b/baseconfig/CONFIG_PHYLINK @@ -0,0 +1 @@ +CONFIG_PHYLINK=m diff --git a/baseconfig/CONFIG_PHY_MVEBU_CP110_COMPHY b/baseconfig/CONFIG_PHY_MVEBU_CP110_COMPHY new file mode 100644 index 0000000..8c10468 --- /dev/null +++ b/baseconfig/CONFIG_PHY_MVEBU_CP110_COMPHY @@ -0,0 +1 @@ +# CONFIG_PHY_MVEBU_CP110_COMPHY is not set diff --git a/baseconfig/CONFIG_PI433 b/baseconfig/CONFIG_PI433 new file mode 100644 index 0000000..b275e1e --- /dev/null +++ b/baseconfig/CONFIG_PI433 @@ -0,0 +1 @@ +# CONFIG_PI433 is not set diff --git a/baseconfig/CONFIG_PINCTRL_MSM8994 b/baseconfig/CONFIG_PINCTRL_MSM8994 deleted file mode 100644 index 977b1c3..0000000 --- a/baseconfig/CONFIG_PINCTRL_MSM8994 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_MSM8994 is not set diff --git a/baseconfig/CONFIG_PINCTRL_RK805 b/baseconfig/CONFIG_PINCTRL_RK805 new file mode 100644 index 0000000..47b4fd8 --- /dev/null +++ b/baseconfig/CONFIG_PINCTRL_RK805 @@ -0,0 +1 @@ +CONFIG_PINCTRL_RK805=m diff --git a/baseconfig/CONFIG_PINCTRL_SPRD b/baseconfig/CONFIG_PINCTRL_SPRD new file mode 100644 index 0000000..cffa735 --- /dev/null +++ b/baseconfig/CONFIG_PINCTRL_SPRD @@ -0,0 +1 @@ +# CONFIG_PINCTRL_SPRD is not set diff --git a/baseconfig/CONFIG_PINCTRL_SPRD_SC9860 b/baseconfig/CONFIG_PINCTRL_SPRD_SC9860 new file mode 100644 index 0000000..f9b405f --- /dev/null +++ b/baseconfig/CONFIG_PINCTRL_SPRD_SC9860 @@ -0,0 +1 @@ +# CONFIG_PINCTRL_SPRD_SC9860 is not set diff --git a/baseconfig/CONFIG_PM_OPP b/baseconfig/CONFIG_PM_OPP index a77bd27..bbe2b56 100644 --- a/baseconfig/CONFIG_PM_OPP +++ b/baseconfig/CONFIG_PM_OPP @@ -1 +1 @@ -# CONFIG_PM_OPP is not set +CONFIG_PM_OPP=y diff --git a/baseconfig/CONFIG_PPS_CLIENT_PARPORT b/baseconfig/CONFIG_PPS_CLIENT_PARPORT deleted file mode 100644 index d11894d..0000000 --- a/baseconfig/CONFIG_PPS_CLIENT_PARPORT +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PPS_CLIENT_PARPORT=m diff --git a/baseconfig/CONFIG_QCOM_GLINK_SSR b/baseconfig/CONFIG_QCOM_GLINK_SSR new file mode 100644 index 0000000..1c67b32 --- /dev/null +++ b/baseconfig/CONFIG_QCOM_GLINK_SSR @@ -0,0 +1 @@ +# CONFIG_QCOM_GLINK_SSR is not set diff --git a/baseconfig/CONFIG_R8822BE b/baseconfig/CONFIG_R8822BE new file mode 100644 index 0000000..2f7c087 --- /dev/null +++ b/baseconfig/CONFIG_R8822BE @@ -0,0 +1 @@ +CONFIG_R8822BE=m diff --git a/baseconfig/CONFIG_REGULATOR_BD9571MWV b/baseconfig/CONFIG_REGULATOR_BD9571MWV new file mode 100644 index 0000000..3b0acb7 --- /dev/null +++ b/baseconfig/CONFIG_REGULATOR_BD9571MWV @@ -0,0 +1 @@ +CONFIG_REGULATOR_BD9571MWV=m diff --git a/baseconfig/CONFIG_RESET_ATTACK_MITIGATION b/baseconfig/CONFIG_RESET_ATTACK_MITIGATION new file mode 100644 index 0000000..8202a78 --- /dev/null +++ b/baseconfig/CONFIG_RESET_ATTACK_MITIGATION @@ -0,0 +1 @@ +CONFIG_RESET_ATTACK_MITIGATION=y diff --git a/baseconfig/CONFIG_RESET_HSDK_V1 b/baseconfig/CONFIG_RESET_HSDK_V1 new file mode 100644 index 0000000..4c2b97d --- /dev/null +++ b/baseconfig/CONFIG_RESET_HSDK_V1 @@ -0,0 +1 @@ +# CONFIG_RESET_HSDK_V1 is not set diff --git a/baseconfig/CONFIG_RMNET b/baseconfig/CONFIG_RMNET new file mode 100644 index 0000000..5e8c115 --- /dev/null +++ b/baseconfig/CONFIG_RMNET @@ -0,0 +1 @@ +# CONFIG_RMNET is not set diff --git a/baseconfig/CONFIG_ROCKCHIP_PHY b/baseconfig/CONFIG_ROCKCHIP_PHY new file mode 100644 index 0000000..4ca6087 --- /dev/null +++ b/baseconfig/CONFIG_ROCKCHIP_PHY @@ -0,0 +1 @@ +# CONFIG_ROCKCHIP_PHY is not set diff --git a/baseconfig/CONFIG_RPMSG_QCOM_GLINK_SMEM b/baseconfig/CONFIG_RPMSG_QCOM_GLINK_SMEM new file mode 100644 index 0000000..c2c0a0c --- /dev/null +++ b/baseconfig/CONFIG_RPMSG_QCOM_GLINK_SMEM @@ -0,0 +1 @@ +# CONFIG_RPMSG_QCOM_GLINK_SMEM is not set diff --git a/baseconfig/CONFIG_SENSORS_IBM_CFFPS b/baseconfig/CONFIG_SENSORS_IBM_CFFPS new file mode 100644 index 0000000..a217d97 --- /dev/null +++ b/baseconfig/CONFIG_SENSORS_IBM_CFFPS @@ -0,0 +1 @@ +# CONFIG_SENSORS_IBM_CFFPS is not set diff --git a/baseconfig/CONFIG_SENSORS_TPS53679 b/baseconfig/CONFIG_SENSORS_TPS53679 new file mode 100644 index 0000000..461a703 --- /dev/null +++ b/baseconfig/CONFIG_SENSORS_TPS53679 @@ -0,0 +1 @@ +CONFIG_SENSORS_TPS53679=m diff --git a/baseconfig/CONFIG_SERIO_GPIO_PS2 b/baseconfig/CONFIG_SERIO_GPIO_PS2 new file mode 100644 index 0000000..22c1adb --- /dev/null +++ b/baseconfig/CONFIG_SERIO_GPIO_PS2 @@ -0,0 +1 @@ +# CONFIG_SERIO_GPIO_PS2 is not set diff --git a/baseconfig/CONFIG_SFP b/baseconfig/CONFIG_SFP new file mode 100644 index 0000000..db57db1 --- /dev/null +++ b/baseconfig/CONFIG_SFP @@ -0,0 +1 @@ +CONFIG_SFP=m diff --git a/baseconfig/CONFIG_SLAB_FREELIST_HARDENED b/baseconfig/CONFIG_SLAB_FREELIST_HARDENED new file mode 100644 index 0000000..52602d2 --- /dev/null +++ b/baseconfig/CONFIG_SLAB_FREELIST_HARDENED @@ -0,0 +1 @@ +CONFIG_SLAB_FREELIST_HARDENED=y diff --git a/baseconfig/CONFIG_SND_HDA_POWER_SAVE_DEFAULT b/baseconfig/CONFIG_SND_HDA_POWER_SAVE_DEFAULT index ce02ec9..ba01897 100644 --- a/baseconfig/CONFIG_SND_HDA_POWER_SAVE_DEFAULT +++ b/baseconfig/CONFIG_SND_HDA_POWER_SAVE_DEFAULT @@ -1 +1 @@ -CONFIG_SND_HDA_POWER_SAVE_DEFAULT=0 +CONFIG_SND_HDA_POWER_SAVE_DEFAULT=1 diff --git a/baseconfig/CONFIG_SND_SOC_CS43130 b/baseconfig/CONFIG_SND_SOC_CS43130 new file mode 100644 index 0000000..3fad16f --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_CS43130 @@ -0,0 +1 @@ +CONFIG_SND_SOC_CS43130=m diff --git a/baseconfig/CONFIG_SND_SOC_WM8524 b/baseconfig/CONFIG_SND_SOC_WM8524 new file mode 100644 index 0000000..1eb33d7 --- /dev/null +++ b/baseconfig/CONFIG_SND_SOC_WM8524 @@ -0,0 +1 @@ +CONFIG_SND_SOC_WM8524=m diff --git a/baseconfig/CONFIG_SQUASHFS_ZSTD b/baseconfig/CONFIG_SQUASHFS_ZSTD new file mode 100644 index 0000000..023fb21 --- /dev/null +++ b/baseconfig/CONFIG_SQUASHFS_ZSTD @@ -0,0 +1 @@ +CONFIG_SQUASHFS_ZSTD=y diff --git a/baseconfig/CONFIG_STRING_SELFTEST b/baseconfig/CONFIG_STRING_SELFTEST new file mode 100644 index 0000000..dbff6d7 --- /dev/null +++ b/baseconfig/CONFIG_STRING_SELFTEST @@ -0,0 +1 @@ +# CONFIG_STRING_SELFTEST is not set diff --git a/baseconfig/CONFIG_TI_SYSCON_RESET b/baseconfig/CONFIG_TI_SYSCON_RESET deleted file mode 100644 index daf623a..0000000 --- a/baseconfig/CONFIG_TI_SYSCON_RESET +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_TI_SYSCON_RESET is not set diff --git a/baseconfig/CONFIG_USB_LED b/baseconfig/CONFIG_USB_LED deleted file mode 100644 index 445af6c..0000000 --- a/baseconfig/CONFIG_USB_LED +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_LED=m diff --git a/baseconfig/CONFIG_USB_SERIAL_MOS7715_PARPORT b/baseconfig/CONFIG_USB_SERIAL_MOS7715_PARPORT deleted file mode 100644 index 87be782..0000000 --- a/baseconfig/CONFIG_USB_SERIAL_MOS7715_PARPORT +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_SERIAL_MOS7715_PARPORT=y diff --git a/baseconfig/CONFIG_VIDEO_RENESAS_VSP1 b/baseconfig/CONFIG_VIDEO_RENESAS_VSP1 deleted file mode 100644 index dd5c6f3..0000000 --- a/baseconfig/CONFIG_VIDEO_RENESAS_VSP1 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_VIDEO_RENESAS_VSP1 is not set diff --git a/baseconfig/CONFIG_W1_SLAVE_DS2805 b/baseconfig/CONFIG_W1_SLAVE_DS2805 new file mode 100644 index 0000000..eddd3bb --- /dev/null +++ b/baseconfig/CONFIG_W1_SLAVE_DS2805 @@ -0,0 +1 @@ +CONFIG_W1_SLAVE_DS2805=m diff --git a/baseconfig/CONFIG_WIL6210_DEBUGFS b/baseconfig/CONFIG_WIL6210_DEBUGFS new file mode 100644 index 0000000..f0f5fe7 --- /dev/null +++ b/baseconfig/CONFIG_WIL6210_DEBUGFS @@ -0,0 +1 @@ +CONFIG_WIL6210_DEBUGFS=y diff --git a/baseconfig/CONFIG_ZRAM_WRITEBACK b/baseconfig/CONFIG_ZRAM_WRITEBACK new file mode 100644 index 0000000..9a566b7 --- /dev/null +++ b/baseconfig/CONFIG_ZRAM_WRITEBACK @@ -0,0 +1 @@ +# CONFIG_ZRAM_WRITEBACK is not set diff --git a/baseconfig/arm/CONFIG_ARCH_BCM_IPROC b/baseconfig/arm/CONFIG_ARCH_BCM_IPROC new file mode 100644 index 0000000..d60fe56 --- /dev/null +++ b/baseconfig/arm/CONFIG_ARCH_BCM_IPROC @@ -0,0 +1 @@ +# CONFIG_ARCH_BCM_IPROC is not set diff --git a/baseconfig/arm/CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG b/baseconfig/arm/CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG new file mode 100644 index 0000000..62fd0b8 --- /dev/null +++ b/baseconfig/arm/CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG @@ -0,0 +1 @@ +CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y diff --git a/baseconfig/arm/CONFIG_CRYPTO_SHA256_ARM64 b/baseconfig/arm/CONFIG_CRYPTO_SHA256_ARM64 index ba32f85..3aa7dac 100644 --- a/baseconfig/arm/CONFIG_CRYPTO_SHA256_ARM64 +++ b/baseconfig/arm/CONFIG_CRYPTO_SHA256_ARM64 @@ -1 +1 @@ -CONFIG_CRYPTO_SHA256_ARM64=m +CONFIG_CRYPTO_SHA256_ARM64=y diff --git a/baseconfig/arm/CONFIG_DRM_DW_HDMI_CEC b/baseconfig/arm/CONFIG_DRM_DW_HDMI_CEC new file mode 100644 index 0000000..a3e178e --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_DW_HDMI_CEC @@ -0,0 +1 @@ +CONFIG_DRM_DW_HDMI_CEC=m diff --git a/baseconfig/arm/CONFIG_DRM_SUN4I_BACKEND b/baseconfig/arm/CONFIG_DRM_SUN4I_BACKEND deleted file mode 100644 index c1d1d21..0000000 --- a/baseconfig/arm/CONFIG_DRM_SUN4I_BACKEND +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DRM_SUN4I_BACKEND=m diff --git a/baseconfig/arm/CONFIG_DRM_VC4_HDMI_CEC b/baseconfig/arm/CONFIG_DRM_VC4_HDMI_CEC new file mode 100644 index 0000000..da0132c --- /dev/null +++ b/baseconfig/arm/CONFIG_DRM_VC4_HDMI_CEC @@ -0,0 +1 @@ +CONFIG_DRM_VC4_HDMI_CEC=y diff --git a/baseconfig/arm/CONFIG_EXTCON_USBC_CROS_EC b/baseconfig/arm/CONFIG_EXTCON_USBC_CROS_EC new file mode 100644 index 0000000..831bc6e --- /dev/null +++ b/baseconfig/arm/CONFIG_EXTCON_USBC_CROS_EC @@ -0,0 +1 @@ +CONFIG_EXTCON_USBC_CROS_EC=m diff --git a/baseconfig/arm/CONFIG_HW_RANDOM_IMX_RNGC b/baseconfig/arm/CONFIG_HW_RANDOM_IMX_RNGC new file mode 100644 index 0000000..e7b39a2 --- /dev/null +++ b/baseconfig/arm/CONFIG_HW_RANDOM_IMX_RNGC @@ -0,0 +1 @@ +CONFIG_HW_RANDOM_IMX_RNGC=m diff --git a/baseconfig/arm/CONFIG_I2C_DESIGNWARE_CORE b/baseconfig/arm/CONFIG_I2C_DESIGNWARE_CORE index 661ffb0..f9cdc63 100644 --- a/baseconfig/arm/CONFIG_I2C_DESIGNWARE_CORE +++ b/baseconfig/arm/CONFIG_I2C_DESIGNWARE_CORE @@ -1 +1 @@ -CONFIG_I2C_DESIGNWARE_CORE=m +CONFIG_I2C_DESIGNWARE_CORE=y diff --git a/baseconfig/arm/CONFIG_I2C_DESIGNWARE_PLATFORM b/baseconfig/arm/CONFIG_I2C_DESIGNWARE_PLATFORM index cec2f86..3d50a3e 100644 --- a/baseconfig/arm/CONFIG_I2C_DESIGNWARE_PLATFORM +++ b/baseconfig/arm/CONFIG_I2C_DESIGNWARE_PLATFORM @@ -1 +1 @@ -CONFIG_I2C_DESIGNWARE_PLATFORM=m +CONFIG_I2C_DESIGNWARE_PLATFORM=y diff --git a/baseconfig/arm/CONFIG_IOMMU_DMA b/baseconfig/arm/CONFIG_IOMMU_DMA new file mode 100644 index 0000000..a9155fb --- /dev/null +++ b/baseconfig/arm/CONFIG_IOMMU_DMA @@ -0,0 +1 @@ +CONFIG_IOMMU_DMA=y diff --git a/baseconfig/arm/CONFIG_MESON_GX_SOCINFO b/baseconfig/arm/CONFIG_MESON_GX_SOCINFO new file mode 100644 index 0000000..ce5ba6f --- /dev/null +++ b/baseconfig/arm/CONFIG_MESON_GX_SOCINFO @@ -0,0 +1 @@ +CONFIG_MESON_GX_SOCINFO=y diff --git a/baseconfig/arm/CONFIG_MFD_SPMI_PMIC b/baseconfig/arm/CONFIG_MFD_SPMI_PMIC deleted file mode 100644 index 6360fee..0000000 --- a/baseconfig/arm/CONFIG_MFD_SPMI_PMIC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MFD_SPMI_PMIC=m diff --git a/baseconfig/arm/CONFIG_MTD_NAND_PXA3xx b/baseconfig/arm/CONFIG_MTD_NAND_PXA3xx new file mode 100644 index 0000000..584b57e --- /dev/null +++ b/baseconfig/arm/CONFIG_MTD_NAND_PXA3xx @@ -0,0 +1 @@ +CONFIG_MTD_NAND_PXA3xx=m diff --git a/baseconfig/arm/CONFIG_PARPORT b/baseconfig/arm/CONFIG_PARPORT deleted file mode 100644 index 9dd8f33..0000000 --- a/baseconfig/arm/CONFIG_PARPORT +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PARPORT is not set diff --git a/baseconfig/arm/CONFIG_PATA_OF_PLATFORM b/baseconfig/arm/CONFIG_PATA_OF_PLATFORM deleted file mode 100644 index 5354705..0000000 --- a/baseconfig/arm/CONFIG_PATA_OF_PLATFORM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_PATA_OF_PLATFORM=m diff --git a/baseconfig/arm/CONFIG_RADIO_WL128X b/baseconfig/arm/CONFIG_RADIO_WL128X deleted file mode 100644 index 88b42f8..0000000 --- a/baseconfig/arm/CONFIG_RADIO_WL128X +++ /dev/null @@ -1 +0,0 @@ -CONFIG_RADIO_WL128X=m diff --git a/baseconfig/arm/CONFIG_ROCKCHIP_PHY b/baseconfig/arm/CONFIG_ROCKCHIP_PHY new file mode 100644 index 0000000..e49faf8 --- /dev/null +++ b/baseconfig/arm/CONFIG_ROCKCHIP_PHY @@ -0,0 +1 @@ +CONFIG_ROCKCHIP_PHY=m diff --git a/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_AC97 b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_AC97 new file mode 100644 index 0000000..fa8e0e0 --- /dev/null +++ b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_AC97 @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA20_AC97=m diff --git a/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_DAS b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_DAS new file mode 100644 index 0000000..82205dc --- /dev/null +++ b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_DAS @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA20_DAS=m diff --git a/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_I2S b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_I2S new file mode 100644 index 0000000..abfe228 --- /dev/null +++ b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_I2S @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA20_I2S=m diff --git a/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_SPDIF b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_SPDIF new file mode 100644 index 0000000..0f05cff --- /dev/null +++ b/baseconfig/arm/CONFIG_SND_SOC_TEGRA20_SPDIF @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA20_SPDIF=m diff --git a/baseconfig/arm/CONFIG_SND_SOC_TEGRA30_AHUB b/baseconfig/arm/CONFIG_SND_SOC_TEGRA30_AHUB new file mode 100644 index 0000000..d5632de --- /dev/null +++ b/baseconfig/arm/CONFIG_SND_SOC_TEGRA30_AHUB @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA30_AHUB=m diff --git a/baseconfig/arm/CONFIG_SND_SOC_TEGRA30_I2S b/baseconfig/arm/CONFIG_SND_SOC_TEGRA30_I2S new file mode 100644 index 0000000..c7fabc7 --- /dev/null +++ b/baseconfig/arm/CONFIG_SND_SOC_TEGRA30_I2S @@ -0,0 +1 @@ +CONFIG_SND_SOC_TEGRA30_I2S=m diff --git a/baseconfig/arm/CONFIG_SUNXI_SRAM b/baseconfig/arm/CONFIG_SUNXI_SRAM new file mode 100644 index 0000000..526bd58 --- /dev/null +++ b/baseconfig/arm/CONFIG_SUNXI_SRAM @@ -0,0 +1 @@ +CONFIG_SUNXI_SRAM=y diff --git a/baseconfig/arm/CONFIG_TINYDRM_REPAPER b/baseconfig/arm/CONFIG_TINYDRM_REPAPER new file mode 100644 index 0000000..c4d2874 --- /dev/null +++ b/baseconfig/arm/CONFIG_TINYDRM_REPAPER @@ -0,0 +1 @@ +# CONFIG_TINYDRM_REPAPER is not set diff --git a/baseconfig/arm/CONFIG_TINYDRM_ST7586 b/baseconfig/arm/CONFIG_TINYDRM_ST7586 new file mode 100644 index 0000000..2b9e29f --- /dev/null +++ b/baseconfig/arm/CONFIG_TINYDRM_ST7586 @@ -0,0 +1 @@ +# CONFIG_TINYDRM_ST7586 is not set diff --git a/baseconfig/arm/CONFIG_TI_ST b/baseconfig/arm/CONFIG_TI_ST deleted file mode 100644 index e6d0d44..0000000 --- a/baseconfig/arm/CONFIG_TI_ST +++ /dev/null @@ -1 +0,0 @@ -CONFIG_TI_ST=m diff --git a/baseconfig/arm/CONFIG_USB_CHIPIDEA b/baseconfig/arm/CONFIG_USB_CHIPIDEA new file mode 100644 index 0000000..0b76e35 --- /dev/null +++ b/baseconfig/arm/CONFIG_USB_CHIPIDEA @@ -0,0 +1 @@ +CONFIG_USB_CHIPIDEA=m diff --git a/baseconfig/arm/CONFIG_USB_CHIPIDEA_HOST b/baseconfig/arm/CONFIG_USB_CHIPIDEA_HOST new file mode 100644 index 0000000..1c14a4a --- /dev/null +++ b/baseconfig/arm/CONFIG_USB_CHIPIDEA_HOST @@ -0,0 +1 @@ +CONFIG_USB_CHIPIDEA_HOST=y diff --git a/baseconfig/arm/CONFIG_USB_CHIPIDEA_UDC b/baseconfig/arm/CONFIG_USB_CHIPIDEA_UDC new file mode 100644 index 0000000..3200526 --- /dev/null +++ b/baseconfig/arm/CONFIG_USB_CHIPIDEA_UDC @@ -0,0 +1 @@ +CONFIG_USB_CHIPIDEA_UDC=y diff --git a/baseconfig/arm/CONFIG_USB_CHIPIDEA_ULPI b/baseconfig/arm/CONFIG_USB_CHIPIDEA_ULPI new file mode 100644 index 0000000..d1a5cf9 --- /dev/null +++ b/baseconfig/arm/CONFIG_USB_CHIPIDEA_ULPI @@ -0,0 +1 @@ +CONFIG_USB_CHIPIDEA_ULPI=y diff --git a/baseconfig/arm/CONFIG_VIDEO_MESON_AO_CEC b/baseconfig/arm/CONFIG_VIDEO_MESON_AO_CEC new file mode 100644 index 0000000..499a440 --- /dev/null +++ b/baseconfig/arm/CONFIG_VIDEO_MESON_AO_CEC @@ -0,0 +1 @@ +CONFIG_VIDEO_MESON_AO_CEC=m diff --git a/baseconfig/arm/arm64/CONFIG_ARCH_BCM_IPROC b/baseconfig/arm/arm64/CONFIG_ARCH_BCM_IPROC deleted file mode 100644 index d60fe56..0000000 --- a/baseconfig/arm/arm64/CONFIG_ARCH_BCM_IPROC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_ARCH_BCM_IPROC is not set diff --git a/baseconfig/arm/arm64/CONFIG_ARCH_TEGRA_186_SOC b/baseconfig/arm/arm64/CONFIG_ARCH_TEGRA_186_SOC index 0439db3..1cafdb2 100644 --- a/baseconfig/arm/arm64/CONFIG_ARCH_TEGRA_186_SOC +++ b/baseconfig/arm/arm64/CONFIG_ARCH_TEGRA_186_SOC @@ -1 +1 @@ -# CONFIG_ARCH_TEGRA_186_SOC is not set +CONFIG_ARCH_TEGRA_186_SOC=y diff --git a/baseconfig/arm/arm64/CONFIG_ARCH_VULCAN b/baseconfig/arm/arm64/CONFIG_ARCH_VULCAN deleted file mode 100644 index 6081275..0000000 --- a/baseconfig/arm/arm64/CONFIG_ARCH_VULCAN +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_ARCH_VULCAN is not set diff --git a/baseconfig/arm/arm64/CONFIG_ARM64_PMEM b/baseconfig/arm/arm64/CONFIG_ARM64_PMEM new file mode 100644 index 0000000..9325600 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ARM64_PMEM @@ -0,0 +1 @@ +# CONFIG_ARM64_PMEM is not set diff --git a/baseconfig/arm/arm64/CONFIG_ARM_TEGRA186_CPUFREQ b/baseconfig/arm/arm64/CONFIG_ARM_TEGRA186_CPUFREQ new file mode 100644 index 0000000..f0e165d --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_ARM_TEGRA186_CPUFREQ @@ -0,0 +1 @@ +CONFIG_ARM_TEGRA186_CPUFREQ=m diff --git a/baseconfig/arm/arm64/CONFIG_CHARGER_QCOM_SMBB b/baseconfig/arm/arm64/CONFIG_CHARGER_QCOM_SMBB new file mode 100644 index 0000000..43a91eb --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_CHARGER_QCOM_SMBB @@ -0,0 +1 @@ +CONFIG_CHARGER_QCOM_SMBB=m diff --git a/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 b/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 index 113c72b..dd0ae2c 100644 --- a/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 +++ b/baseconfig/arm/arm64/CONFIG_CRYPTO_AES_ARM64 @@ -1 +1 @@ -CONFIG_CRYPTO_AES_ARM64=m +CONFIG_CRYPTO_AES_ARM64=y diff --git a/baseconfig/arm/arm64/CONFIG_DMI b/baseconfig/arm/arm64/CONFIG_DMI deleted file mode 100644 index f961d16..0000000 --- a/baseconfig/arm/arm64/CONFIG_DMI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DMI=y diff --git a/baseconfig/arm/arm64/CONFIG_DMIID b/baseconfig/arm/arm64/CONFIG_DMIID deleted file mode 100644 index d0ea362..0000000 --- a/baseconfig/arm/arm64/CONFIG_DMIID +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DMIID=y diff --git a/baseconfig/arm/arm64/CONFIG_DMI_SYSFS b/baseconfig/arm/arm64/CONFIG_DMI_SYSFS deleted file mode 100644 index 76565ca..0000000 --- a/baseconfig/arm/arm64/CONFIG_DMI_SYSFS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_DMI_SYSFS=y diff --git a/baseconfig/arm/arm64/CONFIG_GPIO_THUNDERX b/baseconfig/arm/arm64/CONFIG_GPIO_THUNDERX new file mode 100644 index 0000000..6895cc0 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_GPIO_THUNDERX @@ -0,0 +1 @@ +CONFIG_GPIO_THUNDERX=m diff --git a/baseconfig/arm/arm64/CONFIG_MFD_SPMI_PMIC b/baseconfig/arm/arm64/CONFIG_MFD_SPMI_PMIC new file mode 100644 index 0000000..6360fee --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_MFD_SPMI_PMIC @@ -0,0 +1 @@ +CONFIG_MFD_SPMI_PMIC=m diff --git a/baseconfig/arm/arm64/CONFIG_MMC_QCOM_DML b/baseconfig/arm/arm64/CONFIG_MMC_QCOM_DML index 059d0d4..48facf3 100644 --- a/baseconfig/arm/arm64/CONFIG_MMC_QCOM_DML +++ b/baseconfig/arm/arm64/CONFIG_MMC_QCOM_DML @@ -1 +1 @@ -CONFIG_MMC_QCOM_DML=m +CONFIG_MMC_QCOM_DML=y diff --git a/baseconfig/arm/arm64/CONFIG_NET_VENDOR_SNI b/baseconfig/arm/arm64/CONFIG_NET_VENDOR_SNI new file mode 100644 index 0000000..bb77206 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_NET_VENDOR_SNI @@ -0,0 +1 @@ +CONFIG_NET_VENDOR_SNI=y diff --git a/baseconfig/arm/arm64/CONFIG_PARPORT_PC b/baseconfig/arm/arm64/CONFIG_PARPORT_PC deleted file mode 100644 index e2a0d36..0000000 --- a/baseconfig/arm/arm64/CONFIG_PARPORT_PC +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PARPORT_PC is not set diff --git a/baseconfig/arm/arm64/CONFIG_PCIE_DW_HOST_ECAM b/baseconfig/arm/arm64/CONFIG_PCIE_DW_HOST_ECAM new file mode 100644 index 0000000..cdb6169 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PCIE_DW_HOST_ECAM @@ -0,0 +1 @@ +CONFIG_PCIE_DW_HOST_ECAM=y diff --git a/baseconfig/arm/arm64/CONFIG_PHY_MVEBU_CP110_COMPHY b/baseconfig/arm/arm64/CONFIG_PHY_MVEBU_CP110_COMPHY new file mode 100644 index 0000000..1902b0c --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_PHY_MVEBU_CP110_COMPHY @@ -0,0 +1 @@ +CONFIG_PHY_MVEBU_CP110_COMPHY=m diff --git a/baseconfig/arm/arm64/CONFIG_RANDOMIZE_BASE b/baseconfig/arm/arm64/CONFIG_RANDOMIZE_BASE index 097a2d3..20610a9 100644 --- a/baseconfig/arm/arm64/CONFIG_RANDOMIZE_BASE +++ b/baseconfig/arm/arm64/CONFIG_RANDOMIZE_BASE @@ -1 +1 @@ -# CONFIG_RANDOMIZE_BASE is not set +CONFIG_RANDOMIZE_BASE=y diff --git a/baseconfig/arm/arm64/CONFIG_RANDOMIZE_MODULE_REGION_FULL b/baseconfig/arm/arm64/CONFIG_RANDOMIZE_MODULE_REGION_FULL new file mode 100644 index 0000000..7645a37 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_RANDOMIZE_MODULE_REGION_FULL @@ -0,0 +1 @@ +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y diff --git a/baseconfig/arm/arm64/CONFIG_RELOCATABLE b/baseconfig/arm/arm64/CONFIG_RELOCATABLE index ff7e139..36808ed 100644 --- a/baseconfig/arm/arm64/CONFIG_RELOCATABLE +++ b/baseconfig/arm/arm64/CONFIG_RELOCATABLE @@ -1 +1 @@ -# CONFIG_RELOCATABLE is not set +CONFIG_RELOCATABLE=y diff --git a/baseconfig/arm/arm64/CONFIG_SNI_NETSEC b/baseconfig/arm/arm64/CONFIG_SNI_NETSEC new file mode 100644 index 0000000..c348519 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SNI_NETSEC @@ -0,0 +1 @@ +CONFIG_SNI_NETSEC=m diff --git a/baseconfig/arm/arm64/CONFIG_SOCIONEXT_SYNQUACER_PREITS b/baseconfig/arm/arm64/CONFIG_SOCIONEXT_SYNQUACER_PREITS new file mode 100644 index 0000000..ded5c35 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_SOCIONEXT_SYNQUACER_PREITS @@ -0,0 +1 @@ +CONFIG_SOCIONEXT_SYNQUACER_PREITS=y diff --git a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA b/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA deleted file mode 100644 index 0b76e35..0000000 --- a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_CHIPIDEA=m diff --git a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_HOST b/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_HOST deleted file mode 100644 index 1c14a4a..0000000 --- a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_HOST +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_CHIPIDEA_HOST=y diff --git a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_UDC b/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_UDC deleted file mode 100644 index 3200526..0000000 --- a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_UDC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_CHIPIDEA_UDC=y diff --git a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_ULPI b/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_ULPI deleted file mode 100644 index d1a5cf9..0000000 --- a/baseconfig/arm/arm64/CONFIG_USB_CHIPIDEA_ULPI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_CHIPIDEA_ULPI=y diff --git a/baseconfig/arm/arm64/CONFIG_USB_CONFIGFS_F_LB_SS b/baseconfig/arm/arm64/CONFIG_USB_CONFIGFS_F_LB_SS new file mode 100644 index 0000000..213edb5 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_USB_CONFIGFS_F_LB_SS @@ -0,0 +1 @@ +# CONFIG_USB_CONFIGFS_F_LB_SS is not set diff --git a/baseconfig/arm/arm64/CONFIG_VIDEO_QCOM_CAMSS b/baseconfig/arm/arm64/CONFIG_VIDEO_QCOM_CAMSS new file mode 100644 index 0000000..5e2512c --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_VIDEO_QCOM_CAMSS @@ -0,0 +1 @@ +CONFIG_VIDEO_QCOM_CAMSS=m diff --git a/baseconfig/arm/arm64/CONFIG_VMAP_STACK b/baseconfig/arm/arm64/CONFIG_VMAP_STACK new file mode 100644 index 0000000..8bd9868 --- /dev/null +++ b/baseconfig/arm/arm64/CONFIG_VMAP_STACK @@ -0,0 +1 @@ +CONFIG_VMAP_STACK=y diff --git a/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_BACKEND b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_BACKEND new file mode 100644 index 0000000..c1d1d21 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_BACKEND @@ -0,0 +1 @@ +CONFIG_DRM_SUN4I_BACKEND=m diff --git a/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_HDMI_CEC b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_HDMI_CEC new file mode 100644 index 0000000..8ba7340 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_DRM_SUN4I_HDMI_CEC @@ -0,0 +1 @@ +# CONFIG_DRM_SUN4I_HDMI_CEC is not set diff --git a/baseconfig/arm/armv7/CONFIG_MMC_QCOM_DML b/baseconfig/arm/armv7/CONFIG_MMC_QCOM_DML deleted file mode 100644 index 059d0d4..0000000 --- a/baseconfig/arm/armv7/CONFIG_MMC_QCOM_DML +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MMC_QCOM_DML=m diff --git a/baseconfig/arm/armv7/CONFIG_MTD_NAND_PXA3xx b/baseconfig/arm/armv7/CONFIG_MTD_NAND_PXA3xx deleted file mode 100644 index 584b57e..0000000 --- a/baseconfig/arm/armv7/CONFIG_MTD_NAND_PXA3xx +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MTD_NAND_PXA3xx=m diff --git a/baseconfig/arm/armv7/CONFIG_OMAP2_DSS_DEBUG b/baseconfig/arm/armv7/CONFIG_OMAP2_DSS_DEBUG deleted file mode 100644 index 8b8ba13..0000000 --- a/baseconfig/arm/armv7/CONFIG_OMAP2_DSS_DEBUG +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_OMAP2_DSS_DEBUG is not set diff --git a/baseconfig/arm/armv7/CONFIG_PINCTRL_BCM281XX b/baseconfig/arm/armv7/CONFIG_PINCTRL_BCM281XX deleted file mode 100644 index 9963aed..0000000 --- a/baseconfig/arm/armv7/CONFIG_PINCTRL_BCM281XX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_BCM281XX is not set diff --git a/baseconfig/arm/armv7/CONFIG_PINCTRL_IMX35 b/baseconfig/arm/armv7/CONFIG_PINCTRL_IMX35 deleted file mode 100644 index c9a6422..0000000 --- a/baseconfig/arm/armv7/CONFIG_PINCTRL_IMX35 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_IMX35 is not set diff --git a/baseconfig/arm/armv7/CONFIG_PWM_TIECAP b/baseconfig/arm/armv7/CONFIG_PWM_TIECAP new file mode 100644 index 0000000..84f1e9b --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_PWM_TIECAP @@ -0,0 +1 @@ +CONFIG_PWM_TIECAP=m diff --git a/baseconfig/arm/armv7/CONFIG_RTC_DRV_ARMADA38X b/baseconfig/arm/armv7/CONFIG_RTC_DRV_ARMADA38X deleted file mode 100644 index 7dcdafc..0000000 --- a/baseconfig/arm/armv7/CONFIG_RTC_DRV_ARMADA38X +++ /dev/null @@ -1 +0,0 @@ -CONFIG_RTC_DRV_ARMADA38X=m diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA20_I2S b/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA20_I2S deleted file mode 100644 index abfe228..0000000 --- a/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA20_I2S +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_TEGRA20_I2S=m diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA30_AHUB b/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA30_AHUB deleted file mode 100644 index d5632de..0000000 --- a/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA30_AHUB +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_TEGRA30_AHUB=m diff --git a/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA30_I2S b/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA30_I2S deleted file mode 100644 index c7fabc7..0000000 --- a/baseconfig/arm/armv7/CONFIG_SND_SOC_TEGRA30_I2S +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_TEGRA30_I2S=m diff --git a/baseconfig/arm/armv7/CONFIG_SUN4I_A10_CCU b/baseconfig/arm/armv7/CONFIG_SUN4I_A10_CCU new file mode 100644 index 0000000..3b2ba68 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN4I_A10_CCU @@ -0,0 +1 @@ +CONFIG_SUN4I_A10_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUN8I_R40_CCU b/baseconfig/arm/armv7/CONFIG_SUN8I_R40_CCU new file mode 100644 index 0000000..1499009 --- /dev/null +++ b/baseconfig/arm/armv7/CONFIG_SUN8I_R40_CCU @@ -0,0 +1 @@ +CONFIG_SUN8I_R40_CCU=y diff --git a/baseconfig/arm/armv7/CONFIG_SUNXI_SRAM b/baseconfig/arm/armv7/CONFIG_SUNXI_SRAM deleted file mode 100644 index 526bd58..0000000 --- a/baseconfig/arm/armv7/CONFIG_SUNXI_SRAM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SUNXI_SRAM=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_BATTERY_BQ27XXX_HDQ b/baseconfig/arm/armv7/armv7/CONFIG_BATTERY_BQ27XXX_HDQ new file mode 100644 index 0000000..2be0785 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_BATTERY_BQ27XXX_HDQ @@ -0,0 +1 @@ +CONFIG_BATTERY_BQ27XXX_HDQ=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_CHARGER_QCOM_SMBB b/baseconfig/arm/armv7/armv7/CONFIG_CHARGER_QCOM_SMBB new file mode 100644 index 0000000..43a91eb --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_CHARGER_QCOM_SMBB @@ -0,0 +1 @@ +CONFIG_CHARGER_QCOM_SMBB=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_IMX_REMOTEPROC b/baseconfig/arm/armv7/armv7/CONFIG_IMX_REMOTEPROC new file mode 100644 index 0000000..53983d8 --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_IMX_REMOTEPROC @@ -0,0 +1 @@ +CONFIG_IMX_REMOTEPROC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MFD_SPMI_PMIC b/baseconfig/arm/armv7/armv7/CONFIG_MFD_SPMI_PMIC new file mode 100644 index 0000000..6360fee --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_MFD_SPMI_PMIC @@ -0,0 +1 @@ +CONFIG_MFD_SPMI_PMIC=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_MMC_QCOM_DML b/baseconfig/arm/armv7/armv7/CONFIG_MMC_QCOM_DML index 059d0d4..48facf3 100644 --- a/baseconfig/arm/armv7/armv7/CONFIG_MMC_QCOM_DML +++ b/baseconfig/arm/armv7/armv7/CONFIG_MMC_QCOM_DML @@ -1 +1 @@ -CONFIG_MMC_QCOM_DML=m +CONFIG_MMC_QCOM_DML=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_AC97 b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_AC97 deleted file mode 100644 index fa8e0e0..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_AC97 +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_TEGRA20_AC97=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_DAS b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_DAS deleted file mode 100644 index 82205dc..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_DAS +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_TEGRA20_DAS=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_SPDIF b/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_SPDIF deleted file mode 100644 index 0f05cff..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_SND_SOC_TEGRA20_SPDIF +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SND_SOC_TEGRA20_SPDIF=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_TI_SYSCON_RESET b/baseconfig/arm/armv7/armv7/CONFIG_TI_SYSCON_RESET deleted file mode 100644 index defe644..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_TI_SYSCON_RESET +++ /dev/null @@ -1 +0,0 @@ -CONFIG_TI_SYSCON_RESET=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA b/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA deleted file mode 100644 index 0b76e35..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_CHIPIDEA=m diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_HOST b/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_HOST deleted file mode 100644 index 1c14a4a..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_HOST +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_CHIPIDEA_HOST=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_UDC b/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_UDC deleted file mode 100644 index 3200526..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_UDC +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_CHIPIDEA_UDC=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_ULPI b/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_ULPI deleted file mode 100644 index d1a5cf9..0000000 --- a/baseconfig/arm/armv7/armv7/CONFIG_USB_CHIPIDEA_ULPI +++ /dev/null @@ -1 +0,0 @@ -CONFIG_USB_CHIPIDEA_ULPI=y diff --git a/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_QCOM_CAMSS b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_QCOM_CAMSS new file mode 100644 index 0000000..5e2512c --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_VIDEO_QCOM_CAMSS @@ -0,0 +1 @@ +CONFIG_VIDEO_QCOM_CAMSS=m diff --git a/baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA20_DAS b/baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA20_DAS deleted file mode 100644 index 71a38a4..0000000 --- a/baseconfig/arm/armv7/lpae/CONFIG_SND_SOC_TEGRA20_DAS +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_SND_SOC_TEGRA20_DAS is not set diff --git a/baseconfig/arm/armv7/lpae/CONFIG_TI_SYSCON_RESET b/baseconfig/arm/armv7/lpae/CONFIG_TI_SYSCON_RESET deleted file mode 100644 index defe644..0000000 --- a/baseconfig/arm/armv7/lpae/CONFIG_TI_SYSCON_RESET +++ /dev/null @@ -1 +0,0 @@ -CONFIG_TI_SYSCON_RESET=m diff --git a/baseconfig/powerpc/CONFIG_PPC_MEMTRACE b/baseconfig/powerpc/CONFIG_PPC_MEMTRACE new file mode 100644 index 0000000..c783714 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PPC_MEMTRACE @@ -0,0 +1 @@ +# CONFIG_PPC_MEMTRACE is not set diff --git a/baseconfig/powerpc/CONFIG_PPC_VAS b/baseconfig/powerpc/CONFIG_PPC_VAS new file mode 100644 index 0000000..ec767da --- /dev/null +++ b/baseconfig/powerpc/CONFIG_PPC_VAS @@ -0,0 +1 @@ +CONFIG_PPC_VAS=y diff --git a/baseconfig/powerpc/CONFIG_SENSORS_IBM_CFFPS b/baseconfig/powerpc/CONFIG_SENSORS_IBM_CFFPS new file mode 100644 index 0000000..31f2603 --- /dev/null +++ b/baseconfig/powerpc/CONFIG_SENSORS_IBM_CFFPS @@ -0,0 +1 @@ +CONFIG_SENSORS_IBM_CFFPS=m diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_CPU_LITTLE_ENDIAN b/baseconfig/powerpc/powerpc64p7/CONFIG_CPU_LITTLE_ENDIAN deleted file mode 100644 index 57d623f..0000000 --- a/baseconfig/powerpc/powerpc64p7/CONFIG_CPU_LITTLE_ENDIAN +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_CPU_LITTLE_ENDIAN is not set diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_GENERIC_PHY b/baseconfig/powerpc/powerpc64p7/CONFIG_GENERIC_PHY deleted file mode 100644 index 40cd1a4..0000000 --- a/baseconfig/powerpc/powerpc64p7/CONFIG_GENERIC_PHY +++ /dev/null @@ -1 +0,0 @@ -CONFIG_GENERIC_PHY=y diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_I2C_MUX b/baseconfig/powerpc/powerpc64p7/CONFIG_I2C_MUX deleted file mode 100644 index 6982ed9..0000000 --- a/baseconfig/powerpc/powerpc64p7/CONFIG_I2C_MUX +++ /dev/null @@ -1 +0,0 @@ -CONFIG_I2C_MUX=m diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_MFD_CORE b/baseconfig/powerpc/powerpc64p7/CONFIG_MFD_CORE deleted file mode 100644 index c8855e8..0000000 --- a/baseconfig/powerpc/powerpc64p7/CONFIG_MFD_CORE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_MFD_CORE=m diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_POWER7_CPU b/baseconfig/powerpc/powerpc64p7/CONFIG_POWER7_CPU deleted file mode 100644 index 40eb65b..0000000 --- a/baseconfig/powerpc/powerpc64p7/CONFIG_POWER7_CPU +++ /dev/null @@ -1 +0,0 @@ -CONFIG_POWER7_CPU=y diff --git a/baseconfig/powerpc/powerpc64p7/CONFIG_SERIAL_CORE b/baseconfig/powerpc/powerpc64p7/CONFIG_SERIAL_CORE deleted file mode 100644 index 32ecde5..0000000 --- a/baseconfig/powerpc/powerpc64p7/CONFIG_SERIAL_CORE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SERIAL_CORE=m diff --git a/baseconfig/s390x/CONFIG_BLK_CPQ_CISS_DA b/baseconfig/s390x/CONFIG_BLK_CPQ_CISS_DA deleted file mode 100644 index 2e6c723..0000000 --- a/baseconfig/s390x/CONFIG_BLK_CPQ_CISS_DA +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_BLK_CPQ_CISS_DA is not set diff --git a/baseconfig/s390x/CONFIG_CMA b/baseconfig/s390x/CONFIG_CMA new file mode 100644 index 0000000..309c9e7 --- /dev/null +++ b/baseconfig/s390x/CONFIG_CMA @@ -0,0 +1 @@ +CONFIG_CMA=y diff --git a/baseconfig/s390x/CONFIG_CMA_AREAS b/baseconfig/s390x/CONFIG_CMA_AREAS new file mode 100644 index 0000000..5474a48 --- /dev/null +++ b/baseconfig/s390x/CONFIG_CMA_AREAS @@ -0,0 +1 @@ +CONFIG_CMA_AREAS=7 diff --git a/baseconfig/s390x/CONFIG_CMA_DEBUG b/baseconfig/s390x/CONFIG_CMA_DEBUG new file mode 100644 index 0000000..64ff80c --- /dev/null +++ b/baseconfig/s390x/CONFIG_CMA_DEBUG @@ -0,0 +1 @@ +# CONFIG_CMA_DEBUG is not set diff --git a/baseconfig/s390x/CONFIG_CMA_DEBUGFS b/baseconfig/s390x/CONFIG_CMA_DEBUGFS new file mode 100644 index 0000000..fba8990 --- /dev/null +++ b/baseconfig/s390x/CONFIG_CMA_DEBUGFS @@ -0,0 +1 @@ +# CONFIG_CMA_DEBUGFS is not set diff --git a/baseconfig/s390x/CONFIG_I2C_PARPORT b/baseconfig/s390x/CONFIG_I2C_PARPORT deleted file mode 100644 index 87b55ca..0000000 --- a/baseconfig/s390x/CONFIG_I2C_PARPORT +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_I2C_PARPORT is not set diff --git a/baseconfig/s390x/CONFIG_I2C_PARPORT_LIGHT b/baseconfig/s390x/CONFIG_I2C_PARPORT_LIGHT deleted file mode 100644 index e182392..0000000 --- a/baseconfig/s390x/CONFIG_I2C_PARPORT_LIGHT +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_I2C_PARPORT_LIGHT is not set diff --git a/baseconfig/s390x/CONFIG_MFD_BD9571MWV b/baseconfig/s390x/CONFIG_MFD_BD9571MWV new file mode 100644 index 0000000..d321ad3 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MFD_BD9571MWV @@ -0,0 +1 @@ +# CONFIG_MFD_BD9571MWV is not set diff --git a/baseconfig/s390x/CONFIG_MFD_RTSX_USB b/baseconfig/s390x/CONFIG_MFD_RTSX_USB new file mode 100644 index 0000000..b6efa65 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MFD_RTSX_USB @@ -0,0 +1 @@ +# CONFIG_MFD_RTSX_USB is not set diff --git a/baseconfig/s390x/CONFIG_MFD_TPS68470 b/baseconfig/s390x/CONFIG_MFD_TPS68470 new file mode 100644 index 0000000..e82f415 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MFD_TPS68470 @@ -0,0 +1 @@ +# CONFIG_MFD_TPS68470 is not set diff --git a/baseconfig/s390x/CONFIG_MFD_VIPERBOARD b/baseconfig/s390x/CONFIG_MFD_VIPERBOARD new file mode 100644 index 0000000..1d4d005 --- /dev/null +++ b/baseconfig/s390x/CONFIG_MFD_VIPERBOARD @@ -0,0 +1 @@ +# CONFIG_MFD_VIPERBOARD is not set diff --git a/baseconfig/s390x/CONFIG_PARPORT b/baseconfig/s390x/CONFIG_PARPORT deleted file mode 100644 index 9dd8f33..0000000 --- a/baseconfig/s390x/CONFIG_PARPORT +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PARPORT is not set diff --git a/baseconfig/s390x/CONFIG_VMCP_CMA_SIZE b/baseconfig/s390x/CONFIG_VMCP_CMA_SIZE new file mode 100644 index 0000000..aee0667 --- /dev/null +++ b/baseconfig/s390x/CONFIG_VMCP_CMA_SIZE @@ -0,0 +1 @@ +CONFIG_VMCP_CMA_SIZE=4 diff --git a/baseconfig/x86/CONFIG_CONFIG_PINCTRL_LEWISBURG b/baseconfig/x86/CONFIG_CONFIG_PINCTRL_LEWISBURG new file mode 100644 index 0000000..c2c5119 --- /dev/null +++ b/baseconfig/x86/CONFIG_CONFIG_PINCTRL_LEWISBURG @@ -0,0 +1 @@ +CONFIG_PINCTRL_LEWISBURG=m diff --git a/baseconfig/x86/CONFIG_HYPERV_VSOCKETS b/baseconfig/x86/CONFIG_HYPERV_VSOCKETS new file mode 100644 index 0000000..bd21cd6 --- /dev/null +++ b/baseconfig/x86/CONFIG_HYPERV_VSOCKETS @@ -0,0 +1 @@ +CONFIG_HYPERV_VSOCKETS=m diff --git a/baseconfig/x86/CONFIG_I2C_PARPORT b/baseconfig/x86/CONFIG_I2C_PARPORT new file mode 100644 index 0000000..58827a2 --- /dev/null +++ b/baseconfig/x86/CONFIG_I2C_PARPORT @@ -0,0 +1 @@ +CONFIG_I2C_PARPORT=m diff --git a/baseconfig/x86/CONFIG_I2C_PARPORT_LIGHT b/baseconfig/x86/CONFIG_I2C_PARPORT_LIGHT new file mode 100644 index 0000000..1dbc688 --- /dev/null +++ b/baseconfig/x86/CONFIG_I2C_PARPORT_LIGHT @@ -0,0 +1 @@ +CONFIG_I2C_PARPORT_LIGHT=m diff --git a/baseconfig/x86/CONFIG_INTEL_RDT b/baseconfig/x86/CONFIG_INTEL_RDT new file mode 100644 index 0000000..0dcef9a --- /dev/null +++ b/baseconfig/x86/CONFIG_INTEL_RDT @@ -0,0 +1 @@ +CONFIG_INTEL_RDT=y diff --git a/baseconfig/x86/CONFIG_MAXSMP b/baseconfig/x86/CONFIG_MAXSMP index 8d0fa58..d0d71de 100644 --- a/baseconfig/x86/CONFIG_MAXSMP +++ b/baseconfig/x86/CONFIG_MAXSMP @@ -1 +1 @@ -CONFIG_MAXSMP=y +# CONFIG_MAXSMP is not set diff --git a/baseconfig/x86/CONFIG_PARPORT b/baseconfig/x86/CONFIG_PARPORT new file mode 100644 index 0000000..5891569 --- /dev/null +++ b/baseconfig/x86/CONFIG_PARPORT @@ -0,0 +1 @@ +CONFIG_PARPORT=m diff --git a/baseconfig/x86/CONFIG_PARPORT_1284 b/baseconfig/x86/CONFIG_PARPORT_1284 new file mode 100644 index 0000000..585684f --- /dev/null +++ b/baseconfig/x86/CONFIG_PARPORT_1284 @@ -0,0 +1 @@ +CONFIG_PARPORT_1284=y diff --git a/baseconfig/x86/CONFIG_PARPORT_AX88796 b/baseconfig/x86/CONFIG_PARPORT_AX88796 new file mode 100644 index 0000000..6214b2b --- /dev/null +++ b/baseconfig/x86/CONFIG_PARPORT_AX88796 @@ -0,0 +1 @@ +# CONFIG_PARPORT_AX88796 is not set diff --git a/baseconfig/x86/CONFIG_PARPORT_PC b/baseconfig/x86/CONFIG_PARPORT_PC new file mode 100644 index 0000000..b9aa6e8 --- /dev/null +++ b/baseconfig/x86/CONFIG_PARPORT_PC @@ -0,0 +1 @@ +CONFIG_PARPORT_PC=m diff --git a/baseconfig/x86/CONFIG_PARPORT_PC_FIFO b/baseconfig/x86/CONFIG_PARPORT_PC_FIFO new file mode 100644 index 0000000..62562af --- /dev/null +++ b/baseconfig/x86/CONFIG_PARPORT_PC_FIFO @@ -0,0 +1 @@ +# CONFIG_PARPORT_PC_FIFO is not set diff --git a/baseconfig/x86/CONFIG_PARPORT_PC_PCMCIA b/baseconfig/x86/CONFIG_PARPORT_PC_PCMCIA new file mode 100644 index 0000000..cae4b9a --- /dev/null +++ b/baseconfig/x86/CONFIG_PARPORT_PC_PCMCIA @@ -0,0 +1 @@ +CONFIG_PARPORT_PC_PCMCIA=m diff --git a/baseconfig/x86/CONFIG_PARPORT_PC_SUPERIO b/baseconfig/x86/CONFIG_PARPORT_PC_SUPERIO new file mode 100644 index 0000000..b6858ce --- /dev/null +++ b/baseconfig/x86/CONFIG_PARPORT_PC_SUPERIO @@ -0,0 +1 @@ +# CONFIG_PARPORT_PC_SUPERIO is not set diff --git a/baseconfig/x86/CONFIG_PARPORT_SERIAL b/baseconfig/x86/CONFIG_PARPORT_SERIAL new file mode 100644 index 0000000..8e90201 --- /dev/null +++ b/baseconfig/x86/CONFIG_PARPORT_SERIAL @@ -0,0 +1 @@ +CONFIG_PARPORT_SERIAL=m diff --git a/baseconfig/x86/CONFIG_PINCTRL_DENVERTON b/baseconfig/x86/CONFIG_PINCTRL_DENVERTON new file mode 100644 index 0000000..ec6b4e8 --- /dev/null +++ b/baseconfig/x86/CONFIG_PINCTRL_DENVERTON @@ -0,0 +1 @@ +CONFIG_PINCTRL_DENVERTON=m diff --git a/baseconfig/x86/CONFIG_PPS_CLIENT_PARPORT b/baseconfig/x86/CONFIG_PPS_CLIENT_PARPORT new file mode 100644 index 0000000..d11894d --- /dev/null +++ b/baseconfig/x86/CONFIG_PPS_CLIENT_PARPORT @@ -0,0 +1 @@ +CONFIG_PPS_CLIENT_PARPORT=m diff --git a/baseconfig/x86/CONFIG_USB_SERIAL_MOS7715_PARPORT b/baseconfig/x86/CONFIG_USB_SERIAL_MOS7715_PARPORT new file mode 100644 index 0000000..87be782 --- /dev/null +++ b/baseconfig/x86/CONFIG_USB_SERIAL_MOS7715_PARPORT @@ -0,0 +1 @@ +CONFIG_USB_SERIAL_MOS7715_PARPORT=y diff --git a/baseconfig/x86/CONFIG_XEN_PVCALLS_BACKEND b/baseconfig/x86/CONFIG_XEN_PVCALLS_BACKEND new file mode 100644 index 0000000..3a5b2c4 --- /dev/null +++ b/baseconfig/x86/CONFIG_XEN_PVCALLS_BACKEND @@ -0,0 +1 @@ +# CONFIG_XEN_PVCALLS_BACKEND is not set diff --git a/baseconfig/x86/i686/CONFIG_PINCTRL_BCM281XX b/baseconfig/x86/i686/CONFIG_PINCTRL_BCM281XX deleted file mode 100644 index 9963aed..0000000 --- a/baseconfig/x86/i686/CONFIG_PINCTRL_BCM281XX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_BCM281XX is not set diff --git a/baseconfig/x86/i686PAE/CONFIG_PINCTRL_BCM281XX b/baseconfig/x86/i686PAE/CONFIG_PINCTRL_BCM281XX deleted file mode 100644 index 9963aed..0000000 --- a/baseconfig/x86/i686PAE/CONFIG_PINCTRL_BCM281XX +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_PINCTRL_BCM281XX is not set diff --git a/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT b/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT new file mode 100644 index 0000000..f9eacfa --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT @@ -0,0 +1 @@ +CONFIG_AMD_MEM_ENCRYPT=y diff --git a/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT b/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT new file mode 100644 index 0000000..e41f0cf --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT @@ -0,0 +1 @@ +# CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT is not set diff --git a/baseconfig/x86/x86_64/CONFIG_DEVICE_PRIVATE b/baseconfig/x86/x86_64/CONFIG_DEVICE_PRIVATE new file mode 100644 index 0000000..ef0a4ad --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_DEVICE_PRIVATE @@ -0,0 +1 @@ +CONFIG_DEVICE_PRIVATE=y diff --git a/baseconfig/x86/x86_64/CONFIG_DEVICE_PUBLIC b/baseconfig/x86/x86_64/CONFIG_DEVICE_PUBLIC new file mode 100644 index 0000000..c790e94 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_DEVICE_PUBLIC @@ -0,0 +1 @@ +CONFIG_DEVICE_PUBLIC=y diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO b/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO deleted file mode 100644 index 87ca2bd..0000000 --- a/baseconfig/x86/x86_64/CONFIG_EXTCON_GPIO +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EXTCON_GPIO is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355 b/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355 deleted file mode 100644 index 680b5a7..0000000 --- a/baseconfig/x86/x86_64/CONFIG_EXTCON_MAX3355 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EXTCON_MAX3355 is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A b/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A deleted file mode 100644 index e5f7236..0000000 --- a/baseconfig/x86/x86_64/CONFIG_EXTCON_RT8973A +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EXTCON_RT8973A is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502 b/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502 deleted file mode 100644 index 916994a..0000000 --- a/baseconfig/x86/x86_64/CONFIG_EXTCON_SM5502 +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EXTCON_SM5502 is not set diff --git a/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO b/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO deleted file mode 100644 index 7a0c9af..0000000 --- a/baseconfig/x86/x86_64/CONFIG_EXTCON_USB_GPIO +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_EXTCON_USB_GPIO is not set diff --git a/baseconfig/x86/x86_64/CONFIG_HMM_MIRROR b/baseconfig/x86/x86_64/CONFIG_HMM_MIRROR new file mode 100644 index 0000000..11dfee6 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_HMM_MIRROR @@ -0,0 +1 @@ +CONFIG_HMM_MIRROR=y diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE deleted file mode 100644 index f9cdc63..0000000 --- a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_CORE +++ /dev/null @@ -1 +0,0 @@ -CONFIG_I2C_DESIGNWARE_CORE=y diff --git a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM b/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM deleted file mode 100644 index 3d50a3e..0000000 --- a/baseconfig/x86/x86_64/CONFIG_I2C_DESIGNWARE_PLATFORM +++ /dev/null @@ -1 +0,0 @@ -CONFIG_I2C_DESIGNWARE_PLATFORM=y diff --git a/baseconfig/x86/x86_64/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT b/baseconfig/x86/x86_64/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT new file mode 100644 index 0000000..4a06cfc --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT @@ -0,0 +1 @@ +CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT=y diff --git a/baseconfig/x86/x86_64/CONFIG_NR_CPUS b/baseconfig/x86/x86_64/CONFIG_NR_CPUS index 4411916..27d187f 100644 --- a/baseconfig/x86/x86_64/CONFIG_NR_CPUS +++ b/baseconfig/x86/x86_64/CONFIG_NR_CPUS @@ -1 +1 @@ -CONFIG_NR_CPUS=8192 +CONFIG_NR_CPUS=1024 diff --git a/baseconfig/x86/x86_64/CONFIG_X86_5LEVEL b/baseconfig/x86/x86_64/CONFIG_X86_5LEVEL new file mode 100644 index 0000000..db301f3 --- /dev/null +++ b/baseconfig/x86/x86_64/CONFIG_X86_5LEVEL @@ -0,0 +1 @@ +# CONFIG_X86_5LEVEL is not set diff --git a/bcm2835-clk-audio-jitter-issues.patch b/bcm2835-clk-audio-jitter-issues.patch deleted file mode 100644 index 91304d6..0000000 --- a/bcm2835-clk-audio-jitter-issues.patch +++ /dev/null @@ -1,206 +0,0 @@ -From patchwork Thu Jun 1 14:14:16 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,1/2] clk: bcm2835: Limit PCM clock to OSC and PLLD_PER -From: Phil Elwell -X-Patchwork-Id: 9759641 -Message-Id: <8cc0ba82-d33e-127b-7b86-ac595ef416d1@raspberrypi.org> -To: Michael Turquette , - Stephen Boyd , Eric Anholt , - Stefan Wahren , - Florian Fainelli , - linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, - linux-kernel@vger.kernel.org -Date: Thu, 1 Jun 2017 15:14:16 +0100 - -Restrict clock sources for the PCM peripheral to the oscillator and -PLLD_PER because other source may have varying rates or be switched off. -Prevent other sources from being selected by replacing their names in -the list of potential parents with dummy entries (entry index is -significant). - -Signed-off-by: Phil Elwell -Reviewed-by: Eric Anholt -Acked-by: Stefan Wahren ---- - drivers/clk/bcm/clk-bcm2835.c | 27 ++++++++++++++++++++++++++- - 1 file changed, 26 insertions(+), 1 deletion(-) - -diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c -index 0258538..49867d2 100644 ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -1516,6 +1516,31 @@ struct bcm2835_clk_desc { - .parents = bcm2835_clock_per_parents, \ - __VA_ARGS__) - -+/* -+ * Restrict clock sources for the PCM peripheral to the oscillator and -+ * PLLD_PER because other source may have varying rates or be switched -+ * off. -+ * -+ * Prevent other sources from being selected by replacing their names in -+ * the list of potential parents with dummy entries (entry index is -+ * significant). -+ */ -+static const char *const bcm2835_pcm_per_parents[] = { -+ "-", -+ "xosc", -+ "-", -+ "-", -+ "-", -+ "-", -+ "plld_per", -+ "-", -+}; -+ -+#define REGISTER_PCM_CLK(...) REGISTER_CLK( \ -+ .num_mux_parents = ARRAY_SIZE(bcm2835_pcm_per_parents), \ -+ .parents = bcm2835_pcm_per_parents, \ -+ __VA_ARGS__) -+ - /* main vpu parent mux */ - static const char *const bcm2835_clock_vpu_parents[] = { - "gnd", -@@ -1993,7 +2018,7 @@ struct bcm2835_clk_desc { - .int_bits = 4, - .frac_bits = 8, - .tcnt_mux = 22), -- [BCM2835_CLOCK_PCM] = REGISTER_PER_CLK( -+ [BCM2835_CLOCK_PCM] = REGISTER_PCM_CLK( - .name = "pcm", - .ctl_reg = CM_PCMCTL, - .div_reg = CM_PCMDIV, -From patchwork Thu Jun 1 14:14:22 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v4,2/2] clk: bcm2835: Minimise clock jitter for PCM clock -From: Phil Elwell -X-Patchwork-Id: 9759643 -Message-Id: <9989244b-ca4d-9081-95d9-b24f51099222@raspberrypi.org> -To: Michael Turquette , - Stephen Boyd , Eric Anholt , - Stefan Wahren , - Florian Fainelli , - linux-clk@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, - linux-kernel@vger.kernel.org -Date: Thu, 1 Jun 2017 15:14:22 +0100 - -Fractional clock dividers generate accurate average frequencies but -with jitter, particularly when the integer divisor is small. - -Introduce a new metric of clock accuracy to penalise clocks with a good -average but worse jitter compared to clocks with an average which is no -better but with lower jitter. The metric is the ideal rate minus the -worse deviation from that ideal using the nearest integer divisors. - -Use this metric for parent selection for clocks requiring low jitter -(currently just PCM). - -Signed-off-by: Phil Elwell -Reviewed-by: Eric Anholt -Acked-by: Stefan Wahren ---- - drivers/clk/bcm/clk-bcm2835.c | 34 +++++++++++++++++++++++++++++----- - 1 file changed, 29 insertions(+), 5 deletions(-) - -diff --git a/drivers/clk/bcm/clk-bcm2835.c b/drivers/clk/bcm/clk-bcm2835.c -index 49867d2..0bc56a0 100644 ---- a/drivers/clk/bcm/clk-bcm2835.c -+++ b/drivers/clk/bcm/clk-bcm2835.c -@@ -530,6 +530,7 @@ struct bcm2835_clock_data { - - bool is_vpu_clock; - bool is_mash_clock; -+ bool low_jitter; - - u32 tcnt_mux; - }; -@@ -1124,7 +1125,8 @@ static unsigned long bcm2835_clock_choose_div_and_prate(struct clk_hw *hw, - int parent_idx, - unsigned long rate, - u32 *div, -- unsigned long *prate) -+ unsigned long *prate, -+ unsigned long *avgrate) - { - struct bcm2835_clock *clock = bcm2835_clock_from_hw(hw); - struct bcm2835_cprman *cprman = clock->cprman; -@@ -1139,8 +1141,25 @@ static unsigned long bcm2835_clock_choose_div_and_prate(struct clk_hw *hw, - *prate = clk_hw_get_rate(parent); - *div = bcm2835_clock_choose_div(hw, rate, *prate, true); - -- return bcm2835_clock_rate_from_divisor(clock, *prate, -- *div); -+ *avgrate = bcm2835_clock_rate_from_divisor(clock, *prate, *div); -+ -+ if (data->low_jitter && (*div & CM_DIV_FRAC_MASK)) { -+ unsigned long high, low; -+ u32 int_div = *div & ~CM_DIV_FRAC_MASK; -+ -+ high = bcm2835_clock_rate_from_divisor(clock, *prate, -+ int_div); -+ int_div += CM_DIV_FRAC_MASK + 1; -+ low = bcm2835_clock_rate_from_divisor(clock, *prate, -+ int_div); -+ -+ /* -+ * Return a value which is the maximum deviation -+ * below the ideal rate, for use as a metric. -+ */ -+ return *avgrate - max(*avgrate - low, high - *avgrate); -+ } -+ return *avgrate; - } - - if (data->frac_bits) -@@ -1167,6 +1186,7 @@ static unsigned long bcm2835_clock_choose_div_and_prate(struct clk_hw *hw, - - *div = curdiv << CM_DIV_FRAC_BITS; - *prate = curdiv * best_rate; -+ *avgrate = best_rate; - - return best_rate; - } -@@ -1178,6 +1198,7 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw, - bool current_parent_is_pllc; - unsigned long rate, best_rate = 0; - unsigned long prate, best_prate = 0; -+ unsigned long avgrate, best_avgrate = 0; - size_t i; - u32 div; - -@@ -1202,11 +1223,13 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw, - continue; - - rate = bcm2835_clock_choose_div_and_prate(hw, i, req->rate, -- &div, &prate); -+ &div, &prate, -+ &avgrate); - if (rate > best_rate && rate <= req->rate) { - best_parent = parent; - best_prate = prate; - best_rate = rate; -+ best_avgrate = avgrate; - } - } - -@@ -1216,7 +1239,7 @@ static int bcm2835_clock_determine_rate(struct clk_hw *hw, - req->best_parent_hw = best_parent; - req->best_parent_rate = best_prate; - -- req->rate = best_rate; -+ req->rate = best_avgrate; - - return 0; - } -@@ -2025,6 +2048,7 @@ struct bcm2835_clk_desc { - .int_bits = 12, - .frac_bits = 12, - .is_mash_clock = true, -+ .low_jitter = true, - .tcnt_mux = 23), - [BCM2835_CLOCK_PWM] = REGISTER_PER_CLK( - .name = "pwm", diff --git a/bcm2835-fix-potential-null-pointer-dereferences.patch b/bcm2835-fix-potential-null-pointer-dereferences.patch deleted file mode 100644 index 862e77f..0000000 --- a/bcm2835-fix-potential-null-pointer-dereferences.patch +++ /dev/null @@ -1,70 +0,0 @@ -From patchwork Thu May 25 17:04:55 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v2] mmc: bcm2835: fix potential null pointer dereferences -From: "Gustavo A. R. Silva" -X-Patchwork-Id: 9748761 -Message-Id: <20170525170455.GA6904@embeddedgus> -To: Stefan Wahren , - Ulf Hansson , - Florian Fainelli , - Ray Jui , Scott Branden , - bcm-kernel-feedback-list@broadcom.com, Eric Anholt -Cc: "Gustavo A. R. Silva" , - linux-mmc@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org -Date: Thu, 25 May 2017 12:04:55 -0500 - -Null check at line 1165: if (mrq->cmd), implies that mrq->cmd might -be NULL. -Add null checks before dereferencing pointer mrq->cmd in order to avoid -any potential NULL pointer dereference. - -Addresses-Coverity-ID: 1408740 -Tested-by: Stefan Wahren -Signed-off-by: Gustavo A. R. Silva ---- -Changes in v2: - Change subject to make it clear the patch is bcm2835 related. - - drivers/mmc/host/bcm2835.c | 12 +++++++++--- - 1 file changed, 9 insertions(+), 3 deletions(-) - -diff --git a/drivers/mmc/host/bcm2835.c b/drivers/mmc/host/bcm2835.c -index 1f343a4..abba9a2 100644 ---- a/drivers/mmc/host/bcm2835.c -+++ b/drivers/mmc/host/bcm2835.c -@@ -1172,7 +1172,10 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) - if (mrq->data && !is_power_of_2(mrq->data->blksz)) { - dev_err(dev, "unsupported block size (%d bytes)\n", - mrq->data->blksz); -- mrq->cmd->error = -EINVAL; -+ -+ if (mrq->cmd) -+ mrq->cmd->error = -EINVAL; -+ - mmc_request_done(mmc, mrq); - return; - } -@@ -1194,7 +1197,10 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) - readl(host->ioaddr + SDCMD) & SDCMD_CMD_MASK, - edm); - bcm2835_dumpregs(host); -- mrq->cmd->error = -EILSEQ; -+ -+ if (mrq->cmd) -+ mrq->cmd->error = -EILSEQ; -+ - bcm2835_finish_request(host); - mutex_unlock(&host->mutex); - return; -@@ -1207,7 +1213,7 @@ static void bcm2835_request(struct mmc_host *mmc, struct mmc_request *mrq) - if (!host->use_busy) - bcm2835_finish_command(host); - } -- } else if (bcm2835_send_command(host, mrq->cmd)) { -+ } else if (mrq->cmd && bcm2835_send_command(host, mrq->cmd)) { - if (host->data && host->dma_desc) { - /* DMA transfer starts now, PIO starts after irq */ - bcm2835_start_dma(host); diff --git a/bcm2835-pinctrl-Avoid-warning-from-__irq_do_set_handler.patch b/bcm2835-pinctrl-Avoid-warning-from-__irq_do_set_handler.patch deleted file mode 100644 index 258d3b2..0000000 --- a/bcm2835-pinctrl-Avoid-warning-from-__irq_do_set_handler.patch +++ /dev/null @@ -1,70 +0,0 @@ -From patchwork Wed Jun 21 18:20:04 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: pinctrl: bcm2835: Avoid warning from __irq_do_set_handler -From: Stefan Wahren -X-Patchwork-Id: 9802555 -Message-Id: <1498069204-28154-1-git-send-email-stefan.wahren@i2se.com> -To: Linus Walleij , Eric Anholt -Cc: Stefan Wahren , linux-gpio@vger.kernel.org, - Phil Elwell , linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org -Date: Wed, 21 Jun 2017 20:20:04 +0200 - -We get a warning during boot with enabled EARLY_PRINTK that -we try to set a irq_chip without data. This is caused by ignoring -the return value of irq_of_parse_and_map(). So avoid calling -gpiochip_set_chained_irqchip() in error case. - -Signed-off-by: Stefan Wahren -Fixes: 85ae9e512f43 ("pinctrl: bcm2835: switch to GPIOLIB_IRQCHIP") ---- - drivers/pinctrl/bcm/pinctrl-bcm2835.c | 4 ++++ - 1 file changed, 4 insertions(+) - -diff --git a/drivers/pinctrl/bcm/pinctrl-bcm2835.c b/drivers/pinctrl/bcm/pinctrl-bcm2835.c -index 1eb7a1a..2308831 100644 ---- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c -+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c -@@ -1048,6 +1048,10 @@ static int bcm2835_pinctrl_probe(struct platform_device *pdev) - for (i = 0; i < BCM2835_NUM_IRQS; i++) { - pc->irq[i] = irq_of_parse_and_map(np, i); - pc->irq_group[i] = i; -+ -+ if (pc->irq[i] == 0) -+ continue; -+ - /* - * Use the same handler for all groups: this is necessary - * since we use one gpiochip to cover all lines - the -From 8aa99fe688734f249b07314cdd7c5e25651c9c6d Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Thu, 27 Oct 2016 16:21:19 +0100 -Subject: irq-bcm2836: Prevent spurious interrupts, and trap them early - -The old arch-specific IRQ macros included a dsb to ensure the -write to clear the mailbox interrupt completed before returning -from the interrupt. The BCM2836 irqchip driver needs the same -precaution to avoid spurious interrupts. - -Signed-off-by: Phil Elwell ---- - drivers/irqchip/irq-bcm2836.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/irqchip/irq-bcm2836.c b/drivers/irqchip/irq-bcm2836.c -index e7463e3..a8db33b 100644 ---- a/drivers/irqchip/irq-bcm2836.c -+++ b/drivers/irqchip/irq-bcm2836.c -@@ -175,6 +175,7 @@ __exception_irq_entry bcm2836_arm_irqchip_handle_irq(struct pt_regs *regs) - u32 ipi = ffs(mbox_val) - 1; - - writel(1 << ipi, mailbox0); -+ dsb(sy); - handle_IPI(ipi, regs); - #endif - } else if (stat) { --- -cgit v0.12 - diff --git a/bcm2837-arm32-support.patch b/bcm2837-arm32-support.patch deleted file mode 100644 index 021ae10..0000000 --- a/bcm2837-arm32-support.patch +++ /dev/null @@ -1,48 +0,0 @@ -From patchwork Tue Apr 25 16:45:08 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6) -From: Eric Anholt -X-Patchwork-Id: 9698781 -Message-Id: <20170425164508.32242-1-eric@anholt.net> -To: Lee Jones , Florian Fainelli , - Olof Johansson , Rob Herring , - Mark Rutland , devicetree@vger.kernel.org -Cc: Stefan Wahren , linux-kernel@vger.kernel.org, - Eric Anholt , bcm-kernel-feedback-list@broadcom.com, - Gerd Hoffmann , linux-arm-kernel@lists.infradead.org, - linux-rpi-kernel@lists.infradead.org -Date: Tue, 25 Apr 2017 09:45:08 -0700 - -Raspbian and Fedora have decided to support the Pi3 in 32-bit mode for -now, so it's useful to be able to test that mode on an upstream -kernel. It's also been useful for me to use the same board for 32-bit -and 64-bit development. - -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 + - 2 files changed, 2 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 011808490fed..eded842d9978 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -72,6 +72,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2835-rpi-b-plus.dtb \ - bcm2835-rpi-a-plus.dtb \ - bcm2836-rpi-2-b.dtb \ -+ bcm2837-rpi-3-b.dtb \ - bcm2835-rpi-zero.dtb - dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4708-asus-rt-ac56u.dtb \ -diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -new file mode 100644 -index 000000000000..c72a27d908b6 ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -@@ -0,0 +1 @@ -+#include "../../../arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts" diff --git a/bcm2837-bluetooth-support.patch b/bcm2837-bluetooth-support.patch new file mode 100644 index 0000000..c272c1e --- /dev/null +++ b/bcm2837-bluetooth-support.patch @@ -0,0 +1,36 @@ +From 50252c318fe2fcfcbd0832fa835e7fd1fafd7d2d Mon Sep 17 00:00:00 2001 +From: Peter Robinson +Date: Sun, 10 Sep 2017 19:30:02 +0100 +Subject: [PATCH 2/2] ARM: dts: bcm2837-rpi-3-b: Add bcm43438 serial slave + +Add BCM43438 (bluetooth) as a slave device of uart0 (pl011/ttyAMA0). +This allows to automatically insert the bcm43438 to the bluetooth +subsystem instead of relying on userspace helpers (hciattach). + +Overwrite chosen/stdout-path to use 8250 aux uart as console. + +Signed-off-by: Loic Poulain +Signed-off-by: Peter Robinson +--- + arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +index 20725ca487f3..e4488cb3067e 100644 +--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts ++++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts +@@ -24,6 +29,11 @@ + pinctrl-names = "default"; + pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; + status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ max-speed = <2000000>; ++ }; + }; + + /* uart1 is mapped to the pin header */ +-- +2.13.5 + diff --git a/bcm2837-initial-support.patch b/bcm2837-initial-support.patch deleted file mode 100644 index 021ae10..0000000 --- a/bcm2837-initial-support.patch +++ /dev/null @@ -1,48 +0,0 @@ -From patchwork Tue Apr 25 16:45:08 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: ARM: dts: Add devicetree for the Raspberry Pi 3, for arm32 (v6) -From: Eric Anholt -X-Patchwork-Id: 9698781 -Message-Id: <20170425164508.32242-1-eric@anholt.net> -To: Lee Jones , Florian Fainelli , - Olof Johansson , Rob Herring , - Mark Rutland , devicetree@vger.kernel.org -Cc: Stefan Wahren , linux-kernel@vger.kernel.org, - Eric Anholt , bcm-kernel-feedback-list@broadcom.com, - Gerd Hoffmann , linux-arm-kernel@lists.infradead.org, - linux-rpi-kernel@lists.infradead.org -Date: Tue, 25 Apr 2017 09:45:08 -0700 - -Raspbian and Fedora have decided to support the Pi3 in 32-bit mode for -now, so it's useful to be able to test that mode on an upstream -kernel. It's also been useful for me to use the same board for 32-bit -and 64-bit development. - -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 + - 2 files changed, 2 insertions(+) - create mode 100644 arch/arm/boot/dts/bcm2837-rpi-3-b.dts - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 011808490fed..eded842d9978 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -72,6 +72,7 @@ dtb-$(CONFIG_ARCH_BCM2835) += \ - bcm2835-rpi-b-plus.dtb \ - bcm2835-rpi-a-plus.dtb \ - bcm2836-rpi-2-b.dtb \ -+ bcm2837-rpi-3-b.dtb \ - bcm2835-rpi-zero.dtb - dtb-$(CONFIG_ARCH_BCM_5301X) += \ - bcm4708-asus-rt-ac56u.dtb \ -diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -new file mode 100644 -index 000000000000..c72a27d908b6 ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -@@ -0,0 +1 @@ -+#include "../../../arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts" diff --git a/bcm2837-move-dt.patch b/bcm2837-move-dt.patch deleted file mode 100644 index 018cf81..0000000 --- a/bcm2837-move-dt.patch +++ /dev/null @@ -1,516 +0,0 @@ -From 3bfe25fa9f8a56c5c877c7fd854d89238787c6d8 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Wed, 26 Jul 2017 13:01:56 -0700 -Subject: ARM: dts: bcm283x: Move the BCM2837 DT contents from arm64 to arm. - -BCM2837 is somewhat unusual in that we build its DT on both arm32 and -arm64. Most devices are being run in arm32 mode. - -Having the body of the DT for 2837 separate from 2835/6 has been a -source of pain, as we often need to make changes that span both -directories simultaneously (for example, the thermal changes for 4.13, -or anything that changes the name of a node referenced by '&' from -board files). Other changes are made more complicated than they need -to be, such as the SDHOST enabling, because we have to split a single -logical change into a 283[56] half and a 2837 half. - -To fix this, make the stub board include file live in arm64 instead of -arm32, and keep all of BCM283x's contents in arm32. From here on, our -changes to DT contents can be submitted through a single tree. - -Signed-off-by: Eric Anholt -Signed-off-by: Florian Fainelli ---- - arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 42 ++++++++++- - arch/arm/boot/dts/bcm2837.dtsi | 86 ++++++++++++++++++++++ - arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi | 1 - - arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 42 +---------- - arch/arm64/boot/dts/broadcom/bcm2837.dtsi | 86 ---------------------- - .../boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi | 1 - - .../boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi | 1 - - arch/arm64/boot/dts/broadcom/bcm283x.dtsi | 1 - - 8 files changed, 128 insertions(+), 132 deletions(-) - create mode 100644 arch/arm/boot/dts/bcm2837.dtsi - delete mode 120000 arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi - delete mode 100644 arch/arm64/boot/dts/broadcom/bcm2837.dtsi - delete mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi - delete mode 120000 arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi - delete mode 120000 arch/arm64/boot/dts/broadcom/bcm283x.dtsi - -diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -index c72a27d..972f14d 100644 ---- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -@@ -1 +1,41 @@ --#include "arm64/broadcom/bcm2837-rpi-3-b.dts" -+/dts-v1/; -+#include "bcm2837.dtsi" -+#include "bcm2835-rpi.dtsi" -+#include "bcm283x-rpi-smsc9514.dtsi" -+#include "bcm283x-rpi-usb-host.dtsi" -+ -+/ { -+ compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; -+ model = "Raspberry Pi 3 Model B"; -+ -+ memory { -+ reg = <0 0x40000000>; -+ }; -+ -+ leds { -+ act { -+ gpios = <&gpio 47 0>; -+ }; -+ }; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; -+ -+/* SDHCI is used to control the SDIO for wireless */ -+&sdhci { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_gpio34>; -+ status = "okay"; -+ bus-width = <4>; -+ non-removable; -+}; -+ -+/* SDHOST is used to drive the SD card */ -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_gpio48>; -+ status = "okay"; -+ bus-width = <4>; -+}; -diff --git a/arch/arm/boot/dts/bcm2837.dtsi b/arch/arm/boot/dts/bcm2837.dtsi -new file mode 100644 -index 0000000..2d5de6f0 ---- /dev/null -+++ b/arch/arm/boot/dts/bcm2837.dtsi -@@ -0,0 +1,86 @@ -+#include "bcm283x.dtsi" -+ -+/ { -+ compatible = "brcm,bcm2837"; -+ -+ soc { -+ ranges = <0x7e000000 0x3f000000 0x1000000>, -+ <0x40000000 0x40000000 0x00001000>; -+ dma-ranges = <0xc0000000 0x00000000 0x3f000000>; -+ -+ local_intc: local_intc { -+ compatible = "brcm,bcm2836-l1-intc"; -+ reg = <0x40000000 0x100>; -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ interrupt-parent = <&local_intc>; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv7-timer"; -+ interrupt-parent = <&local_intc>; -+ interrupts = <0>, // PHYS_SECURE_PPI -+ <1>, // PHYS_NONSECURE_PPI -+ <3>, // VIRT_PPI -+ <2>; // HYP_PPI -+ always-on; -+ }; -+ -+ cpus: cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu0: cpu@0 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53"; -+ reg = <0>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000d8>; -+ }; -+ -+ cpu1: cpu@1 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53"; -+ reg = <1>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000e0>; -+ }; -+ -+ cpu2: cpu@2 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53"; -+ reg = <2>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000e8>; -+ }; -+ -+ cpu3: cpu@3 { -+ device_type = "cpu"; -+ compatible = "arm,cortex-a53"; -+ reg = <3>; -+ enable-method = "spin-table"; -+ cpu-release-addr = <0x0 0x000000f0>; -+ }; -+ }; -+}; -+ -+/* Make the BCM2835-style global interrupt controller be a child of the -+ * CPU-local interrupt controller. -+ */ -+&intc { -+ compatible = "brcm,bcm2836-armctrl-ic"; -+ reg = <0x7e00b200 0x200>; -+ interrupt-parent = <&local_intc>; -+ interrupts = <8>; -+}; -+ -+&cpu_thermal { -+ coefficients = <(-538) 412000>; -+}; -+ -+/* enable thermal sensor with the correct compatible property set */ -+&thermal { -+ compatible = "brcm,bcm2837-thermal"; -+ status = "okay"; -+}; -diff --git a/arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi b/arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi -deleted file mode 120000 -index 3937b77..0000000 ---- a/arch/arm64/boot/dts/broadcom/bcm2835-rpi.dtsi -+++ /dev/null -@@ -1 +0,0 @@ --../../../../arm/boot/dts/bcm2835-rpi.dtsi -\ No newline at end of file -diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -index 972f14d..699d340 100644 ---- a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -@@ -1,41 +1 @@ --/dts-v1/; --#include "bcm2837.dtsi" --#include "bcm2835-rpi.dtsi" --#include "bcm283x-rpi-smsc9514.dtsi" --#include "bcm283x-rpi-usb-host.dtsi" -- --/ { -- compatible = "raspberrypi,3-model-b", "brcm,bcm2837"; -- model = "Raspberry Pi 3 Model B"; -- -- memory { -- reg = <0 0x40000000>; -- }; -- -- leds { -- act { -- gpios = <&gpio 47 0>; -- }; -- }; --}; -- --&uart1 { -- status = "okay"; --}; -- --/* SDHCI is used to control the SDIO for wireless */ --&sdhci { -- pinctrl-names = "default"; -- pinctrl-0 = <&emmc_gpio34>; -- status = "okay"; -- bus-width = <4>; -- non-removable; --}; -- --/* SDHOST is used to drive the SD card */ --&sdhost { -- pinctrl-names = "default"; -- pinctrl-0 = <&sdhost_gpio48>; -- status = "okay"; -- bus-width = <4>; --}; -+#include "arm/bcm2837-rpi-3-b.dts" -diff --git a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi b/arch/arm64/boot/dts/broadcom/bcm2837.dtsi -deleted file mode 100644 -index 2d5de6f0..0000000 ---- a/arch/arm64/boot/dts/broadcom/bcm2837.dtsi -+++ /dev/null -@@ -1,86 +0,0 @@ --#include "bcm283x.dtsi" -- --/ { -- compatible = "brcm,bcm2837"; -- -- soc { -- ranges = <0x7e000000 0x3f000000 0x1000000>, -- <0x40000000 0x40000000 0x00001000>; -- dma-ranges = <0xc0000000 0x00000000 0x3f000000>; -- -- local_intc: local_intc { -- compatible = "brcm,bcm2836-l1-intc"; -- reg = <0x40000000 0x100>; -- interrupt-controller; -- #interrupt-cells = <1>; -- interrupt-parent = <&local_intc>; -- }; -- }; -- -- timer { -- compatible = "arm,armv7-timer"; -- interrupt-parent = <&local_intc>; -- interrupts = <0>, // PHYS_SECURE_PPI -- <1>, // PHYS_NONSECURE_PPI -- <3>, // VIRT_PPI -- <2>; // HYP_PPI -- always-on; -- }; -- -- cpus: cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- -- cpu0: cpu@0 { -- device_type = "cpu"; -- compatible = "arm,cortex-a53"; -- reg = <0>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000d8>; -- }; -- -- cpu1: cpu@1 { -- device_type = "cpu"; -- compatible = "arm,cortex-a53"; -- reg = <1>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000e0>; -- }; -- -- cpu2: cpu@2 { -- device_type = "cpu"; -- compatible = "arm,cortex-a53"; -- reg = <2>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000e8>; -- }; -- -- cpu3: cpu@3 { -- device_type = "cpu"; -- compatible = "arm,cortex-a53"; -- reg = <3>; -- enable-method = "spin-table"; -- cpu-release-addr = <0x0 0x000000f0>; -- }; -- }; --}; -- --/* Make the BCM2835-style global interrupt controller be a child of the -- * CPU-local interrupt controller. -- */ --&intc { -- compatible = "brcm,bcm2836-armctrl-ic"; -- reg = <0x7e00b200 0x200>; -- interrupt-parent = <&local_intc>; -- interrupts = <8>; --}; -- --&cpu_thermal { -- coefficients = <(-538) 412000>; --}; -- --/* enable thermal sensor with the correct compatible property set */ --&thermal { -- compatible = "brcm,bcm2837-thermal"; -- status = "okay"; --}; -diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi -deleted file mode 120000 -index dca7c05..0000000 ---- a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-smsc9514.dtsi -+++ /dev/null -@@ -1 +0,0 @@ --../../../../arm/boot/dts/bcm283x-rpi-smsc9514.dtsi -\ No newline at end of file -diff --git a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi -deleted file mode 120000 -index cbeebe3..0000000 ---- a/arch/arm64/boot/dts/broadcom/bcm283x-rpi-usb-host.dtsi -+++ /dev/null -@@ -1 +0,0 @@ --../../../../arm/boot/dts/bcm283x-rpi-usb-host.dtsi -\ No newline at end of file -diff --git a/arch/arm64/boot/dts/broadcom/bcm283x.dtsi b/arch/arm64/boot/dts/broadcom/bcm283x.dtsi -deleted file mode 120000 -index 5f54e4c..0000000 ---- a/arch/arm64/boot/dts/broadcom/bcm283x.dtsi -+++ /dev/null -@@ -1 +0,0 @@ --../../../../arm/boot/dts/bcm283x.dtsi -\ No newline at end of file --- -cgit v1.1 - -From 4188ea2aeb6dd8f99ab77662f463e41bc464a704 Mon Sep 17 00:00:00 2001 -From: Stefan Wahren -Date: Sun, 30 Jul 2017 19:10:32 +0200 -Subject: ARM: bcm283x: Define UART pinmuxing on board level - -Until RPI 3 and Zero W the pl011 (uart0) was always on pin 14/15. So in -order to take care of them and other boards in the future, -we need to define UART pinmuxing on board level. - -This work based on Eric Anholt's patch "ARM: bcm2385: Don't force pl011 -onto pins 14/15." and Fabian Vogt's patch "ARM64: dts: bcm2837: assign -uart0 to BT and uart1 to pin headers". - -Signed-off-by: Stefan Wahren -Reviewed-by: Eric Anholt -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi-a.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi-b.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi-zero.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- - arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 6 ++++++ - arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 10 ++++++++++ - 9 files changed, 53 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -index d070454..9f86649 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -@@ -99,3 +99,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts -index 46d078e..4b1af06 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-a.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts -@@ -94,3 +94,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -index 432088e..a846f1e 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -@@ -101,3 +101,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -index 4133bc2..e860964 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -@@ -94,3 +94,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts -index 4d56fe3..5d77f3f 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-b.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts -@@ -89,3 +89,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts -index 79a20d5..7036240 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts -@@ -103,3 +103,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index e55b362..e36c392 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -39,7 +39,7 @@ - }; - - alt0: alt0 { -- brcm,pins = <4 5 7 8 9 10 11 14 15>; -+ brcm,pins = <4 5 7 8 9 10 11>; - brcm,function = ; - }; - }; -diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -index bf19e8c..e8de414 100644 ---- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -@@ -39,3 +39,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -index 972f14d..20725ca 100644 ---- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts -@@ -19,7 +19,17 @@ - }; - }; - -+/* uart0 communicates with the BT module */ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>; -+ status = "okay"; -+}; -+ -+/* uart1 is mapped to the pin header */ - &uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_gpio14>; - status = "okay"; - }; - --- -cgit v1.1 - diff --git a/bcm2837-sdhost-fixes.patch b/bcm2837-sdhost-fixes.patch deleted file mode 100644 index 9b81005..0000000 --- a/bcm2837-sdhost-fixes.patch +++ /dev/null @@ -1,83 +0,0 @@ -From e199a012a0fb0be11ccd26b4a502ae830eb10db0 Mon Sep 17 00:00:00 2001 -From: Gerd Hoffmann -Date: Tue, 21 Jun 2016 11:47:56 +0200 -Subject: arm64: dts: bcm2837: add &sdhci and &sdhost - -For the raspberry pi 3 we'll need both sdhci (handles sdio wifi) and -sdhost (handles sdcard). - -Signed-off-by: Gerd Hoffmann -Acked-by: Eric Anholt ---- - arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - -diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -index c309633..972f14d 100644 ---- a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -@@ -22,3 +22,20 @@ - &uart1 { - status = "okay"; - }; -+ -+/* SDHCI is used to control the SDIO for wireless */ -+&sdhci { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&emmc_gpio34>; -+ status = "okay"; -+ bus-width = <4>; -+ non-removable; -+}; -+ -+/* SDHOST is used to drive the SD card */ -+&sdhost { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdhost_gpio48>; -+ status = "okay"; -+ bus-width = <4>; -+}; --- -cgit v0.12 - -From 0c1759bc4fc8884d790d4ab99b5276132559b5a1 Mon Sep 17 00:00:00 2001 -From: Gerd Hoffmann -Date: Tue, 21 Jun 2016 10:00:58 +0200 -Subject: arm: dts: bcm283x: switch from &sdhci to &sdhost - -sdcard access with the sdhost controller is faster. - -Read access (dd with 64k blocks on rpi2): - CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s - CONFIG_MMC_BCM2835: 19-20 MB/s - -Differences on write access are pretty much in the noise. - -Signed-off-by: Gerd Hoffmann -Acked-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index 8b95832..e36c392 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -65,13 +65,13 @@ - &sdhci { - pinctrl-names = "default"; - pinctrl-0 = <&emmc_gpio48>; -- status = "okay"; - bus-width = <4>; - }; - - &sdhost { - pinctrl-names = "default"; - pinctrl-0 = <&sdhost_gpio48>; -+ status = "okay"; - bus-width = <4>; - }; - --- -cgit v0.12 - diff --git a/bcm283x-Define-UART-pinmuxing-on-board-level.patch b/bcm283x-Define-UART-pinmuxing-on-board-level.patch deleted file mode 100644 index 26efe90..0000000 --- a/bcm283x-Define-UART-pinmuxing-on-board-level.patch +++ /dev/null @@ -1,171 +0,0 @@ -From patchwork Thu Jul 20 19:37:07 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [1/3] ARM: bcm283x: Define UART pinmuxing on board level -From: Stefan Wahren -X-Patchwork-Id: 9855625 -Message-Id: <1500579429-9101-2-git-send-email-stefan.wahren@i2se.com> -To: Eric Anholt , Rob Herring , - Mark Rutland -Cc: Stefan Wahren , devicetree@vger.kernel.org, - Florian Fainelli , - Scott Branden , - linux-rpi-kernel@lists.infradead.org, - linux-arm-kernel@lists.infradead.org, Gerd Hoffmann -Date: Thu, 20 Jul 2017 21:37:07 +0200 - -Until RPI 3 and Zero W the pl011 (uart0) was always on pin 14/15. So in -order to take care of them and other boards in the future, -we need to define UART pinmuxing on board level. - -This work based on Eric Anholt's patch "ARM: bcm2385: Don't force pl011 -onto pins 14/15." and Fabian Vogt's patch "ARM64: dts: bcm2837: assign -uart0 to BT and uart1 to pin headers". - -Signed-off-by: Stefan Wahren ---- - arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi-a.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi-b.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi-zero.dts | 6 ++++++ - arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- - arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 6 ++++++ - arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts | 10 ++++++++++ - 9 files changed, 53 insertions(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -index d070454..9f86649 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts -@@ -99,3 +99,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-a.dts b/arch/arm/boot/dts/bcm2835-rpi-a.dts -index 46d078e..4b1af06 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-a.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts -@@ -94,3 +94,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -index 432088e..a846f1e 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts -@@ -101,3 +101,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -index 4133bc2..e860964 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts -@@ -94,3 +94,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-b.dts b/arch/arm/boot/dts/bcm2835-rpi-b.dts -index 4d56fe3..5d77f3f 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-b.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts -@@ -89,3 +89,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi-zero.dts b/arch/arm/boot/dts/bcm2835-rpi-zero.dts -index 79a20d5..7036240 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts -+++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts -@@ -103,3 +103,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index e55b362..e36c392 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -39,7 +39,7 @@ - }; - - alt0: alt0 { -- brcm,pins = <4 5 7 8 9 10 11 14 15>; -+ brcm,pins = <4 5 7 8 9 10 11>; - brcm,function = ; - }; - }; -diff --git a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -index bf19e8c..e8de414 100644 ---- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts -@@ -39,3 +39,9 @@ - &hdmi { - hpd-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; - }; -+ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_gpio14>; -+ status = "okay"; -+}; -diff --git a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -index 972f14d..20725ca 100644 ---- a/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -+++ b/arch/arm64/boot/dts/broadcom/bcm2837-rpi-3-b.dts -@@ -19,7 +19,17 @@ - }; - }; - -+/* uart0 communicates with the BT module */ -+&uart0 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart0_ctsrts_gpio30 &gpclk2_gpio43>; -+ status = "okay"; -+}; -+ -+/* uart1 is mapped to the pin header */ - &uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&uart1_gpio14>; - status = "okay"; - }; - diff --git a/bcm283x-drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch b/bcm283x-drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch deleted file mode 100644 index 70a5282..0000000 --- a/bcm283x-drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch +++ /dev/null @@ -1,42 +0,0 @@ -From patchwork Thu Feb 9 18:16:00 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: drm/vc4: Fix OOPSes from trying to cache a partially constructed BO. -From: Eric Anholt -X-Patchwork-Id: 138087 -Message-Id: <20170209181600.24048-1-eric@anholt.net> -To: dri-devel@lists.freedesktop.org -Cc: linux-kernel@vger.kernel.org, pbrobinson@gmail.com -Date: Thu, 9 Feb 2017 10:16:00 -0800 - -If a CMA allocation failed, the partially constructed BO would be -unreferenced through the normal path, and we might choose to put it in -the BO cache. If we then reused it before it expired from the cache, -the kernel would OOPS. - -Signed-off-by: Eric Anholt -Fixes: c826a6e10644 ("drm/vc4: Add a BO cache.") ---- - drivers/gpu/drm/vc4/vc4_bo.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c -index 5ec14f25625d..fd83a2807656 100644 ---- a/drivers/gpu/drm/vc4/vc4_bo.c -+++ b/drivers/gpu/drm/vc4/vc4_bo.c -@@ -314,6 +314,14 @@ void vc4_free_object(struct drm_gem_object *gem_bo) - goto out; - } - -+ /* If this object was partially constructed but CMA allocation -+ * had failed, just free it. -+ */ -+ if (!bo->base.vaddr) { -+ vc4_bo_destroy(bo); -+ goto out; -+ } -+ - cache_list = vc4_get_cache_list_for_size(dev, gem_bo->size); - if (!cache_list) { - vc4_bo_destroy(bo); diff --git a/bcm283x-flip-sdcontroller.patch b/bcm283x-flip-sdcontroller.patch deleted file mode 100644 index 44b5eb1..0000000 --- a/bcm283x-flip-sdcontroller.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 0c1759bc4fc8884d790d4ab99b5276132559b5a1 Mon Sep 17 00:00:00 2001 -From: Gerd Hoffmann -Date: Tue, 21 Jun 2016 10:00:58 +0200 -Subject: arm: dts: bcm283x: switch from &sdhci to &sdhost - -sdcard access with the sdhost controller is faster. - -Read access (dd with 64k blocks on rpi2): - CONFIG_MMC_SDHCI_IPROC: 11-12 MB/s - CONFIG_MMC_BCM2835: 19-20 MB/s - -Differences on write access are pretty much in the noise. - -Signed-off-by: Gerd Hoffmann -Acked-by: Eric Anholt ---- - arch/arm/boot/dts/bcm2835-rpi.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/bcm2835-rpi.dtsi b/arch/arm/boot/dts/bcm2835-rpi.dtsi -index 8b95832..e36c392 100644 ---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi -+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi -@@ -65,13 +65,13 @@ - &sdhci { - pinctrl-names = "default"; - pinctrl-0 = <&emmc_gpio48>; -- status = "okay"; - bus-width = <4>; - }; - - &sdhost { - pinctrl-names = "default"; - pinctrl-0 = <&sdhost_gpio48>; -+ status = "okay"; - bus-width = <4>; - }; - --- -cgit v0.12 - diff --git a/bcm283x-vc4-fix-vblank.patch b/bcm283x-vc4-fix-vblank.patch deleted file mode 100644 index ce4f8b1..0000000 --- a/bcm283x-vc4-fix-vblank.patch +++ /dev/null @@ -1,123 +0,0 @@ -From d40a5938a10a3ba73bce6395729fefd8b8bb1c07 Mon Sep 17 00:00:00 2001 -From: Peter Robinson -Date: Thu, 29 Jun 2017 10:05:05 +0100 -Subject: [PATCH] drm/vc4: Fix VBLANK handling in crtc->enable() path - -When we are enabling a CRTC, drm_crtc_vblank_get() is called before -drm_crtc_vblank_on(), which is not supposed to happen (hence the -WARN_ON() in the code). To solve the problem, we delay the 'update -display list' operation after the CRTC is actually enabled. - -Signed-off-by: Boris Brezillon ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 66 +++++++++++++++++++++++++++--------------- - 1 file changed, 43 insertions(+), 23 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index d86c8cce3182..316bd6210d69 100644 ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -530,6 +530,34 @@ static void vc4_crtc_disable(struct drm_crtc *crtc) - SCALER_DISPSTATX_EMPTY); - } - -+static void vc4_crtc_update_dlist(struct drm_crtc *crtc) -+{ -+ struct drm_device *dev = crtc->dev; -+ struct vc4_dev *vc4 = to_vc4_dev(dev); -+ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); -+ struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); -+ -+ if (crtc->state->event) { -+ unsigned long flags; -+ -+ crtc->state->event->pipe = drm_crtc_index(crtc); -+ -+ WARN_ON(drm_crtc_vblank_get(crtc) != 0); -+ -+ spin_lock_irqsave(&dev->event_lock, flags); -+ vc4_crtc->event = crtc->state->event; -+ crtc->state->event = NULL; -+ -+ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), -+ vc4_state->mm.start); -+ -+ spin_unlock_irqrestore(&dev->event_lock, flags); -+ } else { -+ HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), -+ vc4_state->mm.start); -+ } -+} -+ - static void vc4_crtc_enable(struct drm_crtc *crtc) - { - struct drm_device *dev = crtc->dev; -@@ -540,6 +568,12 @@ static void vc4_crtc_enable(struct drm_crtc *crtc) - - require_hvs_enabled(dev); - -+ /* Enable vblank irq handling before crtc is started otherwise -+ * drm_crtc_get_vblank() fails in vc4_crtc_update_dlist(). -+ */ -+ drm_crtc_vblank_on(crtc); -+ vc4_crtc_update_dlist(crtc); -+ - /* Turn on the scaler, which will wait for vstart to start - * compositing. - */ -@@ -551,9 +585,6 @@ static void vc4_crtc_enable(struct drm_crtc *crtc) - /* Turn on the pixel valve, which will emit the vstart signal. */ - CRTC_WRITE(PV_V_CONTROL, - CRTC_READ(PV_V_CONTROL) | PV_VCONTROL_VIDEN); -- -- /* Enable vblank irq handling after crtc is started. */ -- drm_crtc_vblank_on(crtc); - } - - static bool vc4_crtc_mode_fixup(struct drm_crtc *crtc, -@@ -608,7 +639,6 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, - { - struct drm_device *dev = crtc->dev; - struct vc4_dev *vc4 = to_vc4_dev(dev); -- struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc); - struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state); - struct drm_plane *plane; - bool debug_dump_regs = false; -@@ -630,25 +660,15 @@ static void vc4_crtc_atomic_flush(struct drm_crtc *crtc, - - WARN_ON_ONCE(dlist_next - dlist_start != vc4_state->mm.size); - -- if (crtc->state->event) { -- unsigned long flags; -- -- crtc->state->event->pipe = drm_crtc_index(crtc); -- -- WARN_ON(drm_crtc_vblank_get(crtc) != 0); -- -- spin_lock_irqsave(&dev->event_lock, flags); -- vc4_crtc->event = crtc->state->event; -- crtc->state->event = NULL; -- -- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), -- vc4_state->mm.start); -- -- spin_unlock_irqrestore(&dev->event_lock, flags); -- } else { -- HVS_WRITE(SCALER_DISPLISTX(vc4_crtc->channel), -- vc4_state->mm.start); -- } -+ /* Only update DISPLIST if the CRTC was already running and is not -+ * being disabled. -+ * vc4_crtc_enable() takes care of updating the dlist just after -+ * re-enabling VBLANK interrupts and before enabling the engine. -+ * If the CRTC is being disabled, there's no point in updating this -+ * information. -+ */ -+ if (crtc->state->active && old_state->active) -+ vc4_crtc_update_dlist(crtc); - - if (debug_dump_regs) { - DRM_INFO("CRTC %d HVS after:\n", drm_crtc_index(crtc)); --- -2.13.0 - diff --git a/bcm283x-vc4-fixes.patch b/bcm283x-vc4-fixes.patch deleted file mode 100644 index d17ff18..0000000 --- a/bcm283x-vc4-fixes.patch +++ /dev/null @@ -1,1803 +0,0 @@ -From d74617cb4aebe5a4cb3eeda3070053ccfc36a0ae Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Tue, 25 Jul 2017 09:27:32 -0700 -Subject: [PATCH 1/6] drm/vc4: Demote user-accessible DRM_ERROR paths to - DRM_DEBUG. - -Userspace shouldn't be able to spam dmesg by passing bad arguments. -This has particularly become an issues since we started using a bad -argument to set_tiling to detect if set_tiling was supported. - -Signed-off-by: Eric Anholt -Fixes: 83753117f1de ("drm/vc4: Add get/set tiling ioctls.") -Link: https://patchwork.freedesktop.org/patch/msgid/20170725162733.28007-1-eric@anholt.net -Reviewed-by: Boris Brezillon ---- - drivers/gpu/drm/vc4/vc4_bo.c | 14 +++--- - drivers/gpu/drm/vc4/vc4_gem.c | 10 ++-- - drivers/gpu/drm/vc4/vc4_kms.c | 2 +- - drivers/gpu/drm/vc4/vc4_render_cl.c | 40 +++++++-------- - drivers/gpu/drm/vc4/vc4_validate.c | 78 +++++++++++++++--------------- - drivers/gpu/drm/vc4/vc4_validate_shaders.c | 72 +++++++++++++-------------- - 6 files changed, 108 insertions(+), 108 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c -index 487f96412d35..ede80199001d 100644 ---- a/drivers/gpu/drm/vc4/vc4_bo.c -+++ b/drivers/gpu/drm/vc4/vc4_bo.c -@@ -389,7 +389,7 @@ vc4_prime_export(struct drm_device *dev, struct drm_gem_object *obj, int flags) - struct vc4_bo *bo = to_vc4_bo(obj); - - if (bo->validated_shader) { -- DRM_ERROR("Attempting to export shader BO\n"); -+ DRM_DEBUG("Attempting to export shader BO\n"); - return ERR_PTR(-EINVAL); - } - -@@ -410,7 +410,7 @@ int vc4_mmap(struct file *filp, struct vm_area_struct *vma) - bo = to_vc4_bo(gem_obj); - - if (bo->validated_shader && (vma->vm_flags & VM_WRITE)) { -- DRM_ERROR("mmaping of shader BOs for writing not allowed.\n"); -+ DRM_DEBUG("mmaping of shader BOs for writing not allowed.\n"); - return -EINVAL; - } - -@@ -435,7 +435,7 @@ int vc4_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma) - struct vc4_bo *bo = to_vc4_bo(obj); - - if (bo->validated_shader && (vma->vm_flags & VM_WRITE)) { -- DRM_ERROR("mmaping of shader BOs for writing not allowed.\n"); -+ DRM_DEBUG("mmaping of shader BOs for writing not allowed.\n"); - return -EINVAL; - } - -@@ -447,7 +447,7 @@ void *vc4_prime_vmap(struct drm_gem_object *obj) - struct vc4_bo *bo = to_vc4_bo(obj); - - if (bo->validated_shader) { -- DRM_ERROR("mmaping of shader BOs not allowed.\n"); -+ DRM_DEBUG("mmaping of shader BOs not allowed.\n"); - return ERR_PTR(-EINVAL); - } - -@@ -501,7 +501,7 @@ int vc4_mmap_bo_ioctl(struct drm_device *dev, void *data, - - gem_obj = drm_gem_object_lookup(file_priv, args->handle); - if (!gem_obj) { -- DRM_ERROR("Failed to look up GEM BO %d\n", args->handle); -+ DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); - return -EINVAL; - } - -@@ -605,7 +605,7 @@ int vc4_set_tiling_ioctl(struct drm_device *dev, void *data, - - gem_obj = drm_gem_object_lookup(file_priv, args->handle); - if (!gem_obj) { -- DRM_ERROR("Failed to look up GEM BO %d\n", args->handle); -+ DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); - return -ENOENT; - } - bo = to_vc4_bo(gem_obj); -@@ -636,7 +636,7 @@ int vc4_get_tiling_ioctl(struct drm_device *dev, void *data, - - gem_obj = drm_gem_object_lookup(file_priv, args->handle); - if (!gem_obj) { -- DRM_ERROR("Failed to look up GEM BO %d\n", args->handle); -+ DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); - return -ENOENT; - } - bo = to_vc4_bo(gem_obj); -diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c -index d5b821ad06af..a3e45e67f417 100644 ---- a/drivers/gpu/drm/vc4/vc4_gem.c -+++ b/drivers/gpu/drm/vc4/vc4_gem.c -@@ -659,7 +659,7 @@ vc4_cl_lookup_bos(struct drm_device *dev, - /* See comment on bo_index for why we have to check - * this. - */ -- DRM_ERROR("Rendering requires BOs to validate\n"); -+ DRM_DEBUG("Rendering requires BOs to validate\n"); - return -EINVAL; - } - -@@ -691,7 +691,7 @@ vc4_cl_lookup_bos(struct drm_device *dev, - struct drm_gem_object *bo = idr_find(&file_priv->object_idr, - handles[i]); - if (!bo) { -- DRM_ERROR("Failed to look up GEM BO %d: %d\n", -+ DRM_DEBUG("Failed to look up GEM BO %d: %d\n", - i, handles[i]); - ret = -EINVAL; - spin_unlock(&file_priv->table_lock); -@@ -729,7 +729,7 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec) - args->shader_rec_count >= (UINT_MAX / - sizeof(struct vc4_shader_state)) || - temp_size < exec_size) { -- DRM_ERROR("overflow in exec arguments\n"); -+ DRM_DEBUG("overflow in exec arguments\n"); - ret = -EINVAL; - goto fail; - } -@@ -974,7 +974,7 @@ vc4_wait_bo_ioctl(struct drm_device *dev, void *data, - - gem_obj = drm_gem_object_lookup(file_priv, args->handle); - if (!gem_obj) { -- DRM_ERROR("Failed to look up GEM BO %d\n", args->handle); -+ DRM_DEBUG("Failed to look up GEM BO %d\n", args->handle); - return -EINVAL; - } - bo = to_vc4_bo(gem_obj); -@@ -1009,7 +1009,7 @@ vc4_submit_cl_ioctl(struct drm_device *dev, void *data, - int ret = 0; - - if ((args->flags & ~VC4_SUBMIT_CL_USE_CLEAR_COLOR) != 0) { -- DRM_ERROR("Unknown flags: 0x%02x\n", args->flags); -+ DRM_DEBUG("Unknown flags: 0x%02x\n", args->flags); - return -EINVAL; - } - -diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c -index bc6ecdc6f104..b2c55eb09ca3 100644 ---- a/drivers/gpu/drm/vc4/vc4_kms.c -+++ b/drivers/gpu/drm/vc4/vc4_kms.c -@@ -204,7 +204,7 @@ static struct drm_framebuffer *vc4_fb_create(struct drm_device *dev, - gem_obj = drm_gem_object_lookup(file_priv, - mode_cmd->handles[0]); - if (!gem_obj) { -- DRM_ERROR("Failed to look up GEM BO %d\n", -+ DRM_DEBUG("Failed to look up GEM BO %d\n", - mode_cmd->handles[0]); - return ERR_PTR(-ENOENT); - } -diff --git a/drivers/gpu/drm/vc4/vc4_render_cl.c b/drivers/gpu/drm/vc4/vc4_render_cl.c -index 5dc19429d4ae..da3bfd53f0bd 100644 ---- a/drivers/gpu/drm/vc4/vc4_render_cl.c -+++ b/drivers/gpu/drm/vc4/vc4_render_cl.c -@@ -378,14 +378,14 @@ static int vc4_full_res_bounds_check(struct vc4_exec_info *exec, - u32 render_tiles_stride = DIV_ROUND_UP(exec->args->width, 32); - - if (surf->offset > obj->base.size) { -- DRM_ERROR("surface offset %d > BO size %zd\n", -+ DRM_DEBUG("surface offset %d > BO size %zd\n", - surf->offset, obj->base.size); - return -EINVAL; - } - - if ((obj->base.size - surf->offset) / VC4_TILE_BUFFER_SIZE < - render_tiles_stride * args->max_y_tile + args->max_x_tile) { -- DRM_ERROR("MSAA tile %d, %d out of bounds " -+ DRM_DEBUG("MSAA tile %d, %d out of bounds " - "(bo size %zd, offset %d).\n", - args->max_x_tile, args->max_y_tile, - obj->base.size, -@@ -401,7 +401,7 @@ static int vc4_rcl_msaa_surface_setup(struct vc4_exec_info *exec, - struct drm_vc4_submit_rcl_surface *surf) - { - if (surf->flags != 0 || surf->bits != 0) { -- DRM_ERROR("MSAA surface had nonzero flags/bits\n"); -+ DRM_DEBUG("MSAA surface had nonzero flags/bits\n"); - return -EINVAL; - } - -@@ -415,7 +415,7 @@ static int vc4_rcl_msaa_surface_setup(struct vc4_exec_info *exec, - exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj; - - if (surf->offset & 0xf) { -- DRM_ERROR("MSAA write must be 16b aligned.\n"); -+ DRM_DEBUG("MSAA write must be 16b aligned.\n"); - return -EINVAL; - } - -@@ -437,7 +437,7 @@ static int vc4_rcl_surface_setup(struct vc4_exec_info *exec, - int ret; - - if (surf->flags & ~VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES) { -- DRM_ERROR("Extra flags set\n"); -+ DRM_DEBUG("Extra flags set\n"); - return -EINVAL; - } - -@@ -453,12 +453,12 @@ static int vc4_rcl_surface_setup(struct vc4_exec_info *exec, - - if (surf->flags & VC4_SUBMIT_RCL_SURFACE_READ_IS_FULL_RES) { - if (surf == &exec->args->zs_write) { -- DRM_ERROR("general zs write may not be a full-res.\n"); -+ DRM_DEBUG("general zs write may not be a full-res.\n"); - return -EINVAL; - } - - if (surf->bits != 0) { -- DRM_ERROR("load/store general bits set with " -+ DRM_DEBUG("load/store general bits set with " - "full res load/store.\n"); - return -EINVAL; - } -@@ -473,19 +473,19 @@ static int vc4_rcl_surface_setup(struct vc4_exec_info *exec, - if (surf->bits & ~(VC4_LOADSTORE_TILE_BUFFER_TILING_MASK | - VC4_LOADSTORE_TILE_BUFFER_BUFFER_MASK | - VC4_LOADSTORE_TILE_BUFFER_FORMAT_MASK)) { -- DRM_ERROR("Unknown bits in load/store: 0x%04x\n", -+ DRM_DEBUG("Unknown bits in load/store: 0x%04x\n", - surf->bits); - return -EINVAL; - } - - if (tiling > VC4_TILING_FORMAT_LT) { -- DRM_ERROR("Bad tiling format\n"); -+ DRM_DEBUG("Bad tiling format\n"); - return -EINVAL; - } - - if (buffer == VC4_LOADSTORE_TILE_BUFFER_ZS) { - if (format != 0) { -- DRM_ERROR("No color format should be set for ZS\n"); -+ DRM_DEBUG("No color format should be set for ZS\n"); - return -EINVAL; - } - cpp = 4; -@@ -499,16 +499,16 @@ static int vc4_rcl_surface_setup(struct vc4_exec_info *exec, - cpp = 4; - break; - default: -- DRM_ERROR("Bad tile buffer format\n"); -+ DRM_DEBUG("Bad tile buffer format\n"); - return -EINVAL; - } - } else { -- DRM_ERROR("Bad load/store buffer %d.\n", buffer); -+ DRM_DEBUG("Bad load/store buffer %d.\n", buffer); - return -EINVAL; - } - - if (surf->offset & 0xf) { -- DRM_ERROR("load/store buffer must be 16b aligned.\n"); -+ DRM_DEBUG("load/store buffer must be 16b aligned.\n"); - return -EINVAL; - } - -@@ -533,7 +533,7 @@ vc4_rcl_render_config_surface_setup(struct vc4_exec_info *exec, - int cpp; - - if (surf->flags != 0) { -- DRM_ERROR("No flags supported on render config.\n"); -+ DRM_DEBUG("No flags supported on render config.\n"); - return -EINVAL; - } - -@@ -541,7 +541,7 @@ vc4_rcl_render_config_surface_setup(struct vc4_exec_info *exec, - VC4_RENDER_CONFIG_FORMAT_MASK | - VC4_RENDER_CONFIG_MS_MODE_4X | - VC4_RENDER_CONFIG_DECIMATE_MODE_4X)) { -- DRM_ERROR("Unknown bits in render config: 0x%04x\n", -+ DRM_DEBUG("Unknown bits in render config: 0x%04x\n", - surf->bits); - return -EINVAL; - } -@@ -556,7 +556,7 @@ vc4_rcl_render_config_surface_setup(struct vc4_exec_info *exec, - exec->rcl_write_bo[exec->rcl_write_bo_count++] = *obj; - - if (tiling > VC4_TILING_FORMAT_LT) { -- DRM_ERROR("Bad tiling format\n"); -+ DRM_DEBUG("Bad tiling format\n"); - return -EINVAL; - } - -@@ -569,7 +569,7 @@ vc4_rcl_render_config_surface_setup(struct vc4_exec_info *exec, - cpp = 4; - break; - default: -- DRM_ERROR("Bad tile buffer format\n"); -+ DRM_DEBUG("Bad tile buffer format\n"); - return -EINVAL; - } - -@@ -590,7 +590,7 @@ int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec) - - if (args->min_x_tile > args->max_x_tile || - args->min_y_tile > args->max_y_tile) { -- DRM_ERROR("Bad render tile set (%d,%d)-(%d,%d)\n", -+ DRM_DEBUG("Bad render tile set (%d,%d)-(%d,%d)\n", - args->min_x_tile, args->min_y_tile, - args->max_x_tile, args->max_y_tile); - return -EINVAL; -@@ -599,7 +599,7 @@ int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec) - if (has_bin && - (args->max_x_tile > exec->bin_tiles_x || - args->max_y_tile > exec->bin_tiles_y)) { -- DRM_ERROR("Render tiles (%d,%d) outside of bin config " -+ DRM_DEBUG("Render tiles (%d,%d) outside of bin config " - "(%d,%d)\n", - args->max_x_tile, args->max_y_tile, - exec->bin_tiles_x, exec->bin_tiles_y); -@@ -642,7 +642,7 @@ int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec) - */ - if (!setup.color_write && !setup.zs_write && - !setup.msaa_color_write && !setup.msaa_zs_write) { -- DRM_ERROR("RCL requires color or Z/S write\n"); -+ DRM_DEBUG("RCL requires color or Z/S write\n"); - return -EINVAL; - } - -diff --git a/drivers/gpu/drm/vc4/vc4_validate.c b/drivers/gpu/drm/vc4/vc4_validate.c -index 814b512c6b9a..2db485abb186 100644 ---- a/drivers/gpu/drm/vc4/vc4_validate.c -+++ b/drivers/gpu/drm/vc4/vc4_validate.c -@@ -109,7 +109,7 @@ vc4_use_bo(struct vc4_exec_info *exec, uint32_t hindex) - struct vc4_bo *bo; - - if (hindex >= exec->bo_count) { -- DRM_ERROR("BO index %d greater than BO count %d\n", -+ DRM_DEBUG("BO index %d greater than BO count %d\n", - hindex, exec->bo_count); - return NULL; - } -@@ -117,7 +117,7 @@ vc4_use_bo(struct vc4_exec_info *exec, uint32_t hindex) - bo = to_vc4_bo(&obj->base); - - if (bo->validated_shader) { -- DRM_ERROR("Trying to use shader BO as something other than " -+ DRM_DEBUG("Trying to use shader BO as something other than " - "a shader\n"); - return NULL; - } -@@ -172,7 +172,7 @@ vc4_check_tex_size(struct vc4_exec_info *exec, struct drm_gem_cma_object *fbo, - * our math. - */ - if (width > 4096 || height > 4096) { -- DRM_ERROR("Surface dimensions (%d,%d) too large", -+ DRM_DEBUG("Surface dimensions (%d,%d) too large", - width, height); - return false; - } -@@ -191,7 +191,7 @@ vc4_check_tex_size(struct vc4_exec_info *exec, struct drm_gem_cma_object *fbo, - aligned_height = round_up(height, utile_h); - break; - default: -- DRM_ERROR("buffer tiling %d unsupported\n", tiling_format); -+ DRM_DEBUG("buffer tiling %d unsupported\n", tiling_format); - return false; - } - -@@ -200,7 +200,7 @@ vc4_check_tex_size(struct vc4_exec_info *exec, struct drm_gem_cma_object *fbo, - - if (size + offset < size || - size + offset > fbo->base.size) { -- DRM_ERROR("Overflow in %dx%d (%dx%d) fbo size (%d + %d > %zd)\n", -+ DRM_DEBUG("Overflow in %dx%d (%dx%d) fbo size (%d + %d > %zd)\n", - width, height, - aligned_width, aligned_height, - size, offset, fbo->base.size); -@@ -214,7 +214,7 @@ static int - validate_flush(VALIDATE_ARGS) - { - if (!validate_bin_pos(exec, untrusted, exec->args->bin_cl_size - 1)) { -- DRM_ERROR("Bin CL must end with VC4_PACKET_FLUSH\n"); -+ DRM_DEBUG("Bin CL must end with VC4_PACKET_FLUSH\n"); - return -EINVAL; - } - exec->found_flush = true; -@@ -226,13 +226,13 @@ static int - validate_start_tile_binning(VALIDATE_ARGS) - { - if (exec->found_start_tile_binning_packet) { -- DRM_ERROR("Duplicate VC4_PACKET_START_TILE_BINNING\n"); -+ DRM_DEBUG("Duplicate VC4_PACKET_START_TILE_BINNING\n"); - return -EINVAL; - } - exec->found_start_tile_binning_packet = true; - - if (!exec->found_tile_binning_mode_config_packet) { -- DRM_ERROR("missing VC4_PACKET_TILE_BINNING_MODE_CONFIG\n"); -+ DRM_DEBUG("missing VC4_PACKET_TILE_BINNING_MODE_CONFIG\n"); - return -EINVAL; - } - -@@ -243,7 +243,7 @@ static int - validate_increment_semaphore(VALIDATE_ARGS) - { - if (!validate_bin_pos(exec, untrusted, exec->args->bin_cl_size - 2)) { -- DRM_ERROR("Bin CL must end with " -+ DRM_DEBUG("Bin CL must end with " - "VC4_PACKET_INCREMENT_SEMAPHORE\n"); - return -EINVAL; - } -@@ -264,7 +264,7 @@ validate_indexed_prim_list(VALIDATE_ARGS) - - /* Check overflow condition */ - if (exec->shader_state_count == 0) { -- DRM_ERROR("shader state must precede primitives\n"); -+ DRM_DEBUG("shader state must precede primitives\n"); - return -EINVAL; - } - shader_state = &exec->shader_state[exec->shader_state_count - 1]; -@@ -281,7 +281,7 @@ validate_indexed_prim_list(VALIDATE_ARGS) - - if (offset > ib->base.size || - (ib->base.size - offset) / index_size < length) { -- DRM_ERROR("IB access overflow (%d + %d*%d > %zd)\n", -+ DRM_DEBUG("IB access overflow (%d + %d*%d > %zd)\n", - offset, length, index_size, ib->base.size); - return -EINVAL; - } -@@ -301,13 +301,13 @@ validate_gl_array_primitive(VALIDATE_ARGS) - - /* Check overflow condition */ - if (exec->shader_state_count == 0) { -- DRM_ERROR("shader state must precede primitives\n"); -+ DRM_DEBUG("shader state must precede primitives\n"); - return -EINVAL; - } - shader_state = &exec->shader_state[exec->shader_state_count - 1]; - - if (length + base_index < length) { -- DRM_ERROR("primitive vertex count overflow\n"); -+ DRM_DEBUG("primitive vertex count overflow\n"); - return -EINVAL; - } - max_index = length + base_index - 1; -@@ -324,7 +324,7 @@ validate_gl_shader_state(VALIDATE_ARGS) - uint32_t i = exec->shader_state_count++; - - if (i >= exec->shader_state_size) { -- DRM_ERROR("More requests for shader states than declared\n"); -+ DRM_DEBUG("More requests for shader states than declared\n"); - return -EINVAL; - } - -@@ -332,7 +332,7 @@ validate_gl_shader_state(VALIDATE_ARGS) - exec->shader_state[i].max_index = 0; - - if (exec->shader_state[i].addr & ~0xf) { -- DRM_ERROR("high bits set in GL shader rec reference\n"); -+ DRM_DEBUG("high bits set in GL shader rec reference\n"); - return -EINVAL; - } - -@@ -356,7 +356,7 @@ validate_tile_binning_config(VALIDATE_ARGS) - int bin_slot; - - if (exec->found_tile_binning_mode_config_packet) { -- DRM_ERROR("Duplicate VC4_PACKET_TILE_BINNING_MODE_CONFIG\n"); -+ DRM_DEBUG("Duplicate VC4_PACKET_TILE_BINNING_MODE_CONFIG\n"); - return -EINVAL; - } - exec->found_tile_binning_mode_config_packet = true; -@@ -368,14 +368,14 @@ validate_tile_binning_config(VALIDATE_ARGS) - - if (exec->bin_tiles_x == 0 || - exec->bin_tiles_y == 0) { -- DRM_ERROR("Tile binning config of %dx%d too small\n", -+ DRM_DEBUG("Tile binning config of %dx%d too small\n", - exec->bin_tiles_x, exec->bin_tiles_y); - return -EINVAL; - } - - if (flags & (VC4_BIN_CONFIG_DB_NON_MS | - VC4_BIN_CONFIG_TILE_BUFFER_64BIT)) { -- DRM_ERROR("unsupported binning config flags 0x%02x\n", flags); -+ DRM_DEBUG("unsupported binning config flags 0x%02x\n", flags); - return -EINVAL; - } - -@@ -493,20 +493,20 @@ vc4_validate_bin_cl(struct drm_device *dev, - const struct cmd_info *info; - - if (cmd >= ARRAY_SIZE(cmd_info)) { -- DRM_ERROR("0x%08x: packet %d out of bounds\n", -+ DRM_DEBUG("0x%08x: packet %d out of bounds\n", - src_offset, cmd); - return -EINVAL; - } - - info = &cmd_info[cmd]; - if (!info->name) { -- DRM_ERROR("0x%08x: packet %d invalid\n", -+ DRM_DEBUG("0x%08x: packet %d invalid\n", - src_offset, cmd); - return -EINVAL; - } - - if (src_offset + info->len > len) { -- DRM_ERROR("0x%08x: packet %d (%s) length 0x%08x " -+ DRM_DEBUG("0x%08x: packet %d (%s) length 0x%08x " - "exceeds bounds (0x%08x)\n", - src_offset, cmd, info->name, info->len, - src_offset + len); -@@ -519,7 +519,7 @@ vc4_validate_bin_cl(struct drm_device *dev, - if (info->func && info->func(exec, - dst_pkt + 1, - src_pkt + 1)) { -- DRM_ERROR("0x%08x: packet %d (%s) failed to validate\n", -+ DRM_DEBUG("0x%08x: packet %d (%s) failed to validate\n", - src_offset, cmd, info->name); - return -EINVAL; - } -@@ -537,7 +537,7 @@ vc4_validate_bin_cl(struct drm_device *dev, - exec->ct0ea = exec->ct0ca + dst_offset; - - if (!exec->found_start_tile_binning_packet) { -- DRM_ERROR("Bin CL missing VC4_PACKET_START_TILE_BINNING\n"); -+ DRM_DEBUG("Bin CL missing VC4_PACKET_START_TILE_BINNING\n"); - return -EINVAL; - } - -@@ -549,7 +549,7 @@ vc4_validate_bin_cl(struct drm_device *dev, - * semaphore increment. - */ - if (!exec->found_increment_semaphore_packet || !exec->found_flush) { -- DRM_ERROR("Bin CL missing VC4_PACKET_INCREMENT_SEMAPHORE + " -+ DRM_DEBUG("Bin CL missing VC4_PACKET_INCREMENT_SEMAPHORE + " - "VC4_PACKET_FLUSH\n"); - return -EINVAL; - } -@@ -588,11 +588,11 @@ reloc_tex(struct vc4_exec_info *exec, - uint32_t remaining_size = tex->base.size - p0; - - if (p0 > tex->base.size - 4) { -- DRM_ERROR("UBO offset greater than UBO size\n"); -+ DRM_DEBUG("UBO offset greater than UBO size\n"); - goto fail; - } - if (p1 > remaining_size - 4) { -- DRM_ERROR("UBO clamp would allow reads " -+ DRM_DEBUG("UBO clamp would allow reads " - "outside of UBO\n"); - goto fail; - } -@@ -612,14 +612,14 @@ reloc_tex(struct vc4_exec_info *exec, - if (VC4_GET_FIELD(p3, VC4_TEX_P2_PTYPE) == - VC4_TEX_P2_PTYPE_CUBE_MAP_STRIDE) { - if (cube_map_stride) { -- DRM_ERROR("Cube map stride set twice\n"); -+ DRM_DEBUG("Cube map stride set twice\n"); - goto fail; - } - - cube_map_stride = p3 & VC4_TEX_P2_CMST_MASK; - } - if (!cube_map_stride) { -- DRM_ERROR("Cube map stride not set\n"); -+ DRM_DEBUG("Cube map stride not set\n"); - goto fail; - } - } -@@ -660,7 +660,7 @@ reloc_tex(struct vc4_exec_info *exec, - case VC4_TEXTURE_TYPE_RGBA64: - case VC4_TEXTURE_TYPE_YUV422R: - default: -- DRM_ERROR("Texture format %d unsupported\n", type); -+ DRM_DEBUG("Texture format %d unsupported\n", type); - goto fail; - } - utile_w = utile_width(cpp); -@@ -713,7 +713,7 @@ reloc_tex(struct vc4_exec_info *exec, - level_size = aligned_width * cpp * aligned_height; - - if (offset < level_size) { -- DRM_ERROR("Level %d (%dx%d -> %dx%d) size %db " -+ DRM_DEBUG("Level %d (%dx%d -> %dx%d) size %db " - "overflowed buffer bounds (offset %d)\n", - i, level_width, level_height, - aligned_width, aligned_height, -@@ -764,7 +764,7 @@ validate_gl_shader_rec(struct drm_device *dev, - - nr_relocs = ARRAY_SIZE(shader_reloc_offsets) + nr_attributes; - if (nr_relocs * 4 > exec->shader_rec_size) { -- DRM_ERROR("overflowed shader recs reading %d handles " -+ DRM_DEBUG("overflowed shader recs reading %d handles " - "from %d bytes left\n", - nr_relocs, exec->shader_rec_size); - return -EINVAL; -@@ -774,7 +774,7 @@ validate_gl_shader_rec(struct drm_device *dev, - exec->shader_rec_size -= nr_relocs * 4; - - if (packet_size > exec->shader_rec_size) { -- DRM_ERROR("overflowed shader recs copying %db packet " -+ DRM_DEBUG("overflowed shader recs copying %db packet " - "from %d bytes left\n", - packet_size, exec->shader_rec_size); - return -EINVAL; -@@ -794,7 +794,7 @@ validate_gl_shader_rec(struct drm_device *dev, - - for (i = 0; i < shader_reloc_count; i++) { - if (src_handles[i] > exec->bo_count) { -- DRM_ERROR("Shader handle %d too big\n", src_handles[i]); -+ DRM_DEBUG("Shader handle %d too big\n", src_handles[i]); - return -EINVAL; - } - -@@ -810,13 +810,13 @@ validate_gl_shader_rec(struct drm_device *dev, - - if (((*(uint16_t *)pkt_u & VC4_SHADER_FLAG_FS_SINGLE_THREAD) == 0) != - to_vc4_bo(&bo[0]->base)->validated_shader->is_threaded) { -- DRM_ERROR("Thread mode of CL and FS do not match\n"); -+ DRM_DEBUG("Thread mode of CL and FS do not match\n"); - return -EINVAL; - } - - if (to_vc4_bo(&bo[1]->base)->validated_shader->is_threaded || - to_vc4_bo(&bo[2]->base)->validated_shader->is_threaded) { -- DRM_ERROR("cs and vs cannot be threaded\n"); -+ DRM_DEBUG("cs and vs cannot be threaded\n"); - return -EINVAL; - } - -@@ -831,7 +831,7 @@ validate_gl_shader_rec(struct drm_device *dev, - *(uint32_t *)(pkt_v + o) = bo[i]->paddr + src_offset; - - if (src_offset != 0) { -- DRM_ERROR("Shaders must be at offset 0 of " -+ DRM_DEBUG("Shaders must be at offset 0 of " - "the BO.\n"); - return -EINVAL; - } -@@ -842,7 +842,7 @@ validate_gl_shader_rec(struct drm_device *dev, - - if (validated_shader->uniforms_src_size > - exec->uniforms_size) { -- DRM_ERROR("Uniforms src buffer overflow\n"); -+ DRM_DEBUG("Uniforms src buffer overflow\n"); - return -EINVAL; - } - -@@ -900,7 +900,7 @@ validate_gl_shader_rec(struct drm_device *dev, - - if (vbo->base.size < offset || - vbo->base.size - offset < attr_size) { -- DRM_ERROR("BO offset overflow (%d + %d > %zu)\n", -+ DRM_DEBUG("BO offset overflow (%d + %d > %zu)\n", - offset, attr_size, vbo->base.size); - return -EINVAL; - } -@@ -909,7 +909,7 @@ validate_gl_shader_rec(struct drm_device *dev, - max_index = ((vbo->base.size - offset - attr_size) / - stride); - if (state->max_index > max_index) { -- DRM_ERROR("primitives use index %d out of " -+ DRM_DEBUG("primitives use index %d out of " - "supplied %d\n", - state->max_index, max_index); - return -EINVAL; -diff --git a/drivers/gpu/drm/vc4/vc4_validate_shaders.c b/drivers/gpu/drm/vc4/vc4_validate_shaders.c -index 0b2df5c6efb4..d3f15bf60900 100644 ---- a/drivers/gpu/drm/vc4/vc4_validate_shaders.c -+++ b/drivers/gpu/drm/vc4/vc4_validate_shaders.c -@@ -200,7 +200,7 @@ check_tmu_write(struct vc4_validated_shader_info *validated_shader, - uint32_t clamp_reg, clamp_offset; - - if (sig == QPU_SIG_SMALL_IMM) { -- DRM_ERROR("direct TMU read used small immediate\n"); -+ DRM_DEBUG("direct TMU read used small immediate\n"); - return false; - } - -@@ -209,7 +209,7 @@ check_tmu_write(struct vc4_validated_shader_info *validated_shader, - */ - if (is_mul || - QPU_GET_FIELD(inst, QPU_OP_ADD) != QPU_A_ADD) { -- DRM_ERROR("direct TMU load wasn't an add\n"); -+ DRM_DEBUG("direct TMU load wasn't an add\n"); - return false; - } - -@@ -220,13 +220,13 @@ check_tmu_write(struct vc4_validated_shader_info *validated_shader, - */ - clamp_reg = raddr_add_a_to_live_reg_index(inst); - if (clamp_reg == ~0) { -- DRM_ERROR("direct TMU load wasn't clamped\n"); -+ DRM_DEBUG("direct TMU load wasn't clamped\n"); - return false; - } - - clamp_offset = validation_state->live_min_clamp_offsets[clamp_reg]; - if (clamp_offset == ~0) { -- DRM_ERROR("direct TMU load wasn't clamped\n"); -+ DRM_DEBUG("direct TMU load wasn't clamped\n"); - return false; - } - -@@ -238,7 +238,7 @@ check_tmu_write(struct vc4_validated_shader_info *validated_shader, - - if (!(add_b == QPU_MUX_A && raddr_a == QPU_R_UNIF) && - !(add_b == QPU_MUX_B && raddr_b == QPU_R_UNIF)) { -- DRM_ERROR("direct TMU load didn't add to a uniform\n"); -+ DRM_DEBUG("direct TMU load didn't add to a uniform\n"); - return false; - } - -@@ -246,14 +246,14 @@ check_tmu_write(struct vc4_validated_shader_info *validated_shader, - } else { - if (raddr_a == QPU_R_UNIF || (sig != QPU_SIG_SMALL_IMM && - raddr_b == QPU_R_UNIF)) { -- DRM_ERROR("uniform read in the same instruction as " -+ DRM_DEBUG("uniform read in the same instruction as " - "texture setup.\n"); - return false; - } - } - - if (validation_state->tmu_write_count[tmu] >= 4) { -- DRM_ERROR("TMU%d got too many parameters before dispatch\n", -+ DRM_DEBUG("TMU%d got too many parameters before dispatch\n", - tmu); - return false; - } -@@ -265,7 +265,7 @@ check_tmu_write(struct vc4_validated_shader_info *validated_shader, - */ - if (!is_direct) { - if (validation_state->needs_uniform_address_update) { -- DRM_ERROR("Texturing with undefined uniform address\n"); -+ DRM_DEBUG("Texturing with undefined uniform address\n"); - return false; - } - -@@ -336,35 +336,35 @@ validate_uniform_address_write(struct vc4_validated_shader_info *validated_shade - case QPU_SIG_LOAD_TMU1: - break; - default: -- DRM_ERROR("uniforms address change must be " -+ DRM_DEBUG("uniforms address change must be " - "normal math\n"); - return false; - } - - if (is_mul || QPU_GET_FIELD(inst, QPU_OP_ADD) != QPU_A_ADD) { -- DRM_ERROR("Uniform address reset must be an ADD.\n"); -+ DRM_DEBUG("Uniform address reset must be an ADD.\n"); - return false; - } - - if (QPU_GET_FIELD(inst, QPU_COND_ADD) != QPU_COND_ALWAYS) { -- DRM_ERROR("Uniform address reset must be unconditional.\n"); -+ DRM_DEBUG("Uniform address reset must be unconditional.\n"); - return false; - } - - if (QPU_GET_FIELD(inst, QPU_PACK) != QPU_PACK_A_NOP && - !(inst & QPU_PM)) { -- DRM_ERROR("No packing allowed on uniforms reset\n"); -+ DRM_DEBUG("No packing allowed on uniforms reset\n"); - return false; - } - - if (add_lri == -1) { -- DRM_ERROR("First argument of uniform address write must be " -+ DRM_DEBUG("First argument of uniform address write must be " - "an immediate value.\n"); - return false; - } - - if (validation_state->live_immediates[add_lri] != expected_offset) { -- DRM_ERROR("Resetting uniforms with offset %db instead of %db\n", -+ DRM_DEBUG("Resetting uniforms with offset %db instead of %db\n", - validation_state->live_immediates[add_lri], - expected_offset); - return false; -@@ -372,7 +372,7 @@ validate_uniform_address_write(struct vc4_validated_shader_info *validated_shade - - if (!(add_b == QPU_MUX_A && raddr_a == QPU_R_UNIF) && - !(add_b == QPU_MUX_B && raddr_b == QPU_R_UNIF)) { -- DRM_ERROR("Second argument of uniform address write must be " -+ DRM_DEBUG("Second argument of uniform address write must be " - "a uniform.\n"); - return false; - } -@@ -417,7 +417,7 @@ check_reg_write(struct vc4_validated_shader_info *validated_shader, - switch (waddr) { - case QPU_W_UNIFORMS_ADDRESS: - if (is_b) { -- DRM_ERROR("relative uniforms address change " -+ DRM_DEBUG("relative uniforms address change " - "unsupported\n"); - return false; - } -@@ -452,11 +452,11 @@ check_reg_write(struct vc4_validated_shader_info *validated_shader, - /* XXX: I haven't thought about these, so don't support them - * for now. - */ -- DRM_ERROR("Unsupported waddr %d\n", waddr); -+ DRM_DEBUG("Unsupported waddr %d\n", waddr); - return false; - - case QPU_W_VPM_ADDR: -- DRM_ERROR("General VPM DMA unsupported\n"); -+ DRM_DEBUG("General VPM DMA unsupported\n"); - return false; - - case QPU_W_VPM: -@@ -559,7 +559,7 @@ check_instruction_writes(struct vc4_validated_shader_info *validated_shader, - bool ok; - - if (is_tmu_write(waddr_add) && is_tmu_write(waddr_mul)) { -- DRM_ERROR("ADD and MUL both set up textures\n"); -+ DRM_DEBUG("ADD and MUL both set up textures\n"); - return false; - } - -@@ -588,7 +588,7 @@ check_branch(uint64_t inst, - * there's no need for it. - */ - if (waddr_add != QPU_W_NOP || waddr_mul != QPU_W_NOP) { -- DRM_ERROR("branch instruction at %d wrote a register.\n", -+ DRM_DEBUG("branch instruction at %d wrote a register.\n", - validation_state->ip); - return false; - } -@@ -614,7 +614,7 @@ check_instruction_reads(struct vc4_validated_shader_info *validated_shader, - validated_shader->uniforms_size += 4; - - if (validation_state->needs_uniform_address_update) { -- DRM_ERROR("Uniform read with undefined uniform " -+ DRM_DEBUG("Uniform read with undefined uniform " - "address\n"); - return false; - } -@@ -660,19 +660,19 @@ vc4_validate_branches(struct vc4_shader_validation_state *validation_state) - continue; - - if (ip - last_branch < 4) { -- DRM_ERROR("Branch at %d during delay slots\n", ip); -+ DRM_DEBUG("Branch at %d during delay slots\n", ip); - return false; - } - last_branch = ip; - - if (inst & QPU_BRANCH_REG) { -- DRM_ERROR("branching from register relative " -+ DRM_DEBUG("branching from register relative " - "not supported\n"); - return false; - } - - if (!(inst & QPU_BRANCH_REL)) { -- DRM_ERROR("relative branching required\n"); -+ DRM_DEBUG("relative branching required\n"); - return false; - } - -@@ -682,13 +682,13 @@ vc4_validate_branches(struct vc4_shader_validation_state *validation_state) - * end of the shader object. - */ - if (branch_imm % sizeof(inst) != 0) { -- DRM_ERROR("branch target not aligned\n"); -+ DRM_DEBUG("branch target not aligned\n"); - return false; - } - - branch_target_ip = after_delay_ip + (branch_imm >> 3); - if (branch_target_ip >= validation_state->max_ip) { -- DRM_ERROR("Branch at %d outside of shader (ip %d/%d)\n", -+ DRM_DEBUG("Branch at %d outside of shader (ip %d/%d)\n", - ip, branch_target_ip, - validation_state->max_ip); - return false; -@@ -699,7 +699,7 @@ vc4_validate_branches(struct vc4_shader_validation_state *validation_state) - * the shader. - */ - if (after_delay_ip >= validation_state->max_ip) { -- DRM_ERROR("Branch at %d continues past shader end " -+ DRM_DEBUG("Branch at %d continues past shader end " - "(%d/%d)\n", - ip, after_delay_ip, validation_state->max_ip); - return false; -@@ -709,7 +709,7 @@ vc4_validate_branches(struct vc4_shader_validation_state *validation_state) - } - - if (max_branch_target > validation_state->max_ip - 3) { -- DRM_ERROR("Branch landed after QPU_SIG_PROG_END"); -+ DRM_DEBUG("Branch landed after QPU_SIG_PROG_END"); - return false; - } - -@@ -750,7 +750,7 @@ vc4_handle_branch_target(struct vc4_shader_validation_state *validation_state) - return true; - - if (texturing_in_progress(validation_state)) { -- DRM_ERROR("Branch target landed during TMU setup\n"); -+ DRM_DEBUG("Branch target landed during TMU setup\n"); - return false; - } - -@@ -837,7 +837,7 @@ vc4_validate_shader(struct drm_gem_cma_object *shader_obj) - case QPU_SIG_LAST_THREAD_SWITCH: - if (!check_instruction_writes(validated_shader, - &validation_state)) { -- DRM_ERROR("Bad write at ip %d\n", ip); -+ DRM_DEBUG("Bad write at ip %d\n", ip); - goto fail; - } - -@@ -855,7 +855,7 @@ vc4_validate_shader(struct drm_gem_cma_object *shader_obj) - validated_shader->is_threaded = true; - - if (ip < last_thread_switch_ip + 3) { -- DRM_ERROR("Thread switch too soon after " -+ DRM_DEBUG("Thread switch too soon after " - "last switch at ip %d\n", ip); - goto fail; - } -@@ -867,7 +867,7 @@ vc4_validate_shader(struct drm_gem_cma_object *shader_obj) - case QPU_SIG_LOAD_IMM: - if (!check_instruction_writes(validated_shader, - &validation_state)) { -- DRM_ERROR("Bad LOAD_IMM write at ip %d\n", ip); -+ DRM_DEBUG("Bad LOAD_IMM write at ip %d\n", ip); - goto fail; - } - break; -@@ -878,14 +878,14 @@ vc4_validate_shader(struct drm_gem_cma_object *shader_obj) - goto fail; - - if (ip < last_thread_switch_ip + 3) { -- DRM_ERROR("Branch in thread switch at ip %d", -+ DRM_DEBUG("Branch in thread switch at ip %d", - ip); - goto fail; - } - - break; - default: -- DRM_ERROR("Unsupported QPU signal %d at " -+ DRM_DEBUG("Unsupported QPU signal %d at " - "instruction %d\n", sig, ip); - goto fail; - } -@@ -898,7 +898,7 @@ vc4_validate_shader(struct drm_gem_cma_object *shader_obj) - } - - if (ip == validation_state.max_ip) { -- DRM_ERROR("shader failed to terminate before " -+ DRM_DEBUG("shader failed to terminate before " - "shader BO end at %zd\n", - shader_obj->base.size); - goto fail; -@@ -907,7 +907,7 @@ vc4_validate_shader(struct drm_gem_cma_object *shader_obj) - /* Might corrupt other thread */ - if (validated_shader->is_threaded && - validation_state.all_registers_used) { -- DRM_ERROR("Shader uses threading, but uses the upper " -+ DRM_DEBUG("Shader uses threading, but uses the upper " - "half of the registers, too\n"); - goto fail; - } --- -2.13.5 - -From 28b369f5abc790f56e668869d88f261ca7a27c55 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Tue, 8 Aug 2017 13:56:05 -0700 -Subject: [PATCH 2/6] drm/vc4: Fix leak of HDMI EDID - -We don't keep a pointer to it around anywhere, so it's our job to free -it. - -Cc: Stefan Wahren -Link: https://github.com/anholt/linux/issues/101 -Fixes: c8b75bca92cb ("drm/vc4: Add KMS support for Raspberry Pi.") -Signed-off-by: Eric Anholt -Link: https://patchwork.freedesktop.org/patch/msgid/20170808205605.4432-1-eric@anholt.net -Reviewed-by: Daniel Vetter -Tested-by: Stefan Wahren ---- - drivers/gpu/drm/vc4/vc4_hdmi.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c -index ed63d4e85762..f7803fd7f47c 100644 ---- a/drivers/gpu/drm/vc4/vc4_hdmi.c -+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -260,6 +260,7 @@ static int vc4_hdmi_connector_get_modes(struct drm_connector *connector) - drm_mode_connector_update_edid_property(connector, edid); - ret = drm_add_edid_modes(connector, edid); - drm_edid_to_eld(connector, edid); -+ kfree(edid); - - return ret; - } --- -2.13.5 - -From 3b688b6d347f777a8e86165decc33198b063b8c0 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Tue, 25 Jul 2017 11:27:16 -0700 -Subject: [PATCH 3/6] drm/vc4: Start using u64_to_user_ptr. - -Chris Wilson pointed out this little cleanup in a review of new code, -so let's fix up the code I was copying from. - -Signed-off-by: Eric Anholt -Link: https://patchwork.freedesktop.org/patch/msgid/20170725182718.31468-1-eric@anholt.net -Reviewed-by: Daniel Vetter ---- - drivers/gpu/drm/vc4/vc4_gem.c | 11 +++++------ - 1 file changed, 5 insertions(+), 6 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c -index a3e45e67f417..8b551bc630c4 100644 ---- a/drivers/gpu/drm/vc4/vc4_gem.c -+++ b/drivers/gpu/drm/vc4/vc4_gem.c -@@ -119,7 +119,7 @@ vc4_get_hang_state_ioctl(struct drm_device *dev, void *data, - bo_state[i].size = vc4_bo->base.base.size; - } - -- if (copy_to_user((void __user *)(uintptr_t)get_state->bo, -+ if (copy_to_user(u64_to_user_ptr(get_state->bo), - bo_state, - state->bo_count * sizeof(*bo_state))) - ret = -EFAULT; -@@ -678,8 +678,7 @@ vc4_cl_lookup_bos(struct drm_device *dev, - goto fail; - } - -- if (copy_from_user(handles, -- (void __user *)(uintptr_t)args->bo_handles, -+ if (copy_from_user(handles, u64_to_user_ptr(args->bo_handles), - exec->bo_count * sizeof(uint32_t))) { - ret = -EFAULT; - DRM_ERROR("Failed to copy in GEM handles\n"); -@@ -755,21 +754,21 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec) - exec->shader_state_size = args->shader_rec_count; - - if (copy_from_user(bin, -- (void __user *)(uintptr_t)args->bin_cl, -+ u64_to_user_ptr(args->bin_cl), - args->bin_cl_size)) { - ret = -EFAULT; - goto fail; - } - - if (copy_from_user(exec->shader_rec_u, -- (void __user *)(uintptr_t)args->shader_rec, -+ u64_to_user_ptr(args->shader_rec), - args->shader_rec_size)) { - ret = -EFAULT; - goto fail; - } - - if (copy_from_user(exec->uniforms_u, -- (void __user *)(uintptr_t)args->uniforms, -+ u64_to_user_ptr(args->uniforms), - args->uniforms_size)) { - ret = -EFAULT; - goto fail; --- -2.13.5 - -From da81d76bce216c160d2924a52e362b160bbb6ca1 Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Tue, 25 Jul 2017 11:27:17 -0700 -Subject: [PATCH 4/6] drm/vc4: Add an ioctl for labeling GEM BOs for summary - stats - -This has proven immensely useful for debugging memory leaks and -overallocation (which is a rather serious concern on the platform, -given that we typically run at about 256MB of CMA out of up to 1GB -total memory, with framebuffers that are about 8MB ecah). - -The state of the art without this is to dump debug logs from every GL -application, guess as to kernel allocations based on bo_stats, and try -to merge that all together into a global picture of memory allocation -state. With this, you can add a couple of calls to the debug build of -the 3D driver and get a pretty detailed view of GPU memory usage from -/debug/dri/0/bo_stats (or when we debug print to dmesg on allocation -failure). - -The Mesa side currently labels at the gallium resource level (so you -see that a 1920x20 pixmap has been created, presumably for the window -system panel), but we could extend that to be even more useful with -glObjectLabel() names being sent all the way down to the kernel. - -(partial) example of sorted debugfs output with Mesa labeling all -resources: - - kernel BO cache: 16392kb BOs (3) - tiling shadow 1920x1080: 8160kb BOs (1) - resource 1920x1080@32/0: 8160kb BOs (1) -scanout resource 1920x1080@32/0: 8100kb BOs (1) - kernel: 8100kb BOs (1) - -v2: Use strndup_user(), use lockdep assertion instead of just a - comment, fix an array[-1] reference, extend comment about name - freeing. - -Signed-off-by: Eric Anholt -Link: https://patchwork.freedesktop.org/patch/msgid/20170725182718.31468-2-eric@anholt.net -Reviewed-by: Chris Wilson ---- - drivers/gpu/drm/vc4/vc4_bo.c | 258 ++++++++++++++++++++++++++++-------- - drivers/gpu/drm/vc4/vc4_drv.c | 8 +- - drivers/gpu/drm/vc4/vc4_drv.h | 39 +++++- - drivers/gpu/drm/vc4/vc4_gem.c | 2 +- - drivers/gpu/drm/vc4/vc4_render_cl.c | 2 +- - drivers/gpu/drm/vc4/vc4_v3d.c | 3 +- - include/uapi/drm/vc4_drm.h | 11 ++ - 7 files changed, 257 insertions(+), 66 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c -index ede80199001d..27c4a927311f 100644 ---- a/drivers/gpu/drm/vc4/vc4_bo.c -+++ b/drivers/gpu/drm/vc4/vc4_bo.c -@@ -24,21 +24,35 @@ - #include "vc4_drv.h" - #include "uapi/drm/vc4_drm.h" - -+static const char * const bo_type_names[] = { -+ "kernel", -+ "V3D", -+ "V3D shader", -+ "dumb", -+ "binner", -+ "RCL", -+ "BCL", -+ "kernel BO cache", -+}; -+ -+static bool is_user_label(int label) -+{ -+ return label >= VC4_BO_TYPE_COUNT; -+} -+ - static void vc4_bo_stats_dump(struct vc4_dev *vc4) - { -- DRM_INFO("num bos allocated: %d\n", -- vc4->bo_stats.num_allocated); -- DRM_INFO("size bos allocated: %dkb\n", -- vc4->bo_stats.size_allocated / 1024); -- DRM_INFO("num bos used: %d\n", -- vc4->bo_stats.num_allocated - vc4->bo_stats.num_cached); -- DRM_INFO("size bos used: %dkb\n", -- (vc4->bo_stats.size_allocated - -- vc4->bo_stats.size_cached) / 1024); -- DRM_INFO("num bos cached: %d\n", -- vc4->bo_stats.num_cached); -- DRM_INFO("size bos cached: %dkb\n", -- vc4->bo_stats.size_cached / 1024); -+ int i; -+ -+ for (i = 0; i < vc4->num_labels; i++) { -+ if (!vc4->bo_labels[i].num_allocated) -+ continue; -+ -+ DRM_INFO("%30s: %6dkb BOs (%d)\n", -+ vc4->bo_labels[i].name, -+ vc4->bo_labels[i].size_allocated / 1024, -+ vc4->bo_labels[i].num_allocated); -+ } - } - - #ifdef CONFIG_DEBUG_FS -@@ -47,30 +61,103 @@ int vc4_bo_stats_debugfs(struct seq_file *m, void *unused) - struct drm_info_node *node = (struct drm_info_node *)m->private; - struct drm_device *dev = node->minor->dev; - struct vc4_dev *vc4 = to_vc4_dev(dev); -- struct vc4_bo_stats stats; -+ int i; - -- /* Take a snapshot of the current stats with the lock held. */ - mutex_lock(&vc4->bo_lock); -- stats = vc4->bo_stats; -+ for (i = 0; i < vc4->num_labels; i++) { -+ if (!vc4->bo_labels[i].num_allocated) -+ continue; -+ -+ seq_printf(m, "%30s: %6dkb BOs (%d)\n", -+ vc4->bo_labels[i].name, -+ vc4->bo_labels[i].size_allocated / 1024, -+ vc4->bo_labels[i].num_allocated); -+ } - mutex_unlock(&vc4->bo_lock); - -- seq_printf(m, "num bos allocated: %d\n", -- stats.num_allocated); -- seq_printf(m, "size bos allocated: %dkb\n", -- stats.size_allocated / 1024); -- seq_printf(m, "num bos used: %d\n", -- stats.num_allocated - stats.num_cached); -- seq_printf(m, "size bos used: %dkb\n", -- (stats.size_allocated - stats.size_cached) / 1024); -- seq_printf(m, "num bos cached: %d\n", -- stats.num_cached); -- seq_printf(m, "size bos cached: %dkb\n", -- stats.size_cached / 1024); -- - return 0; - } - #endif - -+/* Takes ownership of *name and returns the appropriate slot for it in -+ * the bo_labels[] array, extending it as necessary. -+ * -+ * This is inefficient and could use a hash table instead of walking -+ * an array and strcmp()ing. However, the assumption is that user -+ * labeling will be infrequent (scanout buffers and other long-lived -+ * objects, or debug driver builds), so we can live with it for now. -+ */ -+static int vc4_get_user_label(struct vc4_dev *vc4, const char *name) -+{ -+ int i; -+ int free_slot = -1; -+ -+ for (i = 0; i < vc4->num_labels; i++) { -+ if (!vc4->bo_labels[i].name) { -+ free_slot = i; -+ } else if (strcmp(vc4->bo_labels[i].name, name) == 0) { -+ kfree(name); -+ return i; -+ } -+ } -+ -+ if (free_slot != -1) { -+ WARN_ON(vc4->bo_labels[free_slot].num_allocated != 0); -+ vc4->bo_labels[free_slot].name = name; -+ return free_slot; -+ } else { -+ u32 new_label_count = vc4->num_labels + 1; -+ struct vc4_label *new_labels = -+ krealloc(vc4->bo_labels, -+ new_label_count * sizeof(*new_labels), -+ GFP_KERNEL); -+ -+ if (!new_labels) { -+ kfree(name); -+ return -1; -+ } -+ -+ free_slot = vc4->num_labels; -+ vc4->bo_labels = new_labels; -+ vc4->num_labels = new_label_count; -+ -+ vc4->bo_labels[free_slot].name = name; -+ vc4->bo_labels[free_slot].num_allocated = 0; -+ vc4->bo_labels[free_slot].size_allocated = 0; -+ -+ return free_slot; -+ } -+} -+ -+static void vc4_bo_set_label(struct drm_gem_object *gem_obj, int label) -+{ -+ struct vc4_bo *bo = to_vc4_bo(gem_obj); -+ struct vc4_dev *vc4 = to_vc4_dev(gem_obj->dev); -+ -+ lockdep_assert_held(&vc4->bo_lock); -+ -+ if (label != -1) { -+ vc4->bo_labels[label].num_allocated++; -+ vc4->bo_labels[label].size_allocated += gem_obj->size; -+ } -+ -+ vc4->bo_labels[bo->label].num_allocated--; -+ vc4->bo_labels[bo->label].size_allocated -= gem_obj->size; -+ -+ if (vc4->bo_labels[bo->label].num_allocated == 0 && -+ is_user_label(bo->label)) { -+ /* Free user BO label slots on last unreference. -+ * Slots are just where we track the stats for a given -+ * name, and once a name is unused we can reuse that -+ * slot. -+ */ -+ kfree(vc4->bo_labels[bo->label].name); -+ vc4->bo_labels[bo->label].name = NULL; -+ } -+ -+ bo->label = label; -+} -+ - static uint32_t bo_page_index(size_t size) - { - return (size / PAGE_SIZE) - 1; -@@ -80,7 +167,8 @@ static uint32_t bo_page_index(size_t size) - static void vc4_bo_destroy(struct vc4_bo *bo) - { - struct drm_gem_object *obj = &bo->base.base; -- struct vc4_dev *vc4 = to_vc4_dev(obj->dev); -+ -+ vc4_bo_set_label(obj, -1); - - if (bo->validated_shader) { - kfree(bo->validated_shader->texture_samples); -@@ -88,9 +176,6 @@ static void vc4_bo_destroy(struct vc4_bo *bo) - bo->validated_shader = NULL; - } - -- vc4->bo_stats.num_allocated--; -- vc4->bo_stats.size_allocated -= obj->size; -- - reservation_object_fini(&bo->_resv); - - drm_gem_cma_free_object(obj); -@@ -99,12 +184,6 @@ static void vc4_bo_destroy(struct vc4_bo *bo) - /* Must be called with bo_lock held. */ - static void vc4_bo_remove_from_cache(struct vc4_bo *bo) - { -- struct drm_gem_object *obj = &bo->base.base; -- struct vc4_dev *vc4 = to_vc4_dev(obj->dev); -- -- vc4->bo_stats.num_cached--; -- vc4->bo_stats.size_cached -= obj->size; -- - list_del(&bo->unref_head); - list_del(&bo->size_head); - } -@@ -165,7 +244,8 @@ static void vc4_bo_cache_purge(struct drm_device *dev) - } - - static struct vc4_bo *vc4_bo_get_from_cache(struct drm_device *dev, -- uint32_t size) -+ uint32_t size, -+ enum vc4_kernel_bo_type type) - { - struct vc4_dev *vc4 = to_vc4_dev(dev); - uint32_t page_index = bo_page_index(size); -@@ -186,6 +266,8 @@ static struct vc4_bo *vc4_bo_get_from_cache(struct drm_device *dev, - kref_init(&bo->base.base.refcount); - - out: -+ if (bo) -+ vc4_bo_set_label(&bo->base.base, type); - mutex_unlock(&vc4->bo_lock); - return bo; - } -@@ -208,8 +290,9 @@ struct drm_gem_object *vc4_create_object(struct drm_device *dev, size_t size) - return ERR_PTR(-ENOMEM); - - mutex_lock(&vc4->bo_lock); -- vc4->bo_stats.num_allocated++; -- vc4->bo_stats.size_allocated += size; -+ bo->label = VC4_BO_TYPE_KERNEL; -+ vc4->bo_labels[VC4_BO_TYPE_KERNEL].num_allocated++; -+ vc4->bo_labels[VC4_BO_TYPE_KERNEL].size_allocated += size; - mutex_unlock(&vc4->bo_lock); - bo->resv = &bo->_resv; - reservation_object_init(bo->resv); -@@ -218,7 +301,7 @@ struct drm_gem_object *vc4_create_object(struct drm_device *dev, size_t size) - } - - struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t unaligned_size, -- bool allow_unzeroed) -+ bool allow_unzeroed, enum vc4_kernel_bo_type type) - { - size_t size = roundup(unaligned_size, PAGE_SIZE); - struct vc4_dev *vc4 = to_vc4_dev(dev); -@@ -229,7 +312,7 @@ struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t unaligned_size, - return ERR_PTR(-EINVAL); - - /* First, try to get a vc4_bo from the kernel BO cache. */ -- bo = vc4_bo_get_from_cache(dev, size); -+ bo = vc4_bo_get_from_cache(dev, size, type); - if (bo) { - if (!allow_unzeroed) - memset(bo->base.vaddr, 0, bo->base.base.size); -@@ -251,7 +334,13 @@ struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t unaligned_size, - return ERR_PTR(-ENOMEM); - } - } -- return to_vc4_bo(&cma_obj->base); -+ bo = to_vc4_bo(&cma_obj->base); -+ -+ mutex_lock(&vc4->bo_lock); -+ vc4_bo_set_label(&cma_obj->base, type); -+ mutex_unlock(&vc4->bo_lock); -+ -+ return bo; - } - - int vc4_dumb_create(struct drm_file *file_priv, -@@ -268,7 +357,7 @@ int vc4_dumb_create(struct drm_file *file_priv, - if (args->size < args->pitch * args->height) - args->size = args->pitch * args->height; - -- bo = vc4_bo_create(dev, args->size, false); -+ bo = vc4_bo_create(dev, args->size, false, VC4_BO_TYPE_DUMB); - if (IS_ERR(bo)) - return PTR_ERR(bo); - -@@ -348,8 +437,7 @@ void vc4_free_object(struct drm_gem_object *gem_bo) - list_add(&bo->size_head, cache_list); - list_add(&bo->unref_head, &vc4->bo_cache.time_list); - -- vc4->bo_stats.num_cached++; -- vc4->bo_stats.size_cached += gem_bo->size; -+ vc4_bo_set_label(&bo->base.base, VC4_BO_TYPE_KERNEL_CACHE); - - vc4_bo_cache_free_old(dev); - -@@ -483,7 +571,7 @@ int vc4_create_bo_ioctl(struct drm_device *dev, void *data, - * We can't allocate from the BO cache, because the BOs don't - * get zeroed, and that might leak data between users. - */ -- bo = vc4_bo_create(dev, args->size, false); -+ bo = vc4_bo_create(dev, args->size, false, VC4_BO_TYPE_V3D); - if (IS_ERR(bo)) - return PTR_ERR(bo); - -@@ -536,7 +624,7 @@ vc4_create_shader_bo_ioctl(struct drm_device *dev, void *data, - return -EINVAL; - } - -- bo = vc4_bo_create(dev, args->size, true); -+ bo = vc4_bo_create(dev, args->size, true, VC4_BO_TYPE_V3D_SHADER); - if (IS_ERR(bo)) - return PTR_ERR(bo); - -@@ -651,9 +739,24 @@ int vc4_get_tiling_ioctl(struct drm_device *dev, void *data, - return 0; - } - --void vc4_bo_cache_init(struct drm_device *dev) -+int vc4_bo_cache_init(struct drm_device *dev) - { - struct vc4_dev *vc4 = to_vc4_dev(dev); -+ int i; -+ -+ /* Create the initial set of BO labels that the kernel will -+ * use. This lets us avoid a bunch of string reallocation in -+ * the kernel's draw and BO allocation paths. -+ */ -+ vc4->bo_labels = kcalloc(VC4_BO_TYPE_COUNT, sizeof(*vc4->bo_labels), -+ GFP_KERNEL); -+ if (!vc4->bo_labels) -+ return -ENOMEM; -+ vc4->num_labels = VC4_BO_TYPE_COUNT; -+ -+ BUILD_BUG_ON(ARRAY_SIZE(bo_type_names) != VC4_BO_TYPE_COUNT); -+ for (i = 0; i < VC4_BO_TYPE_COUNT; i++) -+ vc4->bo_labels[i].name = bo_type_names[i]; - - mutex_init(&vc4->bo_lock); - -@@ -663,19 +766,66 @@ void vc4_bo_cache_init(struct drm_device *dev) - setup_timer(&vc4->bo_cache.time_timer, - vc4_bo_cache_time_timer, - (unsigned long)dev); -+ -+ return 0; - } - - void vc4_bo_cache_destroy(struct drm_device *dev) - { - struct vc4_dev *vc4 = to_vc4_dev(dev); -+ int i; - - del_timer(&vc4->bo_cache.time_timer); - cancel_work_sync(&vc4->bo_cache.time_work); - - vc4_bo_cache_purge(dev); - -- if (vc4->bo_stats.num_allocated) { -- DRM_ERROR("Destroying BO cache while BOs still allocated:\n"); -- vc4_bo_stats_dump(vc4); -+ for (i = 0; i < vc4->num_labels; i++) { -+ if (vc4->bo_labels[i].num_allocated) { -+ DRM_ERROR("Destroying BO cache with %d %s " -+ "BOs still allocated\n", -+ vc4->bo_labels[i].num_allocated, -+ vc4->bo_labels[i].name); -+ } -+ -+ if (is_user_label(i)) -+ kfree(vc4->bo_labels[i].name); - } -+ kfree(vc4->bo_labels); -+} -+ -+int vc4_label_bo_ioctl(struct drm_device *dev, void *data, -+ struct drm_file *file_priv) -+{ -+ struct vc4_dev *vc4 = to_vc4_dev(dev); -+ struct drm_vc4_label_bo *args = data; -+ char *name; -+ struct drm_gem_object *gem_obj; -+ int ret = 0, label; -+ -+ if (!args->len) -+ return -EINVAL; -+ -+ name = strndup_user(u64_to_user_ptr(args->name), args->len + 1); -+ if (IS_ERR(name)) -+ return PTR_ERR(name); -+ -+ gem_obj = drm_gem_object_lookup(file_priv, args->handle); -+ if (!gem_obj) { -+ DRM_ERROR("Failed to look up GEM BO %d\n", args->handle); -+ kfree(name); -+ return -ENOENT; -+ } -+ -+ mutex_lock(&vc4->bo_lock); -+ label = vc4_get_user_label(vc4, name); -+ if (label != -1) -+ vc4_bo_set_label(gem_obj, label); -+ else -+ ret = -ENOMEM; -+ mutex_unlock(&vc4->bo_lock); -+ -+ drm_gem_object_unreference_unlocked(gem_obj); -+ -+ return ret; - } -diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c -index c6b487c3d2b7..75c1f50a7b5d 100644 ---- a/drivers/gpu/drm/vc4/vc4_drv.c -+++ b/drivers/gpu/drm/vc4/vc4_drv.c -@@ -140,6 +140,7 @@ static const struct drm_ioctl_desc vc4_drm_ioctls[] = { - DRM_IOCTL_DEF_DRV(VC4_GET_PARAM, vc4_get_param_ioctl, DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(VC4_SET_TILING, vc4_set_tiling_ioctl, DRM_RENDER_ALLOW), - DRM_IOCTL_DEF_DRV(VC4_GET_TILING, vc4_get_tiling_ioctl, DRM_RENDER_ALLOW), -+ DRM_IOCTL_DEF_DRV(VC4_LABEL_BO, vc4_label_bo_ioctl, DRM_RENDER_ALLOW), - }; - - static struct drm_driver vc4_drm_driver = { -@@ -257,7 +258,9 @@ static int vc4_drm_bind(struct device *dev) - vc4->dev = drm; - drm->dev_private = vc4; - -- vc4_bo_cache_init(drm); -+ ret = vc4_bo_cache_init(drm); -+ if (ret) -+ goto dev_unref; - - drm_mode_config_init(drm); - -@@ -281,8 +284,9 @@ static int vc4_drm_bind(struct device *dev) - component_unbind_all(dev, drm); - gem_destroy: - vc4_gem_destroy(drm); -- drm_dev_unref(drm); - vc4_bo_cache_destroy(drm); -+dev_unref: -+ drm_dev_unref(drm); - return ret; - } - -diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h -index df22698d62ee..75d9957cb76d 100644 ---- a/drivers/gpu/drm/vc4/vc4_drv.h -+++ b/drivers/gpu/drm/vc4/vc4_drv.h -@@ -11,6 +11,24 @@ - #include - #include - -+/* Don't forget to update vc4_bo.c: bo_type_names[] when adding to -+ * this. -+ */ -+enum vc4_kernel_bo_type { -+ /* Any kernel allocation (gem_create_object hook) before it -+ * gets another type set. -+ */ -+ VC4_BO_TYPE_KERNEL, -+ VC4_BO_TYPE_V3D, -+ VC4_BO_TYPE_V3D_SHADER, -+ VC4_BO_TYPE_DUMB, -+ VC4_BO_TYPE_BIN, -+ VC4_BO_TYPE_RCL, -+ VC4_BO_TYPE_BCL, -+ VC4_BO_TYPE_KERNEL_CACHE, -+ VC4_BO_TYPE_COUNT -+}; -+ - struct vc4_dev { - struct drm_device *dev; - -@@ -46,14 +64,14 @@ struct vc4_dev { - struct timer_list time_timer; - } bo_cache; - -- struct vc4_bo_stats { -+ u32 num_labels; -+ struct vc4_label { -+ const char *name; - u32 num_allocated; - u32 size_allocated; -- u32 num_cached; -- u32 size_cached; -- } bo_stats; -+ } *bo_labels; - -- /* Protects bo_cache and the BO stats. */ -+ /* Protects bo_cache and bo_labels. */ - struct mutex bo_lock; - - uint64_t dma_fence_context; -@@ -169,6 +187,11 @@ struct vc4_bo { - /* normally (resv == &_resv) except for imported bo's */ - struct reservation_object *resv; - struct reservation_object _resv; -+ -+ /* One of enum vc4_kernel_bo_type, or VC4_BO_TYPE_COUNT + i -+ * for user-allocated labels. -+ */ -+ int label; - }; - - static inline struct vc4_bo * -@@ -460,7 +483,7 @@ struct vc4_validated_shader_info { - struct drm_gem_object *vc4_create_object(struct drm_device *dev, size_t size); - void vc4_free_object(struct drm_gem_object *gem_obj); - struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t size, -- bool from_cache); -+ bool from_cache, enum vc4_kernel_bo_type type); - int vc4_dumb_create(struct drm_file *file_priv, - struct drm_device *dev, - struct drm_mode_create_dumb *args); -@@ -478,6 +501,8 @@ int vc4_get_tiling_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); - int vc4_get_hang_state_ioctl(struct drm_device *dev, void *data, - struct drm_file *file_priv); -+int vc4_label_bo_ioctl(struct drm_device *dev, void *data, -+ struct drm_file *file_priv); - int vc4_mmap(struct file *filp, struct vm_area_struct *vma); - struct reservation_object *vc4_prime_res_obj(struct drm_gem_object *obj); - int vc4_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma); -@@ -485,7 +510,7 @@ struct drm_gem_object *vc4_prime_import_sg_table(struct drm_device *dev, - struct dma_buf_attachment *attach, - struct sg_table *sgt); - void *vc4_prime_vmap(struct drm_gem_object *obj); --void vc4_bo_cache_init(struct drm_device *dev); -+int vc4_bo_cache_init(struct drm_device *dev); - void vc4_bo_cache_destroy(struct drm_device *dev); - int vc4_bo_stats_debugfs(struct seq_file *m, void *arg); - -diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c -index 8b551bc630c4..80f1953b4938 100644 ---- a/drivers/gpu/drm/vc4/vc4_gem.c -+++ b/drivers/gpu/drm/vc4/vc4_gem.c -@@ -774,7 +774,7 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec) - goto fail; - } - -- bo = vc4_bo_create(dev, exec_size, true); -+ bo = vc4_bo_create(dev, exec_size, true, VC4_BO_TYPE_BCL); - if (IS_ERR(bo)) { - DRM_ERROR("Couldn't allocate BO for binning\n"); - ret = PTR_ERR(bo); -diff --git a/drivers/gpu/drm/vc4/vc4_render_cl.c b/drivers/gpu/drm/vc4/vc4_render_cl.c -index da3bfd53f0bd..e0539731130b 100644 ---- a/drivers/gpu/drm/vc4/vc4_render_cl.c -+++ b/drivers/gpu/drm/vc4/vc4_render_cl.c -@@ -320,7 +320,7 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec, - - size += xtiles * ytiles * loop_body_size; - -- setup->rcl = &vc4_bo_create(dev, size, true)->base; -+ setup->rcl = &vc4_bo_create(dev, size, true, VC4_BO_TYPE_RCL)->base; - if (IS_ERR(setup->rcl)) - return PTR_ERR(setup->rcl); - list_add_tail(&to_vc4_bo(&setup->rcl->base)->unref_head, -diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c -index 8c723da71f66..622cd43840b8 100644 ---- a/drivers/gpu/drm/vc4/vc4_v3d.c -+++ b/drivers/gpu/drm/vc4/vc4_v3d.c -@@ -236,7 +236,8 @@ vc4_allocate_bin_bo(struct drm_device *drm) - INIT_LIST_HEAD(&list); - - while (true) { -- struct vc4_bo *bo = vc4_bo_create(drm, size, true); -+ struct vc4_bo *bo = vc4_bo_create(drm, size, true, -+ VC4_BO_TYPE_BIN); - - if (IS_ERR(bo)) { - ret = PTR_ERR(bo); -diff --git a/include/uapi/drm/vc4_drm.h b/include/uapi/drm/vc4_drm.h -index 6ac4c5c014cb..551628e571f9 100644 ---- a/include/uapi/drm/vc4_drm.h -+++ b/include/uapi/drm/vc4_drm.h -@@ -40,6 +40,7 @@ extern "C" { - #define DRM_VC4_GET_PARAM 0x07 - #define DRM_VC4_SET_TILING 0x08 - #define DRM_VC4_GET_TILING 0x09 -+#define DRM_VC4_LABEL_BO 0x0a - - #define DRM_IOCTL_VC4_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SUBMIT_CL, struct drm_vc4_submit_cl) - #define DRM_IOCTL_VC4_WAIT_SEQNO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_WAIT_SEQNO, struct drm_vc4_wait_seqno) -@@ -51,6 +52,7 @@ extern "C" { - #define DRM_IOCTL_VC4_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_PARAM, struct drm_vc4_get_param) - #define DRM_IOCTL_VC4_SET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_SET_TILING, struct drm_vc4_set_tiling) - #define DRM_IOCTL_VC4_GET_TILING DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_GET_TILING, struct drm_vc4_get_tiling) -+#define DRM_IOCTL_VC4_LABEL_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_VC4_LABEL_BO, struct drm_vc4_label_bo) - - struct drm_vc4_submit_rcl_surface { - __u32 hindex; /* Handle index, or ~0 if not present. */ -@@ -311,6 +313,15 @@ struct drm_vc4_set_tiling { - __u64 modifier; - }; - -+/** -+ * struct drm_vc4_label_bo - Attach a name to a BO for debug purposes. -+ */ -+struct drm_vc4_label_bo { -+ __u32 handle; -+ __u32 len; -+ __u64 name; -+}; -+ - #if defined(__cplusplus) - } - #endif --- -2.13.5 - -From 34cbed8ed9441caa13017108dac189e09c35f9af Mon Sep 17 00:00:00 2001 -From: Eric Anholt -Date: Wed, 2 Aug 2017 13:32:40 -0700 -Subject: [PATCH 5/6] drm/vc4: Fix double destroy of the BO cache on teardown. -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -It's also destroyed from the top level vc4_drv.c initialization, which -is where the cache was actually initialized from. - -This used to just involve duplicate del_timer() and cancel_work_sync() -being called, but it started causing kmalloc issues once we -double-freed the new BO label array. - -Fixes: 1908a876f909 ("drm/vc4: Add an ioctl for labeling GEM BOs for summary stats") -Signed-off-by: Eric Anholt -Link: https://patchwork.freedesktop.org/patch/msgid/20170802203242.12815-1-eric@anholt.net -Tested-by: Noralf Trønnes -Acked-by: Noralf Trønnes -Reviewed-by: Boris Brezillon ---- - drivers/gpu/drm/vc4/vc4_gem.c | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c -index 80f1953b4938..624177b9cce4 100644 ---- a/drivers/gpu/drm/vc4/vc4_gem.c -+++ b/drivers/gpu/drm/vc4/vc4_gem.c -@@ -1117,6 +1117,4 @@ vc4_gem_destroy(struct drm_device *dev) - - if (vc4->hang_state) - vc4_free_hang_state(dev, vc4->hang_state); -- -- vc4_bo_cache_destroy(dev); - } --- -2.13.5 - -From 4f218eea5be54c8506e6db700750e8b8019dc6af Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Fri, 16 Jun 2017 10:30:33 +0200 -Subject: [PATCH 6/6] drm/vc4: Send a VBLANK event when disabling a CRTC - -VBLANK events are missed when the CRTC is being disabled because the -driver does not wait till the end of the frame before stopping the -HVS and PV blocks. In this case, we should explicitly issue a VBLANK -event if there's one waiting. - -Signed-off-by: Boris Brezillon -Reviewed-by: Eric Anholt -Link: http://patchwork.freedesktop.org/patch/msgid/1497601833-24588-1-git-send-email-boris.brezillon@free-electrons.com ---- - drivers/gpu/drm/vc4/vc4_crtc.c | 13 +++++++++++++ - 1 file changed, 13 insertions(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_crtc.c b/drivers/gpu/drm/vc4/vc4_crtc.c -index a12cc7ea99b6..b0582ad3f459 100644 ---- a/drivers/gpu/drm/vc4/vc4_crtc.c -+++ b/drivers/gpu/drm/vc4/vc4_crtc.c -@@ -518,6 +518,19 @@ static void vc4_crtc_disable(struct drm_crtc *crtc) - WARN_ON_ONCE((HVS_READ(SCALER_DISPSTATX(chan)) & - (SCALER_DISPSTATX_FULL | SCALER_DISPSTATX_EMPTY)) != - SCALER_DISPSTATX_EMPTY); -+ -+ /* -+ * Make sure we issue a vblank event after disabling the CRTC if -+ * someone was waiting it. -+ */ -+ if (crtc->state->event) { -+ unsigned long flags; -+ -+ spin_lock_irqsave(&dev->event_lock, flags); -+ drm_crtc_send_vblank_event(crtc, crtc->state->event); -+ crtc->state->event = NULL; -+ spin_unlock_irqrestore(&dev->event_lock, flags); -+ } - } - - static void vc4_crtc_update_dlist(struct drm_crtc *crtc) --- -2.13.5 - diff --git a/bt-bcm.patch b/bt-bcm.patch deleted file mode 100644 index aa5334b..0000000 --- a/bt-bcm.patch +++ /dev/null @@ -1,32 +0,0 @@ -From feb16722b5d5f05b7ae1278a43e717c3d35cd512 Mon Sep 17 00:00:00 2001 -From: Ian Molton -Date: Wed, 28 Jun 2017 20:10:55 +0100 -Subject: Bluetooth: btbcm: Add entry for BCM43430 UART bluetooth - -This patch adds the device ID for the bluetooth chip used in the -Broadcom BCM43430 SDIO WiFi / UART BT chip. - -Successfully tested using Firmware version 0x0182 - -Signed-off-by: Ian Molton -Reported-by: Loic Poulain -Signed-off-by: Marcel Holtmann ---- - drivers/bluetooth/btbcm.c | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/drivers/bluetooth/btbcm.c b/drivers/bluetooth/btbcm.c -index 24f8c4e..9ab6cfb 100644 ---- a/drivers/bluetooth/btbcm.c -+++ b/drivers/bluetooth/btbcm.c -@@ -295,6 +295,7 @@ static const struct { - { 0x410e, "BCM43341B0" }, /* 002.001.014 */ - { 0x4406, "BCM4324B3" }, /* 002.004.006 */ - { 0x610c, "BCM4354" }, /* 003.001.012 */ -+ { 0x2209, "BCM43430A1" }, /* 001.002.009 */ - { } - }; - --- -cgit v1.1 - diff --git a/build_configs.sh b/build_configs.sh index 55fb89d..140511f 100755 --- a/build_configs.sh +++ b/build_configs.sh @@ -46,8 +46,6 @@ function merge_configs() echo "# powerpc" > $name elif [ "x$arch" == "xppc64le" ]; then echo "# powerpc" > $name - elif [ "x$arch" == "xppc64p7" ]; then - echo "# powerpc" > $name elif [ "x$arch" == "xs390x" ]; then echo "# s390" > $name elif [ "x$arch" == "xarmv7hl" ]; then diff --git a/config_generation b/config_generation index e5dde85..64ae444 100644 --- a/config_generation +++ b/config_generation @@ -5,7 +5,7 @@ # x86_64 x86_64=baseconfig:baseconfig-x86:baseconfig-x86-x86_64 -x86_64-debug=baseconfig:baseconfig-x86:baseconfig-x86-x86_64:debugconfig:debugconfig-x86 +x86_64-debug=baseconfig:baseconfig-x86:baseconfig-x86-x86_64:debugconfig:debugconfig-x86:debugconfig-x86-x86_64 # i686 i686=baseconfig:baseconfig-x86:baseconfig-x86-i686 @@ -20,8 +20,7 @@ ppc64-debug=baseconfig:baseconfig-powerpc:baseconfig-powerpc-powerpc64:debugconf # ppc64le ppc64le=baseconfig:baseconfig-powerpc:baseconfig-powerpc-powerpc64le ppc64le-debug=baseconfig:baseconfig-powerpc:baseconfig-powerpc-powerpc64le:debugconfig -ppc64p7=baseconfig:baseconfig-powerpc:baseconfig-powerpc-powerpc64p7 -ppc64p7-debug=baseconfig:baseconfig-powerpc:baseconfig-powerpc-powerpc64p7:debugconfig + # s390x s390x=baseconfig:baseconfig-s390x s390x-debug=baseconfig:baseconfig-s390x:debugconfig @@ -32,6 +31,6 @@ aarch64-debug=baseconfig:baseconfig-arm:baseconfig-arm-arm64:debugconfig:debugco # arm armv7hl=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-armv7 -armv7hl-debug=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-armv7:debugconfig:debugconfig-arm:debugconfig-arm-armv7 +armv7hl-debug=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-armv7:debugconfig:debugconfig-arm armv7hl-lpae=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-lpae -armv7hl-lpae-debug=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-lpae:debugconfig:debugconfig-arm:debugconfig-arm-armv7 +armv7hl-lpae-debug=baseconfig:baseconfig-arm:baseconfig-arm-armv7:baseconfig-arm-armv7-lpae:debugconfig:debugconfig-arm diff --git a/debugconfig/arm/armv7/CONFIG_DMADEVICES_DEBUG b/debugconfig/arm/armv7/CONFIG_DMADEVICES_DEBUG deleted file mode 100644 index 7cd4fec..0000000 --- a/debugconfig/arm/armv7/CONFIG_DMADEVICES_DEBUG +++ /dev/null @@ -1 +0,0 @@ -# CONFIG_DMADEVICES_DEBUG is not set diff --git a/debugconfig/x86/x86_64/CONFIG_NR_CPUS b/debugconfig/x86/x86_64/CONFIG_NR_CPUS new file mode 100644 index 0000000..4411916 --- /dev/null +++ b/debugconfig/x86/x86_64/CONFIG_NR_CPUS @@ -0,0 +1 @@ +CONFIG_NR_CPUS=8192 diff --git a/drm-cma-reduce-dmesg-logs.patch b/drm-cma-reduce-dmesg-logs.patch index 2e39d6e..d7252c4 100644 --- a/drm-cma-reduce-dmesg-logs.patch +++ b/drm-cma-reduce-dmesg-logs.patch @@ -41,56 +41,3 @@ index 373e33f22be4..020e7668dfab 100644 size); ret = -ENOMEM; goto error; -From patchwork Wed Oct 4 12:54:47 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: cma: Take __GFP_NOWARN into account in cma_alloc() -From: Boris Brezillon -X-Patchwork-Id: 180554 -Message-Id: <20171004125447.15195-1-boris.brezillon@free-electrons.com> -To: linux-mm@kvack.org, Andrew Morton , - Laura Abbott -Cc: Boris Brezillon , - Jaewon Kim , dri-devel@lists.freedesktop.org -Date: Wed, 4 Oct 2017 14:54:47 +0200 - -cma_alloc() unconditionally prints an INFO message when the CMA -allocation fails. Make this message conditional on the non-presence of -__GFP_NOWARN in gfp_mask. - -Signed-off-by: Boris Brezillon -Acked-by: Laura Abbott ---- -Hello, - -This patch aims at removing INFO messages that are displayed when the -VC4 driver tries to allocate buffer objects. From the driver perspective -an allocation failure is acceptable, and the driver can possibly do -something to make following allocation succeed (like flushing the VC4 -internal cache). - -Also, I don't understand why this message is only an INFO message, and -not a WARN (pr_warn()). Please let me know if you have good reasons to -keep it as an unconditional pr_info(). - -Thanks, - -Boris ---- - mm/cma.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/mm/cma.c b/mm/cma.c -index c0da318c020e..022e52bd8370 100644 ---- a/mm/cma.c -+++ b/mm/cma.c -@@ -460,7 +460,7 @@ struct page *cma_alloc(struct cma *cma, size_t count, unsigned int align, - - trace_cma_alloc(pfn, page, count, align); - -- if (ret) { -+ if (ret && !(gfp_mask & __GFP_NOWARN)) { - pr_info("%s: alloc failed, req-size: %zu pages, ret: %d\n", - __func__, count, ret); - cma_debug_show_areas(cma); diff --git a/drm-i915-Boost-GPU-clocks-if-we-miss-the-pageflip-s-vblank.patch b/drm-i915-Boost-GPU-clocks-if-we-miss-the-pageflip-s-vblank.patch new file mode 100644 index 0000000..07f8111 --- /dev/null +++ b/drm-i915-Boost-GPU-clocks-if-we-miss-the-pageflip-s-vblank.patch @@ -0,0 +1,200 @@ +From patchwork Thu Aug 17 12:37:06 2017 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 8bit +Subject: drm/i915: Boost GPU clocks if we miss the pageflip's vblank +From: Chris Wilson +X-Patchwork-Id: 172204 +Message-Id: <20170817123706.6777-1-chris@chris-wilson.co.uk> +To: intel-gfx@lists.freedesktop.org +Cc: Daniel Vetter +Date: Thu, 17 Aug 2017 13:37:06 +0100 + +If we miss the current vblank because the gpu was busy, that may cause a +jitter as the frame rate temporarily drops. We try to limit the impact +of this by then boosting the GPU clock to deliver the frame as quickly +as possible. Originally done in commit 6ad790c0f5ac ("drm/i915: Boost GPU +frequency if we detect outstanding pageflips") but was never forward +ported to atomic and finally dropped in commit fd3a40242e87 ("drm/i915: +Rip out legacy page_flip completion/irq handling"). + +References: https://bugs.freedesktop.org/show_bug.cgi?id=102199 +Signed-off-by: Chris Wilson +Cc: Maarten Lankhorst +Cc: Ville Syrjälä +Cc: Daniel Vetter +Tested-by: Lyude Paul +Reviewed-by: Radoslaw Szwichtenberg +--- + drivers/gpu/drm/i915/intel_display.c | 59 ++++++++++++++++++++++++++++++++++++ + drivers/gpu/drm/i915/intel_drv.h | 1 - + drivers/gpu/drm/i915/intel_pm.c | 42 ++----------------------- + 3 files changed, 62 insertions(+), 40 deletions(-) + +diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c +index 0e93ec201fe3..7d5b19553637 100644 +--- a/drivers/gpu/drm/i915/intel_display.c ++++ b/drivers/gpu/drm/i915/intel_display.c +@@ -12636,6 +12636,55 @@ static const struct drm_crtc_funcs intel_crtc_funcs = { + .set_crc_source = intel_crtc_set_crc_source, + }; + ++struct wait_rps_boost { ++ struct wait_queue_entry wait; ++ ++ struct drm_crtc *crtc; ++ struct drm_i915_gem_request *request; ++}; ++ ++static int do_rps_boost(struct wait_queue_entry *_wait, ++ unsigned mode, int sync, void *key) ++{ ++ struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait); ++ struct drm_i915_gem_request *rq = wait->request; ++ ++ gen6_rps_boost(rq, NULL); ++ i915_gem_request_put(rq); ++ ++ drm_crtc_vblank_put(wait->crtc); ++ ++ list_del(&wait->wait.entry); ++ kfree(wait); ++ return 1; ++} ++ ++static void add_rps_boost_after_vblank(struct drm_crtc *crtc, ++ struct dma_fence *fence) ++{ ++ struct wait_rps_boost *wait; ++ ++ if (!dma_fence_is_i915(fence)) ++ return; ++ ++ if (drm_crtc_vblank_get(crtc)) ++ return; ++ ++ wait = kmalloc(sizeof(*wait), GFP_KERNEL); ++ if (!wait) { ++ drm_crtc_vblank_put(crtc); ++ return; ++ } ++ ++ wait->request = to_request(dma_fence_get(fence)); ++ wait->crtc = crtc; ++ ++ wait->wait.func = do_rps_boost; ++ wait->wait.flags = 0; ++ ++ add_wait_queue(drm_crtc_vblank_waitqueue(crtc), &wait->wait); ++} ++ + /** + * intel_prepare_plane_fb - Prepare fb for usage on plane + * @plane: drm plane to prepare for +@@ -12733,12 +12782,22 @@ intel_prepare_plane_fb(struct drm_plane *plane, + return ret; + + if (!new_state->fence) { /* implicit fencing */ ++ struct dma_fence *fence; ++ + ret = i915_sw_fence_await_reservation(&intel_state->commit_ready, + obj->resv, NULL, + false, I915_FENCE_TIMEOUT, + GFP_KERNEL); + if (ret < 0) + return ret; ++ ++ fence = reservation_object_get_excl_rcu(obj->resv); ++ if (fence) { ++ add_rps_boost_after_vblank(new_state->crtc, fence); ++ dma_fence_put(fence); ++ } ++ } else { ++ add_rps_boost_after_vblank(new_state->crtc, new_state->fence); + } + + return 0; +diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h +index fa47285918f4..e092354b4d63 100644 +--- a/drivers/gpu/drm/i915/intel_drv.h ++++ b/drivers/gpu/drm/i915/intel_drv.h +@@ -1844,7 +1844,6 @@ void gen6_rps_reset_ei(struct drm_i915_private *dev_priv); + void gen6_rps_idle(struct drm_i915_private *dev_priv); + void gen6_rps_boost(struct drm_i915_gem_request *rq, + struct intel_rps_client *rps); +-void intel_queue_rps_boost_for_request(struct drm_i915_gem_request *req); + void g4x_wm_get_hw_state(struct drm_device *dev); + void vlv_wm_get_hw_state(struct drm_device *dev); + void ilk_wm_get_hw_state(struct drm_device *dev); +diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c +index ed662937ec3c..c9fa2eb1903c 100644 +--- a/drivers/gpu/drm/i915/intel_pm.c ++++ b/drivers/gpu/drm/i915/intel_pm.c +@@ -6169,6 +6169,7 @@ void gen6_rps_boost(struct drm_i915_gem_request *rq, + struct intel_rps_client *rps) + { + struct drm_i915_private *i915 = rq->i915; ++ unsigned long flags; + bool boost; + + /* This is intentionally racy! We peek at the state here, then +@@ -6178,13 +6179,13 @@ void gen6_rps_boost(struct drm_i915_gem_request *rq, + return; + + boost = false; +- spin_lock_irq(&rq->lock); ++ spin_lock_irqsave(&rq->lock, flags); + if (!rq->waitboost && !i915_gem_request_completed(rq)) { + atomic_inc(&i915->rps.num_waiters); + rq->waitboost = true; + boost = true; + } +- spin_unlock_irq(&rq->lock); ++ spin_unlock_irqrestore(&rq->lock, flags); + if (!boost) + return; + +@@ -9132,43 +9133,6 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val) + return DIV_ROUND_CLOSEST(val, GT_FREQUENCY_MULTIPLIER); + } + +-struct request_boost { +- struct work_struct work; +- struct drm_i915_gem_request *req; +-}; +- +-static void __intel_rps_boost_work(struct work_struct *work) +-{ +- struct request_boost *boost = container_of(work, struct request_boost, work); +- struct drm_i915_gem_request *req = boost->req; +- +- if (!i915_gem_request_completed(req)) +- gen6_rps_boost(req, NULL); +- +- i915_gem_request_put(req); +- kfree(boost); +-} +- +-void intel_queue_rps_boost_for_request(struct drm_i915_gem_request *req) +-{ +- struct request_boost *boost; +- +- if (req == NULL || INTEL_GEN(req->i915) < 6) +- return; +- +- if (i915_gem_request_completed(req)) +- return; +- +- boost = kmalloc(sizeof(*boost), GFP_ATOMIC); +- if (boost == NULL) +- return; +- +- boost->req = i915_gem_request_get(req); +- +- INIT_WORK(&boost->work, __intel_rps_boost_work); +- queue_work(req->i915->wq, &boost->work); +-} +- + void intel_pm_setup(struct drm_i915_private *dev_priv) + { + mutex_init(&dev_priv->rps.hw_lock); diff --git a/drm-i915-boost-GPU-clocks-if-we-miss-the-pageflip.patch b/drm-i915-boost-GPU-clocks-if-we-miss-the-pageflip.patch deleted file mode 100644 index 0bd0e7c..0000000 --- a/drm-i915-boost-GPU-clocks-if-we-miss-the-pageflip.patch +++ /dev/null @@ -1,238 +0,0 @@ -From 333e2a813cdfb86ff286ece6f13bec371aa03d7b Mon Sep 17 00:00:00 2001 -From: Chris Wilson -Date: Thu, 17 Aug 2017 13:37:06 +0100 -Subject: [PATCH] drm/i915: Boost GPU clocks if we miss the pageflip's vblank -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -If we miss the current vblank because the gpu was busy, that may cause a -jitter as the frame rate temporarily drops. We try to limit the impact -of this by then boosting the GPU clock to deliver the frame as quickly -as possible. Originally done in commit 6ad790c0f5ac ("drm/i915: Boost GPU -frequency if we detect outstanding pageflips") but was never forward -ported to atomic and finally dropped in commit fd3a40242e87 ("drm/i915: -Rip out legacy page_flip completion/irq handling"). - -One of the most typical use-cases for this is a mostly idle desktop. -Rendering one frame of the desktop's frontbuffer can easily be -accomplished by the GPU running at low frequency, but often exceeds -the time budget of the desktop compositor. The result is that animations -such as opening the menu, doing a fullscreen switch, or even just trying -to move a window around are slow and jerky. We need to respond within a -frame to give the best impression of a smooth UX, as a compromise we -instead respond if that first frame misses its goal. The result should -be a near-imperceivable initial delay and a smooth animation even -starting from idle. The cost, as ever, is that we spend more power than -is strictly necessary as we overestimate the required GPU frequency and -then try to ramp down. - -This of course is reactionary, too little, too late; nevertheless it is -surprisingly effective. - -Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102199 -Signed-off-by: Chris Wilson -Cc: Maarten Lankhorst -Cc: Ville Syrjälä -Cc: Daniel Vetter -Link: https://patchwork.freedesktop.org/patch/msgid/20170817123706.6777-1-chris@chris-wilson.co.uk -Tested-by: Lyude Paul -Reviewed-by: Radoslaw Szwichtenberg ---- - drivers/gpu/drm/i915/i915_gem.c | 10 +++--- - drivers/gpu/drm/i915/intel_display.c | 63 ++++++++++++++++++++++++++++++++++++ - drivers/gpu/drm/i915/intel_pm.c | 14 ++++---- - 3 files changed, 77 insertions(+), 10 deletions(-) - -diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c -index 969bac8404f1..7d409b29d75a 100644 ---- a/drivers/gpu/drm/i915/i915_gem.c -+++ b/drivers/gpu/drm/i915/i915_gem.c -@@ -355,6 +355,7 @@ i915_gem_object_wait_fence(struct dma_fence *fence, - long timeout, - struct intel_rps_client *rps) - { -+ unsigned long irq_flags; - struct drm_i915_gem_request *rq; - - BUILD_BUG_ON(I915_WAIT_INTERRUPTIBLE != 0x1); -@@ -410,9 +411,9 @@ i915_gem_object_wait_fence(struct dma_fence *fence, - * Compensate by giving the synchronous client credit for - * a waitboost next time. - */ -- spin_lock(&rq->i915->rps.client_lock); -+ spin_lock_irqsave(&rq->i915->rps.client_lock, irq_flags); - list_del_init(&rps->link); -- spin_unlock(&rq->i915->rps.client_lock); -+ spin_unlock_irqrestore(&rq->i915->rps.client_lock, irq_flags); - } - - return timeout; -@@ -5029,6 +5030,7 @@ void i915_gem_release(struct drm_device *dev, struct drm_file *file) - { - struct drm_i915_file_private *file_priv = file->driver_priv; - struct drm_i915_gem_request *request; -+ unsigned long flags; - - /* Clean up our request list when the client is going away, so that - * later retire_requests won't dereference our soon-to-be-gone -@@ -5040,9 +5042,9 @@ void i915_gem_release(struct drm_device *dev, struct drm_file *file) - spin_unlock(&file_priv->mm.lock); - - if (!list_empty(&file_priv->rps.link)) { -- spin_lock(&to_i915(dev)->rps.client_lock); -+ spin_lock_irqsave(&to_i915(dev)->rps.client_lock, flags); - list_del(&file_priv->rps.link); -- spin_unlock(&to_i915(dev)->rps.client_lock); -+ spin_unlock_irqrestore(&to_i915(dev)->rps.client_lock, flags); - } - } - -diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c -index 022125082649..875eb7aec2f1 100644 ---- a/drivers/gpu/drm/i915/intel_display.c -+++ b/drivers/gpu/drm/i915/intel_display.c -@@ -13301,6 +13301,58 @@ static const struct drm_crtc_funcs intel_crtc_funcs = { - .set_crc_source = intel_crtc_set_crc_source, - }; - -+struct wait_rps_boost { -+ struct wait_queue_entry wait; -+ -+ struct drm_crtc *crtc; -+ struct drm_i915_gem_request *request; -+}; -+ -+static int do_rps_boost(struct wait_queue_entry *_wait, -+ unsigned mode, int sync, void *key) -+{ -+ struct wait_rps_boost *wait = container_of(_wait, typeof(*wait), wait); -+ struct drm_i915_gem_request *rq = wait->request; -+ -+ gen6_rps_boost(rq->i915, NULL, rq->emitted_jiffies); -+ i915_gem_request_put(rq); -+ -+ drm_crtc_vblank_put(wait->crtc); -+ -+ list_del(&wait->wait.entry); -+ kfree(wait); -+ return 1; -+} -+ -+static void add_rps_boost_after_vblank(struct drm_crtc *crtc, -+ struct dma_fence *fence) -+{ -+ struct wait_rps_boost *wait; -+ -+ if (!dma_fence_is_i915(fence)) -+ return; -+ -+ if (INTEL_GEN(to_i915(crtc->dev)) < 6) -+ return; -+ -+ if (drm_crtc_vblank_get(crtc)) -+ return; -+ -+ wait = kmalloc(sizeof(*wait), GFP_KERNEL); -+ if (!wait) { -+ drm_crtc_vblank_put(crtc); -+ return; -+ } -+ -+ wait->request = to_request(dma_fence_get(fence)); -+ wait->crtc = crtc; -+ -+ wait->wait.func = do_rps_boost; -+ wait->wait.flags = 0; -+ -+ add_wait_queue(drm_crtc_vblank_waitqueue(crtc), &wait->wait); -+} -+ - /** - * intel_prepare_plane_fb - Prepare fb for usage on plane - * @plane: drm plane to prepare for -@@ -13392,6 +13444,8 @@ intel_prepare_plane_fb(struct drm_plane *plane, - return 0; - - if (!new_state->fence) { /* implicit fencing */ -+ struct dma_fence *fence; -+ - ret = i915_sw_fence_await_reservation(&intel_state->commit_ready, - obj->resv, NULL, - false, I915_FENCE_TIMEOUT, -@@ -13399,7 +13453,16 @@ intel_prepare_plane_fb(struct drm_plane *plane, - if (ret < 0) - return ret; - -+ fence = reservation_object_get_excl_rcu(obj->resv); -+ if (fence) { -+ add_rps_boost_after_vblank(new_state->crtc, fence); -+ dma_fence_put(fence); -+ } -+ - i915_gem_object_wait_priority(obj, 0, I915_PRIORITY_DISPLAY); -+ -+ } else { -+ add_rps_boost_after_vblank(new_state->crtc, new_state->fence); - } - - return 0; -diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c -index 40b224b44d1b..b0ee9c4d33f4 100644 ---- a/drivers/gpu/drm/i915/intel_pm.c -+++ b/drivers/gpu/drm/i915/intel_pm.c -@@ -6108,6 +6108,7 @@ void gen6_rps_busy(struct drm_i915_private *dev_priv) - - void gen6_rps_idle(struct drm_i915_private *dev_priv) - { -+ unsigned long flags; - /* Flush our bottom-half so that it does not race with us - * setting the idle frequency and so that it is bounded by - * our rpm wakeref. And then disable the interrupts to stop any -@@ -6127,16 +6128,17 @@ void gen6_rps_idle(struct drm_i915_private *dev_priv) - } - mutex_unlock(&dev_priv->rps.hw_lock); - -- spin_lock(&dev_priv->rps.client_lock); -+ spin_lock_irqsave(&dev_priv->rps.client_lock, flags); - while (!list_empty(&dev_priv->rps.clients)) - list_del_init(dev_priv->rps.clients.next); -- spin_unlock(&dev_priv->rps.client_lock); -+ spin_unlock_irqrestore(&dev_priv->rps.client_lock, flags); - } - - void gen6_rps_boost(struct drm_i915_private *dev_priv, - struct intel_rps_client *rps, - unsigned long submitted) - { -+ unsigned long flags; - /* This is intentionally racy! We peek at the state here, then - * validate inside the RPS worker. - */ -@@ -6151,14 +6153,14 @@ void gen6_rps_boost(struct drm_i915_private *dev_priv, - if (rps && time_after(jiffies, submitted + DRM_I915_THROTTLE_JIFFIES)) - rps = NULL; - -- spin_lock(&dev_priv->rps.client_lock); -+ spin_lock_irqsave(&dev_priv->rps.client_lock, flags); - if (rps == NULL || list_empty(&rps->link)) { -- spin_lock_irq(&dev_priv->irq_lock); -+ spin_lock(&dev_priv->irq_lock); - if (dev_priv->rps.interrupts_enabled) { - dev_priv->rps.client_boost = true; - schedule_work(&dev_priv->rps.work); - } -- spin_unlock_irq(&dev_priv->irq_lock); -+ spin_unlock(&dev_priv->irq_lock); - - if (rps != NULL) { - list_add(&rps->link, &dev_priv->rps.clients); -@@ -6166,7 +6168,7 @@ void gen6_rps_boost(struct drm_i915_private *dev_priv, - } else - dev_priv->rps.boosts++; - } -- spin_unlock(&dev_priv->rps.client_lock); -+ spin_unlock_irqrestore(&dev_priv->rps.client_lock, flags); - } - - int intel_set_rps(struct drm_i915_private *dev_priv, u8 val) diff --git a/drm-i915-turn-off-wc-mmaps.patch b/drm-i915-turn-off-wc-mmaps.patch deleted file mode 100644 index c81b892..0000000 --- a/drm-i915-turn-off-wc-mmaps.patch +++ /dev/null @@ -1,21 +0,0 @@ -From: Dave Airlie -Date: Thu, 4 Jun 2015 07:12:20 -0400 -Subject: [PATCH] drm: i915: turn off wc mmaps - ---- - drivers/gpu/drm/i915/i915_dma.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c -index d2df321ba634..775a5b11a366 100644 ---- a/drivers/gpu/drm/i915/i915_dma.c -+++ b/drivers/gpu/drm/i915/i915_dma.c -@@ -151,7 +151,7 @@ static int i915_getparam(struct drm_device *dev, void *data, - value = 1; - break; - case I915_PARAM_MMAP_VERSION: -- value = 1; -+ value = 0; - break; - case I915_PARAM_SUBSLICE_TOTAL: - value = INTEL_INFO(dev)->subslice_total; diff --git a/drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch b/drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch deleted file mode 100644 index 70a5282..0000000 --- a/drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch +++ /dev/null @@ -1,42 +0,0 @@ -From patchwork Thu Feb 9 18:16:00 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: drm/vc4: Fix OOPSes from trying to cache a partially constructed BO. -From: Eric Anholt -X-Patchwork-Id: 138087 -Message-Id: <20170209181600.24048-1-eric@anholt.net> -To: dri-devel@lists.freedesktop.org -Cc: linux-kernel@vger.kernel.org, pbrobinson@gmail.com -Date: Thu, 9 Feb 2017 10:16:00 -0800 - -If a CMA allocation failed, the partially constructed BO would be -unreferenced through the normal path, and we might choose to put it in -the BO cache. If we then reused it before it expired from the cache, -the kernel would OOPS. - -Signed-off-by: Eric Anholt -Fixes: c826a6e10644 ("drm/vc4: Add a BO cache.") ---- - drivers/gpu/drm/vc4/vc4_bo.c | 8 ++++++++ - 1 file changed, 8 insertions(+) - -diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c -index 5ec14f25625d..fd83a2807656 100644 ---- a/drivers/gpu/drm/vc4/vc4_bo.c -+++ b/drivers/gpu/drm/vc4/vc4_bo.c -@@ -314,6 +314,14 @@ void vc4_free_object(struct drm_gem_object *gem_bo) - goto out; - } - -+ /* If this object was partially constructed but CMA allocation -+ * had failed, just free it. -+ */ -+ if (!bo->base.vaddr) { -+ vc4_bo_destroy(bo); -+ goto out; -+ } -+ - cache_list = vc4_get_cache_list_for_size(dev, gem_bo->size); - if (!cache_list) { - vc4_bo_destroy(bo); diff --git a/efi-Add-SHIM-and-image-security-database-GUID-defini.patch b/efi-Add-SHIM-and-image-security-database-GUID-defini.patch new file mode 100644 index 0000000..4d380ea --- /dev/null +++ b/efi-Add-SHIM-and-image-security-database-GUID-defini.patch @@ -0,0 +1,31 @@ +From 3a9fe1504e08824d894bb3a804c6a313f5d1be8a Mon Sep 17 00:00:00 2001 +From: Josh Boyer +Date: Tue, 25 Oct 2016 12:54:11 -0400 +Subject: [PATCH 11/20] efi: Add SHIM and image security database GUID + definitions + +Add the definitions for shim and image security database, both of which +are used widely in various Linux distros. + +Signed-off-by: Josh Boyer +--- + include/linux/efi.h | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/include/linux/efi.h b/include/linux/efi.h +index 2d089487d2da..ce943d5accfd 100644 +--- a/include/linux/efi.h ++++ b/include/linux/efi.h +@@ -592,6 +592,9 @@ void efi_native_runtime_setup(void); + #define EFI_MEMORY_ATTRIBUTES_TABLE_GUID EFI_GUID(0xdcfa911d, 0x26eb, 0x469f, 0xa2, 0x20, 0x38, 0xb7, 0xdc, 0x46, 0x12, 0x20) + #define EFI_CONSOLE_OUT_DEVICE_GUID EFI_GUID(0xd3b36f2c, 0xd551, 0x11d4, 0x9a, 0x46, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d) + ++#define EFI_IMAGE_SECURITY_DATABASE_GUID EFI_GUID(0xd719b2cb, 0x3d3a, 0x4596, 0xa3, 0xbc, 0xda, 0xd0, 0x0e, 0x67, 0x65, 0x6f) ++#define EFI_SHIM_LOCK_GUID EFI_GUID(0x605dab50, 0xe046, 0x4300, 0xab, 0xb6, 0x3d, 0xd8, 0x10, 0xdd, 0x8b, 0x23) ++ + /* + * This GUID is used to pass to the kernel proper the struct screen_info + * structure that was populated by the stub based on the GOP protocol instance +-- +2.9.3 + diff --git a/efi-lockdown.patch b/efi-lockdown.patch index e048784..4ac65fd 100644 --- a/efi-lockdown.patch +++ b/efi-lockdown.patch @@ -1,53 +1,7 @@ -From df7d76ae50f18d4465e59fdf7f19d3df44906cb5 Mon Sep 17 00:00:00 2001 -From: Josh Boyer -Date: Mon, 21 Nov 2016 23:55:55 +0000 -Subject: [PATCH 07/32] efi: Add EFI_SECURE_BOOT bit - -UEFI machines can be booted in Secure Boot mode. Add a EFI_SECURE_BOOT bit -that can be passed to efi_enabled() to find out whether secure boot is -enabled. - -This will be used by the SysRq+x handler, registered by the x86 arch, to find -out whether secure boot mode is enabled so that it can be disabled. - -Signed-off-by: Josh Boyer -Signed-off-by: David Howells ---- - arch/x86/kernel/setup.c | 1 + - include/linux/efi.h | 1 + - 2 files changed, 2 insertions(+) - -diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index 69780ed..447905e 100644 ---- a/arch/x86/kernel/setup.c -+++ b/arch/x86/kernel/setup.c -@@ -1182,6 +1182,7 @@ void __init setup_arch(char **cmdline_p) - pr_info("Secure boot disabled\n"); - break; - case efi_secureboot_mode_enabled: -+ set_bit(EFI_SECURE_BOOT, &efi.flags); - pr_info("Secure boot enabled\n"); - break; - default: -diff --git a/include/linux/efi.h b/include/linux/efi.h -index 94d34e0..6049600 100644 ---- a/include/linux/efi.h -+++ b/include/linux/efi.h -@@ -1069,6 +1069,7 @@ extern int __init efi_setup_pcdp_console(char *); - #define EFI_DBG 8 /* Print additional debug info at runtime */ - #define EFI_NX_PE_DATA 9 /* Can runtime data regions be mapped non-executable? */ - #define EFI_MEM_ATTR 10 /* Did firmware publish an EFI_MEMORY_ATTRIBUTES table? */ -+#define EFI_SECURE_BOOT 11 /* Are we in Secure Boot mode? */ - - #ifdef CONFIG_EFI - /* --- -2.7.4 - -From f05a90c19a9613d8d50597319ed91f691e25b689 Mon Sep 17 00:00:00 2001 +From 646ac5c07196bc3680e34188e55c8cc3565f65e7 Mon Sep 17 00:00:00 2001 From: David Howells -Date: Mon, 21 Nov 2016 23:36:17 +0000 -Subject: [PATCH 09/32] Add the ability to lock down access to the running +Date: Wed, 24 May 2017 14:56:00 +0100 +Subject: [PATCH 01/26] Add the ability to lock down access to the running kernel image Provide a single call to allow kernel code to determine whether the system @@ -57,64 +11,70 @@ modules that aren't validly signed with a key we recognise, fiddling with MSR registers and disallowing hibernation, Signed-off-by: David Howells +Acked-by: James Morris --- - include/linux/kernel.h | 9 +++++++++ - include/linux/security.h | 11 +++++++++++ - security/Kconfig | 15 +++++++++++++++ + include/linux/kernel.h | 17 ++++++++++++++ + include/linux/security.h | 8 +++++++ + security/Kconfig | 8 +++++++ security/Makefile | 3 +++ - security/lock_down.c | 40 ++++++++++++++++++++++++++++++++++++++++ - 5 files changed, 78 insertions(+) + security/lock_down.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++++ + 5 files changed, 96 insertions(+) create mode 100644 security/lock_down.c diff --git a/include/linux/kernel.h b/include/linux/kernel.h -index cb09238..3cd3be9 100644 +index 0ad4c3044cf9..362da2e4bf53 100644 --- a/include/linux/kernel.h +++ b/include/linux/kernel.h -@@ -273,6 +273,15 @@ extern int oops_may_print(void); - void do_exit(long error_code) __noreturn; - void complete_and_exit(struct completion *, long) __noreturn; - +@@ -287,6 +287,23 @@ static inline void refcount_error_report(struct pt_regs *regs, const char *err) + { } + #endif + +#ifdef CONFIG_LOCK_DOWN_KERNEL -+extern bool kernel_is_locked_down(void); ++extern bool __kernel_is_locked_down(const char *what, bool first); +#else -+static inline bool kernel_is_locked_down(void) ++static inline bool __kernel_is_locked_down(const char *what, bool first) +{ + return false; +} +#endif + ++#define kernel_is_locked_down(what) \ ++ ({ \ ++ static bool message_given; \ ++ bool locked_down = __kernel_is_locked_down(what, !message_given); \ ++ message_given = true; \ ++ locked_down; \ ++ }) ++ /* Internal, do not use. */ int __must_check _kstrtoul(const char *s, unsigned int base, unsigned long *res); int __must_check _kstrtol(const char *s, unsigned int base, long *res); diff --git a/include/linux/security.h b/include/linux/security.h -index d3868f2..187b74b 100644 +index ce6265960d6c..310775476b68 100644 --- a/include/linux/security.h +++ b/include/linux/security.h -@@ -1679,5 +1679,16 @@ static inline void free_secdata(void *secdata) +@@ -1753,5 +1753,13 @@ static inline void free_secdata(void *secdata) { } #endif /* CONFIG_SECURITY */ - + +#ifdef CONFIG_LOCK_DOWN_KERNEL -+extern void lock_kernel_down(void); -+#ifdef CONFIG_ALLOW_LOCKDOWN_LIFT -+extern void lift_kernel_lockdown(void); -+#endif ++extern void __init init_lockdown(void); +#else -+static inline void lock_kernel_down(void) ++static inline void __init init_lockdown(void) +{ +} +#endif + #endif /* ! __LINUX_SECURITY_H */ - + diff --git a/security/Kconfig b/security/Kconfig -index d900f47..d9b391d 100644 +index e8e449444e65..8e01fd59ae7e 100644 --- a/security/Kconfig +++ b/security/Kconfig -@@ -193,6 +193,21 @@ config STATIC_USERMODEHELPER_PATH +@@ -205,6 +205,14 @@ config STATIC_USERMODEHELPER_PATH If you wish for all usermode helper programs to be disabled, specify an empty string here (i.e. ""). - + +config LOCK_DOWN_KERNEL + bool "Allow the kernel to be 'locked down'" + help @@ -123,18 +83,11 @@ index d900f47..d9b391d 100644 + turns off various features that might otherwise allow access to the + kernel image (eg. setting MSR registers). + -+config ALLOW_LOCKDOWN_LIFT -+ bool -+ help -+ Allow the lockdown on a kernel to be lifted, thereby restoring the -+ ability of userspace to access the kernel image (eg. by SysRq+x under -+ x86). -+ source security/selinux/Kconfig source security/smack/Kconfig source security/tomoyo/Kconfig diff --git a/security/Makefile b/security/Makefile -index f2d71cd..8c4a43e 100644 +index f2d71cdb8e19..8c4a43e3d4e0 100644 --- a/security/Makefile +++ b/security/Makefile @@ -29,3 +29,6 @@ obj-$(CONFIG_CGROUP_DEVICE) += device_cgroup.o @@ -146,10 +99,10 @@ index f2d71cd..8c4a43e 100644 +obj-$(CONFIG_LOCK_DOWN_KERNEL) += lock_down.o diff --git a/security/lock_down.c b/security/lock_down.c new file mode 100644 -index 0000000..5788c60 +index 000000000000..d8595c0e6673 --- /dev/null +++ b/security/lock_down.c -@@ -0,0 +1,40 @@ +@@ -0,0 +1,60 @@ +/* Lock down the kernel + * + * Copyright (C) 2016 Red Hat, Inc. All Rights Reserved. @@ -164,282 +117,110 @@ index 0000000..5788c60 +#include +#include + -+static __read_mostly bool kernel_locked_down; ++static __ro_after_init bool kernel_locked_down; + +/* + * Put the kernel into lock-down mode. + */ -+void lock_kernel_down(void) ++static void __init lock_kernel_down(const char *where) +{ -+ kernel_locked_down = true; ++ if (!kernel_locked_down) { ++ kernel_locked_down = true; ++ pr_notice("Kernel is locked down from %s; see man kernel_lockdown.7\n", ++ where); ++ } +} + ++static int __init lockdown_param(char *ignored) ++{ ++ lock_kernel_down("command line"); ++ return 0; ++} ++ ++early_param("lockdown", lockdown_param); ++ +/* -+ * Take the kernel out of lockdown mode. ++ * Lock the kernel down from very early in the arch setup. This must happen ++ * prior to things like ACPI being initialised. + */ -+void lift_kernel_lockdown(void) ++void __init init_lockdown(void) +{ -+ kernel_locked_down = false; ++#ifdef CONFIG_LOCK_DOWN_IN_EFI_SECURE_BOOT ++ if (efi_enabled(EFI_SECURE_BOOT)) ++ lock_kernel_down("EFI secure boot"); ++#endif +} + +/** + * kernel_is_locked_down - Find out if the kernel is locked down ++ * @what: Tag to use in notice generated if lockdown is in effect + */ -+bool kernel_is_locked_down(void) ++bool __kernel_is_locked_down(const char *what, bool first) +{ ++ if (what && first && kernel_locked_down) ++ pr_notice("Lockdown: %s is restricted; see man kernel_lockdown.7\n", ++ what); + return kernel_locked_down; +} -+EXPORT_SYMBOL(kernel_is_locked_down); ++EXPORT_SYMBOL(__kernel_is_locked_down); -- -2.7.4 - -From fb6feb38e297260d050fc477c72683ac51d07ae3 Mon Sep 17 00:00:00 2001 -From: David Howells -Date: Mon, 21 Nov 2016 23:55:55 +0000 -Subject: [PATCH 10/32] efi: Lock down the kernel if booted in secure boot mode +2.13.6 -UEFI Secure Boot provides a mechanism for ensuring that the firmware will -only load signed bootloaders and kernels. Certain use cases may also -require that all kernel modules also be signed. Add a configuration option -that to lock down the kernel - which includes requiring validly signed -modules - if the kernel is secure-booted. - -Signed-off-by: David Howells ---- - arch/x86/Kconfig | 12 ++++++++++++ - arch/x86/kernel/setup.c | 8 +++++++- - 2 files changed, 19 insertions(+), 1 deletion(-) - -diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig -index 874c123..a315974 100644 ---- a/arch/x86/Kconfig -+++ b/arch/x86/Kconfig -@@ -1816,6 +1816,18 @@ config EFI_MIXED - - If unsure, say N. - -+config EFI_SECURE_BOOT_LOCK_DOWN -+ def_bool n -+ depends on EFI -+ prompt "Lock down the kernel when UEFI Secure Boot is enabled" -+ ---help--- -+ UEFI Secure Boot provides a mechanism for ensuring that the firmware -+ will only load signed bootloaders and kernels. Certain use cases may -+ also require that all kernel modules also be signed and that -+ userspace is prevented from directly changing the running kernel -+ image. Say Y here to automatically lock down the kernel when a -+ system boots with UEFI Secure Boot enabled. -+ - config SECCOMP - def_bool y - prompt "Enable seccomp to safely compute untrusted bytecode" -diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c -index 447905e..d44e60e 100644 ---- a/arch/x86/kernel/setup.c -+++ b/arch/x86/kernel/setup.c -@@ -69,6 +69,7 @@ - #include - #include - #include -+#include - - #include - #include