diff --git a/AllWinner-h3.patch b/AllWinner-h3.patch deleted file mode 100644 index c75da8a..0000000 --- a/AllWinner-h3.patch +++ /dev/null @@ -1,1080 +0,0 @@ -From patchwork Mon Mar 6 17:17:45 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, 1/6] ARM: dts: sun8i: h3: drop skeleton.dtsi inclusion in H3 DTSI -From: Icenowy Zheng -X-Patchwork-Id: 9607205 -Message-Id: <20170306171750.7491-2-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:45 +0800 - -The skeleton.dtsi file is now deprecated, and do not exist in ARM64 -environment. - -Since we will soon reuse most part of H3 DTSI for H5, which is an ARM64 -chip, drop skeleton.dtsi inclusion now. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 2 -- - 1 file changed, 2 deletions(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index 27780b97c863..9a3435527fde 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -40,8 +40,6 @@ - * OTHER DEALINGS IN THE SOFTWARE. - */ - --#include "skeleton.dtsi" -- - #include - #include - #include -From patchwork Mon Mar 6 17:17:46 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, - 2/6] ARM: dts: sun8i: h3: drop pinctrl-a10.h inclusion for H3 DTSI -From: Icenowy Zheng -X-Patchwork-Id: 9607207 -Message-Id: <20170306171750.7491-3-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:46 +0800 - -After converting to generic pinconf binding, pinctrl-a10.h is now not -used at all. - -Drop its inclusion for H3 DTSI. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 1 - - 1 file changed, 1 deletion(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index 9a3435527fde..b250e6d03b57 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -42,7 +42,6 @@ - - #include - #include --#include - #include - - / { -From patchwork Mon Mar 6 17:17:47 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8, - 3/6] ARM: dts: sun8i: h3: correct the GIC compatible in H3 to gic-400 -From: Icenowy Zheng -X-Patchwork-Id: 9607209 -Message-Id: <20170306171750.7491-4-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, - linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - Icenowy Zheng -Date: Tue, 7 Mar 2017 01:17:47 +0800 - -According to the datasheets provided by Allwinner, both Allwinner H3 and -H5 use GIC-400 as their interrupt controller. - -For better device tree reusing, correct the GIC compatible in H3 DTSI to -"arm,gic-400", thus this node can be reused in H5. - -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. - - arch/arm/boot/dts/sun8i-h3.dtsi | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -index b250e6d03b57..c13fbfb92592 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -586,7 +586,7 @@ - }; - - gic: interrupt-controller@01c81000 { -- compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic"; -+ compatible = "arm,gic-400"; - reg = <0x01c81000 0x1000>, - <0x01c82000 0x2000>, - <0x01c84000 0x2000>, -From patchwork Mon Mar 6 17:17:48 2017 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -Subject: [v8,4/6] arm: dts: sun8i: h3: split Allwinner H3 .dtsi -From: Icenowy Zheng -X-Patchwork-Id: 9607211 -Message-Id: <20170306171750.7491-5-icenowy@aosc.xyz> -To: Rob Herring , - Maxime Ripard , - Chen-Yu Tsai -Cc: devicetree@vger.kernel.org, Andre Przywara , - linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, - Icenowy Zheng , linux-arm-kernel@lists.infradead.org -Date: Tue, 7 Mar 2017 01:17:48 +0800 - -From: Andre Przywara - -The new Allwinner H5 SoC is pin-compatible to the H3 SoC, but with the -Cortex-A7 cores replaced by Cortex-A53 cores and the MMC controller -updated. So we should really share almost the whole .dtsi. -In preparation for that move the peripheral parts of the existing -sun8i-h3.dtsi into a new sunxi-h3-h5.dtsi. -The actual sun8i-h3.dtsi then includes that and defines the H3 specific -parts on top of it. - -Signed-off-by: Andre Przywara -[Icenowy: also split out mmc and gic, as well as pio and ccu's - compatible, and make drop of skeleton into a seperated patch] -Signed-off-by: Icenowy Zheng ---- -Changes in v8: -- Add h3: in commit message. -Changes in v7: -- Extract GIC, skeleton.dtsi and pinctrl-a10.h changes to seperate patches. -Changes in v6: -- Extract GIC device node to sunxi-h3-h5.dtsi and correct its compatible - as "arm,gic-400". -Changes in v3: -- Use label-based syntax to reference nodes in H3 DTSI file. -Changes in v2: -- Rebase on current linux-next (because of the add of audio codec) - - arch/arm/boot/dts/sun8i-h3.dtsi | 771 ++++----------------- - .../boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} | 73 +- - 2 files changed, 133 insertions(+), 711 deletions(-) - rewrite arch/arm/boot/dts/sun8i-h3.dtsi (83%) - copy arch/arm/boot/dts/{sun8i-h3.dtsi => sunxi-h3-h5.dtsi} (90%) - -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi -dissimilarity index 83% -index c13fbfb92592..b36f9f423c39 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sun8i-h3.dtsi -@@ -1,645 +1,126 @@ --/* -- * Copyright (C) 2015 Jens Kuske -- * -- * This file is dual-licensed: you can use it either under the terms -- * of the GPL or the X11 license, at your option. Note that this dual -- * licensing only applies to this file, and not this project as a -- * whole. -- * -- * a) This file is free software; you can redistribute it and/or -- * modify it under the terms of the GNU General Public License as -- * published by the Free Software Foundation; either version 2 of the -- * License, or (at your option) any later version. -- * -- * This file is distributed in the hope that it will be useful, -- * but WITHOUT ANY WARRANTY; without even the implied warranty of -- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- * GNU General Public License for more details. -- * -- * Or, alternatively, -- * -- * b) Permission is hereby granted, free of charge, to any person -- * obtaining a copy of this software and associated documentation -- * files (the "Software"), to deal in the Software without -- * restriction, including without limitation the rights to use, -- * copy, modify, merge, publish, distribute, sublicense, and/or -- * sell copies of the Software, and to permit persons to whom the -- * Software is furnished to do so, subject to the following -- * conditions: -- * -- * The above copyright notice and this permission notice shall be -- * included in all copies or substantial portions of the Software. -- * -- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -- * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -- * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -- * OTHER DEALINGS IN THE SOFTWARE. -- */ -- --#include --#include --#include -- --/ { -- interrupt-parent = <&gic>; -- -- cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- -- cpu@0 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <0>; -- }; -- -- cpu@1 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <1>; -- }; -- -- cpu@2 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <2>; -- }; -- -- cpu@3 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <3>; -- }; -- }; -- -- timer { -- compatible = "arm,armv7-timer"; -- interrupts = , -- , -- , -- ; -- }; -- -- clocks { -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- -- osc24M: osc24M_clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <24000000>; -- clock-output-names = "osc24M"; -- }; -- -- osc32k: osc32k_clk { -- #clock-cells = <0>; -- compatible = "fixed-clock"; -- clock-frequency = <32768>; -- clock-output-names = "osc32k"; -- }; -- -- apb0: apb0_clk { -- compatible = "fixed-factor-clock"; -- #clock-cells = <0>; -- clock-div = <1>; -- clock-mult = <1>; -- clocks = <&osc24M>; -- clock-output-names = "apb0"; -- }; -- -- apb0_gates: clk@01f01428 { -- compatible = "allwinner,sun8i-h3-apb0-gates-clk", -- "allwinner,sun4i-a10-gates-clk"; -- reg = <0x01f01428 0x4>; -- #clock-cells = <1>; -- clocks = <&apb0>; -- clock-indices = <0>, <1>; -- clock-output-names = "apb0_pio", "apb0_ir"; -- }; -- -- ir_clk: ir_clk@01f01454 { -- compatible = "allwinner,sun4i-a10-mod0-clk"; -- reg = <0x01f01454 0x4>; -- #clock-cells = <0>; -- clocks = <&osc32k>, <&osc24M>; -- clock-output-names = "ir"; -- }; -- }; -- -- soc { -- compatible = "simple-bus"; -- #address-cells = <1>; -- #size-cells = <1>; -- ranges; -- -- dma: dma-controller@01c02000 { -- compatible = "allwinner,sun8i-h3-dma"; -- reg = <0x01c02000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_DMA>; -- resets = <&ccu RST_BUS_DMA>; -- #dma-cells = <1>; -- }; -- -- mmc0: mmc@01c0f000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c0f000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC0>, -- <&ccu CLK_MMC0>, -- <&ccu CLK_MMC0_OUTPUT>, -- <&ccu CLK_MMC0_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC0>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- mmc1: mmc@01c10000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c10000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC1>, -- <&ccu CLK_MMC1>, -- <&ccu CLK_MMC1_OUTPUT>, -- <&ccu CLK_MMC1_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC1>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- mmc2: mmc@01c11000 { -- compatible = "allwinner,sun7i-a20-mmc"; -- reg = <0x01c11000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC2>, -- <&ccu CLK_MMC2>, -- <&ccu CLK_MMC2_OUTPUT>, -- <&ccu CLK_MMC2_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; -- resets = <&ccu RST_BUS_MMC2>; -- reset-names = "ahb"; -- interrupts = ; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- usbphy: phy@01c19400 { -- compatible = "allwinner,sun8i-h3-usb-phy"; -- reg = <0x01c19400 0x2c>, -- <0x01c1a800 0x4>, -- <0x01c1b800 0x4>, -- <0x01c1c800 0x4>, -- <0x01c1d800 0x4>; -- reg-names = "phy_ctrl", -- "pmu0", -- "pmu1", -- "pmu2", -- "pmu3"; -- clocks = <&ccu CLK_USB_PHY0>, -- <&ccu CLK_USB_PHY1>, -- <&ccu CLK_USB_PHY2>, -- <&ccu CLK_USB_PHY3>; -- clock-names = "usb0_phy", -- "usb1_phy", -- "usb2_phy", -- "usb3_phy"; -- resets = <&ccu RST_USB_PHY0>, -- <&ccu RST_USB_PHY1>, -- <&ccu RST_USB_PHY2>, -- <&ccu RST_USB_PHY3>; -- reset-names = "usb0_reset", -- "usb1_reset", -- "usb2_reset", -- "usb3_reset"; -- status = "disabled"; -- #phy-cells = <1>; -- }; -- -- ehci1: usb@01c1b000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1b000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>; -- resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; -- phys = <&usbphy 1>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci1: usb@01c1b400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1b400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI1>, <&ccu CLK_BUS_OHCI1>, -- <&ccu CLK_USB_OHCI1>; -- resets = <&ccu RST_BUS_EHCI1>, <&ccu RST_BUS_OHCI1>; -- phys = <&usbphy 1>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ehci2: usb@01c1c000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1c000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>; -- resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; -- phys = <&usbphy 2>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci2: usb@01c1c400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1c400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI2>, <&ccu CLK_BUS_OHCI2>, -- <&ccu CLK_USB_OHCI2>; -- resets = <&ccu RST_BUS_EHCI2>, <&ccu RST_BUS_OHCI2>; -- phys = <&usbphy 2>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ehci3: usb@01c1d000 { -- compatible = "allwinner,sun8i-h3-ehci", "generic-ehci"; -- reg = <0x01c1d000 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>; -- resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; -- phys = <&usbphy 3>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ohci3: usb@01c1d400 { -- compatible = "allwinner,sun8i-h3-ohci", "generic-ohci"; -- reg = <0x01c1d400 0x100>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_EHCI3>, <&ccu CLK_BUS_OHCI3>, -- <&ccu CLK_USB_OHCI3>; -- resets = <&ccu RST_BUS_EHCI3>, <&ccu RST_BUS_OHCI3>; -- phys = <&usbphy 3>; -- phy-names = "usb"; -- status = "disabled"; -- }; -- -- ccu: clock@01c20000 { -- compatible = "allwinner,sun8i-h3-ccu"; -- reg = <0x01c20000 0x400>; -- clocks = <&osc24M>, <&osc32k>; -- clock-names = "hosc", "losc"; -- #clock-cells = <1>; -- #reset-cells = <1>; -- }; -- -- pio: pinctrl@01c20800 { -- compatible = "allwinner,sun8i-h3-pinctrl"; -- reg = <0x01c20800 0x400>; -- interrupts = , -- ; -- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>; -- clock-names = "apb", "hosc", "losc"; -- gpio-controller; -- #gpio-cells = <3>; -- interrupt-controller; -- #interrupt-cells = <3>; -- -- i2c0_pins: i2c0 { -- pins = "PA11", "PA12"; -- function = "i2c0"; -- }; -- -- i2c1_pins: i2c1 { -- pins = "PA18", "PA19"; -- function = "i2c1"; -- }; -- -- i2c2_pins: i2c2 { -- pins = "PE12", "PE13"; -- function = "i2c2"; -- }; -- -- mmc0_pins_a: mmc0@0 { -- pins = "PF0", "PF1", "PF2", "PF3", -- "PF4", "PF5"; -- function = "mmc0"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- mmc0_cd_pin: mmc0_cd_pin@0 { -- pins = "PF6"; -- function = "gpio_in"; -- bias-pull-up; -- }; -- -- mmc1_pins_a: mmc1@0 { -- pins = "PG0", "PG1", "PG2", "PG3", -- "PG4", "PG5"; -- function = "mmc1"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- mmc2_8bit_pins: mmc2_8bit { -- pins = "PC5", "PC6", "PC8", -- "PC9", "PC10", "PC11", -- "PC12", "PC13", "PC14", -- "PC15", "PC16"; -- function = "mmc2"; -- drive-strength = <30>; -- bias-pull-up; -- }; -- -- spdif_tx_pins_a: spdif@0 { -- pins = "PA17"; -- function = "spdif"; -- }; -- -- spi0_pins: spi0 { -- pins = "PC0", "PC1", "PC2", "PC3"; -- function = "spi0"; -- }; -- -- spi1_pins: spi1 { -- pins = "PA15", "PA16", "PA14", "PA13"; -- function = "spi1"; -- }; -- -- uart0_pins_a: uart0@0 { -- pins = "PA4", "PA5"; -- function = "uart0"; -- }; -- -- uart1_pins: uart1 { -- pins = "PG6", "PG7"; -- function = "uart1"; -- }; -- -- uart1_rts_cts_pins: uart1_rts_cts { -- pins = "PG8", "PG9"; -- function = "uart1"; -- }; -- -- uart2_pins: uart2 { -- pins = "PA0", "PA1"; -- function = "uart2"; -- }; -- -- uart3_pins: uart3 { -- pins = "PA13", "PA14"; -- function = "uart3"; -- }; -- }; -- -- timer@01c20c00 { -- compatible = "allwinner,sun4i-a10-timer"; -- reg = <0x01c20c00 0xa0>; -- interrupts = , -- ; -- clocks = <&osc24M>; -- }; -- -- spi0: spi@01c68000 { -- compatible = "allwinner,sun8i-h3-spi"; -- reg = <0x01c68000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPI0>, <&ccu CLK_SPI0>; -- clock-names = "ahb", "mod"; -- dmas = <&dma 23>, <&dma 23>; -- dma-names = "rx", "tx"; -- pinctrl-names = "default"; -- pinctrl-0 = <&spi0_pins>; -- resets = <&ccu RST_BUS_SPI0>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- spi1: spi@01c69000 { -- compatible = "allwinner,sun8i-h3-spi"; -- reg = <0x01c69000 0x1000>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPI1>, <&ccu CLK_SPI1>; -- clock-names = "ahb", "mod"; -- dmas = <&dma 24>, <&dma 24>; -- dma-names = "rx", "tx"; -- pinctrl-names = "default"; -- pinctrl-0 = <&spi1_pins>; -- resets = <&ccu RST_BUS_SPI1>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- wdt0: watchdog@01c20ca0 { -- compatible = "allwinner,sun6i-a31-wdt"; -- reg = <0x01c20ca0 0x20>; -- interrupts = ; -- }; -- -- spdif: spdif@01c21000 { -- #sound-dai-cells = <0>; -- compatible = "allwinner,sun8i-h3-spdif"; -- reg = <0x01c21000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_SPDIF>, <&ccu CLK_SPDIF>; -- resets = <&ccu RST_BUS_SPDIF>; -- clock-names = "apb", "spdif"; -- dmas = <&dma 2>; -- dma-names = "tx"; -- status = "disabled"; -- }; -- -- pwm: pwm@01c21400 { -- compatible = "allwinner,sun8i-h3-pwm"; -- reg = <0x01c21400 0x8>; -- clocks = <&osc24M>; -- #pwm-cells = <3>; -- status = "disabled"; -- }; -- -- codec: codec@01c22c00 { -- #sound-dai-cells = <0>; -- compatible = "allwinner,sun8i-h3-codec"; -- reg = <0x01c22c00 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>; -- clock-names = "apb", "codec"; -- resets = <&ccu RST_BUS_CODEC>; -- dmas = <&dma 15>, <&dma 15>; -- dma-names = "rx", "tx"; -- allwinner,codec-analog-controls = <&codec_analog>; -- status = "disabled"; -- }; -- -- uart0: serial@01c28000 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28000 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART0>; -- resets = <&ccu RST_BUS_UART0>; -- dmas = <&dma 6>, <&dma 6>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart1: serial@01c28400 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28400 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART1>; -- resets = <&ccu RST_BUS_UART1>; -- dmas = <&dma 7>, <&dma 7>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart2: serial@01c28800 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28800 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART2>; -- resets = <&ccu RST_BUS_UART2>; -- dmas = <&dma 8>, <&dma 8>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- uart3: serial@01c28c00 { -- compatible = "snps,dw-apb-uart"; -- reg = <0x01c28c00 0x400>; -- interrupts = ; -- reg-shift = <2>; -- reg-io-width = <4>; -- clocks = <&ccu CLK_BUS_UART3>; -- resets = <&ccu RST_BUS_UART3>; -- dmas = <&dma 9>, <&dma 9>; -- dma-names = "rx", "tx"; -- status = "disabled"; -- }; -- -- i2c0: i2c@01c2ac00 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2ac00 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C0>; -- resets = <&ccu RST_BUS_I2C0>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c0_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- i2c1: i2c@01c2b000 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2b000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C1>; -- resets = <&ccu RST_BUS_I2C1>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c1_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- i2c2: i2c@01c2b400 { -- compatible = "allwinner,sun6i-a31-i2c"; -- reg = <0x01c2b000 0x400>; -- interrupts = ; -- clocks = <&ccu CLK_BUS_I2C2>; -- resets = <&ccu RST_BUS_I2C2>; -- pinctrl-names = "default"; -- pinctrl-0 = <&i2c2_pins>; -- status = "disabled"; -- #address-cells = <1>; -- #size-cells = <0>; -- }; -- -- gic: interrupt-controller@01c81000 { -- compatible = "arm,gic-400"; -- reg = <0x01c81000 0x1000>, -- <0x01c82000 0x2000>, -- <0x01c84000 0x2000>, -- <0x01c86000 0x2000>; -- interrupt-controller; -- #interrupt-cells = <3>; -- interrupts = ; -- }; -- -- rtc: rtc@01f00000 { -- compatible = "allwinner,sun6i-a31-rtc"; -- reg = <0x01f00000 0x54>; -- interrupts = , -- ; -- }; -- -- apb0_reset: reset@01f014b0 { -- reg = <0x01f014b0 0x4>; -- compatible = "allwinner,sun6i-a31-clock-reset"; -- #reset-cells = <1>; -- }; -- -- codec_analog: codec-analog@01f015c0 { -- compatible = "allwinner,sun8i-h3-codec-analog"; -- reg = <0x01f015c0 0x4>; -- }; -- -- ir: ir@01f02000 { -- compatible = "allwinner,sun5i-a13-ir"; -- clocks = <&apb0_gates 1>, <&ir_clk>; -- clock-names = "apb", "ir"; -- resets = <&apb0_reset 1>; -- interrupts = ; -- reg = <0x01f02000 0x40>; -- status = "disabled"; -- }; -- -- r_pio: pinctrl@01f02c00 { -- compatible = "allwinner,sun8i-h3-r-pinctrl"; -- reg = <0x01f02c00 0x400>; -- interrupts = ; -- clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>; -- clock-names = "apb", "hosc", "losc"; -- resets = <&apb0_reset 0>; -- gpio-controller; -- #gpio-cells = <3>; -- interrupt-controller; -- #interrupt-cells = <3>; -- -- ir_pins_a: ir@0 { -- pins = "PL11"; -- function = "s_cir_rx"; -- }; -- }; -- }; --}; -+/* -+ * Copyright (C) 2015 Jens Kuske -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+#include "sunxi-h3-h5.dtsi" -+ -+/ { -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu@0 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <0>; -+ }; -+ -+ cpu@1 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <1>; -+ }; -+ -+ cpu@2 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <2>; -+ }; -+ -+ cpu@3 { -+ compatible = "arm,cortex-a7"; -+ device_type = "cpu"; -+ reg = <3>; -+ }; -+ }; -+ -+ timer { -+ compatible = "arm,armv7-timer"; -+ interrupts = , -+ , -+ , -+ ; -+ }; -+}; -+ -+&ccu { -+ compatible = "allwinner,sun8i-h3-ccu"; -+}; -+ -+&mmc0 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC0>, -+ <&ccu CLK_MMC0>, -+ <&ccu CLK_MMC0_OUTPUT>, -+ <&ccu CLK_MMC0_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&mmc1 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC1>, -+ <&ccu CLK_MMC1>, -+ <&ccu CLK_MMC1_OUTPUT>, -+ <&ccu CLK_MMC1_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&mmc2 { -+ compatible = "allwinner,sun7i-a20-mmc"; -+ clocks = <&ccu CLK_BUS_MMC2>, -+ <&ccu CLK_MMC2>, -+ <&ccu CLK_MMC2_OUTPUT>, -+ <&ccu CLK_MMC2_SAMPLE>; -+ clock-names = "ahb", -+ "mmc", -+ "output", -+ "sample"; -+}; -+ -+&pio { -+ compatible = "allwinner,sun8i-h3-pinctrl"; -+}; -diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -similarity index 90% -copy from arch/arm/boot/dts/sun8i-h3.dtsi -copy to arch/arm/boot/dts/sunxi-h3-h5.dtsi -index c13fbfb92592..2494ea063cd4 100644 ---- a/arch/arm/boot/dts/sun8i-h3.dtsi -+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi -@@ -46,43 +46,8 @@ - - / { - interrupt-parent = <&gic>; -- -- cpus { -- #address-cells = <1>; -- #size-cells = <0>; -- -- cpu@0 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <0>; -- }; -- -- cpu@1 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <1>; -- }; -- -- cpu@2 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <2>; -- }; -- -- cpu@3 { -- compatible = "arm,cortex-a7"; -- device_type = "cpu"; -- reg = <3>; -- }; -- }; -- -- timer { -- compatible = "arm,armv7-timer"; -- interrupts = , -- , -- , -- ; -- }; -+ #address-cells = <1>; -+ #size-cells = <1>; - - clocks { - #address-cells = <1>; -@@ -147,16 +112,8 @@ - }; - - mmc0: mmc@01c0f000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c0f000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC0>, -- <&ccu CLK_MMC0>, -- <&ccu CLK_MMC0_OUTPUT>, -- <&ccu CLK_MMC0_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC0>; - reset-names = "ahb"; - interrupts = ; -@@ -166,16 +123,8 @@ - }; - - mmc1: mmc@01c10000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c10000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC1>, -- <&ccu CLK_MMC1>, -- <&ccu CLK_MMC1_OUTPUT>, -- <&ccu CLK_MMC1_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC1>; - reset-names = "ahb"; - interrupts = ; -@@ -185,16 +134,8 @@ - }; - - mmc2: mmc@01c11000 { -- compatible = "allwinner,sun7i-a20-mmc"; -+ /* compatible and clocks are in per SoC .dtsi file */ - reg = <0x01c11000 0x1000>; -- clocks = <&ccu CLK_BUS_MMC2>, -- <&ccu CLK_MMC2>, -- <&ccu CLK_MMC2_OUTPUT>, -- <&ccu CLK_MMC2_SAMPLE>; -- clock-names = "ahb", -- "mmc", -- "output", -- "sample"; - resets = <&ccu RST_BUS_MMC2>; - reset-names = "ahb"; - interrupts = ; -@@ -305,7 +246,7 @@ - }; - - ccu: clock@01c20000 { -- compatible = "allwinner,sun8i-h3-ccu"; -+ /* compatible is in per SoC .dtsi file */ - reg = <0x01c20000 0x400>; - clocks = <&osc24M>, <&osc32k>; - clock-names = "hosc", "losc"; -@@ -314,7 +255,7 @@ - }; - - pio: pinctrl@01c20800 { -- compatible = "allwinner,sun8i-h3-pinctrl"; -+ /* compatible is in per SoC .dtsi file */ - reg = <0x01c20800 0x400>; - interrupts = , - ; diff --git a/arm-imx6-hummingboard2.patch b/arm-imx6-hummingboard2.patch index bcb9321..9c55a7b 100644 --- a/arm-imx6-hummingboard2.patch +++ b/arm-imx6-hummingboard2.patch @@ -26,21 +26,21 @@ index 011808490fed..ccdff6650541 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -353,6 +353,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw552x.dtb \ - imx6dl-gw553x.dtb \ + imx6dl-gw5903.dtb \ + imx6dl-gw5904.dtb \ imx6dl-hummingboard.dtb \ + imx6dl-hummingboard2.dtb \ imx6dl-icore.dtb \ imx6dl-icore-rqs.dtb \ imx6dl-nit6xlite.dtb \ @@ -397,6 +398,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw553x.dtb \ + imx6q-gw5904.dtb \ imx6q-h100.dtb \ imx6q-hummingboard.dtb \ + imx6q-hummingboard2.dtb \ imx6q-icore.dtb \ - imx6q-icore-rqs.dtb \ - imx6q-marsboard.dtb \ + imx6q-icore-ofcap10.dtb \ + imx6q-icore-ofcap12.dtb \ diff --git a/arch/arm/boot/dts/imx6dl-hummingboard2.dts b/arch/arm/boot/dts/imx6dl-hummingboard2.dts new file mode 100644 index 000000000000..990b5050de5b diff --git a/arm-rk3288-tinker.patch b/arm-rk3288-tinker.patch deleted file mode 100644 index d7a4897..0000000 --- a/arm-rk3288-tinker.patch +++ /dev/null @@ -1,573 +0,0 @@ -From 223599514133293bb9afe7b82937140c3b275877 Mon Sep 17 00:00:00 2001 -From: Eddie Cai -Date: Tue, 14 Feb 2017 18:07:31 +0800 -Subject: ARM: dts: rockchip: add dts for RK3288-Tinker board - -This patch add basic support for RK3288-Tinker board. We can boot in to rootfs -with this patch. - -Signed-off-by: Eddie Cai -Signed-off-by: Heiko Stuebner ---- - arch/arm/boot/dts/Makefile | 1 + - arch/arm/boot/dts/rk3288-tinker.dts | 536 ++++++++++++++++++++++++++++++++++++ - 2 files changed, 537 insertions(+) - create mode 100644 arch/arm/boot/dts/rk3288-tinker.dts - -diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile -index 0118084..fb46849 100644 ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -695,6 +695,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \ - rk3288-popmetal.dtb \ - rk3288-r89.dtb \ - rk3288-rock2-square.dtb \ -+ rk3288-tinker.dtb \ - rk3288-veyron-brain.dtb \ - rk3288-veyron-jaq.dtb \ - rk3288-veyron-jerry.dtb \ -diff --git a/arch/arm/boot/dts/rk3288-tinker.dts b/arch/arm/boot/dts/rk3288-tinker.dts -new file mode 100644 -index 0000000..f601c78 ---- /dev/null -+++ b/arch/arm/boot/dts/rk3288-tinker.dts -@@ -0,0 +1,536 @@ -+/* -+ * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd. -+ * -+ * This file is dual-licensed: you can use it either under the terms -+ * of the GPL or the X11 license, at your option. Note that this dual -+ * licensing only applies to this file, and not this project as a -+ * whole. -+ * -+ * a) This file is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This file is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * Or, alternatively, -+ * -+ * b) Permission is hereby granted, free of charge, to any person -+ * obtaining a copy of this software and associated documentation -+ * files (the "Software"), to deal in the Software without -+ * restriction, including without limitation the rights to use, -+ * copy, modify, merge, publish, distribute, sublicense, and/or -+ * sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following -+ * conditions: -+ * -+ * The above copyright notice and this permission notice shall be -+ * included in all copies or substantial portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES -+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT -+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR -+ * OTHER DEALINGS IN THE SOFTWARE. -+ */ -+ -+/dts-v1/; -+ -+#include "rk3288.dtsi" -+#include -+ -+/ { -+ model = "Rockchip RK3288 Tinker Board"; -+ compatible = "asus,rk3288-tinker", "rockchip,rk3288"; -+ -+ memory { -+ reg = <0x0 0x80000000>; -+ device_type = "memory"; -+ }; -+ -+ ext_gmac: external-gmac-clock { -+ compatible = "fixed-clock"; -+ #clock-cells = <0>; -+ clock-frequency = <125000000>; -+ clock-output-names = "ext_gmac"; -+ }; -+ -+ gpio-keys { -+ compatible = "gpio-keys"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ autorepeat; -+ -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pwrbtn>; -+ -+ button@0 { -+ gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ label = "GPIO Key Power"; -+ linux,input-type = <1>; -+ wakeup-source; -+ debounce-interval = <100>; -+ }; -+ }; -+ -+ gpio-leds { -+ compatible = "gpio-leds"; -+ -+ act-led { -+ gpios=<&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger="mmc0"; -+ }; -+ -+ heartbeat-led { -+ gpios=<&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger="heartbeat"; -+ }; -+ -+ pwr-led { -+ gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; -+ linux,default-trigger = "default-on"; -+ }; -+ }; -+ -+ sound { -+ compatible = "simple-audio-card"; -+ simple-audio-card,format = "i2s"; -+ simple-audio-card,name = "rockchip,tinker-codec"; -+ simple-audio-card,mclk-fs = <512>; -+ -+ simple-audio-card,codec { -+ sound-dai = <&hdmi>; -+ }; -+ -+ simple-audio-card,cpu { -+ sound-dai = <&i2s>; -+ }; -+ }; -+ -+ vcc_sys: vsys-regulator { -+ compatible = "regulator-fixed"; -+ regulator-name = "vcc_sys"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+ -+ vcc_sd: sdmmc-regulator { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio7 11 GPIO_ACTIVE_LOW>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_pwr>; -+ regulator-name = "vcc_sd"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ startup-delay-us = <100000>; -+ vin-supply = <&vcc_io>; -+ }; -+}; -+ -+&cpu0 { -+ cpu0-supply = <&vdd_cpu>; -+}; -+ -+&gmac { -+ assigned-clocks = <&cru SCLK_MAC>; -+ assigned-clock-parents = <&ext_gmac>; -+ clock_in_out = "input"; -+ phy-mode = "rgmii"; -+ phy-supply = <&vcc33_lan>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rgmii_pins>; -+ snps,reset-gpio = <&gpio4 7 0>; -+ snps,reset-active-low; -+ snps,reset-delays-us = <0 10000 1000000>; -+ tx_delay = <0x30>; -+ rx_delay = <0x10>; -+ status = "ok"; -+}; -+ -+&hdmi { -+ ddc-i2c-bus = <&i2c5>; -+ status = "okay"; -+}; -+ -+&i2c0 { -+ clock-frequency = <400000>; -+ status = "okay"; -+ -+ rk808: pmic@1b { -+ compatible = "rockchip,rk808"; -+ reg = <0x1b>; -+ interrupt-parent = <&gpio0>; -+ interrupts = <4 IRQ_TYPE_LEVEL_LOW>; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk808-clkout2"; -+ dvs-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>, -+ <&gpio0 12 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pmic_int &global_pwroff &dvs_1 &dvs_2>; -+ rockchip,system-power-controller; -+ wakeup-source; -+ -+ vcc1-supply = <&vcc_sys>; -+ vcc2-supply = <&vcc_sys>; -+ vcc3-supply = <&vcc_sys>; -+ vcc4-supply = <&vcc_sys>; -+ vcc6-supply = <&vcc_sys>; -+ vcc7-supply = <&vcc_sys>; -+ vcc8-supply = <&vcc_io>; -+ vcc9-supply = <&vcc_io>; -+ vcc10-supply = <&vcc_io>; -+ vcc11-supply = <&vcc_sys>; -+ vcc12-supply = <&vcc_io>; -+ vddio-supply = <&vcc_io>; -+ -+ regulators { -+ vdd_cpu: DCDC_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <750000>; -+ regulator-max-microvolt = <1350000>; -+ regulator-name = "vdd_arm"; -+ regulator-ramp-delay = <6000>; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_gpu: DCDC_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <850000>; -+ regulator-max-microvolt = <1250000>; -+ regulator-name = "vdd_gpu"; -+ regulator-ramp-delay = <6000>; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc_ddr"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_io: DCDC_REG4 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc_io"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc18_ldo1: LDO_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_ldo1"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc33_mipi: LDO_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vcc33_mipi"; -+ regulator-state-mem { -+ regulator-off-in-suspend; -+ }; -+ }; -+ -+ vdd_10: LDO_REG3 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-name = "vdd_10"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc18_codec: LDO_REG4 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_codec"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vccio_sd: LDO_REG5 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-name = "vccio_sd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vdd10_lcd: LDO_REG6 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ regulator-name = "vdd10_lcd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vcc_18: LDO_REG7 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc_18"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc18_lcd: LDO_REG8 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ regulator-name = "vcc18_lcd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc33_sd: SWITCH_REG1 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc33_sd"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc33_lan: SWITCH_REG2 { -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-name = "vcc33_lan"; -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&i2c2 { -+ status = "okay"; -+}; -+ -+&i2c5 { -+ status = "okay"; -+}; -+ -+&i2s { -+ #sound-dai-cells = <0>; -+ status = "okay"; -+}; -+ -+&io_domains { -+ status = "okay"; -+ -+ sdcard-supply = <&vccio_sd>; -+}; -+ -+&pinctrl { -+ pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma { -+ drive-strength = <8>; -+ }; -+ -+ pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma { -+ bias-pull-up; -+ drive-strength = <8>; -+ }; -+ -+ backlight { -+ bl_en: bl-en { -+ rockchip,pins = <7 2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ buttons { -+ pwrbtn: pwrbtn { -+ rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ eth_phy { -+ eth_phy_pwr: eth-phy-pwr { -+ rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int: pmic-int { -+ rockchip,pins = ; -+ }; -+ -+ dvs_1: dvs-1 { -+ rockchip,pins = ; -+ }; -+ -+ dvs_2: dvs-2 { -+ rockchip,pins = ; -+ }; -+ }; -+ -+ sdmmc { -+ sdmmc_bus4: sdmmc-bus4 { -+ rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 17 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 18 RK_FUNC_1 &pcfg_pull_up_drv_8ma>, -+ <6 19 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; -+ }; -+ -+ sdmmc_clk: sdmmc-clk { -+ rockchip,pins = <6 20 RK_FUNC_1 \ -+ &pcfg_pull_none_drv_8ma>; -+ }; -+ -+ sdmmc_cmd: sdmmc-cmd { -+ rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_up_drv_8ma>; -+ }; -+ -+ sdmmc_pwr: sdmmc-pwr { -+ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ usb { -+ host_vbus_drv: host-vbus-drv { -+ rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ pwr_3g: pwr-3g { -+ rockchip,pins = <7 8 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+}; -+ -+&pwm0 { -+ status = "okay"; -+}; -+ -+&saradc { -+ vref-supply = <&vcc18_ldo1>; -+ status ="okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-mmc-highspeed; -+ cap-sd-highspeed; -+ card-detect-delay = <200>; -+ disable-wp; /* wp not hooked up */ -+ num-slots = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; -+ status = "okay"; -+ vmmc-supply = <&vcc33_sd>; -+ vqmmc-supply = <&vccio_sd>; -+}; -+ -+&tsadc { -+ rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ -+ rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ -+ status = "okay"; -+}; -+ -+&uart0 { -+ status = "okay"; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&uart3 { -+ status = "okay"; -+}; -+ -+&uart4 { -+ status = "okay"; -+}; -+ -+&usbphy { -+ status = "okay"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host1 { -+ status = "okay"; -+}; -+ -+&usb_otg { -+ status= "okay"; -+}; -+ -+&vopb { -+ status = "okay"; -+}; -+ -+&vopb_mmu { -+ status = "okay"; -+}; -+ -+&vopl { -+ status = "okay"; -+}; -+ -+&vopl_mmu { -+ status = "okay"; -+}; -+ -+&wdt { -+ status = "okay"; -+}; --- -cgit v1.1 - diff --git a/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS b/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS new file mode 100644 index 0000000..33e5c6a --- /dev/null +++ b/baseconfig/arm/armv7/armv7/CONFIG_IMX7_PM_DOMAINS @@ -0,0 +1 @@ +CONFIG_IMX7_PM_DOMAINS=y diff --git a/bcm283x-hdmi-audio.patch b/bcm283x-hdmi-audio.patch deleted file mode 100644 index 8c96244..0000000 --- a/bcm283x-hdmi-audio.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 25ea82d7f7c869ff81ff8e64d24c5c4a896239fe Mon Sep 17 00:00:00 2001 -From: Boris Brezillon -Date: Mon, 27 Feb 2017 12:28:03 -0800 -Subject: [PATCH 3/3] ARM: dts: bcm283x: Add HDMI audio related properties - -Add the dmas and dma-names properties to support HDMI audio. - -Signed-off-by: Boris Brezillon -Signed-off-by: Eric Anholt ---- - arch/arm/boot/dts/bcm283x.dtsi | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi -index a3106aa446c6..a31b0b303ddc 100644 ---- a/arch/arm/boot/dts/bcm283x.dtsi -+++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -499,6 +499,8 @@ - clocks = <&clocks BCM2835_PLLH_PIX>, - <&clocks BCM2835_CLOCK_HSM>; - clock-names = "pixel", "hdmi"; -+ dmas = <&dma 17>; -+ dma-names = "audio-rx"; - status = "disabled"; - }; - --- -2.12.0 - diff --git a/geekbox-v4-device-tree-support.patch b/geekbox-v4-device-tree-support.patch index 54f2bbe..2ea4bd6 100644 --- a/geekbox-v4-device-tree-support.patch +++ b/geekbox-v4-device-tree-support.patch @@ -36,7 +36,7 @@ diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchi index 87669f6..9aec54e 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -1,6 +1,7 @@ +@@ -2,6 +2,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb diff --git a/gitrev b/gitrev index 2e3f6b0..7dacb5d 100644 --- a/gitrev +++ b/gitrev @@ -1 +1 @@ -2868b2513aa732a99ea4a0a6bf10dc93c1f3dac2 +56868a460b83c0f93d339256a81064d89aadae8e diff --git a/kernel-armv7hl-debug.config b/kernel-armv7hl-debug.config index eee4283..ff9dc5b 100644 --- a/kernel-armv7hl-debug.config +++ b/kernel-armv7hl-debug.config @@ -2245,6 +2245,7 @@ CONFIG_IMA_MEASURE_PCR_IDX=10 # CONFIG_IMG_ASCII_LCD is not set CONFIG_IMX2_WDT=m CONFIG_IMX7D_ADC=m +CONFIG_IMX7_PM_DOMAINS=y CONFIG_IMX_DMA=m CONFIG_IMX_GPCV2=y CONFIG_IMX_IPUV3_CORE=m diff --git a/kernel-armv7hl.config b/kernel-armv7hl.config index 66e152d..2e91809 100644 --- a/kernel-armv7hl.config +++ b/kernel-armv7hl.config @@ -2228,6 +2228,7 @@ CONFIG_IMA_MEASURE_PCR_IDX=10 # CONFIG_IMG_ASCII_LCD is not set CONFIG_IMX2_WDT=m CONFIG_IMX7D_ADC=m +CONFIG_IMX7_PM_DOMAINS=y CONFIG_IMX_DMA=m CONFIG_IMX_GPCV2=y CONFIG_IMX_IPUV3_CORE=m diff --git a/kernel.spec b/kernel.spec index 43b0e1f..b885680 100644 --- a/kernel.spec +++ b/kernel.spec @@ -69,7 +69,7 @@ Summary: The Linux kernel # The rc snapshot level %global rcrev 0 # The git snapshot level -%define gitrev 6 +%define gitrev 7 # Set rpm version accordingly %define rpmversion 4.%{upstream_sublevel}.0 %endif @@ -525,7 +525,6 @@ Patch424: arm64-mm-Fix-memmap-to-be-initialized-for-the-entire-section.patch # http://patchwork.ozlabs.org/patch/587554/ Patch425: ARM-tegra-usb-no-reset.patch -Patch426: AllWinner-h3.patch Patch427: AllWinner-net-emac.patch Patch429: arm64-hikey-fixes.patch @@ -533,16 +532,12 @@ Patch429: arm64-hikey-fixes.patch # http://www.spinics.net/lists/devicetree/msg163238.html Patch430: bcm2837-initial-support.patch -Patch431: arm-rk3288-tinker.patch - # http://www.spinics.net/lists/dri-devel/msg132235.html Patch433: drm-vc4-Fix-OOPSes-from-trying-to-cache-a-partially-constructed-BO..patch # Upstream fixes for i2c/serial/ethernet MAC addresses Patch435: bcm283x-fixes.patch -Patch437: bcm283x-hdmi-audio.patch - # https://www.spinics.net/lists/arm-kernel/msg554183.html Patch438: arm-imx6-hummingboard2.patch @@ -2175,6 +2170,9 @@ fi # # %changelog +* Wed May 10 2017 Justin M. Forbes - 4.12.0-0.rc0.git7.1 +- Linux v4.11-12441-g56868a4 + * Tue May 09 2017 Justin M. Forbes - 4.12.0-0.rc0.git6.1 - Linux v4.11-11413-g2868b25 diff --git a/sources b/sources index e07efc5..ec43689 100644 --- a/sources +++ b/sources @@ -1,3 +1,3 @@ SHA512 (perf-man-4.11.tar.gz) = f6dec8c3a296fc5bb1dd58011d7d1340550b9f4f228169bab079b0b36f2d5d96784b808765acda2d547719f6e9fd73b2855ab825dfe4fea8af43c55e5786f8d6 SHA512 (linux-4.11.tar.xz) = 6610eed97ffb7207c71771198c36179b8244ace7222bebb109507720e26c5f17d918079a56d5febdd8605844d67fb2df0ebe910fa2f2f53690daf6e2a8ad09c3 -SHA512 (patch-4.11-git6.xz) = 1993c0fb4a8ab1f21bfe79193a674356ee42c49e758e73f5cff9dee52c0ffd44e08227c1f10b40114ecb30d1de6cb6fe64bfdf2bcf92cf679350257dd53aa184 +SHA512 (patch-4.11-git7.xz) = 735f8f58a60f04e7be122c75cf9e9f37422b7ca734ad671a56db759d849431be2e59d827e458aa97f4d13d31acf4ba3c3f127ba94f59b1677eea791e3115155a