Blame leveldb-0002-Add-memory-barrier-on-a-more-arches.patch
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From d024d7fdb808dd4d3e8ad57b83aa3441129c8276 Mon Sep 17 00:00:00 2001
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From: Peter Lemenkov <lemenkov@gmail.com>
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Date: Sat, 19 May 2012 11:33:43 +0400
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Subject: [PATCH 2/2] Add memory barrier on a more arches
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Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
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---
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port/atomic_pointer.h | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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diff --git a/port/atomic_pointer.h b/port/atomic_pointer.h
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index c58bffb..ed9cee3 100644
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--- a/port/atomic_pointer.h
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+++ b/port/atomic_pointer.h
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@@ -48,8 +48,8 @@ namespace port {
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// http://msdn.microsoft.com/en-us/library/ms684208(v=vs.85).aspx
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#define LEVELDB_HAVE_MEMORY_BARRIER
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-// Gcc on x86
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-#elif defined(ARCH_CPU_X86_FAMILY) && defined(__GNUC__)
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+// GCC on x86, PPC, PPC64, MIPS, MIPS64, s390, S390x, ARM
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+#elif defined(__GNUC__)
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inline void MemoryBarrier() {
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// See http://gcc.gnu.org/ml/gcc/2003-04/msg01180.html for a discussion on
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// this idiom. Also see http://en.wikipedia.org/wiki/Memory_ordering.
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--
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1.7.10.4
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