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From d024d7fdb808dd4d3e8ad57b83aa3441129c8276 Mon Sep 17 00:00:00 2001
From: Peter Lemenkov <lemenkov@gmail.com>
Date: Sat, 19 May 2012 11:33:43 +0400
Subject: [PATCH 2/2] Add memory barrier on a more arches

Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
---
 port/atomic_pointer.h |    4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/port/atomic_pointer.h b/port/atomic_pointer.h
index c58bffb..ed9cee3 100644
--- a/port/atomic_pointer.h
+++ b/port/atomic_pointer.h
@@ -48,8 +48,8 @@ namespace port {
 // http://msdn.microsoft.com/en-us/library/ms684208(v=vs.85).aspx
 #define LEVELDB_HAVE_MEMORY_BARRIER
 
-// Gcc on x86
-#elif defined(ARCH_CPU_X86_FAMILY) && defined(__GNUC__)
+// GCC on x86, PPC, PPC64, MIPS, MIPS64, s390, S390x, ARM
+#elif defined(__GNUC__)
 inline void MemoryBarrier() {
   // See http://gcc.gnu.org/ml/gcc/2003-04/msg01180.html for a discussion on
   // this idiom. Also see http://en.wikipedia.org/wiki/Memory_ordering.
-- 
1.7.10.4