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From a6fa10c14649c18d299cddf3e823b032460cb6f5 Mon Sep 17 00:00:00 2001
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From: Pirama Arumuga Nainar <pirama@google.com>
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Date: Thu, 23 Mar 2017 16:47:47 +0000
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Subject: [PATCH] Fix computeKnownBits for ARMISD::CMOV
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Summary:
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The true and false operands for the CMOV are operands 0 and 1.
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ARMISelLowering.cpp::computeKnownBits was looking at operands 1 and 2
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instead. This can cause CMOV instructions to be incorrectly folded into
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BFI if value set by the CMOV is another CMOV, whose known bits are
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computed incorrectly.
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This patch fixes the issue and adds a test case.
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Reviewers: kristof.beyls, jmolloy
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Subscribers: llvm-commits, aemerson, srhines, rengolin
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Differential Revision: https://reviews.llvm.org/D31265
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@298624 91177308-0d34-0410-b5e6-96231b3b80d8
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---
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lib/Target/ARM/ARMISelLowering.cpp | 4 ++--
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test/CodeGen/ARM/no-cmov2bfi.ll | 19 +++++++++++++++++++
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2 files changed, 21 insertions(+), 2 deletions(-)
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create mode 100644 test/CodeGen/ARM/no-cmov2bfi.ll
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diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
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index 4a227a3cd7b1..cf98e60c0657 100644
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--- a/lib/Target/ARM/ARMISelLowering.cpp
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+++ b/lib/Target/ARM/ARMISelLowering.cpp
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@@ -10806,8 +10806,8 @@ static void computeKnownBits(SelectionDAG &DAG, SDValue Op, APInt &KnownZero,
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if (Op.getOpcode() == ARMISD::CMOV) {
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APInt KZ2(KnownZero.getBitWidth(), 0);
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APInt KO2(KnownOne.getBitWidth(), 0);
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- computeKnownBits(DAG, Op.getOperand(1), KnownZero, KnownOne);
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- computeKnownBits(DAG, Op.getOperand(2), KZ2, KO2);
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+ computeKnownBits(DAG, Op.getOperand(0), KnownZero, KnownOne);
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+ computeKnownBits(DAG, Op.getOperand(1), KZ2, KO2);
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KnownZero &= KZ2;
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KnownOne &= KO2;
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diff --git a/test/CodeGen/ARM/no-cmov2bfi.ll b/test/CodeGen/ARM/no-cmov2bfi.ll
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new file mode 100644
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index 000000000000..c8b512048905
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--- /dev/null
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+++ b/test/CodeGen/ARM/no-cmov2bfi.ll
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@@ -0,0 +1,19 @@
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+; RUN: llc < %s -mtriple=thumbv7 | FileCheck --check-prefix=CHECK-NOBFI %s
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+
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+declare zeroext i1 @dummy()
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+
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+define i8 @test(i8 %a1, i1 %c) {
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+; CHECK-NOBFI-NOT: bfi
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+; CHECK-NOBFI: bl dummy
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+; CHECK-NOBFI: cmp r0, #0
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+; CHECK-NOBFI: it ne
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+; CHECK-NOBFI: orrne [[REG:r[0-9]+]], [[REG]], #8
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+; CHECK-NOBFI: mov r0, [[REG]]
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+
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+ %1 = and i8 %a1, -9
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+ %2 = select i1 %c, i8 %1, i8 %a1
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+ %3 = tail call zeroext i1 @dummy()
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+ %4 = or i8 %2, 8
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+ %ret = select i1 %3, i8 %4, i8 %2
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+ ret i8 %ret
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+}
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--
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2.9.3
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