From 5aa1d86125bbb751ef5edc25907f659c20d31797 Mon Sep 17 00:00:00 2001 From: Miro Hrončok Date: Oct 23 2019 22:32:35 +0000 Subject: Enable JIT on aarch64, add upstream workaround --- diff --git a/d81c769a235307f6671a8fa916f48d6896cbb823.patch b/d81c769a235307f6671a8fa916f48d6896cbb823.patch new file mode 100644 index 0000000..8debd29 --- /dev/null +++ b/d81c769a235307f6671a8fa916f48d6896cbb823.patch @@ -0,0 +1,49 @@ +# HG changeset patch +# User Armin Rigo +# Date 1571380165 -7200 +# Node ID d81c769a235307f6671a8fa916f48d6896cbb823 +# Parent f27546b858f97bfa286a891e1474579759028784 +Arguably, clarify the logic. The real motivation is a gcc bug, see issue #3086 + +diff --git a/rpython/jit/backend/aarch64/opassembler.py b/rpython/jit/backend/aarch64/opassembler.py +--- a/rpython/jit/backend/aarch64/opassembler.py ++++ b/rpython/jit/backend/aarch64/opassembler.py +@@ -808,9 +808,7 @@ + # Inline a series of STR operations, starting at 'dstaddr_loc'. + # + self.mc.gen_load_int(r.ip0.value, 0) +- i = 0 +- adjustment = 0 +- needs_adjustment = itemsize < 8 and (startbyte % 8) ++ i = dst_i = 0 + total_size = size_box.getint() + while i < total_size: + sz = itemsize +@@ -818,19 +816,19 @@ + next_group += 8 + if next_group <= total_size: + sz = 8 ++ if dst_i % 8: # unaligned? ++ self.mc.ADD_ri(dstaddr_loc.value, dstaddr_loc.value, dst_i) ++ dst_i = 0 + if sz == 8: +- if needs_adjustment: +- self.mc.ADD_ri(dstaddr_loc.value, dstaddr_loc.value, i) +- adjustment = -i +- needs_adjustment = False +- self.mc.STR_ri(r.ip0.value, dstaddr_loc.value, i + adjustment) ++ self.mc.STR_ri(r.ip0.value, dstaddr_loc.value, dst_i) + elif sz == 4: +- self.mc.STRW_ri(r.ip0.value, dstaddr_loc.value, i + adjustment) ++ self.mc.STRW_ri(r.ip0.value, dstaddr_loc.value, dst_i) + elif sz == 2: +- self.mc.STRH_ri(r.ip0.value, dstaddr_loc.value, i + adjustment) ++ self.mc.STRH_ri(r.ip0.value, dstaddr_loc.value, dst_i) + else: +- self.mc.STRB_ri(r.ip0.value, dstaddr_loc.value, i + adjustment) ++ self.mc.STRB_ri(r.ip0.value, dstaddr_loc.value, dst_i) + i += sz ++ dst_i += sz + + else: + if isinstance(size_box, ConstInt): diff --git a/pypy3.spec b/pypy3.spec index 70caacc..785179e 100644 --- a/pypy3.spec +++ b/pypy3.spec @@ -2,7 +2,7 @@ Name: pypy3 Version: %{basever}.0 %global pyversion 3.6 -Release: 1%{?dist} +Release: 2%{?dist} Summary: Python 3 implementation with a Just-In-Time compiler # LGPL and another free license we'd need to ask spot about are present in some @@ -95,8 +95,7 @@ URL: http://pypy.org/ # it on the other archs. The resulting binary will typically be slower than # CPython for the latter case. -# aarch64: https://bitbucket.org/pypy/pypy/issues/3086 -%ifarch %{ix86} x86_64 %{arm} %{power64} s390x +%ifarch %{ix86} x86_64 %{arm} %{power64} s390x aarch64 %global with_jit 1 %else %global with_jit 0 @@ -165,6 +164,9 @@ Patch9: 009-add-libxcrypt-support.patch # It seems ppc64 has no faulthandler Patch11: 011-no-faulthandler.patch +# https://bitbucket.org/pypy/pypy/issues/3086 +Patch12: d81c769a235307f6671a8fa916f48d6896cbb823.patch + # Instead of bundled wheels, use our RPM packaged wheels from # /usr/share/python-wheels # We conditionally apply this, but we use autosetup, so we use Source here @@ -859,6 +861,9 @@ CheckPyPy %{name}-stackless %changelog +* Wed Oct 23 2019 Miro Hrončok - 7.2.0-2 +- Enable JIT on aarch64 + * Mon Oct 14 2019 Miro Hrončok - 7.2.0-1 - Update to 7.2.0 (#1757707) - Enable aarch64 (without JIT)