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From: Gerd Hoffmann <kraxel@redhat.com>
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Date: Tue, 17 May 2016 10:54:54 +0200
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Subject: [PATCH] vga: add sr_vbe register set
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Commit "fd3c136 vga: make sure vga register setup for vbe stays intact
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(CVE-2016-3712)." causes a regression. The win7 installer is unhappy
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because it can't freely modify vga registers any more while in vbe mode.
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This patch introduces a new sr_vbe register set. The vbe_update_vgaregs
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will fill sr_vbe[] instead of sr[]. Normal vga register reads and
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writes go to sr[]. Any sr register read access happens through a new
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sr() helper function which will read from sr_vbe[] with vbe active and
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from sr[] otherwise.
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This way we can allow guests update sr[] registers as they want, without
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allowing them disrupt vbe video modes that way.
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Cc: qemu-stable@nongnu.org
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Reported-by: Thomas Lamprecht <thomas@lamprecht.org>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Message-id: 1463475294-14119-1-git-send-email-kraxel@redhat.com
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(cherry picked from commit 94ef4f337fb614f18b765a8e0e878a4c23cdedcd)
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---
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hw/display/vga.c | 50 ++++++++++++++++++++++++++++----------------------
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hw/display/vga_int.h | 1 +
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2 files changed, 29 insertions(+), 22 deletions(-)
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diff --git a/hw/display/vga.c b/hw/display/vga.c
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index 1fc8f12..da23265 100644
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--- a/hw/display/vga.c
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+++ b/hw/display/vga.c
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@@ -147,6 +147,11 @@ static inline bool vbe_enabled(VGACommonState *s)
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return s->vbe_regs[VBE_DISPI_INDEX_ENABLE] & VBE_DISPI_ENABLED;
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}
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+static inline uint8_t sr(VGACommonState *s, int idx)
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+{
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+ return vbe_enabled(s) ? s->sr_vbe[idx] : s->sr[idx];
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+}
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+
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static void vga_update_memory_access(VGACommonState *s)
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{
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hwaddr base, offset, size;
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@@ -161,8 +166,8 @@ static void vga_update_memory_access(VGACommonState *s)
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s->has_chain4_alias = false;
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s->plane_updated = 0xf;
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}
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- if ((s->sr[VGA_SEQ_PLANE_WRITE] & VGA_SR02_ALL_PLANES) ==
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- VGA_SR02_ALL_PLANES && s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {
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+ if ((sr(s, VGA_SEQ_PLANE_WRITE) & VGA_SR02_ALL_PLANES) ==
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+ VGA_SR02_ALL_PLANES && sr(s, VGA_SEQ_MEMORY_MODE) & VGA_SR04_CHN_4M) {
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offset = 0;
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switch ((s->gr[VGA_GFX_MISC] >> 2) & 3) {
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case 0:
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@@ -232,7 +237,7 @@ static void vga_precise_update_retrace_info(VGACommonState *s)
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((s->cr[VGA_CRTC_OVERFLOW] >> 6) & 2)) << 8);
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vretr_end_line = s->cr[VGA_CRTC_V_SYNC_END] & 0xf;
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- clocking_mode = (s->sr[VGA_SEQ_CLOCK_MODE] >> 3) & 1;
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+ clocking_mode = (sr(s, VGA_SEQ_CLOCK_MODE) >> 3) & 1;
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clock_sel = (s->msr >> 2) & 3;
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dots = (s->msr & 1) ? 8 : 9;
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@@ -484,7 +489,6 @@ void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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printf("vga: write SR%x = 0x%02x\n", s->sr_index, val);
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#endif
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s->sr[s->sr_index] = val & sr_mask[s->sr_index];
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- vbe_update_vgaregs(s);
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if (s->sr_index == VGA_SEQ_CLOCK_MODE) {
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s->update_retrace_info(s);
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}
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@@ -678,13 +682,13 @@ static void vbe_update_vgaregs(VGACommonState *s)
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if (s->vbe_regs[VBE_DISPI_INDEX_BPP] == 4) {
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shift_control = 0;
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- s->sr[VGA_SEQ_CLOCK_MODE] &= ~8; /* no double line */
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+ s->sr_vbe[VGA_SEQ_CLOCK_MODE] &= ~8; /* no double line */
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} else {
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shift_control = 2;
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/* set chain 4 mode */
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- s->sr[VGA_SEQ_MEMORY_MODE] |= VGA_SR04_CHN_4M;
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+ s->sr_vbe[VGA_SEQ_MEMORY_MODE] |= VGA_SR04_CHN_4M;
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/* activate all planes */
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- s->sr[VGA_SEQ_PLANE_WRITE] |= VGA_SR02_ALL_PLANES;
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+ s->sr_vbe[VGA_SEQ_PLANE_WRITE] |= VGA_SR02_ALL_PLANES;
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}
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s->gr[VGA_GFX_MODE] = (s->gr[VGA_GFX_MODE] & ~0x60) |
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(shift_control << 5);
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@@ -834,7 +838,7 @@ uint32_t vga_mem_readb(VGACommonState *s, hwaddr addr)
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break;
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}
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- if (s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {
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+ if (sr(s, VGA_SEQ_MEMORY_MODE) & VGA_SR04_CHN_4M) {
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/* chain 4 mode : simplest access */
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assert(addr < s->vram_size);
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ret = s->vram_ptr[addr];
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@@ -902,11 +906,11 @@ void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val)
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break;
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}
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- if (s->sr[VGA_SEQ_MEMORY_MODE] & VGA_SR04_CHN_4M) {
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+ if (sr(s, VGA_SEQ_MEMORY_MODE) & VGA_SR04_CHN_4M) {
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/* chain 4 mode : simplest access */
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plane = addr & 3;
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mask = (1 << plane);
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- if (s->sr[VGA_SEQ_PLANE_WRITE] & mask) {
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+ if (sr(s, VGA_SEQ_PLANE_WRITE) & mask) {
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assert(addr < s->vram_size);
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s->vram_ptr[addr] = val;
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#ifdef DEBUG_VGA_MEM
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@@ -919,7 +923,7 @@ void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val)
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/* odd/even mode (aka text mode mapping) */
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plane = (s->gr[VGA_GFX_PLANE_READ] & 2) | (addr & 1);
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mask = (1 << plane);
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- if (s->sr[VGA_SEQ_PLANE_WRITE] & mask) {
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+ if (sr(s, VGA_SEQ_PLANE_WRITE) & mask) {
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addr = ((addr & ~1) << 1) | plane;
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if (addr >= s->vram_size) {
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return;
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@@ -994,7 +998,7 @@ void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val)
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do_write:
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/* mask data according to sr[2] */
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- mask = s->sr[VGA_SEQ_PLANE_WRITE];
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+ mask = sr(s, VGA_SEQ_PLANE_WRITE);
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s->plane_updated |= mask; /* only used to detect font change */
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write_mask = mask16[mask];
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if (addr * sizeof(uint32_t) >= s->vram_size) {
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@@ -1150,10 +1154,10 @@ static void vga_get_text_resolution(VGACommonState *s, int *pwidth, int *pheight
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/* total width & height */
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cheight = (s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1;
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cwidth = 8;
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- if (!(s->sr[VGA_SEQ_CLOCK_MODE] & VGA_SR01_CHAR_CLK_8DOTS)) {
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+ if (!(sr(s, VGA_SEQ_CLOCK_MODE) & VGA_SR01_CHAR_CLK_8DOTS)) {
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cwidth = 9;
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}
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- if (s->sr[VGA_SEQ_CLOCK_MODE] & 0x08) {
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+ if (sr(s, VGA_SEQ_CLOCK_MODE) & 0x08) {
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cwidth = 16; /* NOTE: no 18 pixel wide */
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}
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width = (s->cr[VGA_CRTC_H_DISP] + 1);
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@@ -1195,7 +1199,7 @@ static void vga_draw_text(VGACommonState *s, int full_update)
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int64_t now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL);
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/* compute font data address (in plane 2) */
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- v = s->sr[VGA_SEQ_CHARACTER_MAP];
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+ v = sr(s, VGA_SEQ_CHARACTER_MAP);
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offset = (((v >> 4) & 1) | ((v << 1) & 6)) * 8192 * 4 + 2;
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if (offset != s->font_offsets[0]) {
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s->font_offsets[0] = offset;
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@@ -1504,11 +1508,11 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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}
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if (shift_control == 0) {
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- if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
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+ if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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disp_width <<= 1;
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}
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} else if (shift_control == 1) {
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- if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
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+ if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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disp_width <<= 1;
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}
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}
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@@ -1572,7 +1576,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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if (shift_control == 0) {
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full_update |= update_palette16(s);
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- if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
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+ if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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v = VGA_DRAW_LINE4D2;
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} else {
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v = VGA_DRAW_LINE4;
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@@ -1580,7 +1584,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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bits = 4;
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} else if (shift_control == 1) {
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full_update |= update_palette16(s);
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- if (s->sr[VGA_SEQ_CLOCK_MODE] & 8) {
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+ if (sr(s, VGA_SEQ_CLOCK_MODE) & 8) {
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v = VGA_DRAW_LINE2D2;
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} else {
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v = VGA_DRAW_LINE2;
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@@ -1627,7 +1631,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
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#if 0
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printf("w=%d h=%d v=%d line_offset=%d cr[0x09]=0x%02x cr[0x17]=0x%02x linecmp=%d sr[0x01]=0x%02x\n",
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width, height, v, line_offset, s->cr[9], s->cr[VGA_CRTC_MODE],
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- s->line_compare, s->sr[VGA_SEQ_CLOCK_MODE]);
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+ s->line_compare, sr(s, VGA_SEQ_CLOCK_MODE));
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#endif
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addr1 = (s->start_addr * 4);
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bwidth = (width * bits + 7) / 8;
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@@ -1779,6 +1783,7 @@ void vga_common_reset(VGACommonState *s)
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{
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s->sr_index = 0;
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memset(s->sr, '\0', sizeof(s->sr));
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+ memset(s->sr_vbe, '\0', sizeof(s->sr_vbe));
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s->gr_index = 0;
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memset(s->gr, '\0', sizeof(s->gr));
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s->ar_index = 0;
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@@ -1881,10 +1886,10 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
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/* total width & height */
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cheight = (s->cr[VGA_CRTC_MAX_SCAN] & 0x1f) + 1;
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cw = 8;
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- if (!(s->sr[VGA_SEQ_CLOCK_MODE] & VGA_SR01_CHAR_CLK_8DOTS)) {
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+ if (!(sr(s, VGA_SEQ_CLOCK_MODE) & VGA_SR01_CHAR_CLK_8DOTS)) {
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cw = 9;
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}
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- if (s->sr[VGA_SEQ_CLOCK_MODE] & 0x08) {
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+ if (sr(s, VGA_SEQ_CLOCK_MODE) & 0x08) {
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cw = 16; /* NOTE: no 18 pixel wide */
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}
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width = (s->cr[VGA_CRTC_H_DISP] + 1);
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@@ -2050,6 +2055,7 @@ static int vga_common_post_load(void *opaque, int version_id)
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/* force refresh */
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s->graphic_mode = -1;
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+ vbe_update_vgaregs(s);
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return 0;
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}
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diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h
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index fcfcc5f..01bdd3e 100644
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--- a/hw/display/vga_int.h
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+++ b/hw/display/vga_int.h
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@@ -99,6 +99,7 @@ typedef struct VGACommonState {
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MemoryRegion chain4_alias;
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uint8_t sr_index;
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uint8_t sr[256];
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+ uint8_t sr_vbe[256];
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uint8_t gr_index;
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uint8_t gr[256];
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uint8_t ar_index;
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