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From patchwork Mon Apr 15 09:32:39 2019
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Content-Type: text/plain; charset="utf-8"
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MIME-Version: 1.0
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Content-Transfer-Encoding: 7bit
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Subject: [U-Boot, v5,
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27/27] ARM: tegra: Add NVIDIA Jetson Nano Developer Kit support
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X-Patchwork-Submitter: Thierry Reding <thierry.reding@gmail.com>
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X-Patchwork-Id: 1085538
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X-Patchwork-Delegate: twarren@nvidia.com
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Message-Id: <20190415093239.27509-28-thierry.reding@gmail.com>
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c529a6c |
To: Tom Warren <twarren@nvidia.com>,
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c529a6c |
Simon Glass <sjg@chromium.org>
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c529a6c |
Cc: u-boot@lists.denx.de, Jon Hunter <jonathanh@nvidia.com>
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Date: Mon, 15 Apr 2019 11:32:39 +0200
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c529a6c |
From: Thierry Reding <thierry.reding@gmail.com>
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c529a6c |
List-Id: U-Boot discussion <u-boot.lists.denx.de>
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c529a6c |
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From: Thierry Reding <treding@nvidia.com>
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The Jetson Nano Developer Kit is a Tegra X1 based development board. It
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is similar to Jetson TX1 but it is not pin compatible. It features 4 GB
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of LPDDR4, an SPI NOR flash for early boot firmware and an SD card slot
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used for storage.
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HDMI 2.0 or DP 1.2 are available for display, four USB ports (3 USB 2.0
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and 1 USB 3.0) can be used to attach a variety of peripherals and a PCI
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Ethernet controller provides onboard network connectivity.
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A 40-pin header on the board can be used to extend the capabilities and
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exposed interfaces of the Jetson Nano.
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Signed-off-by: Thierry Reding <treding@nvidia.com>
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c529a6c |
---
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c529a6c |
Changes in v5:
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- add "ethernet" alias and store an empty MAC address as placeholder
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c529a6c |
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c529a6c |
Changes in v3:
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- rename "Development Kit" to "Developer Kit"
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c529a6c |
- drop alias for non-existent eMMC interface
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c529a6c |
- import pinmux from A02 spreadsheet
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c529a6c |
- drop preboot support for now
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c529a6c |
- fixup text base
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arch/arm/dts/Makefile | 3 +-
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arch/arm/dts/tegra210-p3450-0000.dts | 135 +++++++++
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arch/arm/mach-tegra/tegra210/Kconfig | 7 +
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board/nvidia/p3450-0000/Kconfig | 12 +
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board/nvidia/p3450-0000/MAINTAINERS | 6 +
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board/nvidia/p3450-0000/Makefile | 8 +
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board/nvidia/p3450-0000/p3450-0000.c | 198 +++++++++++++
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.../p3450-0000/pinmux-config-p3450-0000.h | 265 ++++++++++++++++++
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configs/p3450-0000_defconfig | 55 ++++
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include/configs/p3450-0000.h | 34 +++
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10 files changed, 722 insertions(+), 1 deletion(-)
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c529a6c |
create mode 100644 arch/arm/dts/tegra210-p3450-0000.dts
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create mode 100644 board/nvidia/p3450-0000/Kconfig
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create mode 100644 board/nvidia/p3450-0000/MAINTAINERS
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create mode 100644 board/nvidia/p3450-0000/Makefile
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create mode 100644 board/nvidia/p3450-0000/p3450-0000.c
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create mode 100644 board/nvidia/p3450-0000/pinmux-config-p3450-0000.h
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create mode 100644 configs/p3450-0000_defconfig
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c529a6c |
create mode 100644 include/configs/p3450-0000.h
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diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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index 8167cdb4e856..f8d3441663c0 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -127,7 +127,8 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
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tegra210-e2220-1170.dtb \
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tegra210-p2371-0000.dtb \
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tegra210-p2371-2180.dtb \
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- tegra210-p2571.dtb
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+ tegra210-p2571.dtb \
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+ tegra210-p3450-0000.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += \
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armada-3720-db.dtb \
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diff --git a/arch/arm/dts/tegra210-p3450-0000.dts b/arch/arm/dts/tegra210-p3450-0000.dts
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new file mode 100644
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index 000000000000..d45ee9afc016
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--- /dev/null
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+++ b/arch/arm/dts/tegra210-p3450-0000.dts
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@@ -0,0 +1,135 @@
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+/dts-v1/;
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+
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+#include "tegra210.dtsi"
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+
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+/ {
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+ model = "NVIDIA Jetson Nano Developer Kit";
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+ compatible = "nvidia,p3450-0000", "nvidia,tegra210";
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+
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+ chosen {
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+ stdout-path = &uart;;
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+ };
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+
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+ aliases {
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+ ethernet = "/pcie@1003000/pci@2,0/ethernet@0,0";
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+ i2c0 = "/i2c@7000d000";
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+ i2c2 = "/i2c@7000c400";
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+ i2c3 = "/i2c@7000c500";
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+ i2c4 = "/i2c@7000c700";
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+ sdhci0 = "/sdhci@700b0000";
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+ spi0 = "/spi@70410000";
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+ usb0 = "/usb@7d000000";
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+ };
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+
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+ memory {
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+ reg = <0x0 0x80000000 0x0 0xc0000000>;
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+ };
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+
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+ pcie@1003000 {
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+ status = "okay";
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+
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+ pci@1,0 {
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+ status = "okay";
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+ };
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+
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+ pci@2,0 {
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+ status = "okay";
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+
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+ ethernet@0,0 {
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+ reg = <0x000000 0 0 0 0>;
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+ local-mac-address = [ 00 00 00 00 00 00 ];
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+ };
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+ };
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+ };
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+
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+ serial@70006000 {
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+ status = "okay";
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+ };
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+
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+ padctl@7009f000 {
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+ pinctrl-0 = <&padctl_default>;
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+ pinctrl-names = "default";
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+
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+ padctl_default: pinmux {
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+ xusb {
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+ nvidia,lanes = "otg-1", "otg-2";
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+ nvidia,function = "xusb";
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+ nvidia,iddq = <0>;
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+ };
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+
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+ usb3 {
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+ nvidia,lanes = "pcie-5", "pcie-6";
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+ nvidia,function = "usb3";
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+ nvidia,iddq = <0>;
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+ };
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+
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+ pcie-x1 {
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+ nvidia,lanes = "pcie-0";
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+ nvidia,function = "pcie-x1";
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+ nvidia,iddq = <0>;
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+ };
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+
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+ pcie-x4 {
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+ nvidia,lanes = "pcie-1", "pcie-2",
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+ "pcie-3", "pcie-4";
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+ nvidia,function = "pcie-x4";
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+ nvidia,iddq = <0>;
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+ };
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+
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+ sata {
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+ nvidia,lanes = "sata-0";
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+ nvidia,function = "sata";
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+ nvidia,iddq = <0>;
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+ };
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+ };
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+ };
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+
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+ sdhci@700b0000 {
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+ status = "okay";
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+ cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
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+ power-gpios = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
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+ bus-width = <4>;
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+ };
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+
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+ i2c@7000c400 {
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+ status = "okay";
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+ clock-frequency = <400000>;
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+ };
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+
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+ i2c@7000c500 {
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+ status = "okay";
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c529a6c |
+ clock-frequency = <400000>;
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+ };
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+
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+ i2c@7000c700 {
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+ status = "okay";
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+ clock-frequency = <400000>;
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+ };
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+
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+ i2c@7000d000 {
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+ status = "okay";
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c529a6c |
+ clock-frequency = <400000>;
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c529a6c |
+ };
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c529a6c |
+
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c529a6c |
+ spi@70410000 {
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+ status = "okay";
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c529a6c |
+ };
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c529a6c |
+
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c529a6c |
+ usb@7d000000 {
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c529a6c |
+ status = "okay";
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c529a6c |
+ dr_mode = "peripheral";
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+ };
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c529a6c |
+
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c529a6c |
+ clocks {
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c529a6c |
+ compatible = "simple-bus";
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c529a6c |
+ #address-cells = <1>;
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c529a6c |
+ #size-cells = <0>;
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+
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+ clk32k_in: clock@0 {
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c529a6c |
+ compatible = "fixed-clock";
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c529a6c |
+ reg = <0>;
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c529a6c |
+ #clock-cells = <0>;
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c529a6c |
+ clock-frequency = <32768>;
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+ };
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c529a6c |
+ };
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c529a6c |
+};
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c529a6c |
diff --git a/arch/arm/mach-tegra/tegra210/Kconfig b/arch/arm/mach-tegra/tegra210/Kconfig
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c529a6c |
index 250738aed312..ea28392c0f3a 100644
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c529a6c |
--- a/arch/arm/mach-tegra/tegra210/Kconfig
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c529a6c |
+++ b/arch/arm/mach-tegra/tegra210/Kconfig
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c529a6c |
@@ -35,6 +35,12 @@ config TARGET_P2571
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c529a6c |
help
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c529a6c |
P2571 is a P2530 married to a P1963 I/O board
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c529a6c |
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c529a6c |
+config TARGET_P3450_0000
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c529a6c |
+ bool "NVIDIA Jetson Nano Developer Kit"
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c529a6c |
+ select BOARD_LATE_INIT
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c529a6c |
+ help
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c529a6c |
+ P3450-0000 is a P3448 CPU board married to a P3449 I/O board.
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+
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c529a6c |
endchoice
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c529a6c |
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c529a6c |
config SYS_SOC
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c529a6c |
@@ -47,5 +53,6 @@ source "board/nvidia/e2220-1170/Kconfig"
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c529a6c |
source "board/nvidia/p2371-0000/Kconfig"
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source "board/nvidia/p2371-2180/Kconfig"
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c529a6c |
source "board/nvidia/p2571/Kconfig"
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c529a6c |
+source "board/nvidia/p3450-0000/Kconfig"
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c529a6c |
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c529a6c |
endif
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c529a6c |
diff --git a/board/nvidia/p3450-0000/Kconfig b/board/nvidia/p3450-0000/Kconfig
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c529a6c |
new file mode 100644
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c529a6c |
index 000000000000..7a08cd88675f
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c529a6c |
--- /dev/null
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c529a6c |
+++ b/board/nvidia/p3450-0000/Kconfig
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c529a6c |
@@ -0,0 +1,12 @@
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c529a6c |
+if TARGET_P3450_0000
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c529a6c |
+
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c529a6c |
+config SYS_BOARD
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c529a6c |
+ default "p3450-0000"
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c529a6c |
+
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c529a6c |
+config SYS_VENDOR
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c529a6c |
+ default "nvidia"
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c529a6c |
+
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c529a6c |
+config SYS_CONFIG_NAME
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c529a6c |
+ default "p3450-0000"
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c529a6c |
+
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c529a6c |
+endif
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c529a6c |
diff --git a/board/nvidia/p3450-0000/MAINTAINERS b/board/nvidia/p3450-0000/MAINTAINERS
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c529a6c |
new file mode 100644
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c529a6c |
index 000000000000..40700066bf39
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c529a6c |
--- /dev/null
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c529a6c |
+++ b/board/nvidia/p3450-0000/MAINTAINERS
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c529a6c |
@@ -0,0 +1,6 @@
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c529a6c |
+P3450-0000 BOARD
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c529a6c |
+M: Tom Warren <twarren@nvidia.com>
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c529a6c |
+S: Maintained
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c529a6c |
+F: board/nvidia/p3450-0000/
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c529a6c |
+F: include/configs/p3450-0000.h
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c529a6c |
+F: configs/p3450-0000_defconfig
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c529a6c |
diff --git a/board/nvidia/p3450-0000/Makefile b/board/nvidia/p3450-0000/Makefile
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c529a6c |
new file mode 100644
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c529a6c |
index 000000000000..993c506d8200
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|
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c529a6c |
--- /dev/null
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c529a6c |
+++ b/board/nvidia/p3450-0000/Makefile
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c529a6c |
@@ -0,0 +1,8 @@
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c529a6c |
+#
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c529a6c |
+# (C) Copyright 2018
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c529a6c |
+# NVIDIA Corporation <www.nvidia.com>
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c529a6c |
+#
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c529a6c |
+# SPDX-License-Identifier: GPL-2.0+
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c529a6c |
+#
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c529a6c |
+
|
|
|
c529a6c |
+obj-y += p3450-0000.o
|
|
|
c529a6c |
diff --git a/board/nvidia/p3450-0000/p3450-0000.c b/board/nvidia/p3450-0000/p3450-0000.c
|
|
|
c529a6c |
new file mode 100644
|
|
|
c529a6c |
index 000000000000..432179e92605
|
|
|
c529a6c |
--- /dev/null
|
|
|
c529a6c |
+++ b/board/nvidia/p3450-0000/p3450-0000.c
|
|
|
c529a6c |
@@ -0,0 +1,198 @@
|
|
|
c529a6c |
+/*
|
|
|
c529a6c |
+ * (C) Copyright 2018
|
|
|
c529a6c |
+ * NVIDIA Corporation <www.nvidia.com>
|
|
|
c529a6c |
+ *
|
|
|
c529a6c |
+ * SPDX-License-Identifier: GPL-2.0+
|
|
|
c529a6c |
+ */
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#include <common.h>
|
|
|
55487dd |
+#include <env.h>
|
|
|
c529a6c |
+#include <fdtdec.h>
|
|
|
c529a6c |
+#include <i2c.h>
|
|
|
c529a6c |
+#include <linux/libfdt.h>
|
|
|
c529a6c |
+#include <pca953x.h>
|
|
|
c529a6c |
+#include <asm/arch-tegra/cboot.h>
|
|
|
c529a6c |
+#include <asm/arch/gpio.h>
|
|
|
c529a6c |
+#include <asm/arch/pinmux.h>
|
|
|
c529a6c |
+#include "../p2571/max77620_init.h"
|
|
|
c529a6c |
+#include "pinmux-config-p3450-0000.h"
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+void pin_mux_mmc(void)
|
|
|
c529a6c |
+{
|
|
|
c529a6c |
+ struct udevice *dev;
|
|
|
c529a6c |
+ uchar val;
|
|
|
c529a6c |
+ int ret;
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ /* Turn on MAX77620 LDO2 to 3.3V for SD card power */
|
|
|
c529a6c |
+ debug("%s: Set LDO2 for VDDIO_SDMMC_AP power to 3.3V\n", __func__);
|
|
|
c529a6c |
+ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev;;
|
|
|
c529a6c |
+ if (ret) {
|
|
|
c529a6c |
+ printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
|
|
|
c529a6c |
+ return;
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+ /* 0xF2 for 3.3v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
|
|
|
c529a6c |
+ val = 0xF2;
|
|
|
c529a6c |
+ ret = dm_i2c_write(dev, MAX77620_CNFG1_L2_REG, &val, 1);
|
|
|
c529a6c |
+ if (ret)
|
|
|
c529a6c |
+ printf("i2c_write 0 0x3c 0x27 failed: %d\n", ret);
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ /* Disable LDO4 discharge */
|
|
|
c529a6c |
+ ret = dm_i2c_read(dev, MAX77620_CNFG2_L4_REG, &val, 1);
|
|
|
c529a6c |
+ if (ret) {
|
|
|
c529a6c |
+ printf("i2c_read 0 0x3c 0x2c failed: %d\n", ret);
|
|
|
c529a6c |
+ } else {
|
|
|
c529a6c |
+ val &= ~BIT(1); /* ADE */
|
|
|
c529a6c |
+ ret = dm_i2c_write(dev, MAX77620_CNFG2_L4_REG, &val, 1);
|
|
|
c529a6c |
+ if (ret)
|
|
|
c529a6c |
+ printf("i2c_write 0 0x3c 0x2c failed: %d\n", ret);
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ /* Set MBLPD */
|
|
|
c529a6c |
+ ret = dm_i2c_read(dev, MAX77620_CNFGGLBL1_REG, &val, 1);
|
|
|
c529a6c |
+ if (ret) {
|
|
|
c529a6c |
+ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret);
|
|
|
c529a6c |
+ } else {
|
|
|
c529a6c |
+ val |= BIT(6); /* MBLPD */
|
|
|
c529a6c |
+ ret = dm_i2c_write(dev, MAX77620_CNFGGLBL1_REG, &val, 1);
|
|
|
c529a6c |
+ if (ret)
|
|
|
c529a6c |
+ printf("i2c_write 0 0x3c 0x00 failed: %d\n", ret);
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+}
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+/*
|
|
|
c529a6c |
+ * Routine: pinmux_init
|
|
|
c529a6c |
+ * Description: Do individual peripheral pinmux configs
|
|
|
c529a6c |
+ */
|
|
|
c529a6c |
+void pinmux_init(void)
|
|
|
c529a6c |
+{
|
|
|
c529a6c |
+ pinmux_clear_tristate_input_clamping();
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ gpio_config_table(p3450_0000_gpio_inits,
|
|
|
c529a6c |
+ ARRAY_SIZE(p3450_0000_gpio_inits));
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ pinmux_config_pingrp_table(p3450_0000_pingrps,
|
|
|
c529a6c |
+ ARRAY_SIZE(p3450_0000_pingrps));
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ pinmux_config_drvgrp_table(p3450_0000_drvgrps,
|
|
|
c529a6c |
+ ARRAY_SIZE(p3450_0000_drvgrps));
|
|
|
c529a6c |
+}
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#ifdef CONFIG_PCI_TEGRA
|
|
|
c529a6c |
+int tegra_pcie_board_init(void)
|
|
|
c529a6c |
+{
|
|
|
c529a6c |
+ struct udevice *dev;
|
|
|
c529a6c |
+ uchar val;
|
|
|
c529a6c |
+ int ret;
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ /* Turn on MAX77620 LDO1 to 1.05V for PEX power */
|
|
|
c529a6c |
+ debug("%s: Set LDO1 for PEX power to 1.05V\n", __func__);
|
|
|
c529a6c |
+ ret = i2c_get_chip_for_busnum(0, MAX77620_I2C_ADDR_7BIT, 1, &dev;;
|
|
|
c529a6c |
+ if (ret) {
|
|
|
c529a6c |
+ printf("%s: Cannot find MAX77620 I2C chip\n", __func__);
|
|
|
c529a6c |
+ return -1;
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+ /* 0xCA for 1.05v, enabled: bit7:6 = 11 = enable, bit5:0 = voltage */
|
|
|
c529a6c |
+ val = 0xCA;
|
|
|
c529a6c |
+ ret = dm_i2c_write(dev, MAX77620_CNFG1_L1_REG, &val, 1);
|
|
|
c529a6c |
+ if (ret)
|
|
|
c529a6c |
+ printf("i2c_write 0 0x3c 0x25 failed: %d\n", ret);
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ return 0;
|
|
|
c529a6c |
+}
|
|
|
c529a6c |
+#endif /* PCI */
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+static void ft_mac_address_setup(void *fdt)
|
|
|
c529a6c |
+{
|
|
|
c529a6c |
+ const void *cboot_fdt = (const void *)cboot_boot_x0;
|
|
|
c529a6c |
+ uint8_t mac[ETH_ALEN], local_mac[ETH_ALEN];
|
|
|
c529a6c |
+ const char *path;
|
|
|
c529a6c |
+ int offset, err;
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ err = cboot_get_ethaddr(cboot_fdt, local_mac);
|
|
|
c529a6c |
+ if (err < 0)
|
|
|
c529a6c |
+ memset(local_mac, 0, ETH_ALEN);
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ path = fdt_get_alias(fdt, "ethernet");
|
|
|
c529a6c |
+ if (!path)
|
|
|
c529a6c |
+ return;
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ debug("ethernet alias found: %s\n", path);
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ offset = fdt_path_offset(fdt, path);
|
|
|
c529a6c |
+ if (offset < 0) {
|
|
|
c529a6c |
+ printf("ethernet alias points to absent node %s\n", path);
|
|
|
c529a6c |
+ return;
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ if (is_valid_ethaddr(local_mac)) {
|
|
|
c529a6c |
+ err = fdt_setprop(fdt, offset, "local-mac-address", local_mac,
|
|
|
c529a6c |
+ ETH_ALEN);
|
|
|
c529a6c |
+ if (!err)
|
|
|
c529a6c |
+ debug("Local MAC address set: %pM\n", local_mac);
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ if (eth_env_get_enetaddr("ethaddr", mac)) {
|
|
|
c529a6c |
+ if (memcmp(local_mac, mac, ETH_ALEN) != 0) {
|
|
|
c529a6c |
+ err = fdt_setprop(fdt, offset, "mac-address", mac,
|
|
|
c529a6c |
+ ETH_ALEN);
|
|
|
c529a6c |
+ if (!err)
|
|
|
c529a6c |
+ debug("MAC address set: %pM\n", mac);
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+}
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+static int ft_copy_carveout(void *dst, const void *src, const char *node)
|
|
|
c529a6c |
+{
|
|
|
c529a6c |
+ struct fdt_memory fb;
|
|
|
c529a6c |
+ int err;
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ err = fdtdec_get_carveout(src, node, "memory-region", 0, &fb;;
|
|
|
c529a6c |
+ if (err < 0) {
|
|
|
c529a6c |
+ if (err != -FDT_ERR_NOTFOUND)
|
|
|
c529a6c |
+ printf("failed to get carveout for %s: %d\n", node,
|
|
|
c529a6c |
+ err);
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ return err;
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ err = fdtdec_set_carveout(dst, node, "memory-region", 0, "framebuffer",
|
|
|
c529a6c |
+ &fb;;
|
|
|
c529a6c |
+ if (err < 0) {
|
|
|
c529a6c |
+ printf("failed to set carveout for %s: %d\n", node, err);
|
|
|
c529a6c |
+ return err;
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ return 0;
|
|
|
c529a6c |
+}
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+static void ft_carveout_setup(void *fdt)
|
|
|
c529a6c |
+{
|
|
|
c529a6c |
+ const void *cboot_fdt = (const void *)cboot_boot_x0;
|
|
|
c529a6c |
+ static const char * const nodes[] = {
|
|
|
c529a6c |
+ "/host1x@50000000/dc@54200000",
|
|
|
c529a6c |
+ "/host1x@50000000/dc@54240000",
|
|
|
c529a6c |
+ };
|
|
|
c529a6c |
+ unsigned int i;
|
|
|
c529a6c |
+ int err;
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ for (i = 0; i < ARRAY_SIZE(nodes); i++) {
|
|
|
c529a6c |
+ printf("copying carveout for %s...\n", nodes[i]);
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ err = ft_copy_carveout(fdt, cboot_fdt, nodes[i]);
|
|
|
c529a6c |
+ if (err < 0) {
|
|
|
c529a6c |
+ if (err != -FDT_ERR_NOTFOUND)
|
|
|
c529a6c |
+ printf("failed to copy carveout for %s: %d\n",
|
|
|
c529a6c |
+ nodes[i], err);
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ continue;
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+}
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+int ft_board_setup(void *fdt, bd_t *bd)
|
|
|
c529a6c |
+{
|
|
|
c529a6c |
+ ft_mac_address_setup(fdt);
|
|
|
c529a6c |
+ ft_carveout_setup(fdt);
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+ return 0;
|
|
|
c529a6c |
+}
|
|
|
c529a6c |
diff --git a/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h
|
|
|
c529a6c |
new file mode 100644
|
|
|
c529a6c |
index 000000000000..722da4973542
|
|
|
c529a6c |
--- /dev/null
|
|
|
c529a6c |
+++ b/board/nvidia/p3450-0000/pinmux-config-p3450-0000.h
|
|
|
c529a6c |
@@ -0,0 +1,265 @@
|
|
|
c529a6c |
+/*
|
|
|
c529a6c |
+ * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
|
|
|
c529a6c |
+ *
|
|
|
c529a6c |
+ * SPDX-License-Identifier: GPL-2.0+
|
|
|
c529a6c |
+ */
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+/*
|
|
|
c529a6c |
+ * THIS FILE IS AUTO-GENERATED - DO NOT EDIT!
|
|
|
c529a6c |
+ *
|
|
|
c529a6c |
+ * To generate this file, use the tegra-pinmux-scripts tool available from
|
|
|
c529a6c |
+ * https://github.com/NVIDIA/tegra-pinmux-scripts
|
|
|
c529a6c |
+ * Run "board-to-uboot.py p3450-0000".
|
|
|
c529a6c |
+ */
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#ifndef _PINMUX_CONFIG_P3450_0000_H_
|
|
|
c529a6c |
+#define _PINMUX_CONFIG_P3450_0000_H_
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#define GPIO_INIT(_port, _gpio, _init) \
|
|
|
c529a6c |
+ { \
|
|
|
c529a6c |
+ .gpio = TEGRA_GPIO(_port, _gpio), \
|
|
|
c529a6c |
+ .init = TEGRA_GPIO_INIT_##_init, \
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+static const struct tegra_gpio_config p3450_0000_gpio_inits[] = {
|
|
|
c529a6c |
+ /* port, pin, init_val */
|
|
|
c529a6c |
+ GPIO_INIT(A, 5, IN),
|
|
|
c529a6c |
+ GPIO_INIT(A, 6, OUT1),
|
|
|
c529a6c |
+ GPIO_INIT(B, 4, IN),
|
|
|
c529a6c |
+ GPIO_INIT(B, 5, IN),
|
|
|
c529a6c |
+ GPIO_INIT(B, 6, IN),
|
|
|
c529a6c |
+ GPIO_INIT(B, 7, IN),
|
|
|
c529a6c |
+ GPIO_INIT(C, 0, IN),
|
|
|
c529a6c |
+ GPIO_INIT(C, 1, IN),
|
|
|
c529a6c |
+ GPIO_INIT(C, 2, IN),
|
|
|
c529a6c |
+ GPIO_INIT(C, 3, IN),
|
|
|
c529a6c |
+ GPIO_INIT(C, 4, IN),
|
|
|
c529a6c |
+ GPIO_INIT(E, 6, IN),
|
|
|
c529a6c |
+ GPIO_INIT(G, 2, IN),
|
|
|
c529a6c |
+ GPIO_INIT(G, 3, IN),
|
|
|
c529a6c |
+ GPIO_INIT(H, 0, OUT0),
|
|
|
c529a6c |
+ GPIO_INIT(H, 2, IN),
|
|
|
c529a6c |
+ GPIO_INIT(H, 3, OUT0),
|
|
|
c529a6c |
+ GPIO_INIT(H, 4, OUT0),
|
|
|
c529a6c |
+ GPIO_INIT(H, 5, IN),
|
|
|
c529a6c |
+ GPIO_INIT(H, 6, IN),
|
|
|
c529a6c |
+ GPIO_INIT(H, 7, OUT0),
|
|
|
c529a6c |
+ GPIO_INIT(I, 0, OUT0),
|
|
|
c529a6c |
+ GPIO_INIT(I, 1, IN),
|
|
|
c529a6c |
+ GPIO_INIT(I, 2, OUT0),
|
|
|
c529a6c |
+ GPIO_INIT(J, 4, IN),
|
|
|
c529a6c |
+ GPIO_INIT(J, 5, IN),
|
|
|
c529a6c |
+ GPIO_INIT(J, 6, IN),
|
|
|
c529a6c |
+ GPIO_INIT(J, 7, IN),
|
|
|
c529a6c |
+ GPIO_INIT(S, 5, IN),
|
|
|
c529a6c |
+ GPIO_INIT(S, 7, OUT0),
|
|
|
c529a6c |
+ GPIO_INIT(T, 0, OUT0),
|
|
|
c529a6c |
+ GPIO_INIT(V, 0, IN),
|
|
|
c529a6c |
+ GPIO_INIT(V, 1, IN),
|
|
|
c529a6c |
+ GPIO_INIT(X, 3, OUT1),
|
|
|
c529a6c |
+ GPIO_INIT(X, 4, IN),
|
|
|
c529a6c |
+ GPIO_INIT(X, 5, IN),
|
|
|
c529a6c |
+ GPIO_INIT(X, 6, IN),
|
|
|
c529a6c |
+ GPIO_INIT(Y, 1, IN),
|
|
|
c529a6c |
+ GPIO_INIT(Y, 2, IN),
|
|
|
c529a6c |
+ GPIO_INIT(Z, 0, IN),
|
|
|
c529a6c |
+ GPIO_INIT(Z, 2, IN),
|
|
|
c529a6c |
+ GPIO_INIT(Z, 3, OUT0),
|
|
|
c529a6c |
+ GPIO_INIT(BB, 0, IN),
|
|
|
c529a6c |
+ GPIO_INIT(CC, 4, IN),
|
|
|
c529a6c |
+ GPIO_INIT(DD, 0, IN),
|
|
|
c529a6c |
+};
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#define PINCFG(_pingrp, _mux, _pull, _tri, _io, _od, _e_io_hv) \
|
|
|
c529a6c |
+ { \
|
|
|
c529a6c |
+ .pingrp = PMUX_PINGRP_##_pingrp, \
|
|
|
c529a6c |
+ .func = PMUX_FUNC_##_mux, \
|
|
|
c529a6c |
+ .pull = PMUX_PULL_##_pull, \
|
|
|
c529a6c |
+ .tristate = PMUX_TRI_##_tri, \
|
|
|
c529a6c |
+ .io = PMUX_PIN_##_io, \
|
|
|
c529a6c |
+ .od = PMUX_PIN_OD_##_od, \
|
|
|
c529a6c |
+ .e_io_hv = PMUX_PIN_E_IO_HV_##_e_io_hv, \
|
|
|
c529a6c |
+ .lock = PMUX_PIN_LOCK_DEFAULT, \
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+static const struct pmux_pingrp_config p3450_0000_pingrps[] = {
|
|
|
c529a6c |
+ /* pingrp, mux, pull, tri, e_input, od, e_io_hv */
|
|
|
c529a6c |
+ PINCFG(PEX_L0_RST_N_PA0, PE0, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(PEX_L0_CLKREQ_N_PA1, PE0, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(PEX_WAKE_N_PA2, PE, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(PEX_L1_RST_N_PA3, PE1, NORMAL, NORMAL, OUTPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(PEX_L1_CLKREQ_N_PA4, PE1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(SATA_LED_ACTIVE_PA5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PA6, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DAP1_FS_PB0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DAP1_DIN_PB1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DAP1_DOUT_PB2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DAP1_SCLK_PB3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI2_MOSI_PB4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI2_MISO_PB5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI2_SCK_PB6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI2_CS0_PB7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI1_MOSI_PC0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI1_MISO_PC1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI1_SCK_PC2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI1_CS0_PC3, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI1_CS1_PC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI4_SCK_PC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI4_CS0_PC6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI4_MOSI_PC7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPI4_MISO_PD0, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART3_TX_PD1, UARTC, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART3_RX_PD2, UARTC, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART3_RTS_PD3, UARTC, UP, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART3_CTS_PD4, UARTC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DMIC1_CLK_PE0, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DMIC1_DAT_PE1, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DMIC2_CLK_PE2, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DMIC2_DAT_PE3, I2S3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DMIC3_CLK_PE4, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DMIC3_DAT_PE5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PE6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PE7, PWM3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(GEN3_I2C_SCL_PF0, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
|
|
c529a6c |
+ PINCFG(GEN3_I2C_SDA_PF1, I2C3, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
|
|
c529a6c |
+ PINCFG(UART2_TX_PG0, UARTB, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART2_RX_PG1, UARTB, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART2_RTS_PG2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART2_CTS_PG3, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(WIFI_EN_PH0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(WIFI_RST_PH1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(WIFI_WAKE_AP_PH2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(AP_WAKE_BT_PH3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(BT_RST_PH4, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(BT_WAKE_AP_PH5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PH6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(AP_WAKE_NFC_PH7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(NFC_EN_PI0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(NFC_INT_PI1, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(GPS_EN_PI2, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(GPS_RST_PI3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART4_TX_PI4, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART4_RX_PI5, UARTD, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART4_RTS_PI6, UARTD, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART4_CTS_PI7, UARTD, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(GEN1_I2C_SDA_PJ0, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(GEN1_I2C_SCL_PJ1, I2C1, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(GEN2_I2C_SCL_PJ2, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(GEN2_I2C_SDA_PJ3, I2C2, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(DAP4_FS_PJ4, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DAP4_DIN_PJ5, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DAP4_DOUT_PJ6, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DAP4_SCLK_PJ7, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PK0, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PK1, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PK2, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PK3, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PK4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PK5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PK6, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PK7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PL0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PL1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC1_CLK_PM0, SDMMC1, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC1_CMD_PM1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC1_DAT3_PM2, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC1_DAT2_PM3, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC1_DAT1_PM4, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC1_DAT0_PM5, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC3_CLK_PP0, SDMMC3, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC3_CMD_PP1, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC3_DAT3_PP2, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC3_DAT2_PP3, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC3_DAT1_PP4, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SDMMC3_DAT0_PP5, SDMMC3, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CAM1_MCLK_PS0, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CAM2_MCLK_PS1, EXTPERIPH3, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CAM_I2C_SCL_PS2, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(CAM_I2C_SDA_PS3, I2CVI, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(CAM_RST_PS4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CAM_AF_EN_PS5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CAM_FLASH_EN_PS6, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CAM1_PWDN_PS7, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CAM2_PWDN_PT0, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CAM1_STROBE_PT1, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART1_TX_PU0, UARTA, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART1_RX_PU1, UARTA, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART1_RTS_PU2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(UART1_CTS_PU3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(LCD_BL_PWM_PV0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(LCD_BL_EN_PV1, DEFAULT, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(LCD_RST_PV2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(LCD_GPIO1_PV3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(LCD_GPIO2_PV4, PWM1, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(AP_READY_PV5, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(TOUCH_RST_PV6, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(TOUCH_CLK_PV7, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(MODEM_WAKE_AP_PX0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(TOUCH_INT_PX1, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(MOTION_INT_PX2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(ALS_PROX_INT_PX3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(TEMP_ALERT_PX4, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(BUTTON_POWER_ON_PX5, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(BUTTON_VOL_UP_PX6, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(BUTTON_VOL_DOWN_PX7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(BUTTON_SLIDE_SW_PY0, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(BUTTON_HOME_PY1, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(LCD_TE_PY2, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PWR_I2C_SCL_PY3, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
|
|
c529a6c |
+ PINCFG(PWR_I2C_SDA_PY4, I2CPMU, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
|
|
c529a6c |
+ PINCFG(CLK_32K_OUT_PY5, RSVD2, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PZ0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PZ1, SDMMC1, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PZ2, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PZ3, DEFAULT, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PZ4, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PZ5, SOC, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DAP2_FS_PAA0, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DAP2_SCLK_PAA1, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DAP2_DIN_PAA2, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DAP2_DOUT_PAA3, I2S2, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(AUD_MCLK_PBB0, DEFAULT, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DVFS_PWM_PBB1, CLDVFS, NORMAL, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(DVFS_CLK_PBB2, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(GPIO_X1_AUD_PBB3, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(GPIO_X3_AUD_PBB4, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(HDMI_CEC_PCC0, CEC, NORMAL, NORMAL, INPUT, DISABLE, HIGH),
|
|
|
c529a6c |
+ PINCFG(HDMI_INT_DP_HPD_PCC1, DP, NORMAL, NORMAL, INPUT, DISABLE, NORMAL),
|
|
|
c529a6c |
+ PINCFG(SPDIF_OUT_PCC2, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SPDIF_IN_PCC3, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(USB_VBUS_EN0_PCC4, DEFAULT, UP, NORMAL, INPUT, DISABLE, NORMAL),
|
|
|
c529a6c |
+ PINCFG(USB_VBUS_EN1_PCC5, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
|
|
|
c529a6c |
+ PINCFG(DP_HPD0_PCC6, DP, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PCC7, RSVD0, DOWN, TRISTATE, OUTPUT, DISABLE, NORMAL),
|
|
|
c529a6c |
+ PINCFG(SPI2_CS1_PDD0, DEFAULT, DOWN, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(QSPI_SCK_PEE0, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(QSPI_CS_N_PEE1, QSPI, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(QSPI_IO0_PEE2, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(QSPI_IO1_PEE3, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(QSPI_IO2_PEE4, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(QSPI_IO3_PEE5, QSPI, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CORE_PWR_REQ, CORE, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CPU_PWR_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(PWR_INT_N, PMI, UP, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CLK_32K_IN, CLK, NORMAL, NORMAL, INPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(JTAG_RTCK, JTAG, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(CLK_REQ, RSVD1, DOWN, TRISTATE, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+ PINCFG(SHUTDOWN, SHUTDOWN, NORMAL, NORMAL, OUTPUT, DISABLE, DEFAULT),
|
|
|
c529a6c |
+};
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#define DRVCFG(_drvgrp, _slwf, _slwr, _drvup, _drvdn, _lpmd, _schmt, _hsm) \
|
|
|
c529a6c |
+ { \
|
|
|
c529a6c |
+ .drvgrp = PMUX_DRVGRP_##_drvgrp, \
|
|
|
c529a6c |
+ .slwf = _slwf, \
|
|
|
c529a6c |
+ .slwr = _slwr, \
|
|
|
c529a6c |
+ .drvup = _drvup, \
|
|
|
c529a6c |
+ .drvdn = _drvdn, \
|
|
|
c529a6c |
+ .lpmd = PMUX_LPMD_##_lpmd, \
|
|
|
c529a6c |
+ .schmt = PMUX_SCHMT_##_schmt, \
|
|
|
c529a6c |
+ .hsm = PMUX_HSM_##_hsm, \
|
|
|
c529a6c |
+ }
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+static const struct pmux_drvgrp_config p3450_0000_drvgrps[] = {
|
|
|
c529a6c |
+};
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#endif /* PINMUX_CONFIG_P3450_0000_H */
|
|
|
c529a6c |
diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig
|
|
|
c529a6c |
new file mode 100644
|
|
|
c529a6c |
index 000000000000..3a95028279d3
|
|
|
c529a6c |
--- /dev/null
|
|
|
c529a6c |
+++ b/configs/p3450-0000_defconfig
|
|
|
c529a6c |
@@ -0,0 +1,55 @@
|
|
|
c529a6c |
+CONFIG_ARM=y
|
|
|
c529a6c |
+CONFIG_TEGRA=y
|
|
|
c529a6c |
+CONFIG_SYS_TEXT_BASE=0x80080000
|
|
|
c529a6c |
+CONFIG_TEGRA210=y
|
|
|
c529a6c |
+CONFIG_TARGET_P3450_0000=y
|
|
|
c529a6c |
+CONFIG_NR_DRAM_BANKS=2
|
|
|
c529a6c |
+CONFIG_OF_SYSTEM_SETUP=y
|
|
|
c529a6c |
+CONFIG_OF_BOARD_SETUP=y
|
|
|
c529a6c |
+CONFIG_CONSOLE_MUX=y
|
|
|
c529a6c |
+CONFIG_SYS_STDIO_DEREGISTER=y
|
|
|
c529a6c |
+CONFIG_SYS_PROMPT="Tegra210 (P3450-0000) # "
|
|
|
c529a6c |
+# CONFIG_CMD_IMI is not set
|
|
|
c529a6c |
+CONFIG_CMD_DFU=y
|
|
|
c529a6c |
+# CONFIG_CMD_FLASH is not set
|
|
|
c529a6c |
+CONFIG_CMD_GPIO=y
|
|
|
c529a6c |
+CONFIG_CMD_I2C=y
|
|
|
c529a6c |
+CONFIG_CMD_MMC=y
|
|
|
c529a6c |
+CONFIG_CMD_PCI=y
|
|
|
c529a6c |
+CONFIG_CMD_SF=y
|
|
|
c529a6c |
+CONFIG_CMD_SPI=y
|
|
|
c529a6c |
+CONFIG_CMD_USB=y
|
|
|
c529a6c |
+CONFIG_CMD_USB_MASS_STORAGE=y
|
|
|
c529a6c |
+# CONFIG_CMD_SETEXPR is not set
|
|
|
c529a6c |
+# CONFIG_CMD_NFS is not set
|
|
|
c529a6c |
+CONFIG_CMD_EXT4_WRITE=y
|
|
|
c529a6c |
+CONFIG_OF_LIVE=y
|
|
|
c529a6c |
+CONFIG_DEFAULT_DEVICE_TREE="tegra210-p3450-0000"
|
|
|
c529a6c |
+CONFIG_DFU_MMC=y
|
|
|
c529a6c |
+CONFIG_DFU_RAM=y
|
|
|
c529a6c |
+CONFIG_DFU_SF=y
|
|
|
c529a6c |
+CONFIG_SYS_I2C_TEGRA=y
|
|
|
c529a6c |
+CONFIG_SPI_FLASH=y
|
|
|
c529a6c |
+CONFIG_SF_DEFAULT_MODE=0
|
|
|
c529a6c |
+CONFIG_SF_DEFAULT_SPEED=24000000
|
|
|
c529a6c |
+CONFIG_SPI_FLASH_WINBOND=y
|
|
|
c529a6c |
+CONFIG_RTL8169=y
|
|
|
c529a6c |
+CONFIG_PCI=y
|
|
|
c529a6c |
+CONFIG_DM_PCI=y
|
|
|
c529a6c |
+CONFIG_DM_PCI_COMPAT=y
|
|
|
c529a6c |
+CONFIG_PCI_TEGRA=y
|
|
|
c529a6c |
+CONFIG_SYS_NS16550=y
|
|
|
c529a6c |
+CONFIG_TEGRA114_SPI=y
|
|
|
c529a6c |
+CONFIG_USB=y
|
|
|
c529a6c |
+CONFIG_DM_USB=y
|
|
|
c529a6c |
+CONFIG_USB_EHCI_HCD=y
|
|
|
c529a6c |
+CONFIG_USB_EHCI_TEGRA=y
|
|
|
c529a6c |
+CONFIG_USB_GADGET=y
|
|
|
c529a6c |
+CONFIG_USB_GADGET_MANUFACTURER="NVIDIA"
|
|
|
c529a6c |
+CONFIG_USB_GADGET_VENDOR_NUM=0x0955
|
|
|
c529a6c |
+CONFIG_USB_GADGET_PRODUCT_NUM=0x701a
|
|
|
c529a6c |
+CONFIG_CI_UDC=y
|
|
|
c529a6c |
+CONFIG_USB_GADGET_DOWNLOAD=y
|
|
|
c529a6c |
+CONFIG_USB_HOST_ETHER=y
|
|
|
c529a6c |
+CONFIG_USB_ETHER_ASIX=y
|
|
|
c529a6c |
+# CONFIG_ENV_IS_IN_MMC is not set
|
|
|
c529a6c |
diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h
|
|
|
c529a6c |
new file mode 100644
|
|
|
c529a6c |
index 000000000000..ee819b7573b0
|
|
|
c529a6c |
--- /dev/null
|
|
|
c529a6c |
+++ b/include/configs/p3450-0000.h
|
|
|
c529a6c |
@@ -0,0 +1,34 @@
|
|
|
c529a6c |
+/* SPDX-License-Identifier: GPL-2.0+ */
|
|
|
c529a6c |
+/*
|
|
|
c529a6c |
+ * (C) Copyright 2018-2019 NVIDIA Corporation. All rights reserved.
|
|
|
c529a6c |
+ */
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#ifndef _P3450_0000_H
|
|
|
c529a6c |
+#define _P3450_0000_H
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#include <linux/sizes.h>
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#include "tegra210-common.h"
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+/* High-level configuration options */
|
|
|
c529a6c |
+#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P3450-0000"
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+/* Board-specific serial config */
|
|
|
c529a6c |
+#define CONFIG_TEGRA_ENABLE_UARTA
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+/* Only MMC1/PXE/DHCP for now, add USB back in later when supported */
|
|
|
c529a6c |
+#define BOOT_TARGET_DEVICES(func) \
|
|
|
c529a6c |
+ func(MMC, mmc, 0) \
|
|
|
c529a6c |
+ func(PXE, pxe, na) \
|
|
|
c529a6c |
+ func(DHCP, dhcp, na)
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+/* SPI */
|
|
|
c529a6c |
+#define CONFIG_SPI_FLASH_SIZE (4 << 20)
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#include "tegra-common-usb-gadget.h"
|
|
|
c529a6c |
+#include "tegra-common-post.h"
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+/* Crystal is 38.4MHz. clk_m runs at half that rate */
|
|
|
c529a6c |
+#define COUNTER_FREQUENCY 19200000
|
|
|
c529a6c |
+
|
|
|
c529a6c |
+#endif /* _P3450_0000_H */
|