From a2872b1e2f81e04f92f0970e18c6c8a40640eea8 Mon Sep 17 00:00:00 2001 From: Peter Robinson Date: Wed, 5 Sep 2018 12:11:40 +0100 Subject: [PATCH] tegra fix tx1 Signed-off-by: Peter Robinson --- arch/arm/include/asm/arch-tegra/xusb-padctl.h | 1 + arch/arm/mach-tegra/board.c | 4 +- arch/arm/mach-tegra/board2.c | 12 ++++ arch/arm/mach-tegra/dt-setup.c | 5 +- arch/arm/mach-tegra/gpu.c | 2 + .../mach-tegra/{tegra186 => }/nvtboot_board.c | 70 +++++++++++++++++++ .../mach-tegra/{tegra186 => }/nvtboot_ll.S | 0 .../mach-tegra/{tegra186 => }/nvtboot_mem.c | 0 arch/arm/mach-tegra/tegra186/Makefile | 6 +- arch/arm/mach-tegra/tegra210/Makefile | 3 + arch/arm/mach-tegra/tegra210/clock.c | 19 ----- arch/arm/mach-tegra/tegra210/xusb-padctl.c | 68 +++++++++++------- arch/arm/mach-tegra/xusb-padctl-dummy.c | 4 ++ configs/p2371-0000_defconfig | 2 +- configs/p2371-2180_defconfig | 2 +- configs/p2571_defconfig | 2 +- 16 files changed, 146 insertions(+), 54 deletions(-) rename arch/arm/mach-tegra/{tegra186 => }/nvtboot_board.c (84%) rename arch/arm/mach-tegra/{tegra186 => }/nvtboot_ll.S (100%) rename arch/arm/mach-tegra/{tegra186 => }/nvtboot_mem.c (100%) diff --git a/arch/arm/include/asm/arch-tegra/xusb-padctl.h b/arch/arm/include/asm/arch-tegra/xusb-padctl.h index deccdf455d..7e14d8109d 100644 --- a/arch/arm/include/asm/arch-tegra/xusb-padctl.h +++ b/arch/arm/include/asm/arch-tegra/xusb-padctl.h @@ -16,6 +16,7 @@ struct tegra_xusb_phy; struct tegra_xusb_phy *tegra_xusb_phy_get(unsigned int type); void tegra_xusb_padctl_init(void); +void tegra_xusb_padctl_exit(void); int tegra_xusb_phy_prepare(struct tegra_xusb_phy *phy); int tegra_xusb_phy_enable(struct tegra_xusb_phy *phy); int tegra_xusb_phy_disable(struct tegra_xusb_phy *phy); diff --git a/arch/arm/mach-tegra/board.c b/arch/arm/mach-tegra/board.c index f8fc042a1d..ddef228831 100644 --- a/arch/arm/mach-tegra/board.c +++ b/arch/arm/mach-tegra/board.c @@ -35,7 +35,7 @@ enum { static bool from_spl __attribute__ ((section(".data"))); -#ifndef CONFIG_SPL_BUILD +#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TEGRA210) void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) { from_spl = r0 != UBOOT_NOT_LOADED_FROM_SPL; @@ -66,6 +66,7 @@ bool tegra_cpu_is_non_secure(void) } #endif +#if !defined(CONFIG_ARM64) /* Read the RAM size directly from the memory controller */ static phys_size_t query_sdram_size(void) { @@ -122,6 +123,7 @@ int dram_init(void) gd->ram_size = query_sdram_size(); return 0; } +#endif static int uart_configs[] = { #if defined(CONFIG_TEGRA20) diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index 421a71b301..22ecd99760 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -171,6 +171,12 @@ int board_init(void) return nvidia_board_init(); } +void board_cleanup_before_linux(void) +{ + /* power down UPHY PLL */ + tegra_xusb_padctl_exit(); +} + #ifdef CONFIG_BOARD_EARLY_INIT_F static void __gpio_early_init(void) { @@ -220,9 +226,14 @@ int board_late_init(void) #endif start_cpu_fan(); +#if defined(CONFIG_TEGRA210) + tegra_soc_board_init_late(); +#endif + return 0; } +#ifndef CONFIG_TEGRA210 /* * In some SW environments, a memory carve-out exists to house a secure * monitor, a trusted OS, and/or various statically allocated media buffers. @@ -348,3 +359,4 @@ ulong board_get_usable_ram_top(ulong total_size) { return CONFIG_SYS_SDRAM_BASE + usable_ram_size_below_4g(); } +#endif diff --git a/arch/arm/mach-tegra/dt-setup.c b/arch/arm/mach-tegra/dt-setup.c index 8ac723f41e..a961fab20f 100644 --- a/arch/arm/mach-tegra/dt-setup.c +++ b/arch/arm/mach-tegra/dt-setup.c @@ -12,12 +12,10 @@ */ int ft_system_setup(void *blob, bd_t *bd) { +#if !defined(CONFIG_ARM64) const char *gpu_compats[] = { #if defined(CONFIG_TEGRA124) "nvidia,gk20a", -#endif -#if defined(CONFIG_TEGRA210) - "nvidia,gm20b", #endif }; int i, ret; @@ -28,6 +26,7 @@ int ft_system_setup(void *blob, bd_t *bd) if (ret) return ret; } +#endif return 0; } diff --git a/arch/arm/mach-tegra/gpu.c b/arch/arm/mach-tegra/gpu.c index e047f67821..3b8c1a0434 100644 --- a/arch/arm/mach-tegra/gpu.c +++ b/arch/arm/mach-tegra/gpu.c @@ -17,6 +17,7 @@ static bool _configured; void tegra_gpu_config(void) { +#if !defined(CONFIG_ARM64) struct mc_ctlr *mc = (struct mc_ctlr *)NV_PA_MC_BASE; #if defined(CONFIG_TEGRA_SUPPORT_NON_SECURE) @@ -34,6 +35,7 @@ void tegra_gpu_config(void) debug("configured VPR\n"); _configured = true; +#endif } #if defined(CONFIG_OF_LIBFDT) diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_board.c b/arch/arm/mach-tegra/nvtboot_board.c similarity index 84% rename from arch/arm/mach-tegra/tegra186/nvtboot_board.c rename to arch/arm/mach-tegra/nvtboot_board.c index 83c0e931ea..7b98b502ef 100644 --- a/arch/arm/mach-tegra/tegra186/nvtboot_board.c +++ b/arch/arm/mach-tegra/nvtboot_board.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -270,6 +271,27 @@ static void set_calculated_env_vars(void) free(vars); } +char *strstrip(char *s) +{ + size_t size; + char *end; + + size = strlen(s); + + if (!size) + return s; + + end = s + size - 1; + while (end >= s && isblank(*end)) + end--; + *(end + 1) = '\0'; + + while (*s && isblank(*s)) + s++; + + return s; +} + static int set_fdt_addr(void) { int ret; @@ -283,6 +305,7 @@ static int set_fdt_addr(void) return 0; } +#if defined(CONFIG_TEGRA186) /* * Attempt to use /chosen/nvidia,ether-mac in the nvtboot DTB to U-Boot's * ethaddr environment variable if possible. @@ -316,6 +339,49 @@ static int set_ethaddr_from_nvtboot(void) return 0; } +#endif + +static int set_cbootargs(void) +{ + const void *nvtboot_blob = (void *)nvtboot_boot_x0; + const void *prop; + char *bargs, *s; + int node, len, ret = 0; + + /* + * Save the bootargs passed in the DTB by the previous bootloader + * (CBoot) to the env. (pointer in reg x0) + */ + + debug("%s: nvtboot_blob = %p\n", __func__, nvtboot_blob); + + node = fdt_path_offset(nvtboot_blob, "/chosen"); + if (node < 0) { + pr_err("Can't find /chosen node in nvtboot DTB"); + return node; + } + debug("%s: found 'chosen' node: %d\n", __func__, node); + + prop = fdt_getprop(nvtboot_blob, node, "bootargs", &len); + if (!prop) { + pr_err("Can't find /chosen/bootargs property in nvtboot DTB"); + return -ENOENT; + } + debug("%s: found 'bootargs' property, len =%d\n", __func__, len); + + /* CBoot seems to add trailing whitespace - strip it here */ + s = strdup((char *)prop); + bargs = strstrip(s); + debug("%s: bootargs = %s!\n", __func__, bargs); + + /* Set cbootargs to env for later use by extlinux files */ + ret = env_set("cbootargs", bargs); + if (ret) + printf("Failed to set cbootargs from cboot DTB: %d\n", ret); + + free(s); + return ret; +} int tegra_soc_board_init_late(void) { @@ -325,8 +391,12 @@ int tegra_soc_board_init_late(void) * extlinux.conf or boot script content. */ set_fdt_addr(); +#if defined(CONFIG_TEGRA186) /* Ignore errors here; not all cases care about Ethernet addresses */ set_ethaddr_from_nvtboot(); +#endif + /* Save CBoot bootargs to env */ + set_cbootargs(); return 0; } diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_ll.S b/arch/arm/mach-tegra/nvtboot_ll.S similarity index 100% rename from arch/arm/mach-tegra/tegra186/nvtboot_ll.S rename to arch/arm/mach-tegra/nvtboot_ll.S diff --git a/arch/arm/mach-tegra/tegra186/nvtboot_mem.c b/arch/arm/mach-tegra/nvtboot_mem.c similarity index 100% rename from arch/arm/mach-tegra/tegra186/nvtboot_mem.c rename to arch/arm/mach-tegra/nvtboot_mem.c diff --git a/arch/arm/mach-tegra/tegra186/Makefile b/arch/arm/mach-tegra/tegra186/Makefile index 56f3378ece..1a43ef7a45 100644 --- a/arch/arm/mach-tegra/tegra186/Makefile +++ b/arch/arm/mach-tegra/tegra186/Makefile @@ -4,6 +4,6 @@ obj-y += ../board186.o obj-y += cache.o -obj-y += nvtboot_board.o -obj-y += nvtboot_ll.o -obj-y += nvtboot_mem.o +obj-y += ../nvtboot_board.o +obj-y += ../nvtboot_ll.o +obj-y += ../nvtboot_mem.o diff --git a/arch/arm/mach-tegra/tegra210/Makefile b/arch/arm/mach-tegra/tegra210/Makefile index b6012fc7ba..6de6d810eb 100644 --- a/arch/arm/mach-tegra/tegra210/Makefile +++ b/arch/arm/mach-tegra/tegra210/Makefile @@ -8,5 +8,8 @@ obj-y += clock.o obj-y += funcmux.o obj-y += pinmux.o +obj-y += ../nvtboot_board.o +obj-y += ../nvtboot_ll.o +obj-y += ../nvtboot_mem.o obj-y += xusb-padctl.o obj-y += ../xusb-padctl-common.o diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c index 06068c4b7b..341c97f16d 100644 --- a/arch/arm/mach-tegra/tegra210/clock.c +++ b/arch/arm/mach-tegra/tegra210/clock.c @@ -1235,25 +1235,6 @@ int tegra_plle_enable(void) value &= ~PLLE_SS_CNTL_INTERP_RESET; writel(value, NV_PA_CLK_RST_BASE + PLLE_SS_CNTL); - /* 7. Enable HW power sequencer for PLLE */ - - value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); - value &= ~PLLE_MISC_IDDQ_SWCTL; - writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); - - value = readl(NV_PA_CLK_RST_BASE + PLLE_AUX); - value &= ~PLLE_AUX_SS_SWCTL; - value &= ~PLLE_AUX_ENABLE_SWCTL; - value |= PLLE_AUX_SS_SEQ_INCLUDE; - value |= PLLE_AUX_USE_LOCKDET; - writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); - - /* 8. Wait 1 us */ - - udelay(1); - value |= PLLE_AUX_SEQ_ENABLE; - writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); - return 0; } diff --git a/arch/arm/mach-tegra/tegra210/xusb-padctl.c b/arch/arm/mach-tegra/tegra210/xusb-padctl.c index ab6684f027..64dc297ae2 100644 --- a/arch/arm/mach-tegra/tegra210/xusb-padctl.c +++ b/arch/arm/mach-tegra/tegra210/xusb-padctl.c @@ -170,6 +170,17 @@ static int phy_unprepare(struct tegra_xusb_phy *phy) return tegra_xusb_padctl_disable(phy->padctl); } +#define XUSB_PADCTL_USB3_PAD_MUX 0x28 +#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE (1 << 0) +#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0 (1 << 1) +#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1 (1 << 2) +#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2 (1 << 3) +#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3 (1 << 4) +#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4 (1 << 5) +#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5 (1 << 6) +#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6 (1 << 7) +#define XUSB_PADCTL_USB3_PAD_MUX_FORCE_SATA_PAD_IDDQ_DISABLE_MASK0 (1 << 8) + #define XUSB_PADCTL_UPHY_PLL_P0_CTL1 0x360 #define XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV_MASK (0xff << 20) #define XUSB_PADCTL_UPHY_PLL_P0_CTL1_FREQ_NDIV(x) (((x) & 0xff) << 20) @@ -366,31 +377,6 @@ static int pcie_phy_enable(struct tegra_xusb_phy *phy) value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_CLK_EN; padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); - value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); - value &= ~CLK_RST_XUSBIO_PLL_CFG0_PADPLL_RESET_SWCTL; - value &= ~CLK_RST_XUSBIO_PLL_CFG0_CLK_ENABLE_SWCTL; - value |= CLK_RST_XUSBIO_PLL_CFG0_PADPLL_USE_LOCKDET; - value |= CLK_RST_XUSBIO_PLL_CFG0_PADPLL_SLEEP_IDDQ; - writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); - - value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); - value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_PWR_OVRD; - padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); - - value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL2); - value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL2_CAL_OVRD; - padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL2); - - value = padctl_readl(padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL8); - value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL8_RCAL_OVRD; - padctl_writel(padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL8); - - udelay(1); - - value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); - value |= CLK_RST_XUSBIO_PLL_CFG0_SEQ_ENABLE; - writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); - debug("< %s()\n", __func__); return 0; } @@ -454,3 +440,35 @@ void tegra_xusb_padctl_init(void) ret = tegra_xusb_process_nodes(nodes, count, &tegra210_socdata); debug("%s: done, ret=%d\n", __func__, ret); } + +void tegra_xusb_padctl_exit(void) +{ + u32 value; + + debug("> %s\n", __func__); + + value = padctl_readl(&padctl, XUSB_PADCTL_USB3_PAD_MUX); + value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE; + value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK0; + value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK1; + value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK2; + value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK3; + value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK4; + value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK5; + value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_PCIE_PAD_IDDQ_DISABLE_MASK6; + value &= ~XUSB_PADCTL_USB3_PAD_MUX_FORCE_SATA_PAD_IDDQ_DISABLE_MASK0; + padctl_writel(&padctl, value, XUSB_PADCTL_USB3_PAD_MUX); + + value = padctl_readl(&padctl, XUSB_PADCTL_UPHY_PLL_P0_CTL1); + value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_IDDQ; + value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP_MASK; + value |= XUSB_PADCTL_UPHY_PLL_P0_CTL1_SLEEP(3); + value &= ~XUSB_PADCTL_UPHY_PLL_P0_CTL1_ENABLE; + padctl_writel(&padctl, value, XUSB_PADCTL_UPHY_PLL_P0_CTL1); + + reset_set_enable(PERIPH_ID_PEX_USB_UPHY, 1); + while (padctl.enable) + tegra_xusb_padctl_disable(&padctl); + + debug("< %s()\n", __func__); +} diff --git a/arch/arm/mach-tegra/xusb-padctl-dummy.c b/arch/arm/mach-tegra/xusb-padctl-dummy.c index 3ec27a2e3a..f2d90302f6 100644 --- a/arch/arm/mach-tegra/xusb-padctl-dummy.c +++ b/arch/arm/mach-tegra/xusb-padctl-dummy.c @@ -36,3 +36,7 @@ int __weak tegra_xusb_phy_unprepare(struct tegra_xusb_phy *phy) void __weak tegra_xusb_padctl_init(void) { } + +void __weak tegra_xusb_padctl_exit(void) +{ +} diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index 02a7569205..d9b8be15e7 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TEGRA=y -CONFIG_SYS_TEXT_BASE=0x80110000 +CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_TEGRA210=y CONFIG_TARGET_P2371_0000=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index 156a1cbcf9..602c5c1fad 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TEGRA=y -CONFIG_SYS_TEXT_BASE=0x80110000 +CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_TEGRA210=y CONFIG_TARGET_P2371_2180=y CONFIG_NR_DRAM_BANKS=2 diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index 5cbb1c3201..29929e2d99 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_TEGRA=y -CONFIG_SYS_TEXT_BASE=0x80110000 +CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_TEGRA210=y CONFIG_TARGET_P2571=y CONFIG_NR_DRAM_BANKS=2 -- 2.19.0.rc0