diff --git a/.cvsignore b/.cvsignore index e69de29..a29d587 100644 --- a/.cvsignore +++ b/.cvsignore @@ -0,0 +1 @@ +verilator-3.712.tgz diff --git a/import.log b/import.log new file mode 100644 index 0000000..0b1560a --- /dev/null +++ b/import.log @@ -0,0 +1 @@ +verilator-3_712-1_fc10:F-11:verilator-3.712-1.fc10.src.rpm:1248645845 diff --git a/sources b/sources index e69de29..362570b 100644 --- a/sources +++ b/sources @@ -0,0 +1 @@ +85839104f7f245879e7db41fc632fee0 verilator-3.712.tgz diff --git a/verilator-driver.patch b/verilator-driver.patch new file mode 100644 index 0000000..f489ed0 --- /dev/null +++ b/verilator-driver.patch @@ -0,0 +1,92 @@ +diff --git a/src/V3Tristate.cpp b/src/V3Tristate.cpp +index eab63c2..b5dca8b 100644 +--- a/src/V3Tristate.cpp ++++ b/src/V3Tristate.cpp +@@ -344,14 +344,15 @@ private: + } + } + if (!complete) { +- if (found_one) { +- UINFO(9, " Problem mixing tristate and low-Z on " << lhsp << endl); +- UINFO(9, " Found " << found_one << " __en signals from of " << refs->size() << " possible drivers" << endl); +- // not sure what I should do here other than error that they are mixing low-Z and tristate drivers. +- // The other scenerio, and probably more likely, is that they are using a high-Z construct that +- // is not supported. Improving the high-Z detection logic will reduce the occurance of this failure. +- v3error("Mixing tristate and low-Z drivers. Perhaps you are using a high-Z construct not supported"); +- } else { ++// if (found_one) { ++// UINFO(9, " Problem mixing tristate and low-Z on " << lhsp << endl); ++// UINFO(9, " Found " << found_one << " __en signals from of " << refs->size() << " possible drivers" << endl); ++// // not sure what I should do here other than error that they are mixing low-Z and tristate drivers. ++// // The other scenerio, and probably more likely, is that they are using a high-Z construct that ++// // is not supported. Improving the high-Z detection logic will reduce the occurance of this failure. ++// v3error("Mixing tristate and low-Z drivers. Perhaps you are using a high-Z construct not supported"); ++// } else { ++ if(found_one==0) { + UINFO(9, " No tristates found on " << lhsp <erase(lhsp); +@@ -377,6 +378,19 @@ private: + + // create a new var for this assignment. + AstVar* enp = (AstVar*)refp->user1p(); ++ if(!enp) { ++ enp = new AstVar(lhsp->fileline(), ++ AstVarType::MODULETEMP, ++ lhsp->name()+"__en"+cvtToStr(m_unique), ++ (w>1) ? new AstRange(nodep->fileline(), w-1, 0) : (AstRange *) NULL); ++ V3Number ones(lhsp->fileline(), wfill, 0); ++ ones.setAllBits1(); ++ nodep->addStmtp(enp); ++ nodep->addStmtp(new AstAssignW(lhsp->fileline(), ++ new AstVarRef(lhsp->fileline(), enp, true), ++ new AstConst(lhsp->fileline(), ones))); ++ ++ } + AstVar* newlhsp = new AstVar(lhsp->fileline(), + AstVarType::MODULETEMP, + lhsp->name()+"__lhs"+cvtToStr(m_unique++), +@@ -649,17 +663,38 @@ private: + if (m_state == CONVERT_PINS) { + if (nodep->modVarp()->user1p()) { + // create the input pin +- AstVarRef* refp = nodep->exprp()->castVarRef(); ++ AstPin *pinp; ++ AstVarRef *refp; ++ AstSel *selp = nodep->exprp()->castSel(); ++ if(selp) { ++ refp = selp->fromp()->castVarRef(); ++ } else { ++ refp = nodep->exprp()->castVarRef(); ++ } ++ if(!refp) { ++ v3error("Unsupported inout type"); ++ return; ++ } + AstVar* inp; + if (refp->varp()->user1p()) { // this is a tristate + inp = (AstVar*) refp->varp()->user1p(); + } else { + inp = refp->varp(); + } +- AstPin* pinp = new AstPin(nodep->fileline(), +- nodep->pinNum(), +- nodep->name() + "__in", +- new AstVarRef(nodep->fileline(), inp, false)); ++ AstNode* newnodep; ++ if(selp) { ++ newnodep = new AstSel(selp->fileline(), ++ new AstVarRef(nodep->fileline(), inp, false), ++ selp->lsbp()->cloneTree(false), ++ selp->widthp()->cloneTree(false)); ++ } else { ++ newnodep = new AstVarRef(nodep->fileline(), inp, false); ++ } ++ ++ pinp = new AstPin(nodep->fileline(), ++ nodep->pinNum(), ++ nodep->name() + "__in", ++ newnodep); + m_cellp->addPinsp(pinp); + + // now link it diff --git a/verilator.spec b/verilator.spec new file mode 100644 index 0000000..b8aa77e --- /dev/null +++ b/verilator.spec @@ -0,0 +1,112 @@ +Name: verilator +Version: 3.712 +Release: 1%{?dist} +Summary: A fast simulator for synthesizable Verilog +License: GPLv2 +Group: Applications/Engineering +URL: http://www.veripool.com/verilator.html +Source0: http://www.veripool.org/verilator/ftp/%{name}-%{version}.tgz +BuildRoot: %{_tmppath}/%{name}-%{version}-%{release}-root-%(%{__id_u} -n) +BuildRequires: perl, flex, bison, perl-SystemPerl-devel +Requires: perl-SystemPerl-devel >= 1.320 +Patch0: verilator-driver.patch + +%description + +Verilator is the fastest free Verilog HDL simulator. It compiles +synthesizable Verilog, plus some PSL, SystemVerilog and Synthesis +assertions into C++ or SystemC code. It is designed for large projects +where fast simulation performance is of primary concern, and is +especially well suited to create executable models of CPUs for +embedded software design teams. + +Authors: +-------- + +Wilson Snyder +Paul Wasson +Duane Galbi + +%prep +%setup -q +%patch0 -p1 +find . -name .gitignore -exec rm {} \; +export VERILATOR_ROOT=%{_datadir} +%{configure} --enable-envdef --prefix=%{_prefix} --mandir=%{_mandir} +%{__sed} -i "s|CPPFLAGSNOWALL +=|CPPFLAGSNOWALL +=%{optflags}|" \ +{src,test_c,test_regress,test_sc,test_sp,test_verilated}/Makefile_obj + +%build +SYSTEMPERL_INCLUDE=%{_includedir}/perl-SystemPerl %{__make} %{?_smp_mflags} + + +%install +%{__rm} -rf %{buildroot} +%{__make} DESTDIR=$RPM_BUILD_ROOT install + +# move the examples out of the datadir so that we can later include +# them in the doc dir +%{__mv} %{buildroot}%{_datadir}/verilator/examples examples + +# remove not needed build directory and bin directory +%{__rm} -rf %{buildroot}%{_datadir}/verilator/src +%{__rm} -rf %{buildroot}%{_bindir}/verilator_includer + +%clean +%{__rm} -rf %{buildroot} + +%files + +%defattr(-, root, root, -) +%doc README +%doc COPYING Changes TODO Artistic +%doc verilator.pdf verilator.html +%doc examples/ + +%attr(644,-,-) %{_mandir}/man1/verilator.1.gz +%{_datadir}/verilator + +%{_bindir}/verilator +%{_bindir}/verilator_bin +%{_bindir}/verilator_bin_dbg +%{_bindir}/verilator_profcfunc + + +%changelog + +* Fri Jul 24 2009 Lane Brooks - 3.712-1 +- Updated to verilator 3.712 + +* Fri Jun 26 2009 Lane Brooks - 3.711-1 +- Updated to verilator 3.711 +- Added Artistic file +- Fixed permissions on man file + +* Tue Jun 9 2009 Lane Brooks - 3.710-1 +- Updated to verilator 3.710 +- Removed GCC 4.3 patch (no longer necessary) +- Added SYSTEMPERL_INCLUDE to point to perl-SystemPerl rpm install location + +* Fri Jan 9 2009 Lane Brooks - 3.700-1 +- Updated dependancy to newly packaged perl-SystemPerl and removed patch +- Updated to verilator 3.700 +- Added GCC 4.3 patch + +* Fri Jan 2 2009 Lane Brooks - 3.681-2 +- Moved examples from data dir to doc dir + +* Thu Jan 1 2009 Lane Brooks - 3.681-1 +- Updated verilator 3.681 +- Removed gcc 4.3 patch as verilator 3.681 incorporates this fix +- Removed shared object patch as it is possible to do this from Makefile + using environment variables +- Further updates to the spec file per Chitlesh's feedback + +* Sun Oct 26 2008 Lane Brooks - 3.680-3 +- Improved spec file for Fedora integration based on initial feedback + +* Thu Oct 23 2008 Lane Brooks - 3.680-2 +- Added shared object generation patch + +* Thu Oct 16 2008 Lane Brooks - 3.680-1 +- Initial package based on SUSE packages from Guenter Dannoritzer