diff --git a/sources b/sources
index 5f4959a..6b5f277 100644
--- a/sources
+++ b/sources
@@ -1 +1 @@
-SHA512 (verilator-3.920.tgz) = b8e7299494305511895376f65387411134eb755795a76891081ce7db779a3f43d6dd13a2b3adbdafec6a960c142cc423d06424a3aace28fb22b1f76fbc39f733
+SHA512 (verilator-3.922.tgz) = f444d6a7e2abce8af2029d93c478218eae686884fe2c3b9ad71d1d359aef82cd2b9265f7094ecadb0daf6183e712d1ecb670979bb35f3971ea1b778736b00b0c
diff --git a/verilator.spec b/verilator.spec
index 7914c13..4cc8ebf 100644
--- a/verilator.spec
+++ b/verilator.spec
@@ -1,6 +1,6 @@
 Name:           verilator
-Version:        3.920
-Release:        2%{?dist}
+Version:        3.922
+Release:        1%{?dist}
 Summary:        A fast simulator for synthesizable Verilog
 License:        LGPLv3 or Artistic 2.0
 URL:            http://www.veripool.com/%{name}.html
@@ -47,8 +47,8 @@ find -name Makefile_obj -exec sed -i \
 %build
 make %{?_smp_mflags}
 
-# disable tests until upstream fixes the issue
-# https://www.veripool.org/issues/1273
+# disable tests due lack of SystemC
+# Skip: vlt/t_a_first_sc: Test requires SystemC
 # %check
 # make test
 
@@ -91,6 +91,9 @@ mv %{buildroot}%{_datadir}/pkgconfig/verilator.pc %{buildroot}%{_libdir}/pkgconf
 %{_libdir}/pkgconfig/verilator.pc
 
 %changelog
+* Sun Mar 18 2018 Filipe Rosset <rosset.filipe@gmail.com> - 3.922-1
+- 3.922 bump, fixes rhbz #1557720
+
 * Fri Feb 09 2018 Igor Gnatenko <ignatenkobrain@fedoraproject.org> - 3.920-2
 - Escape macros in %%changelog