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From c6048f849c7e3f009786df76206e895a69de032c Mon Sep 17 00:00:00 2001
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From: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>
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Date: Mon, 21 Sep 2015 17:09:02 +0300
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Subject: [PATCH] vmxnet3: Support reading IMR registers on bar0
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Instead of asserting, return the actual IMR register value.
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This is aligned with what's returned on ESXi.
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Signed-off-by: Shmulik Ladkani <shmulik.ladkani@ravellosystems.com>
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Tested-by: Dana Rubin <dana.rubin@ravellosystems.com>
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Signed-off-by: Jason Wang <jasowang@redhat.com>
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---
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hw/net/vmxnet3.c | 6 +++++-
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1 files changed, 5 insertions(+), 1 deletions(-)
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diff --git a/tools/qemu-xen/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
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index 48ced71..057f0dc 100644
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--- a/tools/qemu-xen/hw/net/vmxnet3.c
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+++ b/tools/qemu-xen/hw/net/vmxnet3.c
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@@ -1163,9 +1163,13 @@ vmxnet3_io_bar0_write(void *opaque, hwaddr addr,
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static uint64_t
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vmxnet3_io_bar0_read(void *opaque, hwaddr addr, unsigned size)
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{
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+ VMXNET3State *s = opaque;
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+
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if (VMW_IS_MULTIREG_ADDR(addr, VMXNET3_REG_IMR,
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VMXNET3_MAX_INTRS, VMXNET3_REG_ALIGN)) {
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- g_assert_not_reached();
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+ int l = VMW_MULTIREG_IDX_BY_ADDR(addr, VMXNET3_REG_IMR,
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+ VMXNET3_REG_ALIGN);
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+ return s->interrupt_states[l].is_masked;
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}
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VMW_CBPRN("BAR0 unknown read [%" PRIx64 "], size %d", addr, size);
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--
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1.7.0.4
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