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------------------------------------------------------------------------
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*From*: P J P
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*Subject*: [Qemu-devel] [PATCH v3] scsi: esp: check TI buffer index
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before read/write
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*Date*: Mon, 6 Jun 2016 22:04:43 +0530
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------------------------------------------------------------------------
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From: Prasad J Pandit <address@hidden>
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The 53C9X Fast SCSI Controller(FSC) comes with internal 16-byte
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FIFO buffers. One is used to handle commands and other is for
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information transfer. Three control variables 'ti_rptr',
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'ti_wptr' and 'ti_size' are used to control r/w access to the
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information transfer buffer ti_buf[TI_BUFSZ=16]. In that,
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'ti_rptr' is used as read index, where read occurs.
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'ti_wptr' is a write index, where write would occur.
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'ti_size' indicates total bytes to be read from the buffer.
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While reading/writing to this buffer, index could exceed its
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size. Add check to avoid OOB r/w access.
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Reported-by: Huawei PSIRT <address@hidden>
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Reported-by: Li Qiang <address@hidden>
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Signed-off-by: Prasad J Pandit <address@hidden>
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---
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hw/scsi/esp.c | 20 +++++++++-----------
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1 file changed, 9 insertions(+), 11 deletions(-)
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Update as per:
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-> https://lists.gnu.org/archive/html/qemu-devel/2016-06/msg01326.html
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diff --git a/tools/qemu-xen-traditional/hw/esp.c b/tools/qemu-xen-traditional/hw/esp.c
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index c2f6f8f..4b94bbc 100644
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--- a/tools/qemu-xen-traditional/hw/esp.c
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+++ b/tools/qemu-xen-traditional/hw/esp.c
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@@ -403,18 +403,17 @@ uint64_t esp_reg_read(ESPState *s, uint32_t saddr)
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DPRINTF("read reg[%d]: 0x%2.2x\n", saddr, s->rregs[saddr]);
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switch (saddr) {
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case ESP_FIFO:
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- if (s->ti_size > 0) {
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+ if ((s->rregs[ESP_RSTAT] & STAT_PIO_MASK) == 0) {
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+ /* Data out. */
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+ ESP_ERROR("PIO data read not implemented\n");
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+ s->rregs[ESP_FIFO] = 0;
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+ esp_raise_irq(s);
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+ } else if (s->ti_rptr < s->ti_wptr) {
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s->ti_size--;
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- if ((s->rregs[ESP_RSTAT] & STAT_PIO_MASK) == 0) {
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- /* Data out. */
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- ESP_ERROR("PIO data read not implemented\n");
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- s->rregs[ESP_FIFO] = 0;
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- } else {
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- s->rregs[ESP_FIFO] = s->ti_buf[s->ti_rptr++];
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- }
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+ s->rregs[ESP_FIFO] = s->ti_buf[s->ti_rptr++];
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esp_raise_irq(s);
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}
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- if (s->ti_size == 0) {
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+ if (s->ti_rptr == s->ti_wptr) {
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s->ti_rptr = 0;
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s->ti_wptr = 0;
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}
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@@ -459,7 +457,7 @@ void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val)
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} else {
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ESP_ERROR("fifo overrun\n");
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}
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- } else if (s->ti_size == TI_BUFSZ - 1) {
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+ } else if (s->ti_wptr == TI_BUFSZ - 1) {
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ESP_ERROR("fifo overrun\n");
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} else {
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s->ti_size++;
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--
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2.5.5
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