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commit b01e35168de40d192fd7a9ce6884b9c7419afbd4
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Author: Alex Deucher <alexdeucher@gmail.com>
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Date: Mon Nov 24 21:06:42 2008 -0500
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Fix up posted logic
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noticed by benh on IRC
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diff --git a/src/radeon_bios.c b/src/radeon_bios.c
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index 1b85e8d..3e3613a 100644
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--- a/src/radeon_bios.c
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+++ b/src/radeon_bios.c
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@@ -98,7 +98,7 @@ radeon_read_bios(ScrnInfoPtr pScrn)
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}
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static Bool
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-radeon_read_unposted_bios(ScrnInfoPtr pScrn)
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+radeon_read_disabled_bios(ScrnInfoPtr pScrn)
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{
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RADEONInfoPtr info = RADEONPTR(pScrn);
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RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn);
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@@ -293,7 +293,6 @@ RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10)
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RADEONInfoPtr info = RADEONPTR(pScrn);
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int tmp;
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unsigned short dptr;
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- Bool posted = TRUE;
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#ifdef XSERVER_LIBPCIACCESS
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int size = info->PciInfo->rom_size > RADEON_VBIOS_SIZE ? info->PciInfo->rom_size : RADEON_VBIOS_SIZE;
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@@ -310,10 +309,8 @@ RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10)
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info->BIOSAddr = pInt10->BIOSseg << 4;
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(void)memcpy(info->VBIOS, xf86int10Addr(pInt10, info->BIOSAddr),
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RADEON_VBIOS_SIZE);
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- } else if (!radeon_read_bios(pScrn)) {
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- (void)radeon_read_unposted_bios(pScrn);
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- posted = FALSE;
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- }
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+ } else if (!radeon_read_bios(pScrn))
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+ (void)radeon_read_disabled_bios(pScrn);
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}
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if (info->VBIOS[0] != 0x55 || info->VBIOS[1] != 0xaa) {
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@@ -407,17 +404,14 @@ RADEONGetBIOSInfo(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10)
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* so let's work around this for now by only POSTing if none of the
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* CRTCs are enabled
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*/
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- if ((!posted) && info->VBIOS) {
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- posted = radeon_card_posted(pScrn);
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- }
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-
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- if ((!posted) && info->VBIOS) {
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+ if ((!radeon_card_posted(pScrn)) && info->VBIOS) {
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if (info->IsAtomBios) {
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if (!rhdAtomASICInit(info->atomBIOS))
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xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
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"%s: AsicInit failed.\n",__func__);
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} else {
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#if 0
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+ /* FIX ME */
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xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Attempting to POST via legacy BIOS tables\n");
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RADEONGetBIOSInitTableOffsets(pScrn);
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RADEONPostCardFromBIOSTables(pScrn);
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