Blob Blame History Raw
diff --git a/src/radeon_accel.c b/src/radeon_accel.c
index 30a5756..ef8b4a5 100644
--- a/src/radeon_accel.c
+++ b/src/radeon_accel.c
@@ -440,7 +440,8 @@ void RADEONEngineInit(ScrnInfoPtr pScrn)
 	    
 	    OUTREG(R300_GB_TILE_CONFIG, gb_tile_config);
 	    OUTREG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
-	    OUTREG(R300_DST_PIPE_CONFIG, INREG(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG);
+	    if (info->ChipFamily >= CHIP_FAMILY_R420)
+	    	OUTREG(R300_DST_PIPE_CONFIG, INREG(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG);
 	    OUTREG(R300_RB2D_DSTCACHE_MODE, (INREG(R300_RB2D_DSTCACHE_MODE) |
 					     R300_DC_AUTOFLUSH_ENABLE |
 					     R300_DC_DC_DISABLE_IGNORE_PE));
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
index 15a3beb..aab42d0 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@ -61,6 +61,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
     info->texW[0] = info->texH[0] = info->texW[1] = info->texH[1] = 1;
 
     if (IS_R300_3D || IS_R500_3D) {
+	int size;
 
 	if (!info->new_cs) {
 	    BEGIN_ACCEL(3);
@@ -80,10 +81,12 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
 	case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break;
 	}
 
-	BEGIN_ACCEL(5);
+	size = (info->ChipFamily >= CHIP_FAMILY_R420) ? 5 : 4;
+	BEGIN_ACCEL(size);
 	OUT_ACCEL_REG(R300_GB_TILE_CONFIG, gb_tile_config);
 	OUT_ACCEL_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN);
-	OUT_ACCEL_REG(R300_DST_PIPE_CONFIG, R300_PIPE_AUTO_CONFIG);
+	if (info->ChipFamily >= CHIP_FAMILY_R420)
+	    OUT_ACCEL_REG(R300_DST_PIPE_CONFIG, R300_PIPE_AUTO_CONFIG);
 	OUT_ACCEL_REG(R300_GB_SELECT, 0);
 	OUT_ACCEL_REG(R300_GB_ENABLE, 0);
 	FINISH_ACCEL();