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diff --git a/src/radeon_dri.c b/src/radeon_dri.c
index 596c1c0..968afe6 100644
--- a/src/radeon_dri.c
+++ b/src/radeon_dri.c
@@ -739,7 +739,9 @@ static radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
     /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */
     { PCI_VENDOR_INTEL,0x2570,  PCI_VENDOR_ATI,0x4a4e,  PCI_VENDOR_DELL,0x5106,  4 },
     /* Intel 82855PM Processor to I/O Controller / Mobility M6 LY Needs AGPMode 1 (deb #467235) */
-    { PCI_VENDOR_INTEL,0x3340,  PCI_VENDOR_ATI,0x4c59,  0x1014,0x052f,   1},
+    { PCI_VENDOR_INTEL,0x3340,  PCI_VENDOR_ATI,0x4c59,  0x1014,0x052f,   1 },
+    /* Intel 82855PM Processor to I/O Controller / Mobility M9+ Needs AGPMode 8 (phoronix forum) */
+    { PCI_VENDOR_INTEL,0x3340,  PCI_VENDOR_ATI,0x5c61,  0x104d,0x8195,   8 },
     /* Intel 82830 830 Chipset Host Bridge / Mobility M6 LY Needs AGPMode 2 (fdo #17360)*/
     { PCI_VENDOR_INTEL,0x3575,  PCI_VENDOR_ATI,0x4c59,  PCI_VENDOR_DELL,0x00e3,  2 },
     /* Intel 82852/82855 host bridge / Mobility 9600 M10 RV350 Needs AGPMode 1 (deb #467460) */
@@ -754,12 +756,16 @@ static radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
     { PCI_VENDOR_INTEL,0x3580,  PCI_VENDOR_ATI,0x4e50,  0x10cf,0x127f,  1 },
 
     /* ASRock K7VT4A+ AGP 8x / ATI Radeon 9250 AGP Needs AGPMode 4 (LP: #133192) */
-    { 0x1849,0x3189,            PCI_VENDOR_ATI,0x5960,  0x1787, 0x5960,          4},
+    { 0x1849,0x3189,            PCI_VENDOR_ATI,0x5960,  0x1787, 0x5960,          4 },
 
     /* VIA VT8363 Host Bridge / R200 QL [Radeon 8500] Needs AGPMode 2 (lp #141551) */
     { 0x1106,0x0305,            PCI_VENDOR_ATI,0x514c,  0x1002,0x013a,           2 },
     /* VIA VT8377 Host Bridge / R200 QM [Radeon 9100] Needs AGPMode 4 (deb #461144) */
     { 0x1106,0x3189,            PCI_VENDOR_ATI,0x514d,  0x174b,0x7149,           4 },
+    /* VIA VT8377 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (lp #312693) */
+    { 0x1106,0x3189,            PCI_VENDOR_ATI,0x5960,  0x1462,0x0380,           4 },
+    /* VIA VT8377 Host Bridge / RV280 Needs AGPMode 4 (ati ML) */
+    { 0x1106,0x3189,            PCI_VENDOR_ATI,0x5964,  0x148c,0x2073,           4 },
     /* VIA VT82C693A Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 2 */
     { 0x1106,0x0691,            PCI_VENDOR_ATI,0x5960,  0x1043,0x0054,           2 },
     /* VIA K8M800 Host Bridge / RV280 [Radeon 9200 PRO] Needs AGPMode 4 (fdo #12544) */
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index 50446ca..db0f8f5 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -344,6 +344,11 @@ static Bool R100CheckCompositeTexture(PicturePtr pPict, int unit)
 	RADEON_FALLBACK(("Unsupported filter 0x%x\n", pPict->filter));
     }
 
+    if (pPict->repeat && pPict->repeatType != RepeatNormal)
+    {
+	RADEON_FALLBACK(("Unsupported repeat type %d\n", pPict->repeat));
+    }
+
     return TRUE;
 }
 
@@ -666,6 +671,11 @@ static Bool R200CheckCompositeTexture(PicturePtr pPict, int unit)
 	pPict->filter != PictFilterBilinear)
 	RADEON_FALLBACK(("Unsupported filter 0x%x\n", pPict->filter));
 
+    if (pPict->repeat && pPict->repeatType != RepeatNormal)
+    {
+	RADEON_FALLBACK(("Unsupported repeat type %d\n", pPict->repeat));
+    }
+
     return TRUE;
 }
 
@@ -1002,6 +1012,11 @@ static Bool R300CheckCompositeTexture(PicturePtr pPict,
 	    RADEON_FALLBACK(("REPEAT_NONE unsupported for transformed xRGB source\n"));
     }
 
+    if (pPict->repeat && pPict->repeatType != RepeatNormal)
+    {
+	RADEON_FALLBACK(("Unsupported repeat type %d\n", pPict->repeat));
+    }
+
     return TRUE;
 }
 
@@ -1969,7 +1984,7 @@ static void FUNC_NAME(RadeonCompositeTile)(PixmapPtr pDst,
     RINFO_FROM_SCREEN(pDst->drawable.pScreen);
     int vtx_count;
     xPointFixed srcTopLeft, srcTopRight, srcBottomLeft, srcBottomRight;
-    xPointFixed maskTopLeft, maskTopRight, maskBottomLeft, maskBottomRight;
+    static xPointFixed maskTopLeft, maskTopRight, maskBottomLeft, maskBottomRight;
     ACCEL_PREAMBLE();
 
     ENTER_DRAW(0);
@@ -1986,31 +2001,32 @@ static void FUNC_NAME(RadeonCompositeTile)(PixmapPtr pDst,
     srcBottomRight.x = IntToxFixed(srcX + w);
     srcBottomRight.y = IntToxFixed(srcY + h);
 
-    maskTopLeft.x     = IntToxFixed(maskX);
-    maskTopLeft.y     = IntToxFixed(maskY);
-    maskTopRight.x    = IntToxFixed(maskX + w);
-    maskTopRight.y    = IntToxFixed(maskY);
-    maskBottomLeft.x  = IntToxFixed(maskX);
-    maskBottomLeft.y  = IntToxFixed(maskY + h);
-    maskBottomRight.x = IntToxFixed(maskX + w);
-    maskBottomRight.y = IntToxFixed(maskY + h);
-
     if (info->accel_state->is_transform[0]) {
 	transformPoint(info->accel_state->transform[0], &srcTopLeft);
 	transformPoint(info->accel_state->transform[0], &srcTopRight);
 	transformPoint(info->accel_state->transform[0], &srcBottomLeft);
 	transformPoint(info->accel_state->transform[0], &srcBottomRight);
     }
-    if (info->accel_state->is_transform[1]) {
-	transformPoint(info->accel_state->transform[1], &maskTopLeft);
-	transformPoint(info->accel_state->transform[1], &maskTopRight);
-	transformPoint(info->accel_state->transform[1], &maskBottomLeft);
-	transformPoint(info->accel_state->transform[1], &maskBottomRight);
-    }
 
-    if (info->accel_state->has_mask)
+    if (info->accel_state->has_mask) {
+	maskTopLeft.x     = IntToxFixed(maskX);
+	maskTopLeft.y     = IntToxFixed(maskY);
+	maskTopRight.x    = IntToxFixed(maskX + w);
+	maskTopRight.y    = IntToxFixed(maskY);
+	maskBottomLeft.x  = IntToxFixed(maskX);
+	maskBottomLeft.y  = IntToxFixed(maskY + h);
+	maskBottomRight.x = IntToxFixed(maskX + w);
+	maskBottomRight.y = IntToxFixed(maskY + h);
+
+	if (info->accel_state->is_transform[1]) {
+	    transformPoint(info->accel_state->transform[1], &maskTopLeft);
+	    transformPoint(info->accel_state->transform[1], &maskTopRight);
+	    transformPoint(info->accel_state->transform[1], &maskBottomLeft);
+	    transformPoint(info->accel_state->transform[1], &maskBottomRight);
+	}
+
 	vtx_count = 6;
-    else
+    } else
 	vtx_count = 4;
 
     FUNC_NAME(RADEONWaitForVLine)(pScrn, pDst, RADEONBiggerCrtcArea(pDst), dstY, dstY + h, info->accel_state->vsync);
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index 2fe852d..c6ed472 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -1529,7 +1529,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 #endif
 
 	if (IS_R300_3D || IS_R500_3D) {
-	    if (IS_R300_3D && ((dstw > 1440) || (dsth > 1440)))
+	    if (IS_R300_3D && ((dstw+dsth) > 2880))
 		use_quad = TRUE;
 	    /*
 	     * Set up the scissor area to that of the output size.
@@ -1634,39 +1634,43 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv
 			       (float)(srcX + srcw) / info->accel_state->texW[0], (float)srcY / info->accel_state->texH[0],
 			       (float)(srcX + srcw) + 0.5,                        (float)srcY + 0.5);
 	    } else {
-		VTX_OUT_FILTER((float)dstX,                                    (float)dstY,
-			       (float)srcX / info->accel_state->texW[0],              (float)srcY / info->accel_state->texH[0],
-			       (float)srcX + 0.5,                                     (float)srcY + 0.5);
-		VTX_OUT_FILTER((float)dstX,                                    (float)(dstY + dsth * 2),
-			       (float)srcX / info->accel_state->texW[0],              (float)(srcY + srch * 2) / info->accel_state->texH[0],
-			       (float)srcX + 0.5,                                     (float)(srcY + srch * 2) + 0.5);
-		VTX_OUT_FILTER((float)(dstX + dstw * 2),                       (float)dstY,
-			       (float)(srcX + srcw * 2) / info->accel_state->texW[0], (float)srcY / info->accel_state->texH[0],
-			       (float)(srcX + srcw * 2) + 0.5,                        (float)srcY + 0.5);
+		VTX_OUT_FILTER((float)dstX,                                       (float)dstY,
+			       (float)srcX / info->accel_state->texW[0],          (float)srcY / info->accel_state->texH[0],
+			       (float)srcX + 0.5,                                 (float)srcY + 0.5);
+		VTX_OUT_FILTER((float)dstX,                                       (float)(dstY + dstw + dsth),
+			       (float)srcX / info->accel_state->texW[0],          ((float)srcY + (float)srch * (((float)dstw / (float)dsth) + 1.0)) / info->accel_state->texH[0],
+			       (float)srcX + 0.5,                                 (float)srcY + (float)srch * (((float)dstw / (float)dsth) + 1.0) + 0.5);
+		VTX_OUT_FILTER((float)(dstX + dstw + dsth),                       (float)dstY,
+			       ((float)srcX + (float)srcw * (((float)dsth / (float)dstw) + 1.0)) / info->accel_state->texW[0],
+			                                                          (float)srcY / info->accel_state->texH[0],
+			       (float)srcX + (float)srcw * (((float)dsth / (float)dstw) + 1.0) + 0.5,
+			                                                          (float)srcY + 0.5);
 	    }
 	} else {
 	    if (IS_R300_3D || IS_R500_3D) {
 		if (use_quad) {
-		    VTX_OUT((float)dstX,                                           (float)dstY,
-			    (float)srcX / info->accel_state->texW[0],              (float)srcY / info->accel_state->texH[0]);
-		    VTX_OUT((float)dstX,                                           (float)(dstY + dsth),
-			    (float)srcX / info->accel_state->texW[0],              (float)(srcY + srch) / info->accel_state->texH[0]);
-		    VTX_OUT((float)(dstX + dstw),                                  (float)(dstY + dsth),
-			    (float)(srcX + srcw) / info->accel_state->texW[0],     (float)(srcY + srch) / info->accel_state->texH[0]);
-		    VTX_OUT((float)(dstX + dstw),                                  (float)dstY,
-			    (float)(srcX + srcw) / info->accel_state->texW[0],     (float)srcY / info->accel_state->texH[0]);
+		    VTX_OUT((float)dstX,                                       (float)dstY,
+			    (float)srcX / info->accel_state->texW[0],          (float)srcY / info->accel_state->texH[0]);
+		    VTX_OUT((float)dstX,                                       (float)(dstY + dsth),
+			    (float)srcX / info->accel_state->texW[0],          (float)(srcY + srch) / info->accel_state->texH[0]);
+		    VTX_OUT((float)(dstX + dstw),                              (float)(dstY + dsth),
+			    (float)(srcX + srcw) / info->accel_state->texW[0], (float)(srcY + srch) / info->accel_state->texH[0]);
+		    VTX_OUT((float)(dstX + dstw),                              (float)dstY,
+			    (float)(srcX + srcw) / info->accel_state->texW[0], (float)srcY / info->accel_state->texH[0]);
 		} else {
 		    /*
 		     * Render a big, scissored triangle. This means
-		     * doubling the triangle size and adjusting
+		     * increasing the triangle size and adjusting
 		     * texture coordinates.
 		     */
-		    VTX_OUT((float)dstX,                                           (float)dstY,
-			    (float)srcX / info->accel_state->texW[0],              (float)srcY / info->accel_state->texH[0]);
-		    VTX_OUT((float)dstX,                                           (float)(dstY + dsth * 2),
-			    (float)srcX / info->accel_state->texW[0],              (float)(srcY + srch * 2) / info->accel_state->texH[0]);
-		    VTX_OUT((float)(dstX + dstw * 2),                              (float)dstY,
-			    (float)(srcX + srcw * 2) / info->accel_state->texW[0], (float)srcY / info->accel_state->texH[0]);
+		    VTX_OUT((float)dstX,                              (float)dstY,
+			    (float)srcX / info->accel_state->texW[0], (float)srcY / info->accel_state->texH[0]);
+		    VTX_OUT((float)dstX,                              (float)(dstY + dsth + dstw),
+			    (float)srcX / info->accel_state->texW[0], ((float)srcY + (float)srch * (((float)dstw / (float)dsth) + 1.0)) / info->accel_state->texH[0]);
+			    
+		    VTX_OUT((float)(dstX + dstw + dsth),              (float)dstY,
+			    ((float)srcX + (float)srcw * (((float)dsth / (float)dstw) + 1.0)) / info->accel_state->texW[0],
+			                                              (float)srcY / info->accel_state->texH[0]);
 		}
 	    } else {
 		/*