From 67a8c0a24a8cafd9d35488e0c3be786045d1c044 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Oct 01 2008 06:24:59 +0000 Subject: - rebase for latest fixes and new libdrm --- diff --git a/copy-fb-contents.patch b/copy-fb-contents.patch index 114b71d..b7ba3ea 100644 --- a/copy-fb-contents.patch +++ b/copy-fb-contents.patch @@ -11,22 +11,18 @@ index a7e954d..8b126b5 100644 save_CFLAGS="$CFLAGS" diff --git a/src/drmmode_display.c b/src/drmmode_display.c -index 25e6183..a22cd62 100644 +index 3073c15..17e182b 100644 --- a/src/drmmode_display.c +++ b/src/drmmode_display.c -@@ -31,8 +31,11 @@ +@@ -31,6 +31,7 @@ #ifdef XF86DRM_MODE #include "radeon.h" +#include "radeon_reg.h" #include "sarea.h" -+#include "dri_bufmgr.h" -+ static Bool drmmode_resize_fb(ScrnInfoPtr scrn, drmmode_ptr drmmode, int width, int height); - - static Bool -@@ -119,6 +122,71 @@ drmmode_crtc_dpms(xf86CrtcPtr drmmode_crtc, int mode) +@@ -119,6 +120,71 @@ drmmode_crtc_dpms(xf86CrtcPtr drmmode_crtc, int mode) } @@ -98,7 +94,7 @@ index 25e6183..a22cd62 100644 static Bool drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode, Rotation rotation, int x, int y) -@@ -174,7 +242,8 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode, +@@ -174,7 +240,8 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode, fb_id = drmmode->fb_id; if (drmmode_crtc->rotate_fb_id) fb_id = drmmode_crtc->rotate_fb_id; @@ -109,7 +105,7 @@ index 25e6183..a22cd62 100644 fb_id, x, y, output_ids, output_count, &kmode); diff --git a/src/radeon_bufmgr.h b/src/radeon_bufmgr.h -index a16ad9a..b3034d7 100644 +index 3d28992..dc23438 100644 --- a/src/radeon_bufmgr.h +++ b/src/radeon_bufmgr.h @@ -16,6 +16,8 @@ struct radeon_bufmgr { @@ -122,10 +118,10 @@ index a16ad9a..b3034d7 100644 void radeon_bufmgr_emit_reloc(dri_bo *buf, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain); diff --git a/src/radeon_bufmgr_gem.c b/src/radeon_bufmgr_gem.c -index db28edc..75cff8e 100644 +index 7fed98b..8ad1333 100644 --- a/src/radeon_bufmgr_gem.c +++ b/src/radeon_bufmgr_gem.c -@@ -353,6 +353,27 @@ void radeon_bufmgr_gem_wait_rendering(dri_bo *buf) +@@ -352,6 +352,27 @@ void radeon_bufmgr_gem_wait_rendering(dri_bo *buf) return; } @@ -153,7 +149,7 @@ index db28edc..75cff8e 100644 /** * Returns a dri_bo wrapping the given buffer object handle. * -@@ -364,32 +385,20 @@ radeon_bo_gem_create_from_name(dri_bufmgr *bufmgr, const char *name, +@@ -363,32 +384,20 @@ radeon_bo_gem_create_from_name(dri_bufmgr *bufmgr, const char *name, unsigned int handle) { dri_bufmgr_gem *bufmgr_gem = (dri_bufmgr_gem *)bufmgr; diff --git a/radeon-6.9.0-remove-limit-heuristics.patch b/radeon-6.9.0-remove-limit-heuristics.patch index 7f602f4..3fbd9c8 100644 --- a/radeon-6.9.0-remove-limit-heuristics.patch +++ b/radeon-6.9.0-remove-limit-heuristics.patch @@ -1,7 +1,8 @@ -diff -up xf86-video-ati-6.9.0/src/radeon_driver.c.orig xf86-video-ati-6.9.0/src/radeon_driver.c ---- xf86-video-ati-6.9.0/src/radeon_driver.c.orig 2008-09-11 09:58:15.000000000 -0400 -+++ xf86-video-ati-6.9.0/src/radeon_driver.c 2008-09-11 09:58:40.000000000 -0400 -@@ -2932,32 +2932,41 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, in +diff --git a/src/radeon_driver.c b/src/radeon_driver.c +index d5bb24d..7992646 100644 +--- a/src/radeon_driver.c ++++ b/src/radeon_driver.c +@@ -2935,32 +2935,41 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) if (crtc_max_Y > 8192) crtc_max_Y = 8192; } else { diff --git a/radeon-exa-fixes.patch b/radeon-exa-fixes.patch deleted file mode 100644 index 4a9b84b..0000000 --- a/radeon-exa-fixes.patch +++ /dev/null @@ -1,307 +0,0 @@ -diff --git a/src/radeon.h b/src/radeon.h -index 32bfa4e..aeea221 100644 ---- a/src/radeon.h -+++ b/src/radeon.h -@@ -408,6 +408,11 @@ typedef struct _atomBiosHandle *atomBiosHandlePtr; - - #define RADEON_POOL_GART 0 - #define RADEON_POOL_VRAM 1 -+ -+struct radeon_exa_pixmap_priv { -+ dri_bo *bo; -+ int flags; -+}; - - typedef struct { - uint32_t pci_device_id; -diff --git a/src/radeon_bufmgr_gem.c b/src/radeon_bufmgr_gem.c -index db28edc..d7b5644 100644 ---- a/src/radeon_bufmgr_gem.c -+++ b/src/radeon_bufmgr_gem.c -@@ -528,3 +528,10 @@ void radeon_bufmgr_emit_reloc(dri_bo *buf, uint32_t *head, uint32_t *count_p, ui - radeon_bufmgr = (struct radeon_bufmgr *)(buf->bufmgr + 1); - radeon_bufmgr->emit_reloc(buf, head, count_p, read_domains, write_domain); - } -+ -+int radeon_bufmgr_gem_in_vram(dri_bo *buf) -+{ -+ dri_bo_gem *gem_bo = (dri_bo_gem *)buf; -+ -+ return gem_bo->in_vram; -+} -diff --git a/src/radeon_bufmgr_gem.h b/src/radeon_bufmgr_gem.h -index e2f1ca6..d67ddf6 100644 ---- a/src/radeon_bufmgr_gem.h -+++ b/src/radeon_bufmgr_gem.h -@@ -11,4 +11,5 @@ void radeon_bufmgr_post_submit(dri_bufmgr *bufmgr); - void radeon_bufmgr_pin(dri_bo *buf); - void radeon_bufmgr_unpin(dri_bo *buf); - uint32_t radeon_bufmgr_get_handle(dri_bo *buf); -+int radeon_bufmgr_gem_in_vram(dir_bo *buf); - #endif -diff --git a/src/radeon_exa.c b/src/radeon_exa.c -index 555ae16..4d0a582 100644 ---- a/src/radeon_exa.c -+++ b/src/radeon_exa.c -@@ -50,10 +50,6 @@ - #define RADEON_PIXMAP_IS_FRONTBUFFER 1 - - /* quick hacks lolz */ --struct radeon_exa_pixmap_priv { -- dri_bo *bo; -- int flags; --}; - - /***********************************************************************/ - #define RINFO_FROM_SCREEN(pScr) ScrnInfoPtr pScrn = xf86Screens[pScr->myNum]; \ -@@ -235,7 +231,8 @@ static Bool RADEONPrepareAccess(PixmapPtr pPix, int index) - if (driver_priv->bo) { - int ret; - -- RADEONCPFlushIndirect(pScrn, 0); -+ if (radeon_bufmgr_gem_in_vram (driver_priv->bo)) -+ RADEONCPFlushIndirect(pScrn, 0); - - //radeon_bufmgr_gem_wait_rendering(driver_priv->bo); - -diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c -index 456cefe..8f98e92 100644 ---- a/src/radeon_exa_render.c -+++ b/src/radeon_exa_render.c -@@ -1016,8 +1016,10 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix, - txpitch = exaGetPixmapPitch(pPix); - txoffset = exaGetPixmapOffset(pPix); - -- if ((txoffset & 0x1f) != 0) -- RADEON_FALLBACK(("Bad texture offset 0x%x\n", (int)txoffset)); -+ if (!info->new_cs) { -+ if ((txoffset & 0x1f) != 0) -+ RADEON_FALLBACK(("Bad texture offset 0x%x\n", (int)txoffset)); -+ } - if ((txpitch & 0x1f) != 0) - RADEON_FALLBACK(("Bad texture pitch 0x%x\n", (int)txpitch)); - -@@ -1234,7 +1236,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, - - colorpitch |= dst_format; - -- if ((dst_offset & 0x0f) != 0) -+ if (!info->new_cs && ((dst_offset & 0x0f) != 0)) - RADEON_FALLBACK(("Bad destination offset 0x%x\n", (int)dst_offset)); - if (((dst_pitch >> pixel_shift) & 0x7) != 0) - RADEON_FALLBACK(("Bad destination pitch 0x%x\n", (int)dst_pitch)); -diff --git a/src/radeon_textured_video.c b/src/radeon_textured_video.c -index 9682ad8..f93cded 100644 ---- a/src/radeon_textured_video.c -+++ b/src/radeon_textured_video.c -@@ -199,10 +199,13 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, - - if (pPriv->video_memory == NULL) { - pPriv->video_offset = RADEONAllocateMemory(pScrn, -- &pPriv->video_memory, -- size * 2); -+ &pPriv->video_memory, -+ size * 2); - if (pPriv->video_offset == 0) - return BadAlloc; -+ -+ if (info->new_cs) -+ pPriv->src_bo = pPriv->video_memory; - } - - /* Bicubic filter loading */ -@@ -215,6 +218,9 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, - pPriv->bicubic_src_offset = pPriv->bicubic_offset + info->fbLocation + pScrn->fbOffset; - if (pPriv->bicubic_offset == 0) - pPriv->bicubic_enabled = FALSE; -+ -+ if (info->new_cs) -+ pPriv->bicubic_bo = pPriv->bicubic_memory; - } - - if (pDraw->type == DRAWABLE_WINDOW) -@@ -245,7 +251,14 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, - npixels = ((((x2 + 0xffff) >> 16) + 1) & ~1) - left; - - pPriv->src_offset = pPriv->video_offset; -- if (info->drm_mm) { -+ if (info->new_cs) { -+ int ret; -+ ret = dri_bo_map(pPriv->src_bo, 1); -+ if (ret) -+ return BadAlloc; -+ -+ pPriv->src_addr = pPriv->src_bo->virtual; -+ } else if (info->drm_mm) { - pPriv->src_addr = (uint8_t *)(info->mm.front_buffer->map + pPriv->video_offset + (top * dstPitch)); - } else { - pPriv->src_addr = (uint8_t *)(info->FB + pPriv->video_offset + (top * dstPitch)); -@@ -290,8 +303,24 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, - } - - /* Upload bicubic filter tex */ -- if (pPriv->bicubic_enabled) -- RADEONCopyData(pScrn, (uint8_t *)bicubic_tex_512, (uint8_t *)(info->FB + pPriv->bicubic_offset), 1024, 1024, 1, 512, 2); -+ if (pPriv->bicubic_enabled) { -+ uint8_t *bicubic_addr; -+ int ret; -+ -+ if (info->new_cs) { -+ ret = dri_bo_map(pPriv->bicubic_bo, 1); -+ if (ret) -+ return BadAlloc; -+ -+ bicubic_addr = pPriv->bicubic_bo->virtual; -+ } else -+ bicubic_addr = (uint8_t *)(info->FB + pPriv->bicubic_offset); -+ -+ RADEONCopyData(pScrn, (uint8_t *)bicubic_tex_512, bicubic_addr, 1024, 1024, 1, 512, 2); -+ -+ if (info->new_cs) -+ dri_bo_unmap(pPriv->bicubic_bo); -+ } - - /* update cliplist */ - if (!REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) { -@@ -308,6 +337,8 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, - pPriv->w = width; - pPriv->h = height; - -+ if (info->new_cs) -+ dri_bo_unmap(pPriv->src_bo); - #ifdef XF86DRI - if (info->directRenderingEnabled || info->drm_mode_setting) - RADEONDisplayTexturedVideoCP(pScrn, pPriv); -diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c -index 1e9f3b1..d3574f4 100644 ---- a/src/radeon_textured_videofuncs.c -+++ b/src/radeon_textured_videofuncs.c -@@ -95,6 +95,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv - { - RADEONInfoPtr info = RADEONPTR(pScrn); - PixmapPtr pPixmap = pPriv->pPixmap; -+ struct radeon_exa_pixmap_priv *driver_priv; -+ dri_bo *dst_bo; - uint32_t txformat; - uint32_t txfilter, txformat0, txformat1, txoffset, txpitch; - uint32_t dst_offset, dst_pitch, dst_format; -@@ -110,7 +112,13 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv - - #ifdef USE_EXA - if (info->useEXA) { -- dst_offset = exaGetPixmapOffset(pPixmap); -+ if (info->new_cs) { -+ driver_priv = exaGetPixmapDriverPrivate(pPixmap); -+ if (driver_priv) -+ dst_bo = driver_priv->bo; -+ } else { -+ dst_offset = exaGetPixmapOffset(pPixmap); -+ } - dst_pitch = exaGetPixmapPitch(pPixmap); - } else - #endif -@@ -219,8 +227,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv - OUT_VIDEO_REG(R300_TX_FORMAT2_0, txpitch); - - if (info->new_cs) { -- OUT_VIDEO_REG(R300_TX_OFFSET_0, txoffset); -- OUT_RELOC(info->mm.front_buffer->kernel_bo_handle, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); -+ OUT_VIDEO_REG(R300_TX_OFFSET_0, 0); -+ OUT_RELOC(pPriv->src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); - } else { - txoffset += info->fbLocation + pScrn->fbOffset; - OUT_VIDEO_REG(R300_TX_OFFSET_0, txoffset); -@@ -245,13 +253,20 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv - R300_TX_MAG_FILTER_NEAREST | - (1 << R300_TX_ID_SHIFT)); - -- BEGIN_VIDEO(6); -+ qwords = info->new_cs ? 8 : 6; -+ BEGIN_VIDEO(qwords); - OUT_VIDEO_REG(R300_TX_FILTER0_1, txfilter); - OUT_VIDEO_REG(R300_TX_FILTER1_1, 0); - OUT_VIDEO_REG(R300_TX_FORMAT0_1, txformat0); - OUT_VIDEO_REG(R300_TX_FORMAT1_1, txformat1); - OUT_VIDEO_REG(R300_TX_FORMAT2_1, txpitch); -- OUT_VIDEO_REG(R300_TX_OFFSET_1, pPriv->bicubic_src_offset); -+ -+ if (info->new_cs) { -+ OUT_VIDEO_REG(R300_TX_OFFSET_1, 0); -+ OUT_RELOC(pPriv->bicubic_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); -+ } else { -+ OUT_VIDEO_REG(R300_TX_OFFSET_1, pPriv->bicubic_src_offset); -+ } - FINISH_VIDEO(); - - /* Enable tex 1 */ -@@ -994,8 +1009,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv - OUT_VIDEO_REG(R300_TX_ENABLE, txenable); - - if (info->new_cs) { -- OUT_VIDEO_REG(R300_RB3D_COLOROFFSET0, dst_offset); -- OUT_RELOC(info->mm.front_buffer->kernel_bo_handle, 0, RADEON_GEM_DOMAIN_VRAM); -+ OUT_VIDEO_REG(R300_RB3D_COLOROFFSET0, 0); -+ OUT_RELOC(dst_bo, 0, RADEON_GEM_DOMAIN_VRAM); - } else { - dst_offset += info->fbLocation + pScrn->fbOffset; - OUT_VIDEO_REG(R300_RB3D_COLOROFFSET0, dst_offset); -diff --git a/src/radeon_video.c b/src/radeon_video.c -index a7ea788..d708bf8 100644 ---- a/src/radeon_video.c -+++ b/src/radeon_video.c -@@ -2180,7 +2180,7 @@ RADEONCopyData( - - #ifdef XF86DRI - -- if ( info->directRenderingEnabled && info->DMAForXv ) -+ if ( info->directRenderingEnabled && info->DMAForXv && !info->new_cs ) - { - uint8_t *buf; - uint32_t bufPitch, dstPitchOff; -@@ -2443,6 +2443,20 @@ RADEONAllocateMemory( - int offset = 0; - - pScreen = screenInfo.screens[pScrn->scrnIndex]; -+ -+ if (info->new_cs) { -+ dri_bo *video_bo; -+ -+ video_bo = dri_bo_alloc(info->bufmgr, "xv pixmap", size, 4096); -+ -+ *mem_struct = video_bo; -+ -+ if (!video_bo) -+ return 0; -+ -+ return (uint32_t)-1; -+ -+ } - #ifdef USE_EXA - if (info->useEXA) { - ExaOffscreenArea *area = *mem_struct; -@@ -2516,6 +2530,11 @@ RADEONFreeMemory( - ){ - RADEONInfoPtr info = RADEONPTR(pScrn); - -+ if (info->new_cs) { -+ struct dri_bo *bo = mem_struct; -+ dri_bo_free(bo); -+ return; -+ } - #ifdef USE_EXA - if (info->useEXA) { - ExaOffscreenArea *area = mem_struct; -diff --git a/src/radeon_video.h b/src/radeon_video.h -index b9d900d..0687969 100644 ---- a/src/radeon_video.h -+++ b/src/radeon_video.h -@@ -114,6 +114,9 @@ typedef struct { - int src_w, src_h, dst_w, dst_h; - int w, h; - int drw_x, drw_y; -+ -+ dri_bo *src_bo; -+ dri_bo *bicubic_bo; - } RADEONPortPrivRec, *RADEONPortPrivPtr; - - void RADEONInitI2C(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv); diff --git a/radeon-modeset.patch b/radeon-modeset.patch index 3b5dac8..07e1fff 100644 --- a/radeon-modeset.patch +++ b/radeon-modeset.patch @@ -18,7 +18,7 @@ index b8c18a6..a7e954d 100644 save_CFLAGS="$CFLAGS" diff --git a/src/Makefile.am b/src/Makefile.am -index 97c686b..d32e74a 100644 +index 97c686b..b8d09bb 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -90,12 +90,13 @@ radeon_drv_ladir = @moduledir@/drivers @@ -33,20 +33,21 @@ index 97c686b..d32e74a 100644 $(RADEON_ATOMBIOS_SOURCES) radeon_atombios.c radeon_atomwrapper.c \ - $(RADEON_DRI_SRCS) $(RADEON_EXA_SOURCES) atombios_output.c atombios_crtc.c + $(RADEON_DRI_SRCS) $(RADEON_EXA_SOURCES) atombios_output.c atombios_crtc.c \ -+ drmmode_display.c radeon_bufmgr_exa.c radeon_bufmgr_gem.c ++ drmmode_display.c radeon_bufmgr_exa.c radeon_bufmgr_gem.c radeon_dri_bufmgr.c if XMODES radeon_drv_la_SOURCES += \ -@@ -160,4 +161,5 @@ EXTRA_DIST = \ +@@ -160,4 +161,6 @@ EXTRA_DIST = \ radeon_pci_device_match_gen.h \ pcidb/ati_pciids.csv \ pcidb/parse_pci_ids.pl \ - radeon_atombios.h + radeon_atombios.h \ -+ drmmode_display.h ++ drmmode_display.h \ ++ radeon_dri_bufmgr.h diff --git a/src/drmmode_display.c b/src/drmmode_display.c new file mode 100644 -index 0000000..25e6183 +index 0000000..3073c15 --- /dev/null +++ b/src/drmmode_display.c @@ -0,0 +1,685 @@ @@ -305,7 +306,7 @@ index 0000000..25e6183 + rotate_pitch = crtc->scrn->displayWidth * drmmode->cpp; + size = rotate_pitch * height; + -+ rotate_bo = dri_bo_alloc(drmmode->bufmgr, "rotate", size, 0); ++ rotate_bo = dri_bo_alloc(drmmode->bufmgr, "rotate", size, 0, 0); + if (rotate_bo == NULL) + return NULL; + @@ -816,7 +817,7 @@ index 0000000..691d62e +#endif +#endif diff --git a/src/radeon.h b/src/radeon.h -index 2348e7c..32bfa4e 100644 +index 2348e7c..aeea221 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -46,6 +46,8 @@ @@ -836,17 +837,22 @@ index 2348e7c..32bfa4e 100644 /* Render support */ #ifdef RENDER #include "picturestr.h" -@@ -403,6 +406,9 @@ typedef enum { +@@ -403,6 +406,14 @@ typedef enum { typedef struct _atomBiosHandle *atomBiosHandlePtr; +#define RADEON_POOL_GART 0 +#define RADEON_POOL_VRAM 1 ++ ++struct radeon_exa_pixmap_priv { ++ dri_bo *bo; ++ int flags; ++}; + typedef struct { uint32_t pci_device_id; RADEONChipFamily chip_family; -@@ -413,6 +419,25 @@ typedef struct { +@@ -413,6 +424,25 @@ typedef struct { int singledac; } RADEONCardInfo; @@ -872,7 +878,7 @@ index 2348e7c..32bfa4e 100644 typedef struct { EntityInfoPtr pEnt; pciVideoPtr PciInfo; -@@ -612,13 +637,13 @@ typedef struct { +@@ -612,13 +642,13 @@ typedef struct { drm_handle_t ringHandle; /* Handle from drmAddMap */ drmSize ringMapSize; /* Size of map */ int ringSize; /* Size of ring (in MB) */ @@ -888,7 +894,7 @@ index 2348e7c..32bfa4e 100644 /* CP vertex/indirect buffer data */ unsigned long bufStart; /* Offset into GART space */ -@@ -641,6 +666,9 @@ typedef struct { +@@ -641,6 +671,9 @@ typedef struct { drmBufPtr indirectBuffer; int indirectStart; @@ -898,7 +904,7 @@ index 2348e7c..32bfa4e 100644 /* DRI screen private data */ int fbX; int fbY; -@@ -798,6 +826,45 @@ typedef struct { +@@ -798,6 +831,45 @@ typedef struct { int num_gb_pipes; Bool has_tcl; @@ -944,7 +950,7 @@ index 2348e7c..32bfa4e 100644 } RADEONInfoRec, *RADEONInfoPtr; #define RADEONWaitForFifo(pScrn, entries) \ -@@ -1030,6 +1097,23 @@ extern void RADEONUpdateHVPosition(xf86OutputPtr output, DisplayModePtr mode); +@@ -1030,6 +1102,23 @@ extern void RADEONUpdateHVPosition(xf86OutputPtr output, DisplayModePtr mode); extern void RADEONInitVideo(ScreenPtr pScreen); extern void RADEONResetVideo(ScrnInfoPtr pScrn); @@ -968,7 +974,7 @@ index 2348e7c..32bfa4e 100644 #ifdef XF86DRI # ifdef USE_XAA /* radeon_accelfuncs.c */ -@@ -1048,7 +1132,9 @@ do { \ +@@ -1048,7 +1137,9 @@ do { \ #define RADEONCP_RELEASE(pScrn, info) \ do { \ @@ -979,7 +985,7 @@ index 2348e7c..32bfa4e 100644 RADEON_PURGE_CACHE(); \ RADEON_WAIT_UNTIL_IDLE(); \ RADEONCPReleaseIndirect(pScrn); \ -@@ -1082,7 +1168,7 @@ do { \ +@@ -1082,7 +1173,7 @@ do { \ #define RADEONCP_REFRESH(pScrn, info) \ do { \ @@ -988,7 +994,7 @@ index 2348e7c..32bfa4e 100644 if (info->needCacheFlush) { \ RADEON_PURGE_CACHE(); \ RADEON_PURGE_ZCACHE(); \ -@@ -1109,6 +1195,13 @@ do { \ +@@ -1109,6 +1200,13 @@ do { \ #define RING_LOCALS uint32_t *__head = NULL; int __expected; int __count = 0 #define BEGIN_RING(n) do { \ @@ -1002,7 +1008,7 @@ index 2348e7c..32bfa4e 100644 if (RADEON_VERBOSE) { \ xf86DrvMsg(pScrn->scrnIndex, X_INFO, \ "BEGIN_RING(%d) in %s\n", (unsigned int)n, __FUNCTION__);\ -@@ -1121,13 +1214,6 @@ do { \ +@@ -1121,13 +1219,6 @@ do { \ } \ info->dma_debug_func = __FILE__; \ info->dma_debug_lineno = __LINE__; \ @@ -1016,7 +1022,7 @@ index 2348e7c..32bfa4e 100644 __expected = n; \ __head = (pointer)((char *)info->indirectBuffer->address + \ info->indirectBuffer->used); \ -@@ -1170,6 +1256,14 @@ do { \ +@@ -1170,6 +1261,14 @@ do { \ OUT_RING(val); \ } while (0) @@ -1405,7 +1411,7 @@ index e617fd5..dfb88a6 100644 #endif diff --git a/src/radeon_bufmgr.h b/src/radeon_bufmgr.h new file mode 100644 -index 0000000..a16ad9a +index 0000000..3d28992 --- /dev/null +++ b/src/radeon_bufmgr.h @@ -0,0 +1,30 @@ @@ -1418,7 +1424,7 @@ index 0000000..a16ad9a +#ifndef RADEON_BUFMGR_H +#define RADEON_BUFMGR_H + -+#include "dri_bufmgr.h" ++#include "radeon_dri_bufmgr.h" + +struct radeon_bufmgr { + void (*emit_reloc)(dri_bo *buf, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain); @@ -1441,10 +1447,10 @@ index 0000000..a16ad9a +#endif diff --git a/src/radeon_bufmgr_exa.c b/src/radeon_bufmgr_exa.c new file mode 100644 -index 0000000..64537a6 +index 0000000..df9dc81 --- /dev/null +++ b/src/radeon_bufmgr_exa.c -@@ -0,0 +1,324 @@ +@@ -0,0 +1,323 @@ +/************************************************************************** + * + * Copyright © 2007-2008 Red Hat Inc. @@ -1494,7 +1500,6 @@ index 0000000..64537a6 + +#include "xf86.h" +#include "errno.h" -+#include "dri_bufmgr.h" +#include "string.h" + +#include "radeon_reg.h" @@ -1721,7 +1726,7 @@ index 0000000..64537a6 + bufmgr_exa->bufmgr.bo_map = dri_exa_bo_map; + bufmgr_exa->bufmgr.bo_unmap = dri_exa_bo_unmap; + bufmgr_exa->bufmgr.destroy = dri_bufmgr_exa_destroy; -+ bufmgr_exa->bufmgr.bo_wait_rendering = radeon_bufmgr_exa_wait_rendering; ++ //bufmgr_exa->bufmgr.bo_wait_rendering = radeon_bufmgr_exa_wait_rendering; + bufmgr_exa->radeon_bufmgr.emit_reloc = radeon_bufmgr_exa_emit_reloc; + return &bufmgr_exa->bufmgr; +} @@ -1771,14 +1776,14 @@ index 0000000..64537a6 +} diff --git a/src/radeon_bufmgr_exa.h b/src/radeon_bufmgr_exa.h new file mode 100644 -index 0000000..260322c +index 0000000..0d79b58 --- /dev/null +++ b/src/radeon_bufmgr_exa.h @@ -0,0 +1,14 @@ +#ifndef RADEON_BUFMGR_EXA_H +#define RADEON_BUFMGR_EXA_H + -+#include "dri_bufmgr.h" ++#include "radeon_dri_bufmgr.h" + +dri_bufmgr *radeon_bufmgr_exa_init(ScrnInfoPtr pScrn); +extern void radeon_bufmgr_exa_wait_rendering(dri_bo *bo); @@ -1791,10 +1796,10 @@ index 0000000..260322c +#endif diff --git a/src/radeon_bufmgr_gem.c b/src/radeon_bufmgr_gem.c new file mode 100644 -index 0000000..db28edc +index 0000000..7fed98b --- /dev/null +++ b/src/radeon_bufmgr_gem.c -@@ -0,0 +1,530 @@ +@@ -0,0 +1,536 @@ +/************************************************************************** + * + * Copyright © 2007-2008 Red Hat Inc. @@ -1846,7 +1851,6 @@ index 0000000..db28edc + +#include "xf86.h" +#include "errno.h" -+#include "dri_bufmgr.h" +#include "string.h" + +#include "radeon_reg.h" @@ -2272,12 +2276,12 @@ index 0000000..db28edc + bufmgr_gem->bufmgr.bo_map = dri_gem_bo_map; + bufmgr_gem->bufmgr.bo_unmap = dri_gem_bo_unmap; + bufmgr_gem->bufmgr.destroy = dri_bufmgr_gem_destroy; -+ bufmgr_gem->bufmgr.bo_wait_rendering = radeon_bufmgr_gem_wait_rendering; ++ //bufmgr_gem->bufmgr.bo_wait_rendering = radeon_bufmgr_gem_wait_rendering; + bufmgr_gem->radeon_bufmgr.emit_reloc = radeon_bufmgr_gem_emit_reloc; + /* Initialize the linked lists for BO reuse cache. */ + for (i = 0; i < RADEON_GEM_BO_BUCKETS; i++) + bufmgr_gem->cache_bucket[i].tail = &bufmgr_gem->cache_bucket[i].head; -+ bufmgr_gem->bufmgr.debug = 0; ++ bufmgr_gem->bufmgr.debug = 1; + return &bufmgr_gem->bufmgr; +} + @@ -2325,18 +2329,24 @@ index 0000000..db28edc + radeon_bufmgr = (struct radeon_bufmgr *)(buf->bufmgr + 1); + radeon_bufmgr->emit_reloc(buf, head, count_p, read_domains, write_domain); +} ++ ++int radeon_bufmgr_gem_in_vram(dri_bo *buf) ++{ ++ dri_bo_gem *gem_bo = (dri_bo_gem *)buf; ++ ++ return gem_bo->in_vram; ++} diff --git a/src/radeon_bufmgr_gem.h b/src/radeon_bufmgr_gem.h new file mode 100644 -index 0000000..e2f1ca6 +index 0000000..4c74c28 --- /dev/null +++ b/src/radeon_bufmgr_gem.h @@ -0,0 +1,14 @@ +#ifndef RADEON_BUFMGR_GEM_H +#define RADEON_BUFMGR_GEM_H + -+#include "dri_bufmgr.h" ++#include "radeon_dri_bufmgr.h" + -+dri_bufmgr *radeon_bufmgr_gem_init(ScrnInfoPtr pScrn); +extern void radeon_bufmgr_gem_wait_rendering(dri_bo *bo); +extern dri_bo *radeon_bufmgr_gem_create_bo(dri_bufmgr *bufmgr, struct radeon_memory *mem); +void radeon_bufmgr_gem_emit_reloc(dri_bo *bo, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain); @@ -2344,6 +2354,7 @@ index 0000000..e2f1ca6 +void radeon_bufmgr_pin(dri_bo *buf); +void radeon_bufmgr_unpin(dri_bo *buf); +uint32_t radeon_bufmgr_get_handle(dri_bo *buf); ++int radeon_bufmgr_gem_in_vram(dri_bo *buf); +#endif diff --git a/src/radeon_common.h b/src/radeon_common.h index 193c1f9..c3b7e3b 100644 @@ -3248,6 +3259,437 @@ index a192811..45414b4 100644 + return radeon_setup_gart_mem(pScreen); + +} +diff --git a/src/radeon_dri_bufmgr.c b/src/radeon_dri_bufmgr.c +new file mode 100644 +index 0000000..37cc305 +--- /dev/null ++++ b/src/radeon_dri_bufmgr.c +@@ -0,0 +1,159 @@ ++/* ++ * Copyright © 2007 Intel Corporation ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS ++ * IN THE SOFTWARE. ++ * ++ * Authors: ++ * Eric Anholt ++ * ++ */ ++ ++#include ++#include ++#include ++#include "radeon_dri_bufmgr.h" ++ ++/** @file dri_bufmgr.c ++ * ++ * Convenience functions for buffer management methods. ++ */ ++ ++dri_bo * ++dri_bo_alloc(dri_bufmgr *bufmgr, const char *name, unsigned long size, ++ unsigned int alignment, uint64_t location_mask) ++{ ++ return bufmgr->bo_alloc(bufmgr, name, size, alignment, location_mask); ++} ++ ++dri_bo * ++dri_bo_alloc_static(dri_bufmgr *bufmgr, const char *name, unsigned long offset, ++ unsigned long size, void *virtual, ++ uint64_t location_mask) ++{ ++ return bufmgr->bo_alloc_static(bufmgr, name, offset, size, virtual, ++ location_mask); ++} ++ ++void ++dri_bo_reference(dri_bo *bo) ++{ ++ bo->bufmgr->bo_reference(bo); ++} ++ ++void ++dri_bo_unreference(dri_bo *bo) ++{ ++ if (bo == NULL) ++ return; ++ ++ bo->bufmgr->bo_unreference(bo); ++} ++ ++int ++dri_bo_map(dri_bo *buf, int write_enable) ++{ ++ return buf->bufmgr->bo_map(buf, write_enable); ++} ++ ++int ++dri_bo_unmap(dri_bo *buf) ++{ ++ return buf->bufmgr->bo_unmap(buf); ++} ++ ++void ++dri_fence_wait(dri_fence *fence) ++{ ++ fence->bufmgr->fence_wait(fence); ++} ++ ++void ++dri_fence_reference(dri_fence *fence) ++{ ++ fence->bufmgr->fence_reference(fence); ++} ++ ++void ++dri_fence_unreference(dri_fence *fence) ++{ ++ if (fence == NULL) ++ return; ++ ++ fence->bufmgr->fence_unreference(fence); ++} ++ ++void ++dri_bo_subdata(dri_bo *bo, unsigned long offset, ++ unsigned long size, const void *data) ++{ ++ if (size == 0 || data == NULL) ++ return; ++ ++ dri_bo_map(bo, 1); ++ memcpy((unsigned char *)bo->virtual + offset, data, size); ++ dri_bo_unmap(bo); ++} ++ ++void ++dri_bo_get_subdata(dri_bo *bo, unsigned long offset, ++ unsigned long size, void *data) ++{ ++ if (size == 0 || data == NULL) ++ return; ++ ++ dri_bo_map(bo, 0); ++ memcpy(data, (unsigned char *)bo->virtual + offset, size); ++ dri_bo_unmap(bo); ++} ++ ++void ++dri_bufmgr_destroy(dri_bufmgr *bufmgr) ++{ ++ bufmgr->destroy(bufmgr); ++} ++ ++ ++int dri_emit_reloc(dri_bo *reloc_buf, uint64_t flags, uint32_t delta, ++ uint32_t offset, dri_bo *target_buf) ++{ ++ return reloc_buf->bufmgr->emit_reloc(reloc_buf, flags, delta, offset, target_buf); ++} ++ ++void *dri_process_relocs(dri_bo *batch_buf, uint32_t *count) ++{ ++ return batch_buf->bufmgr->process_relocs(batch_buf, count); ++} ++ ++void dri_post_submit(dri_bo *batch_buf, dri_fence **last_fence) ++{ ++ batch_buf->bufmgr->post_submit(batch_buf, last_fence); ++} ++ ++void ++dri_bufmgr_set_debug(dri_bufmgr *bufmgr, int enable_debug) ++{ ++ bufmgr->debug = enable_debug; ++} ++ ++int ++dri_bufmgr_check_aperture_space(dri_bo *bo) ++{ ++ return bo->bufmgr->check_aperture_space(bo); ++} +diff --git a/src/radeon_dri_bufmgr.h b/src/radeon_dri_bufmgr.h +new file mode 100644 +index 0000000..687cbeb +--- /dev/null ++++ b/src/radeon_dri_bufmgr.h +@@ -0,0 +1,260 @@ ++/************************************************************************** ++ * ++ * Copyright � 2007 Intel Corporation ++ * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA ++ * All Rights Reserved. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sub license, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, ++ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR ++ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE ++ * USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * The above copyright notice and this permission notice (including the ++ * next paragraph) shall be included in all copies or substantial portions ++ * of the Software. ++ * ++ * ++ **************************************************************************/ ++/* ++ * Authors: Thomas Hellstr�m ++ * Keith Whitwell ++ * Eric Anholt ++ */ ++ ++#ifndef _DRI_BUFMGR_H_ ++#define _DRI_BUFMGR_H_ ++#include ++ ++typedef struct _dri_bufmgr dri_bufmgr; ++typedef struct _dri_bo dri_bo; ++typedef struct _dri_fence dri_fence; ++ ++struct _dri_bo { ++ /** Size in bytes of the buffer object. */ ++ unsigned long size; ++ /** ++ * Card virtual address (offset from the beginning of the aperture) for the ++ * object. Only valid while validated. ++ */ ++ unsigned long offset; ++ /** ++ * Virtual address for accessing the buffer data. Only valid while mapped. ++ */ ++ void *virtual; ++ /** Buffer manager context associated with this buffer object */ ++ dri_bufmgr *bufmgr; ++}; ++ ++struct _dri_fence { ++ /** ++ * This is an ORed mask of DRM_BO_FLAG_READ, DRM_BO_FLAG_WRITE, and ++ * DRM_FLAG_EXE indicating the operations associated with this fence. ++ * ++ * It is constant for the life of the fence object. ++ */ ++ unsigned int type; ++ /** Buffer manager context associated with this fence */ ++ dri_bufmgr *bufmgr; ++}; ++ ++/** ++ * Context for a buffer manager instance. ++ * ++ * Contains public methods followed by private storage for the buffer manager. ++ */ ++struct _dri_bufmgr { ++ /** ++ * Allocate a buffer object. ++ * ++ * Buffer objects are not necessarily initially mapped into CPU virtual ++ * address space or graphics device aperture. They must be mapped using ++ * bo_map() to be used by the CPU, and validated for use using bo_validate() ++ * to be used from the graphics device. ++ */ ++ dri_bo *(*bo_alloc)(dri_bufmgr *bufmgr_ctx, const char *name, ++ unsigned long size, unsigned int alignment, ++ uint64_t location_mask); ++ ++ /** ++ * Allocates a buffer object for a static allocation. ++ * ++ * Static allocations are ones such as the front buffer that are offered by ++ * the X Server, which are never evicted and never moved. ++ */ ++ dri_bo *(*bo_alloc_static)(dri_bufmgr *bufmgr_ctx, const char *name, ++ unsigned long offset, unsigned long size, ++ void *virtual, uint64_t location_mask); ++ ++ /** Takes a reference on a buffer object */ ++ void (*bo_reference)(dri_bo *bo); ++ ++ /** ++ * Releases a reference on a buffer object, freeing the data if ++ * rerefences remain. ++ */ ++ void (*bo_unreference)(dri_bo *bo); ++ ++ /** ++ * Maps the buffer into userspace. ++ * ++ * This function will block waiting for any existing fence on the buffer to ++ * clear, first. The resulting mapping is available at buf->virtual. ++\ */ ++ int (*bo_map)(dri_bo *buf, int write_enable); ++ ++ /** Reduces the refcount on the userspace mapping of the buffer object. */ ++ int (*bo_unmap)(dri_bo *buf); ++ ++ /** Takes a reference on a fence object */ ++ void (*fence_reference)(dri_fence *fence); ++ ++ /** ++ * Releases a reference on a fence object, freeing the data if ++ * rerefences remain. ++ */ ++ void (*fence_unreference)(dri_fence *fence); ++ ++ /** ++ * Blocks until the given fence is signaled. ++ */ ++ void (*fence_wait)(dri_fence *fence); ++ ++ /** ++ * Tears down the buffer manager instance. ++ */ ++ void (*destroy)(dri_bufmgr *bufmgr); ++ ++ /** ++ * Add relocation entry in reloc_buf, which will be updated with the ++ * target buffer's real offset on on command submission. ++ * ++ * Relocations remain in place for the lifetime of the buffer object. ++ * ++ * \param reloc_buf Buffer to write the relocation into. ++ * \param flags BO flags to be used in validating the target buffer. ++ * Applicable flags include: ++ * - DRM_BO_FLAG_READ: The buffer will be read in the process of ++ * command execution. ++ * - DRM_BO_FLAG_WRITE: The buffer will be written in the process of ++ * command execution. ++ * - DRM_BO_FLAG_MEM_TT: The buffer should be validated in TT memory. ++ * - DRM_BO_FLAG_MEM_VRAM: The buffer should be validated in video ++ * memory. ++ * \param delta Constant value to be added to the relocation target's offset. ++ * \param offset Byte offset within batch_buf of the relocated pointer. ++ * \param target Buffer whose offset should be written into the relocation ++ * entry. ++ */ ++ int (*emit_reloc)(dri_bo *reloc_buf, uint64_t flags, uint32_t delta, ++ uint32_t offset, dri_bo *target); ++ ++ /** ++ * Processes the relocations, either in userland or by converting the list ++ * for use in batchbuffer submission. ++ * ++ * Kernel-based implementations will return a pointer to the arguments ++ * to be handed with batchbuffer submission to the kernel. The userland ++ * implementation performs the buffer validation and emits relocations ++ * into them the appopriate order. ++ * ++ * \param batch_buf buffer at the root of the tree of relocations ++ * \param count returns the number of buffers validated. ++ * \return relocation record for use in command submission. ++ * */ ++ void *(*process_relocs)(dri_bo *batch_buf, uint32_t *count); ++ ++ void (*post_submit)(dri_bo *batch_buf, dri_fence **fence); ++ ++ int (*check_aperture_space)(dri_bo *bo); ++ int debug; /**< Enables verbose debugging printouts */ ++}; ++ ++dri_bo *dri_bo_alloc(dri_bufmgr *bufmgr, const char *name, unsigned long size, ++ unsigned int alignment, uint64_t location_mask); ++dri_bo *dri_bo_alloc_static(dri_bufmgr *bufmgr, const char *name, ++ unsigned long offset, unsigned long size, ++ void *virtual, uint64_t location_mask); ++void dri_bo_reference(dri_bo *bo); ++void dri_bo_unreference(dri_bo *bo); ++int dri_bo_map(dri_bo *buf, int write_enable); ++int dri_bo_unmap(dri_bo *buf); ++void dri_fence_wait(dri_fence *fence); ++void dri_fence_reference(dri_fence *fence); ++void dri_fence_unreference(dri_fence *fence); ++ ++void dri_bo_subdata(dri_bo *bo, unsigned long offset, ++ unsigned long size, const void *data); ++void dri_bo_get_subdata(dri_bo *bo, unsigned long offset, ++ unsigned long size, void *data); ++ ++void dri_bufmgr_fake_contended_lock_take(dri_bufmgr *bufmgr); ++dri_bufmgr *dri_bufmgr_fake_init(unsigned long low_offset, void *low_virtual, ++ unsigned long size, ++ unsigned int (*fence_emit)(void *private), ++ int (*fence_wait)(void *private, ++ unsigned int cookie), ++ void *driver_priv); ++void dri_bufmgr_set_debug(dri_bufmgr *bufmgr, int enable_debug); ++void dri_bo_fake_disable_backing_store(dri_bo *bo, ++ void (*invalidate_cb)(dri_bo *bo, ++ void *ptr), ++ void *ptr); ++void dri_bufmgr_destroy(dri_bufmgr *bufmgr); ++ ++int dri_emit_reloc(dri_bo *reloc_buf, uint64_t flags, uint32_t delta, ++ uint32_t offset, dri_bo *target_buf); ++void *dri_process_relocs(dri_bo *batch_buf, uint32_t *count); ++void dri_post_process_relocs(dri_bo *batch_buf); ++void dri_post_submit(dri_bo *batch_buf, dri_fence **last_fence); ++int dri_bufmgr_check_aperture_space(dri_bo *bo); ++ ++#ifndef TTM_API ++/* reuse some TTM API */ ++ ++#define DRM_BO_MEM_LOCAL 0 ++#define DRM_BO_MEM_TT 1 ++#define DRM_BO_MEM_VRAM 2 ++#define DRM_BO_MEM_PRIV0 3 ++#define DRM_BO_MEM_PRIV1 4 ++#define DRM_BO_MEM_PRIV2 5 ++#define DRM_BO_MEM_PRIV3 6 ++#define DRM_BO_MEM_PRIV4 7 ++ ++#define DRM_BO_FLAG_READ (1ULL << 0) ++#define DRM_BO_FLAG_WRITE (1ULL << 1) ++#define DRM_BO_FLAG_EXE (1ULL << 2) ++#define DRM_BO_MASK_ACCESS (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE) ++#define DRM_BO_FLAG_NO_EVICT (1ULL << 4) ++ ++#define DRM_BO_FLAG_MAPPABLE (1ULL << 5) ++#define DRM_BO_FLAG_SHAREABLE (1ULL << 6) ++ ++#define DRM_BO_FLAG_CACHED (1ULL << 7) ++ ++#define DRM_BO_FLAG_NO_MOVE (1ULL << 8) ++#define DRM_BO_FLAG_CACHED_MAPPED (1ULL << 19) ++#define DRM_BO_FLAG_FORCE_CACHING (1ULL << 13) ++#define DRM_BO_FLAG_FORCE_MAPPABLE (1ULL << 14) ++#define DRM_BO_FLAG_TILE (1ULL << 15) ++ ++#define DRM_BO_FLAG_MEM_LOCAL (1ULL << 24) ++#define DRM_BO_FLAG_MEM_TT (1ULL << 25) ++#define DRM_BO_FLAG_MEM_VRAM (1ULL << 26) ++ ++#define DRM_BO_MASK_MEM 0x00000000FF000000ULL ++ ++#define DRM_FENCE_TYPE_EXE 0x00000001 ++#endif ++ ++#endif diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 45d2c2f..d5bb24d 100644 --- a/src/radeon_driver.c @@ -4372,24 +4814,22 @@ index 45d2c2f..d5bb24d 100644 pScrn->vtSema = FALSE; diff --git a/src/radeon_exa.c b/src/radeon_exa.c -index 02fd4fc..555ae16 100644 +index 02fd4fc..7a8569e 100644 --- a/src/radeon_exa.c +++ b/src/radeon_exa.c -@@ -47,6 +47,13 @@ +@@ -46,7 +46,11 @@ + #endif #include "xf86.h" ++#include "radeon_bufmgr_gem.h" +#define RADEON_PIXMAP_IS_FRONTBUFFER 1 + +/* quick hacks lolz */ -+struct radeon_exa_pixmap_priv { -+ dri_bo *bo; -+ int flags; -+}; /***********************************************************************/ #define RINFO_FROM_SCREEN(pScr) ScrnInfoPtr pScrn = xf86Screens[pScr->myNum]; \ -@@ -184,14 +191,26 @@ Bool RADEONGetPixmapOffsetPitch(PixmapPtr pPix, uint32_t *pitch_offset) +@@ -184,14 +188,26 @@ Bool RADEONGetPixmapOffsetPitch(PixmapPtr pPix, uint32_t *pitch_offset) RINFO_FROM_SCREEN(pPix->drawable.pScreen); uint32_t pitch, offset; int bpp; @@ -4418,7 +4858,7 @@ index 02fd4fc..555ae16 100644 return RADEONGetOffsetPitch(pPix, bpp, pitch_offset, offset, pitch); } -@@ -199,6 +218,8 @@ Bool RADEONGetPixmapOffsetPitch(PixmapPtr pPix, uint32_t *pitch_offset) +@@ -199,6 +215,8 @@ Bool RADEONGetPixmapOffsetPitch(PixmapPtr pPix, uint32_t *pitch_offset) static unsigned long swapper_surfaces[3]; @@ -4427,7 +4867,7 @@ index 02fd4fc..555ae16 100644 static Bool RADEONPrepareAccess(PixmapPtr pPix, int index) { RINFO_FROM_SCREEN(pPix->drawable.pScreen); -@@ -206,7 +227,30 @@ static Bool RADEONPrepareAccess(PixmapPtr pPix, int index) +@@ -206,7 +224,31 @@ static Bool RADEONPrepareAccess(PixmapPtr pPix, int index) uint32_t offset = exaGetPixmapOffset(pPix); int bpp, soff; uint32_t size, flags; @@ -4439,7 +4879,8 @@ index 02fd4fc..555ae16 100644 + if (driver_priv->bo) { + int ret; + -+ RADEONCPFlushIndirect(pScrn, 0); ++ if (radeon_bufmgr_gem_in_vram (driver_priv->bo)) ++ RADEONCPFlushIndirect(pScrn, 0); + + //radeon_bufmgr_gem_wait_rendering(driver_priv->bo); + @@ -4458,7 +4899,7 @@ index 02fd4fc..555ae16 100644 /* Front buffer is always set with proper swappers */ if (offset == 0) return TRUE; -@@ -262,6 +306,7 @@ static Bool RADEONPrepareAccess(PixmapPtr pPix, int index) +@@ -262,6 +304,7 @@ static Bool RADEONPrepareAccess(PixmapPtr pPix, int index) OUTREG(RADEON_SURFACE0_LOWER_BOUND + soff, offset); OUTREG(RADEON_SURFACE0_UPPER_BOUND + soff, offset + size - 1); swapper_surfaces[index] = offset; @@ -4466,7 +4907,7 @@ index 02fd4fc..555ae16 100644 return TRUE; } -@@ -271,7 +316,16 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index) +@@ -271,7 +314,16 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index) unsigned char *RADEONMMIO = info->MMIO; uint32_t offset = exaGetPixmapOffset(pPix); int soff; @@ -4483,7 +4924,7 @@ index 02fd4fc..555ae16 100644 /* Front buffer is always set with proper swappers */ if (offset == 0) return; -@@ -294,13 +348,100 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index) +@@ -294,13 +346,100 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index) OUTREG(RADEON_SURFACE0_LOWER_BOUND + soff, 0); OUTREG(RADEON_SURFACE0_UPPER_BOUND + soff, 0); swapper_surfaces[index] = 0; @@ -4505,7 +4946,7 @@ index 02fd4fc..555ae16 100644 + return new_priv; + + new_priv->bo = dri_bo_alloc(info->bufmgr, "exa pixmap", size, -+ align); ++ align, 0); + if (!new_priv->bo) { + xfree(new_priv); + ErrorF("Failed to alloc memory\n"); @@ -4586,7 +5027,7 @@ index 02fd4fc..555ae16 100644 BEGIN_ACCEL(1); \ switch (info->engineMode) { \ case EXA_ENGINEMODE_UNKNOWN: \ -@@ -317,7 +458,7 @@ do { \ +@@ -317,7 +456,7 @@ do { \ #define RADEON_SWITCH_TO_3D() \ do { \ @@ -4595,7 +5036,7 @@ index 02fd4fc..555ae16 100644 BEGIN_ACCEL(1); \ switch (info->engineMode) { \ case EXA_ENGINEMODE_UNKNOWN: \ -@@ -341,6 +482,7 @@ do { \ +@@ -341,6 +480,7 @@ do { \ #define BEGIN_ACCEL(n) RADEONWaitForFifo(pScrn, (n)) #define OUT_ACCEL_REG(reg, val) OUTREG(reg, val) #define OUT_ACCEL_REG_F(reg, val) OUTREG(reg, F_TO_DW(val)) @@ -4603,7 +5044,7 @@ index 02fd4fc..555ae16 100644 #define FINISH_ACCEL() #ifdef RENDER -@@ -353,6 +495,7 @@ do { \ +@@ -353,6 +493,7 @@ do { \ #undef BEGIN_ACCEL #undef OUT_ACCEL_REG #undef FINISH_ACCEL @@ -4611,7 +5052,7 @@ index 02fd4fc..555ae16 100644 #ifdef XF86DRI -@@ -363,6 +506,7 @@ do { \ +@@ -363,6 +504,7 @@ do { \ #define BEGIN_ACCEL(n) BEGIN_RING(2*(n)) #define OUT_ACCEL_REG(reg, val) OUT_RING_REG(reg, val) #define FINISH_ACCEL() ADVANCE_RING() @@ -4619,7 +5060,7 @@ index 02fd4fc..555ae16 100644 #define OUT_RING_F(x) OUT_RING(F_TO_DW(x)) -@@ -373,6 +517,8 @@ do { \ +@@ -373,6 +515,8 @@ do { \ #endif /* XF86DRI */ @@ -4628,7 +5069,7 @@ index 02fd4fc..555ae16 100644 /* * Once screen->off_screen_base is set, this function * allocates the remaining memory appropriately -@@ -394,125 +540,124 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen) +@@ -394,125 +538,124 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen) if (info->exa == NULL) return FALSE; @@ -4861,7 +5302,7 @@ index 02fd4fc..555ae16 100644 return TRUE; } -@@ -525,10 +670,21 @@ extern void ExaOffscreenMarkUsed(PixmapPtr); +@@ -525,10 +668,21 @@ extern void ExaOffscreenMarkUsed(PixmapPtr); unsigned long long RADEONTexOffsetStart(PixmapPtr pPix) { @@ -4886,7 +5327,7 @@ index 02fd4fc..555ae16 100644 } #endif diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c -index 56de23e..b8b6602 100644 +index 56de23e..dfa74a1 100644 --- a/src/radeon_exa_funcs.c +++ b/src/radeon_exa_funcs.c @@ -74,21 +74,78 @@ FUNC_NAME(RADEONSync)(ScreenPtr pScreen, int marker) @@ -5126,7 +5567,7 @@ index 56de23e..b8b6602 100644 #ifdef ACCEL_CP unsigned int hpass; uint32_t buf_pitch, dst_pitch_off; -@@ -276,10 +363,47 @@ FUNC_NAME(RADEONUploadToScreen)(PixmapPtr pDst, int x, int y, int w, int h, +@@ -276,10 +363,45 @@ FUNC_NAME(RADEONUploadToScreen)(PixmapPtr pDst, int x, int y, int w, int h, if (bpp < 8) return FALSE; @@ -5153,10 +5594,8 @@ index 56de23e..b8b6602 100644 + offset = (x * bpp / 8) + (y * dst_pitch); + + while (bo_height--) { -+ ret = dri_bo_subdata(driver_priv->bo, offset, bo_width, ++ dri_bo_subdata(driver_priv->bo, offset, bo_width, + src); -+ if (ret == -1) -+ return FALSE; + + src += src_pitch; + offset += dst_pitch; @@ -5177,7 +5616,7 @@ index 56de23e..b8b6602 100644 int cpp = bpp / 8; ACCEL_PREAMBLE(); -@@ -294,9 +418,10 @@ FUNC_NAME(RADEONUploadToScreen)(PixmapPtr pDst, int x, int y, int w, int h, +@@ -294,9 +416,10 @@ FUNC_NAME(RADEONUploadToScreen)(PixmapPtr pDst, int x, int y, int w, int h, exaMarkSync(pDst->drawable.pScreen); return TRUE; @@ -5190,7 +5629,7 @@ index 56de23e..b8b6602 100644 /* Do we need that sync here ? probably not .... */ exaWaitSync(pDst->drawable.pScreen); -@@ -388,13 +513,17 @@ FUNC_NAME(RADEONDownloadFromScreen)(PixmapPtr pSrc, int x, int y, int w, int h, +@@ -388,13 +511,17 @@ FUNC_NAME(RADEONDownloadFromScreen)(PixmapPtr pSrc, int x, int y, int w, int h, TRACE; @@ -5209,7 +5648,7 @@ index 56de23e..b8b6602 100644 RADEONGetPixmapOffsetPitch(pSrc, &src_pitch_offset) && (scratch = RADEONCPGetBuffer(pScrn))) { -@@ -540,17 +669,23 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) +@@ -540,17 +667,23 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) info->exa->MarkSync = FUNC_NAME(RADEONMarkSync); info->exa->WaitMarker = FUNC_NAME(RADEONSync); @@ -5237,7 +5676,7 @@ index 56de23e..b8b6602 100644 #ifdef RENDER if (info->RenderAccel) { -@@ -560,7 +695,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) +@@ -560,7 +693,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) else if (IS_R300_3D || IS_R500_3D) { if ((info->ChipFamily < CHIP_FAMILY_RS400) #ifdef XF86DRI @@ -5246,7 +5685,7 @@ index 56de23e..b8b6602 100644 #endif ) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Render acceleration " -@@ -595,6 +730,16 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) +@@ -595,6 +728,16 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) } #endif @@ -5264,7 +5703,7 @@ index 56de23e..b8b6602 100644 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting EXA maxPitchBytes\n"); diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c -index 043b0d4..456cefe 100644 +index 043b0d4..8f98e92 100644 --- a/src/radeon_exa_render.c +++ b/src/radeon_exa_render.c @@ -410,19 +410,22 @@ static Bool FUNC_NAME(R100TextureSetup)(PicturePtr pPict, PixmapPtr pPix, @@ -5308,7 +5747,7 @@ index 043b0d4..456cefe 100644 } FINISH_ACCEL(); -@@ -1002,12 +1007,14 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix, +@@ -1002,15 +1007,19 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix, int w = pPict->pDrawable->width; int h = pPict->pDrawable->height; int i, pixel_shift; @@ -5322,9 +5761,16 @@ index 043b0d4..456cefe 100644 - txoffset = exaGetPixmapOffset(pPix) + info->fbLocation + pScrn->fbOffset; + txoffset = exaGetPixmapOffset(pPix); - if ((txoffset & 0x1f) != 0) - RADEON_FALLBACK(("Bad texture offset 0x%x\n", (int)txoffset)); -@@ -1071,13 +1078,25 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix, +- if ((txoffset & 0x1f) != 0) +- RADEON_FALLBACK(("Bad texture offset 0x%x\n", (int)txoffset)); ++ if (!info->new_cs) { ++ if ((txoffset & 0x1f) != 0) ++ RADEON_FALLBACK(("Bad texture offset 0x%x\n", (int)txoffset)); ++ } + if ((txpitch & 0x1f) != 0) + RADEON_FALLBACK(("Bad texture pitch 0x%x\n", (int)txpitch)); + +@@ -1071,13 +1080,25 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix, RADEON_FALLBACK(("Bad filter 0x%x\n", pPict->filter)); } @@ -5352,7 +5798,7 @@ index 043b0d4..456cefe 100644 if (!pPict->repeat) OUT_ACCEL_REG(R300_TX_BORDER_COLOR_0 + (unit * 4), 0); FINISH_ACCEL(); -@@ -1187,6 +1206,8 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, +@@ -1187,6 +1208,8 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, uint32_t txenable, colorpitch; uint32_t blendcntl; int pixel_shift; @@ -5361,7 +5807,7 @@ index 043b0d4..456cefe 100644 ACCEL_PREAMBLE(); TRACE; -@@ -1204,7 +1225,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, +@@ -1204,7 +1227,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, pixel_shift = pDst->drawable.bitsPerPixel >> 4; @@ -5370,7 +5816,16 @@ index 043b0d4..456cefe 100644 dst_pitch = exaGetPixmapPitch(pDst); colorpitch = dst_pitch >> pixel_shift; -@@ -1832,9 +1853,18 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, +@@ -1213,7 +1236,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, + + colorpitch |= dst_format; + +- if ((dst_offset & 0x0f) != 0) ++ if (!info->new_cs && ((dst_offset & 0x0f) != 0)) + RADEON_FALLBACK(("Bad destination offset 0x%x\n", (int)dst_offset)); + if (((dst_pitch >> pixel_shift) & 0x7) != 0) + RADEON_FALLBACK(("Bad destination pitch 0x%x\n", (int)dst_pitch)); +@@ -1832,9 +1855,18 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, FINISH_ACCEL(); } @@ -5393,7 +5848,7 @@ index 043b0d4..456cefe 100644 blendcntl = RADEONGetBlendCntl(op, pMaskPicture, pDstPicture->format); diff --git a/src/radeon_memory.c b/src/radeon_memory.c new file mode 100644 -index 0000000..8a23ccd +index 0000000..6c01dd9 --- /dev/null +++ b/src/radeon_memory.c @@ -0,0 +1,428 @@ @@ -5819,7 +6274,7 @@ index 0000000..8a23ccd + RADEONInfoPtr info = RADEONPTR(pScrn); + dri_bo *bo; + -+ bo = dri_bo_alloc(info->bufmgr, "rotate", size, 0); ++ bo = dri_bo_alloc(info->bufmgr, "rotate", size, 0, 0); + + radeon_bufmgr_pin(bo); + return bo; @@ -5886,7 +6341,7 @@ index 80333a4..c33632b 100644 +typedef drm_radeon_sarea_t RADEONSAREAPriv, *RADEONSAREAPrivPtr; +#endif diff --git a/src/radeon_textured_video.c b/src/radeon_textured_video.c -index da1d60f..9682ad8 100644 +index da1d60f..f93cded 100644 --- a/src/radeon_textured_video.c +++ b/src/radeon_textured_video.c @@ -85,6 +85,7 @@ static __inline__ uint32_t F_TO_DW(float val) @@ -5923,14 +6378,47 @@ index da1d60f..9682ad8 100644 /* The upload blit only supports multiples of 64 bytes */ dstPitch = (dstPitch + 63) & ~63; else -@@ -240,8 +244,12 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, +@@ -195,10 +199,13 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, + + if (pPriv->video_memory == NULL) { + pPriv->video_offset = RADEONAllocateMemory(pScrn, +- &pPriv->video_memory, +- size * 2); ++ &pPriv->video_memory, ++ size * 2); + if (pPriv->video_offset == 0) + return BadAlloc; ++ ++ if (info->new_cs) ++ pPriv->src_bo = pPriv->video_memory; + } + + /* Bicubic filter loading */ +@@ -211,6 +218,9 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, + pPriv->bicubic_src_offset = pPriv->bicubic_offset + info->fbLocation + pScrn->fbOffset; + if (pPriv->bicubic_offset == 0) + pPriv->bicubic_enabled = FALSE; ++ ++ if (info->new_cs) ++ pPriv->bicubic_bo = pPriv->bicubic_memory; + } + + if (pDraw->type == DRAWABLE_WINDOW) +@@ -240,8 +250,19 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, left = (x1 >> 16) & ~1; npixels = ((((x2 + 0xffff) >> 16) + 1) & ~1) - left; - pPriv->src_offset = pPriv->video_offset + info->fbLocation + pScrn->fbOffset; - pPriv->src_addr = (uint8_t *)(info->FB + pPriv->video_offset + (top * dstPitch)); + pPriv->src_offset = pPriv->video_offset; -+ if (info->drm_mm) { ++ if (info->new_cs) { ++ int ret; ++ ret = dri_bo_map(pPriv->src_bo, 1); ++ if (ret) ++ return BadAlloc; ++ ++ pPriv->src_addr = pPriv->src_bo->virtual; ++ } else if (info->drm_mm) { + pPriv->src_addr = (uint8_t *)(info->mm.front_buffer->map + pPriv->video_offset + (top * dstPitch)); + } else { + pPriv->src_addr = (uint8_t *)(info->FB + pPriv->video_offset + (top * dstPitch)); @@ -5938,9 +6426,39 @@ index da1d60f..9682ad8 100644 pPriv->src_pitch = dstPitch; pPriv->size = size; pPriv->pDraw = pDraw; -@@ -301,7 +309,7 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, +@@ -282,8 +303,24 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, + } + + /* Upload bicubic filter tex */ +- if (pPriv->bicubic_enabled) +- RADEONCopyData(pScrn, (uint8_t *)bicubic_tex_512, (uint8_t *)(info->FB + pPriv->bicubic_offset), 1024, 1024, 1, 512, 2); ++ if (pPriv->bicubic_enabled) { ++ uint8_t *bicubic_addr; ++ int ret; ++ ++ if (info->new_cs) { ++ ret = dri_bo_map(pPriv->bicubic_bo, 1); ++ if (ret) ++ return BadAlloc; ++ ++ bicubic_addr = pPriv->bicubic_bo->virtual; ++ } else ++ bicubic_addr = (uint8_t *)(info->FB + pPriv->bicubic_offset); ++ ++ RADEONCopyData(pScrn, (uint8_t *)bicubic_tex_512, bicubic_addr, 1024, 1024, 1, 512, 2); ++ ++ if (info->new_cs) ++ dri_bo_unmap(pPriv->bicubic_bo); ++ } + + /* update cliplist */ + if (!REGION_EQUAL(pScrn->pScreen, &pPriv->clip, clipBoxes)) { +@@ -300,8 +337,10 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, + pPriv->w = width; pPriv->h = height; ++ if (info->new_cs) ++ dri_bo_unmap(pPriv->src_bo); #ifdef XF86DRI - if (info->directRenderingEnabled) + if (info->directRenderingEnabled || info->drm_mode_setting) @@ -5948,10 +6466,19 @@ index da1d60f..9682ad8 100644 else #endif diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c -index b53e114..1e9f3b1 100644 +index b53e114..d3574f4 100644 --- a/src/radeon_textured_videofuncs.c +++ b/src/radeon_textured_videofuncs.c -@@ -103,19 +103,19 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv +@@ -95,6 +95,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv + { + RADEONInfoPtr info = RADEONPTR(pScrn); + PixmapPtr pPixmap = pPriv->pPixmap; ++ struct radeon_exa_pixmap_priv *driver_priv; ++ dri_bo *dst_bo; + uint32_t txformat; + uint32_t txfilter, txformat0, txformat1, txoffset, txpitch; + uint32_t dst_offset, dst_pitch, dst_format; +@@ -103,19 +105,25 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv int dstxoff, dstyoff, pixel_shift, vtx_count; BoxPtr pBox = REGION_RECTS(&pPriv->clip); int nBox = REGION_NUM_RECTS(&pPriv->clip); @@ -5963,7 +6490,13 @@ index b53e114..1e9f3b1 100644 #ifdef USE_EXA if (info->useEXA) { - dst_offset = exaGetPixmapOffset(pPixmap) + info->fbLocation + pScrn->fbOffset; -+ dst_offset = exaGetPixmapOffset(pPixmap); ++ if (info->new_cs) { ++ driver_priv = exaGetPixmapDriverPrivate(pPixmap); ++ if (driver_priv) ++ dst_bo = driver_priv->bo; ++ } else { ++ dst_offset = exaGetPixmapOffset(pPixmap); ++ } dst_pitch = exaGetPixmapPitch(pPixmap); } else #endif @@ -5974,7 +6507,7 @@ index b53e114..1e9f3b1 100644 dst_pitch = pPixmap->devKind; } -@@ -210,13 +210,21 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv +@@ -210,13 +218,21 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv txoffset = pPriv->src_offset; @@ -5989,8 +6522,8 @@ index b53e114..1e9f3b1 100644 - OUT_VIDEO_REG(R300_TX_OFFSET_0, txoffset); + + if (info->new_cs) { -+ OUT_VIDEO_REG(R300_TX_OFFSET_0, txoffset); -+ OUT_RELOC(info->mm.front_buffer->kernel_bo_handle, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); ++ OUT_VIDEO_REG(R300_TX_OFFSET_0, 0); ++ OUT_RELOC(pPriv->src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); + } else { + txoffset += info->fbLocation + pScrn->fbOffset; + OUT_VIDEO_REG(R300_TX_OFFSET_0, txoffset); @@ -5998,7 +6531,30 @@ index b53e114..1e9f3b1 100644 FINISH_VIDEO(); txenable = R300_TEX_0_ENABLE; -@@ -980,11 +988,18 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv +@@ -237,13 +253,20 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv + R300_TX_MAG_FILTER_NEAREST | + (1 << R300_TX_ID_SHIFT)); + +- BEGIN_VIDEO(6); ++ qwords = info->new_cs ? 8 : 6; ++ BEGIN_VIDEO(qwords); + OUT_VIDEO_REG(R300_TX_FILTER0_1, txfilter); + OUT_VIDEO_REG(R300_TX_FILTER1_1, 0); + OUT_VIDEO_REG(R300_TX_FORMAT0_1, txformat0); + OUT_VIDEO_REG(R300_TX_FORMAT1_1, txformat1); + OUT_VIDEO_REG(R300_TX_FORMAT2_1, txpitch); +- OUT_VIDEO_REG(R300_TX_OFFSET_1, pPriv->bicubic_src_offset); ++ ++ if (info->new_cs) { ++ OUT_VIDEO_REG(R300_TX_OFFSET_1, 0); ++ OUT_RELOC(pPriv->bicubic_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); ++ } else { ++ OUT_VIDEO_REG(R300_TX_OFFSET_1, pPriv->bicubic_src_offset); ++ } + FINISH_VIDEO(); + + /* Enable tex 1 */ +@@ -980,11 +1003,18 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv } } @@ -6010,8 +6566,8 @@ index b53e114..1e9f3b1 100644 - OUT_VIDEO_REG(R300_RB3D_COLOROFFSET0, dst_offset); + if (info->new_cs) { -+ OUT_VIDEO_REG(R300_RB3D_COLOROFFSET0, dst_offset); -+ OUT_RELOC(info->mm.front_buffer->kernel_bo_handle, 0, RADEON_GEM_DOMAIN_VRAM); ++ OUT_VIDEO_REG(R300_RB3D_COLOROFFSET0, 0); ++ OUT_RELOC(dst_bo, 0, RADEON_GEM_DOMAIN_VRAM); + } else { + dst_offset += info->fbLocation + pScrn->fbOffset; + OUT_VIDEO_REG(R300_RB3D_COLOROFFSET0, dst_offset); @@ -6019,7 +6575,7 @@ index b53e114..1e9f3b1 100644 OUT_VIDEO_REG(R300_RB3D_COLORPITCH0, colorpitch); blendcntl = RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO; -@@ -1029,6 +1044,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv +@@ -1029,6 +1059,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE); OUT_VIDEO_REG(RADEON_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE); @@ -6027,7 +6583,7 @@ index b53e114..1e9f3b1 100644 OUT_VIDEO_REG(RADEON_RB3D_COLOROFFSET, dst_offset); OUT_VIDEO_REG(RADEON_RB3D_COLORPITCH, colorpitch); -@@ -1066,7 +1082,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv +@@ -1066,7 +1097,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv ((pPriv->h - 1) << RADEON_TEX_VSIZE_SHIFT)); OUT_VIDEO_REG(R200_PP_TXPITCH_0, pPriv->src_pitch - 32); @@ -6037,7 +6593,7 @@ index b53e114..1e9f3b1 100644 OUT_VIDEO_REG(R200_PP_TXCBLEND_0, R200_TXC_ARG_A_ZERO | -@@ -1100,7 +1117,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv +@@ -1100,7 +1132,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv RADEON_CLAMP_T_CLAMP_LAST | RADEON_YUV_TO_RGB); OUT_VIDEO_REG(RADEON_PP_TXFORMAT_0, txformat); @@ -6048,7 +6604,7 @@ index b53e114..1e9f3b1 100644 RADEON_COLOR_ARG_A_ZERO | RADEON_COLOR_ARG_B_ZERO | diff --git a/src/radeon_video.c b/src/radeon_video.c -index e71f0f8..a7ea788 100644 +index e71f0f8..aba8884 100644 --- a/src/radeon_video.c +++ b/src/radeon_video.c @@ -270,7 +270,7 @@ void RADEONInitVideo(ScreenPtr pScreen) @@ -6069,3 +6625,59 @@ index e71f0f8..a7ea788 100644 #endif ) { texturedAdaptor = RADEONSetupImageTexturedVideo(pScreen); +@@ -2180,7 +2180,7 @@ RADEONCopyData( + + #ifdef XF86DRI + +- if ( info->directRenderingEnabled && info->DMAForXv ) ++ if ( info->directRenderingEnabled && info->DMAForXv && !info->new_cs ) + { + uint8_t *buf; + uint32_t bufPitch, dstPitchOff; +@@ -2443,6 +2443,20 @@ RADEONAllocateMemory( + int offset = 0; + + pScreen = screenInfo.screens[pScrn->scrnIndex]; ++ ++ if (info->new_cs) { ++ dri_bo *video_bo; ++ ++ video_bo = dri_bo_alloc(info->bufmgr, "xv pixmap", size, 4096, 0); ++ ++ *mem_struct = video_bo; ++ ++ if (!video_bo) ++ return 0; ++ ++ return (uint32_t)-1; ++ ++ } + #ifdef USE_EXA + if (info->useEXA) { + ExaOffscreenArea *area = *mem_struct; +@@ -2516,6 +2530,11 @@ RADEONFreeMemory( + ){ + RADEONInfoPtr info = RADEONPTR(pScrn); + ++ if (info->new_cs) { ++ struct dri_bo *bo = mem_struct; ++ dri_bo_unreference(bo); ++ return; ++ } + #ifdef USE_EXA + if (info->useEXA) { + ExaOffscreenArea *area = mem_struct; +diff --git a/src/radeon_video.h b/src/radeon_video.h +index b9d900d..0687969 100644 +--- a/src/radeon_video.h ++++ b/src/radeon_video.h +@@ -114,6 +114,9 @@ typedef struct { + int src_w, src_h, dst_w, dst_h; + int w, h; + int drw_x, drw_y; ++ ++ dri_bo *src_bo; ++ dri_bo *bicubic_bo; + } RADEONPortPrivRec, *RADEONPortPrivPtr; + + void RADEONInitI2C(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv); diff --git a/xorg-x11-drv-ati.spec b/xorg-x11-drv-ati.spec index 0eda2bd..4a76924 100644 --- a/xorg-x11-drv-ati.spec +++ b/xorg-x11-drv-ati.spec @@ -5,7 +5,7 @@ Summary: Xorg X11 ati video driver Name: xorg-x11-drv-ati Version: 6.9.0 -Release: 20%{?dist} +Release: 21%{?dist} URL: http://www.x.org License: MIT Group: User Interface/X Hardware Support @@ -16,7 +16,6 @@ Source1: radeon.xinf Patch0: radeon-6.9.0-to-git.patch Patch1: radeon-modeset.patch -Patch3: radeon-exa-fixes.patch Patch4: radeon-6.9.0-remove-limit-heuristics.patch Patch5: radeon-6.9.0-panel-size-sanity.patch Patch6: copy-fb-contents.patch @@ -25,13 +24,14 @@ ExcludeArch: s390 s390x BuildRequires: xorg-x11-server-sdk >= 1.4.99.1 BuildRequires: mesa-libGL-devel >= 6.4-4 -BuildRequires: libdrm-devel >= 2.4.0-0.19 +BuildRequires: libdrm-devel >= 2.4.0-0.21 BuildRequires: kernel-headers >= 2.6.27-0.308 BuildRequires: automake autoconf libtool pkgconfig BuildRequires: xorg-x11-util-macros >= 1.1.5 Requires: hwdata Requires: xorg-x11-server-Xorg >= 1.4.99.1 +Requires: libdrm >= 2.4.0-0.21 %description X.Org X11 ati video driver. @@ -40,7 +40,6 @@ X.Org X11 ati video driver. %setup -q -n %{tarball}-%{version} %patch0 -p1 -b .git %patch1 -p1 -b .modeset -%patch3 -p1 -b .exa-fixes %patch4 -p1 -b .remove-limit-heuristics %patch5 -p1 -b .panel-size %patch6 -p1 -b .copy-fb-contents @@ -75,6 +74,9 @@ rm -rf $RPM_BUILD_ROOT %{_mandir}/man4/radeon.4* %changelog +* Wed Oct 01 2008 Dave Airlie 6.9.0-21 +- rebase for latest fixes and new libdrm + * Mon Sep 29 2008 Dave Airlie 6.9.0-20 - fix collision with copy fb contents patch