From 948d68ba9e0e074725d58701fc6a775de9815274 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Feb 17 2008 23:46:36 +0000 Subject: - rebase to upstream git master - lots of r600 fixes --- diff --git a/radeon-git-upstream-fixes.patch b/radeon-git-upstream-fixes.patch index c2704b6..916377c 100644 --- a/radeon-git-upstream-fixes.patch +++ b/radeon-git-upstream-fixes.patch @@ -1,3 +1,165 @@ +commit d055b9e800ae50d08cca9db75fc666ce1da9ab52 +Author: Dave Airlie +Date: Sat Feb 16 09:13:43 2008 +1000 + + r128/radeon: hopeful fix for non pci access code + +commit c773bc6a314327da29e21e4ebac6fa7f3e98a0a7 +Author: Dave Airlie +Date: Sat Feb 16 09:05:07 2008 +1000 + + r128/radeon: fix build without pciaccess + +commit 690a52da5248f47a587a878d05fce9784957970b +Author: Dave Airlie +Date: Sat Feb 16 08:33:36 2008 +1000 + + mach64: fix non pciaccess build + +commit fc85188fd95bf78b7f965cdde3e22b644c74ff81 +Author: George Sapountzis +Date: Fri Feb 15 18:36:10 2008 +0200 + + ati: convert to pci probe + + add pciids for each subdriver, make no use of the match_data functionality. + + thanks to Alex Deucher for reviewing and testing. + +commit 665bd7e2f61cac3e029bbad5024034e5136deec1 +Author: George Sapountzis +Date: Fri Feb 15 18:34:56 2008 +0200 + + ati wrapper: translate Device lines + +commit a596c1618f72179a45289a50a1f9e89462ce9667 +Author: George Sapountzis +Date: Fri Feb 15 18:34:31 2008 +0200 + + r128: do not compile in PciChipsets twice + +commit 99cd8ff9a7e15fc2b4e55f8bc020f584173a8c2d +Author: George Sapountzis +Date: Fri Feb 15 18:33:51 2008 +0200 + + ati: drop duplicate pci-id defines + +commit 146b01b51069dc227d0b125babb3f6957c9b9de2 +Author: George Sapountzis +Date: Fri Feb 15 18:33:29 2008 +0200 + + mach64: clean probe a little + + do not report I/O ports now, they are reported later. + +commit f47d461331a032f9bdcf6f63336e848778cec6cc +Author: George Sapountzis +Date: Fri Feb 15 18:32:56 2008 +0200 + + mach64: minor cosmetic, I2C type + +commit 2c66f2e812195167df9ca113044d46deece776ac +Author: Dave Airlie +Date: Fri Feb 15 10:59:30 2008 +1000 + + make distcheck pass + +commit ed87f367ddab7366f84917b43b31d76df4ce1110 +Author: Alex Deucher +Date: Wed Feb 13 12:53:46 2008 -0500 + + RADEON: disable LVDS if panel size is 0x0 + + if we can't get the panel size from the bios or edid + or a user specified option, assume it's not connected. + +commit 422d7f441fdbb318d22d44db661ac9bd61387bd2 +Author: Alex Deucher +Date: Tue Feb 12 15:35:46 2008 -0500 + + R6xx: when both crtcs are in use make sure they are both enabled + + sometimes setting a mode on one crtc can cuase a blank screen on the other. + make sure they are both enabled if they should be. + +commit 860f5af75274cb236f536e1da09da6bd9a579530 +Author: Alex Deucher +Date: Tue Feb 12 14:46:49 2008 -0500 + + R6xx: fix up use of bios scratch regs to reflect the new offsets + +commit 32f2119b43a0faf6069d8cc0816f0d9f7914c07f +Author: Alex Deucher +Date: Tue Feb 12 14:20:02 2008 -0500 + + R6xx: bios scratch regs moved. + +commit 8d64be6ebd7f50d4bcb587afeee8252c1367dc77 +Author: Alex Deucher +Date: Tue Feb 12 12:53:09 2008 -0500 + + RADEON: make sure we always set up the FP crtc shadow registers for crtc0 + + The behavior changed when I added rmx center mode support. In cases where + crtc0 drives a DAC this can lead to a blank screen. + +commit 810d192ee046077a894e0fb5f2dfd6a7c0130766 +Author: Alex Deucher +Date: Mon Feb 11 19:23:01 2008 -0500 + + R6xx: add missing objects + +commit 85043439426e534e561259ce98bebdd8508b36a9 +Author: Alex Deucher +Date: Mon Feb 11 16:36:58 2008 -0500 + + R6xx: make sure we set up the HDP base properly + +commit 9ab5d2ec7c583c74f364d7cfbb54bcd2cd8ae2f5 +Author: Alex Deucher +Date: Mon Feb 11 15:26:51 2008 -0500 + + RADEON: always restore crtc1 before crtc0 when using both crtcs + + In some rare cases restoring crtc0 first will result in a blank screen + on crtc1. If you are having issues with a blank screen on crtc1 + that used to work on 6.6.3 or before, this should help. + +commit e33edca75bd9df0aa19a33e74c38a6d02610befd +Author: Alex Deucher +Date: Mon Feb 11 00:33:12 2008 -0500 + + RADEON: Implement proper (hopefully) BIOS/DRIVER interaction for ATOM bios + + Tested on atom-based Desktop cards. It'd nice to get some testing + on atom-based laptops. + +commit 6524e33435a786f7de0064cdd1b04c1120d21593 +Author: Alex Deucher +Date: Sun Feb 10 18:52:52 2008 -0500 + + RADEON: Implement proper (hopefully) BIOS/DRIVER interaction for COM bios + + Tested on my M10-based laptop. + +commit 8606c1bd175893c77e8c758246a1aed166c8be51 +Author: George Sapountzis +Date: Fri Feb 8 19:07:03 2008 +0200 + + mach64: factor out BIOS panel info parsing + +commit 9f33218c80f5a6d6d9464aa3db8ae25a4759f351 +Author: George Sapountzis +Date: Fri Feb 8 19:06:41 2008 +0200 + + mach64: minor cosmetic, LCD panel id + +commit 8cd5a465a03834b4b2f3a19f8d36fc9d2e18c6d4 +Author: George Sapountzis +Date: Fri Feb 8 19:06:27 2008 +0200 + + mach64: minor cosmetic, DAC type + commit 7f4db96123fdcba9874226352802d702c2a498bd Author: Dave Airlie Date: Fri Feb 8 10:47:10 2008 +1000 @@ -9805,7 +9967,7 @@ index 0000000..e557ac0 +//Without this file, compatibility will be broken among ASICs and BIOs vs. driver +//James H. Apr. 22/03 diff --git a/src/Makefile.am b/src/Makefile.am -index 5152577..661dcd8 100644 +index 5152577..a146df3 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -32,6 +32,38 @@ R128_DRI_SRCS = r128_dri.c @@ -9916,14 +10078,24 @@ index 5152577..661dcd8 100644 atimach64render.c \ radeon_render.c \ radeon_accelfuncs.c \ -@@ -138,7 +175,6 @@ EXTRA_DIST = \ +@@ -137,8 +174,8 @@ EXTRA_DIST = \ + atimach64i2c.h \ atimach64io.h \ atimach64probe.h \ ++ atimach64version.h \ atimode.h \ - atimodule.h \ atioption.h \ atipreinit.h \ atiprint.h \ +@@ -162,7 +199,6 @@ EXTRA_DIST = \ + mach64_common.h \ + mach64_dri.h \ + mach64_sarea.h \ +- r128_chipset.h \ + r128_common.h \ + r128_dri.h \ + r128_dripriv.h \ @@ -185,6 +221,7 @@ EXTRA_DIST = \ radeon_version.h \ radeon_video.h \ @@ -9932,18 +10104,20 @@ index 5152577..661dcd8 100644 theatre200.h \ theatre_detect.h \ theatre.h \ -@@ -196,4 +233,5 @@ EXTRA_DIST = \ +@@ -195,5 +232,7 @@ EXTRA_DIST = \ + radeon_chipinfo_gen.h \ radeon_chipset_gen.h \ radeon_pci_chipset_gen.h \ ++ radeon_pci_device_match_gen.h \ pcidb/ati_pciids.csv \ - pcidb/parse_pci_ids.pl + pcidb/parse_pci_ids.pl \ + radeon_atombios.h diff --git a/src/ati.c b/src/ati.c -index ada165f..89e62dc 100644 +index ada165f..b3f07ca 100644 --- a/src/ati.c +++ b/src/ati.c -@@ -63,12 +63,48 @@ +@@ -63,695 +63,286 @@ #include "atipcirename.h" #include "ati.h" @@ -9954,211 +10128,331 @@ index ada165f..89e62dc 100644 -#include "radeon_probe.h" -#include "r128_probe.h" +/* names duplicated from version headers */ -+#define MACH64_NAME "MACH64" +#define MACH64_DRIVER_NAME "mach64" -+#define R128_NAME "R128" +#define R128_DRIVER_NAME "r128" -+#define RADEON_NAME "RADEON" +#define RADEON_DRIVER_NAME "radeon" -+ + +-#ifdef XSERVER_LIBPCIACCESS +-static const struct pci_id_match ati_device_match = { +- PCI_VENDOR_ATI, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, 0 +enum +{ + ATI_CHIP_FAMILY_NONE = 0, + ATI_CHIP_FAMILY_Mach64, + ATI_CHIP_FAMILY_Rage128, + ATI_CHIP_FAMILY_Radeon -+}; -+ -+/* -+ * Record which sub-drivers have already been loaded, and thus have called -+ * xf86AddDriver(). For those sub-drivers, cause the ati wrapper later to fail -+ * when probing. -+ * -+ * The check is only called once when the ati wrapper is loaded and depends on -+ * the X server loading all drivers before doing any probes. -+ */ -+static Bool mach64_drv_added = FALSE; -+static Bool r128_drv_added = FALSE; -+static Bool radeon_drv_added = FALSE; -+ -+void -+ati_check_subdriver_added() -+{ -+ if (LoaderSymbol(MACH64_NAME)) -+ mach64_drv_added = TRUE; -+ if (LoaderSymbol(R128_NAME)) -+ r128_drv_added = TRUE; -+ if (LoaderSymbol(RADEON_NAME)) -+ radeon_drv_added = TRUE; -+} -+ + }; + +-/* Stolen from xf86pciBus.c */ +-/* PCI classes that get included in xf86PciVideoInfo */ +-#define PCIINFOCLASSES(c) \ +- ( (((c) & 0x00ff0000) == (PCI_CLASS_PREHISTORIC << 16)) || \ +- (((c) & 0x00ff0000) == (PCI_CLASS_DISPLAY << 16)) || \ +- ((((c) & 0x00ffff00) == ((PCI_CLASS_MULTIMEDIA << 16) | \ +- (PCI_SUBCLASS_MULTIMEDIA_VIDEO << 8)))) || \ +- ((((c) & 0x00ffff00) == ((PCI_CLASS_PROCESSOR << 16) | \ +- (PCI_SUBCLASS_PROCESSOR_COPROC << 8)))) ) +-#endif +static int ATIChipID(const CARD16); - #ifdef XSERVER_LIBPCIACCESS - static const struct pci_id_match ati_device_match = { -@@ -127,7 +163,11 @@ ATIProbe +-/* +- * ATIIdentify -- +- * +- * Print the driver's list of chipset names. +- */ +-static void +-ATIIdentify +-( +- int flags +-) +-{ +- /* +- * Only print chip families here, chip lists are printed when a subdriver +- * is loaded. +- */ +- xf86Msg(X_INFO, "%s: %s\n", ATI_NAME, +- "ATI driver wrapper (version " ATI_VERSION_NAME ") for chipsets: " +- "mach64, rage128, radeon"); +-} ++#ifdef XSERVER_LIBPCIACCESS + +-/* +- * ATIProbe -- +- * +- * This function is called once, at the start of the first server generation to +- * do a minimal probe for supported hardware. +- */ +-static Bool +-ATIProbe +-( +- DriverPtr pDriver, +- int flags +-) +-{ +- pciVideoPtr pVideo; +-#ifndef XSERVER_LIBPCIACCESS +- pciVideoPtr *xf86PciVideoInfo; ++/* domain defines (stolen from xserver) */ ++#if (defined(__alpha__) || defined(__ia64__)) && defined (linux) ++# define PCI_DOM_MASK 0x01fful + #else +- struct pci_device_iterator *pVideoIter; ++# define PCI_DOM_MASK 0x0ffu #endif - Bool DoMach64 = FALSE; - Bool DoRage128 = FALSE, DoRadeon = FALSE; +- Bool DoMach64 = FALSE; +- Bool DoRage128 = FALSE, DoRadeon = FALSE; - ATIChipType Chip; -+ int Chip; -+ -+ /* Let the sub-drivers probe & configure for themselves */ -+ if (xf86ServerIsOnlyDetecting()) -+ return FALSE; - #ifndef XSERVER_LIBPCIACCESS +-#ifndef XSERVER_LIBPCIACCESS ++#define PCI_DOM_FROM_BUS(bus) (((bus) >> 8) & (PCI_DOM_MASK)) ++#define PCI_BUS_NO_DOMAIN(bus) ((bus) & 0xffu) + +- xf86PciVideoInfo = xf86GetPciVideoInfo(); ++static struct pci_device* ++ati_device_get_from_busid(int bus, int dev, int func) ++{ ++ return pci_device_find_by_slot(PCI_DOM_FROM_BUS(bus), ++ PCI_BUS_NO_DOMAIN(bus), ++ dev, ++ func); ++} + +- if (xf86PciVideoInfo == NULL) +- return FALSE; ++static struct pci_device* ++ati_device_get_primary() ++{ ++ struct pci_device *device = NULL; ++ struct pci_device_iterator *device_iter; -@@ -143,12 +183,12 @@ ATIProbe - continue; +- while ((pVideo = *xf86PciVideoInfo++) != NULL) +- { +- if ((PCI_DEV_VENDOR_ID(pVideo) != PCI_VENDOR_ATI) || +- (PCI_DEV_DEVICE_ID(pVideo) == PCI_CHIP_MACH32)) +- continue; ++ device_iter = pci_slot_match_iterator_create(NULL); - /* Check for Rage128's, Radeon's and later adapters */ +- /* Check for Rage128's, Radeon's and later adapters */ - Chip = ATIChipID(PCI_DEV_DEVICE_ID(pVideo), PCI_DEV_REVISION(pVideo)); - if (Chip <= ATI_CHIP_Mach64) -+ Chip = ATIChipID(PCI_DEV_DEVICE_ID(pVideo)); -+ if (Chip == ATI_CHIP_FAMILY_Mach64) - DoMach64 = TRUE; +- DoMach64 = TRUE; - else if (Chip <= ATI_CHIP_Rage128) -+ else if (Chip == ATI_CHIP_FAMILY_Rage128) - DoRage128 = TRUE; +- DoRage128 = TRUE; - else if (Chip <= ATI_CHIP_Radeon) -+ else if (Chip == ATI_CHIP_FAMILY_Radeon) - DoRadeon = TRUE; +- DoRadeon = TRUE; ++ while ((device = pci_device_next(device_iter)) != NULL) { ++ if (xf86IsPrimaryPci(device)) ++ break; } -@@ -168,12 +208,12 @@ ATIProbe - continue; +-#else /* XSERVER_LIBPCIACCESS */ +- +- pVideoIter = pci_id_match_iterator_create(&ati_device_match); ++ pci_iterator_destroy(device_iter); + +- while ((pVideo = pci_device_next(pVideoIter)) != NULL) +- { +- /* Check for non-video devices */ +- if (!PCIINFOCLASSES(pVideo->device_class)) +- continue; ++ return device; ++} - /* Check for Rage128's, Radeon's and later adapters */ +- /* Check for prehistoric PCI Mach32 */ +- if ((PCI_DEV_VENDOR_ID(pVideo) != PCI_VENDOR_ATI) || +- (PCI_DEV_DEVICE_ID(pVideo) == PCI_CHIP_MACH32)) +- continue; ++#else /* XSERVER_LIBPCIACCESS */ + +- /* Check for Rage128's, Radeon's and later adapters */ - Chip = ATIChipID(PCI_DEV_DEVICE_ID(pVideo), PCI_DEV_REVISION(pVideo)); - if (Chip <= ATI_CHIP_Mach64) -+ Chip = ATIChipID(PCI_DEV_DEVICE_ID(pVideo)); -+ if (Chip == ATI_CHIP_FAMILY_Mach64) - DoMach64 = TRUE; +- DoMach64 = TRUE; - else if (Chip <= ATI_CHIP_Rage128) -+ else if (Chip == ATI_CHIP_FAMILY_Rage128) - DoRage128 = TRUE; +- DoRage128 = TRUE; - else if (Chip <= ATI_CHIP_Radeon) -+ else if (Chip == ATI_CHIP_FAMILY_Radeon) - DoRadeon = TRUE; - } +- DoRadeon = TRUE; +- } ++static pciVideoPtr ++ati_device_get_from_busid(int bus, int dev, int func) ++{ ++ pciVideoPtr pVideo = NULL; ++ pciVideoPtr *xf86PciVideoInfo; + +- pci_iterator_destroy(pVideoIter); ++ xf86PciVideoInfo = xf86GetPciVideoInfo(); -@@ -184,67 +224,82 @@ ATIProbe - /* Call Radeon driver probe */ - if (DoRadeon) +-#endif /* XSERVER_LIBPCIACCESS */ ++ if (xf86PciVideoInfo == NULL) ++ return NULL; + +- /* Call Radeon driver probe */ +- if (DoRadeon) ++ while ((pVideo = *xf86PciVideoInfo++) != NULL) { - pointer radeon = xf86LoadDrvSubModule(pDriver, "radeon"); -+ DriverRec *radeon; -+ -+ /* If the sub-driver was added, let it probe for itself */ -+ if (radeon_drv_added) -+ return FALSE; -+ -+ if (!LoaderSymbol(RADEON_NAME)) -+ xf86LoadDrvSubModule(pDriver, RADEON_DRIVER_NAME); -+ -+ radeon = (DriverRec*)LoaderSymbol(RADEON_NAME); - - if (!radeon) - { - xf86Msg(X_ERROR, +- +- if (!radeon) +- { +- xf86Msg(X_ERROR, - ATI_NAME ": Failed to load \"radeon\" module.\n"); -+ ATI_NAME ": Failed to find \"radeon\" driver symbol.\n"); - return FALSE; - } +- return FALSE; +- } ++ if ((pVideo->bus == bus) && (pVideo->device == dev) && ++ (pVideo->func == func)) ++ break; ++ } - xf86LoaderReqSymLists(RADEONSymbols, NULL); -+ radeon->Identify(flags); ++ return pVideo; ++} - RADEONIdentify(flags); -- ++static pciVideoPtr ++ati_device_get_primary() ++{ ++ pciVideoPtr pVideo = NULL; ++ pciVideoPtr *xf86PciVideoInfo; + - if (RADEONProbe(pDriver, flags)) -+ if (radeon->Probe(pDriver, flags)) - return TRUE; -- +- return TRUE; ++ xf86PciVideoInfo = xf86GetPciVideoInfo(); + - xf86UnloadSubModule(radeon); - } +- } ++ if (xf86PciVideoInfo == NULL) ++ return NULL; - /* Call Rage 128 driver probe */ - if (DoRage128) +- /* Call Rage 128 driver probe */ +- if (DoRage128) ++ while ((pVideo = *xf86PciVideoInfo++) != NULL) { - pointer r128 = xf86LoadDrvSubModule(pDriver, "r128"); -+ DriverRec *r128; -+ -+ /* If the sub-driver was added, let it probe for itself */ -+ if (r128_drv_added) -+ return FALSE; -+ -+ if (!LoaderSymbol(R128_NAME)) -+ xf86LoadDrvSubModule(pDriver, R128_DRIVER_NAME); -+ -+ r128 = (DriverRec*)LoaderSymbol(R128_NAME); ++ if (xf86IsPrimaryPci(pVideo)) ++ break; ++ } - if (!r128) - { - xf86Msg(X_ERROR, +- if (!r128) +- { +- xf86Msg(X_ERROR, - ATI_NAME ": Failed to load \"r128\" module.\n"); -+ ATI_NAME ": Failed to find \"r128\" driver symbol.\n"); - return FALSE; - } +- return FALSE; +- } ++ return pVideo; ++} - xf86LoaderReqSymLists(R128Symbols, NULL); -+ r128->Identify(flags); ++#endif /* XSERVER_LIBPCIACCESS */ - R128Identify(flags); -- ++void ++ati_gdev_subdriver(pointer options) ++{ ++ int nATIGDev, nMach64GDev, nR128GDev, nRadeonGDev; ++ GDevPtr *ATIGDevs; ++ Bool load_mach64 = FALSE, load_r128 = FALSE, load_radeon = FALSE; ++ int i; ++ ++ /* let the subdrivers configure for themselves */ ++ if (xf86ServerIsOnlyDetecting()) ++ return; ++ ++ /* get Device sections with Driver "ati" */ ++ nATIGDev = xf86MatchDevice(ATI_DRIVER_NAME, &ATIGDevs); ++ nMach64GDev = xf86MatchDevice(MACH64_DRIVER_NAME, NULL); ++ nR128GDev = xf86MatchDevice(R128_DRIVER_NAME, NULL); ++ nRadeonGDev = xf86MatchDevice(RADEON_DRIVER_NAME, NULL); ++ ++ for (i = 0; i < nATIGDev; i++) { ++ GDevPtr ati_gdev = ATIGDevs[i]; ++ pciVideoPtr device = NULL; ++ int chip_family; ++ ++ /* get pci device for the Device section */ ++ if (ati_gdev->busID) { ++ int bus, dev, func; ++ ++ if (!xf86ParsePciBusString(ati_gdev->busID, &bus, &dev, &func)) ++ continue; ++ ++ device = ati_device_get_from_busid(bus, dev, func); ++ } ++ else { ++ device = ati_device_get_primary(); ++ } + - if (R128Probe(pDriver, flags)) -+ if (r128->Probe(pDriver, flags)) - return TRUE; -- +- return TRUE; ++ if (!device) ++ continue; + - xf86UnloadSubModule(r128); - } +- } ++ /* check for non-ati devices and prehistoric mach32 */ ++ if ((PCI_DEV_VENDOR_ID(device) != PCI_VENDOR_ATI) || ++ (PCI_DEV_DEVICE_ID(device) == PCI_CHIP_MACH32)) ++ continue; - /* Call Mach64 driver probe */ - if (DoMach64) - { +- /* Call Mach64 driver probe */ +- if (DoMach64) +- { - pointer atimisc = xf86LoadDrvSubModule(pDriver, "atimisc"); -+ DriverRec *mach64; ++ /* replace Driver line in the Device section */ ++ chip_family = ATIChipID(PCI_DEV_DEVICE_ID(device)); - if (!atimisc) -+ /* If the sub-driver was added, let it probe for itself */ -+ if (mach64_drv_added) -+ return FALSE; -+ -+ if (!LoaderSymbol(MACH64_NAME)) -+ xf86LoadDrvSubModule(pDriver, MACH64_DRIVER_NAME); -+ -+ mach64 = (DriverRec*)LoaderSymbol(MACH64_NAME); -+ -+ if (!mach64) - { - xf86Msg(X_ERROR, +- { +- xf86Msg(X_ERROR, - ATI_NAME ": Failed to load \"atimisc\" module.\n"); -+ ATI_NAME ": Failed to find \"mach64\" driver symbol.\n"); - return FALSE; +- return FALSE; ++ if (chip_family == ATI_CHIP_FAMILY_Mach64) { ++ ati_gdev->driver = MACH64_DRIVER_NAME; ++ load_mach64 = TRUE; } - xf86LoaderReqSymLists(ATISymbols, NULL); -+ mach64->Identify(flags); - +- - Mach64Identify(flags); - - if (Mach64Probe(pDriver, flags)) -+ if (mach64->Probe(pDriver, flags)) - return TRUE; -- +- return TRUE; ++ if (chip_family == ATI_CHIP_FAMILY_Rage128) { ++ ati_gdev->driver = R128_DRIVER_NAME; ++ load_r128 = TRUE; ++ } + - xf86UnloadSubModule(atimisc); ++ if (chip_family == ATI_CHIP_FAMILY_Radeon) { ++ ati_gdev->driver = RADEON_DRIVER_NAME; ++ load_radeon = TRUE; ++ } } - return FALSE; -@@ -263,17 +318,52 @@ ATIAvailableOptions - ) - { - CARD16 ChipType = ChipId & 0xffff; +- return FALSE; +-} ++ xfree(ATIGDevs); + +-/* +- * ATIAvailableOptions -- +- * +- * Return recognised options that are intended for public consumption. +- */ +-static const OptionInfoRec * +-ATIAvailableOptions +-( +- int ChipId, +- int BusId +-) +-{ +- CARD16 ChipType = ChipId & 0xffff; - ATIChipType Chip; -+ int Chip; ++ /* load subdrivers as primary modules and only if they do not get loaded ++ * from other device sections ++ */ - /* Probe should have loaded the appropriate subdriver by this point */ +- /* Probe should have loaded the appropriate subdriver by this point */ ++ if (load_mach64 && (nMach64GDev == 0)) ++ xf86LoadOneModule(MACH64_DRIVER_NAME, options); - Chip = ATIChipID(ChipType, 0x0); /* chip revision is don't care */ - if (Chip <= ATI_CHIP_Mach64) @@ -10167,55 +10461,27 @@ index ada165f..89e62dc 100644 - return R128AvailableOptions(ChipId, BusId); - else if (Chip <= ATI_CHIP_Radeon) - return RADEONAvailableOptions(ChipId, BusId); -+ Chip = ATIChipID(ChipType); -+ if (Chip == ATI_CHIP_FAMILY_Mach64) -+ { -+ DriverRec *mach64 = (DriverRec*)LoaderSymbol(MACH64_NAME); -+ -+ if (!mach64) -+ { -+ xf86Msg(X_ERROR, -+ ATI_NAME ": Failed to find \"mach64\" driver symbol.\n"); -+ return NULL; -+ } -+ -+ return mach64->AvailableOptions(ChipId, BusId); -+ } -+ -+ if (Chip == ATI_CHIP_FAMILY_Rage128) -+ { -+ DriverRec *r128 = (DriverRec*)LoaderSymbol(R128_NAME); -+ -+ if (!r128) -+ { -+ xf86Msg(X_ERROR, -+ ATI_NAME ": Failed to find \"r128\" driver symbol.\n"); -+ return NULL; -+ } -+ -+ return r128->AvailableOptions(ChipId, BusId); -+ } -+ -+ if (Chip == ATI_CHIP_FAMILY_Radeon) -+ { -+ DriverRec *radeon = (DriverRec*)LoaderSymbol(RADEON_NAME); -+ -+ if (!radeon) -+ { -+ xf86Msg(X_ERROR, -+ ATI_NAME ": Failed to find \"radeon\" driver symbol.\n"); -+ return NULL; -+ } -+ -+ return radeon->AvailableOptions(ChipId, BusId); -+ } ++ if (load_r128 && (nR128GDev == 0)) ++ xf86LoadOneModule(R128_DRIVER_NAME, options); - return NULL; +- return NULL; ++ if (load_radeon && (nRadeonGDev == 0)) ++ xf86LoadOneModule(RADEON_DRIVER_NAME, options); } -@@ -291,467 +381,105 @@ _X_EXPORT DriverRec ATI = - }; - /* +-/* The root of all evil... */ +-_X_EXPORT DriverRec ATI = +-{ +- ATI_VERSION_CURRENT, +- "ati", +- ATIIdentify, +- ATIProbe, +- ATIAvailableOptions, +- NULL, +- 0 +-}; +- +-/* - * Chip-related definitions. - */ -const char *ATIChipNames[] = @@ -10285,7 +10551,7 @@ index ada165f..89e62dc 100644 - -#include "atichip.h" - --/* + /* * ATIChipID -- * - * This returns the ATI_CHIP_* value (generally) associated with a particular @@ -10773,10 +11039,10 @@ index ada165f..89e62dc 100644 } } diff --git a/src/ati.h b/src/ati.h -index 48ab1cd..e86e50c 100644 +index 48ab1cd..828aae1 100644 --- a/src/ati.h +++ b/src/ati.h -@@ -25,84 +25,14 @@ +@@ -25,84 +25,10 @@ #include #include "xf86Pci.h" @@ -10858,11 +11124,9 @@ index 48ab1cd..e86e50c 100644 -} ATIChipType; - -extern const char *ATIChipNames[]; -+extern void ati_check_subdriver_added(); - +- -extern ATIChipType ATIChipID(const CARD16, const CARD8); -+extern DriverRec ATI; - +- #endif /* ___ATI_H___ */ diff --git a/src/ati_pciids_gen.h b/src/ati_pciids_gen.h index ad54f64..330d1a9 100644 @@ -11542,32 +11806,88 @@ index ebccd75..168224c 100644 - #endif /* ___ATILOAD_H___ */ diff --git a/src/atimach64probe.c b/src/atimach64probe.c -index 2f716a1..ffab153 100644 +index 2f716a1..2d554e1 100644 --- a/src/atimach64probe.c +++ b/src/atimach64probe.c -@@ -28,6 +28,7 @@ +@@ -28,8 +28,8 @@ #include "atichip.h" #include "atimach64io.h" #include "atimach64probe.h" +#include "atimach64version.h" #include "atioption.h" - #include "ativersion.h" +-#include "ativersion.h" -@@ -106,11 +107,11 @@ Mach64PciChipsets[] = { + /* include headers corresponding to ScrnInfoPtr fields */ + #include "atipreinit.h" +@@ -38,6 +38,10 @@ + #include "atiadjust.h" + #include "ativalid.h" + ++#ifndef XSERVER_LIBPCIACCESS ++static Bool Mach64Probe(DriverPtr pDriver, int flags); ++#endif ++ + SymTabRec + Mach64Chipsets[] = { + {ATI_CHIP_88800GXC, "ATI 88800GX-C"}, +@@ -106,13 +110,51 @@ Mach64PciChipsets[] = { {-1, -1, RES_UNDEFINED} }; -_X_EXPORT const OptionInfoRec * ++#ifdef XSERVER_LIBPCIACCESS ++ ++static const struct pci_id_match mach64_device_match[] = { ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GX, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64CX, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64CT, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64ET, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64VT, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GT, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64VU, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GU, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64LG, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64VV, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GV, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GW, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GY, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GZ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GB, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GD, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GI, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GP, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GQ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64LB, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64LD, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64LI, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64LP, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64LQ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GL, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GM, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GN, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GO, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GR, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64GS, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64LM, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64LN, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64LR, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_MACH64LS, 0 ), ++ { 0, 0, 0 } ++}; ++ ++#endif /* XSERVER_LIBPCIACCESS */ ++ +static const OptionInfoRec * Mach64AvailableOptions(int chipid, int busid) { - /* +- /* - * Return options defined in the atimisc submodule which will have been -+ * Return options defined in the mach64 submodule which will have been - * loaded by this point. - */ +- * loaded by this point. +- */ return ATIOptionsWeak(); -@@ -121,13 +122,13 @@ Mach64AvailableOptions(int chipid, int busid) + } + +@@ -121,23 +163,56 @@ Mach64AvailableOptions(int chipid, int busid) * * Print the driver's list of chipset names. */ @@ -11583,7 +11903,42 @@ index 2f716a1..ffab153 100644 "Driver for ATI Mach64 chipsets"); } -@@ -137,12 +138,12 @@ Mach64Identify ++static Bool ++mach64_get_scrninfo(int entity_num) ++{ ++ ScrnInfoPtr pScrn; ++ ++ pScrn = xf86ConfigPciEntity(NULL, 0, entity_num, Mach64PciChipsets, ++ 0, 0, 0, 0, NULL); ++ ++ if (!pScrn) ++ return FALSE; ++ ++ pScrn->driverVersion = MACH64_VERSION_CURRENT; ++ pScrn->driverName = MACH64_DRIVER_NAME; ++ pScrn->name = MACH64_NAME; ++#ifdef XSERVER_LIBPCIACCESS ++ pScrn->Probe = NULL; ++#else ++ pScrn->Probe = Mach64Probe; ++#endif ++ pScrn->PreInit = ATIPreInit; ++ pScrn->ScreenInit = ATIScreenInit; ++ pScrn->SwitchMode = ATISwitchMode; ++ pScrn->AdjustFrame = ATIAdjustFrame; ++ pScrn->EnterVT = ATIEnterVT; ++ pScrn->LeaveVT = ATILeaveVT; ++ pScrn->FreeScreen = ATIFreeScreen; ++ pScrn->ValidMode = ATIValidMode; ++ ++ return TRUE; ++} ++ ++#ifndef XSERVER_LIBPCIACCESS ++ + /* + * Mach64Probe -- + * * This function is called once, at the start of the first server generation to * do a minimal probe for supported hardware. */ @@ -11591,76 +11946,101 @@ index 2f716a1..ffab153 100644 +static Bool Mach64Probe(DriverPtr pDriver, int flags) { -- GDevPtr *devSections; -+ GDevPtr *devSections, *ATIGDevs, *Mach64GDevs; - int *usedChips; -- int numDevSections; -+ int numDevSections, nATIGDev, nMach64GDev; + GDevPtr *devSections; +@@ -145,16 +220,17 @@ Mach64Probe(DriverPtr pDriver, int flags) + int numDevSections; int numUsed; Bool ProbeSuccess = FALSE; ++ int i; -@@ -151,10 +152,32 @@ Mach64Probe(DriverPtr pDriver, int flags) +-#ifndef XSERVER_LIBPCIACCESS + if (xf86GetPciVideoInfo() == NULL) return FALSE; - #endif +-#endif - if ((numDevSections = xf86MatchDevice(ATI_DRIVER_NAME, &devSections)) <= 0) -+ /* Collect unclaimed device sections for both driver names */ -+ nATIGDev = xf86MatchDevice(ATI_DRIVER_NAME, &ATIGDevs); -+ nMach64GDev = xf86MatchDevice(MACH64_DRIVER_NAME, &Mach64GDevs); ++ numDevSections = xf86MatchDevice(MACH64_DRIVER_NAME, &devSections); + -+ if ((numDevSections = nATIGDev + nMach64GDev) <= 0) ++ if (numDevSections <= 0) return FALSE; - numUsed = xf86MatchPciInstances(ATI_DRIVER_NAME, PCI_VENDOR_ATI, -+ if (ATIGDevs == NULL) { -+ devSections = Mach64GDevs; -+ numDevSections = nMach64GDev; -+ } else if (Mach64GDevs == NULL) { -+ devSections = ATIGDevs; -+ numDevSections = nATIGDev; -+ } else { -+ /* Combine into one list */ -+ devSections = xnfalloc((numDevSections + 1) * sizeof(GDevPtr)); -+ (void)memcpy(devSections, -+ ATIGDevs, nATIGDev * sizeof(GDevPtr)); -+ (void)memcpy(devSections + nATIGDev, -+ Mach64GDevs, nMach64GDev * sizeof(GDevPtr)); -+ devSections[numDevSections] = NULL; -+ xfree(ATIGDevs); -+ xfree(Mach64GDevs); -+ } -+ + numUsed = xf86MatchPciInstances(MACH64_NAME, PCI_VENDOR_ATI, Mach64Chipsets, Mach64PciChipsets, devSections, numDevSections, pDriver, &usedChips); -@@ -177,9 +200,9 @@ Mach64Probe(DriverPtr pDriver, int flags) - if (!pScrn) - continue; - +@@ -166,31 +242,9 @@ Mach64Probe(DriverPtr pDriver, int flags) + if (flags & PROBE_DETECT) { + ProbeSuccess = TRUE; + } else { +- int i; +- + for (i = 0; i < numUsed; i++) { +- ScrnInfoPtr pScrn; +- +- pScrn = xf86ConfigPciEntity(NULL, 0, usedChips[i], Mach64PciChipsets, +- 0, 0, 0, 0, NULL); +- +- if (!pScrn) +- continue; +- - pScrn->driverVersion = ATI_VERSION_CURRENT; - pScrn->driverName = ATI_DRIVER_NAME; - pScrn->name = ATI_NAME; -+ pScrn->driverVersion = MACH64_VERSION_CURRENT; -+ pScrn->driverName = MACH64_DRIVER_NAME; -+ pScrn->name = MACH64_NAME; - pScrn->Probe = Mach64Probe; - pScrn->PreInit = ATIPreInit; - pScrn->ScreenInit = ATIScreenInit; -@@ -198,3 +221,14 @@ Mach64Probe(DriverPtr pDriver, int flags) +- pScrn->Probe = Mach64Probe; +- pScrn->PreInit = ATIPreInit; +- pScrn->ScreenInit = ATIScreenInit; +- pScrn->SwitchMode = ATISwitchMode; +- pScrn->AdjustFrame = ATIAdjustFrame; +- pScrn->EnterVT = ATIEnterVT; +- pScrn->LeaveVT = ATILeaveVT; +- pScrn->FreeScreen = ATIFreeScreen; +- pScrn->ValidMode = ATIValidMode; +- +- ProbeSuccess = TRUE; ++ if (mach64_get_scrninfo(usedChips[i])) ++ ProbeSuccess = TRUE; + } + } + +@@ -198,3 +252,38 @@ Mach64Probe(DriverPtr pDriver, int flags) return ProbeSuccess; } + ++#else /* XSERVER_LIBPCIACCESS */ ++ ++static Bool ++mach64_pci_probe( ++ DriverPtr pDriver, ++ int entity_num, ++ struct pci_device *device, ++ intptr_t match_data ++) ++{ ++ return mach64_get_scrninfo(entity_num); ++} ++ ++#endif /* XSERVER_LIBPCIACCESS */ ++ +_X_EXPORT DriverRec MACH64 = +{ + MACH64_VERSION_CURRENT, + MACH64_DRIVER_NAME, + Mach64Identify, ++#ifdef XSERVER_LIBPCIACCESS ++ NULL, ++#else + Mach64Probe, ++#endif + Mach64AvailableOptions, + NULL, -+ 0 ++ 0, ++ NULL, ++#ifdef XSERVER_LIBPCIACCESS ++ mach64_device_match, ++ mach64_pci_probe ++#endif +}; diff --git a/src/atimach64probe.h b/src/atimach64probe.h index 65ced98..7b0b4b6 100644 @@ -11768,10 +12148,10 @@ index 67becec..ef17861 100644 else { diff --git a/src/atimisc.c b/src/atimisc.c -index e6012ec..cf2347a 100644 +index e6012ec..ebfde54 100644 --- a/src/atimisc.c +++ b/src/atimisc.c -@@ -18,31 +18,28 @@ +@@ -18,31 +18,26 @@ * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. @@ -11788,17 +12168,16 @@ index e6012ec..cf2347a 100644 - #include "ati.h" -#include "atiload.h" - #include "ativersion.h" - +-#include "ativersion.h" +#include "atimach64probe.h" +#include "atimach64version.h" -+ + /* Module loader interface for subsidiary driver module */ static XF86ModuleVersionInfo ATIVersionRec = { - "atimisc", -+ "mach64", ++ MACH64_DRIVER_NAME, MODULEVENDORSTRING, MODINFOSTRING1, MODINFOSTRING2, @@ -11808,7 +12187,7 @@ index e6012ec..cf2347a 100644 ABI_CLASS_VIDEODRV, ABI_VIDEODRV_VERSION, MOD_CLASS_VIDEODRV, -@@ -67,74 +64,8 @@ ATISetup +@@ -67,87 +62,17 @@ ATISetup if (!Inited) { @@ -11880,12 +12259,11 @@ index e6012ec..cf2347a 100644 - ATIramdacSymbols, - ATIi2cSymbols, - NULL); -+ if (xf86ServerIsOnlyDetecting() || !LoaderSymbol(ATI_NAME)) -+ xf86AddDriver(&MACH64, Module, 0); - +- Inited = TRUE; ++ xf86AddDriver(&MACH64, Module, HaveDriverFuncs); } -@@ -142,12 +73,10 @@ ATISetup + return (pointer)TRUE; } @@ -11928,10 +12306,10 @@ index 68c1342..d1b3198 100644 int vbemode, modekey; diff --git a/src/atimodule.c b/src/atimodule.c -index 6aa9a2e..802c35a 100644 +index 6aa9a2e..c249333 100644 --- a/src/atimodule.c +++ b/src/atimodule.c -@@ -24,38 +24,11 @@ +@@ -24,37 +24,12 @@ #include "config.h" #endif @@ -11941,8 +12319,8 @@ index 6aa9a2e..802c35a 100644 -#include "atimodule.h" #include "ativersion.h" - /* Module loader interface */ - +-/* Module loader interface */ +- -const char *ATISymbols[] = -{ - "Mach64Identify", @@ -11958,7 +12336,8 @@ index 6aa9a2e..802c35a 100644 - "R128AvailableOptions", - NULL -}; -- ++extern void ati_gdev_subdriver(pointer options); + -const char *RADEONSymbols[] = -{ - "RADEONIdentify", @@ -11966,20 +12345,22 @@ index 6aa9a2e..802c35a 100644 - "RADEONAvailableOptions", - NULL -}; -- ++/* Module loader interface */ + static XF86ModuleVersionInfo ATIVersionRec = { - ATI_DRIVER_NAME, -@@ -91,11 +64,7 @@ ATISetup +@@ -89,13 +64,7 @@ ATISetup + if (!Inited) + { Inited = TRUE; - xf86AddDriver(&ATI, Module, 0); - +- xf86AddDriver(&ATI, Module, 0); +- - xf86LoaderRefSymLists( - ATISymbols, - R128Symbols, - RADEONSymbols, - NULL); -+ ati_check_subdriver_added(); ++ ati_gdev_subdriver(Options); } return (pointer)1; @@ -12025,29 +12406,25 @@ index d33b01d..0000000 -extern const char *RADEONSymbols[]; - -#endif /* ___ATIMODULE_H___ */ -diff --git a/src/atipciids.h b/src/atipciids.h -index f24f8fb..2953964 100644 ---- a/src/atipciids.h -+++ b/src/atipciids.h -@@ -40,6 +40,13 @@ - - #include "ati_pciids_gen.h" +diff --git a/src/atipcirename.h b/src/atipcirename.h +index 5aa6b80..de8f0a3 100644 +--- a/src/atipcirename.h ++++ b/src/atipcirename.h +@@ -117,6 +117,9 @@ typedef struct pci_device *pciVideoPtr; + #define PCI_WRITE_LONG(_pcidev, _value, _offset) \ + pci_device_cfg_write_u32((_pcidev), (_value), (_offset)) -+#define PCI_CHIP_R520_7104 0x7104 -+#define PCI_CHIP_RV515_7142 0x7142 -+#define PCI_CHIP_RV515_7183 0x7183 -+#define PCI_CHIP_RV530_71C5 0x71C5 -+#define PCI_CHIP_R580_7249 0x7249 -+#define PCI_CHIP_RV570_7280 0x7280 ++#define ATI_DEVICE_MATCH(d, i) \ ++ { PCI_VENDOR_ATI, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0, 0, (i) } + - /* Misc */ - #define PCI_CHIP_AMD761 0x700E + #endif /* XSERVER_LIBPCIACCESS */ + #endif /* ATIPCIRENAME_H */ diff --git a/src/atipreinit.c b/src/atipreinit.c -index 8114f51..8c67932 100644 +index 8114f51..f89f5b7 100644 --- a/src/atipreinit.c +++ b/src/atipreinit.c -@@ -123,6 +123,253 @@ ATIPrintNoiseIfRequested +@@ -123,6 +123,367 @@ ATIPrintNoiseIfRequested ATIPrintRegisters(pATI); } @@ -12254,7 +12631,8 @@ index 8114f51..8c67932 100644 + ScrnInfoPtr pScreenInfo, + ATIPtr pATI, + CARD8 *BIOS, -+ unsigned int VideoTable ++ unsigned int VideoTable, ++ unsigned int HardwareTable +) +{ + pATI->Audio = ATI_AUDIO_NONE; @@ -12296,12 +12674,125 @@ index 8114f51..8c67932 100644 + break; + } + } ++ ++ if (HardwareTable > 0) ++ { ++ pATI->I2CType = BIOSByte(HardwareTable + 0x06U) & 0x0FU; ++ } ++} ++ ++/* ++ * Determine panel dimensions and model. ++ */ ++static void ++ati_bios_panel_info ++( ++ ScrnInfoPtr pScreenInfo, ++ ATIPtr pATI, ++ CARD8 *BIOS, ++ unsigned int BIOSSize, ++ unsigned int LCDTable ++) ++{ ++ unsigned int LCDPanelInfo = 0; ++ char Buffer[128]; ++ int i, j; ++ ++ if (LCDTable > 0) ++ { ++ LCDPanelInfo = BIOSWord(LCDTable + 0x0AU); ++ if (((LCDPanelInfo + 0x1DU) > BIOSSize) || ++ ((BIOSByte(LCDPanelInfo) != pATI->LCDPanelID) && ++ (pATI->LCDPanelID || (BIOSByte(LCDPanelInfo) > 0x1FU) || ++ (pATI->Chip <= ATI_CHIP_264LTPRO)))) ++ LCDPanelInfo = 0; ++ } ++ ++ if (!LCDPanelInfo) ++ { ++ /* ++ * Scan BIOS for panel info table. ++ */ ++ for (i = 0; i <= (int)(BIOSSize - 0x1DU); i++) ++ { ++ /* Look for panel ID ... */ ++ if ((BIOSByte(i) != pATI->LCDPanelID) && ++ (pATI->LCDPanelID || (BIOSByte(i) > 0x1FU) || ++ (pATI->Chip <= ATI_CHIP_264LTPRO))) ++ continue; ++ ++ /* ... followed by 24-byte panel model name ... */ ++ for (j = 0; j < 24; j++) ++ { ++ if ((CARD8)(BIOSByte(i + j + 1) - 0x20U) > 0x5FU) ++ { ++ i += j; ++ goto NextBIOSByte; ++ } ++ } ++ ++ /* ... verify panel width ... */ ++ if (pATI->LCDHorizontal && ++ (pATI->LCDHorizontal != BIOSWord(i + 0x19U))) ++ continue; ++ ++ /* ... and verify panel height */ ++ if (pATI->LCDVertical && ++ (pATI->LCDVertical != BIOSWord(i + 0x1BU))) ++ continue; ++ ++ if (LCDPanelInfo) ++ { ++ /* ++ * More than one possibility, but don't care if all ++ * tables describe panels of the same size. ++ */ ++ if ((BIOSByte(LCDPanelInfo + 0x19U) == ++ BIOSByte(i + 0x19U)) && ++ (BIOSByte(LCDPanelInfo + 0x1AU) == ++ BIOSByte(i + 0x1AU)) && ++ (BIOSByte(LCDPanelInfo + 0x1BU) == ++ BIOSByte(i + 0x1BU)) && ++ (BIOSByte(LCDPanelInfo + 0x1CU) == ++ BIOSByte(i + 0x1CU))) ++ continue; ++ ++ LCDPanelInfo = 0; ++ break; ++ } ++ ++ LCDPanelInfo = i; ++ ++ NextBIOSByte: ; ++ } ++ } ++ ++ if (LCDPanelInfo > 0) ++ { ++ pATI->LCDPanelID = BIOSByte(LCDPanelInfo); ++ pATI->LCDHorizontal = BIOSWord(LCDPanelInfo + 0x19U); ++ pATI->LCDVertical = BIOSWord(LCDPanelInfo + 0x1BU); ++ } ++ ++ if (LCDPanelInfo) ++ { ++ for (i = 0; i < 24; i++) ++ Buffer[i] = BIOSByte(LCDPanelInfo + 1 + i); ++ for (; --i >= 0; ) ++ if (Buffer[i] && Buffer[i] != ' ') ++ { ++ Buffer[i + 1] = '\0'; ++ xf86DrvMsg(pScreenInfo->scrnIndex, X_PROBED, ++ "Panel model %s.\n", Buffer); ++ break; ++ } ++ } +} + /* * ATIPreInit -- * -@@ -136,15 +383,7 @@ ATIPreInit +@@ -136,18 +497,10 @@ ATIPreInit int flags ) { @@ -12316,8 +12807,12 @@ index 8114f51..8c67932 100644 - (BIOS[(_n) + 3] << 24))) unsigned int BIOSSize = 0; unsigned int ROMTable = 0, ClockTable = 0, FrequencyTable = 0; - unsigned int LCDTable = 0, LCDPanelInfo = 0, VideoTable = 0; -@@ -301,7 +540,7 @@ ATIPreInit +- unsigned int LCDTable = 0, LCDPanelInfo = 0, VideoTable = 0; ++ unsigned int LCDTable = 0, VideoTable = 0; + unsigned int HardwareTable = 0; + + char Buffer[128], *Message; +@@ -301,7 +654,7 @@ ATIPreInit * If there is an ix86-style BIOS, ensure its initialisation entry point * has been executed, and retrieve DDC and VBE information from it. */ @@ -12326,7 +12821,7 @@ index 8114f51..8c67932 100644 { xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING, "Unable to load int10 module.\n"); -@@ -313,13 +552,13 @@ ATIPreInit +@@ -313,13 +666,13 @@ ATIPreInit } else { @@ -12342,15 +12837,58 @@ index 8114f51..8c67932 100644 { xf86DrvMsg(pScreenInfo->scrnIndex, X_WARNING, "Unable to load vbe module.\n"); -@@ -419,7 +658,6 @@ ATIPreInit +@@ -415,11 +768,7 @@ ATIPreInit + #endif /* AVOID_CPIO */ - pATI->LCDPanelID = -1; + /* Finish private area initialisation */ +- pATI->DAC = ATI_DAC_GENERIC; +- +- pATI->LCDPanelID = -1; pATI->nFIFOEntries = 16; /* For now */ - pATI->Audio = ATI_AUDIO_NONE; /* Finish probing the adapter */ { -@@ -590,17 +828,7 @@ ATIPreInit +@@ -499,13 +848,20 @@ ATIPreInit + pATI->VideoRAM = (IOValue - 7) * 2048; + } + +- pATI->DAC = GetBits(inr(DAC_CNTL), DAC_TYPE); +- + IOValue = inr(CONFIG_STATUS64_0); + if (pATI->Chip >= ATI_CHIP_264CT) + { + pATI->MemoryType = GetBits(IOValue, CFG_MEM_TYPE_T); ++ } ++ else ++ { ++ pATI->MemoryType = GetBits(IOValue, CFG_MEM_TYPE); ++ } ++ ++ pATI->LCDPanelID = -1; + ++ if (pATI->Chip >= ATI_CHIP_264CT) ++ { + /* Get LCD panel id */ + if (pATI->Chip == ATI_CHIP_264LT) + { +@@ -573,10 +929,12 @@ ATIPreInit + pATI->OptionPanelDisplay = FALSE; + } + } +- else +- { +- pATI->MemoryType = GetBits(IOValue, CFG_MEM_TYPE); + ++ /* Get DAC type */ ++ pATI->DAC = GetBits(inr(DAC_CNTL), DAC_TYPE); ++ ++ if (pATI->Chip < ATI_CHIP_264CT) ++ { + /* Factor in what the BIOS says the DAC is */ + pATI->DAC = ATI_DAC(pATI->DAC, + GetBits(inr(SCRATCH_REG1), BIOS_INIT_DAC_SUBTYPE)); +@@ -590,17 +948,7 @@ ATIPreInit pATI->DAC += ATI_DAC_INTERNAL; } @@ -12368,7 +12906,17 @@ index 8114f51..8c67932 100644 ROMTable = BIOSWord(0x48U); if ((ROMTable < 0x0002U) || (BIOSWord(ROMTable - 0x02U) < 0x0012U) || -@@ -634,221 +862,9 @@ ATIPreInit +@@ -626,312 +974,23 @@ ATIPreInit + if (BIOSWord(ROMTable - 0x02U) >= 0x004AU) + { + HardwareTable = BIOSWord(ROMTable + 0x48U); +- if (((HardwareTable + 0x08U) <= BIOSSize) && +- !memcmp(BIOS + HardwareTable, "$ATI", 4)) +- pATI->I2CType = BIOSByte(HardwareTable + 0x06U) & 0x0FU; +- else ++ if (((HardwareTable + 0x08U) > BIOSSize) || ++ (memcmp(BIOS + HardwareTable, "$ATI", 4) != 0)) + HardwareTable = 0; } } @@ -12552,8 +13100,7 @@ index 8114f51..8c67932 100644 - { - case 0x00U: - pATI->Tuner = BIOSByte(VideoTable) & 0x1FU; -+ ati_bios_clock(pScreenInfo, pATI, BIOS, ClockTable, pGDev); - +- - /* - * XXX The VideoTable[1] byte is known to have been - * omitted in LTPro and Mobility BIOS'es. Any others? @@ -12583,17 +13130,134 @@ index 8114f51..8c67932 100644 - pATI->Audio = BIOSByte(VideoTable + 0x01U) & 0x0FU; - pATI->Decoder = BIOSByte(VideoTable + 0x05U) & 0x0FU; - break; -- ++ ati_bios_clock(pScreenInfo, pATI, BIOS, ClockTable, pGDev); + - default: - break; - } - } -+ ati_bios_mmedia(pScreenInfo, pATI, BIOS, VideoTable); ++ ati_bios_mmedia(pScreenInfo, pATI, BIOS, VideoTable, HardwareTable); - /* Determine panel dimensions */ +- /* Determine panel dimensions */ if (pATI->LCDPanelID >= 0) + { + LCDTable = BIOSWord(0x78U); + if ((LCDTable + BIOSByte(LCDTable + 5)) > BIOSSize) + LCDTable = 0; + +- if (LCDTable > 0) +- { +- LCDPanelInfo = BIOSWord(LCDTable + 0x0AU); +- if (((LCDPanelInfo + 0x1DU) > BIOSSize) || +- ((BIOSByte(LCDPanelInfo) != pATI->LCDPanelID) && +- (pATI->LCDPanelID || (BIOSByte(LCDPanelInfo) > 0x1FU) || +- (pATI->Chip <= ATI_CHIP_264LTPRO)))) +- LCDPanelInfo = 0; +- } +- +- if (!LCDPanelInfo) +- { +- /* +- * Scan BIOS for panel info table. +- */ +- for (i = 0; i <= (int)(BIOSSize - 0x1DU); i++) +- { +- /* Look for panel ID ... */ +- if ((BIOSByte(i) != pATI->LCDPanelID) && +- (pATI->LCDPanelID || (BIOSByte(i) > 0x1FU) || +- (pATI->Chip <= ATI_CHIP_264LTPRO))) +- continue; +- +- /* ... followed by 24-byte panel model name ... */ +- for (j = 0; j < 24; j++) +- { +- if ((CARD8)(BIOSByte(i + j + 1) - 0x20U) > 0x5FU) +- { +- i += j; +- goto NextBIOSByte; +- } +- } +- +- /* ... verify panel width ... */ +- if (pATI->LCDHorizontal && +- (pATI->LCDHorizontal != BIOSWord(i + 0x19U))) +- continue; +- +- /* ... and verify panel height */ +- if (pATI->LCDVertical && +- (pATI->LCDVertical != BIOSWord(i + 0x1BU))) +- continue; +- +- if (LCDPanelInfo) +- { +- /* +- * More than one possibility, but don't care if all +- * tables describe panels of the same size. +- */ +- if ((BIOSByte(LCDPanelInfo + 0x19U) == +- BIOSByte(i + 0x19U)) && +- (BIOSByte(LCDPanelInfo + 0x1AU) == +- BIOSByte(i + 0x1AU)) && +- (BIOSByte(LCDPanelInfo + 0x1BU) == +- BIOSByte(i + 0x1BU)) && +- (BIOSByte(LCDPanelInfo + 0x1CU) == +- BIOSByte(i + 0x1CU))) +- continue; +- +- LCDPanelInfo = 0; +- break; +- } +- +- LCDPanelInfo = i; +- +- NextBIOSByte: ; +- } +- } +- +- if (LCDPanelInfo > 0) +- { +- pATI->LCDPanelID = BIOSByte(LCDPanelInfo); +- pATI->LCDHorizontal = BIOSWord(LCDPanelInfo + 0x19U); +- pATI->LCDVertical = BIOSWord(LCDPanelInfo + 0x1BU); +- } ++ ati_bios_panel_info(pScreenInfo, pATI, BIOS, BIOSSize, LCDTable); + } + + xf86DrvMsgVerb(pScreenInfo->scrnIndex, X_INFO, 3, +@@ -941,8 +1000,8 @@ ATIPreInit + "BIOS Data: ClockTable=0x%04X, FrequencyTable=0x%04X.\n", + ClockTable, FrequencyTable); + xf86DrvMsgVerb(pScreenInfo->scrnIndex, X_INFO, 3, +- "BIOS Data: LCDTable=0x%04X, LCDPanelInfo=0x%04X.\n", +- LCDTable, LCDPanelInfo); ++ "BIOS Data: LCDTable=0x%04X.\n", ++ LCDTable); + xf86DrvMsgVerb(pScreenInfo->scrnIndex, X_INFO, 3, + "BIOS Data: VideoTable=0x%04X, HardwareTable=0x%04X.\n", + VideoTable, HardwareTable); +@@ -1703,20 +1762,6 @@ ATIPreInit + "%dx%d panel detected.\n", + pATI->LCDHorizontal, pATI->LCDVertical); + +- if (LCDPanelInfo) +- { +- for (i = 0; i < 24; i++) +- Buffer[i] = BIOSByte(LCDPanelInfo + 1 + i); +- for (; --i >= 0; ) +- if (Buffer[i] && Buffer[i] != ' ') +- { +- Buffer[i + 1] = '\0'; +- xf86DrvMsg(pScreenInfo->scrnIndex, X_PROBED, +- "Panel model %s.\n", Buffer); +- break; +- } +- } +- + /* + * Determine panel clock. This must be done after option + * processing so that the adapter's reference frequency is always diff --git a/src/atiprobe.c b/src/atiprobe.c -index 38ce90d..6636a7e 100644 +index 38ce90d..5092073 100644 --- a/src/atiprobe.c +++ b/src/atiprobe.c @@ -32,8 +32,8 @@ @@ -12642,7 +13306,33 @@ index 38ce90d..6636a7e 100644 ATIUnmapApertures(-1, pATI); return TRUE; } -@@ -398,7 +394,7 @@ ATIMach64ProbeIO +@@ -371,13 +367,12 @@ ATIMach64ProbeIO + ATIPtr pATI + ) + { +- Bool ProbeSuccess = FALSE; +- +-#ifndef AVOID_CPIO +- + /* Next, look for sparse I/O Mach64's */ + if (!PCI_REGION_SIZE(pVideo, 1)) + { ++ ++#ifndef AVOID_CPIO ++ + static const IOADDRESS Mach64SparseIOBases[] = { + 0x02ECU, + 0x01CCU, +@@ -390,7 +385,7 @@ ATIMach64ProbeIO + pciConfigPtr pPCI = pVideo->thisCard; + + if (pPCI == NULL) +- goto SkipSparse; ++ return FALSE; + #endif + + PCI_READ_LONG(pVideo, &PciReg, PCI_REG_USERCONFIG); +@@ -398,12 +393,19 @@ ATIMach64ProbeIO if (j == 0x03U) { @@ -12651,21 +13341,20 @@ index 38ce90d..6636a7e 100644 "PCI Mach64 in slot %d:%d:%d cannot be enabled\n" "because it has neither a block, nor a sparse, I/O base.\n", PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); -@@ -406,6 +402,13 @@ ATIMach64ProbeIO - goto SkipSparse; - } +- goto SkipSparse; ++ return FALSE; ++ } ++ + /* Possibly fix block I/O indicator */ + if (PciReg & 0x00000004U) + { + PciReg &= ~0x00000004U; + PCI_WRITE_LONG(pVideo, PciReg, PCI_REG_USERCONFIG); -+ } -+ + } + /* FIXME: - * Should not probe at sparse I/O bases which have been registered to - * other PCI devices. The old ATIProbe() would scan the PCI space and -@@ -418,7 +421,7 @@ ATIMach64ProbeIO +@@ -418,104 +420,56 @@ ATIMach64ProbeIO */ if (!pATI->OptionProbeSparse) { @@ -12674,72 +13363,122 @@ index 38ce90d..6636a7e 100644 "PCI Mach64 in slot %d:%d:%d will not be probed\n" "set option \"probe_sparse\" to force sparse I/O probing.\n", PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); -@@ -426,27 +429,20 @@ ATIMach64ProbeIO - goto SkipSparse; - } +- goto SkipSparse; +- } +- - /* Possibly fix block I/O indicator */ - if (PciReg & 0x00000004U) - { - PciReg &= ~0x00000004U; - PCI_WRITE_LONG(pVideo, PciReg, PCI_REG_USERCONFIG); -- } -- ++ return FALSE; + } + pATI->CPIOBase = Mach64SparseIOBases[j]; pATI->CPIODecoding = SPARSE_IO; pATI->PCIInfo = pVideo; - if (!ATIMach64Probe(pATI, pVideo, pATI->Chip)) - { +- if (!ATIMach64Probe(pATI, pVideo, pATI->Chip)) +- { - xf86Msg(X_WARNING, ATI_NAME ": " -+ xf86Msg(X_WARNING, MACH64_NAME ": " - "PCI Mach64 in slot %d:%d:%d could not be detected!\n", - PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); - } - else - { - ProbeSuccess = TRUE; +- "PCI Mach64 in slot %d:%d:%d could not be detected!\n", +- PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); +- } +- else +- { +- ProbeSuccess = TRUE; - xf86Msg(X_INFO, ATI_NAME ": " -+ xf86Msg(X_INFO, MACH64_NAME ": " - "Shared PCI Mach64 in slot %d:%d:%d with sparse PIO base" - " 0x%04lX detected.\n", - PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo), -@@ -471,7 +467,7 @@ SkipSparse: - if (ATIMach64Probe(pATI, pVideo, pATI->Chip)) - { - ProbeSuccess = TRUE; +- "Shared PCI Mach64 in slot %d:%d:%d with sparse PIO base" +- " 0x%04lX detected.\n", +- PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo), +- Mach64SparseIOBases[j]); +- +- if (pATI->VGAAdapter) +- ATIFindVGA(pVideo, pATI); +- } +- } +- +-SkipSparse: +- + #else /* AVOID_CPIO */ + +- if (!PCI_REGION_SIZE(pVideo, 1)) +- { + /* The adapter's CPIO base is of little concern here */ + pATI->CPIOBase = 0; + pATI->CPIODecoding = SPARSE_IO; + pATI->PCIInfo = pVideo; + +- if (ATIMach64Probe(pATI, pVideo, pATI->Chip)) +- { +- ProbeSuccess = TRUE; - xf86Msg(X_INFO, ATI_NAME ": " -+ xf86Msg(X_INFO, MACH64_NAME ": " - "Shared PCI Mach64 in slot %d:%d:%d with Block 0 base" - " 0x%08lX detected.\n", - PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo), -@@ -479,7 +475,7 @@ SkipSparse: - } - else - { +- "Shared PCI Mach64 in slot %d:%d:%d with Block 0 base" +- " 0x%08lX detected.\n", +- PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo), +- pATI->Block0Base); +- } +- else +- { - xf86Msg(X_WARNING, ATI_NAME ": " -+ xf86Msg(X_WARNING, MACH64_NAME ": " - "PCI Mach64 in slot %d:%d:%d could not be detected!\n", - PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); - } -@@ -497,7 +493,7 @@ SkipSparse: - if (ATIMach64Probe(pATI, pVideo, pATI->Chip)) - { - ProbeSuccess = TRUE; +- "PCI Mach64 in slot %d:%d:%d could not be detected!\n", +- PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); +- } +- } +- + #endif /* AVOID_CPIO */ + ++ } ++ + /* Lastly, look for block I/O devices */ + if (PCI_REGION_SIZE(pVideo, 1)) + { + pATI->CPIOBase = PCI_REGION_BASE(pVideo, 1, REGION_IO); + pATI->CPIODecoding = BLOCK_IO; + pATI->PCIInfo = pVideo; ++ } + +- if (ATIMach64Probe(pATI, pVideo, pATI->Chip)) +- { +- ProbeSuccess = TRUE; - xf86Msg(X_INFO, ATI_NAME ": " -+ xf86Msg(X_INFO, MACH64_NAME ": " - "Shared PCI/AGP Mach64 in slot %d:%d:%d detected.\n", - PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); +- "Shared PCI/AGP Mach64 in slot %d:%d:%d detected.\n", +- PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); ++ if (!ATIMach64Probe(pATI, pVideo, pATI->Chip)) ++ { ++ xf86Msg(X_WARNING, MACH64_NAME ": " ++ "Mach64 in slot %d:%d:%d could not be detected!\n", ++ PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); ++ ++ return FALSE; ++ } ++ ++ xf86Msg(X_INFO, MACH64_NAME ": " ++ "Mach64 in slot %d:%d:%d detected.\n", ++ PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); -@@ -511,7 +507,7 @@ SkipSparse: - } - else - { + #ifndef AVOID_CPIO + +- if (pATI->VGAAdapter) +- ATIFindVGA(pVideo, pATI); ++ if (pATI->VGAAdapter) ++ ATIFindVGA(pVideo, pATI); + + #endif /* AVOID_CPIO */ + +- } +- else +- { - xf86Msg(X_WARNING, ATI_NAME ": " -+ xf86Msg(X_WARNING, MACH64_NAME ": " - "PCI/AGP Mach64 in slot %d:%d:%d could not be detected!\n", - PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); - } +- "PCI/AGP Mach64 in slot %d:%d:%d could not be detected!\n", +- PCI_DEV_BUS(pVideo), PCI_DEV_DEV(pVideo), PCI_DEV_FUNC(pVideo)); +- } +- } +- +- return ProbeSuccess; ++ return TRUE; + } diff --git a/src/atistruct.h b/src/atistruct.h index d574947..b9f4d08 100644 --- a/src/atistruct.h @@ -13194,10 +13933,10 @@ index 0000000..bc2df18 + diff --git a/src/atombios_output.c b/src/atombios_output.c new file mode 100644 -index 0000000..6eb8776 +index 0000000..6c638b1 --- /dev/null +++ b/src/atombios_output.c -@@ -0,0 +1,693 @@ +@@ -0,0 +1,670 @@ +/* + * Copyright © 2007 Red Hat, Inc. + * Copyright 2007 Advanced Micro Devices, Inc. @@ -13627,29 +14366,6 @@ index 0000000..6eb8776 +atombios_output_dpms(xf86OutputPtr output, int mode) +{ + RADEONOutputPrivatePtr radeon_output = output->driver_private; -+ RADEONInfoPtr info = RADEONPTR(output->scrn); -+ unsigned char *RADEONMMIO = info->MMIO; -+ int tmp, count; -+ -+#if 1 -+ /* try to grab card lock or at least somethings that looks like a lock -+ * if it fails more than 5 times with 1000ms wait btw each try than we -+ * assume we can process. -+ */ -+ count = 0; -+ tmp = INREG(RADEON_BIOS_6_SCRATCH); -+ while((tmp & 0x100) && (count < 5)) { -+ tmp = INREG(RADEON_BIOS_6_SCRATCH); -+ count++; -+ usleep(1000); -+ } -+ if (count >= 5) { -+ xf86DrvMsg(output->scrn->scrnIndex, X_INFO, -+ "%s (WARNING) failed to grab card lock process anyway.\n", -+ __func__); -+ } -+ OUTREG(RADEON_BIOS_6_SCRATCH, tmp | 0x100); -+#endif + + ErrorF("AGD: output dpms %d\n", mode); + @@ -13674,16 +14390,13 @@ index 0000000..6eb8776 + ErrorF("AGD: cv dpms\n"); + if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT) + atombios_device_dpms(output, ATOM_DEVICE_CV_SUPPORT, mode); -+ } else if (0 /*OUTPUT_IS_TV*/) { ++ } else if (0 /*radeon_output->MonType == MT_STV || ++ radeon_output->MonType == MT_CTV*/) { + ErrorF("AGD: tv dpms\n"); + if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT) + atombios_device_dpms(output, ATOM_DEVICE_TV1_SUPPORT, mode); + } -+#if 1 -+ /* release card lock */ -+ tmp = INREG(RADEON_BIOS_6_SCRATCH); -+ OUTREG(RADEON_BIOS_6_SCRATCH, tmp & (~0x100)); -+#endif ++ +} + +static void @@ -13868,7 +14581,10 @@ index 0000000..6eb8776 + + ret = atom_bios_dac_load_detect(info->atomBIOS, output); + if (ret == ATOM_SUCCESS) { -+ bios_0_scratch = INREG(RADEON_BIOS_0_SCRATCH); ++ if (info->ChipFamily >= CHIP_FAMILY_R600) ++ bios_0_scratch = INREG(R600_BIOS_0_SCRATCH); ++ else ++ bios_0_scratch = INREG(RADEON_BIOS_0_SCRATCH); + ErrorF("DAC connect %08X\n", (unsigned int)bios_0_scratch); + + if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) { @@ -13893,10 +14609,10 @@ index 0000000..6eb8776 + diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c new file mode 100644 -index 0000000..53f0374 +index 0000000..06ad60c --- /dev/null +++ b/src/legacy_crtc.c -@@ -0,0 +1,1821 @@ +@@ -0,0 +1,1793 @@ +/* + * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and + * VA Linux Systems Inc., Fremont, California. @@ -14390,17 +15106,6 @@ index 0000000..53f0374 + save->grph2_buffer_cntl = INREG(RADEON_GRPH2_BUFFER_CNTL); +} + -+void -+RADEONSaveBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) -+{ -+ RADEONInfoPtr info = RADEONPTR(pScrn); -+ unsigned char *RADEONMMIO = info->MMIO; -+ -+ save->bios_4_scratch = INREG(RADEON_BIOS_4_SCRATCH); -+ save->bios_5_scratch = INREG(RADEON_BIOS_5_SCRATCH); -+ save->bios_6_scratch = INREG(RADEON_BIOS_6_SCRATCH); -+} -+ +/* Read CRTC registers */ +void +RADEONSaveCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) @@ -15203,18 +15908,6 @@ index 0000000..53f0374 +} + +static void -+RADEONInitBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) -+{ -+ RADEONInfoPtr info = RADEONPTR(pScrn); -+ -+ /* tell the bios not to muck with the hardware on events */ -+ save->bios_4_scratch = 0x4; /* 0x4 needed for backlight */ -+ save->bios_5_scratch = (info->SavedReg->bios_5_scratch & 0xff) | 0xff00; /* bits 0-3 keep backlight level */ -+ save->bios_6_scratch = info->SavedReg->bios_6_scratch | 0x40000000; -+ -+} -+ -+static void +radeon_update_tv_routing(ScrnInfoPtr pScrn, RADEONSavePtr restore) +{ + /* pixclks_cntl controls tv clock routing */ @@ -15614,8 +16307,6 @@ index 0000000..53f0374 + } + } + -+ if (info->IsMobility) -+ RADEONInitBIOSRegisters(pScrn, info->ModeReg); + + ErrorF("init memmap\n"); + RADEONInitMemMapRegisters(pScrn, info->ModeReg, info); @@ -15672,9 +16363,6 @@ index 0000000..53f0374 + } + } + -+ if (info->IsMobility) -+ RADEONRestoreBIOSRegisters(pScrn, info->ModeReg); -+ + ErrorF("restore memmap\n"); + RADEONRestoreMemMapRegisters(pScrn, info->ModeReg); + ErrorF("restore common\n"); @@ -15720,10 +16408,10 @@ index 0000000..53f0374 + diff --git a/src/legacy_output.c b/src/legacy_output.c new file mode 100644 -index 0000000..7ade772 +index 0000000..0de13df --- /dev/null +++ b/src/legacy_output.c -@@ -0,0 +1,1787 @@ +@@ -0,0 +1,1763 @@ +/* + * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and + * VA Linux Systems Inc., Fremont, California. @@ -15886,26 +16574,6 @@ index 0000000..7ade772 +} + +void -+RADEONRestoreBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore) -+{ -+ RADEONInfoPtr info = RADEONPTR(pScrn); -+ unsigned char *RADEONMMIO = info->MMIO; -+ CARD32 bios_5_scratch = INREG(RADEON_BIOS_5_SCRATCH); -+ CARD32 bios_6_scratch = INREG(RADEON_BIOS_6_SCRATCH); -+ -+ OUTREG(RADEON_BIOS_4_SCRATCH, restore->bios_4_scratch); -+ bios_5_scratch &= 0xF; -+ bios_5_scratch |= (restore->bios_5_scratch & ~0xF); -+ OUTREG(RADEON_BIOS_5_SCRATCH, bios_5_scratch); -+ if (restore->bios_6_scratch & 0x40000000) -+ bios_6_scratch |= 0x40000000; -+ else -+ bios_6_scratch &= ~0x40000000; -+ OUTREG(RADEON_BIOS_6_SCRATCH, bios_6_scratch); -+ -+} -+ -+void +RADEONSaveDACRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) +{ + RADEONInfoPtr info = RADEONPTR(pScrn); @@ -16764,6 +17432,8 @@ index 0000000..7ade772 + float Hratio, Vratio; + int hsync_wid; + int vsync_wid; ++ int hsync_start; ++ + + save->fp_vert_stretch = info->SavedReg->fp_vert_stretch & + RADEON_VERT_STRETCH_RESERVED; @@ -16780,15 +17450,38 @@ index 0000000..7ade772 + save->crtc_more_cntl |= RADEON_CRTC_H_CUTOFF_ACTIVE_EN; + } + ++ ++ save->fp_crtc_h_total_disp = ((((mode->CrtcHTotal / 8) - 1) & 0x3ff) ++ | ((((mode->CrtcHDisplay / 8) - 1) & 0x1ff) ++ << 16)); ++ ++ hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8; ++ if (!hsync_wid) hsync_wid = 1; ++ hsync_start = mode->CrtcHSyncStart - 8; ++ ++ save->fp_h_sync_strt_wid = ((hsync_start & 0x1fff) ++ | ((hsync_wid & 0x3f) << 16) ++ | ((mode->Flags & V_NHSYNC) ++ ? RADEON_CRTC_H_SYNC_POL ++ : 0)); ++ ++ save->fp_crtc_v_total_disp = (((mode->CrtcVTotal - 1) & 0xffff) ++ | ((mode->CrtcVDisplay - 1) << 16)); ++ ++ vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart; ++ if (!vsync_wid) vsync_wid = 1; ++ ++ save->fp_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff) ++ | ((vsync_wid & 0x1f) << 16) ++ | ((mode->Flags & V_NVSYNC) ++ ? RADEON_CRTC_V_SYNC_POL ++ : 0)); ++ ++ save->fp_horz_vert_active = 0; ++ + if (radeon_output->MonType != MT_LCD && radeon_output->MonType != MT_DFP) + return; + -+ if ((radeon_output->rmx_type == RMX_CENTER) && -+ (radeon_output->Flags & RADEON_USE_RMX)) { -+ save->crtc_more_cntl |= (RADEON_CRTC_AUTO_HORZ_CENTER_EN | -+ RADEON_CRTC_AUTO_VERT_CENTER_EN); -+ } -+ + if (radeon_output->PanelXRes == 0 || radeon_output->PanelYRes == 0) { + Hratio = 1.0; + Vratio = 1.0; @@ -16823,12 +17516,13 @@ index 0000000..7ade772 + ((radeon_output->PanelYRes-1)<<12)); + } + -+ -+ + if ((radeon_output->rmx_type == RMX_CENTER) && + (radeon_output->Flags & RADEON_USE_RMX)) { + int blank_width; + ++ save->crtc_more_cntl |= (RADEON_CRTC_AUTO_HORZ_CENTER_EN | ++ RADEON_CRTC_AUTO_VERT_CENTER_EN); ++ + blank_width = (mode->CrtcHBlankEnd - mode->CrtcHBlankStart) / 8; + if (blank_width > 110) blank_width = 110; + @@ -16860,36 +17554,6 @@ index 0000000..7ade772 + save->fp_horz_vert_active = (((radeon_output->PanelYRes) & 0xfff) | + (((radeon_output->PanelXRes / 8) & 0x1ff) << 16)); + -+ } else { -+ int hsync_start; -+ -+ save->fp_crtc_h_total_disp = ((((mode->CrtcHTotal / 8) - 1) & 0x3ff) -+ | ((((mode->CrtcHDisplay / 8) - 1) & 0x1ff) -+ << 16)); -+ -+ hsync_wid = (mode->CrtcHSyncEnd - mode->CrtcHSyncStart) / 8; -+ if (!hsync_wid) hsync_wid = 1; -+ hsync_start = mode->CrtcHSyncStart - 8; -+ -+ save->fp_h_sync_strt_wid = ((hsync_start & 0x1fff) -+ | ((hsync_wid & 0x3f) << 16) -+ | ((mode->Flags & V_NHSYNC) -+ ? RADEON_CRTC_H_SYNC_POL -+ : 0)); -+ -+ save->fp_crtc_v_total_disp = (((mode->CrtcVTotal - 1) & 0xffff) -+ | ((mode->CrtcVDisplay - 1) << 16)); -+ -+ vsync_wid = mode->CrtcVSyncEnd - mode->CrtcVSyncStart; -+ if (!vsync_wid) vsync_wid = 1; -+ -+ save->fp_v_sync_strt_wid = (((mode->CrtcVSyncStart - 1) & 0xfff) -+ | ((vsync_wid & 0x1f) << 16) -+ | ((mode->Flags & V_NVSYNC) -+ ? RADEON_CRTC_V_SYNC_POL -+ : 0)); -+ -+ save->fp_horz_vert_active = 0; + } +} + @@ -17699,6 +18363,55 @@ index f201cc4..5a2191a 100644 +"0x958C","RV630_958C","RV630",,,,,,"ATI FireGL V5600" +"0x958D","RV630_958D","RV630",,,,,,"ATI FireGL V3600" +"0x958E","RV630_958E","RV630",,,,,,"ATI ATI Radeon HD 2600 LE" +diff --git a/src/pcidb/parse_pci_ids.pl b/src/pcidb/parse_pci_ids.pl +index e6eac76..a3a8af8 100755 +--- a/src/pcidb/parse_pci_ids.pl ++++ b/src/pcidb/parse_pci_ids.pl +@@ -12,6 +12,7 @@ my $file = $ARGV[0]; + + my $atioutfile = 'ati_pciids_gen.h'; + my $radeonpcichipsetfile = 'radeon_pci_chipset_gen.h'; ++my $radeonpcidevicematchfile = 'radeon_pci_device_match_gen.h'; + my $radeonchipsetfile = 'radeon_chipset_gen.h'; + my $radeonchipinfofile = 'radeon_chipinfo_gen.h'; + +@@ -21,6 +22,7 @@ open (CSV, "<", $file) or die $!; + + open (ATIOUT, ">", $atioutfile) or die; + open (PCICHIPSET, ">", $radeonpcichipsetfile) or die; ++open (PCIDEVICEMATCH, ">", $radeonpcidevicematchfile) or die; + open (RADEONCHIPSET, ">", $radeonchipsetfile) or die; + open (RADEONCHIPINFO, ">", $radeonchipinfofile) or die; + +@@ -28,6 +30,8 @@ print RADEONCHIPSET "/* This file is autogenerated please do not edit */\n"; + print RADEONCHIPSET "static SymTabRec RADEONChipsets[] = {\n"; + print PCICHIPSET "/* This file is autogenerated please do not edit */\n"; + print PCICHIPSET "PciChipsets RADEONPciChipsets[] = {\n"; ++print PCIDEVICEMATCH "/* This file is autogenerated please do not edit */\n"; ++print PCIDEVICEMATCH "static const struct pci_id_match radeon_device_match[] = {\n"; + print RADEONCHIPINFO "/* This file is autogenerated please do not edit */\n"; + print RADEONCHIPINFO "RADEONCardInfo RADEONCards[] = {\n"; + while () { +@@ -41,6 +45,8 @@ while () { + if (($columns[2] ne "R128") && ($columns[2] ne "MACH64") && ($columns[2] ne "MACH32")) { + print PCICHIPSET " { PCI_CHIP_$columns[1], PCI_CHIP_$columns[1], RES_SHARED_VGA },\n"; + ++ print PCIDEVICEMATCH " ATI_DEVICE_MATCH( PCI_CHIP_$columns[1], 0 ),\n"; ++ + print RADEONCHIPSET " { PCI_CHIP_$columns[1], \"$columns[8]\" },\n"; + + print RADEONCHIPINFO " { $columns[0], CHIP_FAMILY_$columns[2], "; +@@ -87,8 +93,10 @@ while () { + print RADEONCHIPINFO "};\n"; + print RADEONCHIPSET " { -1, NULL }\n};\n"; + print PCICHIPSET " { -1, -1, RES_UNDEFINED }\n};\n"; ++print PCIDEVICEMATCH " { 0, 0, 0 }\n};\n"; + close CSV; + close ATIOUT; + close PCICHIPSET; ++close PCIDEVICEMATCH; + close RADEONCHIPSET; + close RADEONCHIPINFO; diff --git a/src/r128.h b/src/r128.h index dd1a670..1205245 100644 --- a/src/r128.h @@ -17723,6 +18436,66 @@ index dd1a670..1205245 100644 CARD32 MemCntl; CARD32 BusCntl; +diff --git a/src/r128_chipset.h b/src/r128_chipset.h +deleted file mode 100644 +index e896f76..0000000 +--- a/src/r128_chipset.h ++++ /dev/null +@@ -1,54 +0,0 @@ +-static SymTabRec R128Chipsets[] = { +- /* FIXME: The chipsets with (PCI/AGP) are not known wether they are AGP or +- * PCI, so I've labeled them as such in hopes users will submit +- * data if we're unable to gather it from official documentation +- */ +- { PCI_CHIP_RAGE128LE, "ATI Rage 128 Mobility M3 LE (PCI)" }, +- { PCI_CHIP_RAGE128LF, "ATI Rage 128 Mobility M3 LF (AGP)" }, +- { PCI_CHIP_RAGE128MF, "ATI Rage 128 Mobility M4 MF (AGP)" }, +- { PCI_CHIP_RAGE128ML, "ATI Rage 128 Mobility M4 ML (AGP)" }, +- { PCI_CHIP_RAGE128PA, "ATI Rage 128 Pro GL PA (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PB, "ATI Rage 128 Pro GL PB (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PC, "ATI Rage 128 Pro GL PC (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PD, "ATI Rage 128 Pro GL PD (PCI)" }, +- { PCI_CHIP_RAGE128PE, "ATI Rage 128 Pro GL PE (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PF, "ATI Rage 128 Pro GL PF (AGP)" }, +- { PCI_CHIP_RAGE128PG, "ATI Rage 128 Pro VR PG (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PH, "ATI Rage 128 Pro VR PH (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PI, "ATI Rage 128 Pro VR PI (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PJ, "ATI Rage 128 Pro VR PJ (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PK, "ATI Rage 128 Pro VR PK (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PL, "ATI Rage 128 Pro VR PL (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PM, "ATI Rage 128 Pro VR PM (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PN, "ATI Rage 128 Pro VR PN (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PO, "ATI Rage 128 Pro VR PO (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PP, "ATI Rage 128 Pro VR PP (PCI)" }, +- { PCI_CHIP_RAGE128PQ, "ATI Rage 128 Pro VR PQ (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PR, "ATI Rage 128 Pro VR PR (PCI)" }, +- { PCI_CHIP_RAGE128PS, "ATI Rage 128 Pro VR PS (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PT, "ATI Rage 128 Pro VR PT (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PU, "ATI Rage 128 Pro VR PU (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PV, "ATI Rage 128 Pro VR PV (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PW, "ATI Rage 128 Pro VR PW (PCI/AGP)" }, +- { PCI_CHIP_RAGE128PX, "ATI Rage 128 Pro VR PX (PCI/AGP)" }, +- { PCI_CHIP_RAGE128RE, "ATI Rage 128 GL RE (PCI)" }, +- { PCI_CHIP_RAGE128RF, "ATI Rage 128 GL RF (AGP)" }, +- { PCI_CHIP_RAGE128RG, "ATI Rage 128 RG (AGP)" }, +- { PCI_CHIP_RAGE128RK, "ATI Rage 128 VR RK (PCI)" }, +- { PCI_CHIP_RAGE128RL, "ATI Rage 128 VR RL (AGP)" }, +- { PCI_CHIP_RAGE128SE, "ATI Rage 128 4X SE (PCI/AGP)" }, +- { PCI_CHIP_RAGE128SF, "ATI Rage 128 4X SF (PCI/AGP)" }, +- { PCI_CHIP_RAGE128SG, "ATI Rage 128 4X SG (PCI/AGP)" }, +- { PCI_CHIP_RAGE128SH, "ATI Rage 128 4X SH (PCI/AGP)" }, +- { PCI_CHIP_RAGE128SK, "ATI Rage 128 4X SK (PCI/AGP)" }, +- { PCI_CHIP_RAGE128SL, "ATI Rage 128 4X SL (PCI/AGP)" }, +- { PCI_CHIP_RAGE128SM, "ATI Rage 128 4X SM (AGP)" }, +- { PCI_CHIP_RAGE128SN, "ATI Rage 128 4X SN (PCI/AGP)" }, +- { PCI_CHIP_RAGE128TF, "ATI Rage 128 Pro ULTRA TF (AGP)" }, +- { PCI_CHIP_RAGE128TL, "ATI Rage 128 Pro ULTRA TL (AGP)" }, +- { PCI_CHIP_RAGE128TR, "ATI Rage 128 Pro ULTRA TR (AGP)" }, +- { PCI_CHIP_RAGE128TS, "ATI Rage 128 Pro ULTRA TS (AGP?)" }, +- { PCI_CHIP_RAGE128TT, "ATI Rage 128 Pro ULTRA TT (AGP?)" }, +- { PCI_CHIP_RAGE128TU, "ATI Rage 128 Pro ULTRA TU (AGP?)" }, +- { -1, NULL } +-}; diff --git a/src/r128_cursor.c b/src/r128_cursor.c index 908ddb9..8321284 100644 --- a/src/r128_cursor.c @@ -17737,9 +18510,19 @@ index 908ddb9..8321284 100644 CARD32 save; diff --git a/src/r128_dri.c b/src/r128_dri.c -index edb77ba..da201e3 100644 +index edb77ba..2927718 100644 --- a/src/r128_dri.c +++ b/src/r128_dri.c +@@ -53,8 +53,8 @@ + + /* X and server generic header files */ + #include "xf86.h" ++#include "xf86PciInfo.h" + #include "windowstr.h" +-#include "atipciids.h" + + #include "shadowfb.h" + /* GLX/DRI/DRM definitions */ @@ -470,8 +470,8 @@ static Bool R128DRIAgpInit(R128InfoPtr info, ScreenPtr pScreen) xf86DrvMsg(pScreen->myNum, X_INFO, "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n", @@ -17778,10 +18561,28 @@ index edb77ba..da201e3 100644 pDRIInfo->ddxDriverMajorVersion = R128_VERSION_MAJOR; pDRIInfo->ddxDriverMinorVersion = R128_VERSION_MINOR; diff --git a/src/r128_driver.c b/src/r128_driver.c -index 6e26a6e..45917cd 100644 +index 6e26a6e..0e693e0 100644 --- a/src/r128_driver.c +++ b/src/r128_driver.c -@@ -194,186 +194,6 @@ R128RAMRec R128RAM[] = { /* Memory Specifications +@@ -86,6 +86,7 @@ + /* X and server generic header files */ + #include "xf86.h" + #include "xf86_OSproc.h" ++#include "xf86PciInfo.h" + #include "xf86RAC.h" + #include "xf86Resources.h" + #include "xf86cmap.h" +@@ -103,9 +104,6 @@ + #define DPMS_SERVER + #include + +-#include "atipciids.h" +-#include "r128_chipset.h" +- + #ifndef MAX + #define MAX(a,b) ((a)>(b)?(a):(b)) + #endif +@@ -194,186 +192,6 @@ R128RAMRec R128RAM[] = { /* Memory Specifications { 4, 4, 3, 3, 2, 3, 1, 16, 12, "64-bit DDR SGRAM" }, }; @@ -17968,7 +18769,7 @@ index 6e26a6e..45917cd 100644 int getR128EntityIndex(void) { int *r128_entity_index = LoaderSymbol("gR128EntityIndex"); -@@ -382,13 +202,6 @@ int getR128EntityIndex(void) +@@ -382,13 +200,6 @@ int getR128EntityIndex(void) else return *r128_entity_index; } @@ -17982,7 +18783,7 @@ index 6e26a6e..45917cd 100644 R128EntPtr R128EntPriv(ScrnInfoPtr pScrn) { -@@ -425,11 +238,26 @@ static Bool R128MapMMIO(ScrnInfoPtr pScrn) +@@ -425,11 +236,26 @@ static Bool R128MapMMIO(ScrnInfoPtr pScrn) if (info->FBDev) { info->MMIO = fbdevHWMapMMIO(pScrn); } else { @@ -18009,7 +18810,7 @@ index 6e26a6e..45917cd 100644 } if (!info->MMIO) return FALSE; -@@ -445,7 +273,11 @@ static Bool R128UnmapMMIO(ScrnInfoPtr pScrn) +@@ -445,7 +271,11 @@ static Bool R128UnmapMMIO(ScrnInfoPtr pScrn) if (info->FBDev) fbdevHWUnmapMMIO(pScrn); else { @@ -18021,7 +18822,7 @@ index 6e26a6e..45917cd 100644 } info->MMIO = NULL; return TRUE; -@@ -459,11 +291,27 @@ static Bool R128MapFB(ScrnInfoPtr pScrn) +@@ -459,11 +289,27 @@ static Bool R128MapFB(ScrnInfoPtr pScrn) if (info->FBDev) { info->FB = fbdevHWMapVidmem(pScrn); } else { @@ -18049,7 +18850,7 @@ index 6e26a6e..45917cd 100644 } if (!info->FB) return FALSE; -@@ -478,7 +326,11 @@ static Bool R128UnmapFB(ScrnInfoPtr pScrn) +@@ -478,7 +324,11 @@ static Bool R128UnmapFB(ScrnInfoPtr pScrn) if (info->FBDev) fbdevHWUnmapVidmem(pScrn); else @@ -18061,7 +18862,7 @@ index 6e26a6e..45917cd 100644 info->FB = NULL; return TRUE; } -@@ -639,7 +491,13 @@ static Bool R128GetBIOSParameters(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) +@@ -639,7 +489,13 @@ static Bool R128GetBIOSParameters(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) (info->VBIOS[(v) + 2] << 16) | \ (info->VBIOS[(v) + 3] << 24)) @@ -18076,7 +18877,7 @@ index 6e26a6e..45917cd 100644 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Cannot allocate space for hold Video BIOS!\n"); return FALSE; -@@ -650,6 +508,12 @@ static Bool R128GetBIOSParameters(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) +@@ -650,6 +506,12 @@ static Bool R128GetBIOSParameters(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) (void)memcpy(info->VBIOS, xf86int10Addr(pInt10, info->BIOSAddr), R128_VBIOS_SIZE); } else { @@ -18089,7 +18890,7 @@ index 6e26a6e..45917cd 100644 xf86ReadPciBIOS(0, info->PciTag, 0, info->VBIOS, R128_VBIOS_SIZE); if (info->VBIOS[0] != 0x55 || info->VBIOS[1] != 0xaa) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -@@ -659,6 +523,7 @@ static Bool R128GetBIOSParameters(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) +@@ -659,6 +521,7 @@ static Bool R128GetBIOSParameters(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) info->BIOSAddr = 0x000c0000; xf86ReadDomainMemory(info->PciTag, info->BIOSAddr, R128_VBIOS_SIZE, info->VBIOS); } @@ -18097,7 +18898,7 @@ index 6e26a6e..45917cd 100644 } if (info->VBIOS[0] != 0x55 || info->VBIOS[1] != 0xaa) { info->BIOSAddr = 0x00000000; -@@ -997,7 +862,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) +@@ -997,7 +860,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) info->Chipset = dev->chipID; from = X_CONFIG; } else { @@ -18106,7 +18907,7 @@ index 6e26a6e..45917cd 100644 } pScrn->chipset = (char *)xf86TokenToString(R128Chipsets, info->Chipset); -@@ -1021,7 +886,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) +@@ -1021,7 +884,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) /* Framebuffer */ from = X_PROBED; @@ -18115,7 +18916,7 @@ index 6e26a6e..45917cd 100644 pScrn->memPhysBase = info->LinearAddr; if (dev->MemBase) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, -@@ -1040,7 +905,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) +@@ -1040,7 +903,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) /* MMIO registers */ from = X_PROBED; @@ -18124,7 +18925,7 @@ index 6e26a6e..45917cd 100644 if (dev->IOBase) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "MMIO address override, using 0x%08lx instead of 0x%08lx\n", -@@ -1055,6 +920,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) +@@ -1055,6 +918,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) xf86DrvMsg(pScrn->scrnIndex, from, "MMIO registers at 0x%08lx\n", info->MMIOAddr); @@ -18132,7 +18933,7 @@ index 6e26a6e..45917cd 100644 /* BIOS */ from = X_PROBED; info->BIOSAddr = info->PciInfo->biosBase & 0xfffe0000; -@@ -1070,6 +936,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) +@@ -1070,6 +934,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) xf86DrvMsg(pScrn->scrnIndex, from, "BIOS at 0x%08lx\n", info->BIOSAddr); } @@ -18140,7 +18941,7 @@ index 6e26a6e..45917cd 100644 /* Flat panel (part 1) */ if (xf86GetOptValBool(info->Options, OPTION_PROG_FP_REGS, -@@ -1376,20 +1243,18 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) +@@ -1376,20 +1241,18 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) static Bool R128PreInitDDC(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) { @@ -18163,7 +18964,7 @@ index 6e26a6e..45917cd 100644 pVbe = VBEInit(pInt10,info->pEnt->index); if (!pVbe) return FALSE; xf86SetDDCproperties(pScrn,xf86PrintEDID(vbeDoEDID(pVbe,NULL))); -@@ -1444,9 +1309,7 @@ static Bool +@@ -1444,9 +1307,7 @@ static Bool R128I2cInit(ScrnInfoPtr pScrn) { R128InfoPtr info = R128PTR(pScrn); @@ -18174,7 +18975,7 @@ index 6e26a6e..45917cd 100644 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Failed to load i2c module\n"); return FALSE; -@@ -1866,7 +1729,6 @@ static Bool R128PreInitModes(ScrnInfoPtr pScrn) +@@ -1866,7 +1727,6 @@ static Bool R128PreInitModes(ScrnInfoPtr pScrn) /* Get ScreenInit function */ if (!xf86LoadSubModule(pScrn, "fb")) return FALSE; @@ -18182,7 +18983,7 @@ index 6e26a6e..45917cd 100644 info->CurrentLayout.displayWidth = pScrn->displayWidth; info->CurrentLayout.mode = pScrn->currentMode; -@@ -1881,7 +1743,6 @@ static Bool R128PreInitCursor(ScrnInfoPtr pScrn) +@@ -1881,7 +1741,6 @@ static Bool R128PreInitCursor(ScrnInfoPtr pScrn) if (!xf86ReturnOptValBool(info->Options, OPTION_SW_CURSOR, FALSE)) { if (!xf86LoadSubModule(pScrn, "ramdac")) return FALSE; @@ -18190,7 +18991,7 @@ index 6e26a6e..45917cd 100644 } return TRUE; } -@@ -1893,7 +1754,6 @@ static Bool R128PreInitAccel(ScrnInfoPtr pScrn) +@@ -1893,7 +1752,6 @@ static Bool R128PreInitAccel(ScrnInfoPtr pScrn) if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) { if (!xf86LoadSubModule(pScrn, "xaa")) return FALSE; @@ -18198,7 +18999,7 @@ index 6e26a6e..45917cd 100644 } return TRUE; } -@@ -1904,7 +1764,6 @@ static Bool R128PreInitInt10(ScrnInfoPtr pScrn, xf86Int10InfoPtr *ppInt10) +@@ -1904,7 +1762,6 @@ static Bool R128PreInitInt10(ScrnInfoPtr pScrn, xf86Int10InfoPtr *ppInt10) #if 1 && !defined(__alpha__) /* int10 is broken on some Alphas */ if (xf86LoadSubModule(pScrn, "int10")) { @@ -18206,7 +19007,7 @@ index 6e26a6e..45917cd 100644 xf86DrvMsg(pScrn->scrnIndex,X_INFO,"initializing int10\n"); *ppInt10 = xf86InitInt10(info->pEnt->index); } -@@ -2018,8 +1877,6 @@ static Bool R128PreInitDRI(ScrnInfoPtr pScrn) +@@ -2018,8 +1875,6 @@ static Bool R128PreInitDRI(ScrnInfoPtr pScrn) xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Couldn't load shadowfb module:\n"); } else { @@ -18215,7 +19016,7 @@ index 6e26a6e..45917cd 100644 info->allowPageFlip = xf86ReturnOptValBool(info->Options, OPTION_PAGE_FLIP, FALSE); -@@ -2101,15 +1958,15 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags) +@@ -2101,15 +1956,15 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags) } info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index); @@ -18237,7 +19038,7 @@ index 6e26a6e..45917cd 100644 if (xf86RegisterResources(info->pEnt->index, 0, ResNone)) goto fail; if (xf86SetOperatingState(resVga, info->pEnt->index, ResUnusedOpr)) goto fail; -@@ -2127,7 +1984,7 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags) +@@ -2127,7 +1982,7 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags) xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, info->Options); /* By default, don't do VGA IOs on ppc */ @@ -18246,7 +19047,7 @@ index 6e26a6e..45917cd 100644 info->VGAAccess = FALSE; #else info->VGAAccess = TRUE; -@@ -2139,7 +1996,6 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags) +@@ -2139,7 +1994,6 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags) if (!xf86LoadSubModule(pScrn, "vgahw")) info->VGAAccess = FALSE; else { @@ -18254,7 +19055,7 @@ index 6e26a6e..45917cd 100644 if (!vgaHWGetHWRec(pScrn)) info->VGAAccess = FALSE; } -@@ -2186,7 +2042,6 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags) +@@ -2186,7 +2040,6 @@ Bool R128PreInit(ScrnInfoPtr pScrn, int flags) if (info->FBDev) { /* check for linux framebuffer device */ if (!xf86LoadSubModule(pScrn, "fbdevhw")) return FALSE; @@ -18263,19 +19064,21 @@ index 6e26a6e..45917cd 100644 pScrn->SwitchMode = fbdevHWSwitchModeWeak(); pScrn->AdjustFrame = fbdevHWAdjustFrameWeak(); diff --git a/src/r128_misc.c b/src/r128_misc.c -index 5ace7d7..f8bccfe 100644 +index 5ace7d7..2dc6040 100644 --- a/src/r128_misc.c +++ b/src/r128_misc.c -@@ -24,8 +24,6 @@ +@@ -24,10 +24,6 @@ #include "config.h" #endif -#ifdef XFree86LOADER - - #include "ativersion.h" - +-#include "ativersion.h" +- #include "r128_probe.h" -@@ -67,11 +65,8 @@ R128Setup + #include "r128_version.h" + +@@ -67,13 +63,8 @@ R128Setup if (!Inited) { @@ -18284,22 +19087,161 @@ index 5ace7d7..f8bccfe 100644 - xf86LoadOneModule(ATI_DRIVER_NAME, Options); - - R128LoaderRefSymLists(); -+ if (xf86ServerIsOnlyDetecting() || !LoaderSymbol(ATI_NAME)) -+ xf86AddDriver(&R128, Module, 0); - +- Inited = TRUE; ++ xf86AddDriver(&R128, Module, HaveDriverFuncs); } -@@ -86,5 +81,3 @@ _X_EXPORT XF86ModuleData r128ModuleData = + + return (pointer)TRUE; +@@ -86,5 +77,3 @@ _X_EXPORT XF86ModuleData r128ModuleData = R128Setup, NULL }; - -#endif /* XFree86LOADER */ diff --git a/src/r128_probe.c b/src/r128_probe.c -index 0be21e8..5dd5cc9 100644 +index 0be21e8..1b07ebd 100644 --- a/src/r128_probe.c +++ b/src/r128_probe.c -@@ -106,7 +106,7 @@ PciChipsets R128PciChipsets[] = { +@@ -37,22 +37,72 @@ + * Authors: + * Rickard E. Faith + * Kevin E. Martin +- * +- * Modified by Marc Aurele La France for ATI driver merge. + */ + +-#include "ativersion.h" +- + #include "r128_probe.h" + #include "r128_version.h" +-#include "atipciids.h" ++#include "atipcirename.h" + + #include "xf86.h" ++#include "xf86PciInfo.h" + #include "xf86Resources.h" + +-#include "r128_chipset.h" ++#ifndef XSERVER_LIBPCIACCESS ++static Bool R128Probe(DriverPtr drv, int flags); ++#endif + +-PciChipsets R128PciChipsets[] = { ++SymTabRec R128Chipsets[] = { ++ { PCI_CHIP_RAGE128LE, "ATI Rage 128 Mobility M3 LE (PCI)" }, ++ { PCI_CHIP_RAGE128LF, "ATI Rage 128 Mobility M3 LF (AGP)" }, ++ { PCI_CHIP_RAGE128MF, "ATI Rage 128 Mobility M4 MF (AGP)" }, ++ { PCI_CHIP_RAGE128ML, "ATI Rage 128 Mobility M4 ML (AGP)" }, ++ { PCI_CHIP_RAGE128PA, "ATI Rage 128 Pro GL PA (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PB, "ATI Rage 128 Pro GL PB (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PC, "ATI Rage 128 Pro GL PC (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PD, "ATI Rage 128 Pro GL PD (PCI)" }, ++ { PCI_CHIP_RAGE128PE, "ATI Rage 128 Pro GL PE (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PF, "ATI Rage 128 Pro GL PF (AGP)" }, ++ { PCI_CHIP_RAGE128PG, "ATI Rage 128 Pro VR PG (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PH, "ATI Rage 128 Pro VR PH (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PI, "ATI Rage 128 Pro VR PI (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PJ, "ATI Rage 128 Pro VR PJ (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PK, "ATI Rage 128 Pro VR PK (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PL, "ATI Rage 128 Pro VR PL (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PM, "ATI Rage 128 Pro VR PM (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PN, "ATI Rage 128 Pro VR PN (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PO, "ATI Rage 128 Pro VR PO (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PP, "ATI Rage 128 Pro VR PP (PCI)" }, ++ { PCI_CHIP_RAGE128PQ, "ATI Rage 128 Pro VR PQ (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PR, "ATI Rage 128 Pro VR PR (PCI)" }, ++ { PCI_CHIP_RAGE128PS, "ATI Rage 128 Pro VR PS (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PT, "ATI Rage 128 Pro VR PT (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PU, "ATI Rage 128 Pro VR PU (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PV, "ATI Rage 128 Pro VR PV (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PW, "ATI Rage 128 Pro VR PW (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128PX, "ATI Rage 128 Pro VR PX (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128RE, "ATI Rage 128 GL RE (PCI)" }, ++ { PCI_CHIP_RAGE128RF, "ATI Rage 128 GL RF (AGP)" }, ++ { PCI_CHIP_RAGE128RG, "ATI Rage 128 RG (AGP)" }, ++ { PCI_CHIP_RAGE128RK, "ATI Rage 128 VR RK (PCI)" }, ++ { PCI_CHIP_RAGE128RL, "ATI Rage 128 VR RL (AGP)" }, ++ { PCI_CHIP_RAGE128SE, "ATI Rage 128 4X SE (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128SF, "ATI Rage 128 4X SF (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128SG, "ATI Rage 128 4X SG (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128SH, "ATI Rage 128 4X SH (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128SK, "ATI Rage 128 4X SK (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128SL, "ATI Rage 128 4X SL (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128SM, "ATI Rage 128 4X SM (AGP)" }, ++ { PCI_CHIP_RAGE128SN, "ATI Rage 128 4X SN (PCI/AGP)" }, ++ { PCI_CHIP_RAGE128TF, "ATI Rage 128 Pro ULTRA TF (AGP)" }, ++ { PCI_CHIP_RAGE128TL, "ATI Rage 128 Pro ULTRA TL (AGP)" }, ++ { PCI_CHIP_RAGE128TR, "ATI Rage 128 Pro ULTRA TR (AGP)" }, ++ { PCI_CHIP_RAGE128TS, "ATI Rage 128 Pro ULTRA TS (AGP?)" }, ++ { PCI_CHIP_RAGE128TT, "ATI Rage 128 Pro ULTRA TT (AGP?)" }, ++ { PCI_CHIP_RAGE128TU, "ATI Rage 128 Pro ULTRA TU (AGP?)" }, ++ { -1, NULL } ++}; ++ ++static PciChipsets R128PciChipsets[] = { + { PCI_CHIP_RAGE128LE, PCI_CHIP_RAGE128LE, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128LF, PCI_CHIP_RAGE128LF, RES_SHARED_VGA }, + { PCI_CHIP_RAGE128MF, PCI_CHIP_RAGE128MF, RES_SHARED_VGA }, +@@ -103,29 +153,72 @@ PciChipsets R128PciChipsets[] = { + { -1, -1, RES_UNDEFINED } + }; + ++#ifdef XSERVER_LIBPCIACCESS ++ ++static const struct pci_id_match r128_device_match[] = { ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128LE, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128LF, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128MF, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128ML, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PA, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PB, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PC, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PD, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PE, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PF, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PG, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PH, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PI, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PJ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PK, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PL, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PM, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PN, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PO, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PP, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PQ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PR, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PS, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PT, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PU, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PV, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PW, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128PX, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128RE, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128RF, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128RG, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128RK, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128RL, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SE, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SF, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SG, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SH, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SK, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SL, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SM, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128SN, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TF, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TL, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TR, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TS, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TT, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RAGE128TU, 0 ), ++ { 0, 0, 0 } ++}; ++ ++#endif /* XSERVER_LIBPCIACCESS */ ++ int gR128EntityIndex = -1; /* Return the options for supported chipset 'n'; NULL otherwise */ @@ -18307,8 +19249,20 @@ index 0be21e8..5dd5cc9 100644 +static const OptionInfoRec * R128AvailableOptions(int chipid, int busid) { - int i; -@@ -125,7 +125,7 @@ R128AvailableOptions(int chipid, int busid) +- int i; +- +- /* +- * Return options defined in the r128 submodule which will have been +- * loaded by this point. +- */ +- if ((chipid >> 16) == PCI_VENDOR_ATI) +- chipid -= PCI_VENDOR_ATI << 16; +- for (i = 0; R128PciChipsets[i].PCIid > 0; i++) { +- if (chipid == R128PciChipsets[i].PCIid) +- return R128OptionsWeak(); +- } +- return NULL; ++ return R128OptionsWeak(); } /* Return the string name for supported chipset 'n'; NULL otherwise. */ @@ -18317,32 +19271,242 @@ index 0be21e8..5dd5cc9 100644 R128Identify(int flags) { xf86PrintChipsets(R128_NAME, -@@ -134,7 +134,7 @@ R128Identify(int flags) +@@ -133,46 +226,97 @@ R128Identify(int flags) + R128Chipsets); } ++static Bool ++r128_get_scrninfo(int entity_num) ++{ ++ ScrnInfoPtr pScrn = NULL; ++ EntityInfoPtr pEnt; ++ ++ pScrn = xf86ConfigPciEntity(pScrn, 0, entity_num, R128PciChipsets, ++ NULL, ++ NULL, NULL, NULL, NULL); ++ ++ if (!pScrn) ++ return FALSE; ++ ++ pScrn->driverVersion = R128_VERSION_CURRENT; ++ pScrn->driverName = R128_DRIVER_NAME; ++ pScrn->name = R128_NAME; ++#ifdef XSERVER_LIBPCIACCESS ++ pScrn->Probe = NULL; ++#else ++ pScrn->Probe = R128Probe; ++#endif ++ pScrn->PreInit = R128PreInit; ++ pScrn->ScreenInit = R128ScreenInit; ++ pScrn->SwitchMode = R128SwitchMode; ++ pScrn->AdjustFrame = R128AdjustFrame; ++ pScrn->EnterVT = R128EnterVT; ++ pScrn->LeaveVT = R128LeaveVT; ++ pScrn->FreeScreen = R128FreeScreen; ++ pScrn->ValidMode = R128ValidMode; ++ ++ pEnt = xf86GetEntityInfo(entity_num); ++ ++ /* mobility cards support Dual-Head, mark the entity as sharable*/ ++ if (pEnt->chipset == PCI_CHIP_RAGE128LE || ++ pEnt->chipset == PCI_CHIP_RAGE128LF || ++ pEnt->chipset == PCI_CHIP_RAGE128MF || ++ pEnt->chipset == PCI_CHIP_RAGE128ML) ++ { ++ static int instance = 0; ++ DevUnion* pPriv; ++ ++ xf86SetEntitySharable(entity_num); ++ ++ xf86SetEntityInstanceForScreen(pScrn, ++ pScrn->entityList[0], ++ instance); ++ ++ if (gR128EntityIndex < 0) ++ { ++ gR128EntityIndex = xf86AllocateEntityPrivateIndex(); ++ ++ pPriv = xf86GetEntityPrivate(pScrn->entityList[0], ++ gR128EntityIndex); ++ ++ if (!pPriv->ptr) ++ { ++ R128EntPtr pR128Ent; ++ pPriv->ptr = xnfcalloc(sizeof(R128EntRec), 1); ++ pR128Ent = pPriv->ptr; ++ pR128Ent->IsDRIEnabled = FALSE; ++ pR128Ent->BypassSecondary = FALSE; ++ pR128Ent->HasSecondary = FALSE; ++ pR128Ent->IsSecondaryRestored = FALSE; ++ } ++ } ++ instance++; ++ } ++ ++ xfree(pEnt); ++ ++ return TRUE; ++} ++ ++#ifndef XSERVER_LIBPCIACCESS ++ /* Return TRUE if chipset is present; FALSE otherwise. */ -_X_EXPORT Bool +static Bool R128Probe(DriverPtr drv, int flags) { int numUsed; -@@ -253,3 +253,14 @@ R128Probe(DriverPtr drv, int flags) +- int numDevSections, nATIGDev, nR128GDev; ++ int numDevSections; + int *usedChips; +- GDevPtr *devSections, *ATIGDevs, *R128GDevs; ++ GDevPtr *devSections; + Bool foundScreen = FALSE; + int i; + +-#ifndef XSERVER_LIBPCIACCESS + if (!xf86GetPciVideoInfo()) return FALSE; +-#endif + +- /* Collect unclaimed device sections for both driver names */ +- nATIGDev = xf86MatchDevice(ATI_NAME, &ATIGDevs); +- nR128GDev = xf86MatchDevice(R128_NAME, &R128GDevs); +- +- if (!(numDevSections = nATIGDev + nR128GDev)) return FALSE; +- +- if (!ATIGDevs) { +- if (!(devSections = R128GDevs)) +- numDevSections = 1; +- else +- numDevSections = nR128GDev; +- } if (!R128GDevs) { +- devSections = ATIGDevs; +- numDevSections = nATIGDev; +- } else { +- /* Combine into one list */ +- devSections = xnfalloc((numDevSections + 1) * sizeof(GDevPtr)); +- (void)memcpy(devSections, +- ATIGDevs, nATIGDev * sizeof(GDevPtr)); +- (void)memcpy(devSections + nATIGDev, +- R128GDevs, nR128GDev * sizeof(GDevPtr)); +- devSections[numDevSections] = NULL; +- xfree(ATIGDevs); +- xfree(R128GDevs); +- } ++ numDevSections = xf86MatchDevice(R128_NAME, &devSections); ++ ++ if (!numDevSections) return FALSE; + + numUsed = xf86MatchPciInstances(R128_NAME, + PCI_VENDOR_ATI, +@@ -188,64 +332,8 @@ R128Probe(DriverPtr drv, int flags) + if (flags & PROBE_DETECT) + foundScreen = TRUE; + else for (i = 0; i < numUsed; i++) { +- ScrnInfoPtr pScrn; +- EntityInfoPtr pEnt; +- +- pScrn = NULL; +- if((pScrn = xf86ConfigPciEntity(pScrn, 0, usedChips[i], +- R128PciChipsets, NULL, NULL, NULL, NULL, NULL))) +- { +- pScrn->driverVersion = R128_VERSION_CURRENT; +- pScrn->driverName = R128_DRIVER_NAME; +- pScrn->name = R128_NAME; +- pScrn->Probe = R128Probe; +- pScrn->PreInit = R128PreInit; +- pScrn->ScreenInit = R128ScreenInit; +- pScrn->SwitchMode = R128SwitchMode; +- pScrn->AdjustFrame = R128AdjustFrame; +- pScrn->EnterVT = R128EnterVT; +- pScrn->LeaveVT = R128LeaveVT; +- pScrn->FreeScreen = R128FreeScreen; +- pScrn->ValidMode = R128ValidMode; +- +- foundScreen = TRUE; +- +- pEnt = xf86GetEntityInfo(usedChips[i]); +- +- /* mobility cards support Dual-Head, mark the entity as sharable*/ +- if(pEnt->chipset == PCI_CHIP_RAGE128LE || +- pEnt->chipset == PCI_CHIP_RAGE128LF || +- pEnt->chipset == PCI_CHIP_RAGE128MF || +- pEnt->chipset == PCI_CHIP_RAGE128ML) +- { +- static int instance = 0; +- DevUnion* pPriv; +- +- xf86SetEntitySharable(usedChips[i]); +- xf86SetEntityInstanceForScreen(pScrn, +- pScrn->entityList[0], instance); +- +- if(gR128EntityIndex < 0) +- { +- gR128EntityIndex = xf86AllocateEntityPrivateIndex(); +- pPriv = xf86GetEntityPrivate(pScrn->entityList[0], +- gR128EntityIndex); +- +- if (!pPriv->ptr) +- { +- R128EntPtr pR128Ent; +- pPriv->ptr = xnfcalloc(sizeof(R128EntRec), 1); +- pR128Ent = pPriv->ptr; +- pR128Ent->IsDRIEnabled = FALSE; +- pR128Ent->BypassSecondary = FALSE; +- pR128Ent->HasSecondary = FALSE; +- pR128Ent->IsSecondaryRestored = FALSE; +- } +- } +- instance++; +- } +- xfree(pEnt); +- } ++ if (r128_get_scrninfo(i)) ++ foundScreen = TRUE; + } + + xfree(usedChips); +@@ -253,3 +341,38 @@ R128Probe(DriverPtr drv, int flags) return foundScreen; } + ++#else /* XSERVER_LIBPCIACCESS */ ++ ++static Bool ++r128_pci_probe( ++ DriverPtr pDriver, ++ int entity_num, ++ struct pci_device *device, ++ intptr_t match_data ++) ++{ ++ return r128_get_scrninfo(entity_num); ++} ++ ++#endif /* XSERVER_LIBPCIACCESS */ ++ +_X_EXPORT DriverRec R128 = +{ + R128_VERSION_CURRENT, + R128_DRIVER_NAME, + R128Identify, ++#ifdef XSERVER_LIBPCIACCESS ++ NULL, ++#else + R128Probe, ++#endif + R128AvailableOptions, + NULL, -+ 0 ++ 0, ++ NULL, ++#ifdef XSERVER_LIBPCIACCESS ++ r128_device_match, ++ r128_pci_probe ++#endif +}; diff --git a/src/r128_probe.h b/src/r128_probe.h -index 180e52a..719340a 100644 +index 180e52a..59c9a00 100644 --- a/src/r128_probe.h +++ b/src/r128_probe.h @@ -38,6 +38,8 @@ @@ -18362,7 +19526,8 @@ index 180e52a..719340a 100644 -extern void R128Identify(int); -extern Bool R128Probe(DriverPtr, int); - - extern PciChipsets R128PciChipsets[]; +-extern PciChipsets R128PciChipsets[]; ++extern SymTabRec R128Chipsets[]; /* r128_driver.c */ -extern void R128LoaderRefSymLists(void); @@ -18417,7 +19582,7 @@ index 0f715aa..8e83323 100644 break; } diff --git a/src/radeon.h b/src/radeon.h -index 801d616..7950ac8 100644 +index 801d616..7d63f28 100644 --- a/src/radeon.h +++ b/src/radeon.h @@ -166,7 +166,8 @@ typedef enum { @@ -18744,7 +19909,16 @@ index 801d616..7950ac8 100644 extern Bool RADEONGetHardCodedEDIDFromBIOS (xf86OutputPtr output); extern void RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn, -@@ -974,32 +845,22 @@ extern void RADEONInitMemMapRegisters(ScrnInfoPtr pScrn, +@@ -958,8 +829,6 @@ extern void RADEONRestoreFP2Registers(ScrnInfoPtr pScrn, + RADEONSavePtr restore); + extern void RADEONRestoreLVDSRegisters(ScrnInfoPtr pScrn, + RADEONSavePtr restore); +-extern void RADEONRestoreBIOSRegisters(ScrnInfoPtr pScrn, +- RADEONSavePtr restore); + extern void RADEONRestoreRMXRegisters(ScrnInfoPtr pScrn, + RADEONSavePtr restore); + extern void RADEONRestorePLLRegisters(ScrnInfoPtr pScrn, +@@ -974,32 +843,22 @@ extern void RADEONInitMemMapRegisters(ScrnInfoPtr pScrn, RADEONInfoPtr info); extern void RADEONInitDispBandwidth(ScrnInfoPtr pScrn); extern Bool RADEONI2cInit(ScrnInfoPtr pScrn); @@ -18781,7 +19955,7 @@ index 801d616..7950ac8 100644 extern Bool RADEONDVOReadByte(I2CDevPtr dvo, int addr, CARD8 *ch); -@@ -1010,20 +871,25 @@ RADEONGetExtTMDSInfoFromBIOS (xf86OutputPtr output); +@@ -1010,20 +869,25 @@ RADEONGetExtTMDSInfoFromBIOS (xf86OutputPtr output); extern Bool RADEONInitExtTMDSInfoFromBIOS (xf86OutputPtr output); @@ -18815,7 +19989,7 @@ index 801d616..7950ac8 100644 extern void RADEONAdjustCrtcRegistersForTV(ScrnInfoPtr pScrn, RADEONSavePtr save, DisplayModePtr mode, xf86OutputPtr output); -@@ -1037,8 +903,10 @@ extern void RADEONInitTVRegisters(xf86OutputPtr output, RADEONSavePtr save, +@@ -1037,8 +901,10 @@ extern void RADEONInitTVRegisters(xf86OutputPtr output, RADEONSavePtr save, DisplayModePtr mode, BOOL IsPrimary); extern void RADEONRestoreTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore); @@ -19261,10 +20435,10 @@ index 212131f..e3b37c1 100644 } else if ((info->ChipFamily == CHIP_FAMILY_RV250) || diff --git a/src/radeon_atombios.c b/src/radeon_atombios.c new file mode 100644 -index 0000000..913fafb +index 0000000..81d908f --- /dev/null +++ b/src/radeon_atombios.c -@@ -0,0 +1,2842 @@ +@@ -0,0 +1,2845 @@ +/* + * Copyright 2007 Egbert Eich + * Copyright 2007 Luc Verhaegen @@ -20791,14 +21965,17 @@ index 0000000..913fafb + info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_LCD1_INDEX); + break; + case ENCODER_OBJECT_ID_INTERNAL_TMDS1: ++ case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: + info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_DFP1_INDEX); + info->BiosConnector[i].TMDSType = TMDS_INT; + break; + case ENCODER_OBJECT_ID_INTERNAL_TMDS2: ++ case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1: + info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_DFP2_INDEX); + info->BiosConnector[i].TMDSType = TMDS_EXT; + break; + case ENCODER_OBJECT_ID_INTERNAL_LVTM1: ++ case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: + info->BiosConnector[i].devices |= (1 << ATOM_DEVICE_DFP3_INDEX); + info->BiosConnector[i].TMDSType = TMDS_LVTMA; + break; @@ -23553,10 +24730,10 @@ index a1802f8..8c4b598 100644 (info->ChipFamily == CHIP_FAMILY_RV280) || (info->ChipFamily == CHIP_FAMILY_RS300) || diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c -index 07857dd..e1e4550 100644 +index 07857dd..3524b75 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c -@@ -53,57 +53,27 @@ +@@ -53,57 +53,44 @@ #include "sarea.h" #endif @@ -23577,13 +24754,18 @@ index 07857dd..e1e4550 100644 { - int mask; - ScrnInfoPtr pScrn = crtc->scrn; -- RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; ++ RADEONInfoPtr info = RADEONPTR(crtc->scrn); ++ RADEONEntPtr pRADEONEnt = RADEONEntPriv(crtc->scrn); + RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; - RADEONInfoPtr info = RADEONPTR(pScrn); - unsigned char *RADEONMMIO = info->MMIO; - - mask = radeon_crtc->crtc_id ? (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_REQ_EN_B) : (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS); -- -+ RADEONInfoPtr info = RADEONPTR(crtc->scrn); ++ xf86CrtcPtr crtc0 = pRADEONEnt->pCrtc[0]; + ++ if (IS_AVIVO_VARIANT) { ++ atombios_crtc_dpms(crtc, mode); ++ } else { - switch(mode) { - case DPMSModeOn: @@ -23608,7 +24790,13 @@ index 07857dd..e1e4550 100644 - } else { - OUTREGP(RADEON_CRTC_GEN_CNTL, 0, ~RADEON_CRTC_DISP_REQ_EN_B); - OUTREGP(RADEON_CRTC_EXT_CNTL, (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_VSYNC_DIS), ~mask); -- } ++ /* need to restore crtc1 before crtc0 or we may get a blank screen ++ * in some cases ++ */ ++ if ((radeon_crtc->crtc_id == 1) && (mode == DPMSModeOn)) { ++ if (crtc0->enabled) ++ legacy_crtc_dpms(crtc0, DPMSModeOff); + } - break; - case DPMSModeOff: - if (radeon_crtc->crtc_id) { @@ -23616,12 +24804,14 @@ index 07857dd..e1e4550 100644 - } else { - OUTREGP(RADEON_CRTC_GEN_CNTL, RADEON_CRTC_DISP_REQ_EN_B, ~RADEON_CRTC_DISP_REQ_EN_B); - OUTREGP(RADEON_CRTC_EXT_CNTL, mask, ~mask); -- } -- break; -+ if (IS_AVIVO_VARIANT) { -+ atombios_crtc_dpms(crtc, mode); -+ } else { ++ + legacy_crtc_dpms(crtc, mode); ++ ++ if ((radeon_crtc->crtc_id == 1) && (mode == DPMSModeOn)) { ++ if (crtc0->enabled) ++ legacy_crtc_dpms(crtc0, mode); + } +- break; } - - if (mode != DPMSModeOff) @@ -23629,7 +24819,7 @@ index 07857dd..e1e4550 100644 } static Bool -@@ -119,497 +89,12 @@ radeon_crtc_mode_prepare(xf86CrtcPtr crtc) +@@ -119,497 +106,12 @@ radeon_crtc_mode_prepare(xf86CrtcPtr crtc) radeon_crtc_dpms(crtc, DPMSModeOff); } @@ -24129,7 +25319,7 @@ index 07857dd..e1e4550 100644 RADEONComputePLL(RADEONPLLPtr pll, unsigned long freq, CARD32 *chosen_dot_clock_freq, -@@ -618,10 +103,6 @@ RADEONComputePLL(RADEONPLLPtr pll, +@@ -618,10 +120,6 @@ RADEONComputePLL(RADEONPLLPtr pll, CARD32 *chosen_post_div, int flags) { @@ -24140,7 +25330,7 @@ index 07857dd..e1e4550 100644 CARD32 min_ref_div = pll->min_ref_div; CARD32 max_ref_div = pll->max_ref_div; CARD32 best_vco = pll->best_vco; -@@ -631,23 +112,33 @@ RADEONComputePLL(RADEONPLLPtr pll, +@@ -631,23 +129,33 @@ RADEONComputePLL(RADEONPLLPtr pll, CARD32 best_freq = 1; CARD32 best_error = 0xffffffff; CARD32 best_vco_diff = 1; @@ -24179,7 +25369,7 @@ index 07857dd..e1e4550 100644 continue; for (ref_div = min_ref_div; ref_div <= max_ref_div; ++ref_div) { -@@ -657,21 +148,22 @@ RADEONComputePLL(RADEONPLLPtr pll, +@@ -657,21 +165,22 @@ RADEONComputePLL(RADEONPLLPtr pll, if (pll_in < pll->pll_in_min || pll_in > pll->pll_in_max) continue; @@ -24206,7 +25396,7 @@ index 07857dd..e1e4550 100644 (abs(error - best_error) < 100 && vco_diff < best_vco_diff )))) { best_post_div = post_div; best_ref_div = ref_div; -@@ -681,341 +173,34 @@ RADEONComputePLL(RADEONPLLPtr pll, +@@ -681,350 +190,58 @@ RADEONComputePLL(RADEONPLLPtr pll, best_vco_diff = vco_diff; } } @@ -24437,7 +25627,7 @@ index 07857dd..e1e4550 100644 - } -#endif - } -- + - for (i = 0; i < xf86_config->num_output; i++) { - xf86OutputPtr output = xf86_config->output[i]; - RADEONOutputPrivatePtr radeon_output = output->driver_private; @@ -24449,7 +25639,7 @@ index 07857dd..e1e4550 100644 - pll_flags |= (RADEON_PLL_USE_BIOS_DIVS | RADEON_PLL_USE_REF_DIV); - } - } - +- - if (info->IsMobility) - RADEONInitBIOSRegisters(pScrn, &info->ModeReg); - @@ -24559,7 +25749,22 @@ index 07857dd..e1e4550 100644 } static void -@@ -1024,7 +209,8 @@ radeon_crtc_mode_commit(xf86CrtcPtr crtc) + radeon_crtc_mode_commit(xf86CrtcPtr crtc) + { ++ RADEONInfoPtr info = RADEONPTR(crtc->scrn); ++ RADEONEntPtr pRADEONEnt = RADEONEntPriv(crtc->scrn); ++ RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; ++ ++ if (info->ChipFamily >= CHIP_FAMILY_R600) { ++ xf86CrtcPtr other; ++ if (radeon_crtc->crtc_id == 1) ++ other = pRADEONEnt->pCrtc[0]; ++ else ++ other = pRADEONEnt->pCrtc[1]; ++ if (other->enabled) ++ radeon_crtc_dpms(other, DPMSModeOn); ++ } ++ radeon_crtc_dpms(crtc, DPMSModeOn); } @@ -24569,7 +25774,7 @@ index 07857dd..e1e4550 100644 { ScrnInfoPtr pScrn = crtc->scrn; RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; -@@ -1035,8 +221,25 @@ void radeon_crtc_load_lut(xf86CrtcPtr crtc) +@@ -1035,8 +252,25 @@ void radeon_crtc_load_lut(xf86CrtcPtr crtc) if (!crtc->enabled) return; @@ -24595,7 +25800,7 @@ index 07857dd..e1e4550 100644 for (i = 0; i < 256; i++) { OUTPAL(i, radeon_crtc->lut_r[i], radeon_crtc->lut_g[i], radeon_crtc->lut_b[i]); } -@@ -1153,12 +356,13 @@ radeon_xf86AllocateOffscreenLinear(ScreenPtr pScreen, int length, +@@ -1153,12 +387,13 @@ radeon_xf86AllocateOffscreenLinear(ScreenPtr pScreen, int length, * Allocates memory for a locked-in-framebuffer shadow of the given * width and height for this CRTC's rotated shadow framebuffer. */ @@ -24611,7 +25816,7 @@ index 07857dd..e1e4550 100644 RADEONInfoPtr info = RADEONPTR(pScrn); RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; unsigned long rotate_pitch; -@@ -1229,7 +433,7 @@ radeon_crtc_shadow_create(xf86CrtcPtr crtc, void *data, int width, int height) +@@ -1229,7 +464,7 @@ radeon_crtc_shadow_create(xf86CrtcPtr crtc, void *data, int width, int height) if (!data) data = radeon_crtc_shadow_allocate(crtc, width, height); @@ -24620,7 +25825,7 @@ index 07857dd..e1e4550 100644 rotate_pitch = pScrn->displayWidth * cpp; rotate_pixmap = GetScratchPixmapHeader(pScrn->pScreen, -@@ -1295,40 +499,47 @@ static const xf86CrtcFuncsRec radeon_crtc_funcs = { +@@ -1295,40 +530,47 @@ static const xf86CrtcFuncsRec radeon_crtc_funcs = { .destroy = NULL, /* XXX */ }; @@ -24696,7 +25901,7 @@ index 07857dd..e1e4550 100644 return TRUE; } -@@ -1433,3 +644,47 @@ RADEONCrtcFindClosestMode(xf86CrtcPtr crtc, DisplayModePtr pMode) +@@ -1433,3 +675,47 @@ RADEONCrtcFindClosestMode(xf86CrtcPtr crtc, DisplayModePtr pMode) return pMode; } @@ -25876,10 +27081,18 @@ index 3190451..ac8d03c 100644 /* De-allocate vertex buffers */ diff --git a/src/radeon_driver.c b/src/radeon_driver.c -index 9f9fd90..cf32d40 100644 +index 9f9fd90..9c5fce6 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c -@@ -97,6 +97,7 @@ +@@ -74,6 +74,7 @@ + #include "radeon_macros.h" + #include "radeon_probe.h" + #include "radeon_version.h" ++#include "radeon_atombios.h" + + #ifdef XF86DRI + #define _XF86DRI_SERVER_ +@@ -97,6 +98,7 @@ #include "xf86cmap.h" #include "vbe.h" @@ -25887,7 +27100,7 @@ index 9f9fd90..cf32d40 100644 /* vgaHW definitions */ #ifdef WITH_VGAHW #include "vgaHW.h" -@@ -124,11 +125,36 @@ static void RADEONSaveMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save); +@@ -124,11 +126,34 @@ static void RADEONSaveMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save); static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save); #endif @@ -25900,8 +27113,6 @@ index 9f9fd90..cf32d40 100644 +extern void +RADEONSaveCommonRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save); +extern void -+RADEONSaveBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save); -+extern void +RADEONSaveCrtcRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save); +extern void +RADEONSaveCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save); @@ -25927,7 +27138,7 @@ index 9f9fd90..cf32d40 100644 static const OptionInfoRec RADEONOptions[] = { { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, -@@ -193,193 +219,12 @@ static const OptionInfoRec RADEONOptions[] = { +@@ -193,193 +218,12 @@ static const OptionInfoRec RADEONOptions[] = { { OPTION_TVDAC_LOAD_DETECT, "TVDACLoadDetect", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_FORCE_TVOUT, "ForceTVOut", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_TVSTD, "TVStandard", OPTV_STRING, {0}, FALSE }, @@ -26122,7 +27333,7 @@ index 9f9fd90..cf32d40 100644 static int getRADEONEntityIndex(void) { int *radeon_entity_index = LoaderSymbol("gRADEONEntityIndex"); -@@ -388,13 +233,6 @@ static int getRADEONEntityIndex(void) +@@ -388,13 +232,6 @@ static int getRADEONEntityIndex(void) else return *radeon_entity_index; } @@ -26136,7 +27347,7 @@ index 9f9fd90..cf32d40 100644 struct RADEONInt10Save { CARD32 MEM_CNTL; -@@ -405,23 +243,41 @@ struct RADEONInt10Save { +@@ -405,23 +242,41 @@ struct RADEONInt10Save { static Bool RADEONMapMMIO(ScrnInfoPtr pScrn); static Bool RADEONUnmapMMIO(ScrnInfoPtr pScrn); @@ -26183,7 +27394,7 @@ index 9f9fd90..cf32d40 100644 RADEONEntPtr RADEONEntPriv(ScrnInfoPtr pScrn) { -@@ -440,18 +296,20 @@ RADEONPreInt10Save(ScrnInfoPtr pScrn, void **pPtr) +@@ -440,18 +295,20 @@ RADEONPreInt10Save(ScrnInfoPtr pScrn, void **pPtr) CARD32 CardTmp; static struct RADEONInt10Save SaveStruct = { 0, 0, 0 }; @@ -26215,7 +27426,7 @@ index 9f9fd90..cf32d40 100644 *pPtr = (void *)&SaveStruct; } -@@ -468,6 +326,9 @@ RADEONPostInt10Check(ScrnInfoPtr pScrn, void *ptr) +@@ -468,6 +325,9 @@ RADEONPostInt10Check(ScrnInfoPtr pScrn, void *ptr) if (!pSave || !pSave->MEM_CNTL) return; @@ -26225,7 +27436,7 @@ index 9f9fd90..cf32d40 100644 /* * If either MEM_CNTL is currently zero or inconistent (configured for * two channels with the two channels configured differently), restore -@@ -718,6 +579,168 @@ void RADEONOUTPLL(ScrnInfoPtr pScrn, int addr, CARD32 data) +@@ -718,6 +578,168 @@ void RADEONOUTPLL(ScrnInfoPtr pScrn, int addr, CARD32 data) RADEONPllErrataAfterData(info); } @@ -26394,7 +27605,7 @@ index 9f9fd90..cf32d40 100644 #if 0 /* Read PAL information (only used for debugging) */ -@@ -979,7 +1002,7 @@ static Bool RADEONProbePLLParameters(ScrnInfoPtr pScrn) +@@ -979,7 +1001,7 @@ static Bool RADEONProbePLLParameters(ScrnInfoPtr pScrn) case 2: info->sclk = spll / 2.0; break; case 3: info->sclk = spll / 4.0; break; case 4: info->sclk = spll / 8.0; break; @@ -26403,7 +27614,7 @@ index 9f9fd90..cf32d40 100644 default: info->sclk = 200.00; xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unsupported SCLK source" -@@ -1000,7 +1023,6 @@ static Bool RADEONProbePLLParameters(ScrnInfoPtr pScrn) +@@ -1000,7 +1022,6 @@ static Bool RADEONProbePLLParameters(ScrnInfoPtr pScrn) static void RADEONGetClockInfo(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR (pScrn); @@ -26411,7 +27622,7 @@ index 9f9fd90..cf32d40 100644 RADEONPLLPtr pll = &info->pll; double min_dotclock; -@@ -1022,49 +1044,56 @@ static void RADEONGetClockInfo(ScrnInfoPtr pScrn) +@@ -1022,49 +1043,56 @@ static void RADEONGetClockInfo(ScrnInfoPtr pScrn) if (pll->reference_div < 2) pll->reference_div = 12; } @@ -26449,12 +27660,12 @@ index 9f9fd90..cf32d40 100644 - pll->reference_freq = 1432; - else - pll->reference_freq = 2700; -- -- pll->reference_div = 12; -- pll->xclk = 10300; + pll->reference_div = 12; + pll->xclk = 10300; +- pll->reference_div = 12; +- pll->xclk = 10300; +- - info->sclk = 200.00; - info->mclk = 200.00; + info->sclk = 200.00; @@ -26487,7 +27698,7 @@ index 9f9fd90..cf32d40 100644 pll->xclk); /* (Some?) Radeon BIOSes seem too lie about their minimum dot -@@ -1073,7 +1102,7 @@ static void RADEONGetClockInfo(ScrnInfoPtr pScrn) +@@ -1073,7 +1101,7 @@ static void RADEONGetClockInfo(ScrnInfoPtr pScrn) */ if (xf86GetOptValFreq(info->Options, OPTION_MIN_DOTCLOCK, OPTUNITS_MHZ, &min_dotclock)) { @@ -26496,7 +27707,7 @@ index 9f9fd90..cf32d40 100644 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Illegal minimum dotclock specified %.2f MHz " "(option ignored)\n", -@@ -1082,8 +1111,8 @@ static void RADEONGetClockInfo(ScrnInfoPtr pScrn) +@@ -1082,8 +1110,8 @@ static void RADEONGetClockInfo(ScrnInfoPtr pScrn) xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Forced minimum dotclock to %.2f MHz " "(instead of detected %.2f MHz)\n", @@ -26507,7 +27718,7 @@ index 9f9fd90..cf32d40 100644 } } } -@@ -1184,9 +1213,14 @@ void RADEONInitMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, +@@ -1184,9 +1212,14 @@ void RADEONInitMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, { save->mc_fb_location = info->mc_fb_location; save->mc_agp_location = info->mc_agp_location; @@ -26525,7 +27736,7 @@ index 9f9fd90..cf32d40 100644 } static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) -@@ -1196,17 +1230,22 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) +@@ -1196,17 +1229,22 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) CARD32 mem_size; CARD32 aper_size; @@ -26554,7 +27765,7 @@ index 9f9fd90..cf32d40 100644 /* Fix for RN50, M6, M7 with 8/16/32(??) MBs of VRAM - Novell bug 204882 + along with lots of ubuntu ones */ -@@ -1221,7 +1260,7 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) +@@ -1221,7 +1259,7 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) } #endif @@ -26563,7 +27774,7 @@ index 9f9fd90..cf32d40 100644 if (info->IsIGP) info->mc_fb_location = INREG(RADEON_NB_TOM); else -@@ -1233,7 +1272,13 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) +@@ -1233,7 +1271,13 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) else #endif { @@ -26578,7 +27789,7 @@ index 9f9fd90..cf32d40 100644 /* Recent chips have an "issue" with the memory controller, the * location must be aligned to the size. We just align it down, -@@ -1250,17 +1295,30 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) +@@ -1250,17 +1294,34 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn) info->ChipFamily == CHIP_FAMILY_RV410) aper0_base &= ~(mem_size - 1); @@ -26606,14 +27817,18 @@ index 9f9fd90..cf32d40 100644 - info->mc_agp_location = 0xffffffc0; + if (IS_AVIVO_VARIANT) { -+ OUTREG(AVIVO_HDP_FB_LOCATION, info->mc_fb_location); ++ if (info->ChipFamily >= CHIP_FAMILY_R600) { ++ OUTREG(R600_HDP_NONSURFACE_BASE, (info->mc_fb_location << 16) & 0xff0000); ++ } else { ++ OUTREG(AVIVO_HDP_FB_LOCATION, info->mc_fb_location); ++ } + info->mc_agp_location = 0x003f0000; + } else + info->mc_agp_location = 0xffffffc0; xf86DrvMsg(pScrn->scrnIndex, X_INFO, "RADEONInitMemoryMap() : \n"); xf86DrvMsg(pScrn->scrnIndex, X_INFO, -@@ -1322,9 +1380,14 @@ static CARD32 RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn) +@@ -1322,9 +1383,14 @@ static CARD32 RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; @@ -26629,7 +27844,7 @@ index 9f9fd90..cf32d40 100644 #ifdef XF86DRI /* If we use the DRI, we need to check if it's a version that has the * bug of always cropping MC_FB_LOCATION to one aperture, in which case -@@ -1352,7 +1415,8 @@ static CARD32 RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn) +@@ -1352,7 +1418,8 @@ static CARD32 RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn) info->ChipFamily == CHIP_FAMILY_RV350 || info->ChipFamily == CHIP_FAMILY_RV380 || info->ChipFamily == CHIP_FAMILY_R420 || @@ -26639,7 +27854,7 @@ index 9f9fd90..cf32d40 100644 OUTREGP (RADEON_HOST_PATH_CNTL, RADEON_HDP_APER_CNTL, ~RADEON_HDP_APER_CNTL); xf86DrvMsg(pScrn->scrnIndex, X_INFO, -@@ -1391,7 +1455,9 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) +@@ -1391,7 +1458,9 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) MessageType from = X_PROBED; CARD32 accessible, bar_size; @@ -26650,7 +27865,7 @@ index 9f9fd90..cf32d40 100644 CARD32 tom = INREG(RADEON_NB_TOM); pScrn->videoRam = (((tom >> 16) - -@@ -1399,13 +1465,18 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) +@@ -1399,13 +1468,18 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) OUTREG(RADEON_CONFIG_MEMSIZE, pScrn->videoRam * 1024); } else { @@ -26676,7 +27891,7 @@ index 9f9fd90..cf32d40 100644 } } -@@ -1425,7 +1496,8 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) +@@ -1425,7 +1499,8 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) if (pScrn->videoRam > accessible) pScrn->videoRam = accessible; @@ -26686,7 +27901,7 @@ index 9f9fd90..cf32d40 100644 info->BusCntl = INREG(RADEON_BUS_CNTL); RADEONGetVRamType(pScrn); -@@ -1442,6 +1514,21 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) +@@ -1442,6 +1517,21 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) xf86DrvMsg(pScrn->scrnIndex, from, "Mapped VideoRAM: %d kByte (%d bit %s SDRAM)\n", pScrn->videoRam, info->RamWidth, info->IsDDR?"DDR":"SDR"); @@ -26708,7 +27923,7 @@ index 9f9fd90..cf32d40 100644 pScrn->videoRam &= ~1023; info->FbMapSize = pScrn->videoRam * 1024; -@@ -1550,6 +1637,15 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) +@@ -1550,6 +1640,15 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) break; } @@ -26724,7 +27939,7 @@ index 9f9fd90..cf32d40 100644 from = X_PROBED; info->LinearAddr = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & ~0x1ffffffUL; -@@ -1705,6 +1801,13 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) +@@ -1705,6 +1804,13 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) info->Chipset != PCI_CHIP_RN50_5969); #endif @@ -26738,7 +27953,7 @@ index 9f9fd90..cf32d40 100644 return TRUE; } -@@ -1719,16 +1822,13 @@ static void RADEONPreInitDDC(ScrnInfoPtr pScrn) +@@ -1719,16 +1825,13 @@ static void RADEONPreInitDDC(ScrnInfoPtr pScrn) if (!xf86LoadSubModule(pScrn, "ddc")) { info->ddc2 = FALSE; } else { @@ -26756,7 +27971,7 @@ index 9f9fd90..cf32d40 100644 } } -@@ -1748,7 +1848,6 @@ static Bool RADEONPreInitCursor(ScrnInfoPtr pScrn) +@@ -1748,7 +1851,6 @@ static Bool RADEONPreInitCursor(ScrnInfoPtr pScrn) if (!xf86ReturnOptValBool(info->Options, OPTION_SW_CURSOR, FALSE)) { if (!xf86LoadSubModule(pScrn, "ramdac")) return FALSE; @@ -26764,7 +27979,7 @@ index 9f9fd90..cf32d40 100644 } return TRUE; } -@@ -1756,7 +1855,6 @@ static Bool RADEONPreInitCursor(ScrnInfoPtr pScrn) +@@ -1756,7 +1858,6 @@ static Bool RADEONPreInitCursor(ScrnInfoPtr pScrn) /* This is called by RADEONPreInit to initialize hardware acceleration */ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) { @@ -26772,7 +27987,7 @@ index 9f9fd90..cf32d40 100644 RADEONInfoPtr info = RADEONPTR(pScrn); MessageType from; #if defined(USE_EXA) && defined(USE_XAA) -@@ -1765,6 +1863,12 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) +@@ -1765,6 +1866,12 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) info->useEXA = FALSE; @@ -26785,7 +28000,7 @@ index 9f9fd90..cf32d40 100644 if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) { int errmaj = 0, errmin = 0; -@@ -1798,7 +1902,6 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) +@@ -1798,7 +1905,6 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) LoaderErrorMsg(NULL, "exa", errmaj, errmin); return FALSE; } @@ -26793,7 +28008,7 @@ index 9f9fd90..cf32d40 100644 } #endif /* USE_EXA */ #ifdef USE_XAA -@@ -1821,25 +1924,21 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) +@@ -1821,25 +1927,21 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) } } } @@ -26820,7 +28035,7 @@ index 9f9fd90..cf32d40 100644 /* The VGA BIOS on the RV100/QY cannot be read when the digital output * is enabled. Clear and restore FP2_ON around int10 to avoid this. */ -@@ -1877,19 +1976,32 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) +@@ -1877,19 +1979,32 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) info->pLibDRMVersion = NULL; info->pKernelDRMVersion = NULL; @@ -26856,7 +28071,7 @@ index 9f9fd90..cf32d40 100644 return FALSE; } } -@@ -2075,7 +2187,7 @@ static void RADEONPreInitColorTiling(ScrnInfoPtr pScrn) +@@ -2075,7 +2190,7 @@ static void RADEONPreInitColorTiling(ScrnInfoPtr pScrn) info->allowColorTiling = xf86ReturnOptValBool(info->Options, OPTION_COLOR_TILING, TRUE); @@ -26865,7 +28080,7 @@ index 9f9fd90..cf32d40 100644 /* this may be 4096 on r4xx -- need to double check */ info->MaxSurfaceWidth = 3968; /* one would have thought 4096...*/ info->MaxLines = 4096; -@@ -2087,6 +2199,13 @@ static void RADEONPreInitColorTiling(ScrnInfoPtr pScrn) +@@ -2087,6 +2202,13 @@ static void RADEONPreInitColorTiling(ScrnInfoPtr pScrn) if (!info->allowColorTiling) return; @@ -26879,7 +28094,7 @@ index 9f9fd90..cf32d40 100644 #ifdef XF86DRI if (info->directRenderingEnabled && info->pKernelDRMVersion->version_minor < 14) { -@@ -2307,12 +2426,39 @@ static void RADEONPreInitBIOS(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) +@@ -2307,12 +2429,39 @@ static void RADEONPreInitBIOS(ScrnInfoPtr pScrn, xf86Int10InfoPtr pInt10) #endif } @@ -26920,7 +28135,7 @@ index 9f9fd90..cf32d40 100644 return FALSE; RADEONGetClockInfo(pScrn); -@@ -2320,16 +2466,34 @@ static Bool RADEONPreInitControllers(ScrnInfoPtr pScrn) +@@ -2320,16 +2469,34 @@ static Bool RADEONPreInitControllers(ScrnInfoPtr pScrn) if (!RADEONSetupConnectors(pScrn)) { return FALSE; } @@ -26949,18 +28164,18 @@ index 9f9fd90..cf32d40 100644 + } + if (output->status != XF86OutputStatusDisconnected) + found++; - } ++ } + + if (!found) { + /* nothing connected, light up some defaults so the server comes up */ + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No connected devices found!\n"); + info->first_load_no_devices = TRUE; -+ } + } + ErrorF("finished all detect\n"); return TRUE; } -@@ -2358,7 +2522,7 @@ static const xf86CrtcConfigFuncsRec RADEONCRTCResizeFuncs = { +@@ -2358,7 +2525,7 @@ static const xf86CrtcConfigFuncsRec RADEONCRTCResizeFuncs = { RADEONCRTCResize }; @@ -26969,7 +28184,7 @@ index 9f9fd90..cf32d40 100644 { xf86CrtcConfigPtr xf86_config; RADEONInfoPtr info; -@@ -2366,6 +2530,8 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -2366,6 +2533,8 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) void *int10_save = NULL; const char *s; int crtc_max_X, crtc_max_Y; @@ -26978,7 +28193,7 @@ index 9f9fd90..cf32d40 100644 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONPreInit\n"); -@@ -2376,9 +2542,39 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -2376,9 +2545,39 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) info = RADEONPTR(pScrn); info->MMIO = NULL; @@ -27018,7 +28233,7 @@ index 9f9fd90..cf32d40 100644 info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index); info->PciTag = pciTag(PCI_DEV_BUS(info->PciInfo), PCI_DEV_DEV(info->PciInfo), -@@ -2460,8 +2656,8 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -2460,8 +2659,8 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) memcpy(info->Options, RADEONOptions, sizeof(RADEONOptions)); xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, info->Options); @@ -27029,7 +28244,7 @@ index 9f9fd90..cf32d40 100644 info->VGAAccess = FALSE; #else info->VGAAccess = TRUE; -@@ -2473,7 +2669,6 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -2473,7 +2672,6 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) if (!xf86LoadSubModule(pScrn, "vgahw")) info->VGAAccess = FALSE; else { @@ -27037,7 +28252,7 @@ index 9f9fd90..cf32d40 100644 if (!vgaHWGetHWRec(pScrn)) info->VGAAccess = FALSE; } -@@ -2545,7 +2740,7 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -2545,7 +2743,7 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) crtc_max_X = 1600; crtc_max_Y = 1200; } else { @@ -27046,7 +28261,7 @@ index 9f9fd90..cf32d40 100644 crtc_max_X = 2560; crtc_max_Y = 1200; } else { -@@ -2589,8 +2784,6 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -2589,8 +2787,6 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) /* Get ScreenInit function */ if (!xf86LoadSubModule(pScrn, "fb")) return FALSE; @@ -27055,7 +28270,7 @@ index 9f9fd90..cf32d40 100644 if (!RADEONPreInitGamma(pScrn)) goto fail; if (!RADEONPreInitCursor(pScrn)) goto fail; -@@ -2610,11 +2803,6 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -2610,11 +2806,6 @@ _X_EXPORT Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) goto fail; } @@ -27067,7 +28282,7 @@ index 9f9fd90..cf32d40 100644 /* Free int10 info */ if (pInt10) -@@ -2726,10 +2914,11 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors, +@@ -2726,10 +2917,11 @@ static void RADEONLoadPalette(ScrnInfoPtr pScrn, int numColors, /* Make the change through RandR */ #ifdef RANDR_12_INTERFACE @@ -27082,7 +28297,7 @@ index 9f9fd90..cf32d40 100644 } } -@@ -2762,343 +2951,6 @@ static void RADEONBlockHandler(int i, pointer blockData, +@@ -2762,343 +2954,6 @@ static void RADEONBlockHandler(int i, pointer blockData, #endif } @@ -27426,7 +28641,59 @@ index 9f9fd90..cf32d40 100644 static void RADEONPointerMoved(int index, int x, int y) { -@@ -3140,15 +2992,6 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3126,6 +2981,51 @@ RADEONPointerMoved(int index, int x, int y) + (*info->PointerMoved)(index, newX, newY); + } + ++static void ++RADEONInitBIOSRegisters(ScrnInfoPtr pScrn) ++{ ++ RADEONInfoPtr info = RADEONPTR(pScrn); ++ unsigned char *RADEONMMIO = info->MMIO; ++ RADEONSavePtr save = info->ModeReg; ++ ++ save->bios_0_scratch = info->SavedReg->bios_0_scratch; ++ save->bios_1_scratch = info->SavedReg->bios_1_scratch; ++ save->bios_2_scratch = info->SavedReg->bios_2_scratch; ++ save->bios_3_scratch = info->SavedReg->bios_3_scratch; ++ save->bios_4_scratch = info->SavedReg->bios_4_scratch; ++ save->bios_5_scratch = info->SavedReg->bios_5_scratch; ++ save->bios_6_scratch = info->SavedReg->bios_6_scratch; ++ save->bios_7_scratch = info->SavedReg->bios_7_scratch; ++ ++ if (info->IsAtomBios) { ++ /* let the bios control the backlight */ ++ save->bios_2_scratch &= ~ATOM_S2_VRI_BRIGHT_ENABLE; ++ /* tell the bios not to handle mode switching */ ++ save->bios_6_scratch |= ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH; ++ ++ if (info->ChipFamily >= CHIP_FAMILY_R600) { ++ OUTREG(R600_BIOS_2_SCRATCH, save->bios_2_scratch); ++ OUTREG(R600_BIOS_6_SCRATCH, save->bios_6_scratch); ++ } else { ++ OUTREG(RADEON_BIOS_2_SCRATCH, save->bios_2_scratch); ++ OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch); ++ } ++ } else { ++ /* let the bios control the backlight */ ++ save->bios_0_scratch &= ~RADEON_DRIVER_BRIGHTNESS_EN; ++ /* tell the bios not to handle mode switching */ ++ save->bios_6_scratch |= RADEON_DISPLAY_SWITCHING_DIS; ++ /* tell the bios a driver is loaded */ ++ save->bios_7_scratch |= RADEON_DRV_LOADED; ++ ++ OUTREG(RADEON_BIOS_0_SCRATCH, save->bios_0_scratch); ++ OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch); ++ //OUTREG(RADEON_BIOS_7_SCRATCH, save->bios_7_scratch); ++ } ++ ++} ++ ++ + /* Called at the start of each server generation. */ + Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, + int argc, char **argv) +@@ -3140,15 +3040,6 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, char* s; #endif @@ -27442,7 +28709,7 @@ index 9f9fd90..cf32d40 100644 info->accelOn = FALSE; #ifdef USE_XAA -@@ -3158,6 +3001,16 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3158,6 +3049,16 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, pScrn->fbOffset = info->frontOffset; #endif @@ -27459,11 +28726,14 @@ index 9f9fd90..cf32d40 100644 if (!RADEONMapMem(pScrn)) return FALSE; #ifdef XF86DRI -@@ -3172,9 +3025,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3172,9 +3073,13 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, RADEONSave(pScrn); - RADEONDisableDisplays(pScrn); ++ /* set initial bios scratch reg state */ ++ RADEONInitBIOSRegisters(pScrn); ++ + /* blank the outputs/crtcs */ + RADEONBlank(pScrn); @@ -27472,7 +28742,7 @@ index 9f9fd90..cf32d40 100644 if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) { RADEONSetDynamicClock(pScrn, 1); } else { -@@ -3373,13 +3227,32 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3373,13 +3278,32 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, #endif xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Initializing fb layer\n"); @@ -27511,7 +28781,7 @@ index 9f9fd90..cf32d40 100644 xf86SetBlackWhitePixels(pScreen); -@@ -3413,9 +3286,13 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3413,9 +3337,13 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, pScrn->vtSema = TRUE; @@ -27527,7 +28797,7 @@ index 9f9fd90..cf32d40 100644 /* Mark that we'll need to re-set the mode for sure */ memset(&crtc->mode, 0, sizeof(crtc->mode)); if (!crtc->desiredMode.CrtcHDisplay) { -@@ -3429,11 +3306,14 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3429,11 +3357,14 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, return FALSE; } @@ -27544,7 +28814,7 @@ index 9f9fd90..cf32d40 100644 /* Backing store setup */ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Initializing backing store\n"); -@@ -3465,7 +3345,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3465,7 +3396,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, * our local image to make sure we restore them properly on mode * changes or VT switches */ @@ -27553,7 +28823,7 @@ index 9f9fd90..cf32d40 100644 if ((info->DispPriority == 1) && (info->cardType==CARD_AGP)) { /* we need to re-calculate bandwidth because of AGPMode difference. */ -@@ -3491,6 +3371,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3491,6 +3422,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, RADEONChangeSurfaces(pScrn); @@ -27561,7 +28831,7 @@ index 9f9fd90..cf32d40 100644 /* Enable aceleration */ if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) { xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, -@@ -3553,9 +3434,17 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3553,9 +3485,17 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, RADEONDGAInit(pScreen); /* Init Xv */ @@ -27582,7 +28852,7 @@ index 9f9fd90..cf32d40 100644 /* Provide SaveScreen & wrap BlockHandler and CloseScreen */ /* Wrap CloseScreen */ -@@ -3564,6 +3453,8 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3564,6 +3504,8 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, pScreen->SaveScreen = RADEONSaveScreen; info->BlockHandler = pScreen->BlockHandler; pScreen->BlockHandler = RADEONBlockHandler; @@ -27591,7 +28861,7 @@ index 9f9fd90..cf32d40 100644 if (!xf86CrtcScreenInit (pScreen)) return FALSE; -@@ -3602,184 +3493,252 @@ void RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn, +@@ -3602,184 +3544,254 @@ void RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn, RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); unsigned char *RADEONMMIO = info->MMIO; int timeout; @@ -27711,8 +28981,7 @@ index 9f9fd90..cf32d40 100644 + usleep(2000000); + } + usleep(10); - } -- usleep(10); ++ } + + radeon_write_mc_fb_agp_location(pScrn, LOC_FB | LOC_AGP, + restore->mc_fb_location, @@ -27721,7 +28990,10 @@ index 9f9fd90..cf32d40 100644 + + if (info->ChipFamily < CHIP_FAMILY_R600) { + OUTREG(AVIVO_HDP_FB_LOCATION, restore->mc_fb_location); -+ } ++ } else { ++ OUTREG(R600_HDP_NONSURFACE_BASE, (restore->mc_fb_location << 16) & 0xff0000); + } +- usleep(10); + + /* Reset the engine and HDP */ + RADEONEngineReset(pScrn); @@ -27920,12 +29192,12 @@ index 9f9fd90..cf32d40 100644 RADEONInfoPtr info = RADEONPTR(pScrn); - unsigned char *RADEONMMIO = info->MMIO; - CARD32 fb, agp; +- +- fb = INREG(RADEON_MC_FB_LOCATION); +- agp = INREG(RADEON_MC_AGP_LOCATION); + CARD32 fb, agp, agp_hi; + int changed; -- fb = INREG(RADEON_MC_FB_LOCATION); -- agp = INREG(RADEON_MC_AGP_LOCATION); -- - if (fb != info->mc_fb_location || agp != info->mc_agp_location) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "DRI init changed memory map, adjusting ...\n"); @@ -27977,7 +29249,7 @@ index 9f9fd90..cf32d40 100644 } #ifdef USE_EXA -@@ -3806,817 +3765,6 @@ static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) +@@ -3806,817 +3818,6 @@ static void RADEONAdjustMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) } #endif @@ -28795,7 +30067,7 @@ index 9f9fd90..cf32d40 100644 /* restore original surface info (for fb console). */ static void RADEONRestoreSurfaces(ScrnInfoPtr pScrn, RADEONSavePtr restore) { -@@ -4680,7 +3828,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) +@@ -4680,7 +3881,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) #endif if (info->ChipFamily < CHIP_FAMILY_R200) { color_pattern = RADEON_SURF_TILE_COLOR_MACRO; @@ -28804,7 +30076,7 @@ index 9f9fd90..cf32d40 100644 color_pattern = R300_SURF_TILE_COLOR_MACRO; } else { color_pattern = R200_SURF_TILE_COLOR_MACRO; -@@ -4719,7 +3867,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) +@@ -4719,7 +3920,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) drmsurfalloc.flags = swap_pattern; if (info->tilingEnabled) { @@ -28813,7 +30085,7 @@ index 9f9fd90..cf32d40 100644 drmsurfalloc.flags |= (width_bytes / 8) | color_pattern; else drmsurfalloc.flags |= (width_bytes / 16) | color_pattern; -@@ -4744,7 +3892,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) +@@ -4744,7 +3945,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) depth_pattern = RADEON_SURF_TILE_DEPTH_16BPP; else depth_pattern = RADEON_SURF_TILE_DEPTH_32BPP; @@ -28822,7 +30094,7 @@ index 9f9fd90..cf32d40 100644 if (depthCpp == 2) depth_pattern = R300_SURF_TILE_COLOR_MACRO; else -@@ -4764,7 +3912,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) +@@ -4764,7 +3965,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) drmRadeonSurfaceAlloc drmsurfalloc; drmsurfalloc.size = depthBufferSize; drmsurfalloc.address = info->depthOffset; @@ -28831,7 +30103,7 @@ index 9f9fd90..cf32d40 100644 drmsurfalloc.flags = swap_pattern | (depth_width_bytes / 8) | depth_pattern; else drmsurfalloc.flags = swap_pattern | (depth_width_bytes / 16) | depth_pattern; -@@ -4782,7 +3930,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) +@@ -4782,7 +3983,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) unsigned char *RADEONMMIO = info->MMIO; /* we don't need anything like WaitForFifo, no? */ if (info->tilingEnabled) { @@ -28840,7 +30112,7 @@ index 9f9fd90..cf32d40 100644 surf_info |= (width_bytes / 8) | color_pattern; else surf_info |= (width_bytes / 16) | color_pattern; -@@ -4796,7 +3944,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) +@@ -4796,7 +3997,7 @@ void RADEONChangeSurfaces(ScrnInfoPtr pScrn) } /* Update surface images */ @@ -28849,7 +30121,7 @@ index 9f9fd90..cf32d40 100644 } /* Read memory map */ -@@ -4805,318 +3953,356 @@ static void RADEONSaveMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) +@@ -4805,318 +4006,410 @@ static void RADEONSaveMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; @@ -29139,7 +30411,7 @@ index 9f9fd90..cf32d40 100644 + state->lvtma_pwrseq_state = INREG(R500_LVTMA_PWRSEQ_STATE); } -} -- + -/* Read CRTC2 registers */ -static void RADEONSaveCrtc2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save) -{ @@ -29160,7 +30432,7 @@ index 9f9fd90..cf32d40 100644 - - save->fp_h2_sync_strt_wid = INREG (RADEON_FP_H2_SYNC_STRT_WID); - save->fp_v2_sync_strt_wid = INREG (RADEON_FP_V2_SYNC_STRT_WID); - +- - if (info->ChipFamily == CHIP_FAMILY_RS400) { - save->rs480_unk_e30 = INREG(RADEON_RS480_UNK_e30); - save->rs480_unk_e34 = INREG(RADEON_RS480_UNK_e34); @@ -29220,15 +30492,6 @@ index 9f9fd90..cf32d40 100644 - - if (save->h_code_timing[ i ] == 0 || save->h_code_timing[ i + 1 ] == 0) - break; -- } -- -- for (i = 0; i < MAX_V_CODE_TIMING_LEN; i += 2) { -- tmp = RADEONReadTVFIFO(pScrn, vTable++); -- save->v_code_timing[ i ] = (CARD16)(tmp & 0x3fff); -- save->v_code_timing[ i + 1 ] = (CARD16)((tmp >> 14) & 0x3fff); -- -- if (save->v_code_timing[ i ] == 0 || save->v_code_timing[ i + 1 ] == 0) -- break; + struct avivo_state *state = &restore->avivo; + + // OUTMC(pScrn, AVIVO_MC_MEMORY_MAP, state->mc_memory_map); @@ -29370,14 +30633,29 @@ index 9f9fd90..cf32d40 100644 + OUTREG(R500_LVTMA_PWRSEQ_CNTL, state->lvtma_pwrseq_cntl); + OUTREG(R500_LVTMA_PWRSEQ_STATE, state->lvtma_pwrseq_state); } --} + +- for (i = 0; i < MAX_V_CODE_TIMING_LEN; i += 2) { +- tmp = RADEONReadTVFIFO(pScrn, vTable++); +- save->v_code_timing[ i ] = (CARD16)(tmp & 0x3fff); +- save->v_code_timing[ i + 1 ] = (CARD16)((tmp >> 14) & 0x3fff); - +- if (save->v_code_timing[ i ] == 0 || save->v_code_timing[ i + 1 ] == 0) +- break; +- } ++ OUTREG(AVIVO_D1VGA_CONTROL, state->vga1_cntl); ++ OUTREG(AVIVO_D2VGA_CONTROL, state->vga2_cntl); + } + -/* read TV regs */ -static void RADEONSaveTVRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) -{ - RADEONInfoPtr info = RADEONPTR(pScrn); -- unsigned char *RADEONMMIO = info->MMIO; -- ++void avivo_restore_vga_regs(ScrnInfoPtr pScrn, RADEONSavePtr restore) ++{ ++ RADEONInfoPtr info = RADEONPTR(pScrn); + unsigned char *RADEONMMIO = info->MMIO; ++ struct avivo_state *state = &restore->avivo; + - ErrorF("Entering TV Save\n"); - - save->tv_crc_cntl = INREG(RADEON_TV_CRC_CNTL); @@ -29435,15 +30713,21 @@ index 9f9fd90..cf32d40 100644 - save->ppll_ref_div & RADEON_PPLL_REF_DIV_MASK, - save->ppll_div_3 & RADEON_PPLL_FB3_DIV_MASK, - (save->ppll_div_3 & RADEON_PPLL_POST3_DIV_MASK) >> 16); --} -- ++ OUTREG(AVIVO_D1VGA_CONTROL, state->vga1_cntl); ++ OUTREG(AVIVO_D2VGA_CONTROL, state->vga2_cntl); + } + -/* Read PLL registers */ -static void RADEONSavePLL2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save) --{ ++static void ++RADEONRestoreBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr restore) + { - save->p2pll_ref_div = INPLL(pScrn, RADEON_P2PLL_REF_DIV); - save->p2pll_div_0 = INPLL(pScrn, RADEON_P2PLL_DIV_0); - save->htotal_cntl2 = INPLL(pScrn, RADEON_HTOTAL2_CNTL); - save->pixclks_cntl = INPLL(pScrn, RADEON_PIXCLKS_CNTL); ++ RADEONInfoPtr info = RADEONPTR(pScrn); ++ unsigned char *RADEONMMIO = info->MMIO; - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, - "Read: 0x%08x 0x%08x 0x%08x\n", @@ -29456,21 +30740,36 @@ index 9f9fd90..cf32d40 100644 - (unsigned)(save->p2pll_div_0 & RADEON_P2PLL_FB0_DIV_MASK), - (unsigned)((save->p2pll_div_0 & RADEON_P2PLL_POST0_DIV_MASK) - >> 16)); -+ OUTREG(AVIVO_D1VGA_CONTROL, state->vga1_cntl); -+ OUTREG(AVIVO_D2VGA_CONTROL, state->vga2_cntl); ++ if (info->ChipFamily >= CHIP_FAMILY_R600) { ++ OUTREG(R600_BIOS_0_SCRATCH, restore->bios_0_scratch); ++ OUTREG(R600_BIOS_1_SCRATCH, restore->bios_1_scratch); ++ OUTREG(R600_BIOS_2_SCRATCH, restore->bios_2_scratch); ++ OUTREG(R600_BIOS_3_SCRATCH, restore->bios_3_scratch); ++ OUTREG(R600_BIOS_4_SCRATCH, restore->bios_4_scratch); ++ OUTREG(R600_BIOS_5_SCRATCH, restore->bios_5_scratch); ++ OUTREG(R600_BIOS_6_SCRATCH, restore->bios_6_scratch); ++ OUTREG(R600_BIOS_7_SCRATCH, restore->bios_7_scratch); ++ } else { ++ OUTREG(RADEON_BIOS_0_SCRATCH, restore->bios_0_scratch); ++ OUTREG(RADEON_BIOS_1_SCRATCH, restore->bios_1_scratch); ++ OUTREG(RADEON_BIOS_2_SCRATCH, restore->bios_2_scratch); ++ OUTREG(RADEON_BIOS_3_SCRATCH, restore->bios_3_scratch); ++ OUTREG(RADEON_BIOS_4_SCRATCH, restore->bios_4_scratch); ++ OUTREG(RADEON_BIOS_5_SCRATCH, restore->bios_5_scratch); ++ OUTREG(RADEON_BIOS_6_SCRATCH, restore->bios_6_scratch); ++ OUTREG(RADEON_BIOS_7_SCRATCH, restore->bios_7_scratch); ++ } } -#if 0 -/* Read palette data */ -static void RADEONSavePalette(ScrnInfoPtr pScrn, RADEONSavePtr save) --{ -- RADEONInfoPtr info = RADEONPTR(pScrn); -+void avivo_restore_vga_regs(ScrnInfoPtr pScrn, RADEONSavePtr restore) -+{ -+ RADEONInfoPtr info = RADEONPTR(pScrn); ++static void ++RADEONSaveBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) + { + RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; - int i; -+ struct avivo_state *state = &restore->avivo; -#ifdef ENABLE_FLAT_PANEL - /* Select palette 0 (main CRTC) if using FP-enabled chip */ @@ -29483,14 +30782,31 @@ index 9f9fd90..cf32d40 100644 - INPAL_START(0); - for (i = 0; i < 256; i++) save->palette[i] = INPAL_NEXT(); - save->palette_valid = TRUE; -+ OUTREG(AVIVO_D1VGA_CONTROL, state->vga1_cntl); -+ OUTREG(AVIVO_D2VGA_CONTROL, state->vga2_cntl); ++ if (info->ChipFamily >= CHIP_FAMILY_R600) { ++ save->bios_0_scratch = INREG(R600_BIOS_0_SCRATCH); ++ save->bios_1_scratch = INREG(R600_BIOS_1_SCRATCH); ++ save->bios_2_scratch = INREG(R600_BIOS_2_SCRATCH); ++ save->bios_3_scratch = INREG(R600_BIOS_3_SCRATCH); ++ save->bios_4_scratch = INREG(R600_BIOS_4_SCRATCH); ++ save->bios_5_scratch = INREG(R600_BIOS_5_SCRATCH); ++ save->bios_6_scratch = INREG(R600_BIOS_6_SCRATCH); ++ save->bios_7_scratch = INREG(R600_BIOS_7_SCRATCH); ++ } else { ++ save->bios_0_scratch = INREG(RADEON_BIOS_0_SCRATCH); ++ save->bios_1_scratch = INREG(RADEON_BIOS_1_SCRATCH); ++ save->bios_2_scratch = INREG(RADEON_BIOS_2_SCRATCH); ++ save->bios_3_scratch = INREG(RADEON_BIOS_3_SCRATCH); ++ save->bios_4_scratch = INREG(RADEON_BIOS_4_SCRATCH); ++ save->bios_5_scratch = INREG(RADEON_BIOS_5_SCRATCH); ++ save->bios_6_scratch = INREG(RADEON_BIOS_6_SCRATCH); ++ save->bios_7_scratch = INREG(RADEON_BIOS_7_SCRATCH); ++ } } -#endif /* Save everything needed to restore the original VC state */ static void RADEONSave(ScrnInfoPtr pScrn) -@@ -5124,7 +4310,7 @@ static void RADEONSave(ScrnInfoPtr pScrn) +@@ -5124,7 +4417,7 @@ static void RADEONSave(ScrnInfoPtr pScrn) RADEONInfoPtr info = RADEONPTR(pScrn); RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); unsigned char *RADEONMMIO = info->MMIO; @@ -29499,7 +30815,7 @@ index 9f9fd90..cf32d40 100644 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONSave\n"); -@@ -5148,26 +4334,33 @@ static void RADEONSave(ScrnInfoPtr pScrn) +@@ -5148,26 +4441,33 @@ static void RADEONSave(ScrnInfoPtr pScrn) vgaHWLock(hwp); } #endif @@ -29518,11 +30834,6 @@ index 9f9fd90..cf32d40 100644 - if (pRADEONEnt->HasCRTC2) { - RADEONSaveCrtc2Registers(pScrn, save); - RADEONSavePLL2Registers(pScrn, save); -- } -- if (info->InternalTVOut) -- RADEONSaveTVRegisters(pScrn, save); -- -- RADEONSaveSurfaces(pScrn, save); + if (IS_AVIVO_VARIANT) { + RADEONSaveMemMapRegisters(pScrn, save); + avivo_save(pScrn, save); @@ -29537,7 +30848,6 @@ index 9f9fd90..cf32d40 100644 + RADEONSavePLLRegisters(pScrn, save); + RADEONSaveCrtcRegisters(pScrn, save); + RADEONSaveFPRegisters(pScrn, save); -+ RADEONSaveBIOSRegisters(pScrn, save); + RADEONSaveDACRegisters(pScrn, save); + if (pRADEONEnt->HasCRTC2) { + RADEONSaveCrtc2Registers(pScrn, save); @@ -29545,14 +30855,17 @@ index 9f9fd90..cf32d40 100644 + } + if (info->InternalTVOut) + RADEONSaveTVRegisters(pScrn, save); -+ } -+ -+ RADEONSaveSurfaces(pScrn, save); + } +- if (info->InternalTVOut) +- RADEONSaveTVRegisters(pScrn, save); + ++ RADEONSaveBIOSRegisters(pScrn, save); + RADEONSaveSurfaces(pScrn, save); + } /* Restore the original (text) mode */ -@@ -5176,7 +4369,7 @@ void RADEONRestore(ScrnInfoPtr pScrn) +@@ -5176,7 +4476,7 @@ void RADEONRestore(ScrnInfoPtr pScrn) RADEONInfoPtr info = RADEONPTR(pScrn); RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); unsigned char *RADEONMMIO = info->MMIO; @@ -29561,7 +30874,7 @@ index 9f9fd90..cf32d40 100644 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); xf86CrtcPtr crtc; -@@ -5190,33 +4383,40 @@ void RADEONRestore(ScrnInfoPtr pScrn) +@@ -5190,33 +4490,40 @@ void RADEONRestore(ScrnInfoPtr pScrn) RADEONBlank(pScrn); @@ -29571,6 +30884,14 @@ index 9f9fd90..cf32d40 100644 - OUTREG(RADEON_DP_DATATYPE, restore->dp_datatype); - OUTREG(RADEON_GRPH_BUFFER_CNTL, restore->grph_buffer_cntl); - OUTREG(RADEON_GRPH2_BUFFER_CNTL, restore->grph2_buffer_cntl); +- +- RADEONRestoreMemMapRegisters(pScrn, restore); +- RADEONRestoreCommonRegisters(pScrn, restore); +- +- if (pRADEONEnt->HasCRTC2) { +- RADEONRestoreCrtc2Registers(pScrn, restore); +- RADEONRestorePLL2Registers(pScrn, restore); +- } + if (IS_AVIVO_VARIANT) { + RADEONRestoreMemMapRegisters(pScrn, restore); + avivo_restore(pScrn, restore); @@ -29581,21 +30902,15 @@ index 9f9fd90..cf32d40 100644 + OUTREG(RADEON_DP_DATATYPE, restore->dp_datatype); + OUTREG(RADEON_GRPH_BUFFER_CNTL, restore->grph_buffer_cntl); + OUTREG(RADEON_GRPH2_BUFFER_CNTL, restore->grph2_buffer_cntl); - -- RADEONRestoreMemMapRegisters(pScrn, restore); -- RADEONRestoreCommonRegisters(pScrn, restore); -+ if (!info->IsSecondary) { -+ RADEONRestoreMemMapRegisters(pScrn, restore); -+ RADEONRestoreCommonRegisters(pScrn, restore); - -- if (pRADEONEnt->HasCRTC2) { -- RADEONRestoreCrtc2Registers(pScrn, restore); -- RADEONRestorePLL2Registers(pScrn, restore); -- } -+ if (pRADEONEnt->HasCRTC2) { -+ RADEONRestoreCrtc2Registers(pScrn, restore); -+ RADEONRestorePLL2Registers(pScrn, restore); -+ } ++ ++ if (!info->IsSecondary) { ++ RADEONRestoreMemMapRegisters(pScrn, restore); ++ RADEONRestoreCommonRegisters(pScrn, restore); ++ ++ if (pRADEONEnt->HasCRTC2) { ++ RADEONRestoreCrtc2Registers(pScrn, restore); ++ RADEONRestorePLL2Registers(pScrn, restore); ++ } - RADEONRestoreBIOSRegisters(pScrn, restore); - RADEONRestoreCrtcRegisters(pScrn, restore); @@ -29604,27 +30919,27 @@ index 9f9fd90..cf32d40 100644 - RADEONRestoreFPRegisters(pScrn, restore); - RADEONRestoreFP2Registers(pScrn, restore); - RADEONRestoreLVDSRegisters(pScrn, restore); -+ RADEONRestoreBIOSRegisters(pScrn, restore); -+ RADEONRestoreCrtcRegisters(pScrn, restore); -+ RADEONRestorePLLRegisters(pScrn, restore); -+ RADEONRestoreRMXRegisters(pScrn, restore); -+ RADEONRestoreFPRegisters(pScrn, restore); -+ RADEONRestoreFP2Registers(pScrn, restore); -+ RADEONRestoreLVDSRegisters(pScrn, restore); ++ RADEONRestoreCrtcRegisters(pScrn, restore); ++ RADEONRestorePLLRegisters(pScrn, restore); ++ RADEONRestoreRMXRegisters(pScrn, restore); ++ RADEONRestoreFPRegisters(pScrn, restore); ++ RADEONRestoreFP2Registers(pScrn, restore); ++ RADEONRestoreLVDSRegisters(pScrn, restore); - if (info->InternalTVOut) - RADEONRestoreTVRegisters(pScrn, restore); -+ if (info->InternalTVOut) -+ RADEONRestoreTVRegisters(pScrn, restore); -+ } ++ if (info->InternalTVOut) ++ RADEONRestoreTVRegisters(pScrn, restore); ++ } - RADEONRestoreSurfaces(pScrn, restore); ++ RADEONRestoreBIOSRegisters(pScrn, restore); + RADEONRestoreSurfaces(pScrn, restore); + } #if 1 /* Temp fix to "solve" VT switch problems. When switching VTs on -@@ -5227,6 +4427,18 @@ void RADEONRestore(ScrnInfoPtr pScrn) +@@ -5227,6 +4534,18 @@ void RADEONRestore(ScrnInfoPtr pScrn) usleep(100000); #endif @@ -29643,7 +30958,7 @@ index 9f9fd90..cf32d40 100644 #ifdef WITH_VGAHW if (info->VGAAccess) { vgaHWPtr hwp = VGAHWPTR(pScrn); -@@ -5243,20 +4455,11 @@ void RADEONRestore(ScrnInfoPtr pScrn) +@@ -5243,20 +4562,11 @@ void RADEONRestore(ScrnInfoPtr pScrn) } #endif @@ -29666,7 +30981,7 @@ index 9f9fd90..cf32d40 100644 RADEONRestoreDACRegisters(pScrn, restore); #if 0 -@@ -5470,7 +4673,7 @@ void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, Bool crtc2) +@@ -5470,7 +4780,7 @@ void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, Bool crtc2) crtcoffsetcntl &= ~RADEON_CRTC_OFFSET_FLIP_CNTL; #endif if (info->tilingEnabled) { @@ -29675,7 +30990,7 @@ index 9f9fd90..cf32d40 100644 /* On r300/r400 when tiling is enabled crtc_offset is set to the address of * the surface. the x/y offsets are handled by the X_Y tile reg for each crtc * Makes tiling MUCH easier. -@@ -5527,7 +4730,7 @@ void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, Bool crtc2) +@@ -5527,7 +4837,7 @@ void RADEONDoAdjustFrame(ScrnInfoPtr pScrn, int x, int y, Bool crtc2) } #endif @@ -29684,7 +30999,7 @@ index 9f9fd90..cf32d40 100644 OUTREG(xytilereg, crtcxytile); } else { OUTREG(regcntl, crtcoffsetcntl); -@@ -5614,7 +4817,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags) +@@ -5614,7 +4924,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags) } @@ -29693,7 +31008,7 @@ index 9f9fd90..cf32d40 100644 #ifdef XF86DRI if (info->directRenderingEnabled) { if (info->cardType == CARD_PCIE && info->pKernelDRMVersion->version_minor >= 19 && info->FbSecureSize) -@@ -5626,7 +4829,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags) +@@ -5626,7 +4936,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags) /* get the DRI back into shape after resume */ RADEONDRISetVBlankInterrupt (pScrn, TRUE); RADEONDRIResume(pScrn->pScreen); @@ -30355,19 +31670,21 @@ index efc9e82..7f532a8 100644 + #endif diff --git a/src/radeon_misc.c b/src/radeon_misc.c -index 17b987c..fc608dd 100644 +index 17b987c..1115118 100644 --- a/src/radeon_misc.c +++ b/src/radeon_misc.c -@@ -24,8 +24,6 @@ +@@ -24,10 +24,6 @@ #include "config.h" #endif -#ifdef XFree86LOADER - - #include "ativersion.h" - +-#include "ativersion.h" +- #include "radeon_probe.h" -@@ -66,11 +64,8 @@ RADEONSetup + #include "radeon_version.h" + +@@ -66,13 +62,8 @@ RADEONSetup static Bool Inited = FALSE; if (!Inited) { @@ -30376,12 +31693,13 @@ index 17b987c..fc608dd 100644 - xf86LoadOneModule(ATI_DRIVER_NAME, Options); - - RADEONLoaderRefSymLists(); -+ if (xf86ServerIsOnlyDetecting() || !LoaderSymbol(ATI_NAME)) -+ xf86AddDriver(&RADEON, Module, 0); - +- Inited = TRUE; ++ xf86AddDriver(&RADEON, Module, HaveDriverFuncs); } -@@ -85,5 +80,3 @@ _X_EXPORT XF86ModuleData radeonModuleData = + + return (pointer)TRUE; +@@ -85,5 +76,3 @@ _X_EXPORT XF86ModuleData radeonModuleData = RADEONSetup, NULL }; @@ -30615,7 +31933,7 @@ index 3c4badd..2c72395 100644 } } diff --git a/src/radeon_output.c b/src/radeon_output.c -index 64c0438..248f94a 100644 +index 64c0438..aceb3d8 100644 --- a/src/radeon_output.c +++ b/src/radeon_output.c @@ -46,19 +46,22 @@ @@ -30679,8 +31997,9 @@ index 64c0438..248f94a 100644 "Primary", "TVDAC/ExtDAC", - "None" --}; -- ++ "ExtDac" + }; + -const char *ConnectorTypeName[8] = { - "None", - "Proprietary/LVDS", @@ -30690,9 +32009,8 @@ index 64c0438..248f94a 100644 - "CTV", - "STV", - "Unsupported" -+ "ExtDac" - }; - +-}; +- -const char *ConnectorTypeNameATOM[10] = { +const char *ConnectorTypeName[17] = { "None", @@ -30728,7 +32046,7 @@ index 64c0438..248f94a 100644 }; static const RADEONTMDSPll default_tmds_pll[CHIP_FAMILY_LAST][4] = -@@ -147,110 +144,52 @@ static const RADEONTMDSPll default_tmds_pll[CHIP_FAMILY_LAST][4] = +@@ -147,110 +144,57 @@ static const RADEONTMDSPll default_tmds_pll[CHIP_FAMILY_LAST][4] = {{15000, 0xb0155}, {0xffffffff, 0xb01cb}, {0, 0}, {0, 0}}, /*CHIP_FAMILY_RS400*/ /* FIXME: just values from rv380 used... */ }; @@ -30754,8 +32072,7 @@ index 64c0438..248f94a 100644 - -Bool -RADEONDVOWriteByte(I2CDevPtr dvo, int addr, CARD8 ch) -+static const CARD32 default_tvdac_adj [CHIP_FAMILY_LAST] = - { +-{ - if (!xf86I2CWriteByte(dvo, addr, ch)) { - xf86DrvMsg(dvo->pI2CBus->scrnIndex, X_ERROR, - "Unable to write to %s Slave %d.\n", @@ -30785,6 +32102,18 @@ index 64c0438..248f94a 100644 - if (xf86I2CDevInit(dvo)) { - return dvo; - } +- +- xfree(dvo); +- return NULL; +-} +- +-void +-RADEONRestoreDVOChip(ScrnInfoPtr pScrn, xf86OutputPtr output) ++static const CARD32 default_tvdac_adj [CHIP_FAMILY_LAST] = + { +- RADEONInfoPtr info = RADEONPTR(pScrn); +- unsigned char *RADEONMMIO = info->MMIO; +- RADEONOutputPrivatePtr radeon_output = output->driver_private; + 0x00000000, /* unknown */ + 0x00000000, /* legacy */ + 0x00000000, /* r100 */ @@ -30805,39 +32134,9 @@ index 64c0438..248f94a 100644 + 0x00780000, /* rs400 */ /* FIXME: just values from rv380 used... */ +}; -- xfree(dvo); -- return NULL; --} - --void --RADEONRestoreDVOChip(ScrnInfoPtr pScrn, xf86OutputPtr output) --{ -- RADEONInfoPtr info = RADEONPTR(pScrn); -- unsigned char *RADEONMMIO = info->MMIO; -- RADEONOutputPrivatePtr radeon_output = output->driver_private; -+static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr output); -+static void RADEONUpdatePanelSize(xf86OutputPtr output); -+static void RADEONGetTMDSInfoFromTable(xf86OutputPtr output); -+#define AVIVO_I2C_DISABLE 0 -+#define AVIVO_I2C_ENABLE 1 -+static Bool AVIVOI2CDoLock(xf86OutputPtr output, int lock_state); -+ -+extern void atombios_output_mode_set(xf86OutputPtr output, -+ DisplayModePtr mode, -+ DisplayModePtr adjusted_mode); -+extern void legacy_output_mode_set(xf86OutputPtr output, -+ DisplayModePtr mode, -+ DisplayModePtr adjusted_mode); -+extern void atombios_output_dpms(xf86OutputPtr output, int mode); -+extern void legacy_output_dpms(xf86OutputPtr output, int mode); -+extern RADEONMonitorType atombios_dac_detect(ScrnInfoPtr pScrn, xf86OutputPtr output); -+extern RADEONMonitorType legacy_dac_detect(ScrnInfoPtr pScrn, xf86OutputPtr output); -+extern int atombios_external_tmds_setup(xf86OutputPtr output, DisplayModePtr mode); -+extern I2CDevPtr RADEONDVODeviceInit(I2CBusPtr b, I2CSlaveAddr addr); - - if (!radeon_output->DVOChip) - return; -- + - OUTREG(radeon_output->dvo_i2c_reg, INREG(radeon_output->dvo_i2c_reg) & - (CARD32)~(RADEON_GPIO_A_0 | RADEON_GPIO_A_1)); - @@ -30871,6 +32170,31 @@ index 64c0438..248f94a 100644 - } - } -} ++static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr output); ++static void RADEONUpdatePanelSize(xf86OutputPtr output); ++static void RADEONGetTMDSInfoFromTable(xf86OutputPtr output); ++#define AVIVO_I2C_DISABLE 0 ++#define AVIVO_I2C_ENABLE 1 ++static Bool AVIVOI2CDoLock(xf86OutputPtr output, int lock_state); ++ ++extern void atombios_output_mode_set(xf86OutputPtr output, ++ DisplayModePtr mode, ++ DisplayModePtr adjusted_mode); ++extern void legacy_output_mode_set(xf86OutputPtr output, ++ DisplayModePtr mode, ++ DisplayModePtr adjusted_mode); ++extern void atombios_output_dpms(xf86OutputPtr output, int mode); ++extern void legacy_output_dpms(xf86OutputPtr output, int mode); ++extern RADEONMonitorType atombios_dac_detect(ScrnInfoPtr pScrn, xf86OutputPtr output); ++extern RADEONMonitorType legacy_dac_detect(ScrnInfoPtr pScrn, xf86OutputPtr output); ++extern int atombios_external_tmds_setup(xf86OutputPtr output, DisplayModePtr mode); ++extern I2CDevPtr RADEONDVODeviceInit(I2CBusPtr b, I2CSlaveAddr addr); ++static void ++radeon_bios_output_dpms(xf86OutputPtr output, int mode); ++static void ++radeon_bios_output_crtc(xf86OutputPtr output); ++static void ++radeon_bios_output_lock(xf86OutputPtr output, Bool lock); void RADEONPrintPortMap(ScrnInfoPtr pScrn) { @@ -30878,7 +32202,7 @@ index 64c0438..248f94a 100644 xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); RADEONOutputPrivatePtr radeon_output; xf86OutputPtr output; -@@ -260,18 +199,50 @@ void RADEONPrintPortMap(ScrnInfoPtr pScrn) +@@ -260,33 +204,67 @@ void RADEONPrintPortMap(ScrnInfoPtr pScrn) output = xf86_config->output[o]; radeon_output = output->driver_private; @@ -30897,11 +32221,11 @@ index 64c0438..248f94a 100644 + DACTypeName[radeon_output->DACType], + TMDSTypeName[radeon_output->TMDSType], + (unsigned int)radeon_output->ddc_i2c.mask_clk_reg); -+ } -+ -+} -+ -+static RADEONMonitorType + } + + } + + static RADEONMonitorType +avivo_display_ddc_connected(ScrnInfoPtr pScrn, xf86OutputPtr output) +{ + RADEONInfoPtr info = RADEONPTR(pScrn); @@ -30913,7 +32237,7 @@ index 64c0438..248f94a 100644 + AVIVOI2CDoLock(output, AVIVO_I2C_ENABLE); + MonInfo = xf86OutputGetEDID(output, radeon_output->pI2CBus); + AVIVOI2CDoLock(output, AVIVO_I2C_DISABLE); - } ++ } + if (MonInfo) { + if (!xf86ReturnOptValBool(info->Options, OPTION_IGNORE_EDID, FALSE)) + xf86OutputSetEDID(output, MonInfo); @@ -30931,12 +32255,12 @@ index 64c0438..248f94a 100644 + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "Output: %s, Detected Monitor Type: %d\n", output->name, MonType); - ++ + return MonType; - } - - static RADEONMonitorType -@@ -279,14 +250,16 @@ RADEONDisplayDDCConnected(ScrnInfoPtr pScrn, xf86OutputPtr output) ++} ++ ++static RADEONMonitorType + RADEONDisplayDDCConnected(ScrnInfoPtr pScrn, xf86OutputPtr output) { RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; @@ -30956,7 +32280,7 @@ index 64c0438..248f94a 100644 /* Read and output monitor info using DDC2 over I2C bus */ if (radeon_output->pI2CBus && info->ddc2 && (DDCReg != RADEON_LCD_GPIO_MASK) && (DDCReg != RADEON_MDGPIO_EN_REG)) { -@@ -357,272 +330,24 @@ RADEONDisplayDDCConnected(ScrnInfoPtr pScrn, xf86OutputPtr output) +@@ -357,272 +335,24 @@ RADEONDisplayDDCConnected(ScrnInfoPtr pScrn, xf86OutputPtr output) if (MonInfo) { if (!xf86ReturnOptValBool(info->Options, OPTION_IGNORE_EDID, FALSE)) xf86OutputSetEDID(output, MonInfo); @@ -31236,7 +32560,7 @@ index 64c0438..248f94a 100644 /* Primary Head (DVI or Laptop Int. panel)*/ /* A ddc capable display connected on DVI port */ -@@ -633,38 +358,24 @@ void RADEONConnectorFindMonitor(ScrnInfoPtr pScrn, xf86OutputPtr output) +@@ -633,38 +363,24 @@ void RADEONConnectorFindMonitor(ScrnInfoPtr pScrn, xf86OutputPtr output) RADEONOutputPrivatePtr radeon_output = output->driver_private; if (radeon_output->MonType == MT_UNKNOWN) { @@ -31286,9 +32610,15 @@ index 64c0438..248f94a 100644 } } } -@@ -675,11 +386,8 @@ void RADEONConnectorFindMonitor(ScrnInfoPtr pScrn, xf86OutputPtr output) +@@ -674,12 +390,14 @@ void RADEONConnectorFindMonitor(ScrnInfoPtr pScrn, xf86OutputPtr output) + if (radeon_output->MonType == MT_LCD || radeon_output->MonType == MT_DFP) RADEONUpdatePanelSize(output); ++ /* panel is probably busted or not connected */ ++ if ((radeon_output->MonType == MT_LCD) && ++ ((radeon_output->PanelXRes == 0) || (radeon_output->PanelYRes == 0))) ++ radeon_output->MonType == MT_NONE; ++ if (output->MonInfo) { - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "EDID data from the display on connector: %s ----------------------\n", - info->IsAtomBios ? @@ -31300,7 +32630,7 @@ index 64c0438..248f94a 100644 xf86PrintEDID( output->MonInfo ); } } -@@ -732,14 +440,18 @@ RADEONDetectLidStatus(ScrnInfoPtr pScrn) +@@ -732,14 +450,18 @@ RADEONDetectLidStatus(ScrnInfoPtr pScrn) static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr output) { @@ -31321,7 +32651,7 @@ index 64c0438..248f94a 100644 #endif } /*else if (radeon_output->type == OUTPUT_DVI) { if (radeon_output->TMDSType == TMDS_INT) { -@@ -752,7 +464,7 @@ static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr +@@ -752,7 +474,7 @@ static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr }*/ xf86DrvMsg(pScrn->scrnIndex, X_INFO, @@ -31330,7 +32660,7 @@ index 64c0438..248f94a 100644 return MonType; -@@ -761,15 +473,12 @@ static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr +@@ -761,16 +483,15 @@ static RADEONMonitorType RADEONPortCheckNonDDC(ScrnInfoPtr pScrn, xf86OutputPtr static void radeon_dpms(xf86OutputPtr output, int mode) { @@ -31350,9 +32680,12 @@ index 64c0438..248f94a 100644 + } else { + legacy_output_dpms(output, mode); } ++ radeon_bios_output_dpms(output, mode); ++ } -@@ -803,13 +512,32 @@ radeon_mode_valid(xf86OutputPtr output, DisplayModePtr pMode) + static void +@@ -803,13 +524,32 @@ radeon_mode_valid(xf86OutputPtr output, DisplayModePtr pMode) return MODE_BANDWIDTH; } @@ -31391,7 +32724,7 @@ index 64c0438..248f94a 100644 } if (radeon_output->type == OUTPUT_LVDS) { -@@ -830,6 +558,7 @@ static Bool +@@ -830,6 +570,7 @@ static Bool radeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode, DisplayModePtr adjusted_mode) { @@ -31399,7 +32732,7 @@ index 64c0438..248f94a 100644 RADEONOutputPrivatePtr radeon_output = output->driver_private; radeon_output->Flags &= ~RADEON_USE_RMX; -@@ -840,35 +569,56 @@ radeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode, +@@ -840,846 +581,444 @@ radeon_mode_fixup(xf86OutputPtr output, DisplayModePtr mode, xf86CrtcPtr crtc = output->crtc; RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; @@ -31480,8 +32813,11 @@ index 64c0438..248f94a 100644 return TRUE; } -@@ -877,809 +627,23 @@ radeon_mode_prepare(xf86OutputPtr output) + static void + radeon_mode_prepare(xf86OutputPtr output) { ++ radeon_bios_output_lock(output, TRUE); ++ radeon_dpms(output, DPMSModeOff); } -static void RADEONInitFPRegisters(xf86OutputPtr output, RADEONSavePtr save, @@ -31552,15 +32888,21 @@ index 64c0438..248f94a 100644 - -static void RADEONInitFP2Registers(xf86OutputPtr output, RADEONSavePtr save, - DisplayModePtr mode, BOOL IsPrimary) --{ ++static void ++radeon_mode_set(xf86OutputPtr output, DisplayModePtr mode, ++ DisplayModePtr adjusted_mode) + { - ScrnInfoPtr pScrn = output->scrn; - RADEONInfoPtr info = RADEONPTR(pScrn); - -- ++ RADEONInfoPtr info = RADEONPTR(output->scrn); + - if (pScrn->rgbBits == 8) - save->fp2_gen_cntl = info->SavedReg.fp2_gen_cntl | - RADEON_FP2_PANEL_FORMAT; /* 24 bit format, */ -- else ++ if (IS_AVIVO_VARIANT) ++ atombios_output_mode_set(output, mode, adjusted_mode); + else - save->fp2_gen_cntl = info->SavedReg.fp2_gen_cntl & - ~RADEON_FP2_PANEL_FORMAT;/* 18 bit format, */ - @@ -31683,9 +33025,11 @@ index 64c0438..248f94a 100644 - RADEON_VERT_STRETCH_BLEND | - ((radeon_output->PanelYRes-1)<<12)); - } -- --} -- ++ legacy_output_mode_set(output, mode, adjusted_mode); ++ radeon_bios_output_crtc(output); + + } + -static void RADEONInitDACRegisters(xf86OutputPtr output, RADEONSavePtr save, - DisplayModePtr mode, BOOL IsPrimary) -{ @@ -31715,9 +33059,10 @@ index 64c0438..248f94a 100644 - save->dac_macro_cntl = info->SavedReg.dac_macro_cntl; -} - --static void + static void -RADEONInitTvDacCntl(xf86OutputPtr output, RADEONSavePtr save) --{ ++radeon_mode_commit(xf86OutputPtr output) + { - ScrnInfoPtr pScrn = output->scrn; - RADEONInfoPtr info = RADEONPTR(pScrn); - RADEONOutputPrivatePtr radeon_output = output->driver_private; @@ -31790,56 +33135,76 @@ index 64c0438..248f94a 100644 - ~RADEON_CRT2_DISP1_SEL; - } - } --} -- --static void ++ radeon_dpms(output, DPMSModeOn); ++ radeon_bios_output_lock(output, FALSE); + } + + static void -RADEONInitOutputRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save, - DisplayModePtr mode, xf86OutputPtr output, - int crtc_num) --{ ++radeon_bios_output_lock(xf86OutputPtr output, Bool lock) + { - Bool IsPrimary = crtc_num == 0 ? TRUE : FALSE; - RADEONOutputPrivatePtr radeon_output = output->driver_private; - - if (crtc_num == 0) - RADEONInitRMXRegisters(output, save, mode); -- ++ ScrnInfoPtr pScrn = output->scrn; ++ RADEONInfoPtr info = RADEONPTR(pScrn); ++ unsigned char *RADEONMMIO = info->MMIO; ++ RADEONSavePtr save = info->ModeReg; + - if (radeon_output->MonType == MT_CRT) { - if (radeon_output->DACType == DAC_PRIMARY) { - RADEONInitDACRegisters(output, save, mode, IsPrimary); -- } else { ++ if (info->IsAtomBios) { ++ if (lock) { ++ save->bios_6_scratch |= (ATOM_S6_CRITICAL_STATE | ATOM_S6_ACC_MODE); + } else { - RADEONInitDAC2Registers(output, save, mode, IsPrimary); -- } ++ save->bios_6_scratch &= ~(ATOM_S6_CRITICAL_STATE | ATOM_S6_ACC_MODE); + } - } else if (radeon_output->MonType == MT_LCD) { - RADEONInitLVDSRegisters(output, save, mode, IsPrimary); - } else if (radeon_output->MonType == MT_DFP) { - if (radeon_output->TMDSType == TMDS_INT) { - RADEONInitFPRegisters(output, save, mode, IsPrimary); -- } else { ++ } else { ++ if (lock) { ++ save->bios_6_scratch |= (RADEON_DRIVER_CRITICAL | RADEON_ACC_MODE_CHANGE); + } else { - RADEONInitFP2Registers(output, save, mode, IsPrimary); -- } ++ save->bios_6_scratch &= ~(RADEON_DRIVER_CRITICAL | RADEON_ACC_MODE_CHANGE); + } - } else if (radeon_output->MonType == MT_STV || - radeon_output->MonType == MT_CTV) { - RADEONInitTVRegisters(output, save, mode, IsPrimary); -- } --} -- + } ++ if (info->ChipFamily >= CHIP_FAMILY_R600) ++ OUTREG(R600_BIOS_6_SCRATCH, save->bios_6_scratch); ++ else ++ OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch); + } + static void - radeon_mode_set(xf86OutputPtr output, DisplayModePtr mode, +-radeon_mode_set(xf86OutputPtr output, DisplayModePtr mode, - DisplayModePtr adjusted_mode) -+ DisplayModePtr adjusted_mode) ++radeon_bios_output_dpms(xf86OutputPtr output, int mode) { -- ScrnInfoPtr pScrn = output->scrn; -- RADEONInfoPtr info = RADEONPTR(pScrn); -- RADEONOutputPrivatePtr radeon_output = output->driver_private; + ScrnInfoPtr pScrn = output->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); + RADEONOutputPrivatePtr radeon_output = output->driver_private; - xf86CrtcPtr crtc = output->crtc; - RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; - - RADEONInitOutputRegisters(pScrn, &info->ModeReg, adjusted_mode, output, radeon_crtc->crtc_id); -+ RADEONInfoPtr info = RADEONPTR(output->scrn); - +- - if (radeon_crtc->crtc_id == 0) - RADEONRestoreRMXRegisters(pScrn, &info->ModeReg); -- ++ unsigned char *RADEONMMIO = info->MMIO; ++ RADEONSavePtr save = info->ModeReg; + - switch(radeon_output->MonType) { - case MT_LCD: - ErrorF("restore LVDS\n"); @@ -31849,11 +33214,92 @@ index 64c0438..248f94a 100644 - if (radeon_output->TMDSType == TMDS_INT) { - ErrorF("restore FP\n"); - RADEONRestoreFPRegisters(pScrn, &info->ModeReg); -- } else { ++ if (info->IsAtomBios) { ++ if (mode == DPMSModeOn) { ++ if (radeon_output->MonType == MT_STV || ++ radeon_output->MonType == MT_CTV) { ++ if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S2_TV1_DPMS_STATE; ++ save->bios_3_scratch |= ATOM_S3_TV1_ACTIVE; ++ } ++ } else if (radeon_output->MonType == MT_CV) { ++ if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S2_CV_DPMS_STATE; ++ save->bios_3_scratch |= ATOM_S3_CV_ACTIVE; ++ } ++ } else if (radeon_output->MonType == MT_CRT) { ++ if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S2_CRT1_DPMS_STATE; ++ save->bios_3_scratch |= ATOM_S3_CRT1_ACTIVE; ++ } else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S2_CRT2_DPMS_STATE; ++ save->bios_3_scratch |= ATOM_S3_CRT2_ACTIVE; ++ } ++ } else if (radeon_output->MonType == MT_LCD) { ++ if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S2_LCD1_DPMS_STATE; ++ save->bios_3_scratch |= ATOM_S3_LCD1_ACTIVE; ++ } ++ } else if (radeon_output->MonType == MT_DFP) { ++ if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S2_DFP1_DPMS_STATE; ++ save->bios_3_scratch |= ATOM_S3_DFP1_ACTIVE; ++ } else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S2_DFP2_DPMS_STATE; ++ save->bios_3_scratch |= ATOM_S3_DFP2_ACTIVE; ++ } else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S2_DFP3_DPMS_STATE; ++ save->bios_3_scratch |= ATOM_S3_DFP3_ACTIVE; ++ } ++ } ++ } else { ++ if (radeon_output->MonType == MT_STV || ++ radeon_output->MonType == MT_CTV) { ++ if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT) { ++ save->bios_2_scratch |= ATOM_S2_TV1_DPMS_STATE; ++ save->bios_3_scratch &= ~ATOM_S3_TV1_ACTIVE; ++ } ++ } else if (radeon_output->MonType == MT_CV) { ++ if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT) { ++ save->bios_2_scratch |= ATOM_S2_CV_DPMS_STATE; ++ save->bios_3_scratch &= ~ATOM_S3_CV_ACTIVE; ++ } ++ } else if (radeon_output->MonType == MT_CRT) { ++ if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) { ++ save->bios_2_scratch |= ATOM_S2_CRT1_DPMS_STATE; ++ save->bios_3_scratch &= ~ATOM_S3_CRT1_ACTIVE; ++ } else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT) { ++ save->bios_2_scratch |= ATOM_S2_CRT2_DPMS_STATE; ++ save->bios_3_scratch &= ~ATOM_S3_CRT2_ACTIVE; ++ } ++ } else if (radeon_output->MonType == MT_LCD) { ++ if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) { ++ save->bios_2_scratch |= ATOM_S2_LCD1_DPMS_STATE; ++ save->bios_3_scratch &= ~ATOM_S3_LCD1_ACTIVE; ++ } ++ } else if (radeon_output->MonType == MT_DFP) { ++ if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) { ++ save->bios_2_scratch |= ATOM_S2_DFP1_DPMS_STATE; ++ save->bios_3_scratch &= ~ATOM_S3_DFP1_ACTIVE; ++ } else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) { ++ save->bios_2_scratch |= ATOM_S2_DFP2_DPMS_STATE; ++ save->bios_3_scratch &= ~ATOM_S3_DFP2_ACTIVE; ++ } else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) { ++ save->bios_2_scratch |= ATOM_S2_DFP3_DPMS_STATE; ++ save->bios_3_scratch &= ~ATOM_S3_DFP3_ACTIVE; ++ } ++ } ++ } ++ if (info->ChipFamily >= CHIP_FAMILY_R600) { ++ OUTREG(R600_BIOS_2_SCRATCH, save->bios_2_scratch); ++ OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch); + } else { - ErrorF("restore FP2\n"); - RADEONRestoreDVOChip(pScrn, output); - RADEONRestoreFP2Registers(pScrn, &info->ModeReg); -- } ++ OUTREG(RADEON_BIOS_2_SCRATCH, save->bios_2_scratch); ++ OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch); + } - break; - case MT_STV: - case MT_CTV: @@ -31864,17 +33310,63 @@ index 64c0438..248f94a 100644 - default: - ErrorF("restore dac\n"); - RADEONRestoreDACRegisters(pScrn, &info->ModeReg); -- } -+ if (IS_AVIVO_VARIANT) -+ atombios_output_mode_set(output, mode, adjusted_mode); -+ else -+ legacy_output_mode_set(output, mode, adjusted_mode); - ++ } else { ++ if (mode == DPMSModeOn) { ++ save->bios_6_scratch &= ~(RADEON_DPMS_MASK | RADEON_SCREEN_BLANKING); ++ save->bios_6_scratch |= RADEON_DPMS_ON; ++ if (radeon_output->MonType == MT_STV || ++ radeon_output->MonType == MT_CTV) { ++ save->bios_5_scratch |= RADEON_TV1_ON; ++ save->bios_6_scratch |= RADEON_TV_DPMS_ON; ++ } else if (radeon_output->MonType == MT_CRT) { ++ if (radeon_output->DACType == DAC_PRIMARY) ++ save->bios_5_scratch |= RADEON_CRT1_ON; ++ else ++ save->bios_5_scratch |= RADEON_CRT2_ON; ++ save->bios_6_scratch |= RADEON_CRT_DPMS_ON; ++ } else if (radeon_output->MonType == MT_LCD) { ++ save->bios_5_scratch |= RADEON_LCD1_ON; ++ save->bios_6_scratch |= RADEON_LCD_DPMS_ON; ++ } else if (radeon_output->MonType == MT_DFP) { ++ if (radeon_output->TMDSType == TMDS_INT) ++ save->bios_5_scratch |= RADEON_DFP1_ON; ++ else ++ save->bios_5_scratch |= RADEON_DFP2_ON; ++ save->bios_6_scratch |= RADEON_DFP_DPMS_ON; ++ } ++ } else { ++ save->bios_6_scratch &= ~RADEON_DPMS_MASK; ++ save->bios_6_scratch |= (RADEON_DPMS_OFF | RADEON_SCREEN_BLANKING); ++ if (radeon_output->MonType == MT_STV || ++ radeon_output->MonType == MT_CTV) { ++ save->bios_5_scratch &= ~RADEON_TV1_ON; ++ save->bios_6_scratch &= ~RADEON_TV_DPMS_ON; ++ } else if (radeon_output->MonType == MT_CRT) { ++ if (radeon_output->DACType == DAC_PRIMARY) ++ save->bios_5_scratch &= ~RADEON_CRT1_ON; ++ else ++ save->bios_5_scratch &= ~RADEON_CRT2_ON; ++ save->bios_6_scratch &= ~RADEON_CRT_DPMS_ON; ++ } else if (radeon_output->MonType == MT_LCD) { ++ save->bios_5_scratch &= ~RADEON_LCD1_ON; ++ save->bios_6_scratch &= ~RADEON_LCD_DPMS_ON; ++ } else if (radeon_output->MonType == MT_DFP) { ++ if (radeon_output->TMDSType == TMDS_INT) ++ save->bios_5_scratch &= ~RADEON_DFP1_ON; ++ else ++ save->bios_5_scratch &= ~RADEON_DFP2_ON; ++ save->bios_6_scratch &= ~RADEON_DFP_DPMS_ON; ++ } ++ } ++ OUTREG(RADEON_BIOS_5_SCRATCH, save->bios_5_scratch); ++ OUTREG(RADEON_BIOS_6_SCRATCH, save->bios_6_scratch); + } +- } static void - radeon_mode_commit(xf86OutputPtr output) - { +-radeon_mode_commit(xf86OutputPtr output) +-{ - RADEONEnableDisplay(output, TRUE); -} - @@ -31951,9 +33443,12 @@ index 64c0438..248f94a 100644 - -static RADEONMonitorType -radeon_detect_ext_dac(ScrnInfoPtr pScrn) --{ -- RADEONInfoPtr info = RADEONPTR(pScrn); -- unsigned char *RADEONMMIO = info->MMIO; ++radeon_bios_output_crtc(xf86OutputPtr output) + { ++ ScrnInfoPtr pScrn = output->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); ++ RADEONOutputPrivatePtr radeon_output = output->driver_private; + unsigned char *RADEONMMIO = info->MMIO; - CARD32 gpio_monid, fp2_gen_cntl, disp_output_cntl, crtc2_gen_cntl; - CARD32 disp_lin_trans_grph_a, disp_lin_trans_grph_b, disp_lin_trans_grph_c; - CARD32 disp_lin_trans_grph_d, disp_lin_trans_grph_e, disp_lin_trans_grph_f; @@ -31962,7 +33457,10 @@ index 64c0438..248f94a 100644 - RADEONMonitorType found = MT_NONE; - int connected = 0; - int i = 0; -- ++ RADEONSavePtr save = info->ModeReg; ++ xf86CrtcPtr crtc = output->crtc; ++ RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; + - /* save the regs we need */ - gpio_monid = INREG(RADEON_GPIO_MONID); - fp2_gen_cntl = INREG(RADEON_FP2_GEN_CNTL); @@ -32014,14 +33512,80 @@ index 64c0438..248f94a 100644 - tmp = INREG(RADEON_GPIO_MONID); - if (tmp & RADEON_GPIO_Y_0) - connected = 1; -- else ++ if (info->IsAtomBios) { ++ if (radeon_output->MonType == MT_STV || ++ radeon_output->MonType == MT_CTV) { ++ if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT) { ++ save->bios_3_scratch &= ~ATOM_S3_TV1_CRTC_ACTIVE; ++ save->bios_3_scratch |= (radeon_crtc->crtc_id << 18); ++ } ++ } else if (radeon_output->MonType == MT_CV) { ++ if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S3_CV_CRTC_ACTIVE; ++ save->bios_3_scratch |= (radeon_crtc->crtc_id << 24); ++ } ++ } else if (radeon_output->MonType == MT_CRT) { ++ if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S3_CRT1_CRTC_ACTIVE; ++ save->bios_3_scratch |= (radeon_crtc->crtc_id << 16); ++ } else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S3_CRT2_CRTC_ACTIVE; ++ save->bios_3_scratch |= (radeon_crtc->crtc_id << 20); ++ } ++ } else if (radeon_output->MonType == MT_LCD) { ++ if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S3_LCD1_CRTC_ACTIVE; ++ save->bios_3_scratch |= (radeon_crtc->crtc_id << 17); ++ } ++ } else if (radeon_output->MonType == MT_DFP) { ++ if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S3_DFP1_CRTC_ACTIVE; ++ save->bios_3_scratch |= (radeon_crtc->crtc_id << 19); ++ } else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S3_DFP2_CRTC_ACTIVE; ++ save->bios_3_scratch |= (radeon_crtc->crtc_id << 23); ++ } else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) { ++ save->bios_2_scratch &= ~ATOM_S3_DFP3_CRTC_ACTIVE; ++ save->bios_3_scratch |= (radeon_crtc->crtc_id << 25); ++ } ++ } ++ if (info->ChipFamily >= CHIP_FAMILY_R600) ++ OUTREG(R600_BIOS_3_SCRATCH, save->bios_3_scratch); + else - connected = 0; - - if (!connected) - break; - - usleep(1000); -- } ++ OUTREG(RADEON_BIOS_3_SCRATCH, save->bios_3_scratch); ++ } else { ++ if (radeon_output->MonType == MT_STV || ++ radeon_output->MonType == MT_CTV) { ++ save->bios_5_scratch &= ~RADEON_TV1_CRTC_MASK; ++ save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_TV1_CRTC_SHIFT); ++ } else if (radeon_output->MonType == MT_CRT) { ++ if (radeon_output->DACType == DAC_PRIMARY) { ++ save->bios_5_scratch &= ~RADEON_CRT1_CRTC_MASK; ++ save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_CRT1_CRTC_SHIFT); ++ } else { ++ save->bios_5_scratch &= ~RADEON_CRT2_CRTC_MASK; ++ save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_CRT2_CRTC_SHIFT); ++ } ++ } else if (radeon_output->MonType == MT_LCD) { ++ save->bios_5_scratch &= ~RADEON_LCD1_CRTC_MASK; ++ save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_LCD1_CRTC_SHIFT); ++ } else if (radeon_output->MonType == MT_DFP) { ++ if (radeon_output->TMDSType == TMDS_INT) { ++ save->bios_5_scratch &= ~RADEON_DFP1_CRTC_MASK; ++ save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_DFP1_CRTC_SHIFT); ++ } else { ++ save->bios_5_scratch &= ~RADEON_DFP2_CRTC_MASK; ++ save->bios_5_scratch |= (radeon_crtc->crtc_id << RADEON_DFP2_CRTC_SHIFT); ++ } ++ } ++ OUTREG(RADEON_BIOS_5_SCRATCH, save->bios_5_scratch); + } - - if (connected) - found = MT_CRT; @@ -32043,13 +33607,17 @@ index 64c0438..248f94a 100644 - OUTREG(RADEON_GPIO_MONID, gpio_monid); - - return found; --} -- + } + -static RADEONMonitorType -radeon_detect_tv_dac(ScrnInfoPtr pScrn, Bool color) --{ -- RADEONInfoPtr info = RADEONPTR(pScrn); -- unsigned char *RADEONMMIO = info->MMIO; ++static void ++radeon_bios_output_connected(xf86OutputPtr output, Bool connected) + { ++ ScrnInfoPtr pScrn = output->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); ++ RADEONOutputPrivatePtr radeon_output = output->driver_private; + unsigned char *RADEONMMIO = info->MMIO; - CARD32 crtc2_gen_cntl, tv_dac_cntl, dac_cntl2, dac_ext_cntl; - CARD32 disp_hw_debug, disp_output_cntl, gpiopad_a, pixclks_cntl, tmp; - RADEONMonitorType found = MT_NONE; @@ -32096,7 +33664,8 @@ index 64c0438..248f94a 100644 - - tmp = RADEON_DAC2_FORCE_BLANK_OFF_EN | - RADEON_DAC2_FORCE_DATA_EN; -- ++ RADEONSavePtr save = info->ModeReg; + - if (color) - tmp |= RADEON_DAC_FORCE_DATA_SEL_RGB; - else @@ -32113,23 +33682,112 @@ index 64c0438..248f94a 100644 - OUTREG(RADEON_DAC_CNTL2, tmp); - - usleep(10000); -- ++ if (info->ChipFamily >= CHIP_FAMILY_R600) ++ return; + - if (IS_R300_VARIANT) { - if (INREG(RADEON_DAC_CNTL2) & RADEON_DAC2_CMP_OUT_B) { - found = MT_CRT; - xf86DrvMsg (pScrn->scrnIndex, X_INFO, - "Found %s CRT connected to TV DAC\n", - color ? "color" : "bw"); -- } -- } else { ++ if (info->IsAtomBios) { ++ if (connected) { ++ if (radeon_output->MonType == MT_STV) { ++ /* taken care of by load detection */ ++ } else if (radeon_output->MonType == MT_CTV) { ++ /* taken care of by load detection */ ++ } else if (radeon_output->MonType == MT_CV) { ++ /* taken care of by load detection */ ++ } else if (radeon_output->MonType == MT_CRT) { ++ if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) ++ save->bios_0_scratch |= ATOM_S0_CRT1_COLOR; ++ else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT) ++ save->bios_0_scratch |= ATOM_S0_CRT2_COLOR; ++ } else if (radeon_output->MonType == MT_LCD) { ++ if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) ++ save->bios_0_scratch |= ATOM_S0_LCD1; ++ } else if (radeon_output->MonType == MT_DFP) { ++ if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) ++ save->bios_0_scratch |= ATOM_S0_DFP1; ++ else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) ++ save->bios_0_scratch |= ATOM_S0_DFP2; ++ else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) ++ save->bios_0_scratch |= ATOM_S0_DFP3; ++ } ++ } else { ++ if (OUTPUT_IS_TV) { ++ if (radeon_output->devices & ATOM_DEVICE_TV1_SUPPORT) ++ save->bios_0_scratch &= ~ATOM_S0_TV1_MASK; ++ } ++ if (radeon_output->type == OUTPUT_CV) { ++ if (radeon_output->devices & ATOM_DEVICE_CV_SUPPORT) ++ save->bios_0_scratch &= ~ATOM_S0_CV_MASK; ++ } ++ if (radeon_output->DACType) { ++ if (radeon_output->devices & ATOM_DEVICE_CRT1_SUPPORT) ++ save->bios_0_scratch &= ~ATOM_S0_CRT1_MASK; ++ else if (radeon_output->devices & ATOM_DEVICE_CRT2_SUPPORT) ++ save->bios_0_scratch &= ~ATOM_S0_CRT2_MASK; ++ } ++ if (radeon_output->type == OUTPUT_LVDS) { ++ if (radeon_output->devices & ATOM_DEVICE_LCD1_SUPPORT) ++ save->bios_0_scratch &= ~ATOM_S0_LCD1; ++ } ++ if (radeon_output->TMDSType) { ++ if (radeon_output->devices & ATOM_DEVICE_DFP1_SUPPORT) ++ save->bios_0_scratch &= ~ATOM_S0_DFP1; ++ else if (radeon_output->devices & ATOM_DEVICE_DFP2_SUPPORT) ++ save->bios_0_scratch &= ~ATOM_S0_DFP2; ++ else if (radeon_output->devices & ATOM_DEVICE_DFP3_SUPPORT) ++ save->bios_0_scratch &= ~ATOM_S0_DFP3; ++ } + } ++ if (info->ChipFamily >= CHIP_FAMILY_R600) ++ OUTREG(R600_BIOS_0_SCRATCH, save->bios_0_scratch); ++ else ++ OUTREG(RADEON_BIOS_0_SCRATCH, save->bios_0_scratch); + } else { - if (INREG(RADEON_DAC_CNTL2) & RADEON_DAC2_CMP_OUTPUT) { - found = MT_CRT; - xf86DrvMsg (pScrn->scrnIndex, X_INFO, - "Found %s CRT connected to TV DAC\n", - color ? "color" : "bw"); -- } -- } -- ++ if (connected) { ++ if (radeon_output->MonType == MT_STV) ++ save->bios_4_scratch |= RADEON_TV1_ATTACHED_SVIDEO; ++ else if (radeon_output->MonType == MT_CTV) ++ save->bios_4_scratch |= RADEON_TV1_ATTACHED_COMP; ++ else if (radeon_output->MonType == MT_CRT) { ++ if (radeon_output->DACType == DAC_PRIMARY) ++ save->bios_4_scratch |= RADEON_CRT1_ATTACHED_COLOR; ++ else ++ save->bios_4_scratch |= RADEON_CRT2_ATTACHED_COLOR; ++ } else if (radeon_output->MonType == MT_LCD) ++ save->bios_4_scratch |= RADEON_LCD1_ATTACHED; ++ else if (radeon_output->MonType == MT_DFP) { ++ if (radeon_output->TMDSType == TMDS_INT) ++ save->bios_4_scratch |= RADEON_DFP1_ATTACHED; ++ else ++ save->bios_4_scratch |= RADEON_DFP2_ATTACHED; ++ } ++ } else { ++ if (OUTPUT_IS_TV) ++ save->bios_4_scratch &= ~RADEON_TV1_ATTACHED_MASK; ++ else if (radeon_output->DACType == DAC_TVDAC) ++ save->bios_4_scratch &= ~RADEON_CRT2_ATTACHED_MASK; ++ if (radeon_output->DACType == DAC_PRIMARY) ++ save->bios_4_scratch &= ~RADEON_CRT1_ATTACHED_MASK; ++ if (radeon_output->type == OUTPUT_LVDS) ++ save->bios_4_scratch &= ~RADEON_LCD1_ATTACHED; ++ if (radeon_output->TMDSType == TMDS_INT) ++ save->bios_4_scratch &= ~RADEON_DFP1_ATTACHED; ++ if (radeon_output->TMDSType == TMDS_EXT) ++ save->bios_4_scratch &= ~RADEON_DFP2_ATTACHED; + } ++ OUTREG(RADEON_BIOS_4_SCRATCH, save->bios_4_scratch); + } + - /* restore regs we used */ - OUTREG(RADEON_DAC_CNTL2, dac_cntl2); - OUTREG(RADEON_DAC_EXT_CNTL, dac_ext_cntl); @@ -32293,12 +33951,14 @@ index 64c0438..248f94a 100644 - OUTREG(RADEON_DAC_CNTL2, dac_cntl2); - - return found; -+ radeon_dpms(output, DPMSModeOn); } static xf86OutputStatus -@@ -1693,16 +657,26 @@ radeon_detect(xf86OutputPtr output) +@@ -1691,21 +1030,34 @@ radeon_detect(xf86OutputPtr output) + Bool connected = TRUE; + radeon_output->MonType = MT_UNKNOWN; ++ radeon_bios_output_connected(output, FALSE); RADEONConnectorFindMonitor(pScrn, output); - /* force montype based on output property */ @@ -32332,7 +33992,12 @@ index 64c0438..248f94a 100644 } } -@@ -1717,9 +691,20 @@ radeon_detect(xf86OutputPtr output) ++ radeon_bios_output_connected(output, TRUE); ++ + /* set montype so users can force outputs on even if detection fails */ + if (radeon_output->MonType == MT_NONE) { + connected = FALSE; +@@ -1717,9 +1069,20 @@ radeon_detect(xf86OutputPtr output) radeon_output->MonType = MT_STV; else if (radeon_output->type == OUTPUT_CTV) radeon_output->MonType = MT_CTV; @@ -32341,9 +34006,9 @@ index 64c0438..248f94a 100644 + else if (radeon_output->type == OUTPUT_CV) + radeon_output->MonType = MT_CV; + else if (radeon_output->type == OUTPUT_DVI_D) -+ radeon_output->MonType = MT_DFP; -+ else if (radeon_output->type == OUTPUT_HDMI) radeon_output->MonType = MT_DFP; ++ else if (radeon_output->type == OUTPUT_HDMI) ++ radeon_output->MonType = MT_DFP; + else if (radeon_output->type == OUTPUT_DVI_A) + radeon_output->MonType = MT_CRT; + else if (radeon_output->type == OUTPUT_DVI_I) { @@ -32355,7 +34020,7 @@ index 64c0438..248f94a 100644 } if (radeon_output->MonType == MT_UNKNOWN) { -@@ -1737,21 +722,23 @@ radeon_detect(xf86OutputPtr output) +@@ -1737,21 +1100,23 @@ radeon_detect(xf86OutputPtr output) break; } @@ -32381,7 +34046,7 @@ index 64c0438..248f94a 100644 if (connected) return XF86OutputStatusConnected; -@@ -1772,7 +759,7 @@ radeon_get_modes(xf86OutputPtr output) +@@ -1772,7 +1137,7 @@ radeon_get_modes(xf86OutputPtr output) static void radeon_destroy (xf86OutputPtr output) { @@ -32390,7 +34055,7 @@ index 64c0438..248f94a 100644 xfree(output->driver_private); } -@@ -1817,7 +804,6 @@ radeon_create_resources(xf86OutputPtr output) +@@ -1817,7 +1182,6 @@ radeon_create_resources(xf86OutputPtr output) INT32 range[2]; int data, err; const char *s; @@ -32398,7 +34063,7 @@ index 64c0438..248f94a 100644 /* backlight control */ if (radeon_output->type == OUTPUT_LVDS) { -@@ -1832,7 +818,7 @@ radeon_create_resources(xf86OutputPtr output) +@@ -1832,7 +1196,7 @@ radeon_create_resources(xf86OutputPtr output) "RRConfigureOutputProperty error, %d\n", err); } /* Set the current value of the backlight property */ @@ -32407,7 +34072,7 @@ index 64c0438..248f94a 100644 data = RADEON_MAX_BACKLIGHT_LEVEL; err = RRChangeOutputProperty(output->randr_output, backlight_atom, XA_INTEGER, 32, PropModeReplace, 1, &data, -@@ -1856,12 +842,7 @@ radeon_create_resources(xf86OutputPtr output) +@@ -1856,12 +1220,7 @@ radeon_create_resources(xf86OutputPtr output) "RRConfigureOutputProperty error, %d\n", err); } @@ -32421,7 +34086,7 @@ index 64c0438..248f94a 100644 data = 1; /* user forces on tv dac load detection */ else data = 0; /* shared tvdac between vga/dvi/tv */ -@@ -1875,8 +856,7 @@ radeon_create_resources(xf86OutputPtr output) +@@ -1875,8 +1234,7 @@ radeon_create_resources(xf86OutputPtr output) } } @@ -32431,7 +34096,7 @@ index 64c0438..248f94a 100644 tmds_pll_atom = MAKE_ATOM("tmds_pll"); err = RRConfigureOutputProperty(output->randr_output, tmds_pll_atom, -@@ -1907,8 +887,7 @@ radeon_create_resources(xf86OutputPtr output) +@@ -1907,8 +1265,7 @@ radeon_create_resources(xf86OutputPtr output) /* RMX control - fullscreen, centered, keep ratio, off */ /* actually more of a crtc property as only crtc1 has rmx */ @@ -32441,7 +34106,7 @@ index 64c0438..248f94a 100644 rmx_atom = MAKE_ATOM("scaler"); err = RRConfigureOutputProperty(output->randr_output, rmx_atom, -@@ -1932,97 +911,86 @@ radeon_create_resources(xf86OutputPtr output) +@@ -1932,97 +1289,86 @@ radeon_create_resources(xf86OutputPtr output) } /* force auto/analog/digital for DVI-I ports */ @@ -32449,7 +34114,9 @@ index 64c0438..248f94a 100644 - if ((info->IsAtomBios && radeon_output->ConnectorType == CONNECTOR_DVI_I_ATOM) || - (!info->IsAtomBios && radeon_output->ConnectorType == CONNECTOR_DVI_I)) { - monitor_type_atom = MAKE_ATOM("dvi_monitor_type"); -- ++ if (radeon_output->type == OUTPUT_DVI_I) { ++ monitor_type_atom = MAKE_ATOM("dvi_monitor_type"); + - err = RRConfigureOutputProperty(output->randr_output, monitor_type_atom, - FALSE, FALSE, FALSE, 0, NULL); - if (err != 0) { @@ -32471,9 +34138,7 @@ index 64c0438..248f94a 100644 - if (radeon_output->type == OUTPUT_STV || - radeon_output->type == OUTPUT_CTV) { - tv_hsize_atom = MAKE_ATOM("tv_horizontal_size"); -+ if (radeon_output->type == OUTPUT_DVI_I) { -+ monitor_type_atom = MAKE_ATOM("dvi_monitor_type"); - +- - range[0] = -MAX_H_SIZE; - range[1] = MAX_H_SIZE; - err = RRConfigureOutputProperty(output->randr_output, tv_hsize_atom, @@ -32603,7 +34268,7 @@ index 64c0438..248f94a 100644 tv_std_atom = MAKE_ATOM("tv_standard"); err = RRConfigureOutputProperty(output->randr_output, tv_std_atom, -@@ -2031,8 +999,9 @@ radeon_create_resources(xf86OutputPtr output) +@@ -2031,8 +1377,9 @@ radeon_create_resources(xf86OutputPtr output) xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "RRConfigureOutputProperty error, %d\n", err); } @@ -32614,7 +34279,7 @@ index 64c0438..248f94a 100644 case TV_STD_PAL: s = "pal"; break; -@@ -2054,25 +1023,6 @@ radeon_create_resources(xf86OutputPtr output) +@@ -2054,25 +1401,6 @@ radeon_create_resources(xf86OutputPtr output) break; } @@ -32640,7 +34305,7 @@ index 64c0438..248f94a 100644 err = RRChangeOutputProperty(output->randr_output, tv_std_atom, XA_STRING, 8, PropModeReplace, strlen(s), (pointer)s, FALSE, FALSE); -@@ -2087,6 +1037,7 @@ static Bool +@@ -2087,6 +1415,7 @@ static Bool radeon_set_property(xf86OutputPtr output, Atom property, RRPropertyValuePtr value) { @@ -32648,7 +34313,7 @@ index 64c0438..248f94a 100644 RADEONOutputPrivatePtr radeon_output = output->driver_private; INT32 val; -@@ -2124,21 +1075,18 @@ radeon_set_property(xf86OutputPtr output, Atom property, +@@ -2124,21 +1453,18 @@ radeon_set_property(xf86OutputPtr output, Atom property, } else if (property == rmx_atom) { const char *s; if (value->type != XA_STRING || value->format != 8) @@ -32673,7 +34338,7 @@ index 64c0438..248f94a 100644 return FALSE; } else if (property == tmds_pll_atom) { const char *s; -@@ -2182,7 +1130,7 @@ radeon_set_property(xf86OutputPtr output, Atom property, +@@ -2182,7 +1508,7 @@ radeon_set_property(xf86OutputPtr output, Atom property, return FALSE; radeon_output->hSize = val; @@ -32682,7 +34347,7 @@ index 64c0438..248f94a 100644 RADEONUpdateHVPosition(output, &output->crtc->mode); return TRUE; } else if (property == tv_hpos_atom) { -@@ -2197,7 +1145,7 @@ radeon_set_property(xf86OutputPtr output, Atom property, +@@ -2197,7 +1523,7 @@ radeon_set_property(xf86OutputPtr output, Atom property, return FALSE; radeon_output->hPos = val; @@ -32691,7 +34356,7 @@ index 64c0438..248f94a 100644 RADEONUpdateHVPosition(output, &output->crtc->mode); return TRUE; } else if (property == tv_vpos_atom) { -@@ -2212,7 +1160,7 @@ radeon_set_property(xf86OutputPtr output, Atom property, +@@ -2212,7 +1538,7 @@ radeon_set_property(xf86OutputPtr output, Atom property, return FALSE; radeon_output->vPos = val; @@ -32700,7 +34365,7 @@ index 64c0438..248f94a 100644 RADEONUpdateHVPosition(output, &output->crtc->mode); return TRUE; } else if (property == tv_std_atom) { -@@ -2238,6 +1186,12 @@ radeon_set_property(xf86OutputPtr output, Atom property, +@@ -2238,6 +1564,12 @@ radeon_set_property(xf86OutputPtr output, Atom property, } else if (value->size == strlen("scart-pal") && !strncmp("scart-pal", s, strlen("scart-pal"))) { radeon_output->tvStd = TV_STD_SCART_PAL; return TRUE; @@ -32713,7 +34378,7 @@ index 64c0438..248f94a 100644 } return FALSE; } -@@ -2263,74 +1217,98 @@ static const xf86OutputFuncsRec radeon_output_funcs = { +@@ -2263,74 +1595,98 @@ static const xf86OutputFuncsRec radeon_output_funcs = { void RADEONSetOutputType(ScrnInfoPtr pScrn, RADEONOutputPrivatePtr radeon_output) { @@ -32867,7 +34532,7 @@ index 64c0438..248f94a 100644 } static void RADEONI2CPutBits(I2CBusPtr b, int Clock, int data) -@@ -2339,31 +1317,29 @@ static void RADEONI2CPutBits(I2CBusPtr b, int Clock, int data) +@@ -2339,31 +1695,29 @@ static void RADEONI2CPutBits(I2CBusPtr b, int Clock, int data) RADEONInfoPtr info = RADEONPTR(pScrn); unsigned long val; unsigned char *RADEONMMIO = info->MMIO; @@ -32892,14 +34557,14 @@ index 64c0438..248f94a 100644 + val = INREG(pRADEONI2CBus->put_clk_reg) & (CARD32)~(pRADEONI2CBus->put_clk_mask); + val |= (Clock ? 0:pRADEONI2CBus->put_clk_mask); + OUTREG(pRADEONI2CBus->put_clk_reg, val); - /* read back to improve reliability on some cards. */ -- val = INREG(b->DriverPrivate.uval); ++ /* read back to improve reliability on some cards. */ + val = INREG(pRADEONI2CBus->put_clk_reg); + + val = INREG(pRADEONI2CBus->put_data_reg) & (CARD32)~(pRADEONI2CBus->put_data_mask); + val |= (data ? 0:pRADEONI2CBus->put_data_mask); + OUTREG(pRADEONI2CBus->put_data_reg, val); -+ /* read back to improve reliability on some cards. */ + /* read back to improve reliability on some cards. */ +- val = INREG(b->DriverPrivate.uval); + val = INREG(pRADEONI2CBus->put_data_reg); + } @@ -32915,7 +34580,7 @@ index 64c0438..248f94a 100644 pI2CBus = xf86CreateI2CBusRec(); if (!pI2CBus) return FALSE; -@@ -2373,14 +1349,81 @@ RADEONI2CInit(ScrnInfoPtr pScrn, I2CBusPtr *bus_ptr, int i2c_reg, char *name) +@@ -2373,14 +1727,81 @@ RADEONI2CInit(ScrnInfoPtr pScrn, I2CBusPtr *bus_ptr, int i2c_reg, char *name) pI2CBus->I2CPutBits = RADEONI2CPutBits; pI2CBus->I2CGetBits = RADEONI2CGetBits; pI2CBus->AcknTimeout = 5; @@ -32999,7 +34664,7 @@ index 64c0438..248f94a 100644 static void RADEONGetPanelInfoFromReg (xf86OutputPtr output) { -@@ -2643,71 +1686,99 @@ RADEONGetTMDSInfo(xf86OutputPtr output) +@@ -2643,71 +2064,99 @@ RADEONGetTMDSInfo(xf86OutputPtr output) static void RADEONGetTVInfo(xf86OutputPtr output) { @@ -33020,7 +34685,12 @@ index 64c0438..248f94a 100644 + radeon_output->TVRefClk = 27.000000000; + radeon_output->SupportedTVStds = TV_STD_NTSC | TV_STD_PAL; + } -+ + +- /* set some reasonable defaults */ +- radeon_output->default_tvStd = TV_STD_NTSC; +- radeon_output->tvStd = TV_STD_NTSC; +- radeon_output->TVRefClk = 27.000000000; +- radeon_output->SupportedTVStds = TV_STD_NTSC | TV_STD_PAL; + optstr = (char *)xf86GetOptValString(info->Options, OPTION_TVSTD); + if (optstr) { + if (!strncmp("ntsc", optstr, strlen("ntsc"))) @@ -33041,12 +34711,7 @@ index 64c0438..248f94a 100644 + } + +} - -- /* set some reasonable defaults */ -- radeon_output->default_tvStd = TV_STD_NTSC; -- radeon_output->tvStd = TV_STD_NTSC; -- radeon_output->TVRefClk = 27.000000000; -- radeon_output->SupportedTVStds = TV_STD_NTSC | TV_STD_PAL; ++ +static void +RADEONGetTVDacAdjInfo(xf86OutputPtr output) +{ @@ -33127,7 +34792,7 @@ index 64c0438..248f94a 100644 radeon_output->DVOChip = RADEONDVODeviceInit(pDVOBus, radeon_output->dvo_i2c_slave_addr); -@@ -2718,8 +1789,7 @@ void RADEONInitConnector(xf86OutputPtr output) +@@ -2718,8 +2167,7 @@ void RADEONInitConnector(xf86OutputPtr output) RADEONGetTMDSInfo(output); } @@ -33137,7 +34802,7 @@ index 64c0438..248f94a 100644 RADEONGetTVInfo(output); RADEONGetTVDacAdjInfo(output); } -@@ -2729,6 +1799,9 @@ void RADEONInitConnector(xf86OutputPtr output) +@@ -2729,6 +2177,9 @@ void RADEONInitConnector(xf86OutputPtr output) RADEONGetTVDacAdjInfo(output); } @@ -33147,7 +34812,7 @@ index 64c0438..248f94a 100644 } #if defined(__powerpc__) -@@ -2739,32 +1812,32 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) +@@ -2739,32 +2190,32 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) switch (info->MacModel) { case RADEON_MAC_IBOOK: @@ -33188,7 +34853,7 @@ index 64c0438..248f94a 100644 info->BiosConnector[1].DACType = DAC_PRIMARY; info->BiosConnector[1].TMDSType = TMDS_EXT; info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I; -@@ -2773,17 +1846,18 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) +@@ -2773,17 +2224,18 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) info->BiosConnector[2].ConnectorType = CONNECTOR_STV; info->BiosConnector[2].DACType = DAC_TVDAC; info->BiosConnector[2].TMDSType = TMDS_NONE; @@ -33211,7 +34876,7 @@ index 64c0438..248f94a 100644 info->BiosConnector[1].DACType = DAC_PRIMARY; info->BiosConnector[1].TMDSType = TMDS_INT; info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I; -@@ -2792,17 +1866,17 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) +@@ -2792,17 +2244,17 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) info->BiosConnector[2].ConnectorType = CONNECTOR_STV; info->BiosConnector[2].DACType = DAC_TVDAC; info->BiosConnector[2].TMDSType = TMDS_NONE; @@ -33233,7 +34898,7 @@ index 64c0438..248f94a 100644 info->BiosConnector[1].DACType = DAC_PRIMARY; info->BiosConnector[1].TMDSType = TMDS_INT; info->BiosConnector[1].ConnectorType = CONNECTOR_DVI_I; -@@ -2811,11 +1885,11 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) +@@ -2811,11 +2263,11 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) info->BiosConnector[2].ConnectorType = CONNECTOR_STV; info->BiosConnector[2].DACType = DAC_TVDAC; info->BiosConnector[2].TMDSType = TMDS_NONE; @@ -33247,7 +34912,7 @@ index 64c0438..248f94a 100644 info->BiosConnector[0].DACType = DAC_TVDAC; info->BiosConnector[0].TMDSType = TMDS_EXT; info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I; -@@ -2824,11 +1898,11 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) +@@ -2824,11 +2276,11 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) info->BiosConnector[1].ConnectorType = CONNECTOR_STV; info->BiosConnector[1].DACType = DAC_TVDAC; info->BiosConnector[1].TMDSType = TMDS_NONE; @@ -33261,7 +34926,7 @@ index 64c0438..248f94a 100644 info->BiosConnector[0].DACType = DAC_TVDAC; info->BiosConnector[0].TMDSType = TMDS_INT; info->BiosConnector[0].ConnectorType = CONNECTOR_DVI_I; -@@ -2837,26 +1911,26 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) +@@ -2837,26 +2289,26 @@ static Bool RADEONSetupAppleConnectors(ScrnInfoPtr pScrn) info->BiosConnector[1].ConnectorType = CONNECTOR_STV; info->BiosConnector[1].DACType = DAC_TVDAC; info->BiosConnector[1].TMDSType = TMDS_NONE; @@ -33293,7 +34958,7 @@ index 64c0438..248f94a 100644 info->BiosConnector[2].valid = TRUE; return TRUE; default: -@@ -2873,108 +1947,146 @@ static void RADEONSetupGenericConnectors(ScrnInfoPtr pScrn) +@@ -2873,108 +2325,146 @@ static void RADEONSetupGenericConnectors(ScrnInfoPtr pScrn) RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); if (!pRADEONEnt->HasCRTC2) { @@ -33314,8 +34979,15 @@ index 64c0438..248f94a 100644 - info->BiosConnector[0].DACType = DAC_UNKNOWN; - info->BiosConnector[0].TMDSType = TMDS_UNKNOWN; - info->BiosConnector[0].ConnectorType = CONNECTOR_PROPRIETARY; -- info->BiosConnector[0].valid = TRUE; -- ++ if (IS_AVIVO_VARIANT) { ++ if (info->IsMobility) { ++ info->BiosConnector[0].ddc_i2c = atom_setup_i2c_bus(0x7e60); ++ info->BiosConnector[0].DACType = DAC_NONE; ++ info->BiosConnector[0].TMDSType = TMDS_NONE; ++ info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; ++ info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; + info->BiosConnector[0].valid = TRUE; + - /* IGP only has TVDAC */ - if (info->ChipFamily == CHIP_FAMILY_RS400) - info->BiosConnector[1].DDCType = DDC_CRT2; @@ -33334,15 +35006,8 @@ index 64c0438..248f94a 100644 - info->BiosConnector[0].DACType = DAC_UNKNOWN; - info->BiosConnector[0].TMDSType = TMDS_UNKNOWN; - info->BiosConnector[0].ConnectorType = CONNECTOR_PROPRIETARY; -+ if (IS_AVIVO_VARIANT) { -+ if (info->IsMobility) { -+ info->BiosConnector[0].ddc_i2c = atom_setup_i2c_bus(0x7e60); -+ info->BiosConnector[0].DACType = DAC_NONE; -+ info->BiosConnector[0].TMDSType = TMDS_NONE; -+ info->BiosConnector[0].ConnectorType = CONNECTOR_LVDS; -+ info->BiosConnector[0].devices = ATOM_DEVICE_LCD1_SUPPORT; - info->BiosConnector[0].valid = TRUE; - +- info->BiosConnector[0].valid = TRUE; +- - info->BiosConnector[1].DDCType = DDC_VGA; + info->BiosConnector[1].ddc_i2c = atom_setup_i2c_bus(0x7e40); info->BiosConnector[1].DACType = DAC_PRIMARY; @@ -33495,7 +35160,7 @@ index 64c0438..248f94a 100644 +#endif + } + } - ++ + if (info->InternalTVOut) { + info->BiosConnector[2].ConnectorType = CONNECTOR_STV; + info->BiosConnector[2].DACType = DAC_TVDAC; @@ -33503,7 +35168,7 @@ index 64c0438..248f94a 100644 + info->BiosConnector[2].ddc_i2c.valid = FALSE; + info->BiosConnector[2].valid = TRUE; + } -+ + + /* Some cards have the DDC lines swapped and we have no way to + * detect it yet (Mac cards) + */ @@ -33515,7 +35180,7 @@ index 64c0438..248f94a 100644 } #if defined(__powerpc__) -@@ -3104,6 +2216,7 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) +@@ -3104,6 +2594,7 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) int i = 0; int num_vga = 0; int num_dvi = 0; @@ -33523,7 +35188,7 @@ index 64c0438..248f94a 100644 /* We first get the information about all connectors from BIOS. * This is how the card is phyiscally wired up. -@@ -3111,9 +2224,9 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) +@@ -3111,9 +2602,9 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) */ for (i = 0; i < RADEON_MAX_BIOS_CONNECTOR; i++) { info->BiosConnector[i].valid = FALSE; @@ -33536,7 +35201,7 @@ index 64c0438..248f94a 100644 info->BiosConnector[i].ConnectorType = CONNECTOR_NONE; } -@@ -3162,15 +2275,9 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) +@@ -3162,15 +2653,9 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) RADEONSetupGenericConnectors(pScrn); } @@ -33554,7 +35219,7 @@ index 64c0438..248f94a 100644 info->BiosConnector[i].DACType = DAC_PRIMARY; } } -@@ -3179,23 +2286,28 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) +@@ -3179,23 +2664,28 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) optstr = (char *)xf86GetOptValString(info->Options, OPTION_CONNECTORTABLE); if (optstr) { @@ -33586,7 +35251,7 @@ index 64c0438..248f94a 100644 } info->tvdac_use_count = 0; -@@ -3204,21 +2316,15 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) +@@ -3204,21 +2694,15 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) if (info->BiosConnector[i].DACType == DAC_TVDAC) info->tvdac_use_count++; @@ -33617,7 +35282,7 @@ index 64c0438..248f94a 100644 } } } -@@ -3243,67 +2349,47 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) +@@ -3243,67 +2727,47 @@ Bool RADEONSetupConnectors(ScrnInfoPtr pScrn) } radeon_output->MonType = MT_UNKNOWN; radeon_output->ConnectorType = info->BiosConnector[i].ConnectorType; @@ -33881,11 +35546,325 @@ index 7a36242..ab6b62a 100644 + { PCI_CHIP_RV630_958E, PCI_CHIP_RV630_958E, RES_SHARED_VGA }, { -1, -1, RES_UNDEFINED } }; +diff --git a/src/radeon_pci_device_match_gen.h b/src/radeon_pci_device_match_gen.h +new file mode 100644 +index 0000000..04393da +--- /dev/null ++++ b/src/radeon_pci_device_match_gen.h +@@ -0,0 +1,280 @@ ++/* This file is autogenerated please do not edit */ ++static const struct pci_id_match radeon_device_match[] = { ++ ATI_DEVICE_MATCH( PCI_CHIP_RV380_3150, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV380_3152, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV380_3154, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV380_3E50, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV380_3E54, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS100_4136, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS200_4137, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R300_AD, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R300_AE, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R300_AF, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R300_AG, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R350_AH, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R350_AI, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R350_AJ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R350_AK, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_AP, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_AQ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV360_AR, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_AS, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_AT, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_4155, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_AV, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS250_4237, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R200_BB, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R200_BC, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS100_4336, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS200_4337, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS250_4437, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV250_If, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV250_Ig, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R420_JH, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R420_JI, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R420_JJ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R420_JK, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R420_JL, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R420_JM, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R420_JN, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R420_4A4F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R420_JP, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R481_4B49, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R481_4B4A, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R481_4B4B, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R481_4B4C, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RADEON_LW, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RADEON_LX, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RADEON_LY, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RADEON_LZ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV250_Ld, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV250_Lf, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV250_Lg, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R300_ND, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R300_NE, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R300_NF, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R300_NG, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R350_NH, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R350_NI, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R360_NJ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R350_NK, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_NP, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_NQ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_NR, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_NS, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_NT, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV350_NV, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RADEON_QD, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RADEON_QE, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RADEON_QF, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RADEON_QG, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R200_QH, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R200_QL, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R200_QM, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV200_QW, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV200_QX, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV100_QY, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV100_QZ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RN50_515E, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV370_5460, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV370_5462, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV370_5464, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R423_UH, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R423_UI, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R423_UJ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R423_UK, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R430_554C, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R430_554D, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R430_554E, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R430_554F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R423_5550, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R423_UQ, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R423_UR, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R423_UT, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV410_564A, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV410_564B, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV410_564F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV410_5652, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV410_5653, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS300_5834, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS300_5835, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS480_5954, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS480_5955, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV280_5960, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV280_5961, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV280_5962, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV280_5964, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV280_5965, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RN50_5969, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS482_5974, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS485_5975, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS400_5A41, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS400_5A42, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RC410_5A61, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RC410_5A62, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV370_5B60, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV370_5B62, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV370_5B63, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV370_5657, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV370_5B64, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV370_5B65, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV280_5C61, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV280_5C63, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R430_5D48, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R430_5D49, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R430_5D4A, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R480_5D4C, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R480_5D4D, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R480_5D4E, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R480_5D4F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R480_5D50, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R480_5D52, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R423_5D57, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV410_5E48, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV410_5E4A, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV410_5E4B, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV410_5E4C, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV410_5E4D, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV410_5E4F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_7100, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_7101, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_7102, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_7103, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_7104, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_7105, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_7106, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_7108, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_7109, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_710A, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_710B, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_710C, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_710E, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R520_710F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7140, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7141, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7142, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7143, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7144, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7145, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7146, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7147, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7149, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_714A, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_714B, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_714C, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_714D, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_714E, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_714F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7151, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7152, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7153, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_715E, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_715F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7180, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7181, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7183, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7186, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7187, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7188, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_718A, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_718B, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_718C, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_718D, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_718F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7193, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_7196, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_719B, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV515_719F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71C0, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71C1, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71C2, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71C3, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71C4, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71C5, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71C6, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71C7, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71CD, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71CE, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71D2, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71D4, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71D5, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71D6, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71DA, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_71DE, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_7200, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_7210, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV530_7211, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_7240, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_7243, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_7244, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_7245, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_7246, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_7247, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_7248, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_7249, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_724A, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_724B, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_724C, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_724D, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_724E, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_724F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV570_7280, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV560_7281, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV560_7283, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R580_7284, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV560_7287, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV570_7288, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV570_7289, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV570_728B, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV570_728C, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV560_7290, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV560_7291, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV560_7293, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV560_7297, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS350_7834, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS350_7835, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS690_791E, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS690_791F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS740_796C, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS740_796D, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS740_796E, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RS740_796F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R600_9400, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R600_9401, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R600_9402, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R600_9403, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R600_9405, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R600_940A, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R600_940B, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_R600_940F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C0, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C1, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C3, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C4, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C5, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C6, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C7, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C8, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV610_94C9, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV610_94CB, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV610_94CC, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV670_9500, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV670_9501, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV670_9505, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV670_9507, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV670_950F, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV670_9511, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_9580, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_9581, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_9583, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_9586, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_9587, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_9588, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_9589, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_958A, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_958B, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_958C, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_958D, 0 ), ++ ATI_DEVICE_MATCH( PCI_CHIP_RV630_958E, 0 ), ++ { 0, 0, 0 } ++}; diff --git a/src/radeon_probe.c b/src/radeon_probe.c -index baea47c..0cf54b6 100644 +index baea47c..fc621c7 100644 --- a/src/radeon_probe.c +++ b/src/radeon_probe.c -@@ -58,7 +58,7 @@ +@@ -36,15 +36,12 @@ + * Authors: + * Kevin E. Martin + * Rickard E. Faith +- * +- * Modified by Marc Aurele La France for ATI driver merge. + */ + +-#include "ativersion.h" +- + #include "radeon_probe.h" + #include "radeon_version.h" + #include "atipciids.h" ++#include "atipcirename.h" + + #include "xf86.h" + #define _XF86MISC_SERVER_ +@@ -55,29 +52,25 @@ + + #include "radeon_pci_chipset_gen.h" + ++#ifdef XSERVER_LIBPCIACCESS ++#include "radeon_pci_device_match_gen.h" ++#endif ++ ++#ifndef XSERVER_LIBPCIACCESS ++static Bool RADEONProbe(DriverPtr drv, int flags); ++#endif ++ int gRADEONEntityIndex = -1; /* Return the options for supported chipset 'n'; NULL otherwise */ @@ -33893,8 +35872,20 @@ index baea47c..0cf54b6 100644 +static const OptionInfoRec * RADEONAvailableOptions(int chipid, int busid) { - int i; -@@ -77,7 +77,7 @@ RADEONAvailableOptions(int chipid, int busid) +- int i; +- +- /* +- * Return options defined in the radeon submodule which will have been +- * loaded by this point. +- */ +- if ((chipid >> 16) == PCI_VENDOR_ATI) +- chipid -= PCI_VENDOR_ATI << 16; +- for (i = 0; RADEONPciChipsets[i].PCIid > 0; i++) { +- if (chipid == RADEONPciChipsets[i].PCIid) +- return RADEONOptionsWeak(); +- } +- return NULL; ++ return RADEONOptionsWeak(); } /* Return the string name for supported chipset 'n'; NULL otherwise. */ @@ -33903,41 +35894,236 @@ index baea47c..0cf54b6 100644 RADEONIdentify(int flags) { xf86PrintChipsets(RADEON_NAME, -@@ -86,7 +86,7 @@ RADEONIdentify(int flags) +@@ -85,44 +78,92 @@ RADEONIdentify(int flags) + RADEONChipsets); } ++static Bool ++radeon_get_scrninfo(int entity_num) ++{ ++ ScrnInfoPtr pScrn = NULL; ++ EntityInfoPtr pEnt; ++ ++ pScrn = xf86ConfigPciEntity(pScrn, 0, entity_num, RADEONPciChipsets, ++ NULL, ++ NULL, NULL, NULL, NULL); ++ ++ if (!pScrn) ++ return FALSE; ++ ++ pScrn->driverVersion = RADEON_VERSION_CURRENT; ++ pScrn->driverName = RADEON_DRIVER_NAME; ++ pScrn->name = RADEON_NAME; ++#ifdef XSERVER_LIBPCIACCESS ++ pScrn->Probe = NULL; ++#else ++ pScrn->Probe = RADEONProbe; ++#endif ++ pScrn->PreInit = RADEONPreInit; ++ pScrn->ScreenInit = RADEONScreenInit; ++ pScrn->SwitchMode = RADEONSwitchMode; ++ pScrn->AdjustFrame = RADEONAdjustFrame; ++ pScrn->EnterVT = RADEONEnterVT; ++ pScrn->LeaveVT = RADEONLeaveVT; ++ pScrn->FreeScreen = RADEONFreeScreen; ++ pScrn->ValidMode = RADEONValidMode; ++ ++ pEnt = xf86GetEntityInfo(entity_num); ++ ++ /* Create a RADEONEntity for all chips, even with old single head ++ * Radeon, need to use pRADEONEnt for new monitor detection routines. ++ */ ++ { ++ DevUnion *pPriv; ++ RADEONEntPtr pRADEONEnt; ++ ++ xf86SetEntitySharable(entity_num); ++ ++ if (gRADEONEntityIndex == -1) ++ gRADEONEntityIndex = xf86AllocateEntityPrivateIndex(); ++ ++ pPriv = xf86GetEntityPrivate(pEnt->index, ++ gRADEONEntityIndex); ++ ++ if (!pPriv->ptr) { ++ int j; ++ int instance = xf86GetNumEntityInstances(pEnt->index); ++ ++ for (j = 0; j < instance; j++) ++ xf86SetEntityInstanceForScreen(pScrn, pEnt->index, j); ++ ++ pPriv->ptr = xnfcalloc(sizeof(RADEONEntRec), 1); ++ pRADEONEnt = pPriv->ptr; ++ pRADEONEnt->HasSecondary = FALSE; ++ } else { ++ pRADEONEnt = pPriv->ptr; ++ pRADEONEnt->HasSecondary = TRUE; ++ } ++ } ++ ++ xfree(pEnt); ++ ++ return TRUE; ++} ++ ++#ifndef XSERVER_LIBPCIACCESS ++ /* Return TRUE if chipset is present; FALSE otherwise. */ -_X_EXPORT Bool +static Bool RADEONProbe(DriverPtr drv, int flags) { int numUsed; -@@ -175,7 +175,7 @@ RADEONProbe(DriverPtr drv, int flags) - DevUnion *pPriv; - RADEONEntPtr pRADEONEnt; +- int numDevSections, nATIGDev, nRadeonGDev; ++ int numDevSections; + int *usedChips; +- GDevPtr *devSections, *ATIGDevs, *RadeonGDevs; ++ GDevPtr *devSections; + Bool foundScreen = FALSE; + int i; + +-#ifndef XSERVER_LIBPCIACCESS + if (!xf86GetPciVideoInfo()) return FALSE; +-#endif +- +- /* Collect unclaimed device sections for both driver names */ +- nATIGDev = xf86MatchDevice(ATI_NAME, &ATIGDevs); +- nRadeonGDev = xf86MatchDevice(RADEON_NAME, &RadeonGDevs); +- if (!(numDevSections = nATIGDev + nRadeonGDev)) return FALSE; ++ numDevSections = xf86MatchDevice(RADEON_NAME, &devSections); + +- if (!ATIGDevs) { +- if (!(devSections = RadeonGDevs)) numDevSections = 1; +- else numDevSections = nRadeonGDev; +- } if (!RadeonGDevs) { +- devSections = ATIGDevs; +- numDevSections = nATIGDev; +- } else { +- /* Combine into one list */ +- devSections = xnfalloc((numDevSections + 1) * sizeof(GDevPtr)); +- (void)memcpy(devSections, +- ATIGDevs, nATIGDev * sizeof(GDevPtr)); +- (void)memcpy(devSections + nATIGDev, +- RadeonGDevs, nRadeonGDev * sizeof(GDevPtr)); +- devSections[numDevSections] = NULL; +- xfree(ATIGDevs); +- xfree(RadeonGDevs); +- } ++ if (!numDevSections) return FALSE; + + numUsed = xf86MatchPciInstances(RADEON_NAME, + PCI_VENDOR_ATI, +@@ -139,66 +180,8 @@ RADEONProbe(DriverPtr drv, int flags) + foundScreen = TRUE; + } else { + for (i = 0; i < numUsed; i++) { +- ScrnInfoPtr pScrn = NULL; +- EntityInfoPtr pEnt; +- pEnt = xf86GetEntityInfo(usedChips[i]); +- if ((pScrn = xf86ConfigPciEntity(pScrn, 0, usedChips[i], +- RADEONPciChipsets, 0, 0, 0, +- 0, 0))) { +- pScrn->driverVersion = RADEON_VERSION_CURRENT; +- pScrn->driverName = RADEON_DRIVER_NAME; +- pScrn->name = RADEON_NAME; +- pScrn->Probe = RADEONProbe; +- pScrn->PreInit = RADEONPreInit; +- pScrn->ScreenInit = RADEONScreenInit; +- pScrn->SwitchMode = RADEONSwitchMode; +-#ifdef X_XF86MiscPassMessage +- pScrn->HandleMessage = RADEONHandleMessage; +-#endif +- pScrn->AdjustFrame = RADEONAdjustFrame; +- pScrn->EnterVT = RADEONEnterVT; +- pScrn->LeaveVT = RADEONLeaveVT; +- pScrn->FreeScreen = RADEONFreeScreen; +- pScrn->ValidMode = RADEONValidMode; +- +- foundScreen = TRUE; +- } +- +- xfree(pEnt); +- pEnt = xf86GetEntityInfo(usedChips[i]); +- +- /* create a RADEONEntity for all chips, even with +- old single head Radeon, need to use pRADEONEnt +- for new monitor detection routines +- */ +- { +- DevUnion *pPriv; +- RADEONEntPtr pRADEONEnt; +- - /*xf86SetEntitySharable(usedChips[i]);*/ -+ xf86SetEntitySharable(usedChips[i]); +- +- if (gRADEONEntityIndex == -1) +- gRADEONEntityIndex = xf86AllocateEntityPrivateIndex(); +- +- pPriv = xf86GetEntityPrivate(pEnt->index, +- gRADEONEntityIndex); +- +- if (!pPriv->ptr) { +- int j; +- int instance = xf86GetNumEntityInstances(pEnt->index); +- +- for (j = 0; j < instance; j++) +- xf86SetEntityInstanceForScreen(pScrn, pEnt->index, j); +- +- pPriv->ptr = xnfcalloc(sizeof(RADEONEntRec), 1); +- pRADEONEnt = pPriv->ptr; +- pRADEONEnt->HasSecondary = FALSE; +- } else { +- pRADEONEnt = pPriv->ptr; +- pRADEONEnt->HasSecondary = TRUE; +- } +- } +- xfree(pEnt); ++ if (radeon_get_scrninfo(i)) ++ foundScreen = TRUE; + } + } - if (gRADEONEntityIndex == -1) - gRADEONEntityIndex = xf86AllocateEntityPrivateIndex(); -@@ -207,3 +207,14 @@ RADEONProbe(DriverPtr drv, int flags) +@@ -207,3 +190,38 @@ RADEONProbe(DriverPtr drv, int flags) return foundScreen; } + ++#else /* XSERVER_LIBPCIACCESS */ ++ ++static Bool ++radeon_pci_probe( ++ DriverPtr pDriver, ++ int entity_num, ++ struct pci_device *device, ++ intptr_t match_data ++) ++{ ++ return radeon_get_scrninfo(entity_num); ++} ++ ++#endif /* XSERVER_LIBPCIACCESS */ ++ +_X_EXPORT DriverRec RADEON = +{ + RADEON_VERSION_CURRENT, + RADEON_DRIVER_NAME, + RADEONIdentify, ++#ifdef XSERVER_LIBPCIACCESS ++ NULL, ++#else + RADEONProbe, ++#endif + RADEONAvailableOptions, + NULL, -+ 0 ++ 0, ++ NULL, ++#ifdef XSERVER_LIBPCIACCESS ++ radeon_device_match, ++ radeon_pci_probe ++#endif +}; diff --git a/src/radeon_probe.h b/src/radeon_probe.h -index 7f8ce45..df87dab 100644 +index 7f8ce45..a3cf1fc 100644 --- a/src/radeon_probe.h +++ b/src/radeon_probe.h @@ -36,6 +36,7 @@ @@ -34159,7 +36345,7 @@ index 7f8ce45..df87dab 100644 int dvo_i2c_slave_addr; Bool dvo_duallink; /* TV out */ -@@ -222,10 +255,291 @@ typedef struct _RADEONOutputPrivateRec { +@@ -222,10 +255,298 @@ typedef struct _RADEONOutputPrivateRec { int SupportedTVStds; Bool tv_on; int load_detection; @@ -34293,9 +36479,16 @@ index 7f8ce45..df87dab 100644 + CARD32 cap0_trig_cntl; + CARD32 cap1_trig_cntl; + CARD32 bus_cntl; ++ ++ CARD32 bios_0_scratch; ++ CARD32 bios_1_scratch; ++ CARD32 bios_2_scratch; ++ CARD32 bios_3_scratch; + CARD32 bios_4_scratch; + CARD32 bios_5_scratch; + CARD32 bios_6_scratch; ++ CARD32 bios_7_scratch; ++ + CARD32 surface_cntl; + CARD32 surfaces[8][3]; + CARD32 mc_agp_location; @@ -34452,7 +36645,7 @@ index 7f8ce45..df87dab 100644 typedef struct { -@@ -243,17 +557,18 @@ typedef struct +@@ -243,17 +564,18 @@ typedef struct xf86CrtcPtr pCrtc[RADEON_MAX_CRTC]; RADEONCrtcPrivatePtr Controller[RADEON_MAX_CRTC]; @@ -34477,10 +36670,82 @@ index 7f8ce45..df87dab 100644 extern Bool RADEONScreenInit(int, ScreenPtr, int, char **); extern Bool RADEONSwitchMode(int, DisplayModePtr, int); diff --git a/src/radeon_reg.h b/src/radeon_reg.h -index 6e4e383..8d45d7b 100644 +index 6e4e383..61cdb15 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h -@@ -337,6 +337,8 @@ +@@ -130,13 +130,71 @@ + + #define RADEON_BASE_CODE 0x0f0b + #define RADEON_BIOS_0_SCRATCH 0x0010 ++# define RADEON_FP_PANEL_SCALABLE (1 << 16) ++# define RADEON_FP_PANEL_SCALE_EN (1 << 17) ++# define RADEON_FP_CHIP_SCALE_EN (1 << 18) ++# define RADEON_DRIVER_BRIGHTNESS_EN (1 << 26) ++# define RADEON_DISPLAY_ROT_MASK (3 << 28) ++# define RADEON_DISPLAY_ROT_00 (0 << 28) ++# define RADEON_DISPLAY_ROT_90 (1 << 28) ++# define RADEON_DISPLAY_ROT_180 (2 << 28) ++# define RADEON_DISPLAY_ROT_270 (3 << 28) + #define RADEON_BIOS_1_SCRATCH 0x0014 + #define RADEON_BIOS_2_SCRATCH 0x0018 + #define RADEON_BIOS_3_SCRATCH 0x001c + #define RADEON_BIOS_4_SCRATCH 0x0020 ++# define RADEON_CRT1_ATTACHED_MASK (3 << 0) ++# define RADEON_CRT1_ATTACHED_MONO (1 << 0) ++# define RADEON_CRT1_ATTACHED_COLOR (2 << 0) ++# define RADEON_LCD1_ATTACHED (1 << 2) ++# define RADEON_DFP1_ATTACHED (1 << 3) ++# define RADEON_TV1_ATTACHED_MASK (3 << 4) ++# define RADEON_TV1_ATTACHED_COMP (1 << 4) ++# define RADEON_TV1_ATTACHED_SVIDEO (2 << 4) ++# define RADEON_CRT2_ATTACHED_MASK (3 << 8) ++# define RADEON_CRT2_ATTACHED_MONO (1 << 8) ++# define RADEON_CRT2_ATTACHED_COLOR (2 << 8) ++# define RADEON_DFP2_ATTACHED (1 << 11) + #define RADEON_BIOS_5_SCRATCH 0x0024 ++# define RADEON_LCD1_ON (1 << 0) ++# define RADEON_CRT1_ON (1 << 1) ++# define RADEON_TV1_ON (1 << 2) ++# define RADEON_DFP1_ON (1 << 3) ++# define RADEON_CRT2_ON (1 << 5) ++# define RADEON_CV1_ON (1 << 6) ++# define RADEON_DFP2_ON (1 << 7) ++# define RADEON_LCD1_CRTC_MASK (1 << 8) ++# define RADEON_LCD1_CRTC_SHIFT 8 ++# define RADEON_CRT1_CRTC_MASK (1 << 9) ++# define RADEON_CRT1_CRTC_SHIFT 9 ++# define RADEON_TV1_CRTC_MASK (1 << 10) ++# define RADEON_TV1_CRTC_SHIFT 10 ++# define RADEON_DFP1_CRTC_MASK (1 << 11) ++# define RADEON_DFP1_CRTC_SHIFT 11 ++# define RADEON_CRT2_CRTC_MASK (1 << 12) ++# define RADEON_CRT2_CRTC_SHIFT 12 ++# define RADEON_CV1_CRTC_MASK (1 << 13) ++# define RADEON_CV1_CRTC_SHIFT 13 ++# define RADEON_DFP2_CRTC_MASK (1 << 14) ++# define RADEON_DFP2_CRTC_SHIFT 14 + #define RADEON_BIOS_6_SCRATCH 0x0028 ++# define RADEON_ACC_MODE_CHANGE (1 << 2) ++# define RADEON_EXT_DESKTOP_MODE (1 << 3) ++# define RADEON_LCD_DPMS_ON (1 << 20) ++# define RADEON_CRT_DPMS_ON (1 << 21) ++# define RADEON_TV_DPMS_ON (1 << 22) ++# define RADEON_DFP_DPMS_ON (1 << 23) ++# define RADEON_DPMS_MASK (3 << 24) ++# define RADEON_DPMS_ON (0 << 24) ++# define RADEON_DPMS_STANDBY (1 << 24) ++# define RADEON_DPMS_SUSPEND (2 << 24) ++# define RADEON_DPMS_OFF (3 << 24) ++# define RADEON_SCREEN_BLANKING (1 << 26) ++# define RADEON_DRIVER_CRITICAL (1 << 27) ++# define RADEON_DISPLAY_SWITCHING_DIS (1 << 30) + #define RADEON_BIOS_7_SCRATCH 0x002c ++# define RADEON_SYS_HOTKEY (1 << 10) ++# define RADEON_DRV_LOADED (1 << 12) + #define RADEON_BIOS_ROM 0x0f30 /* PCI */ + #define RADEON_BIST 0x0f0f /* PCI */ + #define RADEON_BRUSH_DATA0 0x1480 +@@ -337,6 +395,8 @@ # define RADEON_CRTC2_HSYNC_DIS (1 << 28) # define RADEON_CRTC2_VSYNC_DIS (1 << 29) #define RADEON_CRTC_MORE_CNTL 0x27c @@ -34489,7 +36754,7 @@ index 6e4e383..8d45d7b 100644 # define RADEON_CRTC_H_CUTOFF_ACTIVE_EN (1<<4) # define RADEON_CRTC_V_CUTOFF_ACTIVE_EN (1<<5) #define RADEON_CRTC_GUI_TRIG_VLINE 0x0218 -@@ -812,6 +814,7 @@ +@@ -812,6 +872,7 @@ # define RADEON_HORZ_AUTO_RATIO (1 << 27) # define RADEON_HORZ_FP_LOOP_STRETCH (0x7 << 28) # define RADEON_HORZ_AUTO_RATIO_INC (1 << 31) @@ -34497,7 +36762,7 @@ index 6e4e383..8d45d7b 100644 #define RADEON_FP_V_SYNC_STRT_WID 0x02c8 #define RADEON_FP_VERT_STRETCH 0x0290 #define RADEON_FP_V2_SYNC_STRT_WID 0x03c8 -@@ -997,6 +1000,7 @@ +@@ -997,6 +1058,7 @@ #define RADEON_MPP_GP_CONFIG 0x01c8 /* ? */ #define R300_MC_IND_INDEX 0x01f8 # define R300_MC_IND_ADDR_MASK 0x3f @@ -34505,7 +36770,7 @@ index 6e4e383..8d45d7b 100644 #define R300_MC_IND_DATA 0x01fc #define R300_MC_READ_CNTL_AB 0x017c # define R300_MEM_RBS_POSITION_A_MASK 0x03 -@@ -3243,9 +3247,9 @@ +@@ -3243,9 +3305,9 @@ #define RADEON_TV_PLL_FINE_CNTL 0x0020 /* PLL */ #define RADEON_TV_PLL_CNTL 0x0021 /* PLL */ # define RADEON_TV_M0LO_MASK 0xff @@ -34517,7 +36782,7 @@ index 6e4e383..8d45d7b 100644 # define RADEON_TV_N0LO_SHIFT 8 # define RADEON_TV_N0HI_MASK 0x3 # define RADEON_TV_N0HI_SHIFT 21 -@@ -3271,4 +3275,682 @@ +@@ -3271,4 +3333,693 @@ #define RADEON_RS480_UNK_e38 0xe38 #define RADEON_RS480_UNK_e3c 0xe3c @@ -34989,12 +37254,23 @@ index 6e4e383..8d45d7b 100644 +#define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2194 +#define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x2198 + ++#define R600_HDP_NONSURFACE_BASE 0x2c04 ++ +#define R600_BUS_CNTL 0x5420 +#define R600_CONFIG_CNTL 0x5424 +#define R600_CONFIG_MEMSIZE 0x5428 +#define R600_CONFIG_F0_BASE 0x542C +#define R600_CONFIG_APER_SIZE 0x5430 + ++#define R600_BIOS_0_SCRATCH 0x1724 ++#define R600_BIOS_1_SCRATCH 0x1728 ++#define R600_BIOS_2_SCRATCH 0x172c ++#define R600_BIOS_3_SCRATCH 0x1730 ++#define R600_BIOS_4_SCRATCH 0x1734 ++#define R600_BIOS_5_SCRATCH 0x1738 ++#define R600_BIOS_6_SCRATCH 0x173c ++#define R600_BIOS_7_SCRATCH 0x1740 ++ +#define R300_GB_TILE_CONFIG 0x4018 +#define R300_GB_SELECT 0x401c +#define R300_GB_ENABLE 0x4008 diff --git a/xorg-x11-drv-ati.spec b/xorg-x11-drv-ati.spec index b251b35..0424c3e 100644 --- a/xorg-x11-drv-ati.spec +++ b/xorg-x11-drv-ati.spec @@ -5,7 +5,7 @@ Summary: Xorg X11 ati video driver Name: xorg-x11-drv-ati Version: 6.7.197 -Release: 2%{?dist} +Release: 3%{?dist} URL: http://www.x.org License: MIT Group: User Interface/X Hardware Support @@ -84,6 +84,9 @@ rm -rf $RPM_BUILD_ROOT %{_mandir}/man4/radeon.4* %changelog +* Mon Feb 18 2008 Dave Airlie 6.7.197-3 +- rebase to upstream git master - lots of r600 fixes + * Fri Feb 08 2008 Dave Airlie 6.7.197-2 - rebase to upstream git master - add rv67x ids