From cca3d48d01f0134c3d3bc7395c15488e8bb7159e Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Oct 15 2008 07:06:57 +0000 Subject: - modeset - radeon add support for basic r100/r200 EXA - modeset - add Download from screen accel. - radeon-6.9.0-to-git.patch : fix 30" monitor --- diff --git a/radeon-6.9.0-to-git.patch b/radeon-6.9.0-to-git.patch index 20cb98e..96ad34b 100644 --- a/radeon-6.9.0-to-git.patch +++ b/radeon-6.9.0-to-git.patch @@ -2348,7 +2348,7 @@ index a740df8..633c5d3 100644 #define PCI_CHIP_RV630_9581 0x9581 #define PCI_CHIP_RV630_9583 0x9583 diff --git a/src/atombios_crtc.c b/src/atombios_crtc.c -index 363addf..3f2e113 100644 +index 363addf..4e2395f 100644 --- a/src/atombios_crtc.c +++ b/src/atombios_crtc.c @@ -43,11 +43,33 @@ @@ -2430,7 +2430,7 @@ index 363addf..3f2e113 100644 uint32_t temp; - pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; -+ if (mode->Clock > 200000) /* range limits??? */ ++ if (IS_DCE3_VARIANT && mode->Clock > 200000) /* range limits??? */ + pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; + else + pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; @@ -2638,7 +2638,7 @@ index 363addf..3f2e113 100644 + +} diff --git a/src/atombios_output.c b/src/atombios_output.c -index 51be301..a770177 100644 +index 51be301..148a1da 100644 --- a/src/atombios_output.c +++ b/src/atombios_output.c @@ -78,7 +78,7 @@ atombios_output_dac1_setup(xf86OutputPtr output, DisplayModePtr mode) @@ -2822,7 +2822,7 @@ index 51be301..a770177 100644 + disp_data2.ucTemporal = PANEL_ENCODER_TEMPORAL_DITHER_EN; + if (radeon_output->lvds_misc & (1 << 1)) + disp_data2.ucTemporal |= PANEL_ENCODER_TEMPORAL_DITHER_DEPTH; -+ if (((radeon_output->lvds_misc >> 2) & 0x3) == 4) ++ if (((radeon_output->lvds_misc >> 2) & 0x3) == 2) + disp_data2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4; + } + } else { diff --git a/radeon-modeset.patch b/radeon-modeset.patch index aadd48c..45629d4 100644 --- a/radeon-modeset.patch +++ b/radeon-modeset.patch @@ -1,3 +1,15 @@ +commit 6b66d506a63c49abf781c390261c460f2183cd84 +Author: Dave Airlie +Date: Wed Oct 15 17:01:34 2008 +1000 + + radeon: add DFS support for CS + +commit f4f95f0a15308d4a8cb38c1ed73a0edb2e8b906a +Author: airlied +Date: Wed Oct 15 23:55:13 2008 +1000 + + radeon: add r100/r200 support for EXA render + commit d8cbb2f90b4d399c1ce3ac4cfdf79894bae8d06a Author: Dave Airlie Date: Mon Oct 13 16:59:02 2008 +1000 @@ -6058,7 +6070,7 @@ index 0f86fdd..708111d 100644 } #endif diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c -index 62224d0..31323f3 100644 +index 62224d0..5200fa3 100644 --- a/src/radeon_exa_funcs.c +++ b/src/radeon_exa_funcs.c @@ -74,21 +74,69 @@ FUNC_NAME(RADEONSync)(ScreenPtr pScreen, int marker) @@ -6351,14 +6363,156 @@ index 62224d0..31323f3 100644 /* Do we need that sync here ? probably not .... */ exaWaitSync(pDst->drawable.pScreen); -@@ -388,13 +502,17 @@ FUNC_NAME(RADEONDownloadFromScreen)(PixmapPtr pSrc, int x, int y, int w, int h, +@@ -335,14 +449,20 @@ FUNC_NAME(RADEONUploadToScreen)(PixmapPtr pDst, int x, int y, int w, int h, + #ifdef ACCEL_CP + /* Emit blit with arbitrary source and destination offsets and pitches */ + static void +-RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset, ++RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, dri_bo *src_bo, dri_bo *dst_bo, ++ uint32_t src_pitch_offset, + uint32_t dst_pitch_offset, int srcX, int srcY, int dstX, int dstY, + int w, int h) + { + RADEONInfoPtr info = RADEONPTR(pScrn); ++ uint32_t qwords; + ACCEL_PREAMBLE(); + +- BEGIN_ACCEL(6); ++ qwords = 6; ++ if (src_bo && dst_bo) ++ qwords += 4; ++ ++ BEGIN_ACCEL(qwords); + OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, + RADEON_GMC_DST_PITCH_OFFSET_CNTL | + RADEON_GMC_SRC_PITCH_OFFSET_CNTL | +@@ -353,8 +473,14 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset, + RADEON_DP_SRC_SOURCE_MEMORY | + RADEON_GMC_CLR_CMP_CNTL_DIS | + RADEON_GMC_WR_MSK_DIS); ++ + OUT_ACCEL_REG(RADEON_SRC_PITCH_OFFSET, src_pitch_offset); ++ if (src_bo) ++ OUT_RELOC(src_bo, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); + OUT_ACCEL_REG(RADEON_DST_PITCH_OFFSET, dst_pitch_offset); ++ if (dst_bo) ++ OUT_RELOC(dst_bo, 0, RADEON_GEM_DOMAIN_GTT); ++ + OUT_ACCEL_REG(RADEON_SRC_Y_X, (srcY << 16) | srcX); + OUT_ACCEL_REG(RADEON_DST_Y_X, (dstY << 16) | dstX); + OUT_ACCEL_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w); +@@ -365,6 +491,104 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset, + RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_DMA_GUI_IDLE); + FINISH_ACCEL(); + } ++ ++static Bool ++RADEON_DFS_CS(PixmapPtr pSrc, int x, int y, int w, int h, ++ char *dst, int dst_pitch) ++{ ++ RINFO_FROM_SCREEN(pSrc->drawable.pScreen); ++ struct radeon_exa_pixmap_priv *driver_priv; ++ dri_bo *scratch_bo[2]; ++ int i, ret; ++ uint32_t scratch_size = RADEON_BUFFER_SIZE / 2; ++ int bpp = pSrc->drawable.bitsPerPixel; ++ uint32_t scratch_pitch = (w * bpp/8 + 63) & ~63, scratch_off = 0; ++ uint32_t datatype; ++ int src_pitch = exaGetPixmapPitch(pSrc); ++ dri_bo *cur_scratch; ++ uint32_t src_pitch_offset; ++ ++ driver_priv = exaGetPixmapDriverPrivate(pSrc); ++ ++ RADEONGetDatatypeBpp(bpp, &datatype); ++ scratch_bo[0] = scratch_bo[1] = NULL; ++ for (i = 0; i < 2; i++) { ++ scratch_bo[i] = dri_bo_alloc(info->bufmgr, "DFS scratch", scratch_size, 0, 0); ++ if (!scratch_bo[i]) ++ goto fail; ++ } ++ ++ ++ /* we want to blit from the BO to the scratch and memcpy out of the scratch */ ++ { ++ int wpass = wpass = w * bpp / 8; ++ int hpass = min(h, scratch_size / scratch_pitch); ++ uint32_t pitch_offset = scratch_pitch << 16; ++ ++ RADEONGetPixmapOffsetPitch(pSrc, &src_pitch_offset); ++ ++ ACCEL_PREAMBLE(); ++ RADEON_SWITCH_TO_2D(); ++ ++ cur_scratch = scratch_bo[0]; ++ RADEONBlitChunk(pScrn, datatype, driver_priv->bo, cur_scratch, src_pitch_offset, ++ pitch_offset, ++ x, y, 0, 0, w, hpass); ++ ++ FLUSH_RING(); ++ ++ while (h) { ++ int swap = RADEON_HOST_DATA_SWAP_NONE; ++ int oldhpass = hpass, i = 0; ++ dri_bo *old_scratch; ++ uint8_t *src; ++ ++ old_scratch = cur_scratch; ++ y += oldhpass; ++ h -= oldhpass; ++ hpass = min(h, scratch_size / scratch_pitch); ++ if (hpass) { ++ if (cur_scratch == scratch_bo[0]) ++ cur_scratch = scratch_bo[1]; ++ else ++ cur_scratch = scratch_bo[0]; ++ ++ RADEONBlitChunk(pScrn, datatype, driver_priv->bo, cur_scratch, src_pitch_offset, ++ pitch_offset, ++ x, y, 0, 0, w, hpass); ++ } ++ ++ ret = dri_bo_map(old_scratch, 0); ++ ++ if (hpass) ++ FLUSH_RING(); ++ ++ src = old_scratch->virtual; ++ ++ if (wpass == scratch_pitch && wpass == dst_pitch) { ++ RADEONCopySwap((uint8_t*)dst, src, wpass * oldhpass, swap); ++ dst += dst_pitch * oldhpass; ++ } else while (oldhpass--) { ++ RADEONCopySwap((uint8_t*)dst, src, wpass, swap); ++ src += scratch_pitch; ++ dst += dst_pitch; ++ } ++ dri_bo_unmap(old_scratch); ++ } ++ ++ dri_bo_unreference(scratch_bo[0]); ++ dri_bo_unreference(scratch_bo[1]); ++ return TRUE; ++ } ++ ++ ++ fail: ++ if (scratch_bo[0]) ++ dri_bo_unreference(scratch_bo[0]); ++ if (scratch_bo[1]) ++ dri_bo_unreference(scratch_bo[1]); ++ return FALSE; ++} + #endif + static Bool +@@ -389,12 +613,16 @@ FUNC_NAME(RADEONDownloadFromScreen)(PixmapPtr pSrc, int x, int y, int w, int h, TRACE; -+ if (info->drm_mode_setting) -+ src = info->mm.front_buffer->map + exaGetPixmapOffset(pSrc); -+ #ifdef ACCEL_CP ++ ++ if (info->new_cs) ++ return RADEON_DFS_CS(pSrc, x, y, w, h, dst, dst_pitch); /* * Try to accelerate download. Use an indirect buffer as scratch space, * blitting the bits to one half while copying them out of the other one and @@ -6370,14 +6524,29 @@ index 62224d0..31323f3 100644 RADEONGetPixmapOffsetPitch(pSrc, &src_pitch_offset) && (scratch = RADEONCPGetBuffer(pScrn))) { -@@ -541,16 +659,21 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) - info->accel_state->exa->MarkSync = FUNC_NAME(RADEONMarkSync); - info->accel_state->exa->WaitMarker = FUNC_NAME(RADEONSync); +@@ -409,7 +637,8 @@ FUNC_NAME(RADEONDownloadFromScreen)(PixmapPtr pSrc, int x, int y, int w, int h, + RADEON_SWITCH_TO_2D(); + + /* Kick the first blit as early as possible */ +- RADEONBlitChunk(pScrn, datatype, src_pitch_offset, scratch_pitch_offset, ++ RADEONBlitChunk(pScrn, datatype, NULL, NULL, ++ src_pitch_offset, scratch_pitch_offset, + x, y, 0, 0, w, hpass); + FLUSH_RING(); + +@@ -436,7 +665,8 @@ FUNC_NAME(RADEONDownloadFromScreen)(PixmapPtr pSrc, int x, int y, int w, int h, + /* Prepare next blit if anything's left */ + if (hpass) { + scratch_off = scratch->total/2 - scratch_off; +- RADEONBlitChunk(pScrn, datatype, src_pitch_offset, scratch_pitch_offset + (scratch_off >> 10), ++ RADEONBlitChunk(pScrn, datatype, NULL, NULL, ++ src_pitch_offset, scratch_pitch_offset + (scratch_off >> 10), + x, y, 0, 0, w, hpass); + } + +@@ -543,14 +773,17 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) info->accel_state->exa->UploadToScreen = FUNC_NAME(RADEONUploadToScreen); -- info->accel_state->exa->DownloadFromScreen = FUNC_NAME(RADEONDownloadFromScreen); -+ if (!info->drm_mm) { -+ info->accel_state->exa->DownloadFromScreen = FUNC_NAME(RADEONDownloadFromScreen); -+ } + info->accel_state->exa->DownloadFromScreen = FUNC_NAME(RADEONDownloadFromScreen); -#if X_BYTE_ORDER == X_BIG_ENDIAN info->accel_state->exa->PrepareAccess = RADEONPrepareAccess; @@ -6396,7 +6565,7 @@ index 62224d0..31323f3 100644 #ifdef RENDER if (info->RenderAccel) { -@@ -560,7 +683,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) +@@ -560,7 +793,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) else if (IS_R300_3D || IS_R500_3D) { if ((info->ChipFamily < CHIP_FAMILY_RS400) #ifdef XF86DRI @@ -6405,7 +6574,7 @@ index 62224d0..31323f3 100644 #endif ) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Render acceleration " -@@ -595,6 +718,16 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) +@@ -595,6 +828,16 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) } #endif @@ -6423,10 +6592,33 @@ index 62224d0..31323f3 100644 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting EXA maxPitchBytes\n"); diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c -index 97199ae..de89ad5 100644 +index 97199ae..863d213 100644 --- a/src/radeon_exa_render.c +++ b/src/radeon_exa_render.c -@@ -406,19 +406,22 @@ static Bool FUNC_NAME(R100TextureSetup)(PicturePtr pPict, PixmapPtr pPix, +@@ -355,12 +355,14 @@ static Bool FUNC_NAME(R100TextureSetup)(PicturePtr pPict, PixmapPtr pPix, + Bool repeat = pPict->repeat && + !(unit == 0 && (info->accel_state->need_src_tile_x || info->accel_state->need_src_tile_y)); + int i; ++ struct radeon_exa_pixmap_priv *driver_priv; ++ int qwords; + ACCEL_PREAMBLE(); + + txpitch = exaGetPixmapPitch(pPix); +- txoffset = exaGetPixmapOffset(pPix) + info->fbLocation + pScrn->fbOffset; ++ txoffset = exaGetPixmapOffset(pPix); + +- if ((txoffset & 0x1f) != 0) ++ if (!info->new_cs && ((txoffset & 0x1f) != 0)) + RADEON_FALLBACK(("Bad texture offset 0x%x\n", (int)txoffset)); + if ((txpitch & 0x1f) != 0) + RADEON_FALLBACK(("Bad texture pitch 0x%x\n", (int)txpitch)); +@@ -402,23 +404,43 @@ static Bool FUNC_NAME(R100TextureSetup)(PicturePtr pPict, PixmapPtr pPix, + if (repeat) + txfilter |= RADEON_CLAMP_S_WRAP | RADEON_CLAMP_T_WRAP; + +- BEGIN_ACCEL(5); ++ qwords = info->new_cs ? 7 : 5; ++ BEGIN_ACCEL(qwords); if (unit == 0) { OUT_ACCEL_REG(RADEON_PP_TXFILTER_0, txfilter); OUT_ACCEL_REG(RADEON_PP_TXFORMAT_0, txformat); @@ -6435,7 +6627,15 @@ index 97199ae..de89ad5 100644 (pPix->drawable.width - 1) | ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); OUT_ACCEL_REG(RADEON_PP_TEX_PITCH_0, txpitch - 32); -+ OUT_ACCEL_REG(RADEON_PP_TXOFFSET_0, txoffset); ++ ++ if (info->new_cs) { ++ driver_priv = exaGetPixmapDriverPrivate(pPix); ++ OUT_ACCEL_REG(RADEON_PP_TXOFFSET_0, 0); ++ OUT_RELOC(driver_priv->bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); ++ } else { ++ txoffset += info->fbLocation + pScrn->fbOffset; ++ OUT_ACCEL_REG(RADEON_PP_TXOFFSET_0, txoffset); ++ } + /* emit a texture relocation */ } else { OUT_ACCEL_REG(RADEON_PP_TXFILTER_1, txfilter); @@ -6446,28 +6646,187 @@ index 97199ae..de89ad5 100644 (pPix->drawable.width - 1) | ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); OUT_ACCEL_REG(RADEON_PP_TEX_PITCH_1, txpitch - 32); -+ OUT_ACCEL_REG(RADEON_PP_TXOFFSET_1, txoffset); ++ if (info->new_cs) { ++ driver_priv = exaGetPixmapDriverPrivate(pPix); ++ OUT_ACCEL_REG(RADEON_PP_TXOFFSET_1, 0); ++ OUT_RELOC(driver_priv->bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); ++ } else { ++ txoffset += info->fbLocation + pScrn->fbOffset; ++ OUT_ACCEL_REG(RADEON_PP_TXOFFSET_1, txoffset); ++ } ++ + /* emit a texture relocation */ } FINISH_ACCEL(); -@@ -727,6 +730,7 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix, +@@ -523,6 +545,8 @@ static Bool FUNC_NAME(R100PrepareComposite)(int op, + uint32_t dst_format, dst_offset, dst_pitch, colorpitch; + uint32_t pp_cntl, blendcntl, cblend, ablend; + int pixel_shift; ++ struct radeon_exa_pixmap_priv *driver_priv; ++ int qwords; + ACCEL_PREAMBLE(); + + TRACE; +@@ -540,15 +564,13 @@ static Bool FUNC_NAME(R100PrepareComposite)(int op, + + pixel_shift = pDst->drawable.bitsPerPixel >> 4; + +- dst_offset = exaGetPixmapOffset(pDst) + info->fbLocation + pScrn->fbOffset; ++ dst_offset = exaGetPixmapOffset(pDst); + dst_pitch = exaGetPixmapPitch(pDst); + colorpitch = dst_pitch >> pixel_shift; + if (RADEONPixmapIsColortiled(pDst)) + colorpitch |= RADEON_COLOR_TILE_ENABLE; + +- dst_offset = exaGetPixmapOffset(pDst) + info->fbLocation + pScrn->fbOffset; +- dst_pitch = exaGetPixmapPitch(pDst); +- if ((dst_offset & 0x0f) != 0) ++ if (!info->new_cs && (dst_offset & 0x0f) != 0) + RADEON_FALLBACK(("Bad destination offset 0x%x\n", (int)dst_offset)); + if (((dst_pitch >> pixel_shift) & 0x7) != 0) + RADEON_FALLBACK(("Bad destination pitch 0x%x\n", (int)dst_pitch)); +@@ -569,11 +591,19 @@ static Bool FUNC_NAME(R100PrepareComposite)(int op, + } + + RADEON_SWITCH_TO_3D(); +- +- BEGIN_ACCEL(8); ++ ++ qwords = info->new_cs ? 10 : 8; ++ BEGIN_ACCEL(qwords); + OUT_ACCEL_REG(RADEON_PP_CNTL, pp_cntl); + OUT_ACCEL_REG(RADEON_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE); +- OUT_ACCEL_REG(RADEON_RB3D_COLOROFFSET, dst_offset); ++ if (info->new_cs) { ++ driver_priv = exaGetPixmapDriverPrivate(pDst); ++ OUT_ACCEL_REG(RADEON_RB3D_COLOROFFSET, 0); ++ OUT_RELOC(driver_priv->bo, 0, RADEON_GEM_DOMAIN_VRAM); ++ } else { ++ dst_offset += info->fbLocation + pScrn->fbOffset; ++ OUT_ACCEL_REG(RADEON_RB3D_COLOROFFSET, dst_offset); ++ } + OUT_ACCEL_REG(RADEON_RB3D_COLORPITCH, colorpitch); + + /* IN operator: Multiply src by mask components or mask alpha. +@@ -669,13 +699,17 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix, + Bool repeat = pPict->repeat && + !(unit == 0 && (info->accel_state->need_src_tile_x || info->accel_state->need_src_tile_y)); + int i; ++ struct radeon_exa_pixmap_priv *driver_priv; ++ int qwords; + ACCEL_PREAMBLE(); + + txpitch = exaGetPixmapPitch(pPix); +- txoffset = exaGetPixmapOffset(pPix) + info->fbLocation + pScrn->fbOffset; ++ txoffset = exaGetPixmapOffset(pPix); + +- if ((txoffset & 0x1f) != 0) +- RADEON_FALLBACK(("Bad texture offset 0x%x\n", (int)txoffset)); ++ if (!info->new_cs) { ++ if ((txoffset & 0x1f) != 0) ++ RADEON_FALLBACK(("Bad texture offset 0x%x\n", (int)txoffset)); ++ } + if ((txpitch & 0x1f) != 0) + RADEON_FALLBACK(("Bad texture pitch 0x%x\n", (int)txpitch)); + +@@ -718,7 +752,8 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix, + if (repeat) + txfilter |= R200_CLAMP_S_WRAP | R200_CLAMP_T_WRAP; + +- BEGIN_ACCEL(6); ++ qwords = info->new_cs ? 8 : 6; ++ BEGIN_ACCEL(qwords); + if (unit == 0) { + OUT_ACCEL_REG(R200_PP_TXFILTER_0, txfilter); + OUT_ACCEL_REG(R200_PP_TXFORMAT_0, txformat); +@@ -726,7 +761,15 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix, + OUT_ACCEL_REG(R200_PP_TXSIZE_0, (pPix->drawable.width - 1) | ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); OUT_ACCEL_REG(R200_PP_TXPITCH_0, txpitch - 32); - OUT_ACCEL_REG(R200_PP_TXOFFSET_0, txoffset); -+ /* emit a texture relocation */ +- OUT_ACCEL_REG(R200_PP_TXOFFSET_0, txoffset); ++ if (info->new_cs) { ++ driver_priv = exaGetPixmapDriverPrivate(pPix); ++ ++ OUT_ACCEL_REG(R200_PP_TXOFFSET_0, driver_priv ? 0 : txoffset); ++ OUT_RELOC(driver_priv->bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); ++ } else { ++ txoffset += info->fbLocation + pScrn->fbOffset; ++ OUT_ACCEL_REG(R200_PP_TXOFFSET_0, txoffset); ++ } } else { OUT_ACCEL_REG(R200_PP_TXFILTER_1, txfilter); OUT_ACCEL_REG(R200_PP_TXFORMAT_1, txformat); -@@ -735,6 +739,7 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix, +@@ -734,7 +777,17 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix, + OUT_ACCEL_REG(R200_PP_TXSIZE_1, (pPix->drawable.width - 1) | ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); OUT_ACCEL_REG(R200_PP_TXPITCH_1, txpitch - 32); - OUT_ACCEL_REG(R200_PP_TXOFFSET_1, txoffset); +- OUT_ACCEL_REG(R200_PP_TXOFFSET_1, txoffset); ++ if (info->new_cs) { ++ uint32_t handle = 0; ++ driver_priv = exaGetPixmapDriverPrivate(pPix); ++ ++ OUT_ACCEL_REG(R200_PP_TXOFFSET_1, driver_priv ? 0 : txoffset); ++ OUT_RELOC(driver_priv->bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); ++ } else { ++ txoffset += info->fbLocation + pScrn->fbOffset; ++ OUT_ACCEL_REG(R200_PP_TXOFFSET_1, txoffset); ++ } + /* emit a texture relocation */ } FINISH_ACCEL(); -@@ -999,15 +1004,19 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix, +@@ -823,6 +876,8 @@ static Bool FUNC_NAME(R200PrepareComposite)(int op, PicturePtr pSrcPicture, + uint32_t dst_format, dst_offset, dst_pitch; + uint32_t pp_cntl, blendcntl, cblend, ablend, colorpitch; + int pixel_shift; ++ struct radeon_exa_pixmap_priv *driver_priv; ++ int qwords; + ACCEL_PREAMBLE(); + + TRACE; +@@ -840,13 +895,13 @@ static Bool FUNC_NAME(R200PrepareComposite)(int op, PicturePtr pSrcPicture, + + pixel_shift = pDst->drawable.bitsPerPixel >> 4; + +- dst_offset = exaGetPixmapOffset(pDst) + info->fbLocation + pScrn->fbOffset; ++ dst_offset = exaGetPixmapOffset(pDst); + dst_pitch = exaGetPixmapPitch(pDst); + colorpitch = dst_pitch >> pixel_shift; + if (RADEONPixmapIsColortiled(pDst)) + colorpitch |= RADEON_COLOR_TILE_ENABLE; + +- if ((dst_offset & 0x0f) != 0) ++ if (!info->new_cs && (dst_offset & 0x0f) != 0) + RADEON_FALLBACK(("Bad destination offset 0x%x\n", (int)dst_offset)); + if (((dst_pitch >> pixel_shift) & 0x7) != 0) + RADEON_FALLBACK(("Bad destination pitch 0x%x\n", (int)dst_pitch)); +@@ -868,11 +923,22 @@ static Bool FUNC_NAME(R200PrepareComposite)(int op, PicturePtr pSrcPicture, + + RADEON_SWITCH_TO_3D(); + +- BEGIN_ACCEL(11); ++ qwords = info->new_cs ? 13 : 11; ++ BEGIN_ACCEL(qwords); + + OUT_ACCEL_REG(RADEON_PP_CNTL, pp_cntl); + OUT_ACCEL_REG(RADEON_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE); +- OUT_ACCEL_REG(RADEON_RB3D_COLOROFFSET, dst_offset); ++ ++ if (info->new_cs) { ++ driver_priv = exaGetPixmapDriverPrivate(pDst); ++ assert(driver_priv); ++ ++ OUT_ACCEL_REG(RADEON_RB3D_COLOROFFSET, 0); ++ OUT_RELOC(driver_priv->bo, 0, RADEON_GEM_DOMAIN_VRAM); ++ } else { ++ dst_offset += info->fbLocation + pScrn->fbOffset; ++ OUT_ACCEL_REG(RADEON_RB3D_COLOROFFSET, dst_offset); ++ } + + OUT_ACCEL_REG(R200_SE_VTX_FMT_0, R200_VTX_XY); + if (pMask) +@@ -999,15 +1065,19 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix, int w = pPict->pDrawable->width; int h = pPict->pDrawable->height; int i, pixel_shift; @@ -6490,7 +6849,7 @@ index 97199ae..de89ad5 100644 if ((txpitch & 0x1f) != 0) RADEON_FALLBACK(("Bad texture pitch 0x%x\n", (int)txpitch)); -@@ -1068,13 +1077,26 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix, +@@ -1068,13 +1138,26 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix, RADEON_FALLBACK(("Bad filter 0x%x\n", pPict->filter)); } @@ -6519,7 +6878,7 @@ index 97199ae..de89ad5 100644 if (!pPict->repeat) OUT_ACCEL_REG(R300_TX_BORDER_COLOR_0 + (unit * 4), 0); FINISH_ACCEL(); -@@ -1184,6 +1206,8 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, +@@ -1184,6 +1267,8 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, uint32_t txenable, colorpitch; uint32_t blendcntl; int pixel_shift; @@ -6528,7 +6887,7 @@ index 97199ae..de89ad5 100644 ACCEL_PREAMBLE(); TRACE; -@@ -1201,7 +1225,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, +@@ -1201,7 +1286,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, pixel_shift = pDst->drawable.bitsPerPixel >> 4; @@ -6537,7 +6896,7 @@ index 97199ae..de89ad5 100644 dst_pitch = exaGetPixmapPitch(pDst); colorpitch = dst_pitch >> pixel_shift; -@@ -1210,7 +1234,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, +@@ -1210,7 +1295,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, colorpitch |= dst_format; @@ -6546,7 +6905,7 @@ index 97199ae..de89ad5 100644 RADEON_FALLBACK(("Bad destination offset 0x%x\n", (int)dst_offset)); if (((dst_pitch >> pixel_shift) & 0x7) != 0) RADEON_FALLBACK(("Bad destination pitch 0x%x\n", (int)dst_pitch)); -@@ -1829,9 +1853,18 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, +@@ -1829,9 +1914,18 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, FINISH_ACCEL(); } diff --git a/xorg-x11-drv-ati.spec b/xorg-x11-drv-ati.spec index 18ad231..5f0c2df 100644 --- a/xorg-x11-drv-ati.spec +++ b/xorg-x11-drv-ati.spec @@ -5,7 +5,7 @@ Summary: Xorg X11 ati video driver Name: xorg-x11-drv-ati Version: 6.9.0 -Release: 26%{?dist} +Release: 27%{?dist} URL: http://www.x.org License: MIT Group: User Interface/X Hardware Support @@ -72,6 +72,11 @@ rm -rf $RPM_BUILD_ROOT %{_mandir}/man4/radeon.4* %changelog +* Wed Oct 15 2008 Dave Airlie 6.9.0-27 +- modeset - radeon add support for basic r100/r200 EXA +- modeset - add Download from screen accel. +- radeon-6.9.0-to-git.patch : fix 30" monitor + * Mon Oct 13 2008 Dave Airlie 6.9.0-26 - radeon-modeset.patch - fix nexuiz mode switch - remove unused reuse code