From e1be4777841e0d96027d723012ed57176c01178d Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Apr 16 2009 08:18:34 +0000 Subject: - radeon-modeset.patch: fix stupid idle drawing corrupt since mmap cache --- diff --git a/radeon-modeset-zaphod.patch b/radeon-modeset-zaphod.patch deleted file mode 100644 index 473f7b0..0000000 --- a/radeon-modeset-zaphod.patch +++ /dev/null @@ -1,190 +0,0 @@ -diff --git a/src/drmmode_display.c b/src/drmmode_display.c -index 2e68744..a0527c0 100644 ---- a/src/drmmode_display.c -+++ b/src/drmmode_display.c -@@ -188,6 +188,8 @@ void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode) - } - - src = create_pixmap_for_fbcon(drmmode, pScrn, crtc_id); -+ if (!src) -+ return; - - dst = GetScratchPixmapHeader(pScreen, - pScrn->virtualX, pScrn->virtualY, -@@ -450,6 +452,13 @@ drmmode_crtc_shadow_destroy(xf86CrtcPtr crtc, PixmapPtr rotate_pixmap, void *dat - - } - -+static void -+drmmode_crtc_gamma_set(xf86CrtcPtr crtc, uint16_t *red, uint16_t *green, -+ uint16_t *blue, int size) -+{ -+ return; -+} -+ - static const xf86CrtcFuncsRec drmmode_crtc_funcs = { - .dpms = drmmode_crtc_dpms, - .set_mode_major = drmmode_set_mode_major, -@@ -459,12 +468,10 @@ static const xf86CrtcFuncsRec drmmode_crtc_funcs = { - .hide_cursor = drmmode_hide_cursor, - .load_cursor_argb = drmmode_load_cursor_argb, - -+ .gamma_set = drmmode_crtc_gamma_set, - .shadow_create = drmmode_crtc_shadow_create, - .shadow_allocate = drmmode_crtc_shadow_allocate, - .shadow_destroy = drmmode_crtc_shadow_destroy, --#if 0 -- .gamma_set = i830_crtc_gamma_set, --#endif - .destroy = NULL, /* XXX */ - }; - -@@ -804,24 +811,31 @@ static const xf86CrtcConfigFuncsRec drmmode_xf86crtc_config_funcs = { - }; - - --Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, char *busId, char *driver_name, int cpp) -+Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, char *busId, char *driver_name, int cpp, int zaphod_mask) - { - xf86CrtcConfigPtr xf86_config; -+ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); - int i; - Bool ret; - - /* Create a bus Id */ - /* Low level DRM open */ -- ret = DRIOpenDRMMaster(pScrn, SAREA_MAX, busId, driver_name); -- if (!ret) { -+ if (!pRADEONEnt->fd) { -+ ret = DRIOpenDRMMaster(pScrn, SAREA_MAX, busId, driver_name); -+ if (!ret) { -+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, -+ "[dri] DRIGetVersion failed to open the DRM\n" -+ "[dri] Disabling DRI.\n"); -+ return FALSE; -+ } -+ -+ drmmode->fd = DRIMasterFD(pScrn); -+ pRADEONEnt->fd = drmmode->fd; -+ } else { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, -- "[dri] DRIGetVersion failed to open the DRM\n" -- "[dri] Disabling DRI.\n"); -- return FALSE; -+ " reusing fd for second head\n"); -+ drmmode->fd = pRADEONEnt->fd; - } -- -- drmmode->fd = DRIMasterFD(pScrn); -- - xf86CrtcConfigInit(pScrn, &drmmode_xf86crtc_config_funcs); - xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); - -@@ -832,10 +846,12 @@ Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, char *busId, char - - xf86CrtcSetSizeRange(pScrn, 320, 200, drmmode->mode_res->max_width, drmmode->mode_res->max_height); - for (i = 0; i < drmmode->mode_res->count_crtcs; i++) -- drmmode_crtc_init(pScrn, drmmode, i); -+ if (zaphod_mask & (1 << i)) -+ drmmode_crtc_init(pScrn, drmmode, i); - - for (i = 0; i < drmmode->mode_res->count_connectors; i++) -- drmmode_output_init(pScrn, drmmode, i); -+ if (zaphod_mask & (1 << i)) -+ drmmode_output_init(pScrn, drmmode, i); - - xf86InitialConfiguration(pScrn, TRUE); - -diff --git a/src/drmmode_display.h b/src/drmmode_display.h -index cb72f9f..337288a 100644 ---- a/src/drmmode_display.h -+++ b/src/drmmode_display.h -@@ -62,7 +62,7 @@ typedef struct { - } drmmode_output_private_rec, *drmmode_output_private_ptr; - - --extern Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, char *busId, char *driver_name, int cpp); -+extern Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, char *busId, char *driver_name, int cpp, int zaphod_mask); - extern Bool drmmode_set_bufmgr(ScrnInfoPtr pScrn, drmmode_ptr drmmode, dri_bufmgr *bufmgr); - extern void drmmode_set_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int width, int height, int pitch, dri_bo *bo); - extern void drmmode_set_cursor(ScrnInfoPtr scrn, drmmode_ptr drmmode, int id, dri_bo *bo); -diff --git a/src/radeon_driver.c b/src/radeon_driver.c -index 41ead39..5bd192b 100644 ---- a/src/radeon_driver.c -+++ b/src/radeon_driver.c -@@ -3145,11 +3145,18 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) - } else { - #ifdef XF86DRM_MODE - char *bus_id; -- if (!radeon_alloc_dri(pScrn)) -+ int zaphod_mask; -+ if (!radeon_alloc_dri(pScrn)) - return FALSE; - -+ zaphod_mask = 0xf; -+ if (info->IsPrimary) -+ zaphod_mask = 0xd; -+ if (info->IsSecondary) -+ zaphod_mask = 0x2; -+ - bus_id = DRICreatePCIBusID(info->PciInfo); -- if (drmmode_pre_init(pScrn, &info->drmmode, bus_id, "radeon", pScrn->bitsPerPixel / 8) == FALSE) { -+ if (drmmode_pre_init(pScrn, &info->drmmode, bus_id, "radeon", pScrn->bitsPerPixel / 8, zaphod_mask) == FALSE) { - xfree(bus_id); - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Kernel modesetting setup failed\n"); - goto fail; -diff --git a/src/radeon_memory.c b/src/radeon_memory.c -index 2f2b2fd..cded7e7 100644 ---- a/src/radeon_memory.c -+++ b/src/radeon_memory.c -@@ -19,14 +19,9 @@ Bool radeon_setup_kernel_mem(ScreenPtr pScreen) - int screen_size; - int stride = pScrn->displayWidth * cpp; - int total_size_bytes = 0, remain_size_bytes; -- int fb_size_bytes; - int pagesize = 4096; - - screen_size = RADEON_ALIGN(pScrn->virtualY, 16) * stride; -- -- ErrorF("%d x %d x %d = %dK\n", pScrn->displayWidth, pScrn->virtualY, cpp, screen_size / 1024); -- -- - { - int cursor_size = 64 * 4 * 64; - int c; -@@ -57,23 +52,6 @@ Bool radeon_setup_kernel_mem(ScreenPtr pScreen) - remain_size_bytes = info->mm.vram_size - total_size_bytes; - - info->dri->textureSize = 0; --#if 0 -- if (info->dri->textureSize > 0) -- info->dri->textureSize = (remain_size_bytes / 100) * info->dri->textureSize; -- else -- info->dri->textureSize = remain_size_bytes / 2; -- -- info->dri->textureSize = RADEON_ALIGN(info->dri->textureSize, pagesize); -- -- remain_size_bytes -= info->dri->textureSize; --#endif -- -- ErrorF("texture size is %dK, exa is %dK\n", info->dri->textureSize / 1024, remain_size_bytes/1024); -- -- -- fb_size_bytes = screen_size; -- -- ErrorF("fb size is %dK %dK\n", fb_size_bytes / 1024, total_size_bytes / 1024); - - info->mm.front_buffer = dri_bo_alloc(info->bufmgr, "front", screen_size, - 0, RADEON_GEM_DOMAIN_VRAM); -diff --git a/src/radeon_probe.h b/src/radeon_probe.h -index e860388..badd361 100644 ---- a/src/radeon_probe.h -+++ b/src/radeon_probe.h -@@ -611,6 +611,7 @@ typedef struct - RADEONSaveRec SavedReg; /* Original (text) mode */ - - void *MMIO; /* Map of MMIO region */ -+ int fd; - } RADEONEntRec, *RADEONEntPtr; - - /* radeon_probe.c */ diff --git a/radeon-modeset.patch b/radeon-modeset.patch index 5cbd33a..136d6f4 100644 --- a/radeon-modeset.patch +++ b/radeon-modeset.patch @@ -1,6 +1,1084 @@ -diff -up xf86-video-ati-6.12.2/configure.ac.dave xf86-video-ati-6.12.2/configure.ac ---- xf86-video-ati-6.12.2/configure.ac.dave 2009-04-09 00:29:53.000000000 +1000 -+++ xf86-video-ati-6.12.2/configure.ac 2009-04-15 12:46:30.000000000 +1000 +commit 4f6eff7a49eb66bb701eda8f378a94c9dc7478f2 +Author: Dave Airlie +Date: Thu Apr 16 18:03:03 2009 +1000 + + radeon: make drmmode palette code + + valgrind pointed out I'd missed this before. + + still some work left to do + +commit f2f1862719dd3438d96822bdd0dd8863321a15d0 +Author: Dave Airlie +Date: Thu Apr 16 16:32:21 2009 +1000 + + radeon: change wait idle return code. + + this returns EBUSY which may or may not be the coorect answer + +commit c2ec15d95b27fa28bb01bd915110574a745e5567 +Author: Dave Airlie +Date: Wed Apr 15 21:28:31 2009 +1000 + + radeon: remove some unneeded comments + +commit d3b5de69ea1283e0949d10d4bcbe260dad4f1066 +Author: Dave Airlie +Date: Wed Apr 15 17:21:57 2009 +1000 + + radeon: todo gamma crtc set + +commit 9bc652046201fb67d2f96569137f50120c578c3f +Author: Dave Airlie +Date: Wed Apr 15 17:13:40 2009 +1000 + + radeon: add zaphod support for kms + + wow that was a lot easier than I thought + +commit d8c115adcaf6e8775d812c3f6e94f894920d47b2 +Author: Dave Airlie +Date: Wed Apr 15 12:39:39 2009 +1000 + + radeon: fixup bo map caching hopefully + +commit ebd92d5ba4c19cd0af0a237d4367ae0cda63d1e1 +Author: Dave Airlie +Date: Wed Apr 15 12:04:19 2009 +1000 + + radeon: fix kms rotation properly + +commit 356083345a8c8b2b75e62c0c0643855fb05c9f38 +Author: Dave Airlie +Date: Wed Apr 15 11:37:33 2009 +1000 + + radeon: remove pointless memory/bo abstraction + +commit a322a475ed97d0ee212ea136b0387f49e1103026 +Author: Dave Airlie +Date: Tue Apr 7 11:17:46 2009 +1000 + + radeon: cache mmaps + +commit add7f96a096ac2403aae259a5a457137207015d4 +Author: Dave Airlie +Date: Tue Apr 7 10:48:48 2009 +1000 + + radeon: mismerge accel dfs only if we have non-agp + +commit 982598d830691cd1b39e5aa2c9c409786e059fd3 +Author: Dave Airlie +Date: Tue Apr 7 09:15:08 2009 +1000 + + radeon: remove function + +commit 41fbe7ce72bf978092dd4f6d0410178cc21e441f +Author: Dave Airlie +Date: Mon Apr 6 18:39:27 2009 +1000 + + radeon: add config.h to fix mmap + +commit bb15e058079254a88a2194d70659f6694f59262f +Author: Dave Airlie +Date: Mon Apr 6 15:19:13 2009 +1000 + + radeon: drop lots of unused code + +commit 8695b9394e5597d393007165552f8cd77ca55002 +Author: Dave Airlie +Date: Mon Apr 6 13:03:46 2009 +1000 + + radeon: fixup mmap for new kernel API + +commit 783f402a7b248f1aea9c8f267a3a69e1f95bdc8b +Author: Dave Airlie +Date: Mon Apr 6 10:18:41 2009 +1000 + + radeon DDX: update API + +commit 9c81d3fb250610c1979122ff50bd8b4173b9547a +Author: Dave Airlie +Date: Sun Apr 5 11:11:19 2009 +1000 + + radeon: fix compile + +commit 842c290e17d2096a82319731afc1e043aa8e1df4 +Author: Dave Airlie +Date: Fri Apr 3 20:34:05 2009 +1100 + + r600: fix src offsets after kms changes + +commit af04b0d061123ccb763975c368fb0dda38977fe6 +Author: Dave Airlie +Date: Wed Apr 1 21:55:46 2009 +1000 + + radeon: fix r100/r200 xv better + +commit 666f8ee5f9201282e3a2f2b02e1c9699e8bf9b82 +Author: Dave Airlie +Date: Wed Apr 1 18:14:27 2009 +1000 + + radeon: fixup textured video hopefully for kms + +commit d50d3ab2d09a15dab26698450bc1b900fd421682 +Author: Dave Airlie +Date: Wed Apr 1 17:12:05 2009 +1000 + + radeon: make FUS work with DRI2 + +commit 63f5c44278db2e42286402ab507c9494665084a6 +Author: Dave Airlie +Date: Wed Mar 25 14:02:42 2009 +1000 + + reenable UTS + +commit 21db8c83ff6c6b66c0d4b1f3ae35e642fb19b66d +Author: Dave Airlie +Date: Wed Mar 25 13:57:18 2009 +1000 + + radeon: remove drm_mm paths, assume mm = kms for now + +commit 0d598ea813c2422ed16d0020ecc04a15438e917f +Author: Dave Airlie +Date: Tue Mar 24 15:35:53 2009 +1000 + + radeon: fix mismerge in kms paths + +commit 7a6cf9ade0f6ce5416aa635a8518b25d58cf32a8 +Author: Adam Jackson +Date: Fri Mar 13 14:04:59 2009 +1000 + + radeon: make shadowfb run on kms r600 + +commit 6d24c7a78c346086c6cca889b599c4124229a42d +Author: Dave Airlie +Date: Fri Mar 13 14:01:07 2009 +1000 + + radeon: do some rotate fixups - still not perfect + +commit de55e58c72e53948d5fdbc252ea3ea3f7e3377af +Author: Dave Airlie +Date: Fri Mar 13 14:00:13 2009 +1000 + + kms: explicitly dpms on after mode setting + +commit 5e1bc153cd49ae56c0910e934a915f16caf5d232 +Author: Dave Airlie +Date: Fri Mar 13 13:59:43 2009 +1000 + + radeon: update for drm mode api change + +commit 86af107d30daccd5f6e2b5fe8017621197e095f8 +Author: Dave Airlie +Date: Tue Mar 10 22:33:51 2009 +1000 + + r600: fix merge issue that breaks Xv + +commit a49b34e1155ee757aef942e3303186d950fb3256 +Author: Dave Airlie +Date: Thu Mar 5 16:05:41 2009 +1000 + + radeon: add support for relocatable CRTC inside VLINE + + We cannot let userspace decide which CRTC it wants because its userspace + and might not own the crtc, so we need to provide a way to relocate it + +commit 09b179b6d45c040d4b33b97c9dfc5bbec3c226ba +Author: Dave Airlie +Date: Tue Mar 3 15:30:21 2009 +1000 + + radeon: initial framebuffer resize support + + This relies on the kernel pinning everything which the latest + rawhide kernel should do fine + +commit 738d6897420906b5345b9f4571ef2e6c4bf0cb24 +Author: Dave Airlie +Date: Tue Mar 3 09:20:30 2009 +1000 + + radeon: do get sarea until we know we aren't DRI2 + +commit 3a75cfd6ba5f2d86f45b1c7c4ba3bc646f83cf15 +Author: Dave Airlie +Date: Tue Mar 3 09:12:30 2009 +1000 + + radeon: no need to do any of this for DRI2 + +commit be4e893fd0021906ee605c20fac488bd2a33c14a +Author: Dave Airlie +Date: Fri Feb 27 12:00:29 2009 +1000 + + fixup issues post rebase + +commit 922da0d6fc782c0b532cabb6bf10d1a36178977b +Author: Dave Airlie +Date: Thu Feb 26 10:47:42 2009 +1000 + + radeon: don't init 3d engine in Xv path for drm mm + +commit dd9ae0d54bdaa288a1e91de62220bed696a0e971 +Author: Dave Airlie +Date: Tue Feb 17 19:14:27 2009 +1000 + + radeon: fix vt switch for legacy paths + +commit e54d6a7fa3f6ca3276f19f9103eb5a23838dae8c +Author: Dave Airlie +Date: Tue Feb 17 19:13:05 2009 +1000 + + radeon: only init gart heap for non-kms + +commit ad188860831cd08a98fbe65caa5590edca5a114b +Author: Dave Airlie +Date: Sun Jan 11 09:29:44 2009 +1000 + + radeon: drop CS1 + +commit 4e24907faabcba233bd2e323770dc19cc51a7945 +Author: Jerome Glisse +Date: Wed Nov 12 14:36:52 2008 +0100 + + radeon: enable dri2 only if memory manager is present + (cherry picked from commit fd4bb9b7b639befd63e7acd37254011b9e46732d) + +commit e2eedf2bce505ee754326213dbe910747abeb463 +Author: Jerome Glisse +Date: Mon Nov 10 22:16:57 2008 +0100 + + radeon: flush command stream in block handler and in dri2 copy callback + (cherry picked from commit 13fa5ab73a707af52e71af400ea186073022f8b7) + +commit 82b1ba952b13f813ce1b087f0bb9497976fc64c8 +Author: Jerome Glisse +Date: Fri Nov 14 12:44:29 2008 +0100 + + radeon: bufmgr exa doesn't exist + (cherry picked from commit 8a00de47a186db1707b82a5977da8cbf2e8e0c80) + +commit f8c8ad1907bebb56ff178b7d06a780cef9b851f9 +Author: Jerome Glisse +Date: Thu Nov 6 00:25:18 2008 +0100 + + radeon: initial dri2 support + +commit 5f2b1fa02f31d0cfb942ab6cdcd84690d6ee8194 +Author: Dave Airlie +Date: Mon Dec 1 19:15:41 2008 +1000 + + radeno: fixup unpinned buffers + (cherry picked from commit d9759ca976cad48e6c8fd3c7d17ce38588522c34) + +commit 7476f2762cd123580eceb063e8b2aa638481b77c +Author: Dave Airlie +Date: Mon Dec 22 16:16:16 2008 +1000 + + radeon: fix for 1.6 server + +commit 26766d1c2a9f52334f3a5cb4a1e2d0f08a2e20ac +Author: Dave Airlie +Date: Fri Dec 19 12:37:01 2008 +1100 + + radeon: only do mappings if direct rendering is enabled + +commit 7774e7c5d7a79ab27355ea5dfb4f8966cc4a22d0 +Author: Dave Airlie +Date: Tue Dec 9 13:29:18 2008 +1000 + + radeon: upstream fix for Init3D vs switch to/from 2d/3d + +commit 5b50baaa5f39e644cba08701e753fee9214937f7 +Author: Dave Airlie +Date: Mon Dec 8 14:19:47 2008 +1000 + + radeon: only update dri buffers if DRI enabled + +commit fd35e14a787f8b1725674a25b0e0165f09a23fec +Author: Dave Airlie +Date: Mon Dec 1 15:31:08 2008 +1100 + + radeon: don't have 2D and 3D in one CS buffer + +commit cf81cef0bb838c4d52137c42af4b8008a0bb2f2f +Author: Dave Airlie +Date: Wed Nov 26 16:09:29 2008 +1100 + + radeon: set touched flag on pinned buffers + +commit 1d0488ed452c3addff08ad262d34734f88ed4d89 +Author: Dave Airlie +Date: Wed Nov 26 16:04:35 2008 +1100 + + radeon: fix up some of the touched by gpu handling and force gtt handling + + this fixes DFS on the rs690 + +commit 09e29c3bbed0383674fbde03d626d37aa26fcd26 +Author: Dave Airlie +Date: Wed Nov 26 12:52:24 2008 +1100 + + radeon: brutal attempt to fix RS4xx and RS6xx by flushing more often + + this might take more CPU but hopefully leads to stabler GPU + +commit 8480f1f48f79f72a367595773f716c43b19e21a1 +Author: Dave Airlie +Date: Sun Nov 23 17:56:02 2008 +1000 + + radeon: wait for rendering before doing UTS + +commit 88ef79a05a185b5ebb73470cd5b8c1c5320e659d +Author: Dave Airlie +Date: Sun Nov 23 17:54:27 2008 +1000 + + radeon: stop this_op_read from going negative + +commit 683ca7b15d9848432a03ee95b9f726dff20795ba +Author: Dave Airlie +Date: Sun Nov 23 17:52:42 2008 +1000 + + radeon: return flush for conflicting domains + +commit efc72497ace58a95fc475e740d66bfac85764b32 +Author: Dave Airlie +Date: Sun Nov 23 17:50:47 2008 +1000 + + radeon: only reset state2d before emitting cache flush + +commit 0f8b0304fa7bde20a8114a5bb894daa336543eb6 +Author: Dave Airlie +Date: Thu Nov 20 16:48:33 2008 +1000 + + flush on UTS if any references + +commit 48455f4bd70eeb8d48e6fa67b9a500643b6effb2 +Author: Dave Airlie +Date: Thu Nov 20 16:44:40 2008 +1000 + + radeon: add gart vs vram writes + +commit 9f090b4f9c7cf9a88dbd06577fdcb0dc5ba46c9b +Author: Dave Airlie +Date: Thu Nov 20 16:37:07 2008 +1000 + + radeon: improve DFS performance for non-vram objects + +commit 08dcc8b7f05d44f842fe1dbb28d52e2c133b9933 +Author: Dave Airlie +Date: Wed Nov 19 14:49:44 2008 +1000 + + radeon: scrap state on LeaveVT not EnterVT + +commit 9105d8e160e81aafcd0c88933ab655d477935c3b +Author: Dave Airlie +Date: Wed Nov 19 11:08:34 2008 +1000 + + radeon: even more typos + +commit e3df0a5a7197371db494a5cb7a6a9015aad05fe7 +Author: Dave Airlie +Date: Wed Nov 19 07:51:03 2008 +1000 + + radeon: oops bad typo + +commit 2d0d37a8429dcb247af476c599f7c4b1c30bdd51 +Author: Dave Airlie +Date: Tue Nov 18 16:09:10 2008 +1000 + + radeon: even if kernels fails, struggle onwards + + try and keep the session going even if visual glitches happen + +commit e993ccdecce9e498c65f3e04cf5d35652e4d53a2 +Author: Dave Airlie +Date: Tue Nov 18 15:46:46 2008 +1000 + + radeon_bufmgr: much more complete size check functionality + +commit 3f6da50971d2147514cf454d4e19e5451c643b6f +Author: Dave Airlie +Date: Tue Nov 18 14:33:44 2008 +1000 + + radeon: I fail at uint32_t division + +commit 21f7d08c668fb94632d8bb5113b9b3e295b7685a +Author: Dave Airlie +Date: Tue Nov 18 12:06:02 2008 +1000 + + radeon: workaround O(wtf) logic in post_submit bufmgr + +commit 67acf6e186ba1b0e36b0e82b8610981a2b368c65 +Author: Dave Airlie +Date: Mon Nov 17 19:19:43 2008 +1000 + + radeon: set emit limit to 90% VRAM + +commit af3b9dbd9f3bcace8eec2a6e1d20a3ed0ce623a5 +Author: Dave Airlie +Date: Mon Nov 17 16:16:51 2008 +1000 + + radeon: use get/set master ioctls + +commit b2dc75f2c2627e94e6999545821bc7a140125950 +Author: Dave Airlie +Date: Fri Nov 14 15:56:16 2008 +1000 + + radeon: make space accounting a lot smarter + +commit c87a844a7c5374fadd2225b8e0ca273756f50acb +Author: Dave Airlie +Date: Fri Nov 14 15:55:12 2008 +1000 + + radeon: retry on CS2 EAGAIN + +commit cf0aef1bdc18a8915b653c4ea889b7bf618f98c0 +Author: Dave Airlie +Date: Fri Nov 14 15:20:59 2008 +1000 + + radeon: add src/mask/dest to fallbacks + +commit 05649717a9055d12e416bcbbe132211f0741fbc9 +Author: Dave Airlie +Date: Fri Nov 14 15:20:37 2008 +1000 + + radeon_memory: align all allocations + +commit 6e2cfa8a5a6a599d95cac877413d88c10dec35a4 +Author: Dave Airlie +Date: Fri Nov 14 11:03:34 2008 +1000 + + radeon: force gtt for mmap after fallbacks + +commit 53cb7949ca35244492a13c4a5eebac538557e372 +Author: Dave Airlie +Date: Mon Nov 10 14:18:17 2008 +1000 + + radeon: add more buffer info + fix read objects too big fallback + +commit ff23a407323df1bc344a535d76a60bbc67a3e0af +Author: Dave Airlie +Date: Mon Nov 10 11:47:02 2008 +1000 + + radeon: remove old exa bufmgr not used anymore code + +commit 0daee3852963ba9aaad4c761b4071b58f3e1f9e7 +Author: Dave Airlie +Date: Mon Nov 10 11:18:27 2008 +1000 + + radeon: fix crtc dpms + + need to find a better way to switch displays off + +commit fd3022ac3913ee55ac4361db81e7aa5fe7ee4f3b +Author: Dave Airlie +Date: Sat Nov 8 14:48:29 2008 +1000 + + radeon: add DPMS support for connectors + +commit c1bf0c61d6bf2a610593ad034338e8cb66193cb1 +Author: Dave Airlie +Date: Fri Nov 7 16:20:09 2008 +1000 + + radeon: fix rotation of right-of heads + +commit d016b794764aef5d4e86b709a9700cd882ab58b0 +Author: Dave Airlie +Date: Mon Nov 3 14:51:43 2008 +1000 + + radeon: respect fb tex percent + trust kernel values + +commit 9c8807f99716fab6c880099f7b921869068bdd0e +Author: Dave Airlie +Date: Fri Oct 31 15:05:14 2008 +1000 + + radeon: remove workaround hack since kernel is hopefully fixed + +commit ecb6d30f15dd03b791ed29d4bcd208d47f620eb0 +Author: Dave Airlie +Date: Fri Oct 31 15:04:31 2008 +1000 + + radeon: workaround use after free + +commit 7a825b0e63001bb4075496daf6c10490a8f43ce0 +Author: Dave Airlie +Date: Thu Oct 30 13:53:02 2008 +1000 + + radeon: setup accel dfs for PCIE cards only if drm_mm + +commit 0e4c0c49cf05d3536d244057da2d76a5fb470f36 +Author: Dave Airlie +Date: Thu Oct 30 10:00:10 2008 +1000 + + radeon: fixup name handling for bufmgr + +commit e1694afecf0859ffe72ac0c1c705e4e2480cff49 +Author: Dave Airlie +Date: Thu Oct 30 09:59:11 2008 +1000 + + radeon: fix memory leak in CS2 code + +commit c66c3d87de121b9588c232b2ef8a612675c0b7e7 +Author: Dave Airlie +Date: Tue Oct 28 20:35:19 2008 +1000 + + return on empty IBs, flush happen in the kernel + +commit 878c89651434c40a1168b75a14632c3368c54394 +Author: Dave Airlie +Date: Tue Oct 28 10:16:09 2008 +1000 + + radeon: remove some debugging + +commit b666cb567322b8021523dd74d495734b739fc5ed +Author: Dave Airlie +Date: Tue Oct 28 06:40:31 2008 +1000 + + radeon: enable gem wait rendering. + +commit d986e7d47c302b46aab9bf80579a9a2053893de2 +Author: Dave Airlie +Date: Mon Oct 27 16:51:00 2008 +1000 + + radeon: add new CS submission scheme + +commit 3eee5a04760e364b0eb47d93ae8b6ca6bbc09f55 +Author: Dave Airlie +Date: Thu Oct 23 17:05:12 2008 +1000 + + radeon: really rough effort at vram limit setting + +commit 9872b9e08141496fde6ec97ca8ee66a982f139e7 +Author: Dave Airlie +Date: Thu Oct 23 17:04:51 2008 +1000 + + radeon: this shouldn't fail but it did once while debugging so patch up + +commit 82893fa311b37fecf5ca32b16f04b859fb96e291 +Author: Dave Airlie +Date: Thu Oct 23 10:43:09 2008 +1000 + + radeon: fixup some memory allocation issues + + hopefully since the alignment got fixed this doesn't break anything + +commit fea24a215e326c8441ea630d0506e6ee932233cf +Author: Dave Airlie +Date: Tue Oct 21 15:50:17 2008 +1000 + + radeon: cleanup reserved space calcs + +commit 9b4833d0c58ff4a3acba87006cf649db5ed59dc0 +Author: Dave Airlie +Date: Tue Oct 21 15:49:48 2008 +1000 + + radeon: fixup Owen's optimisation - this fixes corruption + + I haven't a good explaination why mapping the buffer twice in a row + seems to cause this failure. but I probably don't have time to track + it down before release. + +commit 1988e0369d518ca7a9145f3a8a197bc61b91440a +Author: Dave Airlie +Date: Sun Oct 19 18:27:53 2008 +1000 + + radeon: fixup tex offset for no modeset + +commit 135bc3264c4aad9d68cc3ba3d8e222c23ca7241f +Author: Dave Airlie +Date: Wed Oct 15 17:01:34 2008 +1000 + + radeon: add DFS support for CS + +commit 8c82bfb55d9fd4003d82f91a5334c4c50779d000 +Author: airlied +Date: Wed Oct 15 23:55:13 2008 +1000 + + radeon: add r100/r200 support for EXA render + +commit 275878204780ffd8e0b8e8c4da3ad923c5a2bcb5 +Author: Dave Airlie +Date: Mon Oct 13 16:59:02 2008 +1000 + + radeon: fix switch mode path so nexuiz starts + +commit afe4550c86953fdb3986de4dd9d0ec217c1eb6f4 +Author: Dave Airlie +Date: Fri Oct 10 15:29:24 2008 +1000 + + remove gem buf caching useless on radeon + +commit 31fcbd706c6fed3e372d381536f48d00ee030667 +Author: Dave Airlie +Date: Fri Oct 10 15:18:41 2008 +1000 + + radeon: drmmode make names same as for non-kms drivers + +commit 1cf2cbe6bf134d9463ad018df3f2ef2d6b07082d +Author: Dave Airlie +Date: Fri Oct 10 15:10:28 2008 +1000 + + radeon: fix rotation under kms + +commit 09ad42c9e850623d6cdf318307695638ee210c66 +Author: Dave Airlie +Date: Fri Oct 10 14:44:39 2008 +1000 + + radeon: remove testing fallback + +commit bee774e9527eeba02b083823800483f6179f844a +Author: Kristian Høgsberg +Date: Fri Oct 10 10:57:47 2008 +1100 + + radeon: add copy fb contents patch + +commit b164ce46a1551c2717f3d76005a776856543c13b +Author: Dave Airlie +Date: Fri Oct 10 10:57:20 2008 +1100 + + bufmgr: turn off debug + +commit 9c0a8ae94a85d652ebca7b48d7cfba9adf12681c +Author: Dave Airlie +Date: Fri Oct 10 10:38:38 2008 +1100 + + radeon: fixup modesetting code after rebasing to master + +commit 6b0716703ff57ce0347d4e43ac301c39aad0e182 +Author: Dave Airlie +Date: Thu Oct 9 16:34:52 2008 +1100 + + radeon: misc cleanups in exa + +commit c6ae0240913e60a2ff0f6f00c8a82dfd08ae8a2f +Author: Dave Airlie +Date: Thu Oct 9 16:34:23 2008 +1100 + + radeon: fix UTS for non-modesetting + +commit c162f7a82e21f85b1542e5da1db3df34715349b0 +Author: Dave Airlie +Date: Thu Oct 9 16:33:59 2008 +1100 + + radeon: fix exa limits problem - shouldn't have been resetting scissor + +commit e40b4c8f291d0fd730f9209a18e265b4171f0631 +Author: Dave Airlie +Date: Wed Oct 1 11:21:53 2008 +1000 + + radeon: fixup for latest libdrm changes + +commit f87b60cd1e7116452f42aff3b8ae895179aa59df +Author: Owen Taylor +Date: Fri Sep 26 16:17:49 2008 -0400 + + Don't flush when mapping a newly created pixmap into system ram If we have a pixmap that has never been mapped into vram (and thus never written to by the GPU), there is no need to flush the graphics pipeline and wait for idle before starting to write to it. + +commit 5330b8af06292d4d886e1931efe31671ef6de33e +Author: Dave Airlie +Date: Mon Sep 29 16:32:51 2008 +1000 + + radeon: hopefully fix textured xv + +commit a0e2fd96c3e78db18eccf30e2f769593deb16454 +Author: Dave Airlie +Date: Fri Sep 26 11:38:36 2008 +1000 + + radeon: fix the offset checks for command submission + + since we are relocating in the kernel we don't need these + +commit 155db45f97f056230f1b49a23d3abce32c844f1f +Author: Dave Airlie +Date: Fri Sep 26 10:46:20 2008 +1000 + + radeon: fixup after mertge + +commit 2f246a23f5a39e492649ea0fa1fdd49b5de7adf5 +Author: Dave Airlie +Date: Fri Sep 26 10:34:41 2008 +1000 + + radeon: fix issues with emitting DST PIPE on cards that don't use it + +commit 7998ba6541393b6d0d516b41dbd3193475366461 +Author: Dave Airlie +Date: Wed Sep 24 17:12:19 2008 +1000 + + modesetting: fixup bits of drmmode_display.c + +commit c7861e64f5147e62159ba668af2f175fb8d84e78 +Author: Dave Airlie +Date: Wed Sep 24 15:42:01 2008 +1000 + + r600: fixup for kms + +commit ad8f1e15a09608c776821ad6b87d68a8ad1a9d3e +Author: Dave Airlie +Date: Sun Sep 7 08:01:56 2008 +1000 + + modeset: fix AddFB for current tree + +commit f0c761fe645a00fb109dd265371e94ff2829a796 +Author: Dave Airlie +Date: Thu Aug 14 10:52:52 2008 +1000 + + radeon: disable overlay for modesetting for now + +commit fb9a0218c86a874952fefeaba8a3ea3764a6f347 +Author: Dave Airlie +Date: Thu Aug 14 10:52:42 2008 +1000 + + radeon: no need for this anymore + +commit 9fd4744031d7afbad7de7625774323bedd5b6ca5 +Author: Dave Airlie +Date: Fri Sep 5 16:32:01 2008 +1000 + + radeon: fix up for suspend/resume - uses new API + +commit 76aa6706aa966378c50084764e999be603a1914f +Author: Dave Airlie +Date: Wed Aug 27 13:09:55 2008 +1000 + + radeon: update to proper domain + + this should fix 3d again for now at least + +commit 427b1565957da7f250c5fb8c46bc0eac000dddfa +Author: Dave Airlie +Date: Tue Aug 26 18:29:23 2008 +1000 + + ddx: move to using new gem interface + + add a GEM bufmgr backend along the lines of Intels one. + + The buffer reuse is disabled and I'll probably rip it out for radeon + as we can't just re-use buffers that might have ended up in VRAM etc. + + Probably need some sort of in-kernel re-use. + +commit 333d98be8d1090e1689bdd787753d60aa0d5d353 +Author: Dave Airlie +Date: Mon Aug 25 11:37:48 2008 +1000 + + radeon: add an initial GEM bufmgr + +commit 7359bbef6b6bc9b53b0643a48e24977e0712b336 +Author: Dave Airlie +Date: Mon Aug 25 11:37:20 2008 +1000 + + radeon: implement simple UTS + +commit 4bb48c68b13b567e97d96d7ae46fa28d4f14b808 +Author: Dave Airlie +Date: Fri Aug 22 15:34:58 2008 +1000 + + radeon: add read/write domains properly + +commit 6991d7d5ac08b625bbb46f8d8d1581fd18159363 +Author: Dave Airlie +Date: Fri Aug 15 11:25:31 2008 +1000 + + radeon: fix some rotate bugs + +commit fdeeb2d6ac3cad66bd23bb0f7aa94b68b7c0d9d7 +Author: Dave Airlie +Date: Fri Aug 15 11:16:18 2008 +1000 + + radeon: when create fake bos, they are already mapped + +commit 25ccff4af3a68be99492544aaf1e018e1b22079c +Author: Dave Airlie +Date: Fri Aug 15 11:15:58 2008 +1000 + + exa: remove wrong assert + +commit deea956e384bc3ed128493ba359384c1778f7c62 +Author: Dave Airlie +Date: Tue Aug 12 19:27:44 2008 +1000 + + radeon: start to work on rotate pixmap support + +commit 4fa9c58ba3a8f55f4e5ff2db781874b683f1c426 +Author: Dave Airlie +Date: Tue Aug 12 18:28:23 2008 +1000 + + radeon: port simple exa bufmgr + + exa pixmaps work now but they are slow + +commit b848253d4d11cfc859be0d1d23092e017e06599d +Author: Dave Airlie +Date: Thu Aug 7 17:52:04 2008 +1000 + + further pixmaps on EXA + +commit 66c86cba3eaa83ea1b6f841067cc70790f118ae5 +Author: Dave Airlie +Date: Thu Aug 7 11:22:46 2008 +1000 + + initial exa on gem hackx + + Conflicts: + + src/radeon_exa.c + src/radeon_memory.c + +commit dd46216a9fd5d82b1795b13a5ad0bd9cc8d10223 +Author: Dave Airlie +Date: Tue Aug 12 15:31:03 2008 +1000 + + radeon: initial rotate pixmap + + This doesn't work, we really need EXA pixmaps for this stuff + +commit 4e04cd4cc35ba0f249773d24ff7c9703e8d37db0 +Author: Dave Airlie +Date: Tue Aug 12 14:40:18 2008 +1000 + + radeon: use buffer names + +commit 07516990a69f9b1ba04c3386cd81078ba8780328 +Author: Dave Airlie +Date: Tue Aug 12 14:38:56 2008 +1000 + + ati: fix do adjust mode + +commit 8db5962b22cb96f67c5d2d26d85ad9028cdc2aae +Author: Dave Airlie +Date: Tue Aug 12 09:38:48 2008 +1000 + + FEDORA: update offsets in DRI private + +commit 0b119c9f153ec8d1645e18a12876afac44cdd2a2 +Author: Dave Airlie +Date: Tue Aug 12 09:10:18 2008 +1000 + + radeon: add vt bind flag + +commit 1396c9a3b6a42c18c3f67e8ee4c43ef0c1664932 +Author: Dave Airlie +Date: Wed Aug 6 13:30:54 2008 +1000 + + radeon: warning cleanups + +commit 5ec24345d528959aced9f2077cc2fb1eceb7c6f6 +Author: Dave Airlie +Date: Wed Aug 6 13:18:52 2008 +1000 + + radeon: remove debugging + +commit bf953a4a6bc705ccd1395cd9f082ee3ac84425d4 +Author: Dave Airlie +Date: Wed Aug 6 13:17:31 2008 +1000 + + radeon: add code to set memory map and not futz with mappings + +commit 367300bb07325ed37ce80e50bb44714b026abcb0 +Author: Dave Airlie +Date: Wed Aug 6 13:16:56 2008 +1000 + + drm: don't futz with framebuffer when no drm_mm + +commit b91131185ff6417817113102deb67b492df2a611 +Author: Dave Airlie +Date: Tue Aug 5 16:47:21 2008 +1000 + + radeon: undef OUT_RELOC + +commit 8b92981baf1c35ef06e379d1f174fd0aa9acb2ba +Author: Dave Airlie +Date: Tue Aug 5 16:37:52 2008 +1000 + + radeon: add stdint/lib to check for modesetting + +commit a481013e2fb4aacc8158891645d955b1ad47ba73 +Author: Dave Airlie +Date: Tue Aug 5 16:07:31 2008 +1000 + + fix whitespace + +commit b87c1c07669c68521405ab94ee9ef6989073e385 +Author: Dave Airlie +Date: Tue Aug 5 16:07:07 2008 +1000 + + radeon: fix build issue + +commit 531fa7b85c7b385a020da2756789b5087343cd20 +Author: Dave Airlie +Date: Mon Aug 4 16:27:55 2008 +1000 + + radeon: free all pinned memory on server shutdown + +commit 1961ccf12ea8c242bcae39dca6ba7a469870312d +Author: Dave Airlie +Date: Mon Aug 4 16:11:30 2008 +1000 + + radeon: get textured video working on the memory manager + +commit 4d029b762ef8634661213b6b502e1d021ffbb149 +Author: Dave Airlie +Date: Mon Aug 4 16:11:18 2008 +1000 + + radeon: convert bus addr to void pointer + +commit 2d45d85167ab19d28c995b5a07fde1373e2347a8 +Author: Dave Airlie +Date: Mon Aug 4 15:11:13 2008 +1000 + + radeon: avoid z cache flushes if not needed + +commit f7c2434e97f2c5a777775e92adb1c0edbad313f2 +Author: Dave Airlie +Date: Wed Jul 30 17:04:22 2008 +1000 + + radeon: update DRI support, so mappings get added + + We only add fake frontbuffer mapping as DRI clients expect one. + +commit c28865cc3f12d34b34991074bd9083ed642ec157 +Author: Dave Airlie +Date: Tue Jul 29 16:50:03 2008 +1000 + + radeon: exa through the handle relocation function + +commit 0c1d0a1ccf5e528d75de2b4ae1bc49302639f47f +Author: Dave Airlie +Date: Tue Jul 29 14:58:22 2008 +1000 + + radeon: keep track of 2D state + + This lets the kernel use the 2D blit engine in theory + +commit 4f143f88e0e220d0720937badaac9b87ba76dc17 +Author: Dave Airlie +Date: Mon Jul 28 17:48:59 2008 +1000 + + new command submission attempt + +commit cf51d8e82c43da7aba1ba357b3e2f75737c7f1b7 +Author: Dave Airlie +Date: Mon Jul 28 17:48:08 2008 +1000 + + radeon: fixup over fluishing problem + +commit 9b9fa58f4735f5c47070c92ab2f27765cb48e221 +Author: Dave Airlie +Date: Mon Jul 28 17:44:51 2008 +1000 + + hack for now: divide texture size by 2 + +commit f72e3b80a3553f7a8729348c31181e5d545c10de +Author: Dave Airlie +Date: Fri Jul 25 17:07:20 2008 +1000 + + radeon: fix dri message + +commit 5e2814da89d8be2c0d2aab276b8922d8136af631 +Author: Dave Airlie +Date: Fri Jul 25 15:11:58 2008 +1000 + + radeon: fix pool which caused memory corruption + +commit f61bfdeb1108f108edeb5932e80871a276cf0263 +Author: Dave Airlie +Date: Fri Jul 25 14:59:07 2008 +1000 + + radeon: get DRI to attempt to start up + +commit 8a58df9928af21a9b41de9cebf0541e518a0d9ad +Author: Dave Airlie +Date: Fri Jul 25 14:58:23 2008 +1000 + + radeon: call the right sync function + +commit e236b7333de34ce9c357a7c20757a0e6983a4e00 +Author: Dave Airlie +Date: Fri Jul 25 14:57:21 2008 +1000 + + radeon: unmap memory from objects + +commit 7f73ca0fe29708b8725bcb71c8aa718d3c18f623 +Author: Dave Airlie +Date: Wed Jul 23 10:59:16 2008 +1000 + + use CP for 3D engine with modeset + +commit 7c2e2ef83c857e464c765afc1a3d398e8f5a3164 +Author: Dave Airlie +Date: Wed Jul 23 10:59:04 2008 +1000 + + radeon: fix DFS + +commit 3b284074c5c8a1cef32895ceeadf437734b442b5 +Author: Dave Airlie +Date: Wed Jul 23 10:48:45 2008 +1000 + + radeon: get the fb location right + +commit 8facf5213de70b5ca1016349f14d75983d177d81 +Author: Dave Airlie +Date: Tue Jul 22 18:08:25 2008 +1000 + + radeon: make at least the EXA stipple work.. + +commit 4086156a1a0aded0860409a1602e4bb0cfdd7448 +Author: Dave Airlie +Date: Tue Jul 22 18:07:15 2008 +1000 + + radeon: disable debugging for now + +commit f8f2fe18080648a2f4d8938e28fdf061e5f9592c +Author: Dave Airlie +Date: Mon Jul 21 18:40:14 2008 +1000 + + radeon: initial indirect buffer use. + + Move EXA and front allocation into one big buffer to workaround + EXA issues - need to move to driver pixmap hooks. + + Add new indirect GEM to take indirect buffers. + + doesn't work think the offsets are all wrong. + +commit 7991b49e58c44792f9cbca9fa89e4c7472fe7905 +Author: Dave Airlie +Date: Fri Jul 18 13:46:41 2008 +1000 + + modesetting step 1: have X and a cursor + +commit 7656c3b08f7c84d595e87f3b793d85f7e10373f4 +Author: Dave Airlie +Date: Thu Jul 17 09:59:19 2008 +1000 + + radeon: add radeon_memory.c + +commit bc5cd4614a2d264a8de133f870d3c17fa781d73d +Author: Dave Airlie +Date: Tue Jul 8 16:55:27 2008 +1000 + + remove mappings of some buffers. + + use drm gart code if available + +commit 62e1b3fe161293abfc39f5b19fddbca6c7138a87 +Author: Dave Airlie +Date: Mon Jul 7 16:54:35 2008 +1000 + + add initial support for a kernel memory manager + + This just pins all the current allocations via the kernel memory manager + instead of trying to do them all in userspace. + + useful steps towards getting kernel modesetting + +commit 300e3b2e7d5d207ee4f2803070a104a93c365995 +Author: Dave Airlie +Date: Fri Jul 4 10:39:34 2008 +1000 + + port to using drm header files +diff --git a/configure.ac b/configure.ac +index 660ea1f..4ddec1c 100644 +--- a/configure.ac ++++ b/configure.ac @@ -31,6 +31,7 @@ AM_CONFIG_HEADER([config.h]) AC_CONFIG_AUX_DIR(.) @@ -29,10 +1107,49 @@ diff -up xf86-video-ati-6.12.2/configure.ac.dave xf86-video-ati-6.12.2/configure save_CFLAGS="$CFLAGS" CFLAGS="$XORG_CFLAGS" AC_CHECK_HEADER(xf86Modes.h,[XMODES=yes],[XMODES=no],[#include "xorg-server.h"]) -diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.c ---- /dev/null 2009-04-15 09:55:06.267190488 +1000 -+++ xf86-video-ati-6.12.2/src/drmmode_display.c 2009-04-15 12:46:30.000000000 +1000 -@@ -0,0 +1,929 @@ +diff --git a/src/Makefile.am b/src/Makefile.am +index 7cc2a6f..8a55d1c 100644 +--- a/src/Makefile.am ++++ b/src/Makefile.am +@@ -90,12 +90,14 @@ radeon_drv_ladir = @moduledir@/drivers + radeon_drv_la_SOURCES = \ + radeon_accel.c radeon_cursor.c radeon_dga.c radeon_legacy_memory.c \ + radeon_driver.c radeon_video.c radeon_bios.c radeon_mm_i2c.c \ +- radeon_vip.c radeon_misc.c radeon_probe.c \ ++ radeon_vip.c radeon_misc.c radeon_probe.c radeon_memory.c \ + legacy_crtc.c legacy_output.c \ + radeon_textured_video.c \ + radeon_crtc.c radeon_output.c radeon_modes.c radeon_tv.c \ + $(RADEON_ATOMBIOS_SOURCES) radeon_atombios.c radeon_atomwrapper.c \ +- $(RADEON_DRI_SRCS) $(RADEON_EXA_SOURCES) atombios_output.c atombios_crtc.c ++ $(RADEON_DRI_SRCS) $(RADEON_EXA_SOURCES) atombios_output.c \ ++ atombios_crtc.c drmmode_display.c radeon_bufmgr_gem.c \ ++ radeon_dri_bufmgr.c radeon_dri2.c + + if XMODES + radeon_drv_la_SOURCES += \ +@@ -144,6 +146,7 @@ EXTRA_DIST = \ + radeon_exa_render.c \ + radeon_exa_funcs.c \ + radeon.h \ ++ radeon_dri2.h \ + radeon_macros.h \ + radeon_probe.h \ + radeon_reg.h \ +@@ -164,4 +167,6 @@ EXTRA_DIST = \ + radeon_pci_device_match_gen.h \ + pcidb/ati_pciids.csv \ + pcidb/parse_pci_ids.pl \ +- radeon_atombios.h ++ radeon_atombios.h \ ++ drmmode_display.h \ ++ radeon_dri_bufmgr.h +diff --git a/src/drmmode_display.c b/src/drmmode_display.c +new file mode 100644 +index 0000000..b368115 +--- /dev/null ++++ b/src/drmmode_display.c +@@ -0,0 +1,1035 @@ +/* + * Copyright © 2007 Red Hat, Inc. + * @@ -66,6 +1183,8 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.c + +#ifdef XF86DRM_MODE +#include ++#include "micmap.h" ++#include "xf86cmap.h" +#include "radeon.h" +#include "radeon_reg.h" +#include "radeon_drm.h" @@ -223,6 +1342,8 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.c + } + + src = create_pixmap_for_fbcon(drmmode, pScrn, crtc_id); ++ if (!src) ++ return; + + dst = GetScratchPixmapHeader(pScreen, + pScrn->virtualX, pScrn->virtualY, @@ -485,6 +1606,13 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.c + +} + ++static void ++drmmode_crtc_gamma_set(xf86CrtcPtr crtc, uint16_t *red, uint16_t *green, ++ uint16_t *blue, int size) ++{ ++ return; ++} ++ +static const xf86CrtcFuncsRec drmmode_crtc_funcs = { + .dpms = drmmode_crtc_dpms, + .set_mode_major = drmmode_set_mode_major, @@ -494,12 +1622,10 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.c + .hide_cursor = drmmode_hide_cursor, + .load_cursor_argb = drmmode_load_cursor_argb, + ++ .gamma_set = drmmode_crtc_gamma_set, + .shadow_create = drmmode_crtc_shadow_create, + .shadow_allocate = drmmode_crtc_shadow_allocate, + .shadow_destroy = drmmode_crtc_shadow_destroy, -+#if 0 -+ .gamma_set = i830_crtc_gamma_set, -+#endif + .destroy = NULL, /* XXX */ +}; + @@ -839,24 +1965,31 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.c +}; + + -+Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, char *busId, char *driver_name, int cpp) ++Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, char *busId, char *driver_name, int cpp, int zaphod_mask) +{ + xf86CrtcConfigPtr xf86_config; ++ RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); + int i; + Bool ret; + + /* Create a bus Id */ + /* Low level DRM open */ -+ ret = DRIOpenDRMMaster(pScrn, SAREA_MAX, busId, driver_name); -+ if (!ret) { ++ if (!pRADEONEnt->fd) { ++ ret = DRIOpenDRMMaster(pScrn, SAREA_MAX, busId, driver_name); ++ if (!ret) { ++ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, ++ "[dri] DRIGetVersion failed to open the DRM\n" ++ "[dri] Disabling DRI.\n"); ++ return FALSE; ++ } ++ ++ drmmode->fd = DRIMasterFD(pScrn); ++ pRADEONEnt->fd = drmmode->fd; ++ } else { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, -+ "[dri] DRIGetVersion failed to open the DRM\n" -+ "[dri] Disabling DRI.\n"); -+ return FALSE; ++ " reusing fd for second head\n"); ++ drmmode->fd = pRADEONEnt->fd; + } -+ -+ drmmode->fd = DRIMasterFD(pScrn); -+ + xf86CrtcConfigInit(pScrn, &drmmode_xf86crtc_config_funcs); + xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + @@ -867,10 +2000,12 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.c + + xf86CrtcSetSizeRange(pScrn, 320, 200, drmmode->mode_res->max_width, drmmode->mode_res->max_height); + for (i = 0; i < drmmode->mode_res->count_crtcs; i++) -+ drmmode_crtc_init(pScrn, drmmode, i); ++ if (zaphod_mask & (1 << i)) ++ drmmode_crtc_init(pScrn, drmmode, i); + + for (i = 0; i < drmmode->mode_res->count_connectors; i++) -+ drmmode_output_init(pScrn, drmmode, i); ++ if (zaphod_mask & (1 << i)) ++ drmmode_output_init(pScrn, drmmode, i); + + xf86InitialConfiguration(pScrn, TRUE); + @@ -961,11 +2096,101 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.c + } + return TRUE; +} ++ ++static void drmmode_load_palette(ScrnInfoPtr pScrn, int numColors, ++ int *indices, LOCO *colors, VisualPtr pVisual) ++{ ++ RADEONInfoPtr info = RADEONPTR(pScrn); ++ xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); ++ uint16_t lut_r[256], lut_g[256], lut_b[256]; ++ int index, j, i; ++ int c; ++ ++ ++ ++ for (c = 0; c < xf86_config->num_crtc; c++) { ++ xf86CrtcPtr crtc = xf86_config->crtc[c]; ++ drmmode_crtc_private_ptr drmmode_crtc = crtc->driver_private; ++ ++ for (i = 0 ; i < 256; i++) { ++ lut_r[i] = drmmode_crtc->lut_r[i] << 6; ++ lut_g[i] = drmmode_crtc->lut_g[i] << 6; ++ lut_b[i] = drmmode_crtc->lut_b[i] << 6; ++ } ++ ++#if 0 //TODO ++ switch (info->CurrentLayout.depth) { ++ case 15: ++ for (i = 0; i < numColors; i++) { ++ index = indices[i]; ++ for (j = 0; j < 8; j++) { ++ lut_r[index * 8 + j] = colors[index].red << 6; ++ lut_g[index * 8 + j] = colors[index].green << 6; ++ lut_b[index * 8 + j] = colors[index].blue << 6; ++ } ++ } ++ break; ++ case 16: ++ for (i = 0; i < numColors; i++) { ++ index = indices[i]; ++ ++ if (i <= 31) { ++ for (j = 0; j < 8; j++) { ++ lut_r[index * 8 + j] = colors[index].red << 6; ++ lut_b[index * 8 + j] = colors[index].blue << 6; ++ } ++ } ++ ++ for (j = 0; j < 4; j++) { ++ lut_g[index * 4 + j] = colors[index].green << 6; ++ } ++ } ++ break; ++ default: ++ for (i = 0; i < numColors; i++) { ++ index = indices[i]; ++ lut_r[index] = colors[index].red << 6; ++ lut_g[index] = colors[index].green << 6; ++ lut_b[index] = colors[index].blue << 6; ++ } ++ break; ++ } ++#endif ++ ++ /* Make the change through RandR */ ++#ifdef RANDR_12_INTERFACE ++ if (crtc->randr_crtc) ++ RRCrtcGammaSet(crtc->randr_crtc, lut_r, lut_g, lut_b); ++ else ++#endif ++ crtc->funcs->gamma_set(crtc, lut_r, lut_g, lut_b, 256); ++ } ++} ++ ++Bool drmmode_setup_colormap(ScreenPtr pScreen, ScrnInfoPtr pScrn) ++{ ++ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, ++ "Initializing kms color map\n"); ++ if (!miCreateDefColormap(pScreen)) ++ return FALSE; ++ /* all radeons support 10 bit CLUTs */ ++ if (!xf86HandleColormaps(pScreen, 256, 10, ++ drmmode_load_palette, NULL, ++ CMAP_PALETTED_TRUECOLOR ++#if 0 /* This option messes up text mode! (eich@suse.de) */ ++ | CMAP_LOAD_EVEN_IF_OFFSCREEN ++#endif ++ | CMAP_RELOAD_ON_MODE_SWITCH)) ++ return FALSE; ++ return TRUE; ++} +#endif -diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.h ---- /dev/null 2009-04-15 09:55:06.267190488 +1000 -+++ xf86-video-ati-6.12.2/src/drmmode_display.h 2009-04-15 12:46:30.000000000 +1000 -@@ -0,0 +1,74 @@ +diff --git a/src/drmmode_display.h b/src/drmmode_display.h +new file mode 100644 +index 0000000..8a070ba +--- /dev/null ++++ b/src/drmmode_display.h +@@ -0,0 +1,76 @@ +/* + * Copyright © 2007 Red Hat, Inc. + * @@ -1018,6 +2243,7 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.h + dri_bo *cursor_bo; + dri_bo *rotate_bo; + int rotate_fb_id; ++ uint16_t lut_r[256], lut_g[256], lut_b[256]; +} drmmode_crtc_private_rec, *drmmode_crtc_private_ptr; + +typedef struct { @@ -1030,56 +2256,22 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/drmmode_display.h +} drmmode_output_private_rec, *drmmode_output_private_ptr; + + -+extern Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, char *busId, char *driver_name, int cpp); ++extern Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, char *busId, char *driver_name, int cpp, int zaphod_mask); +extern Bool drmmode_set_bufmgr(ScrnInfoPtr pScrn, drmmode_ptr drmmode, dri_bufmgr *bufmgr); +extern void drmmode_set_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int width, int height, int pitch, dri_bo *bo); +extern void drmmode_set_cursor(ScrnInfoPtr scrn, drmmode_ptr drmmode, int id, dri_bo *bo); +void drmmode_adjust_frame(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int x, int y, int flags); +extern Bool drmmode_set_desired_modes(ScrnInfoPtr pScrn, drmmode_ptr drmmode); +extern void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode); ++extern Bool drmmode_setup_colormap(ScreenPtr pScreen, ScrnInfoPtr pScrn); +#endif + +#endif -diff -up xf86-video-ati-6.12.2/src/Makefile.am.dave xf86-video-ati-6.12.2/src/Makefile.am ---- xf86-video-ati-6.12.2/src/Makefile.am.dave 2009-04-01 05:11:10.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/Makefile.am 2009-04-15 12:46:30.000000000 +1000 -@@ -90,12 +90,14 @@ radeon_drv_ladir = @moduledir@/drivers - radeon_drv_la_SOURCES = \ - radeon_accel.c radeon_cursor.c radeon_dga.c radeon_legacy_memory.c \ - radeon_driver.c radeon_video.c radeon_bios.c radeon_mm_i2c.c \ -- radeon_vip.c radeon_misc.c radeon_probe.c \ -+ radeon_vip.c radeon_misc.c radeon_probe.c radeon_memory.c \ - legacy_crtc.c legacy_output.c \ - radeon_textured_video.c \ - radeon_crtc.c radeon_output.c radeon_modes.c radeon_tv.c \ - $(RADEON_ATOMBIOS_SOURCES) radeon_atombios.c radeon_atomwrapper.c \ -- $(RADEON_DRI_SRCS) $(RADEON_EXA_SOURCES) atombios_output.c atombios_crtc.c -+ $(RADEON_DRI_SRCS) $(RADEON_EXA_SOURCES) atombios_output.c \ -+ atombios_crtc.c drmmode_display.c radeon_bufmgr_gem.c \ -+ radeon_dri_bufmgr.c radeon_dri2.c - - if XMODES - radeon_drv_la_SOURCES += \ -@@ -144,6 +146,7 @@ EXTRA_DIST = \ - radeon_exa_render.c \ - radeon_exa_funcs.c \ - radeon.h \ -+ radeon_dri2.h \ - radeon_macros.h \ - radeon_probe.h \ - radeon_reg.h \ -@@ -164,4 +167,6 @@ EXTRA_DIST = \ - radeon_pci_device_match_gen.h \ - pcidb/ati_pciids.csv \ - pcidb/parse_pci_ids.pl \ -- radeon_atombios.h -+ radeon_atombios.h \ -+ drmmode_display.h \ -+ radeon_dri_bufmgr.h -diff -up xf86-video-ati-6.12.2/src/r600_textured_videofuncs.c.dave xf86-video-ati-6.12.2/src/r600_textured_videofuncs.c ---- xf86-video-ati-6.12.2/src/r600_textured_videofuncs.c.dave 2009-04-08 01:32:33.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/r600_textured_videofuncs.c 2009-04-15 12:46:30.000000000 +1000 -@@ -215,7 +215,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pSc +diff --git a/src/r600_textured_videofuncs.c b/src/r600_textured_videofuncs.c +index 3dfe151..04b6457 100644 +--- a/src/r600_textured_videofuncs.c ++++ b/src/r600_textured_videofuncs.c +@@ -215,7 +215,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv) switch(pPriv->id) { case FOURCC_YV12: case FOURCC_I420: @@ -1088,7 +2280,7 @@ diff -up xf86-video-ati-6.12.2/src/r600_textured_videofuncs.c.dave xf86-video-at accel_state->src_size[0] = accel_state->src_pitch[0] * pPriv->h; /* flush texture cache */ -@@ -316,7 +316,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pSc +@@ -316,7 +316,7 @@ R600DisplayTexturedVideo(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv) case FOURCC_UYVY: case FOURCC_YUY2: default: @@ -1097,111 +2289,329 @@ diff -up xf86-video-ati-6.12.2/src/r600_textured_videofuncs.c.dave xf86-video-at accel_state->src_size[0] = accel_state->src_pitch[0] * pPriv->h; /* flush texture cache */ -diff -up xf86-video-ati-6.12.2/src/radeon_accel.c.dave xf86-video-ati-6.12.2/src/radeon_accel.c ---- xf86-video-ati-6.12.2/src/radeon_accel.c.dave 2009-04-07 16:39:04.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_accel.c 2009-04-15 12:46:30.000000000 +1000 -@@ -92,6 +92,7 @@ +diff --git a/src/radeon.h b/src/radeon.h +index d488429..057ced2 100644 +--- a/src/radeon.h ++++ b/src/radeon.h +@@ -46,6 +46,8 @@ + #include "compiler.h" + #include "xf86fbman.h" - /* X and server generic header files */ - #include "xf86.h" -+#include "radeon_bufmgr_gem.h" ++#include "drmmode_display.h" ++ + /* PCI support */ + #include "xf86Pci.h" - static void R600EngineReset(ScrnInfoPtr pScrn); +@@ -75,6 +77,7 @@ + #include "dri.h" + #include "GL/glxint.h" + #include "xf86drm.h" ++#include "radeon_dri2.h" -@@ -373,6 +374,9 @@ void RADEONEngineRestore(ScrnInfoPtr pSc - RADEONInfoPtr info = RADEONPTR(pScrn); - unsigned char *RADEONMMIO = info->MMIO; + #ifdef DAMAGE + #include "damage.h" +@@ -85,6 +88,7 @@ + #include "xf86Crtc.h" + #include "X11/Xatom.h" -+ if (info->drm_mode_setting) -+ return; -+ - xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, - "EngineRestore (%d/%d)\n", - info->CurrentLayout.pixel_code, -@@ -433,8 +437,8 @@ void RADEONEngineInit(ScrnInfoPtr pScrn) - info->CurrentLayout.bitsPerPixel); ++#include "radeon_bufmgr.h" + /* Render support */ + #ifdef RENDER + #include "picturestr.h" +@@ -414,6 +418,11 @@ typedef enum { - #ifdef XF86DRI -- if (info->directRenderingEnabled && (IS_R300_3D || IS_R500_3D)) { -- drm_radeon_getparam_t np; -+ if ((info->directRenderingEnabled || info->drm_mode_setting) && (IS_R300_3D || IS_R500_3D)) { -+ drm_radeon_getparam_t np; - int num_pipes; + typedef struct _atomBiosHandle *atomBiosHandlePtr; - memset(&np, 0, sizeof(np)); -@@ -453,59 +457,62 @@ void RADEONEngineInit(ScrnInfoPtr pScrn) - } - #endif ++struct radeon_exa_pixmap_priv { ++ dri_bo *bo; ++ int flags; ++}; ++ + typedef struct { + uint32_t pci_device_id; + RADEONChipFamily chip_family; +@@ -424,7 +433,27 @@ typedef struct { + int singledac; + } RADEONCardInfo; -- if ((info->ChipFamily == CHIP_FAMILY_RV410) || -- (info->ChipFamily == CHIP_FAMILY_R420) || -- (info->ChipFamily == CHIP_FAMILY_RS600) || -- (info->ChipFamily == CHIP_FAMILY_RS690) || -- (info->ChipFamily == CHIP_FAMILY_RS740) || -- (info->ChipFamily == CHIP_FAMILY_RS400) || -- (info->ChipFamily == CHIP_FAMILY_RS480) || -- IS_R500_3D) { -- if (info->accel_state->num_gb_pipes == 0) { -- uint32_t gb_pipe_sel = INREG(R400_GB_PIPE_SELECT); -- -- info->accel_state->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; -- if (IS_R500_3D) -- OUTPLL(pScrn, R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4)); -- } -- } else { -- if (info->accel_state->num_gb_pipes == 0) { -- if ((info->ChipFamily == CHIP_FAMILY_R300) || -- (info->ChipFamily == CHIP_FAMILY_R350)) { -- /* R3xx chips */ -- info->accel_state->num_gb_pipes = 2; -- } else { -- /* RV3xx chips */ -- info->accel_state->num_gb_pipes = 1; -+ if (!info->drm_mode_setting) { -+ if ((info->ChipFamily == CHIP_FAMILY_RV410) || -+ (info->ChipFamily == CHIP_FAMILY_R420) || -+ (info->ChipFamily == CHIP_FAMILY_RS600) || -+ (info->ChipFamily == CHIP_FAMILY_RS690) || -+ (info->ChipFamily == CHIP_FAMILY_RS740) || -+ (info->ChipFamily == CHIP_FAMILY_RS400) || -+ (info->ChipFamily == CHIP_FAMILY_RS480) || -+ IS_R500_3D) { -+ if (info->accel_state->num_gb_pipes == 0) { -+ uint32_t gb_pipe_sel = INREG(R400_GB_PIPE_SELECT); ++#define RADEON_2D_EXA_COPY 1 ++#define RADEON_2D_EXA_SOLID 2 + -+ info->accel_state->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; -+ if (IS_R500_3D) -+ OUTPLL(pScrn, R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4)); -+ } -+ } else { -+ if (info->accel_state->num_gb_pipes == 0) { -+ if ((info->ChipFamily == CHIP_FAMILY_R300) || -+ (info->ChipFamily == CHIP_FAMILY_R350)) { -+ /* R3xx chips */ -+ info->accel_state->num_gb_pipes = 2; -+ } else { -+ /* RV3xx chips */ -+ info->accel_state->num_gb_pipes = 1; -+ } - } - } -- } ++struct radeon_2d_state { ++ int op; // ++ uint32_t dst_pitch_offset; ++ uint32_t src_pitch_offset; ++ uint32_t dp_gui_master_cntl; ++ uint32_t dp_cntl; ++ uint32_t dp_write_mask; ++ uint32_t dp_brush_frgd_clr; ++ uint32_t dp_brush_bkgd_clr; ++ uint32_t dp_src_frgd_clr; ++ uint32_t dp_src_bkgd_clr; ++ uint32_t default_sc_bottom_right; ++ dri_bo *dst_bo; ++ dri_bo *src_bo; ++}; ++ + #ifdef XF86DRI ++ + struct radeon_cp { + Bool CPRuns; /* CP is running */ + Bool CPInUse; /* CP has been used by X server */ +@@ -438,6 +467,10 @@ struct radeon_cp { + drmBufPtr indirectBuffer; + int indirectStart; -- if (IS_R300_3D || IS_R500_3D) -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, -- "num quad-pipes is %d\n", info->accel_state->num_gb_pipes); -- -- if (IS_R300_3D || IS_R500_3D) { -- uint32_t gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16); -- -- switch(info->accel_state->num_gb_pipes) { -- case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break; -- case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break; -- case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break; -- default: -- case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break; -- } ++ drmBuf ib_gem_fake; ++ void *ib_ptr; ++ ++ struct radeon_relocs_info relocs; + /* Debugging info for BEGIN_RING/ADVANCE_RING pairs. */ + int dma_begin_count; + char *dma_debug_func; +@@ -504,13 +537,13 @@ struct radeon_dri { + drm_handle_t ringHandle; /* Handle from drmAddMap */ + drmSize ringMapSize; /* Size of map */ + int ringSize; /* Size of ring (in MB) */ +- drmAddress ring; /* Map */ ++ // drmAddress ring; /* Map */ + int ringSizeLog2QW; + + unsigned long ringReadOffset; /* Offset into GART space */ + drm_handle_t ringReadPtrHandle; /* Handle from drmAddMap */ + drmSize ringReadMapSize; /* Size of map */ +- drmAddress ringReadPtr; /* Map */ ++ // drmAddress ringReadPtr; /* Map */ + + /* CP vertex/indirect buffer data */ + unsigned long bufStart; /* Offset into GART space */ +@@ -529,7 +562,6 @@ struct radeon_dri { + drmAddress gartTex; /* Map */ + int log2GARTTexGran; + +- /* DRI screen private data */ + int fbX; + int fbY; + int backX; +@@ -789,6 +821,7 @@ typedef struct { + RADEONCardType cardType; /* Current card is a PCI card */ + struct radeon_cp *cp; + struct radeon_dri *dri; ++ struct radeon_dri2 dri2; + #ifdef USE_EXA + Bool accelDFS; + #endif +@@ -892,6 +925,27 @@ typedef struct { + + Bool r4xx_atom; + ++ Bool new_cs; // new command submission routine ++ struct radeon_2d_state state_2d; ++ void (*reemit_current2d)(ScrnInfoPtr pScrn, int op); // emit the current 2D state into the IB ++ Bool cs_used_depth; ++ Bool drm_mm; // the drm memory manager exists and is initialised ++ struct { ++ uint64_t vram_size; ++ uint64_t gart_size; ++ ++ dri_bo *front_buffer; ++ dri_bo *cursor[2]; ++ } mm; ++ ++ drm_handle_t fb_map_handle; ++ Bool drm_mode_setting; ++#ifdef XF86DRM_MODE ++ drmmode_rec drmmode; ++#endif ++ ++ int can_resize; ++ dri_bufmgr *bufmgr; + } RADEONInfoRec, *RADEONInfoPtr; + + #define RADEONWaitForFifo(pScrn, entries) \ +@@ -1147,6 +1201,13 @@ extern void + radeon_legacy_free_memory(ScrnInfoPtr pScrn, + void *mem_struct); + ++/* radeon_memory.c */ ++Bool radeon_setup_kernel_mem(ScreenPtr pScreen); ++Bool RADEONDRIDoMappings(ScreenPtr pScreen); ++Bool radeon_update_dri_buffers(ScreenPtr pScreen); ++ ++dri_bo *radeon_get_pixmap_bo(PixmapPtr pPix); ++void radeon_set_pixmap_bo(PixmapPtr pPix, dri_bo *bo); + #ifdef XF86DRI + # ifdef USE_XAA + /* radeon_accelfuncs.c */ +@@ -1165,7 +1226,9 @@ do { \ + + #define RADEONCP_RELEASE(pScrn, info) \ + do { \ +- if (info->cp->CPInUse) { \ ++ if (info->new_cs) { \ ++ RADEONCPReleaseIndirect(pScrn); \ ++ } else if (info->cp->CPInUse) { \ + RADEON_PURGE_CACHE(); \ + RADEON_WAIT_UNTIL_IDLE(); \ + RADEONCPReleaseIndirect(pScrn); \ +@@ -1200,7 +1263,7 @@ do { \ + + #define RADEONCP_REFRESH(pScrn, info) \ + do { \ +- if (!info->cp->CPInUse) { \ ++ if (!info->cp->CPInUse && !info->new_cs) { \ + if (info->cp->needCacheFlush) { \ + RADEON_PURGE_CACHE(); \ + RADEON_PURGE_ZCACHE(); \ +@@ -1227,6 +1290,13 @@ do { \ + #define RING_LOCALS uint32_t *__head = NULL; int __expected; int __count = 0 + + #define BEGIN_RING(n) do { \ ++ if (!info->cp->indirectBuffer) { \ ++ info->cp->indirectBuffer = RADEONCPGetBuffer(pScrn); \ ++ info->cp->indirectStart = 0; \ ++ } else if (info->cp->indirectBuffer->used + (n) * (int)sizeof(uint32_t) > \ ++ info->cp->indirectBuffer->total) { \ ++ RADEONCPFlushIndirect(pScrn, 1); \ ++ } \ + if (RADEON_VERBOSE) { \ + xf86DrvMsg(pScrn->scrnIndex, X_INFO, \ + "BEGIN_RING(%d) in %s\n", (unsigned int)n, __FUNCTION__);\ +@@ -1239,13 +1309,6 @@ do { \ + } \ + info->cp->dma_debug_func = __FILE__; \ + info->cp->dma_debug_lineno = __LINE__; \ +- if (!info->cp->indirectBuffer) { \ +- info->cp->indirectBuffer = RADEONCPGetBuffer(pScrn); \ +- info->cp->indirectStart = 0; \ +- } else if (info->cp->indirectBuffer->used + (n) * (int)sizeof(uint32_t) > \ +- info->cp->indirectBuffer->total) { \ +- RADEONCPFlushIndirect(pScrn, 1); \ +- } \ + __expected = n; \ + __head = (pointer)((char *)info->cp->indirectBuffer->address + \ + info->cp->indirectBuffer->used); \ +@@ -1288,6 +1351,14 @@ do { \ + OUT_RING(val); \ + } while (0) + ++/* TODO - VRAM is wrong in general but true for now - all EXA stuff ++ is in VRAM */ ++#define OUT_RING_RELOC(x, read_domains, write_domains) \ ++ do { \ ++ radeon_bufmgr_emit_reloc(x, &info->cp->relocs, __head, &__count, read_domains, write_domains); \ ++ } while(0) ++ ++ + #define FLUSH_RING() \ + do { \ + if (RADEON_VERBOSE) \ +diff --git a/src/radeon_accel.c b/src/radeon_accel.c +index a9a4848..9d02ac8 100644 +--- a/src/radeon_accel.c ++++ b/src/radeon_accel.c +@@ -92,6 +92,7 @@ + + /* X and server generic header files */ + #include "xf86.h" ++#include "radeon_bufmgr_gem.h" + + static void R600EngineReset(ScrnInfoPtr pScrn); + +@@ -373,6 +374,9 @@ void RADEONEngineRestore(ScrnInfoPtr pScrn) + RADEONInfoPtr info = RADEONPTR(pScrn); + unsigned char *RADEONMMIO = info->MMIO; + ++ if (info->drm_mode_setting) ++ return; ++ + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, + "EngineRestore (%d/%d)\n", + info->CurrentLayout.pixel_code, +@@ -433,8 +437,8 @@ void RADEONEngineInit(ScrnInfoPtr pScrn) + info->CurrentLayout.bitsPerPixel); + + #ifdef XF86DRI +- if (info->directRenderingEnabled && (IS_R300_3D || IS_R500_3D)) { +- drm_radeon_getparam_t np; ++ if ((info->directRenderingEnabled || info->drm_mode_setting) && (IS_R300_3D || IS_R500_3D)) { ++ drm_radeon_getparam_t np; + int num_pipes; + + memset(&np, 0, sizeof(np)); +@@ -453,59 +457,62 @@ void RADEONEngineInit(ScrnInfoPtr pScrn) + } + #endif + +- if ((info->ChipFamily == CHIP_FAMILY_RV410) || +- (info->ChipFamily == CHIP_FAMILY_R420) || +- (info->ChipFamily == CHIP_FAMILY_RS600) || +- (info->ChipFamily == CHIP_FAMILY_RS690) || +- (info->ChipFamily == CHIP_FAMILY_RS740) || +- (info->ChipFamily == CHIP_FAMILY_RS400) || +- (info->ChipFamily == CHIP_FAMILY_RS480) || +- IS_R500_3D) { +- if (info->accel_state->num_gb_pipes == 0) { +- uint32_t gb_pipe_sel = INREG(R400_GB_PIPE_SELECT); +- +- info->accel_state->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; +- if (IS_R500_3D) +- OUTPLL(pScrn, R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4)); +- } +- } else { +- if (info->accel_state->num_gb_pipes == 0) { +- if ((info->ChipFamily == CHIP_FAMILY_R300) || +- (info->ChipFamily == CHIP_FAMILY_R350)) { +- /* R3xx chips */ +- info->accel_state->num_gb_pipes = 2; +- } else { +- /* RV3xx chips */ +- info->accel_state->num_gb_pipes = 1; ++ if (!info->drm_mode_setting) { ++ if ((info->ChipFamily == CHIP_FAMILY_RV410) || ++ (info->ChipFamily == CHIP_FAMILY_R420) || ++ (info->ChipFamily == CHIP_FAMILY_RS600) || ++ (info->ChipFamily == CHIP_FAMILY_RS690) || ++ (info->ChipFamily == CHIP_FAMILY_RS740) || ++ (info->ChipFamily == CHIP_FAMILY_RS400) || ++ (info->ChipFamily == CHIP_FAMILY_RS480) || ++ IS_R500_3D) { ++ if (info->accel_state->num_gb_pipes == 0) { ++ uint32_t gb_pipe_sel = INREG(R400_GB_PIPE_SELECT); ++ ++ info->accel_state->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; ++ if (IS_R500_3D) ++ OUTPLL(pScrn, R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4)); ++ } ++ } else { ++ if (info->accel_state->num_gb_pipes == 0) { ++ if ((info->ChipFamily == CHIP_FAMILY_R300) || ++ (info->ChipFamily == CHIP_FAMILY_R350)) { ++ /* R3xx chips */ ++ info->accel_state->num_gb_pipes = 2; ++ } else { ++ /* RV3xx chips */ ++ info->accel_state->num_gb_pipes = 1; ++ } + } +- } +- } +- +- if (IS_R300_3D || IS_R500_3D) +- xf86DrvMsg(pScrn->scrnIndex, X_INFO, +- "num quad-pipes is %d\n", info->accel_state->num_gb_pipes); +- +- if (IS_R300_3D || IS_R500_3D) { +- uint32_t gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16); - +- switch(info->accel_state->num_gb_pipes) { +- case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break; +- case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break; +- case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break; +- default: +- case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break; + } + - OUTREG(R300_GB_TILE_CONFIG, gb_tile_config); - OUTREG(RADEON_WAIT_UNTIL, RADEON_WAIT_2D_IDLECLEAN | RADEON_WAIT_3D_IDLECLEAN); - OUTREG(R300_DST_PIPE_CONFIG, INREG(R300_DST_PIPE_CONFIG) | R300_PIPE_AUTO_CONFIG); @@ -1241,7 +2651,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_accel.c.dave xf86-video-ati-6.12.2/src switch (info->CurrentLayout.pixel_code) { case 8: datatype = 2; break; -@@ -613,6 +620,119 @@ int RADEONCPStop(ScrnInfoPtr pScrn, RADE +@@ -613,6 +620,119 @@ int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info) } } @@ -1361,7 +2771,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_accel.c.dave xf86-video-ati-6.12.2/src /* Get an indirect buffer for the CP 2D acceleration commands */ drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn) { -@@ -623,6 +743,9 @@ drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr +@@ -623,6 +743,9 @@ drmBufPtr RADEONCPGetBuffer(ScrnInfoPtr pScrn) int size = 0; int i = 0; int ret; @@ -1371,7 +2781,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_accel.c.dave xf86-video-ati-6.12.2/src #if 0 /* FIXME: pScrn->pScreen has not been initialized when this is first -@@ -692,6 +815,11 @@ void RADEONCPFlushIndirect(ScrnInfoPtr p +@@ -692,6 +815,11 @@ void RADEONCPFlushIndirect(ScrnInfoPtr pScrn, int discard) if (!buffer) return; if (start == buffer->used && !discard) return; @@ -1383,7 +2793,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_accel.c.dave xf86-video-ati-6.12.2/src if (RADEON_VERBOSE) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Flushing buffer %d\n", buffer->idx); -@@ -750,10 +878,16 @@ void RADEONCPReleaseIndirect(ScrnInfoPtr +@@ -750,10 +878,16 @@ void RADEONCPReleaseIndirect(ScrnInfoPtr pScrn) } } @@ -1426,7 +2836,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_accel.c.dave xf86-video-ati-6.12.2/src RADEONAccelInitCP(pScreen, a); else #endif /* XF86DRI */ -@@ -1069,11 +1204,13 @@ void RADEONInit3DEngine(ScrnInfoPtr pScr +@@ -1069,11 +1204,13 @@ void RADEONInit3DEngine(ScrnInfoPtr pScrn) RADEONInfoPtr info = RADEONPTR (pScrn); #ifdef XF86DRI @@ -1444,7 +2854,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_accel.c.dave xf86-video-ati-6.12.2/src RADEONInit3DEngineCP(pScrn); } else #endif -@@ -1081,7 +1218,7 @@ void RADEONInit3DEngine(ScrnInfoPtr pScr +@@ -1081,7 +1218,7 @@ void RADEONInit3DEngine(ScrnInfoPtr pScrn) info->accel_state->XInited3D = TRUE; } @@ -1453,19 +2863,52 @@ diff -up xf86-video-ati-6.12.2/src/radeon_accel.c.dave xf86-video-ati-6.12.2/src #ifdef USE_XAA #ifdef XF86DRI Bool -diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_bufmgr_gem.c ---- /dev/null 2009-04-15 09:55:06.267190488 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_bufmgr_gem.c 2009-04-15 12:46:30.000000000 +1000 -@@ -0,0 +1,639 @@ -+/************************************************************************** -+ * -+ * Copyright © 2007-2008 Red Hat Inc. -+ * Copyright © 2007 Intel Corporation -+ * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA -+ * All Rights Reserved. +diff --git a/src/radeon_bufmgr.h b/src/radeon_bufmgr.h +new file mode 100644 +index 0000000..481c5cf +--- /dev/null ++++ b/src/radeon_bufmgr.h +@@ -0,0 +1,25 @@ ++/** ++ * @file intel_bufmgr.h + * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the ++ * Public definitions of Intel-specific bufmgr functions. ++ */ ++ ++#ifndef RADEON_BUFMGR_H ++#define RADEON_BUFMGR_H ++ ++#include "radeon_dri_bufmgr.h" ++ ++struct radeon_bufmgr { ++ void (*emit_reloc)(dri_bo *buf, struct radeon_relocs_info *relocs, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain); ++}; ++ ++dri_bufmgr *radeon_bufmgr_gem_init(int fd); ++dri_bo *radeon_bo_gem_create_from_name(dri_bufmgr *bufmgr, const char *name, ++ unsigned int handle); ++dri_bo *radeon_bo_gem_create_from_handle(dri_bufmgr *bufmgr, ++ uint32_t handle, unsigned long size); ++ ++void radeon_bufmgr_emit_reloc(dri_bo *buf, struct radeon_relocs_info *relocs, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain); ++ ++void radeon_bufmgr_post_submit(dri_bufmgr *bufmgr); ++#endif +diff --git a/src/radeon_bufmgr_gem.c b/src/radeon_bufmgr_gem.c +new file mode 100644 +index 0000000..634d28d +--- /dev/null ++++ b/src/radeon_bufmgr_gem.c +@@ -0,0 +1,639 @@ ++/************************************************************************** ++ * ++ * Copyright © 2007-2008 Red Hat Inc. ++ * Copyright © 2007 Intel Corporation ++ * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA ++ * All Rights Reserved. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to @@ -1724,7 +3167,7 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_bufmgr_gem.c + do { + ret = drmCommandWriteRead(bufmgr_gem->fd, DRM_RADEON_GEM_WAIT_IDLE, + &args, sizeof(args)); -+ } while (ret == -EAGAIN); ++ } while (ret == -EBUSY); + } + return; +} @@ -2096,9 +3539,11 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_bufmgr_gem.c + *name = flink.name; + return 0; +} -diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_bufmgr_gem.h ---- /dev/null 2009-04-15 09:55:06.267190488 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_bufmgr_gem.h 2009-04-15 12:46:30.000000000 +1000 +diff --git a/src/radeon_bufmgr_gem.h b/src/radeon_bufmgr_gem.h +new file mode 100644 +index 0000000..52b3d99 +--- /dev/null ++++ b/src/radeon_bufmgr_gem.h @@ -0,0 +1,16 @@ +#ifndef RADEON_BUFMGR_GEM_H +#define RADEON_BUFMGR_GEM_H @@ -2116,39 +3561,11 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_bufmgr_gem.h +int radeon_bufmgr_gem_in_vram(dri_bo *buf); +int radeon_bo_gem_name_buffer(dri_bo *bo, uint32_t *name); +#endif -diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_bufmgr.h ---- /dev/null 2009-04-15 09:55:06.267190488 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_bufmgr.h 2009-04-15 12:46:30.000000000 +1000 -@@ -0,0 +1,25 @@ -+/** -+ * @file intel_bufmgr.h -+ * -+ * Public definitions of Intel-specific bufmgr functions. -+ */ -+ -+#ifndef RADEON_BUFMGR_H -+#define RADEON_BUFMGR_H -+ -+#include "radeon_dri_bufmgr.h" -+ -+struct radeon_bufmgr { -+ void (*emit_reloc)(dri_bo *buf, struct radeon_relocs_info *relocs, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain); -+}; -+ -+dri_bufmgr *radeon_bufmgr_gem_init(int fd); -+dri_bo *radeon_bo_gem_create_from_name(dri_bufmgr *bufmgr, const char *name, -+ unsigned int handle); -+dri_bo *radeon_bo_gem_create_from_handle(dri_bufmgr *bufmgr, -+ uint32_t handle, unsigned long size); -+ -+void radeon_bufmgr_emit_reloc(dri_bo *buf, struct radeon_relocs_info *relocs, uint32_t *head, uint32_t *count_p, uint32_t read_domains, uint32_t write_domain); -+ -+void radeon_bufmgr_post_submit(dri_bufmgr *bufmgr); -+#endif -diff -up xf86-video-ati-6.12.2/src/radeon_commonfuncs.c.dave xf86-video-ati-6.12.2/src/radeon_commonfuncs.c ---- xf86-video-ati-6.12.2/src/radeon_commonfuncs.c.dave 2009-03-14 08:24:21.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_commonfuncs.c 2009-04-15 12:46:30.000000000 +1000 -@@ -62,12 +62,15 @@ static void FUNC_NAME(RADEONInit3DEngine +diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c +index a9bc7d2..6c22339 100644 +--- a/src/radeon_commonfuncs.c ++++ b/src/radeon_commonfuncs.c +@@ -62,12 +62,15 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) info->accel_state->texW[1] = info->accel_state->texH[1] = 1; if (IS_R300_3D || IS_R500_3D) { @@ -2169,7 +3586,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_commonfuncs.c.dave xf86-video-ati-6.12 gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16 | R300_SUBPIXEL_1_16); -@@ -79,10 +82,12 @@ static void FUNC_NAME(RADEONInit3DEngine +@@ -79,10 +82,12 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break; } @@ -2184,7 +3601,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_commonfuncs.c.dave xf86-video-ati-6.12 OUT_ACCEL_REG(R300_GB_SELECT, 0); OUT_ACCEL_REG(R300_GB_ENABLE, 0); FINISH_ACCEL(); -@@ -626,6 +631,39 @@ static void FUNC_NAME(RADEONInit3DEngine +@@ -626,6 +631,39 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) } @@ -2224,7 +3641,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_commonfuncs.c.dave xf86-video-ati-6.12 /* inserts a wait for vline in the command stream */ void FUNC_NAME(RADEONWaitForVLine)(ScrnInfoPtr pScrn, PixmapPtr pPix, int crtc, int start, int stop) -@@ -644,16 +682,19 @@ void FUNC_NAME(RADEONWaitForVLine)(ScrnI +@@ -644,16 +682,19 @@ void FUNC_NAME(RADEONWaitForVLine)(ScrnInfoPtr pScrn, PixmapPtr pPix, if (!xf86_config->crtc[crtc]->enabled) return; @@ -2252,7 +3669,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_commonfuncs.c.dave xf86-video-ati-6.12 start = max(start, 0); stop = min(stop, xf86_config->crtc[crtc]->mode.VDisplay); -@@ -661,6 +702,13 @@ void FUNC_NAME(RADEONWaitForVLine)(ScrnI +@@ -661,6 +702,13 @@ void FUNC_NAME(RADEONWaitForVLine)(ScrnInfoPtr pScrn, PixmapPtr pPix, if (start > xf86_config->crtc[crtc]->mode.VDisplay) return; @@ -2266,7 +3683,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_commonfuncs.c.dave xf86-video-ati-6.12 BEGIN_ACCEL(2); if (IS_AVIVO_VARIANT) { -@@ -712,7 +760,7 @@ void FUNC_NAME(RADEONWaitForIdle)(ScrnIn +@@ -712,7 +760,7 @@ void FUNC_NAME(RADEONWaitForIdle)(ScrnInfoPtr pScrn) #ifdef ACCEL_CP /* Make sure the CP is idle first */ @@ -2275,10 +3692,11 @@ diff -up xf86-video-ati-6.12.2/src/radeon_commonfuncs.c.dave xf86-video-ati-6.12 int ret; FLUSH_RING(); -diff -up xf86-video-ati-6.12.2/src/radeon_cursor.c.dave xf86-video-ati-6.12.2/src/radeon_cursor.c ---- xf86-video-ati-6.12.2/src/radeon_cursor.c.dave 2008-11-25 17:20:03.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_cursor.c 2009-04-15 12:46:30.000000000 +1000 -@@ -96,12 +96,16 @@ avivo_setup_cursor(xf86CrtcPtr crtc, Boo +diff --git a/src/radeon_cursor.c b/src/radeon_cursor.c +index 0fcdcf0..cbc188b 100644 +--- a/src/radeon_cursor.c ++++ b/src/radeon_cursor.c +@@ -96,12 +96,16 @@ avivo_setup_cursor(xf86CrtcPtr crtc, Bool enable) RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; RADEONInfoPtr info = RADEONPTR(crtc->scrn); unsigned char *RADEONMMIO = info->MMIO; @@ -2297,7 +3715,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_cursor.c.dave xf86-video-ati-6.12.2/sr OUTREG(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset, ((CURSOR_WIDTH - 1) << 16) | (CURSOR_HEIGHT - 1)); OUTREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, -@@ -203,6 +207,7 @@ radeon_crtc_set_cursor_position (xf86Crt +@@ -203,6 +207,7 @@ radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y) int xorigin = 0, yorigin = 0; int stride = 256; DisplayModePtr mode = &crtc->mode; @@ -2305,7 +3723,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_cursor.c.dave xf86-video-ati-6.12.2/sr if (x < 0) xorigin = -x+1; if (y < 0) yorigin = -y+1; -@@ -233,8 +238,9 @@ radeon_crtc_set_cursor_position (xf86Crt +@@ -233,8 +238,9 @@ radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y) | (yorigin ? 0 : y))); RADEONCTRACE(("cursor_offset: 0x%x, yorigin: %d, stride: %d, temp %08X\n", radeon_crtc->cursor_offset + pScrn->fbOffset, yorigin, stride, temp)); @@ -2316,7 +3734,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_cursor.c.dave xf86-video-ati-6.12.2/sr } else if (crtc_id == 1) { OUTREG(RADEON_CUR2_HORZ_VERT_OFF, (RADEON_CUR2_LOCK | (xorigin << 16) -@@ -244,8 +250,9 @@ radeon_crtc_set_cursor_position (xf86Crt +@@ -244,8 +250,9 @@ radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y) | (yorigin ? 0 : y))); RADEONCTRACE(("cursor_offset2: 0x%x, yorigin: %d, stride: %d, temp %08X\n", radeon_crtc->cursor_offset + pScrn->fbOffset, yorigin, stride, temp)); @@ -2327,7 +3745,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_cursor.c.dave xf86-video-ati-6.12.2/sr } } } -@@ -299,10 +306,12 @@ radeon_crtc_load_cursor_argb (xf86CrtcPt +@@ -299,10 +306,12 @@ radeon_crtc_load_cursor_argb (xf86CrtcPtr crtc, CARD32 *image) RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; RADEONInfoPtr info = RADEONPTR(pScrn); CURSOR_SWAPPING_DECL_MMIO @@ -2341,522 +3759,1174 @@ diff -up xf86-video-ati-6.12.2/src/radeon_cursor.c.dave xf86-video-ati-6.12.2/sr info->cursor_argb = TRUE; CURSOR_SWAPPING_START(); -diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_dri2.c ---- /dev/null 2009-04-15 09:55:06.267190488 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_dri2.c 2009-04-15 12:46:30.000000000 +1000 -@@ -0,0 +1,224 @@ -+/* -+ * Copyright 2008 Kristian Høgsberg -+ * Copyright 2008 Jérôme Glisse -+ * -+ * All Rights Reserved. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining -+ * a copy of this software and associated documentation files (the -+ * "Software"), to deal in the Software without restriction, including -+ * without limitation on the rights to use, copy, modify, merge, -+ * publish, distribute, sublicense, and/or sell copies of the Software, -+ * and to permit persons to whom the Software is furnished to do so, -+ * subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the -+ * next paragraph) shall be included in all copies or substantial -+ * portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR -+ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -+ * DEALINGS IN THE SOFTWARE. -+ */ -+#ifdef HAVE_CONFIG_H -+#include "config.h" +diff --git a/src/radeon_dri.c b/src/radeon_dri.c +index f6c6261..ed6c3d3 100644 +--- a/src/radeon_dri.c ++++ b/src/radeon_dri.c +@@ -40,6 +40,8 @@ + + #include + #include ++#include ++#include + + /* Driver data structures */ + #include "radeon.h" +@@ -53,6 +55,8 @@ + + #include "atipciids.h" + ++#include "radeon_drm.h" ++ + /* X and server generic header files */ + #include "xf86.h" + #include "xf86PciInfo.h" +@@ -70,16 +74,31 @@ static size_t radeon_drm_page_size; + extern void GlxSetVisualConfigs(int nconfigs, __GLXvisualConfig *configs, + void **configprivs); + ++#if defined(DAMAGE) && (DRIINFO_MAJOR_VERSION > 5 || \ ++ (DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 1)) ++#define DRI_SUPPORTS_CLIP_NOTIFY 1 ++#else ++#define DRI_SUPPORTS_CLIP_NOTIFY 0 +#endif + -+#include -+#include -+#include -+#include ++#if (DRIINFO_MAJOR_VERSION > 5 || \ ++ (DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 4)) ++#define DRI_DRIVER_FRAMEBUFFER_MAP 1 ++#else ++#define DRI_DRIVER_FRAMEBUFFER_MAP 0 ++#endif + -+#include "radeon.h" -+#include "radeon_dri2.h" -+#include "radeon_version.h" + static void RADEONDRITransitionTo2d(ScreenPtr pScreen); + static void RADEONDRITransitionTo3d(ScreenPtr pScreen); + static void RADEONDRITransitionMultiToSingle3d(ScreenPtr pScreen); + static void RADEONDRITransitionSingleToMulti3d(ScreenPtr pScreen); + ++static Bool radeon_dri_gart_init(ScreenPtr pScreen); + -+#ifdef DRI2 + #ifdef DAMAGE + static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, RegionPtr pReg); + +-#if (DRIINFO_MAJOR_VERSION > 5 || \ +- (DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 1)) ++#if DRI_SUPPORTS_CLIP_NOTIFY + static void RADEONDRIClipNotify(ScreenPtr pScreen, WindowPtr *ppWin, int num); + #endif + #endif +@@ -352,6 +371,81 @@ static void RADEONDestroyContext(ScreenPtr pScreen, drm_context_t hwContext, + #endif + } + ++/* so we need to add a frontbuffer map no matter what */ ++#define ROUND_TO(x, y) (((x) + (y) - 1) / (y) * (y)) ++#define ROUND_TO_PAGE(x) ROUND_TO((x), radeon_drm_page_size) + -+struct dri2_buffer_priv { -+ PixmapPtr pixmap; -+}; ++static void ++radeon_update_screen_private(ScrnInfoPtr pScrn, drm_radeon_sarea_t * sarea) ++{ ++ RADEONInfoPtr info = RADEONPTR(pScrn); ++ RADEONDRIPtr pRADEONDRI; + ++ pRADEONDRI = (RADEONDRIPtr)info->dri->pDRIInfo->devPrivate; ++ info->dri->pDRIInfo->frameBufferPhysicalAddress = (char *) info->LinearAddr; ++ info->dri->pDRIInfo->frameBufferStride = pScrn->displayWidth * info->CurrentLayout.pixel_bytes; ++ info->dri->pDRIInfo->frameBufferSize = ROUND_TO_PAGE(pScrn->displayWidth * pScrn->virtualY * info->CurrentLayout.pixel_bytes); ++#if DRI_DRIVER_FRAMEBUFFER_MAP ++ info->dri->pDRIInfo->hFrameBuffer = info->fb_map_handle; ++#endif ++} + -+static DRI2BufferPtr -+radeon_dri2_create_buffers(DrawablePtr drawable, -+ unsigned int *attachments, -+ int count) ++static Bool ++radeon_update_dri_mappings(ScrnInfoPtr pScrn, drm_radeon_sarea_t * sarea) +{ -+ ScreenPtr pScreen = drawable->pScreen; -+ DRI2BufferPtr buffers; -+ struct dri2_buffer_priv *privates; -+ PixmapPtr pixmap, depth_pixmap; -+ struct radeon_exa_pixmap_priv *driver_priv; -+ int i, r; ++ RADEONInfoPtr info = RADEONPTR(pScrn); ++ uint32_t fb_addr, fb_size; ++ int ret; + -+ buffers = xcalloc(count, sizeof *buffers); -+ if (buffers == NULL) { -+ return NULL; -+ } -+ privates = xcalloc(count, sizeof(struct dri2_buffer_priv)); -+ if (privates == NULL) { -+ xfree(buffers); -+ return NULL; -+ } ++ if (!info->drm_mm) ++ return TRUE; + -+ depth_pixmap = NULL; -+ for (i = 0; i < count; i++) { -+ if (attachments[i] == DRI2BufferFrontLeft) { -+ if (drawable->type == DRAWABLE_PIXMAP) { -+ pixmap = (Pixmap*)drawable; -+ } else { -+ pixmap = (*pScreen->GetWindowPixmap)((WindowPtr)drawable); -+ } -+ pixmap->refcnt++; -+ } else if (attachments[i] == DRI2BufferStencil && depth_pixmap) { -+ pixmap = depth_pixmap; -+ pixmap->refcnt++; -+ } else { -+ pixmap = (*pScreen->CreatePixmap)(pScreen, -+ drawable->width, -+ drawable->height, -+ drawable->depth, -+ 0); -+ } + -+ if (attachments[i] == DRI2BufferDepth) { -+ depth_pixmap = pixmap; -+ } -+ driver_priv = exaGetPixmapDriverPrivate(pixmap); -+ r = radeon_bo_gem_name_buffer(driver_priv->bo, &buffers[i].name); -+ if (r) { -+ /* FIXME: cleanup */ -+ fprintf(stderr, "flink error: %d %s\n", r, strerror(r)); -+ xfree(buffers); -+ xfree(privates); -+ return NULL; -+ } -+ buffers[i].attachment = attachments[i]; -+ buffers[i].pitch = pixmap->devKind; -+ buffers[i].cpp = pixmap->drawable.bitsPerPixel / 8; -+ buffers[i].driverPrivate = &privates[i]; -+ buffers[i].flags = 0; /* not tiled */ -+ privates[i].pixmap = pixmap; ++ fb_addr = info->mm.front_buffer->offset + info->LinearAddr; ++ fb_size = ROUND_TO_PAGE(pScrn->displayWidth * pScrn->virtualY * info->CurrentLayout.pixel_bytes); ++ ++ if (info->fb_map_handle) { ++ drmRmMap(info->dri->drmFD, info->fb_map_handle); ++ info->fb_map_handle = 0; + } -+ return buffers; ++ ++ ret = drmAddMap(info->dri->drmFD, fb_addr, fb_size, DRM_FRAME_BUFFER, 0, ++ &info->fb_map_handle); ++ ++ ErrorF("adding fb map from %x for %x ret %d %x\n", fb_addr, fb_size, ret, info->fb_map_handle); ++ ++ if (ret < 0) ++ return FALSE; ++ ++ return TRUE; +} + -+static void -+radeon_dri2_destroy_buffers(DrawablePtr drawable, -+ DRI2BufferPtr buffers, -+ int count) ++Bool radeon_update_dri_buffers(ScreenPtr pScreen) +{ -+ ScreenPtr pScreen = drawable->pScreen; -+ struct dri2_buffer_priv *private; -+ int i; -+ -+ for (i = 0; i < count; i++) { -+ private = buffers[i].driverPrivate; -+ (*pScreen->DestroyPixmap)(private->pixmap); -+ } -+ if (buffers) { -+ xfree(buffers[0].driverPrivate); -+ xfree(buffers); -+ } -+} ++ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; ++ RADEONInfoPtr info = RADEONPTR(pScrn); ++ Bool success; ++ drm_radeon_sarea_t *sarea; + -+static void -+radeon_dri2_copy_region(DrawablePtr drawable, -+ RegionPtr region, -+ DRI2BufferPtr dest_buffer, -+ DRI2BufferPtr src_buffer) -+{ -+ struct dri2_buffer_priv *private = src_buffer->driverPrivate; -+ ScreenPtr pScreen = drawable->pScreen; -+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; -+ PixmapPtr pixmap = private->pixmap; -+ RegionPtr copy_clip; -+ GCPtr gc; ++ if (info->ChipFamily >= CHIP_FAMILY_R600) ++ return TRUE; + -+ gc = GetScratchGC(drawable->depth, pScreen); -+ copy_clip = REGION_CREATE(pScreen, NULL, 0); -+ REGION_COPY(pScreen, copy_clip, region); -+ (*gc->funcs->ChangeClip) (gc, CT_REGION, copy_clip, 0); -+ ValidateGC(drawable, gc); -+ (*gc->ops->CopyArea)(&pixmap->drawable, drawable, gc, -+ 0, 0, drawable->width, drawable->height, 0, 0); -+ FreeScratchGC(gc); -+ RADEONCPReleaseIndirect(pScrn); -+} ++ if (!info->drm_mm) ++ return TRUE; + -+Bool -+radeon_dri2_screen_init(ScreenPtr pScreen) -+{ -+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; -+ RADEONInfoPtr info = RADEONPTR(pScrn); -+ DRI2InfoRec dri2_info; -+ int fd; -+ char *bus_id; -+ char *tmp_bus_id; -+ int cmp; -+ int i; ++ if (info->dri2.enabled) ++ return TRUE; + -+ if (!info->useEXA) { -+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "DRI2 requires EXA\n"); -+ return FALSE; -+ } ++ sarea = DRIGetSAREAPrivate(pScreen); ++ success = radeon_update_dri_mappings(pScrn, sarea); + -+ /* The whole drmOpen thing is a fiasco and we need to find a way -+ * back to just using open(2). For now, however, lets just make -+ * things worse with even more ad hoc directory walking code to -+ * discover the device file name. */ -+ bus_id = DRICreatePCIBusID(info->PciInfo); -+ for (i = 0; i < DRM_MAX_MINOR; i++) { -+ sprintf(info->dri2.device_name, DRM_DEV_NAME, DRM_DIR_NAME, i); -+ fd = open(info->dri2.device_name, O_RDWR); -+ if (fd < 0) -+ continue; ++ if (!success) ++ return FALSE; + -+ tmp_bus_id = drmGetBusid(fd); -+ close(fd); -+ if (tmp_bus_id == NULL) -+ continue; ++ radeon_update_screen_private(pScrn, sarea); ++ return TRUE; ++} + -+ cmp = strcmp(tmp_bus_id, bus_id); -+ drmFree(tmp_bus_id); -+ if (cmp == 0) -+ break; -+ } -+ xfree(bus_id); + /* Called when the X server is woken up to allow the last client's + * context to be saved and the X server's context to be loaded. This is + * not necessary for the Radeon since the client detects when it's +@@ -701,25 +795,35 @@ static void RADEONDRIInitGARTValues(RADEONInfoPtr info) + + info->dri->gartOffset = 0; + +- /* Initialize the CP ring buffer data */ +- info->dri->ringStart = info->dri->gartOffset; +- info->dri->ringMapSize = info->dri->ringSize*1024*1024 + radeon_drm_page_size; +- info->dri->ringSizeLog2QW = RADEONMinBits(info->dri->ringSize*1024*1024/8)-1; +- +- info->dri->ringReadOffset = info->dri->ringStart + info->dri->ringMapSize; +- info->dri->ringReadMapSize = radeon_drm_page_size; +- +- /* Reserve space for vertex/indirect buffers */ +- info->dri->bufStart = info->dri->ringReadOffset + info->dri->ringReadMapSize; +- info->dri->bufMapSize = info->dri->bufSize*1024*1024; +- +- /* Reserve the rest for GART textures */ +- info->dri->gartTexStart = info->dri->bufStart + info->dri->bufMapSize; +- s = (info->dri->gartSize*1024*1024 - info->dri->gartTexStart); +- l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS); +- if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY; +- info->dri->gartTexMapSize = (s >> l) << l; +- info->dri->log2GARTTexGran = l; ++ if (!info->drm_mm) { ++ /* Initialize the CP ring buffer data */ ++ info->dri->ringStart = info->dri->gartOffset; ++ info->dri->ringMapSize = info->dri->ringSize*1024*1024 + radeon_drm_page_size; ++ info->dri->ringSizeLog2QW = RADEONMinBits(info->dri->ringSize*1024*1024/8)-1; + -+ if (i == DRM_MAX_MINOR) { -+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -+ "DRI2: failed to open drm device\n"); -+ return FALSE; -+ } ++ info->dri->ringReadOffset = info->dri->ringStart + info->dri->ringMapSize; ++ info->dri->ringReadMapSize = radeon_drm_page_size; + -+ if ( (info->ChipFamily >= CHIP_FAMILY_R300) ) { -+ dri2_info.driverName = R300_DRIVER_NAME; -+ } else if ( info->ChipFamily >= CHIP_FAMILY_R200 ) { -+ dri2_info.driverName = R200_DRIVER_NAME; ++ /* Reserve space for vertex/indirect buffers */ ++ info->dri->bufStart = info->dri->ringReadOffset + info->dri->ringReadMapSize; ++ info->dri->bufMapSize = info->dri->bufSize*1024*1024; ++ ++ /* Reserve the rest for GART textures */ ++ info->dri->gartTexStart = info->dri->bufStart + info->dri->bufMapSize; ++ s = (info->dri->gartSize*1024*1024 - info->dri->gartTexStart); ++ l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS); ++ if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY; ++ info->dri->gartTexMapSize = (s >> l) << l; ++ info->dri->log2GARTTexGran = l; + } else { -+ dri2_info.driverName = RADEON_DRIVER_NAME; ++ s = (8*1024*1024); ++ l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS); ++ l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS); ++ if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY; ++ info->dri->gartTexMapSize = (s >> l) << l; ++ info->dri->log2GARTTexGran = l; + } -+ dri2_info.fd = info->dri2.drm_fd; -+ dri2_info.deviceName = info->dri2.device_name; -+ dri2_info.version = 1; -+ dri2_info.CreateBuffers = radeon_dri2_create_buffers; -+ dri2_info.DestroyBuffers = radeon_dri2_destroy_buffers; -+ dri2_info.CopyRegion = radeon_dri2_copy_region; -+ info->dri2.enabled = DRI2ScreenInit(pScreen, &dri2_info); -+ return info->dri2.enabled; -+} + -+void -+radeon_dri2_close_screen(ScreenPtr pScreen) -+{ -+ DRI2CloseScreen(pScreen); -+} + } + + /* AGP Mode Quirk List - Certain hostbridge/gfx-card combos don't work with +@@ -992,6 +1096,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen) + "[agp] ring handle = 0x%08x\n", + (unsigned int)info->dri->ringHandle); + + ++#if 0 + if (drmMap(info->dri->drmFD, info->dri->ringHandle, info->dri->ringMapSize, + &info->dri->ring) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map ring\n"); +@@ -1000,9 +1106,10 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen) + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] Ring mapped at 0x%08lx\n", + (unsigned long)info->dri->ring); +- +#endif -diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_dri2.h ---- /dev/null 2009-04-15 09:55:06.267190488 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_dri2.h 2009-04-15 12:46:30.000000000 +1000 -@@ -0,0 +1,42 @@ -+/* -+ * Copyright 2008 Jerome Glisse -+ * -+ * All Rights Reserved. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining -+ * a copy of this software and associated documentation files (the -+ * "Software"), to deal in the Software without restriction, including -+ * without limitation on the rights to use, copy, modify, merge, -+ * publish, distribute, sublicense, and/or sell copies of the Software, -+ * and to permit persons to whom the Software is furnished to do so, -+ * subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the -+ * next paragraph) shall be included in all copies or substantial -+ * portions of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, -+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF -+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND -+ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR -+ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, -+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -+ * DEALINGS IN THE SOFTWARE. -+ */ -+#ifndef RADEON_DRI2_H -+#define RADEON_DRI2_H + if (drmAddMap(info->dri->drmFD, info->dri->ringReadOffset, info->dri->ringReadMapSize, + DRM_AGP, DRM_READ_ONLY, &info->dri->ringReadPtrHandle) < 0) { + -+struct radeon_dri2 { -+ int drm_fd; -+ Bool enabled; -+ char device_name[64]; -+}; + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[agp] Could not add ring read ptr mapping\n"); + return FALSE; +@@ -1011,6 +1118,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen) + "[agp] ring read ptr handle = 0x%08x\n", + (unsigned int)info->dri->ringReadPtrHandle); + + -+#ifdef DRI2 -+#include "dri2.h" -+Bool radeon_dri2_screen_init(ScreenPtr pScreen); -+void radeon_dri2_close_screen(ScreenPtr pScreen); ++#if 0 + if (drmMap(info->dri->drmFD, info->dri->ringReadPtrHandle, info->dri->ringReadMapSize, + &info->dri->ringReadPtr) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, +@@ -1020,6 +1129,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoPtr info, ScreenPtr pScreen) + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] Ring read ptr mapped at 0x%08lx\n", + (unsigned long)info->dri->ringReadPtr); ++#endif + + if (drmAddMap(info->dri->drmFD, info->dri->bufStart, info->dri->bufMapSize, + DRM_AGP, 0, &info->dri->bufHandle) < 0) { +@@ -1097,6 +1207,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen) + "[pci] ring handle = 0x%08x\n", + (unsigned int)info->dri->ringHandle); + ++#if 0 + if (drmMap(info->dri->drmFD, info->dri->ringHandle, info->dri->ringMapSize, + &info->dri->ring) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not map ring\n"); +@@ -1108,6 +1219,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen) + xf86DrvMsg(pScreen->myNum, X_INFO, + "[pci] Ring contents 0x%08lx\n", + *(unsigned long *)(pointer)info->dri->ring); +#endif + + if (drmAddMap(info->dri->drmFD, info->dri->ringReadOffset, info->dri->ringReadMapSize, + DRM_SCATTER_GATHER, flags, &info->dri->ringReadPtrHandle) < 0) { +@@ -1119,8 +1231,10 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen) + "[pci] ring read ptr handle = 0x%08x\n", + (unsigned int)info->dri->ringReadPtrHandle); + ++#if 0 + if (drmMap(info->dri->drmFD, info->dri->ringReadPtrHandle, info->dri->ringReadMapSize, + &info->dri->ringReadPtr) < 0) { + + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[pci] Could not map ring read ptr\n"); + return FALSE; +@@ -1131,6 +1245,7 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen) + xf86DrvMsg(pScreen->myNum, X_INFO, + "[pci] Ring read ptr contents 0x%08lx\n", + *(unsigned long *)(pointer)info->dri->ringReadPtr); +#endif -diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_dri_bufmgr.c ---- /dev/null 2009-04-15 09:55:06.267190488 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_dri_bufmgr.c 2009-04-15 12:46:30.000000000 +1000 -@@ -0,0 +1,177 @@ -+/* -+ * Copyright © 2007 Intel Corporation -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sublicense, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the next -+ * paragraph) shall be included in all copies or substantial portions of the -+ * Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS -+ * IN THE SOFTWARE. -+ * -+ * Authors: -+ * Eric Anholt -+ * -+ */ -+ -+#include -+#include -+#include -+#include "radeon_dri_bufmgr.h" + + if (drmAddMap(info->dri->drmFD, info->dri->bufStart, info->dri->bufMapSize, + DRM_SCATTER_GATHER, 0, &info->dri->bufHandle) < 0) { +@@ -1183,6 +1298,9 @@ static Bool RADEONDRIPciInit(RADEONInfoPtr info, ScreenPtr pScreen) + */ + static Bool RADEONDRIMapInit(RADEONInfoPtr info, ScreenPtr pScreen) + { + -+/** @file dri_bufmgr.c -+ * -+ * Convenience functions for buffer management methods. -+ */ ++ if (info->drm_mm) ++ return TRUE; + /* Map registers */ + info->dri->registerSize = info->MMIOSize; + if (drmAddMap(info->dri->drmFD, info->MMIOAddr, info->dri->registerSize, +@@ -1223,20 +1341,23 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen) + drmInfo.fb_bpp = info->CurrentLayout.pixel_code; + drmInfo.depth_bpp = (info->dri->depthBits - 8) * 2; + +- drmInfo.front_offset = info->dri->frontOffset; +- drmInfo.front_pitch = info->dri->frontPitch * cpp; +- drmInfo.back_offset = info->dri->backOffset; +- drmInfo.back_pitch = info->dri->backPitch * cpp; +- drmInfo.depth_offset = info->dri->depthOffset; +- drmInfo.depth_pitch = info->dri->depthPitch * drmInfo.depth_bpp / 8; +- +- drmInfo.fb_offset = info->dri->fbHandle; +- drmInfo.mmio_offset = info->dri->registerHandle; +- drmInfo.ring_offset = info->dri->ringHandle; +- drmInfo.ring_rptr_offset = info->dri->ringReadPtrHandle; +- drmInfo.buffers_offset = info->dri->bufHandle; +- drmInfo.gart_textures_offset= info->dri->gartTexHandle; +- ++ if (!info->drm_mm) { ++ drmInfo.front_offset = info->dri->frontOffset; ++ drmInfo.front_pitch = info->dri->frontPitch * cpp; ++ drmInfo.back_offset = info->dri->backOffset; ++ drmInfo.back_pitch = info->dri->backPitch * cpp; ++ drmInfo.depth_offset = info->dri->depthOffset; ++ drmInfo.depth_pitch = info->dri->depthPitch * drmInfo.depth_bpp / 8; + -+dri_bo * -+dri_bo_alloc(dri_bufmgr *bufmgr, const char *name, unsigned long size, -+ unsigned int alignment, uint64_t location_mask) -+{ -+ return bufmgr->bo_alloc(bufmgr, name, size, alignment, location_mask); -+} ++ drmInfo.fb_offset = info->dri->fbHandle; ++ drmInfo.mmio_offset = info->dri->registerHandle; ++ drmInfo.ring_offset = info->dri->ringHandle; ++ drmInfo.ring_rptr_offset = info->dri->ringReadPtrHandle; ++ drmInfo.buffers_offset = info->dri->bufHandle; ++ drmInfo.gart_textures_offset= info->dri->gartTexHandle; ++ } else { ++ } ++ + if (drmCommandWrite(info->dri->drmFD, DRM_RADEON_CP_INIT, + &drmInfo, sizeof(drm_radeon_init_t)) < 0) + return FALSE; +@@ -1245,8 +1366,9 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen) + * registers back to their default values, so we need to restore + * those engine register here. + */ +- if (info->ChipFamily < CHIP_FAMILY_R600) +- RADEONEngineRestore(pScrn); ++ if (!info->drm_mm) ++ if (info->ChipFamily < CHIP_FAMILY_R600) ++ RADEONEngineRestore(pScrn); + + return TRUE; + } +@@ -1444,12 +1566,11 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn) + + /* Get DRM version & close DRM */ + info->dri->pKernelDRMVersion = drmGetVersion(fd); +- drmClose(fd); + if (info->dri->pKernelDRMVersion == NULL) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "[dri] RADEONDRIGetVersion failed to get the DRM version\n" + "[dri] Disabling DRI.\n"); +- return FALSE; ++ goto fail; + } + + /* Now check if we qualify */ +@@ -1483,10 +1604,27 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pScrn) + req_patch); + drmFreeVersion(info->dri->pKernelDRMVersion); + info->dri->pKernelDRMVersion = NULL; +- return FALSE; ++ goto fail; + } + ++ if (info->dri->pKernelDRMVersion->version_minor >= 30) { ++ struct drm_radeon_gem_info mminfo; + -+dri_bo * -+dri_bo_alloc_static(dri_bufmgr *bufmgr, const char *name, unsigned long offset, -+ unsigned long size, void *virtual, -+ uint64_t location_mask) -+{ -+ return bufmgr->bo_alloc_static(bufmgr, name, offset, size, virtual, -+ location_mask); -+} ++ if (!drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO, &mminfo, sizeof(mminfo))) ++ { ++ info->drm_mm = TRUE; ++ info->mm.vram_size = mminfo.vram_size; ++ info->mm.gart_size = mminfo.gart_size; ++ ErrorF("initing %llx %llx\n", ++ mminfo.gart_size, mminfo.vram_size); ++ } ++ } + -+void -+dri_bo_reference(dri_bo *bo) -+{ -+ bo->bufmgr->bo_reference(bo); -+} ++ drmClose(fd); + return TRUE; ++fail: ++ drmClose(fd); ++ return FALSE; + } + + Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on) +@@ -1495,6 +1633,9 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on) + xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); + int value = 0; + ++ if (info->drm_mode_setting) ++ return TRUE; + -+void -+dri_bo_unreference(dri_bo *bo) + if (!info->want_vblank_interrupts) + on = FALSE; + +@@ -1514,6 +1655,50 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on) + return TRUE; + } + ++Bool RADEONDRIDoMappings(ScreenPtr pScreen) +{ -+ if (bo == NULL) -+ return; ++ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; ++ RADEONInfoPtr info = RADEONPTR(pScrn); ++ drm_radeon_sarea_t * pSAREAPriv = DRIGetSAREAPrivate(pScreen); ++ /* DRIScreenInit doesn't add all the ++ * common mappings. Add additional ++ * mappings here. ++ */ + -+ bo->bufmgr->bo_unreference(bo); -+} ++ if (info->ChipFamily >= CHIP_FAMILY_R600) ++ return TRUE; + -+int -+dri_bo_map(dri_bo *buf, int write_enable) -+{ -+ return buf->bufmgr->bo_map(buf, write_enable); -+} ++ if (info->dri2.enabled) ++ return TRUE; + -+int -+dri_bo_unmap(dri_bo *buf) -+{ -+ return buf->bufmgr->bo_unmap(buf); -+} ++ pSAREAPriv = DRIGetSAREAPrivate(pScreen); ++ if (!RADEONDRIMapInit(info, pScreen)) { ++ RADEONDRICloseScreen(pScreen); ++ return FALSE; ++ } ++ ++ /* DRIScreenInit adds the frame buffer ++ map, but we need it as well */ ++ { ++ void *scratch_ptr; ++ int scratch_int; + -+void -+dri_fence_wait(dri_fence *fence) -+{ -+ fence->bufmgr->fence_wait(fence); -+} ++ DRIGetDeviceInfo(pScreen, &info->dri->fbHandle, ++ &scratch_int, &scratch_int, ++ &scratch_int, &scratch_int, ++ &scratch_ptr); ++ } + -+void -+dri_fence_reference(dri_fence *fence) -+{ -+ fence->bufmgr->fence_reference(fence); -+} ++ /* FIXME: When are these mappings unmapped? */ + -+void -+dri_fence_unreference(dri_fence *fence) -+{ -+ if (fence == NULL) -+ return; ++ if (!RADEONInitVisualConfigs(pScreen)) { ++ RADEONDRICloseScreen(pScreen); ++ return FALSE; ++ } ++ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] Visual configs initialized\n"); ++ return TRUE; + -+ fence->bufmgr->fence_unreference(fence); +} + + /* Initialize the screen-specific data structures for the DRI and the + * Radeon. This is the main entry point to the device-specific +@@ -1577,10 +1762,22 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) + pDRIInfo->ddxDriverMajorVersion = info->allowColorTiling ? 5 : 4; + pDRIInfo->ddxDriverMinorVersion = 3; + pDRIInfo->ddxDriverPatchVersion = 0; +- pDRIInfo->frameBufferPhysicalAddress = (void *)info->LinearAddr + info->dri->frontOffset; +- pDRIInfo->frameBufferSize = info->FbMapSize - info->FbSecureSize; +- pDRIInfo->frameBufferStride = (pScrn->displayWidth * +- info->CurrentLayout.pixel_bytes); + -+void -+dri_bo_subdata(dri_bo *bo, unsigned long offset, -+ unsigned long size, const void *data) -+{ -+ if (size == 0 || data == NULL) -+ return; ++#if DRI_DRIVER_FRAMEBUFFER_MAP ++ if (info->drm_mm) { ++ pDRIInfo->frameBufferPhysicalAddress = 0; ++ pDRIInfo->frameBufferSize = 0; ++ pDRIInfo->frameBufferStride = 0; ++ pDRIInfo->dontMapFrameBuffer = TRUE; ++ } else ++#endif ++ { ++ pDRIInfo->frameBufferPhysicalAddress = (void *)info->LinearAddr + info->dri->frontOffset; ++ pDRIInfo->frameBufferSize = info->FbMapSize - info->FbSecureSize; ++ pDRIInfo->frameBufferStride = (pScrn->displayWidth * ++ info->CurrentLayout.pixel_bytes); ++ } + -+ dri_bo_map(bo, 1); -+ memcpy((unsigned char *)bo->virtual + offset, data, size); -+ dri_bo_unmap(bo); -+} -+ -+void -+dri_bo_get_subdata(dri_bo *bo, unsigned long offset, -+ unsigned long size, void *data) -+{ -+ if (size == 0 || data == NULL) -+ return; + pDRIInfo->ddxDrawableTableEntry = RADEON_MAX_DRAWABLES; + pDRIInfo->maxDrawableTableEntry = (SAREA_MAX_DRAWABLES + < RADEON_MAX_DRAWABLES +@@ -1633,9 +1830,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) + pDRIInfo->TransitionTo3d = RADEONDRITransitionTo3d; + pDRIInfo->TransitionSingleToMulti3D = RADEONDRITransitionSingleToMulti3d; + pDRIInfo->TransitionMultiToSingle3D = RADEONDRITransitionMultiToSingle3d; +-#if defined(DAMAGE) && (DRIINFO_MAJOR_VERSION > 5 || \ +- (DRIINFO_MAJOR_VERSION == 5 && \ +- DRIINFO_MINOR_VERSION >= 1)) ++#if DRI_SUPPORT_CLIP_NOTIFY + pDRIInfo->ClipNotify = RADEONDRIClipNotify; + #endif + +@@ -1667,57 +1862,60 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen) + pDRIInfo = NULL; + return FALSE; + } +- /* Initialize AGP */ +- if (info->cardType==CARD_AGP && !RADEONDRIAgpInit(info, pScreen)) { +- xf86DrvMsg(pScreen->myNum, X_ERROR, +- "[agp] AGP failed to initialize. Disabling the DRI.\n" ); +- xf86DrvMsg(pScreen->myNum, X_INFO, +- "[agp] You may want to make sure the agpgart kernel " +- "module\nis loaded before the radeon kernel module.\n"); +- RADEONDRICloseScreen(pScreen); +- return FALSE; +- } + +- /* Initialize PCI */ +- if ((info->cardType!=CARD_AGP) && !RADEONDRIPciInit(info, pScreen)) { +- xf86DrvMsg(pScreen->myNum, X_ERROR, +- "[pci] PCI failed to initialize. Disabling the DRI.\n" ); +- RADEONDRICloseScreen(pScreen); +- return FALSE; +- } ++ /* Now, nuke dri.c's dummy frontbuffer map setup if we did that. */ ++ if (pDRIInfo->frameBufferSize != 0 && info->drm_mm) { ++ int tmp; ++ drm_handle_t fb_handle; ++ void *ptmp; + +- /* DRIScreenInit doesn't add all the +- * common mappings. Add additional +- * mappings here. +- */ +- if (!RADEONDRIMapInit(info, pScreen)) { +- RADEONDRICloseScreen(pScreen); +- return FALSE; +- } +- +- /* DRIScreenInit adds the frame buffer +- map, but we need it as well */ +- { +- void *scratch_ptr; +- int scratch_int; +- +- DRIGetDeviceInfo(pScreen, &info->dri->fbHandle, +- &scratch_int, &scratch_int, +- &scratch_int, &scratch_int, +- &scratch_ptr); +- } +- +- /* FIXME: When are these mappings unmapped? */ +- +- if (!RADEONInitVisualConfigs(pScreen)) { +- RADEONDRICloseScreen(pScreen); +- return FALSE; ++ /* With the compat method, it will continue to report ++ * the wrong map out of GetDeviceInfo, which will break AIGLX. ++ */ ++ DRIGetDeviceInfo(pScreen, &fb_handle, &tmp, &tmp, &tmp, &tmp, &ptmp); ++ drmRmMap(info->dri->drmFD, fb_handle); + -+ dri_bo_map(bo, 0); -+ memcpy(data, (unsigned char *)bo->virtual + offset, size); -+ dri_bo_unmap(bo); -+} ++ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, ++ "Removed DRI frontbuffer mapping in compatibility mode.\n"); ++ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, ++ "DRIGetDeviceInfo will report incorrect frontbuffer " ++ "handle.\n"); ++ } ++ ++ if (info->drm_mm) { ++ int ret; ++ ret = radeon_dri_gart_init(pScreen); ++ if (!ret) { ++ xf86DrvMsg(pScreen->myNum, X_ERROR, ++ "[gart] GART failed to initialize. Disabling the DRI.\n" ); ++ RADEONDRICloseScreen(pScreen); ++ return FALSE; ++ } ++ } else { ++ if (info->cardType==CARD_AGP && !RADEONDRIAgpInit(info, pScreen)) { ++ /* Initialize AGP */ ++ xf86DrvMsg(pScreen->myNum, X_ERROR, ++ "[agp] AGP failed to initialize. Disabling the DRI.\n" ); ++ xf86DrvMsg(pScreen->myNum, X_INFO, ++ "[agp] You may want to make sure the agpgart kernel " ++ "module\nis loaded before the radeon kernel module.\n"); ++ RADEONDRICloseScreen(pScreen); ++ return FALSE; ++ } ++ ++ /* Initialize PCI */ ++ if ((info->cardType!=CARD_AGP) && !RADEONDRIPciInit(info, pScreen)) { ++ xf86DrvMsg(pScreen->myNum, X_ERROR, ++ "[pci] PCI failed to initialize. Disabling the DRI.\n" ); ++ RADEONDRICloseScreen(pScreen); ++ return FALSE; ++ } + } +- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] Visual configs initialized\n"); + + return TRUE; + } + + -+void -+dri_bufmgr_destroy(dri_bufmgr *bufmgr) -+{ -+ bufmgr->destroy(bufmgr); -+} + static Bool RADEONDRIDoCloseScreen(int scrnIndex, ScreenPtr pScreen) + { + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; +@@ -1759,17 +1957,21 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen) + return FALSE; + } + +- /* Initialize the vertex buffers list */ +- if (!RADEONDRIBufInit(info, pScreen)) { +- RADEONDRICloseScreen(pScreen); +- return FALSE; ++ if (!info->drm_mm) { ++ /* Initialize the vertex buffers list */ ++ if (!RADEONDRIBufInit(info, pScreen)) { ++ RADEONDRICloseScreen(pScreen); ++ return FALSE; ++ } + } + +- /* Initialize IRQ */ +- RADEONDRIIrqInit(info, pScreen); ++ if (!info->drm_mode_setting) { ++ /* Initialize IRQ */ ++ RADEONDRIIrqInit(info, pScreen); ++ /* Initialize kernel GART memory manager */ ++ RADEONDRIGartHeapInit(info, pScreen); ++ } + +- /* Initialize kernel GART memory manager */ +- RADEONDRIGartHeapInit(info, pScreen); + + /* Initialize and start the CP if required */ + RADEONDRICPInit(pScrn); +@@ -1778,6 +1980,10 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr pScreen) + pSAREAPriv = (drm_radeon_sarea_t*)DRIGetSAREAPrivate(pScreen); + memset(pSAREAPriv, 0, sizeof(*pSAREAPriv)); + ++ if (info->drm_mm) { ++ /* init the handles into the sarea */ ++ ++ } + pRADEONDRI = (RADEONDRIPtr)info->dri->pDRIInfo->devPrivate; + + pRADEONDRI->deviceID = info->Chipset; +@@ -1935,6 +2141,8 @@ void RADEONDRICloseScreen(ScreenPtr pScreen) + drmUnmap(info->dri->buf, info->dri->bufMapSize); + info->dri->buf = NULL; + } + ++#if 0 + if (info->dri->ringReadPtr) { + drmUnmap(info->dri->ringReadPtr, info->dri->ringReadMapSize); + info->dri->ringReadPtr = NULL; +@@ -1943,6 +2151,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen) + drmUnmap(info->dri->ring, info->dri->ringMapSize); + info->dri->ring = NULL; + } ++#endif + if (info->dri->agpMemHandle != DRM_AGP_NO_HANDLE) { + drmAgpUnbind(info->dri->drmFD, info->dri->agpMemHandle); + drmAgpFree(info->dri->drmFD, info->dri->agpMemHandle); +@@ -2352,3 +2561,12 @@ int RADEONDRISetParam(ScrnInfoPtr pScrn, unsigned int param, int64_t value) + &radeonsetparam, sizeof(drm_radeon_setparam_t)); + return ret; + } + -+int dri_emit_reloc(dri_bo *reloc_buf, uint64_t flags, uint32_t delta, -+ uint32_t offset, dri_bo *target_buf) ++static Bool radeon_dri_gart_init(ScreenPtr pScreen) +{ -+ return reloc_buf->bufmgr->emit_reloc(reloc_buf, flags, delta, offset, target_buf); -+} ++ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; ++ RADEONInfoPtr info = RADEONPTR(pScrn); + -+void *dri_process_relocs(dri_bo *batch_buf, uint32_t *count) -+{ -+ return batch_buf->bufmgr->process_relocs(batch_buf, count); ++ RADEONDRIInitGARTValues(info); ++ return TRUE; +} +diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c +new file mode 100644 +index 0000000..eb15ff2 +--- /dev/null ++++ b/src/radeon_dri2.c +@@ -0,0 +1,224 @@ ++/* ++ * Copyright 2008 Kristian Høgsberg ++ * Copyright 2008 Jérôme Glisse ++ * ++ * All Rights Reserved. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation on the rights to use, copy, modify, merge, ++ * publish, distribute, sublicense, and/or sell copies of the Software, ++ * and to permit persons to whom the Software is furnished to do so, ++ * subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the ++ * next paragraph) shall be included in all copies or substantial ++ * portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR ++ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER ++ * DEALINGS IN THE SOFTWARE. ++ */ ++#ifdef HAVE_CONFIG_H ++#include "config.h" ++#endif + -+void dri_post_submit(dri_bo *batch_buf, dri_fence **last_fence) -+{ -+ batch_buf->bufmgr->post_submit(batch_buf, last_fence); -+} ++#include ++#include ++#include ++#include + -+void -+dri_bufmgr_set_debug(dri_bufmgr *bufmgr, int enable_debug) -+{ -+ bufmgr->debug = enable_debug; -+} ++#include "radeon.h" ++#include "radeon_dri2.h" ++#include "radeon_version.h" + -+int -+dri_bufmgr_check_aperture_space(struct radeon_space_check *bos, int num_bo) -+{ -+ if (num_bo == 0) -+ return BUFMGR_SPACE_OK; ++#ifdef DRI2 + -+ return bos[0].buf->bufmgr->check_aperture_space(bos, num_bo); ++struct dri2_buffer_priv { ++ PixmapPtr pixmap; ++}; ++ ++ ++static DRI2BufferPtr ++radeon_dri2_create_buffers(DrawablePtr drawable, ++ unsigned int *attachments, ++ int count) ++{ ++ ScreenPtr pScreen = drawable->pScreen; ++ DRI2BufferPtr buffers; ++ struct dri2_buffer_priv *privates; ++ PixmapPtr pixmap, depth_pixmap; ++ struct radeon_exa_pixmap_priv *driver_priv; ++ int i, r; ++ ++ buffers = xcalloc(count, sizeof *buffers); ++ if (buffers == NULL) { ++ return NULL; ++ } ++ privates = xcalloc(count, sizeof(struct dri2_buffer_priv)); ++ if (privates == NULL) { ++ xfree(buffers); ++ return NULL; ++ } ++ ++ depth_pixmap = NULL; ++ for (i = 0; i < count; i++) { ++ if (attachments[i] == DRI2BufferFrontLeft) { ++ if (drawable->type == DRAWABLE_PIXMAP) { ++ pixmap = (Pixmap*)drawable; ++ } else { ++ pixmap = (*pScreen->GetWindowPixmap)((WindowPtr)drawable); ++ } ++ pixmap->refcnt++; ++ } else if (attachments[i] == DRI2BufferStencil && depth_pixmap) { ++ pixmap = depth_pixmap; ++ pixmap->refcnt++; ++ } else { ++ pixmap = (*pScreen->CreatePixmap)(pScreen, ++ drawable->width, ++ drawable->height, ++ drawable->depth, ++ 0); ++ } ++ ++ if (attachments[i] == DRI2BufferDepth) { ++ depth_pixmap = pixmap; ++ } ++ driver_priv = exaGetPixmapDriverPrivate(pixmap); ++ r = radeon_bo_gem_name_buffer(driver_priv->bo, &buffers[i].name); ++ if (r) { ++ /* FIXME: cleanup */ ++ fprintf(stderr, "flink error: %d %s\n", r, strerror(r)); ++ xfree(buffers); ++ xfree(privates); ++ return NULL; ++ } ++ buffers[i].attachment = attachments[i]; ++ buffers[i].pitch = pixmap->devKind; ++ buffers[i].cpp = pixmap->drawable.bitsPerPixel / 8; ++ buffers[i].driverPrivate = &privates[i]; ++ buffers[i].flags = 0; /* not tiled */ ++ privates[i].pixmap = pixmap; ++ } ++ return buffers; +} + -+int dri_bo_pin(dri_bo *bo, int domain) ++static void ++radeon_dri2_destroy_buffers(DrawablePtr drawable, ++ DRI2BufferPtr buffers, ++ int count) +{ -+ return bo->bufmgr->pin(bo, domain); ++ ScreenPtr pScreen = drawable->pScreen; ++ struct dri2_buffer_priv *private; ++ int i; ++ ++ for (i = 0; i < count; i++) { ++ private = buffers[i].driverPrivate; ++ (*pScreen->DestroyPixmap)(private->pixmap); ++ } ++ if (buffers) { ++ xfree(buffers[0].driverPrivate); ++ xfree(buffers); ++ } +} + -+void dri_bo_unpin(dri_bo *bo) ++static void ++radeon_dri2_copy_region(DrawablePtr drawable, ++ RegionPtr region, ++ DRI2BufferPtr dest_buffer, ++ DRI2BufferPtr src_buffer) +{ -+ bo->bufmgr->unpin(bo); ++ struct dri2_buffer_priv *private = src_buffer->driverPrivate; ++ ScreenPtr pScreen = drawable->pScreen; ++ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; ++ PixmapPtr pixmap = private->pixmap; ++ RegionPtr copy_clip; ++ GCPtr gc; ++ ++ gc = GetScratchGC(drawable->depth, pScreen); ++ copy_clip = REGION_CREATE(pScreen, NULL, 0); ++ REGION_COPY(pScreen, copy_clip, region); ++ (*gc->funcs->ChangeClip) (gc, CT_REGION, copy_clip, 0); ++ ValidateGC(drawable, gc); ++ (*gc->ops->CopyArea)(&pixmap->drawable, drawable, gc, ++ 0, 0, drawable->width, drawable->height, 0, 0); ++ FreeScratchGC(gc); ++ RADEONCPReleaseIndirect(pScrn); +} + -+uint32_t dri_bo_get_handle(dri_bo *bo) ++Bool ++radeon_dri2_screen_init(ScreenPtr pScreen) +{ -+ return bo->bufmgr->get_handle(bo); ++ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; ++ RADEONInfoPtr info = RADEONPTR(pScrn); ++ DRI2InfoRec dri2_info; ++ int fd; ++ char *bus_id; ++ char *tmp_bus_id; ++ int cmp; ++ int i; ++ ++ if (!info->useEXA) { ++ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "DRI2 requires EXA\n"); ++ return FALSE; ++ } ++ ++ /* The whole drmOpen thing is a fiasco and we need to find a way ++ * back to just using open(2). For now, however, lets just make ++ * things worse with even more ad hoc directory walking code to ++ * discover the device file name. */ ++ bus_id = DRICreatePCIBusID(info->PciInfo); ++ for (i = 0; i < DRM_MAX_MINOR; i++) { ++ sprintf(info->dri2.device_name, DRM_DEV_NAME, DRM_DIR_NAME, i); ++ fd = open(info->dri2.device_name, O_RDWR); ++ if (fd < 0) ++ continue; ++ ++ tmp_bus_id = drmGetBusid(fd); ++ close(fd); ++ if (tmp_bus_id == NULL) ++ continue; ++ ++ cmp = strcmp(tmp_bus_id, bus_id); ++ drmFree(tmp_bus_id); ++ if (cmp == 0) ++ break; ++ } ++ xfree(bus_id); ++ ++ if (i == DRM_MAX_MINOR) { ++ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, ++ "DRI2: failed to open drm device\n"); ++ return FALSE; ++ } ++ ++ if ( (info->ChipFamily >= CHIP_FAMILY_R300) ) { ++ dri2_info.driverName = R300_DRIVER_NAME; ++ } else if ( info->ChipFamily >= CHIP_FAMILY_R200 ) { ++ dri2_info.driverName = R200_DRIVER_NAME; ++ } else { ++ dri2_info.driverName = RADEON_DRIVER_NAME; ++ } ++ dri2_info.fd = info->dri2.drm_fd; ++ dri2_info.deviceName = info->dri2.device_name; ++ dri2_info.version = 1; ++ dri2_info.CreateBuffers = radeon_dri2_create_buffers; ++ dri2_info.DestroyBuffers = radeon_dri2_destroy_buffers; ++ dri2_info.CopyRegion = radeon_dri2_copy_region; ++ info->dri2.enabled = DRI2ScreenInit(pScreen, &dri2_info); ++ return info->dri2.enabled; +} -diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_dri_bufmgr.h ---- /dev/null 2009-04-15 09:55:06.267190488 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_dri_bufmgr.h 2009-04-15 12:46:30.000000000 +1000 -@@ -0,0 +1,291 @@ -+/************************************************************************** -+ * -+ * Copyright � 2007 Intel Corporation -+ * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA ++ ++void ++radeon_dri2_close_screen(ScreenPtr pScreen) ++{ ++ DRI2CloseScreen(pScreen); ++} ++ ++#endif +diff --git a/src/radeon_dri2.h b/src/radeon_dri2.h +new file mode 100644 +index 0000000..9ad9cee +--- /dev/null ++++ b/src/radeon_dri2.h +@@ -0,0 +1,42 @@ ++/* ++ * Copyright 2008 Jerome Glisse ++ * + * All Rights Reserved. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining ++ * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including -+ * without limitation the rights to use, copy, modify, merge, publish, -+ * distribute, sub license, and/or sell copies of the Software, and to -+ * permit persons to whom the Software is furnished to do so, subject to -+ * the following conditions: -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL -+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, -+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR -+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE -+ * USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * without limitation on the rights to use, copy, modify, merge, ++ * publish, distribute, sublicense, and/or sell copies of the Software, ++ * and to permit persons to whom the Software is furnished to do so, ++ * subject to the following conditions: + * + * The above copyright notice and this permission notice (including the -+ * next paragraph) shall be included in all copies or substantial portions -+ * of the Software. -+ * -+ * -+ **************************************************************************/ -+/* -+ * Authors: Thomas Hellstr�m -+ * Keith Whitwell -+ * Eric Anholt ++ * next paragraph) shall be included in all copies or substantial ++ * portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF ++ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, VA LINUX SYSTEMS AND/OR ++ * THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, ++ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER ++ * DEALINGS IN THE SOFTWARE. + */ ++#ifndef RADEON_DRI2_H ++#define RADEON_DRI2_H + -+#ifndef _DRI_BUFMGR_H_ -+#define _DRI_BUFMGR_H_ -+#include -+ -+typedef struct _dri_bufmgr dri_bufmgr; -+typedef struct _dri_bo dri_bo; -+typedef struct _dri_fence dri_fence; -+ -+#define BUFMGR_SPACE_OK 0 -+#define BUFMGR_SPACE_OP_TO_BIG 1 -+#define BUFMGR_SPACE_FLUSH 2 -+struct radeon_space_check { -+ dri_bo *buf; -+ uint32_t read_domains; -+ uint32_t write_domain; -+ uint32_t new_accounted; ++struct radeon_dri2 { ++ int drm_fd; ++ Bool enabled; ++ char device_name[64]; +}; + -+/* reloc format */ -+/* gem handle, read_domains, write_domain, reloc_count */ -+#define RADEON_RELOC_SIZE 4 -+struct radeon_relocs_info { -+ uint32_t *buf; ++#ifdef DRI2 ++#include "dri2.h" ++Bool radeon_dri2_screen_init(ScreenPtr pScreen); ++void radeon_dri2_close_screen(ScreenPtr pScreen); ++#endif ++ ++#endif +diff --git a/src/radeon_dri_bufmgr.c b/src/radeon_dri_bufmgr.c +new file mode 100644 +index 0000000..f6154dc +--- /dev/null ++++ b/src/radeon_dri_bufmgr.c +@@ -0,0 +1,177 @@ ++/* ++ * Copyright © 2007 Intel Corporation ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the "Software"), ++ * to deal in the Software without restriction, including without limitation ++ * the rights to use, copy, modify, merge, publish, distribute, sublicense, ++ * and/or sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following conditions: ++ * ++ * The above copyright notice and this permission notice (including the next ++ * paragraph) shall be included in all copies or substantial portions of the ++ * Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL ++ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER ++ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS ++ * IN THE SOFTWARE. ++ * ++ * Authors: ++ * Eric Anholt ++ * ++ */ ++ ++#include ++#include ++#include ++#include "radeon_dri_bufmgr.h" ++ ++/** @file dri_bufmgr.c ++ * ++ * Convenience functions for buffer management methods. ++ */ ++ ++dri_bo * ++dri_bo_alloc(dri_bufmgr *bufmgr, const char *name, unsigned long size, ++ unsigned int alignment, uint64_t location_mask) ++{ ++ return bufmgr->bo_alloc(bufmgr, name, size, alignment, location_mask); ++} ++ ++dri_bo * ++dri_bo_alloc_static(dri_bufmgr *bufmgr, const char *name, unsigned long offset, ++ unsigned long size, void *virtual, ++ uint64_t location_mask) ++{ ++ return bufmgr->bo_alloc_static(bufmgr, name, offset, size, virtual, ++ location_mask); ++} ++ ++void ++dri_bo_reference(dri_bo *bo) ++{ ++ bo->bufmgr->bo_reference(bo); ++} ++ ++void ++dri_bo_unreference(dri_bo *bo) ++{ ++ if (bo == NULL) ++ return; ++ ++ bo->bufmgr->bo_unreference(bo); ++} ++ ++int ++dri_bo_map(dri_bo *buf, int write_enable) ++{ ++ return buf->bufmgr->bo_map(buf, write_enable); ++} ++ ++int ++dri_bo_unmap(dri_bo *buf) ++{ ++ return buf->bufmgr->bo_unmap(buf); ++} ++ ++void ++dri_fence_wait(dri_fence *fence) ++{ ++ fence->bufmgr->fence_wait(fence); ++} ++ ++void ++dri_fence_reference(dri_fence *fence) ++{ ++ fence->bufmgr->fence_reference(fence); ++} ++ ++void ++dri_fence_unreference(dri_fence *fence) ++{ ++ if (fence == NULL) ++ return; ++ ++ fence->bufmgr->fence_unreference(fence); ++} ++ ++void ++dri_bo_subdata(dri_bo *bo, unsigned long offset, ++ unsigned long size, const void *data) ++{ ++ if (size == 0 || data == NULL) ++ return; ++ ++ dri_bo_map(bo, 1); ++ memcpy((unsigned char *)bo->virtual + offset, data, size); ++ dri_bo_unmap(bo); ++} ++ ++void ++dri_bo_get_subdata(dri_bo *bo, unsigned long offset, ++ unsigned long size, void *data) ++{ ++ if (size == 0 || data == NULL) ++ return; ++ ++ dri_bo_map(bo, 0); ++ memcpy(data, (unsigned char *)bo->virtual + offset, size); ++ dri_bo_unmap(bo); ++} ++ ++void ++dri_bufmgr_destroy(dri_bufmgr *bufmgr) ++{ ++ bufmgr->destroy(bufmgr); ++} ++ ++ ++int dri_emit_reloc(dri_bo *reloc_buf, uint64_t flags, uint32_t delta, ++ uint32_t offset, dri_bo *target_buf) ++{ ++ return reloc_buf->bufmgr->emit_reloc(reloc_buf, flags, delta, offset, target_buf); ++} ++ ++void *dri_process_relocs(dri_bo *batch_buf, uint32_t *count) ++{ ++ return batch_buf->bufmgr->process_relocs(batch_buf, count); ++} ++ ++void dri_post_submit(dri_bo *batch_buf, dri_fence **last_fence) ++{ ++ batch_buf->bufmgr->post_submit(batch_buf, last_fence); ++} ++ ++void ++dri_bufmgr_set_debug(dri_bufmgr *bufmgr, int enable_debug) ++{ ++ bufmgr->debug = enable_debug; ++} ++ ++int ++dri_bufmgr_check_aperture_space(struct radeon_space_check *bos, int num_bo) ++{ ++ if (num_bo == 0) ++ return BUFMGR_SPACE_OK; ++ ++ return bos[0].buf->bufmgr->check_aperture_space(bos, num_bo); ++} ++ ++int dri_bo_pin(dri_bo *bo, int domain) ++{ ++ return bo->bufmgr->pin(bo, domain); ++} ++ ++void dri_bo_unpin(dri_bo *bo) ++{ ++ bo->bufmgr->unpin(bo); ++} ++ ++uint32_t dri_bo_get_handle(dri_bo *bo) ++{ ++ return bo->bufmgr->get_handle(bo); ++} +diff --git a/src/radeon_dri_bufmgr.h b/src/radeon_dri_bufmgr.h +new file mode 100644 +index 0000000..a19d7ec +--- /dev/null ++++ b/src/radeon_dri_bufmgr.h +@@ -0,0 +1,291 @@ ++/************************************************************************** ++ * ++ * Copyright � 2007 Intel Corporation ++ * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND., USA ++ * All Rights Reserved. ++ * ++ * Permission is hereby granted, free of charge, to any person obtaining a ++ * copy of this software and associated documentation files (the ++ * "Software"), to deal in the Software without restriction, including ++ * without limitation the rights to use, copy, modify, merge, publish, ++ * distribute, sub license, and/or sell copies of the Software, and to ++ * permit persons to whom the Software is furnished to do so, subject to ++ * the following conditions: ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR ++ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, ++ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL ++ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, ++ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR ++ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE ++ * USE OR OTHER DEALINGS IN THE SOFTWARE. ++ * ++ * The above copyright notice and this permission notice (including the ++ * next paragraph) shall be included in all copies or substantial portions ++ * of the Software. ++ * ++ * ++ **************************************************************************/ ++/* ++ * Authors: Thomas Hellstr�m ++ * Keith Whitwell ++ * Eric Anholt ++ */ ++ ++#ifndef _DRI_BUFMGR_H_ ++#define _DRI_BUFMGR_H_ ++#include ++ ++typedef struct _dri_bufmgr dri_bufmgr; ++typedef struct _dri_bo dri_bo; ++typedef struct _dri_fence dri_fence; ++ ++#define BUFMGR_SPACE_OK 0 ++#define BUFMGR_SPACE_OP_TO_BIG 1 ++#define BUFMGR_SPACE_FLUSH 2 ++struct radeon_space_check { ++ dri_bo *buf; ++ uint32_t read_domains; ++ uint32_t write_domain; ++ uint32_t new_accounted; ++}; ++ ++/* reloc format */ ++/* gem handle, read_domains, write_domain, reloc_count */ ++#define RADEON_RELOC_SIZE 4 ++struct radeon_relocs_info { ++ uint32_t *buf; + dri_bo **bo_list; + int size; + int max_bo; @@ -3018,724 +5088,83 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_dri_bufmgr.h +int dri_bo_map(dri_bo *buf, int write_enable); +int dri_bo_unmap(dri_bo *buf); +void dri_fence_wait(dri_fence *fence); -+void dri_fence_reference(dri_fence *fence); -+void dri_fence_unreference(dri_fence *fence); -+ -+void dri_bo_subdata(dri_bo *bo, unsigned long offset, -+ unsigned long size, const void *data); -+void dri_bo_get_subdata(dri_bo *bo, unsigned long offset, -+ unsigned long size, void *data); -+ -+void dri_bufmgr_fake_contended_lock_take(dri_bufmgr *bufmgr); -+dri_bufmgr *dri_bufmgr_fake_init(unsigned long low_offset, void *low_virtual, -+ unsigned long size, -+ unsigned int (*fence_emit)(void *private), -+ int (*fence_wait)(void *private, -+ unsigned int cookie), -+ void *driver_priv); -+void dri_bufmgr_set_debug(dri_bufmgr *bufmgr, int enable_debug); -+void dri_bo_fake_disable_backing_store(dri_bo *bo, -+ void (*invalidate_cb)(dri_bo *bo, -+ void *ptr), -+ void *ptr); -+void dri_bufmgr_destroy(dri_bufmgr *bufmgr); -+ -+int dri_emit_reloc(dri_bo *reloc_buf, uint64_t flags, uint32_t delta, -+ uint32_t offset, dri_bo *target_buf); -+void *dri_process_relocs(dri_bo *batch_buf, uint32_t *count); -+void dri_post_process_relocs(dri_bo *batch_buf); -+void dri_post_submit(dri_bo *batch_buf, dri_fence **last_fence); -+int dri_bufmgr_check_aperture_space(struct radeon_space_check *bos, int num_bo); -+ -+int dri_bo_pin(dri_bo *bo, int domain); -+void dri_bo_unpin(dri_bo *bo); -+ -+uint32_t dri_bo_get_handle(dri_bo *bo); -+ -+#ifndef TTM_API -+/* reuse some TTM API */ -+ -+#define DRM_BO_MEM_LOCAL 0 -+#define DRM_BO_MEM_TT 1 -+#define DRM_BO_MEM_VRAM 2 -+#define DRM_BO_MEM_PRIV0 3 -+#define DRM_BO_MEM_PRIV1 4 -+#define DRM_BO_MEM_PRIV2 5 -+#define DRM_BO_MEM_PRIV3 6 -+#define DRM_BO_MEM_PRIV4 7 -+ -+#define DRM_BO_FLAG_READ (1ULL << 0) -+#define DRM_BO_FLAG_WRITE (1ULL << 1) -+#define DRM_BO_FLAG_EXE (1ULL << 2) -+#define DRM_BO_MASK_ACCESS (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE) -+#define DRM_BO_FLAG_NO_EVICT (1ULL << 4) -+ -+#define DRM_BO_FLAG_MAPPABLE (1ULL << 5) -+#define DRM_BO_FLAG_SHAREABLE (1ULL << 6) -+ -+#define DRM_BO_FLAG_CACHED (1ULL << 7) -+ -+#define DRM_BO_FLAG_NO_MOVE (1ULL << 8) -+#define DRM_BO_FLAG_CACHED_MAPPED (1ULL << 19) -+#define DRM_BO_FLAG_FORCE_CACHING (1ULL << 13) -+#define DRM_BO_FLAG_FORCE_MAPPABLE (1ULL << 14) -+#define DRM_BO_FLAG_TILE (1ULL << 15) -+ -+#define DRM_BO_FLAG_MEM_LOCAL (1ULL << 24) -+#define DRM_BO_FLAG_MEM_TT (1ULL << 25) -+#define DRM_BO_FLAG_MEM_VRAM (1ULL << 26) -+ -+#define DRM_BO_MASK_MEM 0x00000000FF000000ULL -+ -+#define DRM_FENCE_TYPE_EXE 0x00000001 -+#endif -+ -+#endif -diff -up xf86-video-ati-6.12.2/src/radeon_dri.c.dave xf86-video-ati-6.12.2/src/radeon_dri.c ---- xf86-video-ati-6.12.2/src/radeon_dri.c.dave 2009-03-17 03:50:31.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_dri.c 2009-04-15 12:46:30.000000000 +1000 -@@ -40,6 +40,8 @@ - - #include - #include -+#include -+#include - - /* Driver data structures */ - #include "radeon.h" -@@ -53,6 +55,8 @@ - - #include "atipciids.h" - -+#include "radeon_drm.h" -+ - /* X and server generic header files */ - #include "xf86.h" - #include "xf86PciInfo.h" -@@ -70,16 +74,31 @@ static size_t radeon_drm_page_size; - extern void GlxSetVisualConfigs(int nconfigs, __GLXvisualConfig *configs, - void **configprivs); - -+#if defined(DAMAGE) && (DRIINFO_MAJOR_VERSION > 5 || \ -+ (DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 1)) -+#define DRI_SUPPORTS_CLIP_NOTIFY 1 -+#else -+#define DRI_SUPPORTS_CLIP_NOTIFY 0 -+#endif -+ -+#if (DRIINFO_MAJOR_VERSION > 5 || \ -+ (DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 4)) -+#define DRI_DRIVER_FRAMEBUFFER_MAP 1 -+#else -+#define DRI_DRIVER_FRAMEBUFFER_MAP 0 -+#endif -+ - static void RADEONDRITransitionTo2d(ScreenPtr pScreen); - static void RADEONDRITransitionTo3d(ScreenPtr pScreen); - static void RADEONDRITransitionMultiToSingle3d(ScreenPtr pScreen); - static void RADEONDRITransitionSingleToMulti3d(ScreenPtr pScreen); - -+static Bool radeon_dri_gart_init(ScreenPtr pScreen); -+ - #ifdef DAMAGE - static void RADEONDRIRefreshArea(ScrnInfoPtr pScrn, RegionPtr pReg); - --#if (DRIINFO_MAJOR_VERSION > 5 || \ -- (DRIINFO_MAJOR_VERSION == 5 && DRIINFO_MINOR_VERSION >= 1)) -+#if DRI_SUPPORTS_CLIP_NOTIFY - static void RADEONDRIClipNotify(ScreenPtr pScreen, WindowPtr *ppWin, int num); - #endif - #endif -@@ -352,6 +371,81 @@ static void RADEONDestroyContext(ScreenP - #endif - } - -+/* so we need to add a frontbuffer map no matter what */ -+#define ROUND_TO(x, y) (((x) + (y) - 1) / (y) * (y)) -+#define ROUND_TO_PAGE(x) ROUND_TO((x), radeon_drm_page_size) -+ -+static void -+radeon_update_screen_private(ScrnInfoPtr pScrn, drm_radeon_sarea_t * sarea) -+{ -+ RADEONInfoPtr info = RADEONPTR(pScrn); -+ RADEONDRIPtr pRADEONDRI; -+ -+ pRADEONDRI = (RADEONDRIPtr)info->dri->pDRIInfo->devPrivate; -+ info->dri->pDRIInfo->frameBufferPhysicalAddress = (char *) info->LinearAddr; -+ info->dri->pDRIInfo->frameBufferStride = pScrn->displayWidth * info->CurrentLayout.pixel_bytes; -+ info->dri->pDRIInfo->frameBufferSize = ROUND_TO_PAGE(pScrn->displayWidth * pScrn->virtualY * info->CurrentLayout.pixel_bytes); -+#if DRI_DRIVER_FRAMEBUFFER_MAP -+ info->dri->pDRIInfo->hFrameBuffer = info->fb_map_handle; -+#endif -+} -+ -+static Bool -+radeon_update_dri_mappings(ScrnInfoPtr pScrn, drm_radeon_sarea_t * sarea) -+{ -+ RADEONInfoPtr info = RADEONPTR(pScrn); -+ uint32_t fb_addr, fb_size; -+ int ret; -+ -+ if (!info->drm_mm) -+ return TRUE; -+ -+ -+ fb_addr = info->mm.front_buffer->offset + info->LinearAddr; -+ fb_size = ROUND_TO_PAGE(pScrn->displayWidth * pScrn->virtualY * info->CurrentLayout.pixel_bytes); -+ -+ if (info->fb_map_handle) { -+ drmRmMap(info->dri->drmFD, info->fb_map_handle); -+ info->fb_map_handle = 0; -+ } -+ -+ ret = drmAddMap(info->dri->drmFD, fb_addr, fb_size, DRM_FRAME_BUFFER, 0, -+ &info->fb_map_handle); -+ -+ ErrorF("adding fb map from %x for %x ret %d %x\n", fb_addr, fb_size, ret, info->fb_map_handle); -+ -+ if (ret < 0) -+ return FALSE; -+ -+ return TRUE; -+} -+ -+Bool radeon_update_dri_buffers(ScreenPtr pScreen) -+{ -+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; -+ RADEONInfoPtr info = RADEONPTR(pScrn); -+ Bool success; -+ drm_radeon_sarea_t *sarea; -+ -+ if (info->ChipFamily >= CHIP_FAMILY_R600) -+ return TRUE; -+ -+ if (!info->drm_mm) -+ return TRUE; -+ -+ if (info->dri2.enabled) -+ return TRUE; -+ -+ sarea = DRIGetSAREAPrivate(pScreen); -+ success = radeon_update_dri_mappings(pScrn, sarea); -+ -+ if (!success) -+ return FALSE; -+ -+ radeon_update_screen_private(pScrn, sarea); -+ return TRUE; -+} -+ - /* Called when the X server is woken up to allow the last client's - * context to be saved and the X server's context to be loaded. This is - * not necessary for the Radeon since the client detects when it's -@@ -701,25 +795,35 @@ static void RADEONDRIInitGARTValues(RADE - - info->dri->gartOffset = 0; - -- /* Initialize the CP ring buffer data */ -- info->dri->ringStart = info->dri->gartOffset; -- info->dri->ringMapSize = info->dri->ringSize*1024*1024 + radeon_drm_page_size; -- info->dri->ringSizeLog2QW = RADEONMinBits(info->dri->ringSize*1024*1024/8)-1; -- -- info->dri->ringReadOffset = info->dri->ringStart + info->dri->ringMapSize; -- info->dri->ringReadMapSize = radeon_drm_page_size; -- -- /* Reserve space for vertex/indirect buffers */ -- info->dri->bufStart = info->dri->ringReadOffset + info->dri->ringReadMapSize; -- info->dri->bufMapSize = info->dri->bufSize*1024*1024; -- -- /* Reserve the rest for GART textures */ -- info->dri->gartTexStart = info->dri->bufStart + info->dri->bufMapSize; -- s = (info->dri->gartSize*1024*1024 - info->dri->gartTexStart); -- l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS); -- if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY; -- info->dri->gartTexMapSize = (s >> l) << l; -- info->dri->log2GARTTexGran = l; -+ if (!info->drm_mm) { -+ /* Initialize the CP ring buffer data */ -+ info->dri->ringStart = info->dri->gartOffset; -+ info->dri->ringMapSize = info->dri->ringSize*1024*1024 + radeon_drm_page_size; -+ info->dri->ringSizeLog2QW = RADEONMinBits(info->dri->ringSize*1024*1024/8)-1; -+ -+ info->dri->ringReadOffset = info->dri->ringStart + info->dri->ringMapSize; -+ info->dri->ringReadMapSize = radeon_drm_page_size; -+ -+ /* Reserve space for vertex/indirect buffers */ -+ info->dri->bufStart = info->dri->ringReadOffset + info->dri->ringReadMapSize; -+ info->dri->bufMapSize = info->dri->bufSize*1024*1024; -+ -+ /* Reserve the rest for GART textures */ -+ info->dri->gartTexStart = info->dri->bufStart + info->dri->bufMapSize; -+ s = (info->dri->gartSize*1024*1024 - info->dri->gartTexStart); -+ l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS); -+ if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY; -+ info->dri->gartTexMapSize = (s >> l) << l; -+ info->dri->log2GARTTexGran = l; -+ } else { -+ s = (8*1024*1024); -+ l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS); -+ l = RADEONMinBits((s-1) / RADEON_NR_TEX_REGIONS); -+ if (l < RADEON_LOG_TEX_GRANULARITY) l = RADEON_LOG_TEX_GRANULARITY; -+ info->dri->gartTexMapSize = (s >> l) << l; -+ info->dri->log2GARTTexGran = l; -+ } -+ - } - - /* AGP Mode Quirk List - Certain hostbridge/gfx-card combos don't work with -@@ -992,6 +1096,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoP - "[agp] ring handle = 0x%08x\n", - (unsigned int)info->dri->ringHandle); - -+ -+#if 0 - if (drmMap(info->dri->drmFD, info->dri->ringHandle, info->dri->ringMapSize, - &info->dri->ring) < 0) { - xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map ring\n"); -@@ -1000,9 +1106,10 @@ static Bool RADEONDRIAgpInit(RADEONInfoP - xf86DrvMsg(pScreen->myNum, X_INFO, - "[agp] Ring mapped at 0x%08lx\n", - (unsigned long)info->dri->ring); -- -+#endif - if (drmAddMap(info->dri->drmFD, info->dri->ringReadOffset, info->dri->ringReadMapSize, - DRM_AGP, DRM_READ_ONLY, &info->dri->ringReadPtrHandle) < 0) { -+ - xf86DrvMsg(pScreen->myNum, X_ERROR, - "[agp] Could not add ring read ptr mapping\n"); - return FALSE; -@@ -1011,6 +1118,8 @@ static Bool RADEONDRIAgpInit(RADEONInfoP - "[agp] ring read ptr handle = 0x%08x\n", - (unsigned int)info->dri->ringReadPtrHandle); - -+ -+#if 0 - if (drmMap(info->dri->drmFD, info->dri->ringReadPtrHandle, info->dri->ringReadMapSize, - &info->dri->ringReadPtr) < 0) { - xf86DrvMsg(pScreen->myNum, X_ERROR, -@@ -1020,6 +1129,7 @@ static Bool RADEONDRIAgpInit(RADEONInfoP - xf86DrvMsg(pScreen->myNum, X_INFO, - "[agp] Ring read ptr mapped at 0x%08lx\n", - (unsigned long)info->dri->ringReadPtr); -+#endif - - if (drmAddMap(info->dri->drmFD, info->dri->bufStart, info->dri->bufMapSize, - DRM_AGP, 0, &info->dri->bufHandle) < 0) { -@@ -1097,6 +1207,7 @@ static Bool RADEONDRIPciInit(RADEONInfoP - "[pci] ring handle = 0x%08x\n", - (unsigned int)info->dri->ringHandle); - -+#if 0 - if (drmMap(info->dri->drmFD, info->dri->ringHandle, info->dri->ringMapSize, - &info->dri->ring) < 0) { - xf86DrvMsg(pScreen->myNum, X_ERROR, "[pci] Could not map ring\n"); -@@ -1108,6 +1219,7 @@ static Bool RADEONDRIPciInit(RADEONInfoP - xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] Ring contents 0x%08lx\n", - *(unsigned long *)(pointer)info->dri->ring); -+#endif - - if (drmAddMap(info->dri->drmFD, info->dri->ringReadOffset, info->dri->ringReadMapSize, - DRM_SCATTER_GATHER, flags, &info->dri->ringReadPtrHandle) < 0) { -@@ -1119,8 +1231,10 @@ static Bool RADEONDRIPciInit(RADEONInfoP - "[pci] ring read ptr handle = 0x%08x\n", - (unsigned int)info->dri->ringReadPtrHandle); - -+#if 0 - if (drmMap(info->dri->drmFD, info->dri->ringReadPtrHandle, info->dri->ringReadMapSize, - &info->dri->ringReadPtr) < 0) { -+ - xf86DrvMsg(pScreen->myNum, X_ERROR, - "[pci] Could not map ring read ptr\n"); - return FALSE; -@@ -1131,6 +1245,7 @@ static Bool RADEONDRIPciInit(RADEONInfoP - xf86DrvMsg(pScreen->myNum, X_INFO, - "[pci] Ring read ptr contents 0x%08lx\n", - *(unsigned long *)(pointer)info->dri->ringReadPtr); -+#endif - - if (drmAddMap(info->dri->drmFD, info->dri->bufStart, info->dri->bufMapSize, - DRM_SCATTER_GATHER, 0, &info->dri->bufHandle) < 0) { -@@ -1183,6 +1298,9 @@ static Bool RADEONDRIPciInit(RADEONInfoP - */ - static Bool RADEONDRIMapInit(RADEONInfoPtr info, ScreenPtr pScreen) - { -+ -+ if (info->drm_mm) -+ return TRUE; - /* Map registers */ - info->dri->registerSize = info->MMIOSize; - if (drmAddMap(info->dri->drmFD, info->MMIOAddr, info->dri->registerSize, -@@ -1223,20 +1341,23 @@ static int RADEONDRIKernelInit(RADEONInf - drmInfo.fb_bpp = info->CurrentLayout.pixel_code; - drmInfo.depth_bpp = (info->dri->depthBits - 8) * 2; - -- drmInfo.front_offset = info->dri->frontOffset; -- drmInfo.front_pitch = info->dri->frontPitch * cpp; -- drmInfo.back_offset = info->dri->backOffset; -- drmInfo.back_pitch = info->dri->backPitch * cpp; -- drmInfo.depth_offset = info->dri->depthOffset; -- drmInfo.depth_pitch = info->dri->depthPitch * drmInfo.depth_bpp / 8; -- -- drmInfo.fb_offset = info->dri->fbHandle; -- drmInfo.mmio_offset = info->dri->registerHandle; -- drmInfo.ring_offset = info->dri->ringHandle; -- drmInfo.ring_rptr_offset = info->dri->ringReadPtrHandle; -- drmInfo.buffers_offset = info->dri->bufHandle; -- drmInfo.gart_textures_offset= info->dri->gartTexHandle; -- -+ if (!info->drm_mm) { -+ drmInfo.front_offset = info->dri->frontOffset; -+ drmInfo.front_pitch = info->dri->frontPitch * cpp; -+ drmInfo.back_offset = info->dri->backOffset; -+ drmInfo.back_pitch = info->dri->backPitch * cpp; -+ drmInfo.depth_offset = info->dri->depthOffset; -+ drmInfo.depth_pitch = info->dri->depthPitch * drmInfo.depth_bpp / 8; -+ -+ drmInfo.fb_offset = info->dri->fbHandle; -+ drmInfo.mmio_offset = info->dri->registerHandle; -+ drmInfo.ring_offset = info->dri->ringHandle; -+ drmInfo.ring_rptr_offset = info->dri->ringReadPtrHandle; -+ drmInfo.buffers_offset = info->dri->bufHandle; -+ drmInfo.gart_textures_offset= info->dri->gartTexHandle; -+ } else { -+ } -+ - if (drmCommandWrite(info->dri->drmFD, DRM_RADEON_CP_INIT, - &drmInfo, sizeof(drm_radeon_init_t)) < 0) - return FALSE; -@@ -1245,8 +1366,9 @@ static int RADEONDRIKernelInit(RADEONInf - * registers back to their default values, so we need to restore - * those engine register here. - */ -- if (info->ChipFamily < CHIP_FAMILY_R600) -- RADEONEngineRestore(pScrn); -+ if (!info->drm_mm) -+ if (info->ChipFamily < CHIP_FAMILY_R600) -+ RADEONEngineRestore(pScrn); - - return TRUE; - } -@@ -1444,12 +1566,11 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pSc - - /* Get DRM version & close DRM */ - info->dri->pKernelDRMVersion = drmGetVersion(fd); -- drmClose(fd); - if (info->dri->pKernelDRMVersion == NULL) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "[dri] RADEONDRIGetVersion failed to get the DRM version\n" - "[dri] Disabling DRI.\n"); -- return FALSE; -+ goto fail; - } - - /* Now check if we qualify */ -@@ -1483,10 +1604,27 @@ Bool RADEONDRIGetVersion(ScrnInfoPtr pSc - req_patch); - drmFreeVersion(info->dri->pKernelDRMVersion); - info->dri->pKernelDRMVersion = NULL; -- return FALSE; -+ goto fail; -+ } ++void dri_fence_reference(dri_fence *fence); ++void dri_fence_unreference(dri_fence *fence); + -+ if (info->dri->pKernelDRMVersion->version_minor >= 30) { -+ struct drm_radeon_gem_info mminfo; ++void dri_bo_subdata(dri_bo *bo, unsigned long offset, ++ unsigned long size, const void *data); ++void dri_bo_get_subdata(dri_bo *bo, unsigned long offset, ++ unsigned long size, void *data); + -+ if (!drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO, &mminfo, sizeof(mminfo))) -+ { -+ info->drm_mm = TRUE; -+ info->mm.vram_size = mminfo.vram_size; -+ info->mm.gart_size = mminfo.gart_size; -+ ErrorF("initing %llx %llx\n", -+ mminfo.gart_size, mminfo.vram_size); -+ } - } - -+ drmClose(fd); - return TRUE; -+fail: -+ drmClose(fd); -+ return FALSE; - } - - Bool RADEONDRISetVBlankInterrupt(ScrnInfoPtr pScrn, Bool on) -@@ -1495,6 +1633,9 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInf - xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn); - int value = 0; - -+ if (info->drm_mode_setting) -+ return TRUE; ++void dri_bufmgr_fake_contended_lock_take(dri_bufmgr *bufmgr); ++dri_bufmgr *dri_bufmgr_fake_init(unsigned long low_offset, void *low_virtual, ++ unsigned long size, ++ unsigned int (*fence_emit)(void *private), ++ int (*fence_wait)(void *private, ++ unsigned int cookie), ++ void *driver_priv); ++void dri_bufmgr_set_debug(dri_bufmgr *bufmgr, int enable_debug); ++void dri_bo_fake_disable_backing_store(dri_bo *bo, ++ void (*invalidate_cb)(dri_bo *bo, ++ void *ptr), ++ void *ptr); ++void dri_bufmgr_destroy(dri_bufmgr *bufmgr); + - if (!info->want_vblank_interrupts) - on = FALSE; - -@@ -1514,6 +1655,50 @@ Bool RADEONDRISetVBlankInterrupt(ScrnInf - return TRUE; - } - -+Bool RADEONDRIDoMappings(ScreenPtr pScreen) -+{ -+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; -+ RADEONInfoPtr info = RADEONPTR(pScrn); -+ drm_radeon_sarea_t * pSAREAPriv = DRIGetSAREAPrivate(pScreen); -+ /* DRIScreenInit doesn't add all the -+ * common mappings. Add additional -+ * mappings here. -+ */ ++int dri_emit_reloc(dri_bo *reloc_buf, uint64_t flags, uint32_t delta, ++ uint32_t offset, dri_bo *target_buf); ++void *dri_process_relocs(dri_bo *batch_buf, uint32_t *count); ++void dri_post_process_relocs(dri_bo *batch_buf); ++void dri_post_submit(dri_bo *batch_buf, dri_fence **last_fence); ++int dri_bufmgr_check_aperture_space(struct radeon_space_check *bos, int num_bo); + -+ if (info->ChipFamily >= CHIP_FAMILY_R600) -+ return TRUE; ++int dri_bo_pin(dri_bo *bo, int domain); ++void dri_bo_unpin(dri_bo *bo); + -+ if (info->dri2.enabled) -+ return TRUE; ++uint32_t dri_bo_get_handle(dri_bo *bo); + -+ pSAREAPriv = DRIGetSAREAPrivate(pScreen); -+ if (!RADEONDRIMapInit(info, pScreen)) { -+ RADEONDRICloseScreen(pScreen); -+ return FALSE; -+ } -+ -+ /* DRIScreenInit adds the frame buffer -+ map, but we need it as well */ -+ { -+ void *scratch_ptr; -+ int scratch_int; ++#ifndef TTM_API ++/* reuse some TTM API */ + -+ DRIGetDeviceInfo(pScreen, &info->dri->fbHandle, -+ &scratch_int, &scratch_int, -+ &scratch_int, &scratch_int, -+ &scratch_ptr); -+ } ++#define DRM_BO_MEM_LOCAL 0 ++#define DRM_BO_MEM_TT 1 ++#define DRM_BO_MEM_VRAM 2 ++#define DRM_BO_MEM_PRIV0 3 ++#define DRM_BO_MEM_PRIV1 4 ++#define DRM_BO_MEM_PRIV2 5 ++#define DRM_BO_MEM_PRIV3 6 ++#define DRM_BO_MEM_PRIV4 7 + -+ /* FIXME: When are these mappings unmapped? */ ++#define DRM_BO_FLAG_READ (1ULL << 0) ++#define DRM_BO_FLAG_WRITE (1ULL << 1) ++#define DRM_BO_FLAG_EXE (1ULL << 2) ++#define DRM_BO_MASK_ACCESS (DRM_BO_FLAG_READ | DRM_BO_FLAG_WRITE | DRM_BO_FLAG_EXE) ++#define DRM_BO_FLAG_NO_EVICT (1ULL << 4) + -+ if (!RADEONInitVisualConfigs(pScreen)) { -+ RADEONDRICloseScreen(pScreen); -+ return FALSE; -+ } -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] Visual configs initialized\n"); -+ return TRUE; ++#define DRM_BO_FLAG_MAPPABLE (1ULL << 5) ++#define DRM_BO_FLAG_SHAREABLE (1ULL << 6) + -+} - - /* Initialize the screen-specific data structures for the DRI and the - * Radeon. This is the main entry point to the device-specific -@@ -1577,10 +1762,22 @@ Bool RADEONDRIScreenInit(ScreenPtr pScre - pDRIInfo->ddxDriverMajorVersion = info->allowColorTiling ? 5 : 4; - pDRIInfo->ddxDriverMinorVersion = 3; - pDRIInfo->ddxDriverPatchVersion = 0; -- pDRIInfo->frameBufferPhysicalAddress = (void *)info->LinearAddr + info->dri->frontOffset; -- pDRIInfo->frameBufferSize = info->FbMapSize - info->FbSecureSize; -- pDRIInfo->frameBufferStride = (pScrn->displayWidth * -- info->CurrentLayout.pixel_bytes); ++#define DRM_BO_FLAG_CACHED (1ULL << 7) + -+#if DRI_DRIVER_FRAMEBUFFER_MAP -+ if (info->drm_mm) { -+ pDRIInfo->frameBufferPhysicalAddress = 0; -+ pDRIInfo->frameBufferSize = 0; -+ pDRIInfo->frameBufferStride = 0; -+ pDRIInfo->dontMapFrameBuffer = TRUE; -+ } else -+#endif -+ { -+ pDRIInfo->frameBufferPhysicalAddress = (void *)info->LinearAddr + info->dri->frontOffset; -+ pDRIInfo->frameBufferSize = info->FbMapSize - info->FbSecureSize; -+ pDRIInfo->frameBufferStride = (pScrn->displayWidth * -+ info->CurrentLayout.pixel_bytes); -+ } ++#define DRM_BO_FLAG_NO_MOVE (1ULL << 8) ++#define DRM_BO_FLAG_CACHED_MAPPED (1ULL << 19) ++#define DRM_BO_FLAG_FORCE_CACHING (1ULL << 13) ++#define DRM_BO_FLAG_FORCE_MAPPABLE (1ULL << 14) ++#define DRM_BO_FLAG_TILE (1ULL << 15) + - pDRIInfo->ddxDrawableTableEntry = RADEON_MAX_DRAWABLES; - pDRIInfo->maxDrawableTableEntry = (SAREA_MAX_DRAWABLES - < RADEON_MAX_DRAWABLES -@@ -1633,9 +1830,7 @@ Bool RADEONDRIScreenInit(ScreenPtr pScre - pDRIInfo->TransitionTo3d = RADEONDRITransitionTo3d; - pDRIInfo->TransitionSingleToMulti3D = RADEONDRITransitionSingleToMulti3d; - pDRIInfo->TransitionMultiToSingle3D = RADEONDRITransitionMultiToSingle3d; --#if defined(DAMAGE) && (DRIINFO_MAJOR_VERSION > 5 || \ -- (DRIINFO_MAJOR_VERSION == 5 && \ -- DRIINFO_MINOR_VERSION >= 1)) -+#if DRI_SUPPORT_CLIP_NOTIFY - pDRIInfo->ClipNotify = RADEONDRIClipNotify; - #endif - -@@ -1667,57 +1862,60 @@ Bool RADEONDRIScreenInit(ScreenPtr pScre - pDRIInfo = NULL; - return FALSE; - } -- /* Initialize AGP */ -- if (info->cardType==CARD_AGP && !RADEONDRIAgpInit(info, pScreen)) { -- xf86DrvMsg(pScreen->myNum, X_ERROR, -- "[agp] AGP failed to initialize. Disabling the DRI.\n" ); -- xf86DrvMsg(pScreen->myNum, X_INFO, -- "[agp] You may want to make sure the agpgart kernel " -- "module\nis loaded before the radeon kernel module.\n"); -- RADEONDRICloseScreen(pScreen); -- return FALSE; -- } -- -- /* Initialize PCI */ -- if ((info->cardType!=CARD_AGP) && !RADEONDRIPciInit(info, pScreen)) { -- xf86DrvMsg(pScreen->myNum, X_ERROR, -- "[pci] PCI failed to initialize. Disabling the DRI.\n" ); -- RADEONDRICloseScreen(pScreen); -- return FALSE; -- } -- -- /* DRIScreenInit doesn't add all the -- * common mappings. Add additional -- * mappings here. -- */ -- if (!RADEONDRIMapInit(info, pScreen)) { -- RADEONDRICloseScreen(pScreen); -- return FALSE; -- } - -- /* DRIScreenInit adds the frame buffer -- map, but we need it as well */ -- { -- void *scratch_ptr; -- int scratch_int; -+ /* Now, nuke dri.c's dummy frontbuffer map setup if we did that. */ -+ if (pDRIInfo->frameBufferSize != 0 && info->drm_mm) { -+ int tmp; -+ drm_handle_t fb_handle; -+ void *ptmp; - -- DRIGetDeviceInfo(pScreen, &info->dri->fbHandle, -- &scratch_int, &scratch_int, -- &scratch_int, &scratch_int, -- &scratch_ptr); -- } -- -- /* FIXME: When are these mappings unmapped? */ -+ /* With the compat method, it will continue to report -+ * the wrong map out of GetDeviceInfo, which will break AIGLX. -+ */ -+ DRIGetDeviceInfo(pScreen, &fb_handle, &tmp, &tmp, &tmp, &tmp, &ptmp); -+ drmRmMap(info->dri->drmFD, fb_handle); - -- if (!RADEONInitVisualConfigs(pScreen)) { -- RADEONDRICloseScreen(pScreen); -- return FALSE; -+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -+ "Removed DRI frontbuffer mapping in compatibility mode.\n"); -+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -+ "DRIGetDeviceInfo will report incorrect frontbuffer " -+ "handle.\n"); -+ } -+ -+ if (info->drm_mm) { -+ int ret; -+ ret = radeon_dri_gart_init(pScreen); -+ if (!ret) { -+ xf86DrvMsg(pScreen->myNum, X_ERROR, -+ "[gart] GART failed to initialize. Disabling the DRI.\n" ); -+ RADEONDRICloseScreen(pScreen); -+ return FALSE; -+ } -+ } else { -+ if (info->cardType==CARD_AGP && !RADEONDRIAgpInit(info, pScreen)) { -+ /* Initialize AGP */ -+ xf86DrvMsg(pScreen->myNum, X_ERROR, -+ "[agp] AGP failed to initialize. Disabling the DRI.\n" ); -+ xf86DrvMsg(pScreen->myNum, X_INFO, -+ "[agp] You may want to make sure the agpgart kernel " -+ "module\nis loaded before the radeon kernel module.\n"); -+ RADEONDRICloseScreen(pScreen); -+ return FALSE; -+ } -+ -+ /* Initialize PCI */ -+ if ((info->cardType!=CARD_AGP) && !RADEONDRIPciInit(info, pScreen)) { -+ xf86DrvMsg(pScreen->myNum, X_ERROR, -+ "[pci] PCI failed to initialize. Disabling the DRI.\n" ); -+ RADEONDRICloseScreen(pScreen); -+ return FALSE; -+ } - } -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[dri] Visual configs initialized\n"); - - return TRUE; - } - ++#define DRM_BO_FLAG_MEM_LOCAL (1ULL << 24) ++#define DRM_BO_FLAG_MEM_TT (1ULL << 25) ++#define DRM_BO_FLAG_MEM_VRAM (1ULL << 26) + - static Bool RADEONDRIDoCloseScreen(int scrnIndex, ScreenPtr pScreen) - { - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; -@@ -1759,17 +1957,21 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr - return FALSE; - } - -- /* Initialize the vertex buffers list */ -- if (!RADEONDRIBufInit(info, pScreen)) { -- RADEONDRICloseScreen(pScreen); -- return FALSE; -+ if (!info->drm_mm) { -+ /* Initialize the vertex buffers list */ -+ if (!RADEONDRIBufInit(info, pScreen)) { -+ RADEONDRICloseScreen(pScreen); -+ return FALSE; -+ } - } - -- /* Initialize IRQ */ -- RADEONDRIIrqInit(info, pScreen); -+ if (!info->drm_mode_setting) { -+ /* Initialize IRQ */ -+ RADEONDRIIrqInit(info, pScreen); -+ /* Initialize kernel GART memory manager */ -+ RADEONDRIGartHeapInit(info, pScreen); -+ } - -- /* Initialize kernel GART memory manager */ -- RADEONDRIGartHeapInit(info, pScreen); - - /* Initialize and start the CP if required */ - RADEONDRICPInit(pScrn); -@@ -1778,6 +1980,10 @@ Bool RADEONDRIFinishScreenInit(ScreenPtr - pSAREAPriv = (drm_radeon_sarea_t*)DRIGetSAREAPrivate(pScreen); - memset(pSAREAPriv, 0, sizeof(*pSAREAPriv)); - -+ if (info->drm_mm) { -+ /* init the handles into the sarea */ -+ -+ } - pRADEONDRI = (RADEONDRIPtr)info->dri->pDRIInfo->devPrivate; - - pRADEONDRI->deviceID = info->Chipset; -@@ -1935,6 +2141,8 @@ void RADEONDRICloseScreen(ScreenPtr pScr - drmUnmap(info->dri->buf, info->dri->bufMapSize); - info->dri->buf = NULL; - } ++#define DRM_BO_MASK_MEM 0x00000000FF000000ULL + -+#if 0 - if (info->dri->ringReadPtr) { - drmUnmap(info->dri->ringReadPtr, info->dri->ringReadMapSize); - info->dri->ringReadPtr = NULL; -@@ -1943,6 +2151,7 @@ void RADEONDRICloseScreen(ScreenPtr pScr - drmUnmap(info->dri->ring, info->dri->ringMapSize); - info->dri->ring = NULL; - } ++#define DRM_FENCE_TYPE_EXE 0x00000001 +#endif - if (info->dri->agpMemHandle != DRM_AGP_NO_HANDLE) { - drmAgpUnbind(info->dri->drmFD, info->dri->agpMemHandle); - drmAgpFree(info->dri->drmFD, info->dri->agpMemHandle); -@@ -2352,3 +2561,12 @@ int RADEONDRISetParam(ScrnInfoPtr pScrn, - &radeonsetparam, sizeof(drm_radeon_setparam_t)); - return ret; - } -+ -+static Bool radeon_dri_gart_init(ScreenPtr pScreen) -+{ -+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; -+ RADEONInfoPtr info = RADEONPTR(pScrn); + -+ RADEONDRIInitGARTValues(info); -+ return TRUE; -+} -diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/src/radeon_driver.c ---- xf86-video-ati-6.12.2/src/radeon_driver.c.dave 2009-04-07 00:50:11.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_driver.c 2009-04-15 12:46:30.000000000 +1000 ++#endif +diff --git a/src/radeon_driver.c b/src/radeon_driver.c +index 8673f5e..388ab5f 100644 +--- a/src/radeon_driver.c ++++ b/src/radeon_driver.c @@ -67,7 +67,7 @@ #include @@ -3745,7 +5174,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr /* Driver data structures */ #include "radeon.h" #include "radeon_reg.h" -@@ -229,7 +229,10 @@ radeonShadowWindow(ScreenPtr screen, CAR +@@ -229,7 +229,10 @@ radeonShadowWindow(ScreenPtr screen, CARD32 row, CARD32 offset, int mode, stride = (pScrn->displayWidth * pScrn->bitsPerPixel) / 8; *size = stride; @@ -3757,7 +5186,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr } static Bool RADEONCreateScreenResources (ScreenPtr pScreen) -@@ -250,6 +253,13 @@ RADEONCreateScreenResources (ScreenPtr p +@@ -250,6 +253,13 @@ RADEONCreateScreenResources (ScreenPtr pScreen) radeonShadowWindow, 0, NULL)) return FALSE; } @@ -3771,7 +5200,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr return TRUE; } -@@ -1695,6 +1705,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPt +@@ -1695,6 +1705,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) } pScrn->videoRam &= ~1023; @@ -3779,7 +5208,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr info->FbMapSize = pScrn->videoRam * 1024; /* if the card is PCI Express reserve the last 32k for the gart table */ -@@ -1824,59 +1835,61 @@ static Bool RADEONPreInitChipType(ScrnIn +@@ -1824,59 +1835,61 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) "R500 support is under development. Please report any issues to xorg-driver-ati@lists.x.org\n"); } @@ -3886,7 +5315,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr #ifdef XF86DRI /* AGP/PCI */ -@@ -2051,6 +2064,15 @@ static Bool RADEONPreInitAccel(ScrnInfoP +@@ -2051,6 +2064,15 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) } info->accel_state->fifo_slots = 0; @@ -3902,7 +5331,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr if ((info->ChipFamily == CHIP_FAMILY_RS100) || (info->ChipFamily == CHIP_FAMILY_RS200) || (info->ChipFamily == CHIP_FAMILY_RS300) || -@@ -2075,6 +2097,9 @@ static Bool RADEONPreInitAccel(ScrnInfoP +@@ -2075,6 +2097,9 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) { int errmaj = 0, errmin = 0; @@ -3912,7 +5341,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr from = X_DEFAULT; #if defined(USE_EXA) #if defined(USE_XAA) -@@ -2085,12 +2110,17 @@ static Bool RADEONPreInitAccel(ScrnInfoP +@@ -2085,12 +2110,17 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) info->useEXA = TRUE; } else if (xf86NameCmp(optstr, "XAA") == 0) { from = X_CONFIG; @@ -3930,7 +5359,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr if (info->ChipFamily < CHIP_FAMILY_R600) xf86DrvMsg(pScrn->scrnIndex, from, "Using %s acceleration architecture\n", -@@ -2189,15 +2219,9 @@ static Bool RADEONPreInitInt10(ScrnInfoP +@@ -2189,15 +2219,9 @@ static Bool RADEONPreInitInt10(ScrnInfoPtr pScrn, xf86Int10InfoPtr *ppInt10) return TRUE; } @@ -3947,7 +5376,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr if (!(info->dri = xcalloc(1, sizeof(struct radeon_dri)))) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Unable to allocate dri rec!\n"); -@@ -2208,6 +2232,22 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr +@@ -2208,6 +2232,22 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Unable to allocate cp rec!\n"); return FALSE; } @@ -3970,7 +5399,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr info->cp->CPInUse = FALSE; info->cp->CPStarted = FALSE; info->cp->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT; -@@ -2771,6 +2811,37 @@ static const xf86CrtcConfigFuncsRec RADE +@@ -2771,6 +2811,37 @@ static const xf86CrtcConfigFuncsRec RADEONCRTCResizeFuncs = { RADEONCRTCResize }; @@ -4008,7 +5437,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) { xf86CrtcConfigPtr xf86_config; -@@ -2791,6 +2862,8 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, in +@@ -2791,6 +2862,8 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) info = RADEONPTR(pScrn); info->MMIO = NULL; @@ -4017,7 +5446,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr info->IsSecondary = FALSE; info->IsPrimary = FALSE; -@@ -2825,62 +2898,63 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, in +@@ -2825,62 +2898,63 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) } info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index); @@ -4128,7 +5557,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr if (xf86RegisterResources(info->pEnt->index, 0, ResExclusive)) goto fail; -@@ -2890,10 +2964,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, in +@@ -2890,10 +2964,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) pScrn->racMemFlags = RAC_FB | RAC_COLORMAP | RAC_VIEWPORT | RAC_CURSOR; pScrn->monitor = pScrn->confScreen->monitor; @@ -4145,7 +5574,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr if (!RADEONPreInitVisual(pScrn)) goto fail; -@@ -2907,167 +2983,225 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, in +@@ -2907,167 +2983,232 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) memcpy(info->Options, RADEONOptions, sizeof(RADEONOptions)); xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, info->Options); @@ -4222,10 +5651,11 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr - goto fail; - - RADEONPostInt10Check(pScrn, int10_save); -+ goto fail; - +- - if (!RADEONPreInitBIOS(pScrn, pInt10)) - goto fail; ++ goto fail; ++ + if (!info->drm_mode_setting) { + info->DispPriority = 1; + if ((s = xf86GetOptValString(info->Options, OPTION_DISP_PRIORITY))) { @@ -4273,46 +5703,11 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr "using shadow framebuffer\n"); - if (!xf86LoadSubModule(pScrn, "shadow")) - info->r600_shadow_fb = FALSE; -- } -- } -- -- if (!RADEONPreInitVRAM(pScrn)) -- goto fail; -- -- RADEONPreInitColorTiling(pScrn); -- -- /* we really need an FB manager... */ -- if (pScrn->display->virtualX) { -- crtc_max_X = pScrn->display->virtualX; -- crtc_max_Y = pScrn->display->virtualY; -- if (info->allowColorTiling) { -- if (crtc_max_X > info->MaxSurfaceWidth || -- crtc_max_Y > info->MaxLines) { -- info->allowColorTiling = FALSE; -- xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -- "Requested desktop size exceeds surface limts for tiling, ColorTiling disabled\n"); + if (!xf86LoadSubModule(pScrn, "shadow")) + info->r600_shadow_fb = FALSE; - } ++ } } -- if (crtc_max_X > 8192) -- crtc_max_X = 8192; -- if (crtc_max_Y > 8192) -- crtc_max_Y = 8192; -- } else { -- /* -- * note that these aren't really the CRTC limits, they're just -- * heuristics until we have a better memory manager. -- */ -- if (pScrn->videoRam <= 16384) { -- crtc_max_X = 1600; -- crtc_max_Y = 1200; -- } else if (IS_R300_VARIANT) { -- crtc_max_X = 2560; -- crtc_max_Y = 1200; -- } else if (IS_AVIVO_VARIANT) { -- crtc_max_X = 2560; -- crtc_max_Y = 1600; +- } + + if (!RADEONPreInitVRAM(pScrn)) + goto fail; @@ -4335,9 +5730,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr + crtc_max_X = 8192; + if (crtc_max_Y > 8192) + crtc_max_Y = 8192; - } else { -- crtc_max_X = 2048; -- crtc_max_Y = 1200; ++ } else { + /* + * note that these aren't really the CRTC limits, they're just + * heuristics until we have a better memory manager. @@ -4354,16 +5747,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr + } else { + crtc_max_X = 2048; + crtc_max_Y = 1200; - } -- } -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Max desktop size set to %dx%d\n", -- crtc_max_X, crtc_max_Y); -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, -- "For a larger or smaller max desktop size, add a Virtual line to your xorg.conf\n"); -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, -- "If you are having trouble with 3D, " -- "reduce the desktop size by adjusting the Virtual line to your xorg.conf\n"); -- ++ } + } + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Max desktop size set to %dx%d\n", + crtc_max_X, crtc_max_Y); @@ -4373,45 +5757,84 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr + "If you are having trouble with 3D, " + "reduce the desktop size by adjusting the Virtual line to your xorg.conf\n"); + - /*xf86CrtcSetSizeRange (pScrn, 320, 200, info->MaxSurfaceWidth, info->MaxLines);*/ -- xf86CrtcSetSizeRange (pScrn, 320, 200, crtc_max_X, crtc_max_Y); ++ /*xf86CrtcSetSizeRange (pScrn, 320, 200, info->MaxSurfaceWidth, info->MaxLines);*/ + xf86CrtcSetSizeRange (pScrn, 320, 200, crtc_max_X, crtc_max_Y); + + RADEONPreInitDDC(pScrn); -- RADEONPreInitDDC(pScrn); +- if (!RADEONPreInitVRAM(pScrn)) +- goto fail; + if (!RADEONPreInitControllers(pScrn)) + goto fail; -- if (!RADEONPreInitControllers(pScrn)) -- goto fail; +- RADEONPreInitColorTiling(pScrn); +- /* we really need an FB manager... */ +- if (pScrn->display->virtualX) { +- crtc_max_X = pScrn->display->virtualX; +- crtc_max_Y = pScrn->display->virtualY; +- if (info->allowColorTiling) { +- if (crtc_max_X > info->MaxSurfaceWidth || +- crtc_max_Y > info->MaxLines) { +- info->allowColorTiling = FALSE; +- xf86DrvMsg(pScrn->scrnIndex, X_WARNING, +- "Requested desktop size exceeds surface limts for tiling, ColorTiling disabled\n"); +- } + ErrorF("before xf86InitialConfiguration\n"); + + if (!xf86InitialConfiguration (pScrn, FALSE)) + { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes.\n"); + goto fail; -+ } + } +- if (crtc_max_X > 8192) +- crtc_max_X = 8192; +- if (crtc_max_Y > 8192) +- crtc_max_Y = 8192; +- } else { +- /* +- * note that these aren't really the CRTC limits, they're just +- * heuristics until we have a better memory manager. + + /* fix up cloning on rn50 cards + * since they only have one crtc sometimes the xserver doesn't assign + * a crtc to one of the outputs even though both outputs have common modes + * which results in only one monitor being enabled. Assign a crtc here so + * that both outputs light up. -+ */ + */ +- if (pScrn->videoRam <= 16384) { +- crtc_max_X = 1600; +- crtc_max_Y = 1200; +- } else if (IS_R300_VARIANT) { +- crtc_max_X = 2560; +- crtc_max_Y = 1200; +- } else if (IS_AVIVO_VARIANT) { +- crtc_max_X = 2560; +- crtc_max_Y = 1600; +- } else { +- crtc_max_X = 2048; +- crtc_max_Y = 1200; +- } +- } +- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Max desktop size set to %dx%d\n", +- crtc_max_X, crtc_max_Y); +- xf86DrvMsg(pScrn->scrnIndex, X_INFO, +- "For a larger or smaller max desktop size, add a Virtual line to your xorg.conf\n"); +- xf86DrvMsg(pScrn->scrnIndex, X_INFO, +- "If you are having trouble with 3D, " +- "reduce the desktop size by adjusting the Virtual line to your xorg.conf\n"); + if (info->ChipFamily == CHIP_FAMILY_RV100 && !pRADEONEnt->HasCRTC2) { + int i; -- ErrorF("before xf86InitialConfiguration\n"); +- /*xf86CrtcSetSizeRange (pScrn, 320, 200, info->MaxSurfaceWidth, info->MaxLines);*/ +- xf86CrtcSetSizeRange (pScrn, 320, 200, crtc_max_X, crtc_max_Y); + for (i = 0; i < xf86_config->num_output; i++) { + xf86OutputPtr output = xf86_config->output[i]; -- if (!xf86InitialConfiguration (pScrn, FALSE)) -- { -- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes.\n"); -- goto fail; -- } +- RADEONPreInitDDC(pScrn); +- +- if (!RADEONPreInitControllers(pScrn)) +- goto fail; + /* XXX: double check crtc mode */ + if ((output->probed_modes != NULL) && (output->crtc == NULL)) + output->crtc = xf86_config->crtc[0]; @@ -4419,29 +5842,40 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr + } + ErrorF("after xf86InitialConfiguration\n"); -- /* fix up cloning on rn50 cards -- * since they only have one crtc sometimes the xserver doesn't assign -- * a crtc to one of the outputs even though both outputs have common modes -- * which results in only one monitor being enabled. Assign a crtc here so -- * that both outputs light up. -- */ -- if (info->ChipFamily == CHIP_FAMILY_RV100 && !pRADEONEnt->HasCRTC2) { -- int i; + } else { +#ifdef XF86DRM_MODE + char *bus_id; -+ if (!radeon_alloc_dri(pScrn)) ++ int zaphod_mask; ++ if (!radeon_alloc_dri(pScrn)) + return FALSE; -+ + +- ErrorF("before xf86InitialConfiguration\n"); ++ zaphod_mask = 0xf; ++ if (info->IsPrimary) ++ zaphod_mask = 0xd; ++ if (info->IsSecondary) ++ zaphod_mask = 0x2; + +- if (!xf86InitialConfiguration (pScrn, FALSE)) +- { +- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes.\n"); +- goto fail; +- } + bus_id = DRICreatePCIBusID(info->PciInfo); -+ if (drmmode_pre_init(pScrn, &info->drmmode, bus_id, "radeon", pScrn->bitsPerPixel / 8) == FALSE) { ++ if (drmmode_pre_init(pScrn, &info->drmmode, bus_id, "radeon", pScrn->bitsPerPixel / 8, zaphod_mask) == FALSE) { + xfree(bus_id); + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Kernel modesetting setup failed\n"); + goto fail; + } -- for (i = 0; i < xf86_config->num_output; i++) { -- xf86OutputPtr output = xf86_config->output[i]; +- /* fix up cloning on rn50 cards +- * since they only have one crtc sometimes the xserver doesn't assign +- * a crtc to one of the outputs even though both outputs have common modes +- * which results in only one monitor being enabled. Assign a crtc here so +- * that both outputs light up. +- */ +- if (info->ChipFamily == CHIP_FAMILY_RV100 && !pRADEONEnt->HasCRTC2) { +- int i; + info->dri->drmFD = info->drmmode.fd; + info->dri2.drm_fd = info->drmmode.fd; + info->dri2.enabled = FALSE; @@ -4449,10 +5883,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr + + { + struct drm_radeon_gem_info mminfo; - -- /* XXX: double check crtc mode */ -- if ((output->probed_modes != NULL) && (output->crtc == NULL)) -- output->crtc = xf86_config->crtc[0]; ++ + if (!drmCommandWriteRead(info->dri->drmFD, DRM_RADEON_GEM_INFO, &mminfo, sizeof(mminfo))) + { + info->mm.vram_size = mminfo.vram_visible; @@ -4463,11 +5894,16 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr + { + struct drm_radeon_getparam gp; + int value; -+ + +- for (i = 0; i < xf86_config->num_output; i++) { +- xf86OutputPtr output = xf86_config->output[i]; + memset(&gp, 0, sizeof(gp)); + gp.param = RADEON_PARAM_FB_LOCATION; + gp.value = &value; -+ + +- /* XXX: double check crtc mode */ +- if ((output->probed_modes != NULL) && (output->crtc == NULL)) +- output->crtc = xf86_config->crtc[0]; + if (drmCommandWriteRead(info->dri->drmFD, DRM_RADEON_GETPARAM, &gp, + sizeof(gp)) < 0) { + goto fail; @@ -4499,7 +5935,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr /* Get ScreenInit function */ if (!xf86LoadSubModule(pScrn, "fb")) return FALSE; -@@ -3082,10 +3216,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, in +@@ -3082,10 +3223,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) if (!RADEONPreInitXv(pScrn)) goto fail; } @@ -4516,7 +5952,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr } if (pScrn->modes == NULL) { -@@ -3238,6 +3374,9 @@ static void RADEONBlockHandler(int i, po +@@ -3238,6 +3381,9 @@ static void RADEONBlockHandler(int i, pointer blockData, #ifdef USE_EXA info->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN; @@ -4526,7 +5962,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr #endif } -@@ -3326,7 +3465,7 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3326,7 +3472,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int subPixelOrder = SubPixelUnknown; char* s; #endif @@ -4535,7 +5971,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr info->accelOn = FALSE; #ifdef USE_XAA -@@ -3346,58 +3485,61 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3346,58 +3492,61 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, "RADEONScreenInit %lx %ld\n", pScrn->memPhysBase, pScrn->fbOffset); #endif @@ -4636,7 +6072,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr /* Visual setup */ miClearVisualTypes(); if (!miSetVisualTypes(pScrn->depth, -@@ -3431,19 +3573,21 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3431,19 +3580,21 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, hasDRI = info->directRenderingEnabled; #endif /* XF86DRI */ @@ -4670,7 +6106,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr } } -@@ -3480,7 +3624,7 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3480,7 +3631,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, #ifdef XF86DRI if (hasDRI) { info->accelDFS = xf86ReturnOptValBool(info->Options, OPTION_ACCEL_DFS, @@ -4679,7 +6115,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr /* Reserve approx. half of offscreen memory for local textures by * default, can be overridden with Option "FBTexPercent". -@@ -3506,7 +3650,7 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3506,7 +3657,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, #endif #if defined(XF86DRI) && defined(USE_XAA) @@ -4688,7 +6124,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr info->dri->textureSize = -1; if (xf86GetOptValInteger(info->Options, OPTION_FBTEX_PERCENT, &(info->dri->textureSize))) { -@@ -3524,7 +3668,7 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3524,7 +3675,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, #endif #ifdef USE_XAA @@ -4697,7 +6133,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr return FALSE; #endif -@@ -3545,7 +3689,7 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3545,7 +3696,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, info->CurrentLayout.pixel_bytes); int maxy = info->FbMapSize / width_bytes; @@ -4706,7 +6142,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr xf86DrvMsg(scrnIndex, X_ERROR, "Static buffer allocation failed. Disabling DRI.\n"); xf86DrvMsg(scrnIndex, X_ERROR, -@@ -3555,19 +3699,52 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3555,19 +3706,52 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, info->CurrentLayout.pixel_bytes * 3 + 1023) / 1024); info->directRenderingEnabled = FALSE; } else { @@ -4763,7 +6199,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr #endif xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Initializing fb layer\n"); -@@ -3591,7 +3768,7 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3591,7 +3775,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, if (info->r600_shadow_fb == FALSE) { /* Init fb layer */ @@ -4772,7 +6208,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr pScrn->virtualX, pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, pScrn->displayWidth, pScrn->bitsPerPixel)) -@@ -3633,8 +3810,10 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3633,8 +3817,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, /* restore the memory map here otherwise we may get a hang when * initializing the drm below */ @@ -4785,7 +6221,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr /* Backing store setup */ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, -@@ -3644,7 +3823,7 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3644,7 +3830,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, /* DRI finalisation */ #ifdef XF86DRI @@ -4794,7 +6230,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr info->dri->pKernelDRMVersion->version_minor >= 19) { if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_PCIGART_LOCATION, info->dri->pciGartOffset) < 0) -@@ -3660,14 +3839,24 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3660,14 +3846,24 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, if (info->directRenderingEnabled) { xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "DRI Finishing init !\n"); @@ -4820,7 +6256,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n"); -@@ -3763,10 +3952,16 @@ Bool RADEONScreenInit(int scrnIndex, Scr +@@ -3763,10 +3959,16 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, return FALSE; } } @@ -4838,7 +6274,42 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr /* Provide SaveScreen & wrap BlockHandler and CloseScreen */ /* Wrap CloseScreen */ -@@ -5336,7 +5531,7 @@ Bool RADEONSwitchMode(int scrnIndex, Dis +@@ -3786,18 +3988,24 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, + pScrn->PointerMoved = RADEONPointerMoved; + + /* Colormap setup */ +- xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, +- "Initializing color map\n"); +- if (!miCreateDefColormap(pScreen)) return FALSE; +- /* all radeons support 10 bit CLUTs */ +- if (!xf86HandleColormaps(pScreen, 256, 10, +- RADEONLoadPalette, NULL, +- CMAP_PALETTED_TRUECOLOR ++ if (!info->drm_mode_setting) { ++ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, ++ "Initializing color map\n"); ++ if (!miCreateDefColormap(pScreen)) ++ return FALSE; ++ /* all radeons support 10 bit CLUTs */ ++ if (!xf86HandleColormaps(pScreen, 256, 10, ++ RADEONLoadPalette, NULL, ++ CMAP_PALETTED_TRUECOLOR + #if 0 /* This option messes up text mode! (eich@suse.de) */ +- | CMAP_LOAD_EVEN_IF_OFFSCREEN ++ | CMAP_LOAD_EVEN_IF_OFFSCREEN + #endif +- | CMAP_RELOAD_ON_MODE_SWITCH)) return FALSE; +- ++ | CMAP_RELOAD_ON_MODE_SWITCH)) ++ return FALSE; ++ } else { ++ if (!drmmode_setup_colormap(pScreen, pScrn)) ++ return FALSE; ++ } + /* Note unused options */ + if (serverGeneration == 1) + xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); +@@ -5336,7 +5544,7 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) #ifdef XF86DRI Bool CPStarted = info->cp->CPStarted; @@ -4847,7 +6318,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr DRILock(pScrn->pScreen, 0); RADEONCP_STOP(pScrn, info); } -@@ -5359,8 +5554,10 @@ Bool RADEONSwitchMode(int scrnIndex, Dis +@@ -5359,8 +5567,10 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) #endif } @@ -4860,7 +6331,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr ret = xf86SetSingleMode (pScrn, mode, RR_Rotate_0); -@@ -5372,16 +5569,19 @@ Bool RADEONSwitchMode(int scrnIndex, Dis +@@ -5372,16 +5582,19 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) /* xf86SetRootClip would do, but can't access that here */ } @@ -4888,7 +6359,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr } #endif -@@ -5579,6 +5779,11 @@ void RADEONAdjustFrame(int scrnIndex, in +@@ -5579,6 +5792,11 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags) xf86OutputPtr output = config->output[config->compat_output]; xf86CrtcPtr crtc = output->crtc; @@ -4900,7 +6371,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr /* not handled */ if (IS_AVIVO_VARIANT) return; -@@ -5618,76 +5823,100 @@ Bool RADEONEnterVT(int scrnIndex, int fl +@@ -5618,76 +5836,100 @@ Bool RADEONEnterVT(int scrnIndex, int flags) xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONEnterVT\n"); @@ -4915,12 +6386,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr + rhdAtomASICInit(info->atomBIOS); + } else { + xf86Int10InfoPtr pInt; - -- pInt = xf86InitInt10 (info->pEnt->index); -- if (pInt) { -- pInt->num = 0xe6; -- xf86ExecX86int10 (pInt); -- xf86FreeInt10 (pInt); ++ + pInt = xf86InitInt10 (info->pEnt->index); + if (pInt) { + pInt->num = 0xe6; @@ -4934,7 +6400,12 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr + } + /* Makes sure the engine is idle before doing anything */ + RADEONWaitForIdleMMIO(pScrn); -+ + +- pInt = xf86InitInt10 (info->pEnt->index); +- if (pInt) { +- pInt->num = 0xe6; +- xf86ExecX86int10 (pInt); +- xf86FreeInt10 (pInt); + if (info->IsMobility && !IS_AVIVO_VARIANT) { + if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) { + RADEONSetDynamicClock(pScrn, 1); @@ -5051,7 +6522,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr } #endif /* this will get XVideo going again, but only if XVideo was initialised -@@ -5702,7 +5931,7 @@ Bool RADEONEnterVT(int scrnIndex, int fl +@@ -5702,7 +5944,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags) info->accel_state->XInited3D = FALSE; #ifdef XF86DRI @@ -5060,7 +6531,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr if (info->ChipFamily >= CHIP_FAMILY_R600) R600LoadShaders(pScrn); RADEONCP_START(pScrn, info); -@@ -5726,27 +5955,29 @@ void RADEONLeaveVT(int scrnIndex, int fl +@@ -5726,27 +5968,29 @@ void RADEONLeaveVT(int scrnIndex, int flags) xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONLeaveVT\n"); #ifdef XF86DRI @@ -5106,7 +6577,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr /* Make sure 3D clients will re-upload textures to video RAM */ if (info->dri->textureSize) { -@@ -5762,6 +5993,11 @@ void RADEONLeaveVT(int scrnIndex, int fl +@@ -5762,6 +6006,11 @@ void RADEONLeaveVT(int scrnIndex, int flags) i = list[i].next; } while (i != 0); } @@ -5118,7 +6589,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr } #endif -@@ -5788,10 +6024,17 @@ void RADEONLeaveVT(int scrnIndex, int fl +@@ -5788,10 +6037,17 @@ void RADEONLeaveVT(int scrnIndex, int flags) xf86_hide_cursors (pScrn); @@ -5139,7 +6610,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Ok, leaving now...\n"); -@@ -5845,7 +6088,8 @@ static Bool RADEONCloseScreen(int scrnIn +@@ -5845,7 +6101,8 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen) #endif /* USE_XAA */ if (pScrn->vtSema) { @@ -5149,7 +6620,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr } xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, -@@ -5880,6 +6124,7 @@ static Bool RADEONCloseScreen(int scrnIn +@@ -5880,6 +6137,7 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen) info->DGAModes = NULL; xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Unmapping memory\n"); @@ -5157,9 +6628,10 @@ diff -up xf86-video-ati-6.12.2/src/radeon_driver.c.dave xf86-video-ati-6.12.2/sr RADEONUnmapMem(pScrn); pScrn->vtSema = FALSE; -diff -up xf86-video-ati-6.12.2/src/radeon_drm.h.dave xf86-video-ati-6.12.2/src/radeon_drm.h ---- xf86-video-ati-6.12.2/src/radeon_drm.h.dave 2008-12-02 08:20:59.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_drm.h 2009-04-15 12:46:30.000000000 +1000 +diff --git a/src/radeon_drm.h b/src/radeon_drm.h +index 54bc234..843cfe8 100644 +--- a/src/radeon_drm.h ++++ b/src/radeon_drm.h @@ -303,7 +303,8 @@ typedef union { #define RADEON_INDEX_PRIM_OFFSET 20 @@ -5316,7 +6788,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_drm.h.dave xf86-video-ati-6.12.2/src/r } drm_radeon_mem_alloc_t; typedef struct drm_radeon_mem_free { -@@ -715,7 +734,7 @@ typedef struct drm_radeon_mem_init_heap +@@ -715,7 +734,7 @@ typedef struct drm_radeon_mem_init_heap { /* 1.6: Userspace can request & wait on irq's: */ typedef struct drm_radeon_irq_emit { @@ -5446,9 +6918,10 @@ diff -up xf86-video-ati-6.12.2/src/radeon_drm.h.dave xf86-video-ati-6.12.2/src/r +}; + #endif -diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/radeon_exa.c ---- xf86-video-ati-6.12.2/src/radeon_exa.c.dave 2009-02-28 02:25:10.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_exa.c 2009-04-15 12:46:30.000000000 +1000 +diff --git a/src/radeon_exa.c b/src/radeon_exa.c +index ae68146..cc48a7a 100644 +--- a/src/radeon_exa.c ++++ b/src/radeon_exa.c @@ -44,7 +44,7 @@ #include "radeon_version.h" @@ -5458,7 +6931,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r /***********************************************************************/ #define RINFO_FROM_SCREEN(pScr) ScrnInfoPtr pScrn = xf86Screens[pScr->myNum]; \ -@@ -182,12 +182,25 @@ Bool RADEONGetPixmapOffsetPitch(PixmapPt +@@ -182,12 +182,25 @@ Bool RADEONGetPixmapOffsetPitch(PixmapPtr pPix, uint32_t *pitch_offset) RINFO_FROM_SCREEN(pPix->drawable.pScreen); uint32_t pitch, offset; int bpp; @@ -5513,7 +6986,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r static Bool RADEONPrepareAccess(PixmapPtr pPix, int index) { RINFO_FROM_SCREEN(pPix->drawable.pScreen); -@@ -231,7 +261,31 @@ static Bool RADEONPrepareAccess(PixmapPt +@@ -231,7 +261,31 @@ static Bool RADEONPrepareAccess(PixmapPtr pPix, int index) uint32_t offset = exaGetPixmapOffset(pPix); int bpp, soff; uint32_t size, flags; @@ -5536,16 +7009,16 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r + FatalError("failed to map pixmap %d\n", ret); + return FALSE; + } -+ + + pPix->devPrivate.ptr = driver_priv->bo->virtual; + } + } - ++ +#if X_BYTE_ORDER == X_BIG_ENDIAN /* Front buffer is always set with proper swappers */ if (offset == 0) return TRUE; -@@ -287,6 +341,7 @@ static Bool RADEONPrepareAccess(PixmapPt +@@ -287,6 +341,7 @@ static Bool RADEONPrepareAccess(PixmapPtr pPix, int index) OUTREG(RADEON_SURFACE0_LOWER_BOUND + soff, offset); OUTREG(RADEON_SURFACE0_UPPER_BOUND + soff, offset + size - 1); swapper_surfaces[index] = offset; @@ -5553,25 +7026,25 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r return TRUE; } -@@ -296,7 +351,17 @@ static void RADEONFinishAccess(PixmapPtr +@@ -296,7 +351,17 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index) unsigned char *RADEONMMIO = info->MMIO; uint32_t offset = exaGetPixmapOffset(pPix); int soff; + struct radeon_exa_pixmap_priv *driver_priv; + + driver_priv = exaGetPixmapDriverPrivate(pPix); -+ + + if (driver_priv) { + dri_bo_unmap(driver_priv->bo); + pPix->devPrivate.ptr = NULL; + } + - ++ +#if X_BYTE_ORDER == X_BIG_ENDIAN /* Front buffer is always set with proper swappers */ if (offset == 0) return; -@@ -319,9 +384,92 @@ static void RADEONFinishAccess(PixmapPtr +@@ -319,9 +384,92 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index) OUTREG(RADEON_SURFACE0_LOWER_BOUND + soff, 0); OUTREG(RADEON_SURFACE0_UPPER_BOUND + soff, 0); swapper_surfaces[index] = 0; @@ -5665,7 +7138,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r #define ENTER_DRAW(x) TRACE #define LEAVE_DRAW(x) TRACE -@@ -332,6 +480,7 @@ static void RADEONFinishAccess(PixmapPtr +@@ -332,6 +480,7 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index) #define BEGIN_ACCEL(n) RADEONWaitForFifo(pScrn, (n)) #define OUT_ACCEL_REG(reg, val) OUTREG(reg, val) #define OUT_ACCEL_REG_F(reg, val) OUTREG(reg, F_TO_DW(val)) @@ -5673,7 +7146,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r #define FINISH_ACCEL() #ifdef RENDER -@@ -345,6 +494,7 @@ static void RADEONFinishAccess(PixmapPtr +@@ -345,6 +494,7 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index) #undef OUT_ACCEL_REG #undef OUT_ACCEL_REG_F #undef FINISH_ACCEL @@ -5681,7 +7154,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r #ifdef XF86DRI -@@ -355,6 +505,7 @@ static void RADEONFinishAccess(PixmapPtr +@@ -355,6 +505,7 @@ static void RADEONFinishAccess(PixmapPtr pPix, int index) #define BEGIN_ACCEL(n) BEGIN_RING(2*(n)) #define OUT_ACCEL_REG(reg, val) OUT_RING_REG(reg, val) #define FINISH_ACCEL() ADVANCE_RING() @@ -5689,7 +7162,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r #define OUT_RING_F(x) OUT_RING(F_TO_DW(x)) -@@ -393,122 +544,126 @@ Bool RADEONSetupMemEXA (ScreenPtr pScree +@@ -393,122 +544,126 @@ Bool RADEONSetupMemEXA (ScreenPtr pScreen) if (info->accel_state->exa == NULL) return FALSE; @@ -5868,9 +7341,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r - info->dri->textureSize *= (info->accel_state->exa->memorySize - - info->accel_state->exa->offScreenBase) / 100; -+ info->dri->textureSize *= (info->accel_state->exa->memorySize - -+ info->accel_state->exa->offScreenBase) / 100; - +- - l = RADEONLog2(info->dri->textureSize / RADEON_NR_TEX_REGIONS); - if (l < RADEON_LOG_TEX_GRANULARITY) - l = RADEON_LOG_TEX_GRANULARITY; @@ -5886,6 +7357,9 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r - info->dri->textureSize = 0; - } - } else ++ info->dri->textureSize *= (info->accel_state->exa->memorySize - ++ info->accel_state->exa->offScreenBase) / 100; ++ + l = RADEONLog2(info->dri->textureSize / RADEON_NR_TEX_REGIONS); + if (l < RADEON_LOG_TEX_GRANULARITY) + l = RADEON_LOG_TEX_GRANULARITY; @@ -5924,15 +7398,12 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r unsigned long long offset; - exaMoveInPixmap(pPix); - ExaOffscreenMarkUsed(pPix); -+ struct radeon_exa_pixmap_priv *driver_priv; - +- - offset = exaGetPixmapOffset(pPix); ++ struct radeon_exa_pixmap_priv *driver_priv; ++ + driver_priv = exaGetPixmapDriverPrivate(pPix); - -- if (offset > info->FbMapSize) -- return ~0ULL; -- else -- return info->fbLocation + offset; ++ + if (driver_priv) { + //offset = dri_bo_get_handle(driver_priv->bo); + offset = driver_priv->bo->offset; @@ -5945,14 +7416,19 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa.c.dave xf86-video-ati-6.12.2/src/r + offset += info->fbLocation; + ExaOffscreenMarkUsed(pPix); + } -+ + +- if (offset > info->FbMapSize) +- return ~0ULL; +- else +- return info->fbLocation + offset; + return offset; } #endif -diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2/src/radeon_exa_funcs.c ---- xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave 2009-04-08 01:19:33.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_exa_funcs.c 2009-04-15 12:46:30.000000000 +1000 -@@ -74,21 +74,73 @@ FUNC_NAME(RADEONSync)(ScreenPtr pScreen, +diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c +index 59cb46f..c51bab2 100644 +--- a/src/radeon_exa_funcs.c ++++ b/src/radeon_exa_funcs.c +@@ -74,21 +74,73 @@ FUNC_NAME(RADEONSync)(ScreenPtr pScreen, int marker) ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; RADEONInfoPtr info = RADEONPTR(pScrn); @@ -6027,7 +7503,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 ACCEL_PREAMBLE(); TRACE; -@@ -97,25 +149,58 @@ FUNC_NAME(RADEONPrepareSolid)(PixmapPtr +@@ -97,25 +149,58 @@ FUNC_NAME(RADEONPrepareSolid)(PixmapPtr pPix, int alu, Pixel pm, Pixel fg) RADEON_FALLBACK(("24bpp unsupported\n")); if (!RADEONGetDatatypeBpp(pPix->drawable.bitsPerPixel, &datatype)) RADEON_FALLBACK(("RADEONGetDatatypeBpp failed\n")); @@ -6101,7 +7577,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 return TRUE; } -@@ -146,6 +231,7 @@ FUNC_NAME(RADEONDoneSolid)(PixmapPtr pPi +@@ -146,6 +231,7 @@ FUNC_NAME(RADEONDoneSolid)(PixmapPtr pPix) TRACE; @@ -6109,7 +7585,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 BEGIN_ACCEL(2); OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); OUT_ACCEL_REG(RADEON_WAIT_UNTIL, -@@ -153,6 +239,7 @@ FUNC_NAME(RADEONDoneSolid)(PixmapPtr pPi +@@ -153,6 +239,7 @@ FUNC_NAME(RADEONDoneSolid)(PixmapPtr pPix) FINISH_ACCEL(); } @@ -6117,7 +7593,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 void FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoPtr pScrn, uint32_t src_pitch_offset, uint32_t dst_pitch_offset, uint32_t datatype, int rop, -@@ -163,23 +250,28 @@ FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoP +@@ -163,23 +250,28 @@ FUNC_NAME(RADEONDoPrepareCopy)(ScrnInfoPtr pScrn, uint32_t src_pitch_offset, RADEON_SWITCH_TO_2D(); @@ -6163,7 +7639,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 } static Bool -@@ -190,9 +282,46 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr p +@@ -190,9 +282,46 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr pSrc, PixmapPtr pDst, { RINFO_FROM_SCREEN(pDst->drawable.pScreen); uint32_t datatype, src_pitch_offset, dst_pitch_offset; @@ -6211,7 +7687,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 info->accel_state->xdir = xdir; info->accel_state->ydir = ydir; -@@ -200,10 +329,11 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr p +@@ -200,10 +329,11 @@ FUNC_NAME(RADEONPrepareCopy)(PixmapPtr pSrc, PixmapPtr pDst, RADEON_FALLBACK(("24bpp unsupported")); if (!RADEONGetDatatypeBpp(pDst->drawable.bitsPerPixel, &datatype)) RADEON_FALLBACK(("RADEONGetDatatypeBpp failed\n")); @@ -6225,7 +7701,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 FUNC_NAME(RADEONDoPrepareCopy)(pScrn, src_pitch_offset, dst_pitch_offset, datatype, rop, planemask); -@@ -251,6 +381,7 @@ FUNC_NAME(RADEONDoneCopy)(PixmapPtr pDst +@@ -251,6 +381,7 @@ FUNC_NAME(RADEONDoneCopy)(PixmapPtr pDst) TRACE; @@ -6233,7 +7709,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 BEGIN_ACCEL(2); OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); OUT_ACCEL_REG(RADEON_WAIT_UNTIL, -@@ -267,17 +398,27 @@ RADEONUploadToScreenCP(PixmapPtr pDst, i +@@ -267,17 +398,27 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h, { RINFO_FROM_SCREEN(pDst->drawable.pScreen); unsigned int bpp = pDst->drawable.bitsPerPixel; @@ -6264,7 +7740,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 int cpp = bpp / 8; ACCEL_PREAMBLE(); -@@ -297,20 +438,26 @@ RADEONUploadToScreenCP(PixmapPtr pDst, i +@@ -297,20 +438,26 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h, exaMarkSync(pDst->drawable.pScreen); return TRUE; } @@ -6294,7 +7770,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, RADEON_GMC_DST_PITCH_OFFSET_CNTL | RADEON_GMC_SRC_PITCH_OFFSET_CNTL | -@@ -321,8 +468,14 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint3 +@@ -321,8 +468,14 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset, RADEON_DP_SRC_SOURCE_MEMORY | RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS); @@ -6309,7 +7785,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 OUT_ACCEL_REG(RADEON_SRC_Y_X, (srcY << 16) | srcX); OUT_ACCEL_REG(RADEON_DST_Y_X, (dstY << 16) | dstX); OUT_ACCEL_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w); -@@ -334,6 +487,174 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint3 +@@ -334,6 +487,174 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset, FINISH_ACCEL(); } @@ -6484,7 +7960,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 static Bool RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h, -@@ -347,12 +668,17 @@ RADEONDownloadFromScreenCP(PixmapPtr pSr +@@ -347,12 +668,17 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h, TRACE; @@ -6503,7 +7979,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 RADEONGetPixmapOffsetPitch(pSrc, &src_pitch_offset) && (scratch = RADEONCPGetBuffer(pScrn))) { -@@ -367,7 +693,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSr +@@ -367,7 +693,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h, RADEON_SWITCH_TO_2D(); /* Kick the first blit as early as possible */ @@ -6513,7 +7989,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 x, y, 0, 0, w, hpass); FLUSH_RING(); -@@ -394,7 +721,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSr +@@ -394,7 +721,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h, /* Prepare next blit if anything's left */ if (hpass) { scratch_off = scratch->total/2 - scratch_off; @@ -6523,7 +7999,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 x, y, 0, 0, w, hpass); } -@@ -473,10 +801,8 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr +@@ -473,10 +801,8 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) info->accel_state->exa->DownloadFromScreen = RADEONDownloadFromScreenCP; #endif @@ -6534,7 +8010,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 info->accel_state->exa->flags = EXA_OFFSCREEN_PIXMAPS; #ifdef EXA_SUPPORTS_PREPARE_AUX -@@ -485,6 +811,11 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr +@@ -485,6 +811,11 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) info->accel_state->exa->pixmapOffsetAlign = RADEON_BUFFER_ALIGN + 1; info->accel_state->exa->pixmapPitchAlign = 64; @@ -6546,7 +8022,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 #ifdef RENDER if (info->RenderAccel) { if (info->ChipFamily >= CHIP_FAMILY_R600) -@@ -493,7 +824,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr +@@ -493,7 +824,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) else if (IS_R300_3D || IS_R500_3D) { if ((info->ChipFamily < CHIP_FAMILY_RS400) #ifdef XF86DRI @@ -6555,7 +8031,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 #endif ) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Render acceleration " -@@ -528,6 +859,15 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr +@@ -528,6 +859,15 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) } #endif @@ -6571,9 +8047,10 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_funcs.c.dave xf86-video-ati-6.12.2 #if EXA_VERSION_MAJOR > 2 || (EXA_VERSION_MAJOR == 2 && EXA_VERSION_MINOR >= 3) xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting EXA maxPitchBytes\n"); -diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12.2/src/radeon_exa_render.c ---- xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave 2009-04-02 15:12:43.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_exa_render.c 2009-04-15 12:46:30.000000000 +1000 +diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c +index 571204a..ca46505 100644 +--- a/src/radeon_exa_render.c ++++ b/src/radeon_exa_render.c @@ -54,6 +54,10 @@ #define ONLY_ONCE #endif @@ -6585,7 +8062,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. /* Only include the following (generic) bits once. */ #ifdef ONLY_ONCE -@@ -365,12 +369,14 @@ static Bool FUNC_NAME(R100TextureSetup)( +@@ -365,12 +369,14 @@ static Bool FUNC_NAME(R100TextureSetup)(PicturePtr pPict, PixmapPtr pPix, Bool repeat = pPict->repeat && pPict->repeatType != RepeatPad && !(unit == 0 && (info->accel_state->need_src_tile_x || info->accel_state->need_src_tile_y)); int i; @@ -6602,7 +8079,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. RADEON_FALLBACK(("Bad texture offset 0x%x\n", (int)txoffset)); if ((txpitch & 0x1f) != 0) RADEON_FALLBACK(("Bad texture pitch 0x%x\n", (int)txpitch)); -@@ -426,23 +432,43 @@ static Bool FUNC_NAME(R100TextureSetup)( +@@ -426,23 +432,43 @@ static Bool FUNC_NAME(R100TextureSetup)(PicturePtr pPict, PixmapPtr pPix, } } @@ -6649,7 +8126,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. } FINISH_ACCEL(); -@@ -551,10 +577,52 @@ static Bool FUNC_NAME(R100PrepareComposi +@@ -551,10 +577,52 @@ static Bool FUNC_NAME(R100PrepareComposite)(int op, uint32_t dst_format, dst_offset, dst_pitch, colorpitch; uint32_t pp_cntl, blendcntl, cblend, ablend; int pixel_shift; @@ -6702,7 +8179,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. if (!RADEONGetDestFormat(pDstPicture, &dst_format)) return FALSE; -@@ -568,19 +636,18 @@ static Bool FUNC_NAME(R100PrepareComposi +@@ -568,19 +636,18 @@ static Bool FUNC_NAME(R100PrepareComposite)(int op, pixel_shift = pDst->drawable.bitsPerPixel >> 4; @@ -6725,7 +8202,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. if (!RADEONSetupSourceTile(pSrcPicture, pSrc, FALSE, TRUE)) return FALSE; -@@ -598,10 +665,18 @@ static Bool FUNC_NAME(R100PrepareComposi +@@ -598,10 +665,18 @@ static Bool FUNC_NAME(R100PrepareComposite)(int op, info->accel_state->is_transform[1] = FALSE; } @@ -6746,7 +8223,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. OUT_ACCEL_REG(RADEON_RB3D_COLORPITCH, colorpitch); /* IN operator: Multiply src by mask components or mask alpha. -@@ -701,13 +776,17 @@ static Bool FUNC_NAME(R200TextureSetup)( +@@ -701,13 +776,17 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix, Bool repeat = pPict->repeat && pPict->repeatType != RepeatPad && !(unit == 0 && (info->accel_state->need_src_tile_x || info->accel_state->need_src_tile_y)); int i; @@ -6767,7 +8244,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. if ((txpitch & 0x1f) != 0) RADEON_FALLBACK(("Bad texture pitch 0x%x\n", (int)txpitch)); -@@ -764,7 +843,8 @@ static Bool FUNC_NAME(R200TextureSetup)( +@@ -764,7 +843,8 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix, } } @@ -6777,7 +8254,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. if (unit == 0) { OUT_ACCEL_REG(R200_PP_TXFILTER_0, txfilter); OUT_ACCEL_REG(R200_PP_TXFORMAT_0, txformat); -@@ -772,7 +852,15 @@ static Bool FUNC_NAME(R200TextureSetup)( +@@ -772,7 +852,15 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix, OUT_ACCEL_REG(R200_PP_TXSIZE_0, (pPix->drawable.width - 1) | ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); OUT_ACCEL_REG(R200_PP_TXPITCH_0, txpitch - 32); @@ -6794,7 +8271,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. } else { OUT_ACCEL_REG(R200_PP_TXFILTER_1, txfilter); OUT_ACCEL_REG(R200_PP_TXFORMAT_1, txformat); -@@ -780,7 +868,17 @@ static Bool FUNC_NAME(R200TextureSetup)( +@@ -780,7 +868,17 @@ static Bool FUNC_NAME(R200TextureSetup)(PicturePtr pPict, PixmapPtr pPix, OUT_ACCEL_REG(R200_PP_TXSIZE_1, (pPix->drawable.width - 1) | ((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT)); OUT_ACCEL_REG(R200_PP_TXPITCH_1, txpitch - 32); @@ -6813,7 +8290,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. } FINISH_ACCEL(); -@@ -873,10 +971,52 @@ static Bool FUNC_NAME(R200PrepareComposi +@@ -873,10 +971,52 @@ static Bool FUNC_NAME(R200PrepareComposite)(int op, PicturePtr pSrcPicture, uint32_t dst_format, dst_offset, dst_pitch; uint32_t pp_cntl, blendcntl, cblend, ablend, colorpitch; int pixel_shift; @@ -6866,7 +8343,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. if (!RADEONGetDestFormat(pDstPicture, &dst_format)) return FALSE; -@@ -890,13 +1030,13 @@ static Bool FUNC_NAME(R200PrepareComposi +@@ -890,13 +1030,13 @@ static Bool FUNC_NAME(R200PrepareComposite)(int op, PicturePtr pSrcPicture, pixel_shift = pDst->drawable.bitsPerPixel >> 4; @@ -6882,7 +8359,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. RADEON_FALLBACK(("Bad destination offset 0x%x\n", (int)dst_offset)); if (((dst_pitch >> pixel_shift) & 0x7) != 0) RADEON_FALLBACK(("Bad destination pitch 0x%x\n", (int)dst_pitch)); -@@ -918,11 +1058,22 @@ static Bool FUNC_NAME(R200PrepareComposi +@@ -918,11 +1058,22 @@ static Bool FUNC_NAME(R200PrepareComposite)(int op, PicturePtr pSrcPicture, info->accel_state->is_transform[1] = FALSE; } @@ -6907,7 +8384,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. OUT_ACCEL_REG(R200_SE_VTX_FMT_0, R200_VTX_XY); if (pMask) -@@ -991,6 +1142,10 @@ static Bool R300CheckCompositeTexture(Pi +@@ -991,6 +1142,10 @@ static Bool R300CheckCompositeTexture(PicturePtr pPict, int unit, Bool is_r500) { @@ -6918,7 +8395,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. int w = pPict->pDrawable->width; int h = pPict->pDrawable->height; int i; -@@ -1016,8 +1171,17 @@ static Bool R300CheckCompositeTexture(Pi +@@ -1016,8 +1171,17 @@ static Bool R300CheckCompositeTexture(PicturePtr pPict, RADEON_FALLBACK(("Unsupported picture format 0x%x\n", (int)pPict->format)); @@ -6937,7 +8414,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. if (pPict->filter != PictFilterNearest && pPict->filter != PictFilterBilinear) -@@ -1049,15 +1213,19 @@ static Bool FUNC_NAME(R300TextureSetup)( +@@ -1049,15 +1213,19 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix, int w = pPict->pDrawable->width; int h = pPict->pDrawable->height; int i, pixel_shift; @@ -6960,7 +8437,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. if ((txpitch & 0x1f) != 0) RADEON_FALLBACK(("Bad texture pitch 0x%x\n", (int)txpitch)); -@@ -1139,13 +1307,26 @@ static Bool FUNC_NAME(R300TextureSetup)( +@@ -1139,13 +1307,26 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix, RADEON_FALLBACK(("Bad filter 0x%x\n", pPict->filter)); } @@ -6989,7 +8466,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. if (!pPict->repeat) OUT_ACCEL_REG(R300_TX_BORDER_COLOR_0 + (unit * 4), 0); FINISH_ACCEL(); -@@ -1244,6 +1425,7 @@ static Bool R300CheckComposite(int op, P +@@ -1244,6 +1425,7 @@ static Bool R300CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskP return TRUE; } @@ -6997,7 +8474,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. #endif /* ONLY_ONCE */ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, -@@ -1255,10 +1437,51 @@ static Bool FUNC_NAME(R300PrepareComposi +@@ -1255,10 +1437,51 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, uint32_t txenable, colorpitch; uint32_t blendcntl; int pixel_shift; @@ -7050,7 +8527,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. if (!R300GetDestFormat(pDstPicture, &dst_format)) return FALSE; -@@ -1269,7 +1492,7 @@ static Bool FUNC_NAME(R300PrepareComposi +@@ -1269,7 +1492,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, pixel_shift = pDst->drawable.bitsPerPixel >> 4; @@ -7059,7 +8536,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. dst_pitch = exaGetPixmapPitch(pDst); colorpitch = dst_pitch >> pixel_shift; -@@ -1278,7 +1501,7 @@ static Bool FUNC_NAME(R300PrepareComposi +@@ -1278,7 +1501,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, colorpitch |= dst_format; @@ -7068,7 +8545,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. RADEON_FALLBACK(("Bad destination offset 0x%x\n", (int)dst_offset)); if (((dst_pitch >> pixel_shift) & 0x7) != 0) RADEON_FALLBACK(("Bad destination pitch 0x%x\n", (int)dst_pitch)); -@@ -1287,6 +1510,9 @@ static Bool FUNC_NAME(R300PrepareComposi +@@ -1287,6 +1510,9 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, return FALSE; RADEON_SWITCH_TO_3D(); @@ -7078,7 +8555,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. if (!FUNC_NAME(R300TextureSetup)(pSrcPicture, pSrc, 0)) return FALSE; -@@ -1939,9 +2165,18 @@ static Bool FUNC_NAME(R300PrepareComposi +@@ -1939,9 +2165,18 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, (8191 << R300_SCISSOR_Y_SHIFT))); FINISH_ACCEL(); @@ -7099,7 +8576,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. OUT_ACCEL_REG(R300_RB3D_COLORPITCH0, colorpitch); blendcntl = RADEONGetBlendCntl(op, pMaskPicture, pDstPicture->format); -@@ -1959,7 +2194,6 @@ static Bool FUNC_NAME(R300PrepareComposi +@@ -1959,7 +2194,6 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, return TRUE; } @@ -7107,7 +8584,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. #ifdef ACCEL_CP #define VTX_OUT_MASK(_dstX, _dstY, _srcX, _srcY, _maskX, _maskY) \ -@@ -2245,14 +2479,23 @@ static void FUNC_NAME(RadeonDoneComposit +@@ -2245,14 +2479,23 @@ static void FUNC_NAME(RadeonDoneComposite)(PixmapPtr pDst) if (IS_R300_3D || IS_R500_3D) { BEGIN_ACCEL(3); @@ -7132,226 +8609,11 @@ diff -up xf86-video-ati-6.12.2/src/radeon_exa_render.c.dave xf86-video-ati-6.12. } #undef ONLY_ONCE -diff -up xf86-video-ati-6.12.2/src/radeon.h.dave xf86-video-ati-6.12.2/src/radeon.h ---- xf86-video-ati-6.12.2/src/radeon.h.dave 2009-04-01 05:48:34.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon.h 2009-04-15 12:46:30.000000000 +1000 -@@ -46,6 +46,8 @@ - #include "compiler.h" - #include "xf86fbman.h" - -+#include "drmmode_display.h" -+ - /* PCI support */ - #include "xf86Pci.h" - -@@ -75,6 +77,7 @@ - #include "dri.h" - #include "GL/glxint.h" - #include "xf86drm.h" -+#include "radeon_dri2.h" - - #ifdef DAMAGE - #include "damage.h" -@@ -85,6 +88,7 @@ - #include "xf86Crtc.h" - #include "X11/Xatom.h" - -+#include "radeon_bufmgr.h" - /* Render support */ - #ifdef RENDER - #include "picturestr.h" -@@ -414,6 +418,11 @@ typedef enum { - - typedef struct _atomBiosHandle *atomBiosHandlePtr; - -+struct radeon_exa_pixmap_priv { -+ dri_bo *bo; -+ int flags; -+}; -+ - typedef struct { - uint32_t pci_device_id; - RADEONChipFamily chip_family; -@@ -424,7 +433,27 @@ typedef struct { - int singledac; - } RADEONCardInfo; - -+#define RADEON_2D_EXA_COPY 1 -+#define RADEON_2D_EXA_SOLID 2 -+ -+struct radeon_2d_state { -+ int op; // -+ uint32_t dst_pitch_offset; -+ uint32_t src_pitch_offset; -+ uint32_t dp_gui_master_cntl; -+ uint32_t dp_cntl; -+ uint32_t dp_write_mask; -+ uint32_t dp_brush_frgd_clr; -+ uint32_t dp_brush_bkgd_clr; -+ uint32_t dp_src_frgd_clr; -+ uint32_t dp_src_bkgd_clr; -+ uint32_t default_sc_bottom_right; -+ dri_bo *dst_bo; -+ dri_bo *src_bo; -+}; -+ - #ifdef XF86DRI -+ - struct radeon_cp { - Bool CPRuns; /* CP is running */ - Bool CPInUse; /* CP has been used by X server */ -@@ -438,6 +467,10 @@ struct radeon_cp { - drmBufPtr indirectBuffer; - int indirectStart; - -+ drmBuf ib_gem_fake; -+ void *ib_ptr; -+ -+ struct radeon_relocs_info relocs; - /* Debugging info for BEGIN_RING/ADVANCE_RING pairs. */ - int dma_begin_count; - char *dma_debug_func; -@@ -504,13 +537,13 @@ struct radeon_dri { - drm_handle_t ringHandle; /* Handle from drmAddMap */ - drmSize ringMapSize; /* Size of map */ - int ringSize; /* Size of ring (in MB) */ -- drmAddress ring; /* Map */ -+ // drmAddress ring; /* Map */ - int ringSizeLog2QW; - - unsigned long ringReadOffset; /* Offset into GART space */ - drm_handle_t ringReadPtrHandle; /* Handle from drmAddMap */ - drmSize ringReadMapSize; /* Size of map */ -- drmAddress ringReadPtr; /* Map */ -+ // drmAddress ringReadPtr; /* Map */ - - /* CP vertex/indirect buffer data */ - unsigned long bufStart; /* Offset into GART space */ -@@ -529,7 +562,6 @@ struct radeon_dri { - drmAddress gartTex; /* Map */ - int log2GARTTexGran; - -- /* DRI screen private data */ - int fbX; - int fbY; - int backX; -@@ -789,6 +821,7 @@ typedef struct { - RADEONCardType cardType; /* Current card is a PCI card */ - struct radeon_cp *cp; - struct radeon_dri *dri; -+ struct radeon_dri2 dri2; - #ifdef USE_EXA - Bool accelDFS; - #endif -@@ -892,6 +925,27 @@ typedef struct { - - Bool r4xx_atom; - -+ Bool new_cs; // new command submission routine -+ struct radeon_2d_state state_2d; -+ void (*reemit_current2d)(ScrnInfoPtr pScrn, int op); // emit the current 2D state into the IB -+ Bool cs_used_depth; -+ Bool drm_mm; // the drm memory manager exists and is initialised -+ struct { -+ uint64_t vram_size; -+ uint64_t gart_size; -+ -+ dri_bo *front_buffer; -+ dri_bo *cursor[2]; -+ } mm; -+ -+ drm_handle_t fb_map_handle; -+ Bool drm_mode_setting; -+#ifdef XF86DRM_MODE -+ drmmode_rec drmmode; -+#endif -+ -+ int can_resize; -+ dri_bufmgr *bufmgr; - } RADEONInfoRec, *RADEONInfoPtr; - - #define RADEONWaitForFifo(pScrn, entries) \ -@@ -1147,6 +1201,13 @@ extern void - radeon_legacy_free_memory(ScrnInfoPtr pScrn, - void *mem_struct); - -+/* radeon_memory.c */ -+Bool radeon_setup_kernel_mem(ScreenPtr pScreen); -+Bool RADEONDRIDoMappings(ScreenPtr pScreen); -+Bool radeon_update_dri_buffers(ScreenPtr pScreen); -+ -+dri_bo *radeon_get_pixmap_bo(PixmapPtr pPix); -+void radeon_set_pixmap_bo(PixmapPtr pPix, dri_bo *bo); - #ifdef XF86DRI - # ifdef USE_XAA - /* radeon_accelfuncs.c */ -@@ -1165,7 +1226,9 @@ do { \ - - #define RADEONCP_RELEASE(pScrn, info) \ - do { \ -- if (info->cp->CPInUse) { \ -+ if (info->new_cs) { \ -+ RADEONCPReleaseIndirect(pScrn); \ -+ } else if (info->cp->CPInUse) { \ - RADEON_PURGE_CACHE(); \ - RADEON_WAIT_UNTIL_IDLE(); \ - RADEONCPReleaseIndirect(pScrn); \ -@@ -1200,7 +1263,7 @@ do { \ - - #define RADEONCP_REFRESH(pScrn, info) \ - do { \ -- if (!info->cp->CPInUse) { \ -+ if (!info->cp->CPInUse && !info->new_cs) { \ - if (info->cp->needCacheFlush) { \ - RADEON_PURGE_CACHE(); \ - RADEON_PURGE_ZCACHE(); \ -@@ -1227,6 +1290,13 @@ do { \ - #define RING_LOCALS uint32_t *__head = NULL; int __expected; int __count = 0 - - #define BEGIN_RING(n) do { \ -+ if (!info->cp->indirectBuffer) { \ -+ info->cp->indirectBuffer = RADEONCPGetBuffer(pScrn); \ -+ info->cp->indirectStart = 0; \ -+ } else if (info->cp->indirectBuffer->used + (n) * (int)sizeof(uint32_t) > \ -+ info->cp->indirectBuffer->total) { \ -+ RADEONCPFlushIndirect(pScrn, 1); \ -+ } \ - if (RADEON_VERBOSE) { \ - xf86DrvMsg(pScrn->scrnIndex, X_INFO, \ - "BEGIN_RING(%d) in %s\n", (unsigned int)n, __FUNCTION__);\ -@@ -1239,13 +1309,6 @@ do { \ - } \ - info->cp->dma_debug_func = __FILE__; \ - info->cp->dma_debug_lineno = __LINE__; \ -- if (!info->cp->indirectBuffer) { \ -- info->cp->indirectBuffer = RADEONCPGetBuffer(pScrn); \ -- info->cp->indirectStart = 0; \ -- } else if (info->cp->indirectBuffer->used + (n) * (int)sizeof(uint32_t) > \ -- info->cp->indirectBuffer->total) { \ -- RADEONCPFlushIndirect(pScrn, 1); \ -- } \ - __expected = n; \ - __head = (pointer)((char *)info->cp->indirectBuffer->address + \ - info->cp->indirectBuffer->used); \ -@@ -1288,6 +1351,14 @@ do { \ - OUT_RING(val); \ - } while (0) - -+/* TODO - VRAM is wrong in general but true for now - all EXA stuff -+ is in VRAM */ -+#define OUT_RING_RELOC(x, read_domains, write_domains) \ -+ do { \ -+ radeon_bufmgr_emit_reloc(x, &info->cp->relocs, __head, &__count, read_domains, write_domains); \ -+ } while(0) -+ -+ - #define FLUSH_RING() \ - do { \ - if (RADEON_VERBOSE) \ -diff -up xf86-video-ati-6.12.2/src/radeon_legacy_memory.c.dave xf86-video-ati-6.12.2/src/radeon_legacy_memory.c ---- xf86-video-ati-6.12.2/src/radeon_legacy_memory.c.dave 2009-02-25 00:45:07.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_legacy_memory.c 2009-04-15 12:46:30.000000000 +1000 -@@ -21,6 +21,19 @@ radeon_legacy_allocate_memory(ScrnInfoPt +diff --git a/src/radeon_legacy_memory.c b/src/radeon_legacy_memory.c +index 861fd97..c436faf 100644 +--- a/src/radeon_legacy_memory.c ++++ b/src/radeon_legacy_memory.c +@@ -21,6 +21,19 @@ radeon_legacy_allocate_memory(ScrnInfoPtr pScrn, RADEONInfoPtr info = RADEONPTR(pScrn); uint32_t offset = 0; @@ -7371,7 +8633,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_legacy_memory.c.dave xf86-video-ati-6. #ifdef USE_EXA if (info->useEXA) { ExaOffscreenArea *area = *mem_struct; -@@ -94,6 +107,12 @@ radeon_legacy_free_memory(ScrnInfoPtr pS +@@ -94,6 +107,12 @@ radeon_legacy_free_memory(ScrnInfoPtr pScrn, void *mem_struct) { RADEONInfoPtr info = RADEONPTR(pScrn); @@ -7384,10 +8646,12 @@ diff -up xf86-video-ati-6.12.2/src/radeon_legacy_memory.c.dave xf86-video-ati-6. #ifdef USE_EXA ScreenPtr pScreen = screenInfo.screens[pScrn->scrnIndex]; -diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_memory.c ---- /dev/null 2009-04-15 09:55:06.267190488 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_memory.c 2009-04-15 12:46:30.000000000 +1000 -@@ -0,0 +1,93 @@ +diff --git a/src/radeon_memory.c b/src/radeon_memory.c +new file mode 100644 +index 0000000..cded7e7 +--- /dev/null ++++ b/src/radeon_memory.c +@@ -0,0 +1,71 @@ + +#ifdef HAVE_CONFIG_H +#include "config.h" @@ -7409,14 +8673,9 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_memory.c + int screen_size; + int stride = pScrn->displayWidth * cpp; + int total_size_bytes = 0, remain_size_bytes; -+ int fb_size_bytes; + int pagesize = 4096; + + screen_size = RADEON_ALIGN(pScrn->virtualY, 16) * stride; -+ -+ ErrorF("%d x %d x %d = %dK\n", pScrn->displayWidth, pScrn->virtualY, cpp, screen_size / 1024); -+ -+ + { + int cursor_size = 64 * 4 * 64; + int c; @@ -7447,23 +8706,6 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_memory.c + remain_size_bytes = info->mm.vram_size - total_size_bytes; + + info->dri->textureSize = 0; -+#if 0 -+ if (info->dri->textureSize > 0) -+ info->dri->textureSize = (remain_size_bytes / 100) * info->dri->textureSize; -+ else -+ info->dri->textureSize = remain_size_bytes / 2; -+ -+ info->dri->textureSize = RADEON_ALIGN(info->dri->textureSize, pagesize); -+ -+ remain_size_bytes -= info->dri->textureSize; -+#endif -+ -+ ErrorF("texture size is %dK, exa is %dK\n", info->dri->textureSize / 1024, remain_size_bytes/1024); -+ -+ -+ fb_size_bytes = screen_size; -+ -+ ErrorF("fb size is %dK %dK\n", fb_size_bytes / 1024, total_size_bytes / 1024); + + info->mm.front_buffer = dri_bo_alloc(info->bufmgr, "front", screen_size, + 0, RADEON_GEM_DOMAIN_VRAM); @@ -7481,9 +8723,10 @@ diff -up /dev/null xf86-video-ati-6.12.2/src/radeon_memory.c +} + + -diff -up xf86-video-ati-6.12.2/src/radeon_probe.h.dave xf86-video-ati-6.12.2/src/radeon_probe.h ---- xf86-video-ati-6.12.2/src/radeon_probe.h.dave 2009-04-05 08:44:00.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_probe.h 2009-04-15 12:46:30.000000000 +1000 +diff --git a/src/radeon_probe.h b/src/radeon_probe.h +index a0c6b2c..badd361 100644 +--- a/src/radeon_probe.h ++++ b/src/radeon_probe.h @@ -50,6 +50,7 @@ #include "xaa.h" #endif @@ -7500,9 +8743,18 @@ diff -up xf86-video-ati-6.12.2/src/radeon_probe.h.dave xf86-video-ati-6.12.2/src } RADEONCrtcPrivateRec, *RADEONCrtcPrivatePtr; typedef struct _radeon_encoder { -diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6.12.2/src/radeon_textured_video.c ---- xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave 2009-03-27 15:13:04.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_textured_video.c 2009-04-15 12:46:30.000000000 +1000 +@@ -609,6 +611,7 @@ typedef struct + RADEONSaveRec SavedReg; /* Original (text) mode */ + + void *MMIO; /* Map of MMIO region */ ++ int fd; + } RADEONEntRec, *RADEONEntPtr; + + /* radeon_probe.c */ +diff --git a/src/radeon_textured_video.c b/src/radeon_textured_video.c +index 79671c0..aed229c 100644 +--- a/src/radeon_textured_video.c ++++ b/src/radeon_textured_video.c @@ -40,6 +40,7 @@ #include "radeon_macros.h" #include "radeon_probe.h" @@ -7511,7 +8763,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6 #include #include "fourcc.h" -@@ -133,6 +134,7 @@ static __inline__ uint32_t float4touint( +@@ -133,6 +134,7 @@ static __inline__ uint32_t float4touint(float fr, float fg, float fb, float fa) #define BEGIN_ACCEL(n) RADEONWaitForFifo(pScrn, (n)) #define OUT_ACCEL_REG(reg, val) OUTREG(reg, val) #define OUT_ACCEL_REG_F(reg, val) OUTREG(reg, F_TO_DW(val)) @@ -7519,7 +8771,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6 #define FINISH_ACCEL() #include "radeon_textured_videofuncs.c" -@@ -142,6 +144,7 @@ static __inline__ uint32_t float4touint( +@@ -142,6 +144,7 @@ static __inline__ uint32_t float4touint(float fr, float fg, float fb, float fa) #undef BEGIN_ACCEL #undef OUT_ACCEL_REG #undef OUT_ACCEL_REG_F @@ -7527,7 +8779,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6 #undef FINISH_ACCEL #ifdef XF86DRI -@@ -155,6 +158,7 @@ static __inline__ uint32_t float4touint( +@@ -155,6 +158,7 @@ static __inline__ uint32_t float4touint(float fr, float fg, float fb, float fa) #define OUT_ACCEL_REG_F(reg, val) OUT_ACCEL_REG(reg, F_TO_DW(val)) #define FINISH_ACCEL() ADVANCE_RING() #define OUT_RING_F(x) OUT_RING(F_TO_DW(x)) @@ -7535,7 +8787,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6 #include "radeon_textured_videofuncs.c" -@@ -412,6 +416,9 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn +@@ -412,6 +416,9 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, size * 2, 64); if (pPriv->video_offset == 0) return BadAlloc; @@ -7545,7 +8797,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6 } /* Bicubic filter loading */ -@@ -422,6 +429,9 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn +@@ -422,6 +429,9 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, pPriv->bicubic_src_offset = pPriv->bicubic_offset + info->fbLocation + pScrn->fbOffset; if (pPriv->bicubic_offset == 0) pPriv->bicubic_enabled = FALSE; @@ -7555,7 +8807,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6 } if (pDraw->type == DRAWABLE_WINDOW) -@@ -451,11 +461,21 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn +@@ -451,11 +461,21 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, left = (x1 >> 16) & ~1; npixels = ((((x2 + 0xffff) >> 16) + 1) & ~1) - left; @@ -7582,7 +8834,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6 pPriv->src_pitch = dstPitch; pPriv->planeu_offset = dstPitch * dst_height; pPriv->planev_offset = pPriv->planeu_offset + dstPitch2 * ((dst_height + 1) >> 1); -@@ -481,12 +501,12 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn +@@ -481,12 +501,12 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, if (info->DMAForXv) { if (id == FOURCC_YV12) R600CopyPlanarHW(pScrn, buf, buf + s3offset, buf + s2offset, @@ -7597,7 +8849,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6 srcPitch, srcPitch2, pPriv->src_pitch, width, height); } else { -@@ -548,7 +568,7 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn +@@ -548,7 +568,7 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, default: if (info->ChipFamily >= CHIP_FAMILY_R600) { if (info->DMAForXv) @@ -7606,7 +8858,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6 2 * width, pPriv->src_pitch, width, height); else -@@ -566,9 +586,25 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn +@@ -566,9 +586,25 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, /* Upload bicubic filter tex */ if (pPriv->bicubic_enabled) { @@ -7635,7 +8887,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6 } /* update cliplist */ -@@ -586,10 +622,12 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn +@@ -586,10 +622,12 @@ RADEONPutImageTextured(ScrnInfoPtr pScrn, pPriv->w = width; pPriv->h = height; @@ -7649,9 +8901,10 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_video.c.dave xf86-video-ati-6 RADEONDisplayTexturedVideoCP(pScrn, pPriv); else #endif -diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c ---- xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave 2009-04-08 01:32:12.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c 2009-04-15 12:46:30.000000000 +1000 +diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c +index 05acb93..852f4ac 100644 +--- a/src/radeon_textured_videofuncs.c ++++ b/src/radeon_textured_videofuncs.c @@ -87,11 +87,25 @@ do { \ #endif /* !ACCEL_CP */ @@ -7678,7 +8931,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- uint32_t txformat; uint32_t txfilter, txformat0, txformat1, txoffset, txpitch; uint32_t dst_offset, dst_pitch, dst_format; -@@ -101,19 +115,57 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -101,19 +115,57 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv int dstxoff, dstyoff, pixel_shift, vtx_count; BoxPtr pBox = REGION_RECTS(&pPriv->clip); int nBox = REGION_NUM_RECTS(&pPriv->clip); @@ -7739,7 +8992,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- dst_pitch = pPixmap->devKind; } -@@ -144,7 +196,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -144,7 +196,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv RADEON_WAIT_DMA_GUI_IDLE); FINISH_ACCEL(); @@ -7748,7 +9001,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- RADEONInit3DEngine(pScrn); } -@@ -222,15 +274,19 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -222,15 +274,19 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv if (IS_R500_3D && ((pPriv->h - 1) & 0x800)) txpitch |= R500_TXHEIGHT_11; @@ -7771,7 +9024,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- FINISH_ACCEL(); txenable = R300_TEX_0_ENABLE; -@@ -246,19 +302,22 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -246,19 +302,22 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv R300_TX_MIN_FILTER_LINEAR | R300_TX_MAG_FILTER_LINEAR); @@ -7797,7 +9050,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- FINISH_ACCEL(); txenable |= R300_TEX_1_ENABLE | R300_TEX_2_ENABLE; } -@@ -279,13 +338,19 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -279,13 +338,19 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv R300_TX_MAG_FILTER_NEAREST | (1 << R300_TX_ID_SHIFT)); @@ -7819,7 +9072,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- FINISH_ACCEL(); /* Enable tex 1 */ -@@ -1536,11 +1601,18 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -1536,11 +1601,18 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv } } @@ -7840,7 +9093,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- OUT_ACCEL_REG(R300_RB3D_COLORPITCH0, colorpitch); blendcntl = RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO; -@@ -1587,11 +1659,19 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -1587,11 +1659,19 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv if (RADEONTilingEnabled(pScrn, pPixmap)) colorpitch |= RADEON_COLOR_TILE_ENABLE; @@ -7862,7 +9115,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- OUT_ACCEL_REG(RADEON_RB3D_COLORPITCH, colorpitch); -@@ -1630,7 +1710,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -1630,7 +1710,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv R200_CLAMP_S_CLAMP_LAST | R200_CLAMP_T_CLAMP_LAST; @@ -7872,7 +9125,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- OUT_ACCEL_REG(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_1_ENABLE | RADEON_TEX_2_ENABLE | -@@ -1649,21 +1730,22 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -1649,21 +1730,22 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv (pPriv->w - 1) | ((pPriv->h - 1) << RADEON_TEX_VSIZE_SHIFT)); OUT_ACCEL_REG(R200_PP_TXPITCH_0, pPriv->src_pitch - 32); @@ -7898,7 +9151,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- /* similar to r300 code. Note the big problem is that hardware constants * are 8 bits only, representing 0.0-1.0. We can get that up (using bias -@@ -1799,7 +1881,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -1799,7 +1881,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv R200_CLAMP_S_CLAMP_LAST | R200_CLAMP_T_CLAMP_LAST; @@ -7908,7 +9161,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- OUT_ACCEL_REG(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | -@@ -1817,7 +1900,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -1817,7 +1900,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv (pPriv->w - 1) | ((pPriv->h - 1) << RADEON_TEX_VSIZE_SHIFT)); OUT_ACCEL_REG(R200_PP_TXPITCH_0, pPriv->src_pitch - 32); @@ -7917,7 +9170,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- /* MAD temp1 / 2, const0.a * 2, temp0.ggg, -const0.rgb */ OUT_ACCEL_REG(R200_PP_TXCBLEND_0, -@@ -1901,7 +1984,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -1901,7 +1984,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv FINISH_ACCEL(); } else { @@ -7927,7 +9180,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- OUT_ACCEL_REG(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE); -@@ -1922,7 +2006,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -1922,7 +2006,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv ((pPriv->h - 1) << RADEON_TEX_VSIZE_SHIFT)); OUT_ACCEL_REG(R200_PP_TXPITCH_0, pPriv->src_pitch - 32); @@ -7936,7 +9189,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- OUT_ACCEL_REG(R200_PP_TXCBLEND_0, R200_TXC_ARG_A_ZERO | -@@ -1945,7 +2029,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -1945,7 +2029,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv info->accel_state->texW[0] = 1; info->accel_state->texH[0] = 1; @@ -7946,7 +9199,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- OUT_ACCEL_REG(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE); -@@ -1959,8 +2044,9 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(Sc +@@ -1959,8 +2044,9 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv RADEON_CLAMP_S_CLAMP_LAST | RADEON_CLAMP_T_CLAMP_LAST | RADEON_YUV_TO_RGB); @@ -7957,10 +9210,11 @@ diff -up xf86-video-ati-6.12.2/src/radeon_textured_videofuncs.c.dave xf86-video- OUT_ACCEL_REG(RADEON_PP_TXCBLEND_0, RADEON_COLOR_ARG_A_ZERO | RADEON_COLOR_ARG_B_ZERO | -diff -up xf86-video-ati-6.12.2/src/radeon_video.c.dave xf86-video-ati-6.12.2/src/radeon_video.c ---- xf86-video-ati-6.12.2/src/radeon_video.c.dave 2009-04-08 01:31:32.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_video.c 2009-04-15 12:46:30.000000000 +1000 -@@ -284,7 +284,7 @@ void RADEONInitVideo(ScreenPtr pScreen) +diff --git a/src/radeon_video.c b/src/radeon_video.c +index 42aa036..bd6408d 100644 +--- a/src/radeon_video.c ++++ b/src/radeon_video.c +@@ -287,7 +287,7 @@ void RADEONInitVideo(ScreenPtr pScreen) memcpy(newAdaptors, adaptors, num_adaptors * sizeof(XF86VideoAdaptorPtr)); adaptors = newAdaptors; @@ -7969,7 +9223,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_video.c.dave xf86-video-ati-6.12.2/src overlayAdaptor = RADEONSetupImageVideo(pScreen); if (overlayAdaptor != NULL) { adaptors[num_adaptors++] = overlayAdaptor; -@@ -294,9 +294,12 @@ void RADEONInitVideo(ScreenPtr pScreen) +@@ -297,9 +297,12 @@ void RADEONInitVideo(ScreenPtr pScreen) RADEONInitOffscreenImages(pScreen); } @@ -7984,7 +9238,7 @@ diff -up xf86-video-ati-6.12.2/src/radeon_video.c.dave xf86-video-ati-6.12.2/src #endif ) { texturedAdaptor = RADEONSetupImageTexturedVideo(pScreen); -@@ -2197,7 +2200,7 @@ RADEONCopyData( +@@ -2200,7 +2203,7 @@ RADEONCopyData( #ifdef XF86DRI @@ -7993,9 +9247,10 @@ diff -up xf86-video-ati-6.12.2/src/radeon_video.c.dave xf86-video-ati-6.12.2/src { uint8_t *buf; uint32_t bufPitch, dstPitchOff; -diff -up xf86-video-ati-6.12.2/src/radeon_video.h.dave xf86-video-ati-6.12.2/src/radeon_video.h ---- xf86-video-ati-6.12.2/src/radeon_video.h.dave 2009-04-08 01:31:53.000000000 +1000 -+++ xf86-video-ati-6.12.2/src/radeon_video.h 2009-04-15 12:46:30.000000000 +1000 +diff --git a/src/radeon_video.h b/src/radeon_video.h +index 34fb07f..7b75ec3 100644 +--- a/src/radeon_video.h ++++ b/src/radeon_video.h @@ -121,6 +121,9 @@ typedef struct { int w, h; int drw_x, drw_y; diff --git a/xorg-x11-drv-ati.spec b/xorg-x11-drv-ati.spec index 2e4595e..d2cc0ee 100644 --- a/xorg-x11-drv-ati.spec +++ b/xorg-x11-drv-ati.spec @@ -5,7 +5,7 @@ Summary: Xorg X11 ati video driver Name: xorg-x11-drv-ati Version: 6.12.2 -Release: 3%{?dist} +Release: 4%{?dist} URL: http://www.x.org License: MIT Group: User Interface/X Hardware Support @@ -15,7 +15,6 @@ Source0: http://www.x.org/pub/individual/driver/%{tarball}-%{version}.tar.bz2 Source1: radeon.xinf Patch1: radeon-modeset.patch -Patch2: radeon-modeset-zaphod.patch Patch6: radeon-6.9.0-bgnr-enable.patch Patch7: radeon-6.12.1-r600-fb-size.patch @@ -40,7 +39,6 @@ X.Org X11 ati video driver. %prep %setup -q -n %{tarball}-%{version} %patch1 -p1 -b .modeset -%patch2 -p1 -b .modeset-zaphod %patch6 -p1 -b .bgnr %patch7 -p1 -b .r600-fb-size @@ -74,6 +72,9 @@ rm -rf $RPM_BUILD_ROOT %{_mandir}/man4/radeon.4* %changelog +* Thu Apr 16 2009 Dave Airlie 6.12.2-4 +- radeon-modeset.patch: fix stupid idle drawing corrupt since mmap cache + * Wed Apr 15 2009 Dave Airlie 6.12.2-3 - radeon-modeset-zaphod.patch: fix zaphod under kms in theory