From e28590d979cf4142105d3062e96842a5f3e29e03 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Oct 13 2008 07:08:38 +0000 Subject: - radeon-modeset.patch - fix nexuiz mode switch - remove unused reuse code --- diff --git a/radeon-modeset.patch b/radeon-modeset.patch index 22c6f8d..aadd48c 100644 --- a/radeon-modeset.patch +++ b/radeon-modeset.patch @@ -1,3 +1,15 @@ +commit d8cbb2f90b4d399c1ce3ac4cfdf79894bae8d06a +Author: Dave Airlie +Date: Mon Oct 13 16:59:02 2008 +1000 + + radeon: fix switch mode path so nexuiz starts + +commit 65488679e8443cbebbd4ff9585ac34b1ae42da55 +Author: Dave Airlie +Date: Fri Oct 10 15:29:24 2008 +1000 + + remove gem buf caching useless on radeon + commit db1d00f76acdc9868546694d4f3ab3a869ad2396 Author: Dave Airlie Date: Fri Oct 10 15:18:41 2008 +1000 @@ -1907,10 +1919,10 @@ index a6e332d..035e87d 100644 Bool diff --git a/src/radeon_bufmgr.h b/src/radeon_bufmgr.h new file mode 100644 -index 0000000..1e93bc2 +index 0000000..e4e91f8 --- /dev/null +++ b/src/radeon_bufmgr.h -@@ -0,0 +1,29 @@ +@@ -0,0 +1,28 @@ +/** + * @file intel_bufmgr.h + * @@ -1938,7 +1950,6 @@ index 0000000..1e93bc2 +extern void radeon_bufmgr_exa_wait_rendering(dri_bo *bo); +extern dri_bo *radeon_bufmgr_exa_create_bo(dri_bufmgr *bufmgr, struct radeon_memory *mem); +void radeon_bufmgr_post_submit(dri_bufmgr *bufmgr); -+void radeon_bufmgr_gem_enable_reuse(dri_bufmgr *bufmgr); +#endif diff --git a/src/radeon_bufmgr_exa.c b/src/radeon_bufmgr_exa.c new file mode 100644 @@ -2296,10 +2307,10 @@ index 0000000..0d79b58 +#endif diff --git a/src/radeon_bufmgr_gem.c b/src/radeon_bufmgr_gem.c new file mode 100644 -index 0000000..10cd2a0 +index 0000000..dde1caf --- /dev/null +++ b/src/radeon_bufmgr_gem.c -@@ -0,0 +1,573 @@ +@@ -0,0 +1,421 @@ +/************************************************************************** + * + * Copyright © 2007-2008 Red Hat Inc. @@ -2377,68 +2388,13 @@ index 0000000..10cd2a0 + int in_vram; /* have we migrated this bo to VRAM ever */ +} dri_bo_gem; + -+struct dri_gem_bo_bucket { -+ dri_bo_gem *head, **tail; -+ /** -+ * Limit on the number of entries in this bucket. -+ * -+ * 0 means that this caching at this bucket size is disabled. -+ * -1 means that there is no limit to caching at this size. -+ */ -+ int max_entries; -+ int num_entries; -+}; -+ -+/* Arbitrarily chosen, 16 means that the maximum size we'll cache for reuse -+ * is 1 << 16 pages, or 256MB. -+ */ -+#define RADEON_GEM_BO_BUCKETS 16 -+ +typedef struct _dri_bufmgr_gem { + dri_bufmgr bufmgr; + struct radeon_bufmgr radeon_bufmgr; + int fd; + struct _dri_bo_gem *reloc_head; -+ -+ /** Array of lists of cached gem objects of power-of-two sizes */ -+ struct dri_gem_bo_bucket cache_bucket[RADEON_GEM_BO_BUCKETS]; +} dri_bufmgr_gem; + -+static int -+logbase2(int n) -+{ -+ int i = 1; -+ int log2 = 0; -+ -+ while (n > i) { -+ i *= 2; -+ log2++; -+ } -+ -+ return log2; -+} -+ -+static struct dri_gem_bo_bucket * -+dri_gem_bo_bucket_for_size(dri_bufmgr_gem *bufmgr_gem, unsigned long size) -+{ -+ int i; -+ -+ /* We only do buckets in power of two increments */ -+ if ((size & (size - 1)) != 0) -+ return NULL; -+ -+ /* We should only see sizes rounded to pages. */ -+ assert((size % 4096) == 0); -+ -+ /* We always allocate in units of pages */ -+ i = ffs(size / 4096) - 1; -+ if (i >= RADEON_GEM_BO_BUCKETS) -+ return NULL; -+ -+ return &bufmgr_gem->cache_bucket[i]; -+} -+ -+ +static dri_bo * +dri_gem_bo_alloc(dri_bufmgr *bufmgr, const char *name, + unsigned long size, unsigned int alignment, uint64_t location_mask) @@ -2449,64 +2405,24 @@ index 0000000..10cd2a0 + int ret; + unsigned int page_size = getpagesize(); + dri_bo_gem *gem_bo; -+ struct dri_gem_bo_bucket *bucket; -+ int alloc_from_cache = 0; -+ unsigned long bo_size; -+ -+ /* Round the allocated size up to a power of two number of pages. */ -+ bo_size = 1 << logbase2(size); -+ if (bo_size < page_size) -+ bo_size = page_size; -+ bucket = dri_gem_bo_bucket_for_size(bufmgr_gem, bo_size); -+ -+ /* If we don't have caching at this size, don't actually round the -+ * allocation up. -+ */ -+ if (bucket == NULL || bucket->max_entries == 0) { -+ bo_size = size; -+ if (bo_size < page_size) -+ bo_size = page_size; -+ } -+ -+ /* Get a buffer out of the cache if available */ -+ if (bucket != NULL && bucket->num_entries > 0) { -+ struct drm_radeon_gem_set_domain args; -+ -+ gem_bo = bucket->head; -+ args.handle = gem_bo->gem_handle; -+ args.read_domains = RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM; -+ args.write_domain = 0; -+ ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_RADEON_GEM_SET_DOMAIN, &args); -+ alloc_from_cache = (ret == 0); -+ -+ if (alloc_from_cache) { -+ bucket->head = gem_bo->next; -+ if (gem_bo->next == NULL) -+ bucket->tail = &bucket->head; -+ bucket->num_entries--; -+ } -+ } -+ -+ if (!alloc_from_cache) { + -+ gem_bo = calloc(1, sizeof(*gem_bo)); -+ if (!gem_bo) -+ return NULL; ++ gem_bo = calloc(1, sizeof(*gem_bo)); ++ if (!gem_bo) ++ return NULL; + -+ gem_bo->bo.size = bo_size; -+ args.size = bo_size; -+ args.alignment = alignment; -+ args.initial_domain = RADEON_GEM_DOMAIN_CPU; -+ args.no_backing_store = 0; ++ gem_bo->bo.size = size; ++ args.size = size; ++ args.alignment = alignment; ++ args.initial_domain = RADEON_GEM_DOMAIN_CPU; ++ args.no_backing_store = 0; + -+ ret = drmCommandWriteRead(bufmgr_gem->fd, DRM_RADEON_GEM_CREATE, &args, sizeof(args)); -+ gem_bo->gem_handle = args.handle; -+ if (ret != 0) { -+ free(gem_bo); -+ return NULL; -+ } -+ gem_bo->bo.bufmgr = bufmgr; ++ ret = drmCommandWriteRead(bufmgr_gem->fd, DRM_RADEON_GEM_CREATE, &args, sizeof(args)); ++ gem_bo->gem_handle = args.handle; ++ if (ret != 0) { ++ free(gem_bo); ++ return NULL; + } ++ gem_bo->bo.bufmgr = bufmgr; + + gem_bo->refcount = 1; + gem_bo->reloc_count = 0; @@ -2514,8 +2430,8 @@ index 0000000..10cd2a0 + gem_bo->in_vram = 0; + gem_bo->name = name; + -+ DBG("bo_create: buf %d (%s) %ldb: %d\n", -+ gem_bo->gem_handle, gem_bo->name, size, alloc_from_cache); ++ DBG("bo_create: buf %d (%s) %ldb\n", ++ gem_bo->gem_handle, gem_bo->name, size); + + return &gem_bo->bo; +} @@ -2552,31 +2468,9 @@ index 0000000..10cd2a0 + return; + + if (--gem_bo->refcount == 0) { -+ struct dri_gem_bo_bucket *bucket; -+ -+ -+ bucket = dri_gem_bo_bucket_for_size(bufmgr_gem, bo->size); -+ /* Put the buffer into our internal cache for reuse if we can. */ -+ if ((gem_bo->in_vram == 0) && (bucket != NULL && -+ (bucket->max_entries == -1 || -+ (bucket->max_entries > 0 && -+ bucket->num_entries < bucket->max_entries)))) -+ { -+ DBG("bo_unreference final: %d (%s) 1\n", -+ gem_bo->gem_handle, gem_bo->name); -+ -+ gem_bo->name = 0; -+ -+ gem_bo->next = NULL; -+ *bucket->tail = gem_bo; -+ bucket->tail = &gem_bo->next; -+ bucket->num_entries++; -+ } else { -+ DBG("bo_unreference final: %d (%s) 0 - free %d\n", -+ gem_bo->gem_handle, gem_bo->name, gem_bo->in_vram); -+ dri_gem_bo_free(bo); -+ } -+ ++ DBG("bo_unreference final: %d (%s) 0 - free %d\n", ++ gem_bo->gem_handle, gem_bo->name, gem_bo->in_vram); ++ dri_gem_bo_free(bo); + return; + } +} @@ -2623,20 +2517,6 @@ index 0000000..10cd2a0 + dri_bufmgr_gem *bufmgr_gem = (dri_bufmgr_gem *)bufmgr; + int i; + -+ /* Free any cached buffer objects we were going to reuse */ -+ for (i = 0; i < RADEON_GEM_BO_BUCKETS; i++) { -+ struct dri_gem_bo_bucket *bucket = &bufmgr_gem->cache_bucket[i]; -+ dri_bo_gem *bo_gem; -+ -+ while ((bo_gem = bucket->head) != NULL) { -+ bucket->head = bo_gem->next; -+ if (bo_gem->next == NULL) -+ bucket->tail = &bucket->head; -+ bucket->num_entries--; -+ -+ dri_gem_bo_free(&bo_gem->bo); -+ } -+ } + free(bufmgr); +} + @@ -2744,24 +2624,6 @@ index 0000000..10cd2a0 + *count_p = __count; +} + -+/** -+ * Enables unlimited caching of buffer objects for reuse. -+ * -+ * This is potentially very memory expensive, as the cache at each bucket -+ * size is only bounded by how many buffers of that size we've managed to have -+ * in flight at once. -+ */ -+void -+radeon_bufmgr_gem_enable_reuse(dri_bufmgr *bufmgr) -+{ -+ dri_bufmgr_gem *bufmgr_gem = (dri_bufmgr_gem *)bufmgr; -+ int i; -+ -+ for (i = 0; i < RADEON_GEM_BO_BUCKETS; i++) { -+ bufmgr_gem->cache_bucket[i].max_entries = -1; -+ } -+} -+ +static int radeon_gem_bufmgr_pin(dri_bo *bo, int domain) +{ + dri_bufmgr_gem *bufmgr_gem = (dri_bufmgr_gem *)bo->bufmgr; @@ -2828,9 +2690,6 @@ index 0000000..10cd2a0 + //bufmgr_gem->bufmgr.bo_wait_rendering = radeon_bufmgr_gem_wait_rendering; + bufmgr_gem->radeon_bufmgr.emit_reloc = radeon_bufmgr_gem_emit_reloc; + bufmgr_gem->bufmgr.get_handle = radeon_gem_bufmgr_get_handle; -+ /* Initialize the linked lists for BO reuse cache. */ -+ for (i = 0; i < RADEON_GEM_BO_BUCKETS; i++) -+ bufmgr_gem->cache_bucket[i].tail = &bufmgr_gem->cache_bucket[i].head; + bufmgr_gem->bufmgr.debug = 0; + return &bufmgr_gem->bufmgr; +} @@ -4173,7 +4032,7 @@ index 0000000..a2b8a4f + +#endif diff --git a/src/radeon_driver.c b/src/radeon_driver.c -index c759bd6..239eb63 100644 +index c759bd6..46fa59a 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -224,7 +224,10 @@ radeonShadowWindow(ScreenPtr screen, CARD32 row, CARD32 offset, int mode, @@ -4760,14 +4619,19 @@ index c759bd6..239eb63 100644 + } + + ErrorF("after xf86InitialConfiguration\n"); -+ + +- ErrorF("before xf86InitialConfiguration\n"); + } else { +#ifdef XF86DRM_MODE + char *bus_id; + if (!radeon_alloc_dri(pScrn)) + return FALSE; -- ErrorF("before xf86InitialConfiguration\n"); +- if (!xf86InitialConfiguration (pScrn, FALSE)) +- { +- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes.\n"); +- goto fail; +- } + bus_id = DRICreatePCIBusID(info->PciInfo); + if (drmmode_pre_init(pScrn, &info->drmmode, bus_id, "radeon", pScrn->bitsPerPixel / 8) == FALSE) { + xfree(bus_id); @@ -4775,11 +4639,7 @@ index c759bd6..239eb63 100644 + goto fail; + } -- if (!xf86InitialConfiguration (pScrn, FALSE)) -- { -- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes.\n"); -- goto fail; -- } +- ErrorF("after xf86InitialConfiguration\n"); + info->drmmode.create_new_fb = radeon_create_new_fb; + info->dri->drmFD = info->drmmode.fd; + xfree(bus_id); @@ -4799,8 +4659,7 @@ index c759bd6..239eb63 100644 + { + struct drm_radeon_getparam gp; + int value; - -- ErrorF("after xf86InitialConfiguration\n"); ++ + memset(&gp, 0, sizeof(gp)); + gp.param = RADEON_PARAM_FB_LOCATION; + gp.value = &value; @@ -5123,7 +4982,55 @@ index c759bd6..239eb63 100644 /* set the modes with desired rotation, etc. */ if (!xf86SetDesiredModes (pScrn)) -@@ -5375,6 +5542,11 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags) +@@ -5133,7 +5300,7 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) + #ifdef XF86DRI + Bool CPStarted = info->cp->CPStarted; + +- if (CPStarted) { ++ if (CPStarted && !info->drm_mode_setting) { + DRILock(pScrn->pScreen, 0); + RADEONCP_STOP(pScrn, info); + } +@@ -5156,8 +5323,10 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) + #endif + } + +- if (info->accelOn) +- RADEON_SYNC(info, pScrn); ++ if (!info->drm_mode_setting) { ++ if (info->accelOn) ++ RADEON_SYNC(info, pScrn); ++ } + + ret = xf86SetSingleMode (pScrn, mode, RR_Rotate_0); + +@@ -5169,15 +5338,18 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) + /* xf86SetRootClip would do, but can't access that here */ + } + +- if (info->accelOn) { +- RADEON_SYNC(info, pScrn); +- RADEONEngineRestore(pScrn); +- } ++ if (!info->drm_mode_setting) ++ if (info->accelOn) { ++ RADEON_SYNC(info, pScrn); ++ RADEONEngineRestore(pScrn); ++ } + + #ifdef XF86DRI +- if (CPStarted) { +- RADEONCP_START(pScrn, info); +- DRIUnlock(pScrn->pScreen); ++ if (!info->drm_mode_setting) { ++ if (CPStarted) { ++ RADEONCP_START(pScrn, info); ++ DRIUnlock(pScrn->pScreen); ++ } + } + #endif + +@@ -5375,6 +5547,11 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags) xf86OutputPtr output = config->output[config->compat_output]; xf86CrtcPtr crtc = output->crtc; @@ -5135,7 +5042,7 @@ index c759bd6..239eb63 100644 #ifdef XF86DRI if (info->cp->CPStarted && pScrn->pScreen) DRILock(pScrn->pScreen, 0); #endif -@@ -5410,67 +5582,79 @@ Bool RADEONEnterVT(int scrnIndex, int flags) +@@ -5410,67 +5587,79 @@ Bool RADEONEnterVT(int scrnIndex, int flags) xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONEnterVT\n"); @@ -5260,7 +5167,7 @@ index c759bd6..239eb63 100644 } #endif /* this will get XVideo going again, but only if XVideo was initialised -@@ -5482,7 +5666,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags) +@@ -5482,7 +5671,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags) RADEONEngineRestore(pScrn); #ifdef XF86DRI @@ -5269,7 +5176,7 @@ index c759bd6..239eb63 100644 RADEONCP_START(pScrn, info); DRIUnlock(pScrn->pScreen); } -@@ -5505,17 +5689,18 @@ void RADEONLeaveVT(int scrnIndex, int flags) +@@ -5505,17 +5694,18 @@ void RADEONLeaveVT(int scrnIndex, int flags) "RADEONLeaveVT\n"); #ifdef XF86DRI if (RADEONPTR(pScrn)->directRenderingInited) { @@ -5299,7 +5206,7 @@ index c759bd6..239eb63 100644 /* Make sure 3D clients will re-upload textures to video RAM */ if (info->dri->textureSize) { -@@ -5551,10 +5736,15 @@ void RADEONLeaveVT(int scrnIndex, int flags) +@@ -5551,10 +5741,15 @@ void RADEONLeaveVT(int scrnIndex, int flags) xf86_hide_cursors (pScrn); @@ -5318,7 +5225,7 @@ index c759bd6..239eb63 100644 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Ok, leaving now...\n"); -@@ -5599,7 +5789,8 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen) +@@ -5599,7 +5794,8 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen) #endif /* USE_XAA */ if (pScrn->vtSema) { @@ -5328,7 +5235,7 @@ index c759bd6..239eb63 100644 } xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, -@@ -5634,6 +5825,12 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen) +@@ -5634,6 +5830,12 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen) info->DGAModes = NULL; xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Unmapping memory\n"); diff --git a/xorg-x11-drv-ati.spec b/xorg-x11-drv-ati.spec index b542d15..18ad231 100644 --- a/xorg-x11-drv-ati.spec +++ b/xorg-x11-drv-ati.spec @@ -5,7 +5,7 @@ Summary: Xorg X11 ati video driver Name: xorg-x11-drv-ati Version: 6.9.0 -Release: 25%{?dist} +Release: 26%{?dist} URL: http://www.x.org License: MIT Group: User Interface/X Hardware Support @@ -72,6 +72,9 @@ rm -rf $RPM_BUILD_ROOT %{_mandir}/man4/radeon.4* %changelog +* Mon Oct 13 2008 Dave Airlie 6.9.0-26 +- radeon-modeset.patch - fix nexuiz mode switch - remove unused reuse code + * Fri Oct 10 2008 Dave Airlie 6.9.0-25 - fix rotation - make output names compatible with non-kms