diff --git a/radeon-modeset.patch b/radeon-modeset.patch index bb9824a..ba8b54f 100644 --- a/radeon-modeset.patch +++ b/radeon-modeset.patch @@ -1,5 +1,5 @@ diff --git a/configure.ac b/configure.ac -index 3475f6a..727e2a0 100644 +index b094a50..29a19e3 100644 --- a/configure.ac +++ b/configure.ac @@ -114,8 +114,19 @@ if test "$DRI" = yes; then @@ -2403,7 +2403,7 @@ index 0000000..6d3b6fe +int radeon_bo_gem_name_buffer(dri_bo *bo, uint32_t *name); +#endif diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c -index a9bc7d2..6c22339 100644 +index eabd87d..8712a74 100644 --- a/src/radeon_commonfuncs.c +++ b/src/radeon_commonfuncs.c @@ -62,12 +62,15 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) @@ -2534,10 +2534,10 @@ index a9bc7d2..6c22339 100644 FLUSH_RING(); diff --git a/src/radeon_cursor.c b/src/radeon_cursor.c -index 0fcdcf0..49601cf 100644 +index 0fcdcf0..cbc188b 100644 --- a/src/radeon_cursor.c +++ b/src/radeon_cursor.c -@@ -96,12 +96,19 @@ avivo_setup_cursor(xf86CrtcPtr crtc, Bool enable) +@@ -96,12 +96,16 @@ avivo_setup_cursor(xf86CrtcPtr crtc, Bool enable) RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; RADEONInfoPtr info = RADEONPTR(crtc->scrn); unsigned char *RADEONMMIO = info->MMIO; @@ -2548,10 +2548,7 @@ index 0fcdcf0..49601cf 100644 if (enable) { + -+ if (info->drm_mm) -+ location = info->fbLocation + radeon_crtc->cursor->offset; -+ else -+ location = info->fbLocation + radeon_crtc->cursor_offset + pScrn->fbOffset; ++ location = info->fbLocation + radeon_crtc->cursor_offset + pScrn->fbOffset; + OUTREG(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, - info->fbLocation + radeon_crtc->cursor_offset + pScrn->fbOffset); @@ -2559,7 +2556,7 @@ index 0fcdcf0..49601cf 100644 OUTREG(AVIVO_D1CUR_SIZE + radeon_crtc->crtc_offset, ((CURSOR_WIDTH - 1) << 16) | (CURSOR_HEIGHT - 1)); OUTREG(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, -@@ -203,6 +210,7 @@ radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y) +@@ -203,6 +207,7 @@ radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y) int xorigin = 0, yorigin = 0; int stride = 256; DisplayModePtr mode = &crtc->mode; @@ -2567,35 +2564,29 @@ index 0fcdcf0..49601cf 100644 if (x < 0) xorigin = -x+1; if (y < 0) yorigin = -y+1; -@@ -233,8 +241,12 @@ radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y) +@@ -233,8 +238,9 @@ radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y) | (yorigin ? 0 : y))); RADEONCTRACE(("cursor_offset: 0x%x, yorigin: %d, stride: %d, temp %08X\n", radeon_crtc->cursor_offset + pScrn->fbOffset, yorigin, stride, temp)); -+ if (info->drm_mm) -+ offset = radeon_crtc->cursor->offset; -+ else -+ offset = radeon_crtc->cursor_offset + pScrn->fbOffset; ++ offset = radeon_crtc->cursor_offset + pScrn->fbOffset; OUTREG(RADEON_CUR_OFFSET, - radeon_crtc->cursor_offset + pScrn->fbOffset + yorigin * stride); + offset + yorigin * stride); } else if (crtc_id == 1) { OUTREG(RADEON_CUR2_HORZ_VERT_OFF, (RADEON_CUR2_LOCK | (xorigin << 16) -@@ -244,8 +256,12 @@ radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y) +@@ -244,8 +250,9 @@ radeon_crtc_set_cursor_position (xf86CrtcPtr crtc, int x, int y) | (yorigin ? 0 : y))); RADEONCTRACE(("cursor_offset2: 0x%x, yorigin: %d, stride: %d, temp %08X\n", radeon_crtc->cursor_offset + pScrn->fbOffset, yorigin, stride, temp)); -+ if (info->drm_mm) -+ offset = radeon_crtc->cursor->offset; -+ else -+ offset = radeon_crtc->cursor_offset + pScrn->fbOffset; ++ offset = radeon_crtc->cursor_offset + pScrn->fbOffset; OUTREG(RADEON_CUR2_OFFSET, - radeon_crtc->cursor_offset + pScrn->fbOffset + yorigin * stride); + offset + yorigin * stride); } } } -@@ -299,10 +315,15 @@ radeon_crtc_load_cursor_argb (xf86CrtcPtr crtc, CARD32 *image) +@@ -299,10 +306,12 @@ radeon_crtc_load_cursor_argb (xf86CrtcPtr crtc, CARD32 *image) RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; RADEONInfoPtr info = RADEONPTR(pScrn); CURSOR_SWAPPING_DECL_MMIO @@ -2604,23 +2595,11 @@ index 0fcdcf0..49601cf 100644 RADEONCTRACE(("RADEONLoadCursorARGB\n")); -+ if (info->drm_mm) -+ d = (uint32_t *)radeon_crtc->cursor->map; -+ else -+ d = (uint32_t *)(pointer)(info->FB + radeon_crtc->cursor_offset); ++ d = (uint32_t *)(pointer)(info->FB + radeon_crtc->cursor_offset); + info->cursor_argb = TRUE; CURSOR_SWAPPING_START(); -@@ -333,7 +354,7 @@ Bool RADEONCursorInit(ScreenPtr pScreen) - height = ((size_bytes * xf86_config->num_crtc) + width_bytes - 1) / width_bytes; - int align = IS_AVIVO_VARIANT ? 4096 : 256; - -- if (!info->useEXA) { -+ if (!info->useEXA && !info->drm_mm) { - for (c = 0; c < xf86_config->num_crtc; c++) { - xf86CrtcPtr crtc = xf86_config->crtc[c]; - RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; diff --git a/src/radeon_dri.c b/src/radeon_dri.c index 9c9fc7f..aa6352e 100644 --- a/src/radeon_dri.c @@ -4079,7 +4058,7 @@ index 0000000..a19d7ec + +#endif diff --git a/src/radeon_driver.c b/src/radeon_driver.c -index d1b2f54..052ed1f 100644 +index c0f5e7b..aa60074 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -67,7 +67,7 @@ @@ -4091,7 +4070,7 @@ index d1b2f54..052ed1f 100644 /* Driver data structures */ #include "radeon.h" #include "radeon_reg.h" -@@ -229,7 +229,10 @@ radeonShadowWindow(ScreenPtr screen, CARD32 row, CARD32 offset, int mode, +@@ -226,7 +226,10 @@ radeonShadowWindow(ScreenPtr screen, CARD32 row, CARD32 offset, int mode, stride = (pScrn->displayWidth * pScrn->bitsPerPixel) / 8; *size = stride; @@ -4103,7 +4082,7 @@ index d1b2f54..052ed1f 100644 } static Bool RADEONCreateScreenResources (ScreenPtr pScreen) -@@ -250,6 +253,13 @@ RADEONCreateScreenResources (ScreenPtr pScreen) +@@ -247,6 +250,13 @@ RADEONCreateScreenResources (ScreenPtr pScreen) radeonShadowWindow, 0, NULL)) return FALSE; } @@ -4117,7 +4096,7 @@ index d1b2f54..052ed1f 100644 return TRUE; } -@@ -1661,6 +1671,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) +@@ -1658,6 +1668,7 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn) } pScrn->videoRam &= ~1023; @@ -4125,13 +4104,13 @@ index d1b2f54..052ed1f 100644 info->FbMapSize = pScrn->videoRam * 1024; /* if the card is PCI Express reserve the last 32k for the gart table */ -@@ -1791,58 +1802,64 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) +@@ -1787,59 +1798,61 @@ static Bool RADEONPreInitChipType(ScrnInfoPtr pScrn) + "R500 support is under development. Please report any issues to xorg-driver-ati@lists.x.org\n"); } - from = X_PROBED; +- from = X_PROBED; - info->LinearAddr = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & ~0x1ffffffULL; -+ info->LinearAddr = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & ~0x1ffffffUL; - pScrn->memPhysBase = info->LinearAddr; +- pScrn->memPhysBase = info->LinearAddr; - if (dev->MemBase) { - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "Linear address override, using 0x%016lx instead of 0x%016llx\n", @@ -4146,23 +4125,9 @@ index d1b2f54..052ed1f 100644 - } - xf86DrvMsg(pScrn->scrnIndex, from, - "Linear framebuffer at 0x%016llx\n", info->LinearAddr); - --#ifndef XSERVER_LIBPCIACCESS -- /* BIOS */ -- from = X_PROBED; -- info->BIOSAddr = info->PciInfo->biosBase & 0xfffe0000; -- if (dev->BiosBase) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, -- "BIOS address override, using 0x%08lx instead of 0x%08lx\n", -- (unsigned long)dev->BiosBase, -- (unsigned long)info->BIOSAddr); -- info->BIOSAddr = dev->BiosBase; -- from = X_CONFIG; -- } -- if (info->BIOSAddr) { + if (!info->drm_mode_setting) { + from = X_PROBED; -+ info->LinearAddr = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & ~0x1ffffffUL; ++ info->LinearAddr = PCI_REGION_BASE(info->PciInfo, 0, REGION_MEM) & ~0x1ffffffULL; + pScrn->memPhysBase = info->LinearAddr; + if (dev->MemBase) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, @@ -4176,12 +4141,25 @@ index d1b2f54..052ed1f 100644 + "No valid linear framebuffer address\n"); + return FALSE; + } - xf86DrvMsg(pScrn->scrnIndex, from, ++ xf86DrvMsg(pScrn->scrnIndex, from, ++ "Linear framebuffer at 0x%016llx\n", info->LinearAddr); + + #ifndef XSERVER_LIBPCIACCESS +- /* BIOS */ +- from = X_PROBED; +- info->BIOSAddr = info->PciInfo->biosBase & 0xfffe0000; +- if (dev->BiosBase) { +- xf86DrvMsg(pScrn->scrnIndex, X_INFO, +- "BIOS address override, using 0x%08lx instead of 0x%08lx\n", +- (unsigned long)dev->BiosBase, +- (unsigned long)info->BIOSAddr); +- info->BIOSAddr = dev->BiosBase; +- from = X_CONFIG; +- } +- if (info->BIOSAddr) { +- xf86DrvMsg(pScrn->scrnIndex, from, - "BIOS at 0x%08lx\n", (unsigned long)info->BIOSAddr); - } -+ "Linear framebuffer at 0x%016llx\n", info->LinearAddr); -+ -+#ifndef XSERVER_LIBPCIACCESS + /* BIOS */ + from = X_PROBED; + info->BIOSAddr = info->PciInfo->biosBase & 0xfffe0000; @@ -4233,7 +4211,7 @@ index d1b2f54..052ed1f 100644 #ifdef XF86DRI /* AGP/PCI */ -@@ -2017,6 +2034,15 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) +@@ -2014,6 +2027,15 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) } info->accel_state->fifo_slots = 0; @@ -4249,7 +4227,7 @@ index d1b2f54..052ed1f 100644 if ((info->ChipFamily == CHIP_FAMILY_RS100) || (info->ChipFamily == CHIP_FAMILY_RS200) || (info->ChipFamily == CHIP_FAMILY_RS300) || -@@ -2041,6 +2067,9 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) +@@ -2038,6 +2060,9 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) if (!xf86ReturnOptValBool(info->Options, OPTION_NOACCEL, FALSE)) { int errmaj = 0, errmin = 0; @@ -4259,7 +4237,7 @@ index d1b2f54..052ed1f 100644 from = X_DEFAULT; #if defined(USE_EXA) #if defined(USE_XAA) -@@ -2051,6 +2080,7 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) +@@ -2048,6 +2073,7 @@ static Bool RADEONPreInitAccel(ScrnInfoPtr pScrn) info->useEXA = TRUE; } else if (xf86NameCmp(optstr, "XAA") == 0) { from = X_CONFIG; @@ -4267,7 +4245,7 @@ index d1b2f54..052ed1f 100644 } } #else /* USE_XAA */ -@@ -2155,15 +2185,9 @@ static Bool RADEONPreInitInt10(ScrnInfoPtr pScrn, xf86Int10InfoPtr *ppInt10) +@@ -2151,15 +2177,9 @@ static Bool RADEONPreInitInt10(ScrnInfoPtr pScrn, xf86Int10InfoPtr *ppInt10) return TRUE; } @@ -4284,7 +4262,7 @@ index d1b2f54..052ed1f 100644 if (!(info->dri = xcalloc(1, sizeof(struct radeon_dri)))) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Unable to allocate dri rec!\n"); -@@ -2174,6 +2198,22 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) +@@ -2170,6 +2190,22 @@ static Bool RADEONPreInitDRI(ScrnInfoPtr pScrn) xf86DrvMsg(pScrn->scrnIndex, X_ERROR,"Unable to allocate cp rec!\n"); return FALSE; } @@ -4307,7 +4285,7 @@ index d1b2f54..052ed1f 100644 info->cp->CPInUse = FALSE; info->cp->CPStarted = FALSE; info->cp->CPusecTimeout = RADEON_DEFAULT_CP_TIMEOUT; -@@ -2731,6 +2771,37 @@ static const xf86CrtcConfigFuncsRec RADEONCRTCResizeFuncs = { +@@ -2727,6 +2763,37 @@ static const xf86CrtcConfigFuncsRec RADEONCRTCResizeFuncs = { RADEONCRTCResize }; @@ -4345,7 +4323,7 @@ index d1b2f54..052ed1f 100644 Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) { xf86CrtcConfigPtr xf86_config; -@@ -2751,6 +2822,8 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -2747,6 +2814,8 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) info = RADEONPTR(pScrn); info->MMIO = NULL; @@ -4354,7 +4332,7 @@ index d1b2f54..052ed1f 100644 info->IsSecondary = FALSE; info->IsPrimary = FALSE; -@@ -2785,62 +2858,63 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -2781,62 +2850,63 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) } info->PciInfo = xf86GetPciInfoForEntity(info->pEnt->index); @@ -4465,7 +4443,7 @@ index d1b2f54..052ed1f 100644 if (xf86RegisterResources(info->pEnt->index, 0, ResExclusive)) goto fail; -@@ -2850,10 +2924,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -2846,10 +2916,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) pScrn->racMemFlags = RAC_FB | RAC_COLORMAP | RAC_VIEWPORT | RAC_CURSOR; pScrn->monitor = pScrn->confScreen->monitor; @@ -4482,7 +4460,7 @@ index d1b2f54..052ed1f 100644 if (!RADEONPreInitVisual(pScrn)) goto fail; -@@ -2867,167 +2943,227 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -2863,164 +2935,224 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) memcpy(info->Options, RADEONOptions, sizeof(RADEONOptions)); xf86ProcessOptions(pScrn->scrnIndex, pScrn->options, info->Options); @@ -4583,11 +4561,6 @@ index d1b2f54..052ed1f 100644 + + RADEONPostInt10Check(pScrn, int10_save); -- /* Save BIOS scratch registers */ -- RADEONSaveBIOSRegisters(pScrn, info->SavedReg); -+ /* Save BIOS scratch registers */ -+ RADEONSaveBIOSRegisters(pScrn, info->SavedReg); - + if (!RADEONPreInitBIOS(pScrn, pInt10)) + goto fail; #ifdef XF86DRI @@ -4777,9 +4750,7 @@ index d1b2f54..052ed1f 100644 + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Kernel modesetting setup failed\n"); + goto fail; + } - -- for (i = 0; i < xf86_config->num_output; i++) { -- xf86OutputPtr output = xf86_config->output[i]; ++ + info->dri->drmFD = info->drmmode.fd; + info->dri2.drm_fd = info->drmmode.fd; + info->dri2.enabled = FALSE; @@ -4800,7 +4771,9 @@ index d1b2f54..052ed1f 100644 + { + struct drm_radeon_getparam gp; + int value; -+ + +- for (i = 0; i < xf86_config->num_output; i++) { +- xf86OutputPtr output = xf86_config->output[i]; + memset(&gp, 0, sizeof(gp)); + gp.param = RADEON_PARAM_FB_LOCATION; + gp.value = &value; @@ -4839,7 +4812,7 @@ index d1b2f54..052ed1f 100644 /* Get ScreenInit function */ if (!xf86LoadSubModule(pScrn, "fb")) return FALSE; -@@ -3042,10 +3178,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) +@@ -3035,10 +3167,12 @@ Bool RADEONPreInit(ScrnInfoPtr pScrn, int flags) if (!RADEONPreInitXv(pScrn)) goto fail; } @@ -4856,7 +4829,7 @@ index d1b2f54..052ed1f 100644 } if (pScrn->modes == NULL) { -@@ -3198,6 +3336,9 @@ static void RADEONBlockHandler(int i, pointer blockData, +@@ -3191,6 +3325,9 @@ static void RADEONBlockHandler(int i, pointer blockData, #ifdef USE_EXA info->accel_state->engineMode = EXA_ENGINEMODE_UNKNOWN; @@ -4866,7 +4839,7 @@ index d1b2f54..052ed1f 100644 #endif } -@@ -3286,7 +3427,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3279,7 +3416,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, int subPixelOrder = SubPixelUnknown; char* s; #endif @@ -4875,7 +4848,7 @@ index d1b2f54..052ed1f 100644 info->accelOn = FALSE; #ifdef USE_XAA -@@ -3306,58 +3447,61 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3299,58 +3436,61 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, "RADEONScreenInit %lx %ld\n", pScrn->memPhysBase, pScrn->fbOffset); #endif @@ -4976,7 +4949,7 @@ index d1b2f54..052ed1f 100644 /* Visual setup */ miClearVisualTypes(); if (!miSetVisualTypes(pScrn->depth, -@@ -3391,19 +3535,21 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3384,19 +3524,21 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, hasDRI = info->directRenderingEnabled; #endif /* XF86DRI */ @@ -5010,7 +4983,7 @@ index d1b2f54..052ed1f 100644 } } -@@ -3440,7 +3586,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3433,7 +3575,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, #ifdef XF86DRI if (hasDRI) { info->accelDFS = xf86ReturnOptValBool(info->Options, OPTION_ACCEL_DFS, @@ -5022,7 +4995,7 @@ index d1b2f54..052ed1f 100644 /* Reserve approx. half of offscreen memory for local textures by * default, can be overridden with Option "FBTexPercent". -@@ -3466,7 +3615,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3459,7 +3604,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, #endif #if defined(XF86DRI) && defined(USE_XAA) @@ -5031,7 +5004,7 @@ index d1b2f54..052ed1f 100644 info->dri->textureSize = -1; if (xf86GetOptValInteger(info->Options, OPTION_FBTEX_PERCENT, &(info->dri->textureSize))) { -@@ -3484,7 +3633,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3477,7 +3622,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, #endif #ifdef USE_XAA @@ -5040,7 +5013,7 @@ index d1b2f54..052ed1f 100644 return FALSE; #endif -@@ -3505,7 +3654,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3498,7 +3643,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, info->CurrentLayout.pixel_bytes); int maxy = info->FbMapSize / width_bytes; @@ -5049,7 +5022,7 @@ index d1b2f54..052ed1f 100644 xf86DrvMsg(scrnIndex, X_ERROR, "Static buffer allocation failed. Disabling DRI.\n"); xf86DrvMsg(scrnIndex, X_ERROR, -@@ -3515,19 +3664,54 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3508,19 +3653,54 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, info->CurrentLayout.pixel_bytes * 3 + 1023) / 1024); info->directRenderingEnabled = FALSE; } else { @@ -5108,7 +5081,7 @@ index d1b2f54..052ed1f 100644 #endif xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Initializing fb layer\n"); -@@ -3551,7 +3735,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3544,7 +3724,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, if (info->r600_shadow_fb == FALSE) { /* Init fb layer */ @@ -5117,7 +5090,7 @@ index d1b2f54..052ed1f 100644 pScrn->virtualX, pScrn->virtualY, pScrn->xDpi, pScrn->yDpi, pScrn->displayWidth, pScrn->bitsPerPixel)) -@@ -3593,8 +3777,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3586,8 +3766,10 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, /* restore the memory map here otherwise we may get a hang when * initializing the drm below */ @@ -5130,7 +5103,7 @@ index d1b2f54..052ed1f 100644 /* Backing store setup */ xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, -@@ -3604,7 +3790,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3597,7 +3779,7 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, /* DRI finalisation */ #ifdef XF86DRI @@ -5139,7 +5112,7 @@ index d1b2f54..052ed1f 100644 info->dri->pKernelDRMVersion->version_minor >= 19) { if (RADEONDRISetParam(pScrn, RADEON_SETPARAM_PCIGART_LOCATION, info->dri->pciGartOffset) < 0) -@@ -3620,14 +3806,24 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3613,14 +3795,24 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, if (info->directRenderingEnabled) { xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "DRI Finishing init !\n"); @@ -5165,7 +5138,7 @@ index d1b2f54..052ed1f 100644 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n"); -@@ -3723,10 +3919,16 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, +@@ -3716,10 +3908,16 @@ Bool RADEONScreenInit(int scrnIndex, ScreenPtr pScreen, return FALSE; } } @@ -5183,7 +5156,7 @@ index d1b2f54..052ed1f 100644 /* Provide SaveScreen & wrap BlockHandler and CloseScreen */ /* Wrap CloseScreen */ -@@ -5303,7 +5505,7 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) +@@ -5296,7 +5494,7 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) #ifdef XF86DRI Bool CPStarted = info->cp->CPStarted; @@ -5192,7 +5165,7 @@ index d1b2f54..052ed1f 100644 DRILock(pScrn->pScreen, 0); RADEONCP_STOP(pScrn, info); } -@@ -5326,8 +5528,10 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) +@@ -5319,8 +5517,10 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) #endif } @@ -5205,7 +5178,7 @@ index d1b2f54..052ed1f 100644 ret = xf86SetSingleMode (pScrn, mode, RR_Rotate_0); -@@ -5339,16 +5543,19 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) +@@ -5332,16 +5532,19 @@ Bool RADEONSwitchMode(int scrnIndex, DisplayModePtr mode, int flags) /* xf86SetRootClip would do, but can't access that here */ } @@ -5233,7 +5206,7 @@ index d1b2f54..052ed1f 100644 } #endif -@@ -5546,6 +5753,11 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags) +@@ -5539,6 +5742,11 @@ void RADEONAdjustFrame(int scrnIndex, int x, int y, int flags) xf86OutputPtr output = config->output[config->compat_output]; xf86CrtcPtr crtc = output->crtc; @@ -5245,7 +5218,7 @@ index d1b2f54..052ed1f 100644 /* not handled */ if (IS_AVIVO_VARIANT) return; -@@ -5585,76 +5797,103 @@ Bool RADEONEnterVT(int scrnIndex, int flags) +@@ -5578,76 +5786,101 @@ Bool RADEONEnterVT(int scrnIndex, int flags) xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONEnterVT\n"); @@ -5312,13 +5285,12 @@ index d1b2f54..052ed1f 100644 - if (xf86ReturnOptValBool(info->Options, OPTION_DYNAMIC_CLOCKS, FALSE)) { - atombios_static_pwrmgt_setup(pScrn, 1); - atombios_dyn_clk_setup(pScrn, 1); +- } + } else { + int ret; -+ if (info->drm_mode_setting) { -+ ret = ioctl(info->dri->drmFD, DRM_IOCTL_SET_MASTER, NULL); -+ if (ret == -EINVAL) -+ ErrorF("Unable to retrieve master\n"); - } ++ ret = ioctl(info->dri->drmFD, DRM_IOCTL_SET_MASTER, NULL); ++ if (ret == -EINVAL) ++ ErrorF("Unable to retrieve master\n"); } - if (IS_R300_VARIANT || IS_RV100_VARIANT) @@ -5398,7 +5370,7 @@ index d1b2f54..052ed1f 100644 } #endif /* this will get XVideo going again, but only if XVideo was initialised -@@ -5669,7 +5908,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags) +@@ -5662,7 +5895,7 @@ Bool RADEONEnterVT(int scrnIndex, int flags) info->accel_state->XInited3D = FALSE; #ifdef XF86DRI @@ -5407,10 +5379,11 @@ index d1b2f54..052ed1f 100644 if (info->ChipFamily >= CHIP_FAMILY_R600) R600LoadShaders(pScrn); RADEONCP_START(pScrn, info); -@@ -5694,26 +5933,28 @@ void RADEONLeaveVT(int scrnIndex, int flags) +@@ -5686,27 +5919,29 @@ void RADEONLeaveVT(int scrnIndex, int flags) + xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "RADEONLeaveVT\n"); #ifdef XF86DRI - if (RADEONPTR(pScrn)->directRenderingInited) { +- if (RADEONPTR(pScrn)->directRenderingInited) { - - RADEONDRISetVBlankInterrupt (pScrn, FALSE); - DRILock(pScrn->pScreen, 0); @@ -5419,6 +5392,7 @@ index d1b2f54..052ed1f 100644 - if (info->cardType == CARD_PCIE && - info->dri->pKernelDRMVersion->version_minor >= 19 && - info->FbSecureSize) { ++ if (info->directRenderingInited || info->dri2.enabled) { + if (!info->drm_mode_setting) { + RADEONDRISetVBlankInterrupt (pScrn, FALSE); + DRILock(pScrn->pScreen, 0); @@ -5451,7 +5425,7 @@ index d1b2f54..052ed1f 100644 /* Make sure 3D clients will re-upload textures to video RAM */ if (info->dri->textureSize) { -@@ -5729,6 +5970,11 @@ void RADEONLeaveVT(int scrnIndex, int flags) +@@ -5722,6 +5957,11 @@ void RADEONLeaveVT(int scrnIndex, int flags) i = list[i].next; } while (i != 0); } @@ -5463,7 +5437,7 @@ index d1b2f54..052ed1f 100644 } #endif -@@ -5755,10 +6001,18 @@ void RADEONLeaveVT(int scrnIndex, int flags) +@@ -5748,10 +5988,18 @@ void RADEONLeaveVT(int scrnIndex, int flags) xf86_hide_cursors (pScrn); @@ -5485,7 +5459,7 @@ index d1b2f54..052ed1f 100644 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Ok, leaving now...\n"); -@@ -5812,7 +6066,8 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen) +@@ -5805,7 +6053,8 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen) #endif /* USE_XAA */ if (pScrn->vtSema) { @@ -5495,7 +5469,7 @@ index d1b2f54..052ed1f 100644 } xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, -@@ -5847,6 +6102,12 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen) +@@ -5840,6 +6089,12 @@ static Bool RADEONCloseScreen(int scrnIndex, ScreenPtr pScreen) info->DGAModes = NULL; xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, RADEON_LOGLEVEL_DEBUG, "Unmapping memory\n"); @@ -6377,7 +6351,7 @@ index ae68146..d98b654 100644 } #endif diff --git a/src/radeon_exa_funcs.c b/src/radeon_exa_funcs.c -index 59cb46f..7172cc2 100644 +index 59cb46f..8d6f085 100644 --- a/src/radeon_exa_funcs.c +++ b/src/radeon_exa_funcs.c @@ -74,21 +74,73 @@ FUNC_NAME(RADEONSync)(ScreenPtr pScreen, int marker) @@ -6661,14 +6635,7 @@ index 59cb46f..7172cc2 100644 BEGIN_ACCEL(2); OUT_ACCEL_REG(RADEON_DSTCACHE_CTLSTAT, RADEON_RB2D_DC_FLUSH_ALL); OUT_ACCEL_REG(RADEON_WAIT_UNTIL, -@@ -261,12 +392,15 @@ FUNC_NAME(RADEONDoneCopy)(PixmapPtr pDst) - - #ifdef ACCEL_CP - -+#if 0 - static Bool - RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h, - char *src, int src_pitch) +@@ -267,17 +398,27 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h, { RINFO_FROM_SCREEN(pDst->drawable.pScreen); unsigned int bpp = pDst->drawable.bitsPerPixel; @@ -6677,60 +6644,36 @@ index 59cb46f..7172cc2 100644 unsigned int hpass; uint32_t buf_pitch, dst_pitch_off; -@@ -275,9 +409,45 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h, + TRACE; + ++ if (info->new_cs) ++ return FALSE; ++ if (bpp < 8) return FALSE; - if (info->directRenderingEnabled && - RADEONGetPixmapOffsetPitch(pDst, &dst_pitch_off)) { - uint8_t *buf; -+ if (info->new_cs){ -+ -+ if (info->drm_mm) { -+ uint32_t offset, bo_width, bo_height = h; -+ -+ driver_priv = exaGetPixmapDriverPrivate(pDst); -+ if (!driver_priv) -+ return FALSE; -+ -+ -+ if (radeon_bufmgr_gem_has_references(driver_priv->bo)) -+ RADEONCPFlushIndirect(pScrn, 0); -+ -+ radeon_bufmgr_gem_wait_rendering(driver_priv->bo); -+ -+ /* use pwrites - maybe require some sort of fallback */ -+ bo_width = w * (bpp / 8); -+ offset = (x * bpp / 8) + (y * dst_pitch); -+ -+ while (bo_height--) { -+ dri_bo_subdata(driver_priv->bo, offset, bo_width, -+ src); -+ -+ src += src_pitch; -+ offset += dst_pitch; -+ } -+ -+ return TRUE; -+ } -+ } + if (!info->directRenderingEnabled && !info->drm_mode_setting) + goto fallback; + + if (!RADEONGetPixmapOffsetPitch(pDst, &dst_pitch_off)) + goto fallback; + -+ if (!info->new_cs) + { + uint8_t *buf; int cpp = bpp / 8; ACCEL_PREAMBLE(); -@@ -300,17 +470,24 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h, - +@@ -297,20 +438,26 @@ RADEONUploadToScreenCP(PixmapPtr pDst, int x, int y, int w, int h, + exaMarkSync(pDst->drawable.pScreen); + return TRUE; + } +- ++fallback: return FALSE; } -+#endif /* Emit blit with arbitrary source and destination offsets and pitches */ static void @@ -6753,7 +6696,7 @@ index 59cb46f..7172cc2 100644 OUT_ACCEL_REG(RADEON_DP_GUI_MASTER_CNTL, RADEON_GMC_DST_PITCH_OFFSET_CNTL | RADEON_GMC_SRC_PITCH_OFFSET_CNTL | -@@ -321,8 +498,14 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset, +@@ -321,8 +468,14 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset, RADEON_DP_SRC_SOURCE_MEMORY | RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS); @@ -6768,7 +6711,7 @@ index 59cb46f..7172cc2 100644 OUT_ACCEL_REG(RADEON_SRC_Y_X, (srcY << 16) | srcX); OUT_ACCEL_REG(RADEON_DST_Y_X, (dstY << 16) | dstX); OUT_ACCEL_REG(RADEON_DST_HEIGHT_WIDTH, (h << 16) | w); -@@ -334,6 +517,173 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset, +@@ -334,6 +487,173 @@ RADEONBlitChunk(ScrnInfoPtr pScrn, uint32_t datatype, uint32_t src_pitch_offset, FINISH_ACCEL(); } @@ -6942,7 +6885,7 @@ index 59cb46f..7172cc2 100644 static Bool RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h, -@@ -347,12 +697,17 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h, +@@ -347,12 +667,17 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h, TRACE; @@ -6961,7 +6904,7 @@ index 59cb46f..7172cc2 100644 RADEONGetPixmapOffsetPitch(pSrc, &src_pitch_offset) && (scratch = RADEONCPGetBuffer(pScrn))) { -@@ -367,7 +722,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h, +@@ -367,7 +692,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h, RADEON_SWITCH_TO_2D(); /* Kick the first blit as early as possible */ @@ -6971,7 +6914,7 @@ index 59cb46f..7172cc2 100644 x, y, 0, 0, w, hpass); FLUSH_RING(); -@@ -394,7 +750,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h, +@@ -394,7 +720,8 @@ RADEONDownloadFromScreenCP(PixmapPtr pSrc, int x, int y, int w, int h, /* Prepare next blit if anything's left */ if (hpass) { scratch_off = scratch->total/2 - scratch_off; @@ -6981,13 +6924,7 @@ index 59cb46f..7172cc2 100644 x, y, 0, 0, w, hpass); } -@@ -468,15 +825,13 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) - info->accel_state->exa->MarkSync = FUNC_NAME(RADEONMarkSync); - info->accel_state->exa->WaitMarker = FUNC_NAME(RADEONSync); - #ifdef ACCEL_CP -- info->accel_state->exa->UploadToScreen = RADEONUploadToScreenCP; -+ // info->accel_state->exa->UploadToScreen = RADEONUploadToScreenCP; - if (info->accelDFS) +@@ -473,10 +800,8 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) info->accel_state->exa->DownloadFromScreen = RADEONDownloadFromScreenCP; #endif @@ -6998,7 +6935,7 @@ index 59cb46f..7172cc2 100644 info->accel_state->exa->flags = EXA_OFFSCREEN_PIXMAPS; #ifdef EXA_SUPPORTS_PREPARE_AUX -@@ -485,6 +840,11 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) +@@ -485,6 +810,11 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) info->accel_state->exa->pixmapOffsetAlign = RADEON_BUFFER_ALIGN + 1; info->accel_state->exa->pixmapPitchAlign = 64; @@ -7010,7 +6947,7 @@ index 59cb46f..7172cc2 100644 #ifdef RENDER if (info->RenderAccel) { if (info->ChipFamily >= CHIP_FAMILY_R600) -@@ -493,7 +853,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) +@@ -493,7 +823,7 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) else if (IS_R300_3D || IS_R500_3D) { if ((info->ChipFamily < CHIP_FAMILY_RS400) #ifdef XF86DRI @@ -7019,7 +6956,7 @@ index 59cb46f..7172cc2 100644 #endif ) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Render acceleration " -@@ -528,6 +888,16 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) +@@ -528,6 +858,16 @@ Bool FUNC_NAME(RADEONDrawInit)(ScreenPtr pScreen) } #endif @@ -8028,7 +7965,7 @@ index 0000000..67868cc + + diff --git a/src/radeon_probe.h b/src/radeon_probe.h -index a0c6b2c..30fee18 100644 +index afc8e21..6138f36 100644 --- a/src/radeon_probe.h +++ b/src/radeon_probe.h @@ -146,6 +146,27 @@ typedef struct diff --git a/xorg-x11-drv-ati.spec b/xorg-x11-drv-ati.spec index 8f338b6..3664c92 100644 --- a/xorg-x11-drv-ati.spec +++ b/xorg-x11-drv-ati.spec @@ -5,7 +5,7 @@ Summary: Xorg X11 ati video driver Name: xorg-x11-drv-ati Version: 6.12.0 -Release: 2%{?dist} +Release: 3%{?dist} URL: http://www.x.org License: MIT Group: User Interface/X Hardware Support @@ -76,6 +76,9 @@ rm -rf $RPM_BUILD_ROOT %{_mandir}/man4/radeon.4* %changelog +* Wed Apr 01 2009 Dave Airlie 6.12.0-3 +- radeon-modeset: fix FUS on DRI22 + * Mon Mar 16 2009 Dave Airlie 6.12.0-2 - radeon-6.12.0-git-fixes: fixes from git upstream