From f030182cca028fc7cfb064dd17d8f2435ce56c0f Mon Sep 17 00:00:00 2001 From: Xavier Bachelot Date: Jul 18 2009 12:28:45 +0000 Subject: 0.2.903 + svn 758 --- diff --git a/openchrome-0.2.903-XO-1.5-panel.patch b/openchrome-0.2.903-XO-1.5-panel.patch new file mode 100644 index 0000000..ed6fa14 --- /dev/null +++ b/openchrome-0.2.903-XO-1.5-panel.patch @@ -0,0 +1,62 @@ +Index: src/via_panel.c +=================================================================== +--- src/via_panel.c (revision 758) ++++ src/via_panel.c (working copy) +@@ -54,7 +54,8 @@ static ViaPanelModeRec ViaPanelNativeModes[] = { + {1920, 1200}, + {1024, 600}, + {1440, 900}, +- {1280, 720} ++ {1280, 720}, ++ {1200, 900} + }; + + static int +Index: src/via_mode.h +=================================================================== +--- src/via_mode.h (revision 758) ++++ src/via_mode.h (working copy) +@@ -70,6 +70,7 @@ static struct ViaDotClock { + { 49500, 0xC353, /* 0xa48c04 */ { 3, 3, 5, 138 } }, + { 50000, 0xC354, /* 0x368c00 */ { 1, 3, 2, 56 } }, + { 56300, 0x4F76, /* 0x3d8c00 */ { 1, 3, 2, 63 } }, ++ { 57275, 0x4E70, /* 0x3e8c00 */ { 1, 3, 6, 299 } }, + { 57284, 0x4E70, /* 0x3e8c00 */ { 1, 3, 2, 64 } }, + { 64995, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, + { 65000, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, /* Slightly unstable on PM800 */ +@@ -135,6 +136,7 @@ static DisplayModeRec ViaPanelModes[] = { + { MODEPREFIX("1152x864"), 81613, 1152, 1216, 1336, 1520, 0, 864, 864, 867, 895, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, + { MODEPREFIX("1280x768"), 81135, 1280, 1328, 1440, 1688, 0, 768, 770, 776, 802, 0, V_PHSYNC | V_NVSYNC, MODESUFFIX }, + { MODEPREFIX("1280x720"), 74600, 1280, 1341, 1474, 1688, 0, 720, 721, 724, 746, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, ++ { MODEPREFIX("1200x900"), 57200, 1200, 1206, 1214, 1240, 0, 900, 905, 907, 912, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, + { MODEPREFIX("1280x960"), 108280, 1280, 1376, 1488, 1800, 0, 960, 960, 963, 1000, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, + { MODEPREFIX("1280x1024"), 108280, 1280, 1328, 1440, 1688, 0, 1024, 1024, 1027, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, + { MODEPREFIX("1360x768"), 85500, 1360, 1392, 1712, 1744, 0, 768, 783, 791, 807, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, +@@ -168,6 +170,7 @@ static DisplayModeRec ViaPanelModes[] = { + #define VIA_RES_1280X720 19 + #define VIA_RES_1920X1080 20 + #define VIA_RES_1366X768 22 ++#define VIA_RES_1200X900 23 + #define VIA_RES_INVALID 0xFF + + /* +@@ -199,6 +202,7 @@ static struct { + {VIA_RES_856X480, VIA_PANEL_INVALID, 856, 480}, + {VIA_RES_1024X576, VIA_PANEL_INVALID, 1024, 576}, + {VIA_RES_800X480, VIA_PANEL8X4, 800, 480}, ++ {VIA_RES_1200X900, VIA_PANEL12X9, 1200, 900}, + {VIA_RES_INVALID, VIA_PANEL_INVALID, 0, 0} + }; + +Index: src/via_bios.h +=================================================================== +--- src/via_bios.h (revision 758) ++++ src/via_bios.h (working copy) +@@ -42,6 +42,7 @@ + #define VIA_PANEL10X6 13 + #define VIA_PANEL14X9 14 + #define VIA_PANEL1280X720 15 ++#define VIA_PANEL12X9 16 + #define VIA_PANEL_INVALID 255 + + #define TVTYPE_NONE 0x00 diff --git a/openchrome-0.2.903-fix_cursor_on_secondary.patch b/openchrome-0.2.903-fix_cursor_on_secondary.patch deleted file mode 100644 index 88735b9..0000000 --- a/openchrome-0.2.903-fix_cursor_on_secondary.patch +++ /dev/null @@ -1,216 +0,0 @@ -Index: src/via_cursor.c -=================================================================== ---- src/via_cursor.c (wersja 751) -+++ src/via_cursor.c (kopia robocza) -@@ -290,19 +286,36 @@ - CARD32 temp; - CARD32 control = pVia->CursorRegControl; - -- temp = -- (1 << 30) | -- (1 << 29) | -- (1 << 28) | -- (1 << 26) | -- (1 << 25) | -- (1 << 2) | -- (1 << 0); -+ switch(pVia->Chipset) { -+ case VIA_CX700: -+ case VIA_P4M890: -+ case VIA_P4M900: -+ case VIA_VX800: -+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { -+ VIASETREG(VIA_REG_HI_CONTROL0, 0x36000005); -+ } -+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { -+ VIASETREG(VIA_REG_HI_CONTROL1, 0xb6000005); -+ } -+ break; -+ -+ default: -+ /* temp = 0x36000005 */ -+ temp = -+ (1 << 29) | -+ (1 << 28) | -+ (1 << 26) | -+ (1 << 25) | -+ (1 << 2) | -+ (1 << 0); - -- if (pVia->CursorPipe) -- temp |= (1 << 31); -+ temp |= (1 << 30); - -- VIASETREG(control, temp); -+ /* Duoview */ -+ if (pVia->CursorPipe) -+ temp |= (1 << 31); -+ VIASETREG(control, temp); -+ } - } - - void -@@ -313,7 +326,24 @@ - CARD32 control = pVia->CursorRegControl; - - temp = VIAGETREG(control); -- VIASETREG(control, temp & 0xFFFFFFFE); -+ switch(pVia->Chipset) { -+ case VIA_CX700: -+ case VIA_P4M890: -+ case VIA_P4M900: -+ case VIA_VX800: -+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { -+ temp = VIAGETREG(VIA_REG_HI_CONTROL0); -+ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFA); -+ } -+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { -+ temp = VIAGETREG(VIA_REG_HI_CONTROL1); -+ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFA); -+ } -+ break; -+ -+ default: -+ VIASETREG(control, temp & 0xFFFFFFFA); -+ } - } - - static void -@@ -340,13 +370,41 @@ - yoff = 0; - } - -- temp = VIAGETREG(control); -- VIASETREG(control, temp & 0xFFFFFFFE); -+ switch(pVia->Chipset) { -+ case VIA_CX700: -+ case VIA_P4M890: -+ case VIA_P4M900: -+ case VIA_VX800: -+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { -+ temp = VIAGETREG(VIA_REG_HI_CONTROL0); -+ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); -+ -+ VIASETREG(VIA_REG_HI_POS0, ((x << 16) | (y & 0x07ff))); -+ VIASETREG(VIA_REG_HI_OFFSET0, ((xoff << 16) | (yoff & 0x07ff))); - -- VIASETREG(pos, ((x << 16) | (y & 0x07ff))); -- VIASETREG(offset, ((xoff << 16) | (yoff & 0x07ff))); -+ VIASETREG(VIA_REG_HI_CONTROL0, temp); -+ } -+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { -+ temp = VIAGETREG(VIA_REG_HI_CONTROL1); -+ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); - -- VIASETREG(control, temp); -+ VIASETREG(VIA_REG_HI_POS1, ((x << 16) | (y & 0x07ff))); -+ VIASETREG(VIA_REG_HI_OFFSET1, ((xoff << 16) | (yoff & 0x07ff))); -+ -+ VIASETREG(VIA_REG_HI_CONTROL1, temp); -+ } -+ break; -+ -+ default: -+ temp = VIAGETREG(control); -+ VIASETREG(control, temp & 0xFFFFFFFE); -+ -+ VIASETREG(pos, ((x << 16) | (y & 0x07ff))); -+ VIASETREG(offset, ((xoff << 16) | (yoff & 0x07ff))); -+ -+ VIASETREG(control, temp); -+ } -+ - } - - static Bool -@@ -397,18 +455,34 @@ - if (pVia->CursorARGBSupported) { - #define ARGB_PER_CHUNK (8 * sizeof (chunk) / 2) - for (i = 0; i < (pVia->CursorMaxWidth * pVia->CursorMaxHeight / ARGB_PER_CHUNK); i++) { -- chunk = *s++; -- for (j = 0; j < ARGB_PER_CHUNK; j++, chunk >>= 2) -+ chunk = *s++; -+ for (j = 0; j < ARGB_PER_CHUNK; j++, chunk >>= 2) - *dst++ = mono_cursor_color[chunk & 3]; - } - - pVia->CursorFG = mono_cursor_color[3]; - pVia->CursorBG = mono_cursor_color[2]; -- } else { -- memcpy(dst, src, pVia->CursorSize); -- } -- -- VIASETREG(control, temp); -+ } else { -+ memcpy(dst, src, pVia->CursorSize); -+ } -+ switch(pVia->Chipset) { -+ case VIA_CX700: -+ case VIA_P4M890: -+ case VIA_P4M900: -+ case VIA_VX800: -+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { -+ temp = VIAGETREG(VIA_REG_HI_CONTROL0); -+ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); -+ } -+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { -+ temp = VIAGETREG(VIA_REG_HI_CONTROL1); -+ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); -+ } -+ break; -+ -+ default: -+ VIASETREG(control, temp); -+ } - } - - static void -@@ -441,7 +515,23 @@ - pVia->CursorFG = fg; - pVia->CursorBG = bg; - -- VIASETREG(control, temp); -+ switch(pVia->Chipset) { -+ case VIA_CX700: -+ case VIA_P4M890: -+ case VIA_P4M900: -+ case VIA_VX800: -+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { -+ temp = VIAGETREG(VIA_REG_HI_CONTROL0); -+ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); -+ } -+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { -+ temp = VIAGETREG(VIA_REG_HI_CONTROL1); -+ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); -+ } -+ break; -+ default: -+ VIASETREG(control, temp); -+ } - } - - static void -@@ -486,5 +576,22 @@ - for (x = 0; x < pVia->CursorMaxWidth; x++) - *dst++ = 0; - -- VIASETREG(control, temp); -+ switch(pVia->Chipset) { -+ case VIA_CX700: -+ case VIA_P4M890: -+ case VIA_P4M900: -+ case VIA_VX800: -+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { -+ temp = VIAGETREG(VIA_REG_HI_CONTROL0); -+ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); -+ } -+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { -+ temp = VIAGETREG(VIA_REG_HI_CONTROL1); -+ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); -+ } -+ break; -+ -+ default: -+ VIASETREG(control, temp); -+ } - } diff --git a/openchrome-0.2.903-latest_snapshot.patch b/openchrome-0.2.903-latest_snapshot.patch index 11e56af..c1a2f3a 100644 --- a/openchrome-0.2.903-latest_snapshot.patch +++ b/openchrome-0.2.903-latest_snapshot.patch @@ -1,7 +1,7 @@ Index: configure.ac =================================================================== ---- configure.ac (.../tags/release_0_2_903) (revision 751) -+++ configure.ac (.../trunk) (revision 751) +--- configure.ac (.../tags/release_0_2_903) (revision 758) ++++ configure.ac (.../trunk) (revision 758) @@ -70,7 +70,7 @@ XORG_DRIVER_CHECK_EXT(DPMSExtension, xextproto) @@ -63,8 +63,8 @@ Index: configure.ac AC_SUBST([DRIVER_MAN_SUFFIX]) Index: libxvmc/Makefile.am =================================================================== ---- libxvmc/Makefile.am (.../tags/release_0_2_903) (revision 751) -+++ libxvmc/Makefile.am (.../trunk) (revision 751) +--- libxvmc/Makefile.am (.../tags/release_0_2_903) (revision 758) ++++ libxvmc/Makefile.am (.../trunk) (revision 758) @@ -24,13 +24,13 @@ xf86dristr.h \ vldXvMC.h @@ -85,8 +85,8 @@ Index: libxvmc/Makefile.am driDrawable.c \ Index: libxvmc/viaLowLevel.c =================================================================== ---- libxvmc/viaLowLevel.c (.../tags/release_0_2_903) (revision 751) -+++ libxvmc/viaLowLevel.c (.../trunk) (revision 751) +--- libxvmc/viaLowLevel.c (.../tags/release_0_2_903) (revision 758) ++++ libxvmc/viaLowLevel.c (.../trunk) (revision 758) @@ -276,8 +276,8 @@ xl->tsMem.context = *(xl->drmcontext); xl->tsMem.size = 64; @@ -100,8 +100,8 @@ Index: libxvmc/viaLowLevel.c return -1; Index: libxvmc/viaLowLevelPro.c =================================================================== ---- libxvmc/viaLowLevelPro.c (.../tags/release_0_2_903) (revision 751) -+++ libxvmc/viaLowLevelPro.c (.../trunk) (revision 751) +--- libxvmc/viaLowLevelPro.c (.../tags/release_0_2_903) (revision 758) ++++ libxvmc/viaLowLevelPro.c (.../trunk) (revision 758) @@ -1460,13 +1460,13 @@ if (size != mem->size) { @@ -129,8 +129,8 @@ Index: libxvmc/viaLowLevelPro.c Index: libxvmc/viaXvMC.c =================================================================== ---- libxvmc/viaXvMC.c (.../tags/release_0_2_903) (revision 751) -+++ libxvmc/viaXvMC.c (.../trunk) (revision 751) +--- libxvmc/viaXvMC.c (.../tags/release_0_2_903) (revision 758) ++++ libxvmc/viaXvMC.c (.../trunk) (revision 758) @@ -248,7 +248,7 @@ return errType; } @@ -407,8 +407,8 @@ Index: libxvmc/viaXvMC.c Index: ChangeLog =================================================================== ---- ChangeLog (.../tags/release_0_2_903) (revision 751) -+++ ChangeLog (.../trunk) (revision 751) +--- ChangeLog (.../tags/release_0_2_903) (revision 758) ++++ ChangeLog (.../trunk) (revision 758) @@ -1,3 +1,323 @@ +2009-03-21 Xavier Bachelot + @@ -736,7 +736,7 @@ Index: ChangeLog Index: src/via_panel.c =================================================================== --- src/via_panel.c (.../tags/release_0_2_903) (revision 0) -+++ src/via_panel.c (.../trunk) (revision 751) ++++ src/via_panel.c (.../trunk) (revision 758) @@ -0,0 +1,461 @@ +/* + * Copyright 2007 The Openchrome Project [openchrome.org] @@ -1201,28 +1201,30 @@ Index: src/via_panel.c +} Index: src/via_id.h =================================================================== ---- src/via_id.h (.../tags/release_0_2_903) (revision 751) -+++ src/via_id.h (.../trunk) (revision 751) -@@ -37,6 +37,7 @@ +--- src/via_id.h (.../tags/release_0_2_903) (revision 758) ++++ src/via_id.h (.../trunk) (revision 758) +@@ -37,6 +37,8 @@ VIA_P4M900, VIA_CX700, VIA_P4M890, + VIA_VX800, ++ VIA_VX855, VIA_LAST }; -@@ -52,6 +53,7 @@ +@@ -52,6 +54,8 @@ #define PCI_CHIP_VT3364 0x3371 /* P4M900 */ #define PCI_CHIP_VT3324 0x3157 /* CX700 */ #define PCI_CHIP_VT3327 0x3343 /* P4M890 */ +#define PCI_CHIP_VT3353 0x1122 /* VX800 */ ++#define PCI_CHIP_VT3409 0x5122 /* VX855/VX875 */ /* There is some conflicting information about the two major revisions of * the CLE266, often labelled Ax and Cx. The dividing line seems to be Index: src/via_video.c =================================================================== ---- src/via_video.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_video.c (.../trunk) (revision 751) +--- src/via_video.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_video.c (.../trunk) (revision 758) @@ -112,11 +112,7 @@ static int viaSetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer); static int viaPutImage(ScrnInfoPtr, short, short, short, short, short, short, @@ -1236,9 +1238,11 @@ Index: src/via_video.c static void nv12Blit(unsigned char *nv12Chroma, const unsigned char *uBuffer, const unsigned char *vBuffer, -@@ -282,7 +278,8 @@ +@@ -281,8 +277,10 @@ + pVia->ChipId != PCI_CHIP_VT3314 && pVia->ChipId != PCI_CHIP_VT3327 && pVia->ChipId != PCI_CHIP_VT3336 && ++ pVia->ChipId != PCI_CHIP_VT3409 && pVia->ChipId != PCI_CHIP_VT3364 && - pVia->ChipId != PCI_CHIP_VT3324) { + pVia->ChipId != PCI_CHIP_VT3324 && @@ -1246,7 +1250,7 @@ Index: src/via_video.c CARD32 bandwidth = (mode->HDisplay >> 4) * (mode->VDisplay >> 5) * pScrn->bitsPerPixel * mode->VRefresh; -@@ -370,14 +367,14 @@ +@@ -370,14 +368,14 @@ if (pVia->pVbe) { refresh = 100; @@ -1265,7 +1269,7 @@ Index: src/via_video.c if ((width == 1400) && (height == 1050)) { width = 1280; height = 1024; -@@ -476,6 +473,10 @@ +@@ -476,6 +474,10 @@ { VIAPtr pVia = VIAPTR(pScrn); vmmtr viaVidEng = (vmmtr) pVia->VidMapBase; @@ -1276,7 +1280,7 @@ Index: src/via_video.c pVia->dwV1 = ((vmmtr) viaVidEng)->video1_ctl; pVia->dwV3 = ((vmmtr) viaVidEng)->video3_ctl; -@@ -490,6 +491,10 @@ +@@ -490,6 +492,10 @@ { VIAPtr pVia = VIAPTR(pScrn); vmmtr viaVidEng = (vmmtr) pVia->VidMapBase; @@ -1287,7 +1291,7 @@ Index: src/via_video.c viaVidEng->video1_ctl = pVia->dwV1; viaVidEng->video3_ctl = pVia->dwV3; -@@ -568,6 +573,7 @@ +@@ -568,6 +574,7 @@ (pVia->Chipset == VIA_K8M890) || (pVia->Chipset == VIA_P4M900) || (pVia->Chipset == VIA_CX700) || @@ -1295,7 +1299,7 @@ Index: src/via_video.c (pVia->Chipset == VIA_P4M890)); if ((pVia->drmVerMajor < 2) || ((pVia->drmVerMajor == 2) && (pVia->drmVerMinor < 9))) -@@ -586,7 +592,7 @@ +@@ -586,13 +593,14 @@ (pVia->Chipset == VIA_K8M800) || (pVia->Chipset == VIA_PM800) || (pVia->Chipset == VIA_VM800) || (pVia->Chipset == VIA_K8M890) || (pVia->Chipset == VIA_P4M900) || (pVia->Chipset == VIA_CX700) || @@ -1304,7 +1308,14 @@ Index: src/via_video.c num_new = viaSetupAdaptors(pScreen, &newAdaptors); num_adaptors = xf86XVListGenericAdaptors(pScrn, &adaptors); } else { -@@ -650,8 +656,6 @@ + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, + "[Xv] Unsupported Chipset. X video functionality disabled.\n"); + num_adaptors = 0; ++ memset(viaAdaptPtr, 0, sizeof(viaAdaptPtr)); + } + + DBG_DD(ErrorF(" via_video.c : num_adaptors : %d\n", num_adaptors)); +@@ -650,8 +658,6 @@ return TRUE; } @@ -1313,7 +1324,7 @@ Index: src/via_video.c static void viaVideoFillPixmap(ScrnInfoPtr pScrn, char *base, -@@ -662,7 +666,7 @@ +@@ -662,7 +668,7 @@ { int i; @@ -1322,7 +1333,7 @@ Index: src/via_video.c pitch, depth, x, y, w, h, color); depth = (depth + 7) >> 3; -@@ -750,7 +754,6 @@ +@@ -750,7 +756,6 @@ return 0; } @@ -1330,7 +1341,7 @@ Index: src/via_video.c /* -@@ -759,11 +762,8 @@ +@@ -759,11 +764,8 @@ static int viaReputImage(ScrnInfoPtr pScrn, @@ -1344,7 +1355,7 @@ Index: src/via_video.c { DDUPDATEOVERLAY UpdateOverlay_Video; -@@ -774,17 +774,12 @@ +@@ -774,17 +776,12 @@ if (!RegionsEqual(&pPriv->clip, clipBoxes)) { REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes); if (pPriv->autoPaint) { @@ -1362,7 +1373,7 @@ Index: src/via_video.c } } -@@ -924,8 +919,8 @@ +@@ -924,8 +921,8 @@ DBG_DD(ErrorF(" via_video.c : viaStopVideo: exit=%d\n", exit)); REGION_EMPTY(pScrn->pScreen, &pPriv->clip); @@ -1372,7 +1383,7 @@ Index: src/via_video.c ViaSwovSurfaceDestroy(pScrn, pPriv); if (pPriv->dmaBounceBuffer) xfree(pPriv->dmaBounceBuffer); -@@ -1271,11 +1266,8 @@ +@@ -1271,11 +1268,8 @@ short src_w, short src_h, short drw_w, short drw_h, int id, unsigned char *buf, @@ -1386,7 +1397,7 @@ Index: src/via_video.c { VIAPtr pVia = VIAPTR(pScrn); viaPortPrivPtr pPriv = (viaPortPrivPtr) data; -@@ -1443,17 +1435,12 @@ +@@ -1443,17 +1437,12 @@ if (!RegionsEqual(&pPriv->clip, clipBoxes)) { REGION_COPY(pScrn->pScreen, &pPriv->clip, clipBoxes); if (pPriv->autoPaint) { @@ -1407,8 +1418,8 @@ Index: src/via_video.c Index: src/via_lvds.c =================================================================== --- src/via_lvds.c (.../tags/release_0_2_903) (revision 0) -+++ src/via_lvds.c (.../trunk) (revision 751) -@@ -0,0 +1,122 @@ ++++ src/via_lvds.c (.../trunk) (revision 758) +@@ -0,0 +1,117 @@ +/* + * Copyright 2007 The Openchrome Project [openchrome.org] + * Copyright 1998-2007 VIA Technologies, Inc. All Rights Reserved. @@ -1494,15 +1505,10 @@ Index: src/via_lvds.c +ViaLVDSDFPPower(ScrnInfoPtr pScrn, Bool on) +{ + vgaHWPtr hwp = VGAHWPTR(pScrn); ++ VIAPtr pVia = VIAPTR(pScrn); + -+ if (on) { -+ /* Turn DFP High/Low pad on. */ -+ hwp->writeSeq(hwp, 0x2A, hwp->readSeq(hwp, 0x2A) | 0x0F); -+ } else { -+ /* Turn DFP High/Low pad off. */ -+ hwp->writeSeq(hwp, 0x2A, hwp->readSeq(hwp, 0x2A) & 0xF0); -+ -+ } ++ /* Switch DFP High/Low pads on or off for channels active at EnterVT(). */ ++ ViaSeqMask(hwp, 0x2A, on ? pVia->SavedReg.SR2A : 0, 0x0F); +} + +static void @@ -1533,8 +1539,8 @@ Index: src/via_lvds.c +} Index: src/via_mode.c =================================================================== ---- src/via_mode.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_mode.c (.../trunk) (revision 751) +--- src/via_mode.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_mode.c (.../trunk) (revision 758) @@ -1,4 +1,5 @@ /* + * Copyright 2005-2007 The Openchrome Project [openchrome.org] @@ -1645,27 +1651,30 @@ Index: src/via_mode.c * FIXME: xf86I2CProbeAddress(pVia->pI2CBus3, 0x40) * disables the panel on P4M900 * See ViaTVDetect. -@@ -297,6 +370,19 @@ +@@ -297,6 +370,22 @@ pBIOSInfo->TVOutput = 0; } } + -+ if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) { -+ -+ if (ViaDFPDetect(pScrn)) { -+ pBIOSInfo->DfpPresent = TRUE; -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "DFP is connected.\n"); -+ } else { -+ pBIOSInfo->DfpPresent = FALSE; -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "DFP is disconnected.\n"); -+ } ++ switch (pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_VX800: ++ case VIA_VX855: ++ if (ViaDFPDetect(pScrn)) { ++ pBIOSInfo->DfpPresent = TRUE; ++ xf86DrvMsg(pScrn->scrnIndex, X_INFO, ++ "DFP is connected.\n"); ++ } else { ++ pBIOSInfo->DfpPresent = FALSE; ++ xf86DrvMsg(pScrn->scrnIndex, X_INFO, ++ "DFP is disconnected.\n"); ++ } ++ break; + } } #ifdef HAVE_DEBUG -@@ -347,24 +433,30 @@ +@@ -347,24 +436,30 @@ " Initialised register: 0x%02x\n", VIAGetActiveDisplay(pScrn))); @@ -1700,7 +1709,7 @@ Index: src/via_mode.c else xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unable to activate" " panel: no panel is present.\n"); -@@ -377,7 +469,7 @@ +@@ -377,7 +472,7 @@ else if (pBIOSInfo->TVOutput == TVOUTPUT_NONE) xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unable to activate" " TV encoder: no cable attached.\n"); @@ -1709,7 +1718,7 @@ Index: src/via_mode.c xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unable to activate" " TV encoder and panel simultaneously. Not using" " TV encoder.\n"); -@@ -385,221 +477,112 @@ +@@ -385,221 +480,118 @@ pBIOSInfo->TVActive = TRUE; } @@ -1733,8 +1742,14 @@ Index: src/via_mode.c + pBIOSInfo->FirstCRTC->IsActive = TRUE ; + if (pBIOSInfo->Panel->IsActive) { + pVia->pBIOSInfo->SecondCRTC->IsActive = TRUE ; -+ if (pVia->Chipset == VIA_P4M900 || pVia->Chipset == VIA_CX700 || pVia->Chipset == VIA_VX800 ) -+ pVia->pBIOSInfo->Lvds->IsActive = TRUE ; ++ switch (pVia->Chipset) { ++ case VIA_P4M900: ++ case VIA_CX700: ++ case VIA_VX800: ++ case VIA_VX855: ++ pVia->pBIOSInfo->Lvds->IsActive = TRUE ; ++ break; ++ } + } + } @@ -1975,7 +1990,7 @@ Index: src/via_mode.c } /* -@@ -656,7 +639,7 @@ +@@ -656,7 +648,7 @@ /* * @@ -1984,7 +1999,7 @@ Index: src/via_mode.c * pBIOSInfo->PanelIndex is the index to lcdTable. * */ -@@ -670,9 +653,9 @@ +@@ -670,9 +662,9 @@ pBIOSInfo->PanelIndex = VIA_BIOS_NUM_PANEL; @@ -1996,7 +2011,7 @@ Index: src/via_mode.c xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaPanelGetIndex: PanelSize not set.\n"); return FALSE; -@@ -692,12 +675,14 @@ +@@ -692,12 +684,14 @@ return FALSE; } @@ -2013,7 +2028,7 @@ Index: src/via_mode.c if (ViaResolutionTable[i].Index == VIA_RES_INVALID) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaPanelGetIndex: Unable" -@@ -712,8 +697,11 @@ +@@ -712,8 +706,11 @@ return FALSE; } @@ -2027,7 +2042,7 @@ Index: src/via_mode.c int modeNum, tmp; modeNum = ViaGetVesaMode(pScrn, mode); -@@ -736,6 +724,7 @@ +@@ -736,6 +733,7 @@ " to match given mode with this PanelSize.\n"); return FALSE; } @@ -2035,7 +2050,7 @@ Index: src/via_mode.c xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaPanelGetIndex: Unable" " to match PanelSize with an lcdTable entry.\n"); -@@ -743,6 +732,53 @@ +@@ -743,6 +741,53 @@ } /* @@ -2089,7 +2104,7 @@ Index: src/via_mode.c * Stolen from xf86Config.c's addDefaultModes */ static void -@@ -764,6 +800,7 @@ +@@ -764,6 +809,7 @@ mode->prev = NULL; } last = mode; @@ -2097,7 +2112,7 @@ Index: src/via_mode.c } monitorp->Last = last; } -@@ -778,7 +815,7 @@ +@@ -778,7 +824,7 @@ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModesAttach\n")); @@ -2106,7 +2121,7 @@ Index: src/via_mode.c ViaModesAttachHelper(pScrn, monitorp, ViaPanelModes); if (pBIOSInfo->TVActive && pBIOSInfo->TVModes) ViaModesAttachHelper(pScrn, monitorp, pBIOSInfo->TVModes); -@@ -815,155 +852,12 @@ +@@ -815,155 +861,12 @@ } } @@ -2264,7 +2279,7 @@ Index: src/via_mode.c ModeStatus ViaValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags) { -@@ -982,27 +876,57 @@ +@@ -982,27 +885,57 @@ if (mode->Flags & V_INTERLACE) return MODE_NO_INTERLACE; @@ -2338,7 +2353,7 @@ Index: src/via_mode.c temp = mode->CrtcHDisplay * mode->CrtcVDisplay * mode->VRefresh * (pScrn->bitsPerPixel >> 3); if (pBIOSInfo->Bandwidth < temp) { -@@ -1037,7 +961,7 @@ +@@ -1037,54 +970,71 @@ hwp->writeMiscOut(hwp, data | 0x0C); } @@ -2347,7 +2362,45 @@ Index: src/via_mode.c * */ static void -@@ -1062,7 +986,7 @@ +-ViaSetPrimaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) ++ViaSetDotclock(ScrnInfoPtr pScrn, CARD32 clock, int base, int probase) + { + vgaHWPtr hwp = VGAHWPTR(pScrn); + VIAPtr pVia = VIAPTR(pScrn); + + DEBUG(xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, +- "ViaSetPrimaryDotclock to 0x%06x\n", (unsigned)clock)); ++ "ViaSetDotclock to 0x%06x\n", (unsigned)clock)); + + if ((pVia->Chipset == VIA_CLE266) || (pVia->Chipset == VIA_KM400)) { +- hwp->writeSeq(hwp, 0x46, clock >> 8); +- hwp->writeSeq(hwp, 0x47, clock & 0xFF); ++ hwp->writeSeq(hwp, base, clock >> 8); ++ hwp->writeSeq(hwp, base+1, clock & 0xFF); + } else { /* unichrome pro */ +- hwp->writeSeq(hwp, 0x44, clock >> 16); +- hwp->writeSeq(hwp, 0x45, (clock >> 8) & 0xFF); +- hwp->writeSeq(hwp, 0x46, clock & 0xFF); ++ union pllparams pll; ++ int dtz, dr, dn, dm; ++ pll.packed = clock; ++ dtz = pll.params.dtz; ++ dr = pll.params.dr; ++ dn = pll.params.dn; ++ dm = pll.params.dm; ++ ++ /* The VX855 does not modify dm/dn, but earlier chipsets do. */ ++ if (pVia->Chipset != VIA_VX855) { ++ dm -= 2; ++ dn -= 2; ++ } ++ ++ hwp->writeSeq(hwp, probase, dm & 0xff); ++ hwp->writeSeq(hwp, probase+1, ((dm >> 8) & 0x03) | (dr << 2) | ((dtz & 1) << 7)); ++ hwp->writeSeq(hwp, probase+2, (dn & 0x7f) | ((dtz & 2) << 6)); + } + + ViaSeqMask(hwp, 0x40, 0x02, 0x02); ViaSeqMask(hwp, 0x40, 0x00, 0x02); } @@ -2356,7 +2409,48 @@ Index: src/via_mode.c * */ static void -@@ -1104,7 +1028,7 @@ ++ViaSetPrimaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) ++{ ++ ViaSetDotclock(pScrn, clock, 0x46, 0x44); ++} ++ ++/* ++ * ++ */ ++static void + ViaSetSecondaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) + { +- vgaHWPtr hwp = VGAHWPTR(pScrn); +- VIAPtr pVia = VIAPTR(pScrn); ++ ViaSetDotclock(pScrn, clock, 0x44, 0x4A); ++} + +- DEBUG(xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, +- "ViaSetSecondaryDotclock to 0x%06x\n", (unsigned)clock)); +- +- if ((pVia->Chipset == VIA_CLE266) || (pVia->Chipset == VIA_KM400)) { +- hwp->writeSeq(hwp, 0x44, clock >> 8); +- hwp->writeSeq(hwp, 0x45, clock & 0xFF); +- } else { /* unichrome pro */ +- hwp->writeSeq(hwp, 0x4A, clock >> 16); +- hwp->writeSeq(hwp, 0x4B, (clock >> 8) & 0xFF); +- hwp->writeSeq(hwp, 0x4C, clock & 0xFF); +- } +- +- ViaSeqMask(hwp, 0x40, 0x04, 0x04); +- ViaSeqMask(hwp, 0x40, 0x00, 0x04); ++/* ++ * ++ */ ++static void ++ViaSetECKDotclock(ScrnInfoPtr pScrn, CARD32 clock) ++{ ++ /* Does the non-pro chip have an ECK clock ? */ ++ ViaSetDotclock(pScrn, clock, 0, 0x47); + } + + /* +@@ -1104,7 +1054,7 @@ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIASetLCDMode\n")); @@ -2365,7 +2459,7 @@ Index: src/via_mode.c hwp->writeCrtc(hwp, 0x89, 0x07); /* LCD Expand Mode Y Scale Flag */ -@@ -1165,7 +1089,7 @@ +@@ -1165,7 +1115,7 @@ case VIA_RES_1280X768: case VIA_RES_1280X960: case VIA_RES_1280X1024: @@ -2374,7 +2468,7 @@ Index: src/via_mode.c resIdx = VIA_RES_INVALID; else resIdx = 4; -@@ -1317,261 +1241,6 @@ +@@ -1317,261 +1267,6 @@ } } @@ -2636,7 +2730,81 @@ Index: src/via_mode.c static CARD32 ViaComputeDotClock(unsigned clock) { -@@ -1692,13 +1361,14 @@ +@@ -1609,15 +1304,16 @@ + { + double fvco, fout, fref, err, minErr; + CARD32 dr = 0, dn, dm, maxdm, maxdn; +- CARD32 factual, bestClock; +- ++ CARD32 factual; ++ union pllparams bestClock; ++ + fref = 14.318e6; + fout = (double)clock * 1.e3; + + factual = ~0; +- maxdm = factual / 14318000U - 2; ++ maxdm = factual / 14318000U; + minErr = 1.e10; +- bestClock = 0U; ++ bestClock.packed = 0U; + + do { + fvco = fout * (1 << dr); +@@ -1628,30 +1324,31 @@ + } + + if (clock < 30000) +- maxdn = 6; ++ maxdn = 8; + else if (clock < 45000) +- maxdn = 5; ++ maxdn = 7; + else if (clock < 170000) +- maxdn = 4; ++ maxdn = 6; + else +- maxdn = 3; ++ maxdn = 5; + +- for (dn = 0; dn < maxdn; ++dn) { +- for (dm = 0; dm < maxdm; ++dm) { +- factual = 14318000U * (dm + 2); +- factual /= (dn + 2) << dr; ++ for (dn = 2; dn < maxdn; ++dn) { ++ for (dm = 2; dm < maxdm; ++dm) { ++ factual = 14318000U * dm; ++ factual /= dn << dr; + if ((err = fabs((double)factual / fout - 1.)) < 0.005) { + if (err < minErr) { + minErr = err; +- bestClock = ((dm & 0xff) << 16) | +- (((1 << 7) | (dr << 2) | ((dm & 0x300) >> 8)) << 8) +- | (dn & 0x7f); ++ bestClock.params.dtz = 1; ++ bestClock.params.dr = dr; ++ bestClock.params.dn = dn; ++ bestClock.params.dm = dm; + } + } + } + } + +- return bestClock; ++ return bestClock.packed; + } + + /* +@@ -1681,7 +1378,7 @@ + } else { + for (i = 0; ViaDotClocks[i].DotClock; i++) + if (ViaDotClocks[i].DotClock == mode->Clock) +- return ViaDotClocks[i].UniChromePro; ++ return ViaDotClocks[i].UniChromePro.packed; + return ViaComputeProDotClock(mode->Clock); + } + +@@ -1692,13 +1389,14 @@ * */ void @@ -2652,7 +2820,7 @@ Index: src/via_mode.c /* Turn off Screen */ ViaCrtcMask(hwp, 0x17, 0x00, 0x80); -@@ -1709,7 +1379,8 @@ +@@ -1709,7 +1407,8 @@ hwp->writeCrtc(hwp, 0x6C, 0x00); hwp->writeCrtc(hwp, 0x93, 0x00); @@ -2662,7 +2830,7 @@ Index: src/via_mode.c pBIOSInfo->Clock = ViaModeDotClockTranslate(pScrn, mode); pBIOSInfo->ClockExternal = FALSE; -@@ -1721,7 +1392,7 @@ +@@ -1721,7 +1420,7 @@ else ViaSeqMask(hwp, 0x16, 0x00, 0x40); @@ -2671,7 +2839,7 @@ Index: src/via_mode.c VIASetLCDMode(pScrn, mode); ViaLCDPower(pScrn, TRUE); } else if (pBIOSInfo->PanelPresent) -@@ -1765,192 +1436,23 @@ +@@ -1765,192 +1464,23 @@ hwp->disablePalette(hwp); } @@ -2867,7 +3035,7 @@ Index: src/via_mode.c if (pBIOSInfo->TVActive) ViaTVSetMode(pScrn, mode); -@@ -1959,7 +1461,7 @@ +@@ -1959,7 +1489,7 @@ if (!(pVia->Chipset == VIA_CLE266 && pVia->ChipRev == 0x02)) ViaCrtcMask(hwp, 0x6C, 0x00, 0x1E); @@ -2876,7 +3044,7 @@ Index: src/via_mode.c && (pBIOSInfo->PanelIndex != VIA_BIOS_NUM_PANEL)) { pBIOSInfo->SetDVI = TRUE; VIASetLCDMode(pScrn, mode); -@@ -2017,9 +1519,12 @@ +@@ -2017,9 +1547,12 @@ else ViaCrtcMask(hwp, 0x6A, 0x00, 0x08); @@ -2890,7 +3058,7 @@ Index: src/via_mode.c for (i = 0; i < NumPowerOn; i++) { if (lcdTable[pBIOSInfo->PanelIndex].powerSeq == powerOn[i].powerSeq) -@@ -2038,3 +1543,137 @@ +@@ -2038,3 +1571,137 @@ ViaLCDPowerSequence(hwp, powerOff[i]); usleep(1); } @@ -3030,9 +3198,9 @@ Index: src/via_mode.c +} Index: src/via_mode.h =================================================================== ---- src/via_mode.h (.../tags/release_0_2_903) (revision 751) -+++ src/via_mode.h (.../trunk) (revision 751) -@@ -32,7 +32,7 @@ +--- src/via_mode.h (.../tags/release_0_2_903) (revision 758) ++++ src/via_mode.h (.../trunk) (revision 758) +@@ -32,10 +32,19 @@ */ #define VIA_BW_MIN 74000000 /* > 640x480@60Hz@32bpp */ #define VIA_BW_DDR200 394000000 @@ -3040,8 +3208,117 @@ Index: src/via_mode.h +#define VIA_BW_DDR400 498000000 /* > 1920x1080@60Hz@32bpp */ #define VIA_BW_DDR667 922000000 - -@@ -113,20 +113,27 @@ +- ++union pllparams { ++ struct { ++ CARD32 dtz : 2; ++ CARD32 dr : 3; ++ CARD32 dn : 7; ++ CARD32 dm :10; ++ } params; ++ CARD32 packed; ++}; ++ + /* + * simple lookup table for dotclocks + * +@@ -43,51 +52,51 @@ + static struct ViaDotClock { + int DotClock; + CARD16 UniChrome; +- CARD32 UniChromePro; ++ union pllparams UniChromePro; + } ViaDotClocks[] = { +- { 25200, 0x513C, 0xa79004 }, +- { 25312, 0xC763, 0xc49005 }, +- { 26591, 0x471A, 0xce9005 }, +- { 31500, 0xC558, 0xae9003 }, +- { 31704, 0x471F, 0xaf9002 }, +- { 32663, 0xC449, 0x479000 }, +- { 33750, 0x4721, 0x959002 }, +- { 35500, 0x5877, 0x759001 }, +- { 36000, 0x5879, 0x9f9002 }, +- { 39822, 0xC459, 0x578c02 }, +- { 40000, 0x515F, 0x848c04 }, +- { 41164, 0x4417, 0x2c8c00 }, +- { 46981, 0x5069, 0x678c02 }, +- { 49500, 0xC353, 0xa48c04 }, +- { 50000, 0xC354, 0x368c00 }, +- { 56300, 0x4F76, 0x3d8c00 }, +- { 57284, 0x4E70, 0x3e8c00 }, +- { 64995, 0x0D3B, 0x6b8c01 }, +- { 65000, 0x0D3B, 0x6b8c01 }, /* Slightly unstable on PM800 */ +- { 65028, 0x866D, 0x6b8c01 }, +- { 74480, 0x156E, 0x288800 }, +- { 75000, 0x156E, 0x288800 }, +- { 78800, 0x442C, 0x2a8800 }, +- { 81135, 0x0622, 0x428801 }, +- { 81613, 0x4539, 0x708803 }, +- { 94500, 0x4542, 0x4d8801 }, +- { 108000, 0x0B53, 0x778802 }, +- { 108280, 0x4879, 0x778802 }, +- { 122000, 0x0D6F, 0x428800 }, +- { 122726, 0x073C, 0x878802 }, +- { 135000, 0x0742, 0x6f8801 }, +- { 148500, 0x0853, 0x518800 }, +- { 155800, 0x0857, 0x558402 }, +- { 157500, 0x422C, 0x2a8400 }, +- { 161793, 0x4571, 0x6f8403 }, +- { 162000, 0x0A71, 0x6f8403 }, +- { 175500, 0x4231, 0x2f8400 }, +- { 189000, 0x0542, 0x4d8401 }, +- { 202500, 0x0763, 0x6F8402 }, +- { 204800, 0x0764, 0x548401 }, +- { 218300, 0x043D, 0x3b8400 }, +- { 229500, 0x0660, 0x3e8400 }, /* Not tested on Pro */ +- { 0, 0, 0 } ++ { 25200, 0x513C, /* 0xa79004 */ { 1, 4, 6, 169 } }, ++ { 25312, 0xC763, /* 0xc49005 */ { 1, 4, 7, 198 } }, ++ { 26591, 0x471A, /* 0xce9005 */ { 1, 4, 7, 208 } }, ++ { 31500, 0xC558, /* 0xae9003 */ { 1, 4, 5, 176 } }, ++ { 31704, 0x471F, /* 0xaf9002 */ { 1, 4, 4, 177 } }, ++ { 32663, 0xC449, /* 0x479000 */ { 1, 4, 2, 73 } }, ++ { 33750, 0x4721, /* 0x959002 */ { 1, 4, 4, 151 } }, ++ { 35500, 0x5877, /* 0x759001 */ { 1, 4, 3, 119 } }, ++ { 36000, 0x5879, /* 0x9f9002 */ { 1, 4, 4, 161 } }, ++ { 39822, 0xC459, /* 0x578c02 */ { 1, 3, 4, 89 } }, ++ { 40000, 0x515F, /* 0x848c04 */ { 1, 3, 6, 134 } }, ++ { 41164, 0x4417, /* 0x2c8c00 */ { 1, 3, 2, 46 } }, ++ { 46981, 0x5069, /* 0x678c02 */ { 1, 3, 4, 105 } }, ++ { 49500, 0xC353, /* 0xa48c04 */ { 3, 3, 5, 138 } }, ++ { 50000, 0xC354, /* 0x368c00 */ { 1, 3, 2, 56 } }, ++ { 56300, 0x4F76, /* 0x3d8c00 */ { 1, 3, 2, 63 } }, ++ { 57284, 0x4E70, /* 0x3e8c00 */ { 1, 3, 2, 64 } }, ++ { 64995, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, ++ { 65000, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, /* Slightly unstable on PM800 */ ++ { 65028, 0x866D, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, ++ { 74480, 0x156E, /* 0x288800 */ { 1, 2, 2, 42 } }, ++ { 75000, 0x156E, /* 0x288800 */ { 1, 2, 2, 42 } }, ++ { 78800, 0x442C, /* 0x2a8800 */ { 1, 2, 2, 44 } }, ++ { 81135, 0x0622, /* 0x428801 */ { 1, 2, 3, 68 } }, ++ { 81613, 0x4539, /* 0x708803 */ { 1, 2, 5, 114 } }, ++ { 94500, 0x4542, /* 0x4d8801 */ { 1, 2, 3, 79 } }, ++ { 108000, 0x0B53, /* 0x778802 */ { 1, 2, 4, 121 } }, ++ { 108280, 0x4879, /* 0x778802 */ { 1, 2, 4, 121 } }, ++ { 122000, 0x0D6F, /* 0x428800 */ { 1, 2, 2, 68 } }, ++ { 122726, 0x073C, /* 0x878802 */ { 1, 2, 4, 137 } }, ++ { 135000, 0x0742, /* 0x6f8801 */ { 1, 2, 3, 113 } }, ++ { 148500, 0x0853, /* 0x518800 */ { 1, 2, 2, 83 } }, ++ { 155800, 0x0857, /* 0x558402 */ { 1, 1, 4, 87 } }, ++ { 157500, 0x422C, /* 0x2a8400 */ { 1, 1, 2, 44 } }, ++ { 161793, 0x4571, /* 0x6f8403 */ { 1, 1, 5, 113 } }, ++ { 162000, 0x0A71, /* 0x6f8403 */ { 1, 1, 5, 113 } }, ++ { 175500, 0x4231, /* 0x2f8400 */ { 1, 1, 2, 49 } }, ++ { 189000, 0x0542, /* 0x4d8401 */ { 1, 1, 3, 79 } }, ++ { 202500, 0x0763, /* 0x6F8402 */ { 1, 1, 4, 113 } }, ++ { 204800, 0x0764, /* 0x548401 */ { 1, 1, 3, 86 } }, ++ { 218300, 0x043D, /* 0x3b8400 */ { 1, 1, 2, 61 } }, ++ { 229500, 0x0660, /* 0x3e8400 */ { 1, 1, 2, 64 } }, /* Not tested on Pro } */ ++ { 0, 0, { 0, 0, 0, 0 } } + }; + + /* +@@ -113,20 +122,27 @@ static DisplayModeRec ViaPanelModes[] = { { MODEPREFIX("640x480"), 25312, 640, 656, 752, 800, 0, 480, 489, 491, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, @@ -3077,7 +3354,7 @@ Index: src/via_mode.h { MODEPREFIX(NULL), 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, MODESUFFIX }, }; -@@ -182,6 +189,7 @@ +@@ -182,6 +198,7 @@ {VIA_RES_1024X512, VIA_PANEL_INVALID, 1024, 512}, {VIA_RES_856X480, VIA_PANEL_INVALID, 856, 480}, {VIA_RES_1024X576, VIA_PANEL_INVALID, 1024, 576}, @@ -3087,8 +3364,8 @@ Index: src/via_mode.h Index: src/via_driver.c =================================================================== ---- src/via_driver.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_driver.c (.../trunk) (revision 751) +--- src/via_driver.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_driver.c (.../trunk) (revision 758) @@ -73,6 +73,7 @@ return via_pci_device(&bridge_match); } @@ -3097,31 +3374,34 @@ Index: src/via_driver.c viaPciDeviceVga(void) { static const struct pci_slot_match bridge_match = { -@@ -126,6 +127,7 @@ +@@ -126,6 +127,8 @@ VIA_DEVICE_MATCH (PCI_CHIP_VT3364, 0 ), VIA_DEVICE_MATCH (PCI_CHIP_VT3324, 0 ), VIA_DEVICE_MATCH (PCI_CHIP_VT3327, 0 ), + VIA_DEVICE_MATCH (PCI_CHIP_VT3353, 0 ), ++ VIA_DEVICE_MATCH (PCI_CHIP_VT3409, 0 ), { 0, 0, 0 }, }; -@@ -161,6 +163,7 @@ +@@ -161,6 +164,8 @@ {VIA_P4M900, "P4M900/VN896/CN896"}, {VIA_CX700, "CX700/VX700"}, {VIA_P4M890, "P4M890"}, + {VIA_VX800, "VX800"}, ++ {VIA_VX855, "VX855"}, {-1, NULL } }; -@@ -175,6 +178,7 @@ +@@ -175,6 +180,8 @@ {VIA_P4M900, PCI_CHIP_VT3364, RES_SHARED_VGA}, {VIA_CX700, PCI_CHIP_VT3324, RES_SHARED_VGA}, {VIA_P4M890, PCI_CHIP_VT3327, RES_SHARED_VGA}, + {VIA_VX800, PCI_CHIP_VT3353, RES_SHARED_VGA}, ++ {VIA_VX855, PCI_CHIP_VT3409, RES_SHARED_VGA}, {-1, -1, RES_UNDEFINED} }; -@@ -189,11 +193,9 @@ +@@ -189,11 +196,9 @@ #endif OPTION_VBEMODES, OPTION_NOACCEL, @@ -3133,7 +3413,7 @@ Index: src/via_driver.c OPTION_SWCURSOR, OPTION_SHADOW_FB, OPTION_ROTATE, -@@ -227,11 +229,9 @@ +@@ -227,11 +232,9 @@ #endif {OPTION_VBEMODES, "VBEModes", OPTV_BOOLEAN, {0}, FALSE}, {OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE}, @@ -3145,7 +3425,7 @@ Index: src/via_driver.c {OPTION_SWCURSOR, "SWCursor", OPTV_BOOLEAN, {0}, FALSE}, {OPTION_SHADOW_FB, "ShadowFB", OPTV_BOOLEAN, {0}, FALSE}, {OPTION_ROTATE, "Rotate", OPTV_ANYSTR, {0}, FALSE}, -@@ -346,7 +346,6 @@ +@@ -346,7 +349,6 @@ NULL }; @@ -3153,7 +3433,7 @@ Index: src/via_driver.c static const char *exaSymbols[] = { "exaGetVersion", "exaDriverInit", -@@ -356,14 +355,9 @@ +@@ -356,14 +358,9 @@ "exaGetPixmapPitch", "exaGetPixmapOffset", "exaWaitSync", @@ -3168,7 +3448,7 @@ Index: src/via_driver.c static const char *shadowSymbols[] = { "ShadowFBInit", -@@ -486,9 +480,7 @@ +@@ -486,9 +483,7 @@ #endif ramdacSymbols, xaaSymbols, @@ -3178,7 +3458,7 @@ Index: src/via_driver.c shadowSymbols, vbeSymbols, i2cSymbols, -@@ -513,34 +505,97 @@ +@@ -513,34 +508,97 @@ static Bool VIAGetRec(ScrnInfoPtr pScrn) { @@ -3283,7 +3563,7 @@ Index: src/via_driver.c if (((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->TVI2CDev) xf86DestroyI2CDevRec((((VIARec *) (pScrn->driverPrivate))->pBIOSInfo-> TVI2CDev), TRUE); -@@ -787,10 +842,8 @@ +@@ -787,10 +845,8 @@ pVia->shadowFB = FALSE; pVia->NoAccel = FALSE; @@ -3294,7 +3574,7 @@ Index: src/via_driver.c pVia->hwcursor = TRUE; pVia->VQEnable = TRUE; pVia->DRIIrqEnable = TRUE; -@@ -813,6 +866,8 @@ +@@ -813,6 +869,8 @@ pVia->swov.maxHInterp = 600; pVia->useLegacyVBE = TRUE; @@ -3303,7 +3583,7 @@ Index: src/via_driver.c switch (pVia->Chipset) { case VIA_KM400: /* IRQ is not broken on KM400A, but testing (pVia->ChipRev < 0x80) -@@ -820,19 +875,18 @@ +@@ -820,19 +878,18 @@ pVia->DRIIrqEnable = FALSE; break; case VIA_K8M800: @@ -3324,7 +3604,7 @@ Index: src/via_driver.c break; case VIA_P4M900: pVia->VideoEngine = VIDEO_ENGINE_CME; -@@ -840,16 +894,25 @@ +@@ -840,16 +897,26 @@ pVia->useLegacyVBE = FALSE; /* FIXME: this needs to be tested */ pVia->dmaXV = FALSE; @@ -3342,6 +3622,7 @@ Index: src/via_driver.c + pVia->UseLegacyModeSwitch = FALSE; break; + case VIA_VX800: ++ case VIA_VX855: + pVia->VideoEngine = VIDEO_ENGINE_CME; + /* pVia->agpEnable = FALSE; + pVia->dmaXV = FALSE;*/ @@ -3350,7 +3631,7 @@ Index: src/via_driver.c } return TRUE; -@@ -875,6 +938,7 @@ +@@ -875,6 +942,7 @@ #ifdef XSERVER_LIBPCIACCESS struct pci_device *bridge = via_host_bridge(); @@ -3358,7 +3639,7 @@ Index: src/via_driver.c #endif DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAPreInit\n")); -@@ -1067,9 +1131,8 @@ +@@ -1067,9 +1135,8 @@ } else { /* Read PCI bus 0, dev 0, function 0, index 0xF6 to get chip revision */ #ifdef XSERVER_LIBPCIACCESS @@ -3370,7 +3651,7 @@ Index: src/via_driver.c #else pVia->ChipRev = pciReadByte(pciTag(0, 0, 0), 0xF6); #endif -@@ -1090,6 +1153,8 @@ +@@ -1090,6 +1157,8 @@ struct pci_device *vgaDevice = viaPciDeviceVga(); #endif @@ -3379,15 +3660,16 @@ Index: src/via_driver.c switch (pVia->Chipset) { case VIA_CLE266: case VIA_KM400: -@@ -1114,6 +1179,7 @@ +@@ -1114,6 +1183,8 @@ case VIA_P4M890: case VIA_P4M900: case VIA_CX700: + case VIA_VX800: ++ case VIA_VX855: #ifdef XSERVER_LIBPCIACCESS pci_device_cfg_read_u8(vgaDevice, &videoRam, 0xA1); #else -@@ -1139,7 +1205,7 @@ +@@ -1139,7 +1210,7 @@ } else { from = X_DEFAULT; xf86DrvMsg(pScrn->scrnIndex, X_WARNING, @@ -3396,7 +3678,7 @@ Index: src/via_driver.c } } -@@ -1202,7 +1268,6 @@ +@@ -1202,7 +1273,6 @@ "Valid options are \"CW\" or \"CCW\".\n"); } } @@ -3404,7 +3686,7 @@ Index: src/via_driver.c if (!pVia->NoAccel) { from = X_DEFAULT; if ((s = (char *)xf86GetOptValString(VIAOptions, OPTION_ACCELMETHOD))) { -@@ -1235,13 +1300,13 @@ +@@ -1235,13 +1305,13 @@ pVia->exaScratchSize); } } @@ -3420,7 +3702,7 @@ Index: src/via_driver.c pVia->hwcursor = !pVia->hwcursor; from = X_CONFIG; } -@@ -1346,8 +1411,8 @@ +@@ -1346,8 +1416,8 @@ pVia->ActiveDevice |= VIA_DEVICE_CRT; if (strstr(s, "LCD")) pVia->ActiveDevice |= VIA_DEVICE_LCD; @@ -3431,7 +3713,7 @@ Index: src/via_driver.c if (strstr(s, "TV")) pVia->ActiveDevice |= VIA_DEVICE_TV; } -@@ -1375,45 +1440,24 @@ +@@ -1375,45 +1445,24 @@ xf86DrvMsg(pScrn->scrnIndex, from, "DVI Center is %s.\n", pBIOSInfo->Center ? "enabled" : "disabled"); @@ -3486,7 +3768,7 @@ Index: src/via_driver.c /* Force the use of the Panel? */ pBIOSInfo->ForcePanel = FALSE; from = xf86GetOptValBool(VIAOptions, OPTION_FORCEPANEL, -@@ -1504,7 +1548,6 @@ +@@ -1504,7 +1553,6 @@ VIAFreeRec(pScrn); return FALSE; } @@ -3494,7 +3776,7 @@ Index: src/via_driver.c #ifdef HAVE_DEBUG //pVia->PrintVGARegs = FALSE; -@@ -1607,18 +1650,21 @@ +@@ -1607,18 +1655,21 @@ return FALSE; } @@ -3525,7 +3807,7 @@ Index: src/via_driver.c "Using VBE to set modes to work around this.\n"); pVia->useVBEModes = TRUE; } -@@ -1755,9 +1801,7 @@ +@@ -1755,9 +1806,7 @@ #endif if (!pVia->NoAccel) { @@ -3535,7 +3817,7 @@ Index: src/via_driver.c XF86ModReqInfo req; int errmaj, errmin; -@@ -1770,16 +1814,8 @@ +@@ -1770,16 +1819,8 @@ VIAFreeRec(pScrn); return FALSE; } @@ -3552,7 +3834,7 @@ Index: src/via_driver.c if (!xf86LoadSubModule(pScrn, "xaa")) { VIAFreeRec(pScrn); return FALSE; -@@ -1836,7 +1872,7 @@ +@@ -1836,7 +1877,7 @@ /* A patch for APM suspend/resume, when HWCursor has garbage. */ if (pVia->hwcursor) @@ -3561,16 +3843,26 @@ Index: src/via_driver.c /* Restore video status. */ if (!pVia->IsSecondary) -@@ -1890,7 +1926,7 @@ +@@ -1890,8 +1931,16 @@ viaAccelSync(pScrn); /* A soft reset helps to avoid a 3D hang on VT switch. */ - if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900) -+ if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900 && pVia->Chipset != VIA_VX800) - hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); +- hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); ++ switch (pVia->Chipset) { ++ case VIA_K8M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ case VIA_VX855: ++ break; ++ default: ++ hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); ++ break; ++ } #ifdef XF86DRI -@@ -1908,7 +1944,7 @@ + if (pVia->directRenderingEnabled) { +@@ -1908,7 +1957,7 @@ viaSaveVideo(pScrn); if (pVia->hwcursor) @@ -3579,7 +3871,7 @@ Index: src/via_driver.c if (pVia->pVbe && pVia->vbeSR) ViaVbeSaveRestore(pScrn, MODE_RESTORE); -@@ -1918,7 +1954,40 @@ +@@ -1918,7 +1967,40 @@ vgaHWLock(hwp); } @@ -3620,7 +3912,7 @@ Index: src/via_driver.c static void VIASave(ScrnInfoPtr pScrn) { -@@ -2009,6 +2078,7 @@ +@@ -2009,6 +2091,7 @@ Regs->CR35 = hwp->readCrtc(hwp, 0x35); Regs->CR36 = hwp->readCrtc(hwp, 0x36); @@ -3628,7 +3920,7 @@ Index: src/via_driver.c Regs->CR49 = hwp->readCrtc(hwp, 0x49); DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "TVSave...\n")); -@@ -2019,15 +2089,23 @@ +@@ -2019,15 +2102,28 @@ for (i = 0; i < 68; i++) Regs->CRTCRegs[i] = hwp->readCrtc(hwp, i + 0x50); @@ -3653,13 +3945,18 @@ Index: src/via_driver.c + } + + /* Save TMDS status */ -+ if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) -+ Regs->CRD2 = hwp->readCrtc(hwp, 0xD2); ++ switch (pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_VX800: ++ case VIA_VX855: ++ Regs->CRD2 = hwp->readCrtc(hwp, 0xD2); ++ break; ++ } + vgaHWProtect(pScrn, FALSE); } } -@@ -2055,6 +2133,8 @@ +@@ -2055,6 +2151,8 @@ hwp->writeCrtc(hwp, 0x6B, 0x00); hwp->writeCrtc(hwp, 0x6C, 0x00); @@ -3668,7 +3965,7 @@ Index: src/via_driver.c if (pBIOSInfo->TVI2CDev) ViaTVRestore(pScrn); -@@ -2118,22 +2198,31 @@ +@@ -2118,22 +2216,36 @@ hwp->writeCrtc(hwp, 0x35, Regs->CR35); hwp->writeCrtc(hwp, 0x36, Regs->CR36); @@ -3703,14 +4000,19 @@ Index: src/via_driver.c + } + + /* Restore TMDS status */ -+ if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) -+ hwp->writeCrtc(hwp, 0xD2, Regs->CRD2); ++ switch (pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_VX800: ++ case VIA_VX855: ++ hwp->writeCrtc(hwp, 0xD2, Regs->CRD2); ++ break; ++ } + + if (pBIOSInfo->Panel->IsActive) ViaLCDPower(pScrn, TRUE); ViaDisablePrimaryFIFO(pScrn); -@@ -2145,26 +2234,61 @@ +@@ -2145,26 +2257,63 @@ vgaHWProtect(pScrn, FALSE); } @@ -3725,6 +4027,7 @@ Index: src/via_driver.c + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + ViaSeqMask(hwp, 0x1A, 0x08, 0x08); + break; + default: @@ -3747,6 +4050,7 @@ Index: src/via_driver.c + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + ViaSeqMask(hwp, 0x1A, 0x00, 0x08); + break; + default: @@ -3780,7 +4084,7 @@ Index: src/via_driver.c xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "mapping MMIO @ 0x%lx with size 0x%x\n", pVia->MmioBase, VIA_MMIO_REGSIZE); -@@ -2196,8 +2320,7 @@ +@@ -2196,8 +2345,7 @@ err = pci_device_map_range(pVia->PciInfo, pVia->MmioBase + VIA_MMIO_BLTBASE, VIA_MMIO_BLTSIZE, @@ -3790,7 +4094,7 @@ Index: src/via_driver.c (void **)&pVia->BltBase); if (err) { -@@ -2215,7 +2338,7 @@ +@@ -2215,7 +2363,7 @@ if (!pVia->MapBase || !pVia->BltBase) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, @@ -3799,7 +4103,7 @@ Index: src/via_driver.c return FALSE; } -@@ -2238,14 +2361,15 @@ +@@ -2238,14 +2386,15 @@ hwp->writeMiscOut(hwp, val | 0x01); /* Unlock extended IO space. */ @@ -3821,7 +4125,7 @@ Index: src/via_driver.c vgaHWGetIOBase(hwp); } -@@ -2257,8 +2381,12 @@ +@@ -2257,8 +2406,12 @@ VIAMapFB(ScrnInfoPtr pScrn) { VIAPtr pVia = VIAPTR(pScrn); @@ -3834,7 +4138,7 @@ Index: src/via_driver.c #endif DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAMapFB\n")); -@@ -2298,7 +2426,8 @@ +@@ -2298,7 +2451,8 @@ #ifdef XSERVER_LIBPCIACCESS err = pci_device_map_range(pVia->PciInfo, pVia->FrameBufferBase, pVia->videoRambytes, @@ -3844,7 +4148,7 @@ Index: src/via_driver.c (void **)&pVia->FBBase); if (err) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, -@@ -2346,8 +2475,7 @@ +@@ -2346,8 +2500,7 @@ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAUnmapMem\n")); @@ -3854,7 +4158,7 @@ Index: src/via_driver.c #ifdef XSERVER_LIBPCIACCESS if (pVia->MapBase) -@@ -2431,75 +2559,65 @@ +@@ -2431,75 +2584,65 @@ { vgaHWPtr hwp = VGAHWPTR(pScrn); VIAPtr pVia = VIAPTR(pScrn); @@ -3969,7 +4273,7 @@ Index: src/via_driver.c for (i = 0; i < numColors; i++) { index = indices[i]; hwp->writeDacWriteAddr(hwp, index); -@@ -2507,6 +2625,23 @@ +@@ -2507,6 +2650,23 @@ hwp->writeDacData(hwp, colors[index].green); hwp->writeDacData(hwp, colors[index].blue); } @@ -3993,7 +4297,7 @@ Index: src/via_driver.c } } -@@ -2543,6 +2678,7 @@ +@@ -2543,6 +2703,7 @@ } } else { vgaHWBlankScreen(pScrn, FALSE); @@ -4001,7 +4305,7 @@ Index: src/via_driver.c if (!VIAWriteMode(pScrn, pScrn->currentMode)) { vgaHWBlankScreen(pScrn, TRUE); return FALSE; -@@ -2623,7 +2759,8 @@ +@@ -2623,7 +2784,8 @@ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- SW cursor set up\n")); if (pVia->hwcursor) { @@ -4011,7 +4315,7 @@ Index: src/via_driver.c xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Hardware cursor initialization failed\n"); } -@@ -2787,6 +2924,7 @@ +@@ -2787,6 +2949,7 @@ VIAWriteMode(ScrnInfoPtr pScrn, DisplayModePtr mode) { VIAPtr pVia = VIAPTR(pScrn); @@ -4019,7 +4323,7 @@ Index: src/via_driver.c DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAWriteMode\n")); -@@ -2799,10 +2937,15 @@ +@@ -2799,10 +2962,15 @@ if (!vgaHWInit(pScrn, mode)) return FALSE; @@ -4039,21 +4343,31 @@ Index: src/via_driver.c } else { -@@ -2813,22 +2956,19 @@ +@@ -2813,22 +2981,25 @@ * to detect when the display is using the secondary head. * TODO: This should be enabled for other chipsets as well. */ - if (pVia->Chipset == VIA_P4M900 && pVia->pBIOSInfo->PanelActive) { -+ if ((pVia->Chipset == VIA_P4M900 || pVia->Chipset == VIA_VX800) && pVia->pBIOSInfo->Panel->IsActive) { - /* - * Since we are using virtual, we need to adjust - * the offset to match the framebuffer alignment. - */ +- /* +- * Since we are using virtual, we need to adjust +- * the offset to match the framebuffer alignment. +- */ - if (pScrn->displayWidth != mode->HDisplay) - ViaModeSecondaryVGAOffset(pScrn); - // ViaModeSecondaryVGAFixAlignment(pScrn, mode); -+ if (pScrn->displayWidth != mode->CrtcHDisplay) -+ ViaSecondCRTCHorizontalOffset(pScrn); ++ if (pVia->pBIOSInfo->Panel->IsActive) { ++ switch (pVia->Chipset) { ++ case VIA_P4M900: ++ case VIA_VX800: ++ case VIA_VX855: ++ /* ++ * Since we are using virtual, we need to adjust ++ * the offset to match the framebuffer alignment. ++ */ ++ if (pScrn->displayWidth != mode->CrtcHDisplay) ++ ViaSecondCRTCHorizontalOffset(pScrn); ++ break; ++ } } } @@ -4065,14 +4379,22 @@ Index: src/via_driver.c viaInitialize2DEngine(pScrn); } -@@ -2856,14 +2996,15 @@ +@@ -2856,14 +3027,22 @@ viaAccelSync(pScrn); /* A soft reset avoids a 3D hang after X restart. */ - if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900) -+ if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900 && -+ pVia->Chipset != VIA_VX800) - hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); +- hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); ++ switch (pVia->Chipset) { ++ case VIA_K8M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ case VIA_VX855: ++ break; ++ default : ++ hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); ++ break; ++ } if (!pVia->IsSecondary) { /* Turn off all video activities. */ @@ -4084,7 +4406,7 @@ Index: src/via_driver.c } if (pVia->VQEnable) -@@ -2875,10 +3016,6 @@ +@@ -2875,10 +3054,6 @@ #endif viaExitAccel(pScreen); @@ -4095,7 +4417,7 @@ Index: src/via_driver.c if (pVia->ShadowPtr) { xfree(pVia->ShadowPtr); pVia->ShadowPtr = NULL; -@@ -2936,24 +3073,17 @@ +@@ -2936,24 +3111,17 @@ if (pVia->pVbe) { ViaVbeAdjustFrame(scrnIndex, x, y, flags); } else { @@ -4130,7 +4452,7 @@ Index: src/via_driver.c } } -@@ -3003,52 +3133,65 @@ +@@ -3003,52 +3171,65 @@ vgaHWPtr hwp = VGAHWPTR(pScrn); VIAPtr pVia = VIAPTR(pScrn); VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; @@ -4229,7 +4551,7 @@ Index: src/via_driver.c void VIAInitialize3DEngine(ScrnInfoPtr pScrn) { -@@ -3111,4 +3254,3 @@ +@@ -3111,4 +3292,3 @@ VIASETREG(VIA_REG_TRANSPACE, 0x11000000); VIASETREG(VIA_REG_TRANSPACE, 0x20000000); } @@ -4237,8 +4559,8 @@ Index: src/via_driver.c Index: src/via_crtc.c =================================================================== --- src/via_crtc.c (.../tags/release_0_2_903) (revision 0) -+++ src/via_crtc.c (.../trunk) (revision 751) -@@ -0,0 +1,659 @@ ++++ src/via_crtc.c (.../trunk) (revision 758) +@@ -0,0 +1,664 @@ +/* + * Copyright 2005-2007 The Openchrome Project [openchrome.org] + * Copyright 2004-2005 The Unichrome Project [unichrome.sf.net] @@ -4414,6 +4736,7 @@ Index: src/via_crtc.c + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + break; + default: + ViaSeqMask(hwp, 0x16, 0x08, 0xBF); @@ -4517,6 +4840,7 @@ Index: src/via_crtc.c + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + break; + default: + /* some leftovers */ @@ -4551,6 +4875,7 @@ Index: src/via_crtc.c + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + break; + default: + /* some leftovers */ @@ -4670,6 +4995,7 @@ Index: src/via_crtc.c + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + break; + default: + ViaSeqMask(hwp, 0x16, 0x08, 0xBF); @@ -4753,6 +5079,7 @@ Index: src/via_crtc.c + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + break; + default: + /* some leftovers */ @@ -4900,8 +5227,8 @@ Index: src/via_crtc.c +} Index: src/via_swov.c =================================================================== ---- src/via_swov.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_swov.c (.../trunk) (revision 751) +--- src/via_swov.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_swov.c (.../trunk) (revision 758) @@ -95,7 +95,8 @@ pdwState = (CARD32 volatile *)(pVia->VidMapBase + (HQV_CONTROL + proReg)); @@ -4912,11 +5239,12 @@ Index: src/via_swov.c } else { while (!(*pdwState & HQV_FLIP_STATUS)) ; } -@@ -280,6 +281,14 @@ +@@ -280,6 +281,15 @@ HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE; HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE; break; + case VIA_VX800: ++ case VIA_VX855: + HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE; + HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE; + HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE; @@ -4927,65 +5255,109 @@ Index: src/via_swov.c default: xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "VIAVidHWDiffInit: Unhandled ChipSet.\n"); -@@ -774,6 +783,7 @@ +@@ -774,6 +784,8 @@ case PCI_CHIP_VT3364: case PCI_CHIP_VT3324: case PCI_CHIP_VT3327: + case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: model = 0; break; case PCI_CHIP_CLE3122: -@@ -911,6 +921,7 @@ +@@ -911,6 +923,8 @@ case PCI_CHIP_VT3336: case PCI_CHIP_VT3324: case PCI_CHIP_VT3364: + case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: case PCI_CHIP_CLE3122: VIDOutD(V1_ColorSpaceReg_2, col2); VIDOutD(V1_ColorSpaceReg_1, col1); -@@ -939,6 +950,7 @@ +@@ -939,6 +953,8 @@ case PCI_CHIP_VT3336: case PCI_CHIP_VT3324: case PCI_CHIP_VT3364: + case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: return (VIDEO_HQV_INUSE | SW_USE_HQV | VIDEO_1_INUSE | VIDEO_ACTIVE | VIDEO_SHOW); case PCI_CHIP_CLE3122: -@@ -976,6 +988,7 @@ +@@ -976,7 +992,10 @@ case PCI_CHIP_VT3336: case PCI_CHIP_VT3324: case PCI_CHIP_VT3364: + case PCI_CHIP_VT3353: return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3336; ++ case PCI_CHIP_VT3409: ++ return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3409; case PCI_CHIP_CLE3122: if (CLE266_REV_IS_CX(pVia->ChipRev)) -@@ -1258,7 +1271,8 @@ + return V3_ENABLE | V3_EXPIRE_NUM_F; +@@ -1256,23 +1275,28 @@ + static void + SetFIFO_V3(VIAPtr pVia, CARD8 depth, CARD8 prethreshold, CARD8 threshold) { - if ((pVia->ChipId == PCI_CHIP_VT3314) - || (pVia->ChipId == PCI_CHIP_VT3324) +- if ((pVia->ChipId == PCI_CHIP_VT3314) +- || (pVia->ChipId == PCI_CHIP_VT3324) - || (pVia->ChipId == PCI_CHIP_VT3327)) { -+ || (pVia->ChipId == PCI_CHIP_VT3327 -+ || (pVia->ChipId == PCI_CHIP_VT3353))) { - SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, - (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) - | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); -@@ -1320,6 +1334,7 @@ +- SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, +- (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) +- | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); +- SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, +- (VIDInD(ALPHA_V3_PREFIFO_CONTROL) +- & ~V3_FIFO_MASK_3314) | (prethreshold & 0xff)); +- } else { +- SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, +- (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) +- | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); +- SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, +- (VIDInD(ALPHA_V3_PREFIFO_CONTROL) & ~V3_FIFO_MASK) +- | (prethreshold & 0x7f)); +- } ++ switch (pVia->ChipId) { ++ case PCI_CHIP_VT3314: ++ case PCI_CHIP_VT3324: ++ case PCI_CHIP_VT3327: ++ case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: ++ SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, ++ (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) ++ | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); ++ SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, ++ (VIDInD(ALPHA_V3_PREFIFO_CONTROL) ++ & ~V3_FIFO_MASK_3314) | (prethreshold & 0xff)); ++ break; ++ default : ++ SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, ++ (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) ++ | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); ++ SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, ++ (VIDInD(ALPHA_V3_PREFIFO_CONTROL) & ~V3_FIFO_MASK) ++ | (prethreshold & 0x7f)); ++ break; ++ } + } + + static void +@@ -1320,6 +1344,8 @@ case PCI_CHIP_VT3336: case PCI_CHIP_VT3324: case PCI_CHIP_VT3364: + case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: SetFIFO_V3(pVia, 225, 200, 250); break; case PCI_CHIP_VT3204: -@@ -1351,6 +1366,7 @@ +@@ -1351,6 +1377,8 @@ case PCI_CHIP_VT3336: case PCI_CHIP_VT3324: case PCI_CHIP_VT3364: + case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: SetFIFO_V3(pVia, 225, 200, 250); break; case PCI_CHIP_VT3204: -@@ -1674,6 +1690,7 @@ +@@ -1674,6 +1702,7 @@ unsigned long chromaKeyLow, unsigned long chromaKeyHigh) { VIAPtr pVia = VIAPTR(pScrn); @@ -4993,7 +5365,7 @@ Index: src/via_swov.c vgaHWPtr hwp = VGAHWPTR(pScrn); VIAHWDiff *hwDiff = &pVia->HWDiff; -@@ -1707,8 +1724,15 @@ +@@ -1707,8 +1736,15 @@ pUpdate->DstLeft, pUpdate->DstRight, pUpdate->DstTop, pUpdate->DstBottom)); @@ -5011,7 +5383,7 @@ Index: src/via_swov.c pVia->swov.overlayRecordV1.dwHeight = dstHeight = pUpdate->DstBottom - pUpdate->DstTop; srcWidth = (unsigned long)pUpdate->SrcRight - pUpdate->SrcLeft; -@@ -1729,7 +1753,8 @@ +@@ -1729,7 +1765,8 @@ */ if ((pVia->VideoEngine == VIDEO_ENGINE_CME || pVia->Chipset == VIA_VM800) @@ -5021,14 +5393,14 @@ Index: src/via_swov.c /* V1_ON_SND_DISPLAY */ vidCtl |= 0x80000000; /* SECOND_DISPLAY_COLOR_KEY_ENABLE */ -@@ -1983,6 +2008,15 @@ +@@ -1983,6 +2020,15 @@ compose = SetChromaKey(pVia, videoFlag, chromaKeyLow, chromaKeyHigh, miniCtl, compose); + if (pVia->VideoEngine == VIDEO_ENGINE_CME) { + VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL1,0); + VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL3,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1)); -+ if (pVia->Chipset == VIA_VX800) { ++ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) { + VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL2,0); + VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL4,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1)); + } @@ -5039,8 +5411,8 @@ Index: src/via_swov.c Index: src/via_driver.h =================================================================== ---- src/via_driver.h (.../tags/release_0_2_903) (revision 751) -+++ src/via_driver.h (.../trunk) (revision 751) +--- src/via_driver.h (.../tags/release_0_2_903) (revision 758) ++++ src/via_driver.h (.../trunk) (revision 758) @@ -65,6 +65,7 @@ #include "via_swov.h" #include "via_dmabuffer.h" @@ -5209,8 +5581,8 @@ Index: src/via_driver.h Bool viaInitAccel(ScreenPtr); Index: src/via_bios.h =================================================================== ---- src/via_bios.h (.../tags/release_0_2_903) (revision 751) -+++ src/via_bios.h (.../trunk) (revision 751) +--- src/via_bios.h (.../tags/release_0_2_903) (revision 758) ++++ src/via_bios.h (.../trunk) (revision 758) @@ -34,6 +34,14 @@ #define VIA_PANEL14X10 5 #define VIA_PANEL16X12 6 @@ -5377,8 +5749,8 @@ Index: src/via_bios.h #endif /* _VIA_BIOS_H_ */ Index: src/via_bandwidth.c =================================================================== ---- src/via_bandwidth.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_bandwidth.c (.../trunk) (revision 751) +--- src/via_bandwidth.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_bandwidth.c (.../trunk) (revision 758) @@ -227,6 +227,10 @@ ViaSeqMask(hwp, 0x18, 0x00, 0x80); break; @@ -5390,7 +5762,7 @@ Index: src/via_bandwidth.c break; case VIA_CX700: hwp->writeSeq(hwp, 0x16, 0x26); -@@ -234,6 +238,12 @@ +@@ -234,6 +238,17 @@ hwp->writeSeq(hwp, 0x18, 0x66); hwp->writeSeq(hwp, 0x22, 0x1F); break; @@ -5400,10 +5772,15 @@ Index: src/via_bandwidth.c + hwp->writeSeq(hwp, 0x18, 0x26); /* 152/4 = 38 */ + hwp->writeSeq(hwp, 0x22, 0x10); /* 64/4 = 16 */ + break; ++ case VIA_VX855: ++ hwp->writeSeq(hwp, 0x16, 0x50); /* 320/4 = 80 */ ++ hwp->writeSeq(hwp, 0x17, 0xC7); /* 400/2-1 = 199 */ ++ hwp->writeSeq(hwp, 0x18, 0x50); /* 320/4 = 80 */ ++ hwp->writeSeq(hwp, 0x22, 0x28); /* 160/4 = 40 */ default: xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetPrimaryFIFO: " "Chipset %d not implemented\n", pVia->Chipset); -@@ -385,6 +395,23 @@ +@@ -385,6 +400,25 @@ else ViaCrtcMask(hwp, 0x94, 0x20, 0x7F); break; @@ -5424,13 +5801,15 @@ Index: src/via_bandwidth.c + else + ViaCrtcMask(hwp, 0x94, 0x20, 0x7F); + break; ++ case VIA_VX855: ++ break; default: xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetSecondaryFIFO: " "Chipset %d not implemented\n", pVia->Chipset); Index: src/via_display.c =================================================================== --- src/via_display.c (.../tags/release_0_2_903) (revision 0) -+++ src/via_display.c (.../trunk) (revision 751) ++++ src/via_display.c (.../trunk) (revision 758) @@ -0,0 +1,145 @@ +#ifdef HAVE_CONFIG_H +#include "config.h" @@ -5579,8 +5958,8 @@ Index: src/via_display.c + Index: src/via_regs.h =================================================================== ---- src/via_regs.h (.../tags/release_0_2_903) (revision 751) -+++ src/via_regs.h (.../trunk) (revision 751) +--- src/via_regs.h (.../tags/release_0_2_903) (revision 758) ++++ src/via_regs.h (.../trunk) (revision 758) @@ -42,7 +42,7 @@ #define VIA_MMIO_REGBASE 0x0 #define VIA_MMIO_VGABASE 0x8000 @@ -5690,8 +6069,8 @@ Index: src/via_regs.h #define VIA_GEC_NOOP 0x00000000 Index: src/via_accel.c =================================================================== ---- src/via_accel.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_accel.c (.../trunk) (revision 751) +--- src/via_accel.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_accel.c (.../trunk) (revision 758) @@ -1,5 +1,5 @@ /* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. @@ -5795,7 +6174,7 @@ Index: src/via_accel.c /* * Use PCI MMIO to flush the command buffer when AGP DMA is not available. */ -@@ -104,15 +193,26 @@ +@@ -104,15 +193,27 @@ * for an unacceptable amount of time in VIASETREG while * other high priority interrupts may be pending. */ @@ -5806,6 +6185,7 @@ Index: src/via_accel.c - && (loop++ < MAXLOOP)) ; + switch (pVia->Chipset) { + case VIA_VX800: ++ case VIA_VX855: + while ((VIAGETREG(VIA_REG_STATUS) & + (VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5)) + && (loop++ < MAXLOOP)) ; @@ -5830,7 +6210,7 @@ Index: src/via_accel.c } offset = (*bp++ & 0x0FFFFFFF) << 2; value = *bp++; -@@ -314,8 +414,8 @@ +@@ -314,8 +415,8 @@ VIAPtr pVia = VIAPTR(pScrn); switch (pVia->Chipset) { @@ -5840,7 +6220,7 @@ Index: src/via_accel.c VIASETREG(0x41c, 0x00100000); VIASETREG(0x420, 0x74301000); break; -@@ -367,12 +467,29 @@ +@@ -367,12 +468,30 @@ int i; /* Initialize the 2D engine registers to reset the 2D engine. */ @@ -5849,7 +6229,7 @@ Index: src/via_accel.c VIASETREG(i, 0x0); } -+ if (pVia->Chipset == VIA_VX800) { ++ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) { + for (i = 0x44; i < 0x5c; i += 4) { + VIASETREG(i, 0x0); + } @@ -5858,6 +6238,7 @@ Index: src/via_accel.c + /* Make the VIA_REG() macro magic work */ switch (pVia->Chipset) { + case VIA_VX800: ++ case VIA_VX855: + pVia->TwodRegs = via_2d_regs_m1; + break; + default: @@ -5871,7 +6252,7 @@ Index: src/via_accel.c viaInitPCIe(pVia); break; default: -@@ -383,6 +500,7 @@ +@@ -383,6 +502,7 @@ if (pVia->VQStart != 0) { switch (pVia->Chipset) { case VIA_K8M890: @@ -5879,11 +6260,12 @@ Index: src/via_accel.c viaEnablePCIeVQ(pVia); break; default: -@@ -408,11 +526,16 @@ +@@ -408,11 +528,17 @@ mem_barrier(); switch (pVia->Chipset) { + case VIA_VX800: ++ case VIA_VX855: + while ((VIAGETREG(VIA_REG_STATUS) & + (VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5 | VIA_3D_ENG_BUSY_H5)) + && (loop++ < MAXLOOP)) ; @@ -5897,7 +6279,7 @@ Index: src/via_accel.c && (loop++ < MAXLOOP)) ; break; default: -@@ -455,18 +578,40 @@ +@@ -455,18 +581,40 @@ } /* @@ -5910,7 +6292,7 @@ Index: src/via_accel.c + unsigned val = (dstPitch >> 3) << 16 | (srcPitch >> 3); + RING_VARS; + -+ if (pVia->Chipset != VIA_VX800) { ++ if (pVia->Chipset != VIA_VX800 && pVia->Chipset != VIA_VX855) { + val |= VIA_PITCH_ENABLE; + } + OUT_RING_H1(VIA_REG(pVia, PITCH), val); @@ -5941,7 +6323,7 @@ Index: src/via_accel.c } else { tdc->cmd &= ~VIA_GEC_CLIP_ENABLE; } -@@ -477,18 +622,20 @@ +@@ -477,18 +625,20 @@ * Emit a solid blit operation to the command buffer. */ static void @@ -5970,7 +6352,7 @@ Index: src/via_accel.c } /* -@@ -534,16 +681,19 @@ +@@ -534,16 +684,19 @@ * Emit transparency state and color to the command buffer. */ static void @@ -5995,7 +6377,7 @@ Index: src/via_accel.c } } -@@ -551,11 +701,13 @@ +@@ -551,11 +704,13 @@ * Emit a copy blit operation to the command buffer. */ static void @@ -6010,7 +6392,7 @@ Index: src/via_accel.c if (cmd & VIA_GEC_DECY) { ys += h - 1; yd += h - 1; -@@ -567,15 +719,14 @@ +@@ -567,15 +722,14 @@ } BEGIN_RING(16); @@ -6034,7 +6416,7 @@ Index: src/via_accel.c } /* -@@ -603,7 +754,7 @@ +@@ -603,7 +757,7 @@ cmd |= VIA_GEC_DECY; tdc->cmd = cmd; @@ -6043,7 +6425,7 @@ Index: src/via_accel.c trans_color, FALSE); } -@@ -620,8 +771,8 @@ +@@ -620,8 +774,8 @@ if (!w || !h) return; @@ -6054,7 +6436,7 @@ Index: src/via_accel.c pScrn->fbOffset + pVia->Bpl * y1, pScrn->fbOffset + pVia->Bpl * sub, tdc->mode, pVia->Bpl, pVia->Bpl, tdc->cmd); -@@ -641,7 +792,7 @@ +@@ -641,7 +795,7 @@ tdc->cmd = VIA_GEC_BLT | VIA_GEC_FIXCOLOR_PAT | VIAACCELPATTERNROP(rop); tdc->fgColor = color; @@ -6063,7 +6445,7 @@ Index: src/via_accel.c } static void -@@ -656,8 +807,8 @@ +@@ -656,8 +810,8 @@ if (!w || !h) return; @@ -6074,7 +6456,7 @@ Index: src/via_accel.c pScrn->fbOffset + pVia->Bpl * sub, tdc->mode, pVia->Bpl, tdc->fgColor, tdc->cmd); ADVANCE_RING; -@@ -697,7 +848,7 @@ +@@ -697,7 +851,7 @@ tdc->bgColor = bg; tdc->pattern0 = pattern0; tdc->pattern1 = pattern1; @@ -6083,7 +6465,7 @@ Index: src/via_accel.c } static void -@@ -716,21 +867,21 @@ +@@ -716,21 +870,21 @@ return; patOffset = ((patOffy & 0x7) << 29) | ((patOffx & 0x7) << 26); @@ -6117,7 +6499,7 @@ Index: src/via_accel.c ADVANCE_RING; } -@@ -745,7 +896,7 @@ +@@ -745,7 +899,7 @@ tdc->cmd = VIA_GEC_BLT | VIAACCELPATTERNROP(rop); tdc->patternAddr = (patternx * pVia->Bpp + patterny * pVia->Bpl); @@ -6126,7 +6508,7 @@ Index: src/via_accel.c trans_color, FALSE); } -@@ -766,17 +917,17 @@ +@@ -766,17 +920,17 @@ patAddr = (tdc->patternAddr >> 3) | ((patOffy & 0x7) << 29) | ((patOffx & 0x7) << 26); @@ -6152,7 +6534,7 @@ Index: src/via_accel.c ADVANCE_RING; } -@@ -810,7 +961,7 @@ +@@ -810,7 +964,7 @@ ADVANCE_RING; @@ -6161,7 +6543,7 @@ Index: src/via_accel.c } static void -@@ -829,11 +980,11 @@ +@@ -829,11 +983,11 @@ (y + h - 1)); } @@ -6177,7 +6559,7 @@ Index: src/via_accel.c pScrn->fbOffset + sub * pVia->Bpl, tdc->mode, pVia->Bpl, pVia->Bpl, tdc->cmd); -@@ -852,7 +1003,7 @@ +@@ -852,7 +1006,7 @@ tdc->cmd = VIA_GEC_BLT | VIA_GEC_SRC_SYS | VIAACCELCOPYROP(rop); ADVANCE_RING; @@ -6186,7 +6568,7 @@ Index: src/via_accel.c trans_color, FALSE); } -@@ -871,8 +1022,8 @@ +@@ -871,8 +1025,8 @@ (y + h - 1)); } @@ -6197,7 +6579,7 @@ Index: src/via_accel.c pScrn->fbOffset + pVia->Bpl * sub, tdc->mode, pVia->Bpl, pVia->Bpl, tdc->cmd); -@@ -889,15 +1040,15 @@ +@@ -889,15 +1043,15 @@ RING_VARS; @@ -6217,7 +6599,7 @@ Index: src/via_accel.c } static void -@@ -912,7 +1063,7 @@ +@@ -912,7 +1066,7 @@ RING_VARS; @@ -6226,7 +6608,7 @@ Index: src/via_accel.c cmd = tdc->cmd | VIA_GEC_LINE; dx = x2 - x1; -@@ -944,8 +1095,8 @@ +@@ -944,8 +1098,8 @@ y2 -= sub; BEGIN_RING(14); @@ -6237,7 +6619,7 @@ Index: src/via_accel.c /* * major = 2*dmaj, minor = 2*dmin, err = -dmaj - ((bias >> octant) & 1) -@@ -953,14 +1104,14 @@ +@@ -953,14 +1107,14 @@ * Error Term = (StartXdashed = TRUE; BEGIN_RING(8); @@ -6312,7 +6694,7 @@ Index: src/via_accel.c } static void -@@ -1129,8 +1280,8 @@ +@@ -1129,8 +1283,8 @@ CPU_TRANSFER_PAD_DWORD | SCANLINE_PAD_DWORD | BIT_ORDER_IN_BYTE_MSBFIRST | @@ -6323,21 +6705,32 @@ Index: src/via_accel.c /* * Most Unichromes are much faster using processor-to-framebuffer writes -@@ -1140,14 +1291,19 @@ +@@ -1138,16 +1292,27 @@ + * test with x11perf -shmput500! + */ - if (pVia->Chipset != VIA_K8M800 && - pVia->Chipset != VIA_K8M890 && +- if (pVia->Chipset != VIA_K8M800 && +- pVia->Chipset != VIA_K8M890 && - pVia->Chipset != VIA_P4M900) -+ pVia->Chipset != VIA_P4M900 && -+ pVia->Chipset != VIA_VX800) - xaaptr->ImageWriteFlags |= NO_GXCOPY; +- xaaptr->ImageWriteFlags |= NO_GXCOPY; ++ switch (pVia->Chipset) { ++ case VIA_K8M800: ++ case VIA_K8M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ case VIA_VX855: ++ break; ++ default: ++ xaaptr->ImageWriteFlags |= NO_GXCOPY; ++ break; ++ } xaaptr->SetupForImageWrite = viaSetupForImageWrite; xaaptr->SubsequentImageWriteRect = viaSubsequentImageWriteRect; xaaptr->ImageWriteBase = pVia->BltBase; - xaaptr->ImageWriteRange = VIA_MMIO_BLTSIZE; -+ if (pVia->Chipset == VIA_VX800) ++ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) + xaaptr->ImageWriteRange = VIA_MMIO_BLTSIZE; + else + xaaptr->ImageWriteRange = (64 * 1024); @@ -6345,7 +6738,7 @@ Index: src/via_accel.c return XAAInit(pScreen, xaaptr); } -@@ -1173,8 +1329,8 @@ +@@ -1173,8 +1338,8 @@ if (pVia->agpDMA) { BEGIN_RING(2); @@ -6356,7 +6749,7 @@ Index: src/via_accel.c VIA_GEM_32bpp, 4, pVia->curMarker, (0xF0 << 24) | VIA_GEC_BLT | VIA_GEC_FIXCOLOR_PAT); ADVANCE_RING; -@@ -1238,7 +1394,6 @@ +@@ -1238,7 +1403,6 @@ } @@ -6364,7 +6757,7 @@ Index: src/via_accel.c /* * Exa functions. It is assumed that EXA does not exceed the blitter limits. */ -@@ -1259,7 +1414,7 @@ +@@ -1259,7 +1423,7 @@ if (!viaAccelPlaneMaskHelper(tdc, planeMask)) return FALSE; @@ -6373,7 +6766,7 @@ Index: src/via_accel.c tdc->cmd = VIA_GEC_BLT | VIA_GEC_FIXCOLOR_PAT | VIAACCELPATTERNROP(alu); -@@ -1283,7 +1438,7 @@ +@@ -1283,7 +1447,7 @@ dstPitch = exaGetPixmapPitch(pPixmap); dstOffset = exaGetPixmapOffset(pPixmap); @@ -6382,7 +6775,7 @@ Index: src/via_accel.c tdc->mode, dstPitch, tdc->fgColor, tdc->cmd); ADVANCE_RING; } -@@ -1325,7 +1480,7 @@ +@@ -1325,7 +1489,7 @@ if (!viaAccelPlaneMaskHelper(tdc, planeMask)) return FALSE; @@ -6391,7 +6784,7 @@ Index: src/via_accel.c return TRUE; } -@@ -1345,7 +1500,7 @@ +@@ -1345,7 +1509,7 @@ if (!width || !height) return; @@ -6400,17 +6793,17 @@ Index: src/via_accel.c srcOffset, dstOffset, tdc->mode, tdc->srcPitch, exaGetPixmapPitch(pDstPixmap), tdc->cmd); ADVANCE_RING; -@@ -1905,6 +2060,9 @@ +@@ -1905,6 +2069,9 @@ pMaskPicture->pDrawable->height < VIA_MIN_COMPOSITE) return FALSE; -+ if (pMaskPicture->repeat != RepeatNormal) ++ if (pMaskPicture && pMaskPicture->repeat != RepeatNormal) + return FALSE; + if (pMaskPicture && pMaskPicture->componentAlpha) { #ifdef VIA_DEBUG_COMPOSITE ErrorF("Component Alpha operation\n"); -@@ -2110,7 +2268,6 @@ +@@ -2110,7 +2277,6 @@ width, height); } @@ -6418,7 +6811,7 @@ Index: src/via_accel.c static ExaDriverPtr viaInitExa(ScreenPtr pScreen) -@@ -2185,80 +2342,8 @@ +@@ -2185,80 +2351,8 @@ return pExa; } @@ -6499,7 +6892,7 @@ Index: src/via_accel.c * Acceleration initializatuon function. Sets up offscreen memory disposition, * and initializes engines and acceleration method. */ -@@ -2273,16 +2358,14 @@ +@@ -2273,16 +2367,14 @@ pVia->VQStart = 0; if (((pVia->FBFreeEnd - pVia->FBFreeStart) >= VIA_VQ_SIZE) @@ -6522,7 +6915,7 @@ Index: src/via_accel.c viaInitialize2DEngine(pScrn); -@@ -2309,7 +2392,6 @@ +@@ -2309,7 +2401,6 @@ pVia->nPOT[0] = nPOTSupported; pVia->nPOT[1] = nPOTSupported; @@ -6530,7 +6923,7 @@ Index: src/via_accel.c #ifdef XF86DRI pVia->texAddr = NULL; pVia->dBounce = NULL; -@@ -2342,7 +2424,6 @@ +@@ -2342,7 +2433,6 @@ "[EXA] Enabled EXA acceleration.\n"); return TRUE; } @@ -6538,7 +6931,7 @@ Index: src/via_accel.c AvailFBArea.x1 = 0; AvailFBArea.y1 = 0; -@@ -2395,7 +2476,6 @@ +@@ -2395,7 +2485,6 @@ viaAccelSync(pScrn); viaTearDownCBuffer(&pVia->cb); @@ -6546,7 +6939,7 @@ Index: src/via_accel.c if (pVia->useEXA) { #ifdef XF86DRI if (pVia->directRenderingEnabled) { -@@ -2426,7 +2506,6 @@ +@@ -2426,7 +2515,6 @@ pVia->exaDriverPtr = NULL; return; } @@ -6554,7 +6947,7 @@ Index: src/via_accel.c if (pVia->AccelInfoRec) { XAADestroyInfoRec(pVia->AccelInfoRec); pVia->AccelInfoRec = NULL; -@@ -2444,7 +2523,6 @@ +@@ -2444,7 +2532,6 @@ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; VIAPtr pVia = VIAPTR(pScrn); @@ -6562,7 +6955,7 @@ Index: src/via_accel.c #ifdef XF86DRI int size, ret; -@@ -2455,12 +2533,7 @@ +@@ -2455,12 +2542,7 @@ if (!pVia->IsPCI) { /* Allocate upload and scratch space. */ @@ -6575,7 +6968,7 @@ Index: src/via_accel.c size = VIA_AGP_UPL_SIZE * 2 + 32; pVia->texAGPBuffer.context = 1; pVia->texAGPBuffer.size = size; -@@ -2516,7 +2589,6 @@ +@@ -2516,7 +2598,6 @@ pVia->scratchAddr = (char *)pVia->FBBase + pVia->scratchOffset; } } @@ -6583,7 +6976,7 @@ Index: src/via_accel.c if (Success != viaSetupCBuffer(pScrn, &pVia->cb, 0)) { pVia->NoAccel = TRUE; viaExitAccel(pScreen); -@@ -2554,8 +2626,8 @@ +@@ -2554,8 +2635,8 @@ cmd |= VIA_GEC_DECY; viaAccelSetMode(pScrn->bitsPerPixel, tdc); @@ -6594,7 +6987,7 @@ Index: src/via_accel.c tdc->mode, pVia->Bpl, pVia->Bpl, cmd); pVia->accelMarker = viaAccelMarkSync(pScrn->pScreen); ADVANCE_RING; -@@ -2578,8 +2650,8 @@ +@@ -2578,8 +2659,8 @@ if (!pVia->NoAccel) { viaAccelSetMode(pScrn->bitsPerPixel, tdc); @@ -6605,7 +6998,7 @@ Index: src/via_accel.c pVia->Bpl, color, cmd); pVia->accelMarker = viaAccelMarkSync(pScrn->pScreen); ADVANCE_RING; -@@ -2604,8 +2676,8 @@ +@@ -2604,8 +2685,8 @@ if (!pVia->NoAccel) { viaAccelSetMode(depth, tdc); @@ -6618,8 +7011,8 @@ Index: src/via_accel.c ADVANCE_RING; Index: src/via_memory.c =================================================================== ---- src/via_memory.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_memory.c (.../trunk) (revision 751) +--- src/via_memory.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_memory.c (.../trunk) (revision 758) @@ -52,7 +52,6 @@ * 2 - DRM */ @@ -6682,8 +7075,8 @@ Index: src/via_memory.c long size = pVia->FBFreeEnd / pVia->Bpp - offset; Index: src/via_vbe.c =================================================================== ---- src/via_vbe.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_vbe.c (.../trunk) (revision 751) +--- src/via_vbe.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_vbe.c (.../trunk) (revision 758) @@ -95,7 +95,7 @@ /* Set Active Device and translate BIOS byte definition. */ if (pBIOSInfo->CrtActive) @@ -6713,8 +7106,8 @@ Index: src/via_vbe.c VBEDPMSSet(pVia->pVbe, mode); Index: src/via_cursor.c =================================================================== ---- src/via_cursor.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_cursor.c (.../trunk) (revision 751) +--- src/via_cursor.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_cursor.c (.../trunk) (revision 758) @@ -1,5 +1,6 @@ /* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. @@ -6723,7 +7116,7 @@ Index: src/via_cursor.c * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a -@@ -35,20 +36,93 @@ +@@ -35,20 +36,94 @@ #include "via.h" #include "via_driver.h" @@ -6793,6 +7186,7 @@ Index: src/via_cursor.c + case VIA_P4M890: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + if (pVia->pBIOSInfo->FirstCRTC->IsActive) { + pVia->CursorRegControl = VIA_REG_HI_CONTROL0; + pVia->CursorRegBase = VIA_REG_HI_BASE0; @@ -6822,7 +7216,7 @@ Index: src/via_cursor.c DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAHWCursorInit\n")); infoPtr = xf86CreateCursorInfoRec(); if (!infoPtr) -@@ -56,168 +130,361 @@ +@@ -56,168 +131,475 @@ pVia->CursorInfoRec = infoPtr; @@ -6877,6 +7271,7 @@ Index: src/via_cursor.c + case VIA_P4M890: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + if (pVia->pBIOSInfo->FirstCRTC->IsActive) { + VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, 0x00FFFFFF); + VIASETREG(VIA_REG_V327_HI_INVTCOLOR, 0x00FFFFFF); @@ -6940,6 +7335,7 @@ Index: src/via_cursor.c + case VIA_P4M890: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + if (pVia->pBIOSInfo->FirstCRTC->IsActive) { + pVia->CursorPrimHiInvtColor = VIAGETREG(VIA_REG_PRIM_HI_INVTCOLOR); + pVia->CursorV327HiInvtColor = VIAGETREG(VIA_REG_V327_HI_INVTCOLOR); @@ -6985,6 +7381,7 @@ Index: src/via_cursor.c + case VIA_P4M890: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + if (pVia->pBIOSInfo->FirstCRTC->IsActive) { + VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, pVia->CursorPrimHiInvtColor); + VIASETREG(VIA_REG_V327_HI_INVTCOLOR, pVia->CursorV327HiInvtColor); @@ -7018,22 +7415,39 @@ Index: src/via_cursor.c + CARD32 control = pVia->CursorRegControl; - viaAccelSync(pScrn); -+ temp = -+ (1 << 30) | -+ (1 << 29) | -+ (1 << 28) | -+ (1 << 26) | -+ (1 << 25) | -+ (1 << 2) | -+ (1 << 0); ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ VIASETREG(VIA_REG_HI_CONTROL0, 0x36000005); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ VIASETREG(VIA_REG_HI_CONTROL1, 0xb6000005); ++ } ++ break; ++ ++ default: ++ /* temp = 0x36000005 */ ++ temp = ++ (1 << 29) | ++ (1 << 28) | ++ (1 << 26) | ++ (1 << 25) | ++ (1 << 2) | ++ (1 << 0); - dwCursorMode = VIAGETREG(VIA_REG_CURSOR_MODE); -+ if (pVia->CursorPipe) -+ temp |= (1 << 31); ++ temp |= (1 << 30); - /* Turn cursor off. */ - VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode & 0xFFFFFFFE); -+ VIASETREG(control, temp); ++ /* Duoview */ ++ if (pVia->CursorPipe) ++ temp |= (1 << 31); ++ VIASETREG(control, temp); ++ } +} - /* Upload the cursor image to the frame buffer. */ @@ -7048,7 +7462,24 @@ Index: src/via_cursor.c - /* Restore cursor status */ - VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode); + temp = VIAGETREG(control); -+ VIASETREG(control, temp & 0xFFFFFFFE); ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL0); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFA); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL1); ++ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFA); ++ } ++ break; ++ ++ default: ++ VIASETREG(control, temp & 0xFFFFFFFA); ++ } } static void @@ -7094,39 +7525,67 @@ Index: src/via_cursor.c - * image when directly set cursor position. It should be a HW bug but - * we can use patch by SW. */ - dwCursorMode = VIAGETREG(VIA_REG_CURSOR_MODE); -+ temp = VIAGETREG(control); -+ VIASETREG(control, temp & 0xFFFFFFFE); ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL0); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); ++ ++ VIASETREG(VIA_REG_HI_POS0, ((x << 16) | (y & 0x07ff))); ++ VIASETREG(VIA_REG_HI_OFFSET0, ((xoff << 16) | (yoff & 0x07ff))); - /* Turn cursor off. */ - VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode & 0xFFFFFFFE); -+ VIASETREG(pos, ((x << 16) | (y & 0x07ff))); -+ VIASETREG(offset, ((xoff << 16) | (yoff & 0x07ff))); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL1); ++ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); - VIASETREG(VIA_REG_CURSOR_ORG, ((xoff << 16) | (yoff & 0x003f))); - VIASETREG(VIA_REG_CURSOR_POS, ((x << 16) | (y & 0x07ff))); -+ VIASETREG(control, temp); -+} ++ VIASETREG(VIA_REG_HI_POS1, ((x << 16) | (y & 0x07ff))); ++ VIASETREG(VIA_REG_HI_OFFSET1, ((xoff << 16) | (yoff & 0x07ff))); - /* Restore cursor status */ - VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode); ++ VIASETREG(VIA_REG_HI_CONTROL1, temp); ++ } ++ break; ++ ++ default: ++ temp = VIAGETREG(control); ++ VIASETREG(control, temp & 0xFFFFFFFE); ++ ++ VIASETREG(pos, ((x << 16) | (y & 0x07ff))); ++ VIASETREG(offset, ((xoff << 16) | (yoff & 0x07ff))); ++ ++ VIASETREG(control, temp); ++ } ++ + } + +static Bool +viaUseHWCursorARGB(ScreenPtr pScreen, CursorPtr pCurs) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + VIAPtr pVia = VIAPTR(pScrn); -+ + + return (pVia->hwcursor + && pVia->CursorARGBSupported + && pCurs->bits->width <= pVia->CursorMaxWidth + && pCurs->bits->height <= pVia->CursorMaxHeight); - } - ++} ++ +static Bool +viaUseHWCursor(ScreenPtr pScreen, CursorPtr pCurs) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + VIAPtr pVia = VIAPTR(pScrn); - ++ + return (pVia->hwcursor + /* Can't enable HW cursor on both CRTCs at the same time. */ + && !(pVia->pBIOSInfo->FirstCRTC->IsActive @@ -7160,18 +7619,34 @@ Index: src/via_cursor.c + if (pVia->CursorARGBSupported) { +#define ARGB_PER_CHUNK (8 * sizeof (chunk) / 2) + for (i = 0; i < (pVia->CursorMaxWidth * pVia->CursorMaxHeight / ARGB_PER_CHUNK); i++) { -+ chunk = *s++; -+ for (j = 0; j < ARGB_PER_CHUNK; j++, chunk >>= 2) ++ chunk = *s++; ++ for (j = 0; j < ARGB_PER_CHUNK; j++, chunk >>= 2) + *dst++ = mono_cursor_color[chunk & 3]; + } + + pVia->CursorFG = mono_cursor_color[3]; + pVia->CursorBG = mono_cursor_color[2]; -+ } else { -+ memcpy(dst, src, pVia->CursorSize); -+ } -+ -+ VIASETREG(control, temp); ++ } else { ++ memcpy(dst, src, pVia->CursorSize); ++ } ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL0); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL1); ++ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); ++ } ++ break; ++ ++ default: ++ VIASETREG(control, temp); ++ } } -void @@ -7194,15 +7669,9 @@ Index: src/via_cursor.c - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "ViaCursorStore: stale image left.\n"); - xfree(pVia->CursorImage); -- } + fg |= 0xff000000; + bg |= 0xff000000; - -- pVia->CursorImage = xcalloc(1, 0x1000); -- memcpy(pVia->CursorImage, pVia->FBBase + pVia->CursorStart, 0x1000); -- pVia->CursorFG = (CARD32) VIAGETREG(VIA_REG_CURSOR_FG); -- pVia->CursorBG = (CARD32) VIAGETREG(VIA_REG_CURSOR_BG); -- pVia->CursorMC = (CARD32) VIAGETREG(VIA_REG_CURSOR_MODE); ++ + if (fg == pVia->CursorFG && bg == pVia->CursorBG) + return; + @@ -7217,7 +7686,29 @@ Index: src/via_cursor.c + pVia->CursorFG = fg; + pVia->CursorBG = bg; + -+ VIASETREG(control, temp); ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL0); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL1); ++ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); ++ } ++ break; ++ default: ++ VIASETREG(control, temp); + } +- +- pVia->CursorImage = xcalloc(1, 0x1000); +- memcpy(pVia->CursorImage, pVia->FBBase + pVia->CursorStart, 0x1000); +- pVia->CursorFG = (CARD32) VIAGETREG(VIA_REG_CURSOR_FG); +- pVia->CursorBG = (CARD32) VIAGETREG(VIA_REG_CURSOR_BG); +- pVia->CursorMC = (CARD32) VIAGETREG(VIA_REG_CURSOR_MODE); } -void @@ -7275,12 +7766,29 @@ Index: src/via_cursor.c + for (x = 0; x < pVia->CursorMaxWidth; x++) + *dst++ = 0; + -+ VIASETREG(control, temp); ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL0); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL1); ++ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); ++ } ++ break; ++ ++ default: ++ VIASETREG(control, temp); ++ } } Index: src/via_xvmc.c =================================================================== ---- src/via_xvmc.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_xvmc.c (.../trunk) (revision 751) +--- src/via_xvmc.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_xvmc.c (.../trunk) (revision 758) @@ -114,11 +114,7 @@ static int viaXvMCInterceptPutImage(ScrnInfoPtr, short, short, short, short, short, short, short, short, int, @@ -7294,15 +7802,26 @@ Index: src/via_xvmc.c static int viaXvMCInterceptXvGetAttribute(ScrnInfoPtr pScrn, Atom attribute, INT32 * value, pointer data); -@@ -325,6 +321,7 @@ +@@ -325,6 +321,8 @@ if ((pVia->Chipset == VIA_KM400) || (pVia->Chipset == VIA_CX700) || + (pVia->Chipset == VIA_VX800) || ++ (pVia->Chipset == VIA_VX855) || (pVia->Chipset == VIA_K8M890) || (pVia->Chipset == VIA_P4M900)) { xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -@@ -923,11 +920,7 @@ +@@ -415,6 +413,9 @@ + cleanupViaXvMC(vXvMC, XvAdaptors, XvAdaptorCount); + } + for (i = 0; i < XvAdaptorCount; ++i) { ++ if (!XvAdaptors[i]) ++ continue; ++ + for (j = 0; j < XvAdaptors[i]->nPorts; ++j) { + viaPortPrivPtr pPriv = XvAdaptors[i]->pPortPrivates[j].ptr; + +@@ -923,11 +924,7 @@ short src_h, short drw_w, short drw_h, int id, unsigned char *buf, short width, short height, Bool sync, RegionPtr clipBoxes, @@ -7315,7 +7834,7 @@ Index: src/via_xvmc.c { viaPortPrivPtr pPriv = (viaPortPrivPtr) data; ViaXvMCXVPriv *vx = (ViaXvMCXVPriv *) pPriv->xvmc_priv; -@@ -984,11 +977,7 @@ +@@ -984,11 +981,7 @@ } return vx->PutImage(pScrn, src_x, src_y, drw_x, drw_y, src_w, src_h, drw_w, drw_h, id, buf, width, height, sync, clipBoxes, @@ -7330,8 +7849,8 @@ Index: src/via_xvmc.c unsigned long Index: src/via_dri.c =================================================================== ---- src/via_dri.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_dri.c (.../trunk) (revision 751) +--- src/via_dri.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_dri.c (.../trunk) (revision 758) @@ -588,7 +588,16 @@ pDRIInfo = pVia->pDRIInfo; @@ -7352,8 +7871,8 @@ Index: src/via_dri.c #ifdef XSERVER_LIBPCIACCESS Index: src/via_vt162x.h =================================================================== ---- src/via_vt162x.h (.../tags/release_0_2_903) (revision 751) -+++ src/via_vt162x.h (.../trunk) (revision 751) +--- src/via_vt162x.h (.../tags/release_0_2_903) (revision 758) ++++ src/via_vt162x.h (.../trunk) (revision 758) @@ -926,6 +926,23 @@ 0x0, 0x0, }, @@ -7380,9 +7899,22 @@ Index: src/via_vt162x.h { 0x03, 0x00, 0x10, 0x1f, 0x03, 0x00, 0x00, 0xc9, 0x4c, 0x11, 0x7c, 0x00, 0x56, 0x57, 0x07, 0xbf, Index: src/via.h =================================================================== ---- src/via.h (.../tags/release_0_2_903) (revision 751) -+++ src/via.h (.../trunk) (revision 751) -@@ -561,9 +561,6 @@ +--- src/via.h (.../tags/release_0_2_903) (revision 758) ++++ src/via.h (.../trunk) (revision 758) +@@ -327,6 +327,12 @@ + #define VIDEO_FIFO_PRETHRESHOLD_VT3336 250 + #define VIDEO_EXPIRE_NUM_VT3336 31 + ++/* Those values are only valid for IGA1 */ ++#define VIDEO_FIFO_DEPTH_VT3409 400 ++#define VIDEO_FIFO_THRESHOLD_VT3409 320 ++#define VIDEO_FIFO_PRETHRESHOLD_VT3409 230 ++#define VIDEO_EXPIRE_NUM_VT3409 160 ++ + /* ALPHA_V3_FIFO_CONTROL 0x278 + * IA2 has 32 level FIFO for packet mode video format + * 32 level FIFO for planar mode video YV12. with extension reg 230 bit 21 enable +@@ -561,9 +567,6 @@ #define HQV_V_FILTER_DEFAULT 0x00420000 #define HQV_H_FILTER_DEFAULT 0x00000040 @@ -7392,7 +7924,7 @@ Index: src/via.h /* HQV_MINI_CONTROL 0x3E8 */ #define HQV_H_MINIFY_ENABLE 0x00000800 #define HQV_H_MINIFY_DOWN 0x00001000 -@@ -572,6 +569,19 @@ +@@ -572,6 +575,19 @@ #define HQV_VDEBLOCK_FILTER 0x80000000 #define HQV_HDEBLOCK_FILTER 0x00008000 @@ -7414,8 +7946,8 @@ Index: src/via.h #define CHROMA_KEY_HIGH 0x00FFFFFF Index: src/via_priv.h =================================================================== ---- src/via_priv.h (.../tags/release_0_2_903) (revision 751) -+++ src/via_priv.h (.../trunk) (revision 751) +--- src/via_priv.h (.../tags/release_0_2_903) (revision 758) ++++ src/via_priv.h (.../trunk) (revision 758) @@ -29,9 +29,7 @@ #ifdef XF86DRI #include "via_drm.h" @@ -7439,7 +7971,7 @@ Index: src/via_priv.h Index: src/via_timing.c =================================================================== --- src/via_timing.c (.../tags/release_0_2_903) (revision 0) -+++ src/via_timing.c (.../trunk) (revision 751) ++++ src/via_timing.c (.../trunk) (revision 758) @@ -0,0 +1,398 @@ +/* + * Copyright 2007-2008 Gabriel Mansi. @@ -7841,8 +8373,8 @@ Index: src/via_timing.c +} Index: src/Makefile.am =================================================================== ---- src/Makefile.am (.../tags/release_0_2_903) (revision 751) -+++ src/Makefile.am (.../trunk) (revision 751) +--- src/Makefile.am (.../tags/release_0_2_903) (revision 758) ++++ src/Makefile.am (.../trunk) (revision 758) @@ -43,23 +43,29 @@ via_ch7xxx.c \ via_ch7xxx.h \ @@ -7875,8 +8407,8 @@ Index: src/Makefile.am via_vgahw.h \ Index: src/via_dga.c =================================================================== ---- src/via_dga.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_dga.c (.../trunk) (revision 751) +--- src/via_dga.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_dga.c (.../trunk) (revision 758) @@ -248,7 +248,7 @@ pScrn->SwitchMode(index, pScrn->currentMode, 0); @@ -7897,9 +8429,9 @@ Index: src/via_dga.c pVia->DGAOldDisplayWidth = pScrn->displayWidth; Index: src/via_id.c =================================================================== ---- src/via_id.c (.../tags/release_0_2_903) (revision 751) -+++ src/via_id.c (.../trunk) (revision 751) -@@ -87,6 +87,7 @@ +--- src/via_id.c (.../tags/release_0_2_903) (revision 758) ++++ src/via_id.c (.../trunk) (revision 758) +@@ -87,10 +87,12 @@ {"Asustek K8V-MX", VIA_K8M800, 0x1043, 0x8129, VIA_DEVICE_CRT}, {"Mitac 8399", VIA_K8M800, 0x1071, 0x8399, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV}, /* aka "Pogolinux Konabook 3100" */ {"Mitac 8889", VIA_K8M800, 0x1071, 0x8889, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV}, @@ -7907,7 +8439,12 @@ Index: src/via_id.c {"VIA VT3108 (K8M800)", VIA_K8M800, 0x1106, 0x3108, VIA_DEVICE_CRT}, /* borrowed by Asustek A8V-MX */ {"Shuttle FX21", VIA_K8M800, 0x1297, 0x3052, VIA_DEVICE_CRT}, {"Shuttle FX83", VIA_K8M800, 0x1297, 0xF683, VIA_DEVICE_CRT | VIA_DEVICE_TV}, -@@ -113,6 +114,7 @@ + {"Sharp Actius AL27", VIA_K8M800, 0x13BD, 0x1044, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, ++ {"Sharp PC-AE30J", VIA_K8M800, 0x13BD, 0x104B, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, + {"Giga-byte GA-K8VM800M", VIA_K8M800, 0x1458, 0xD000, VIA_DEVICE_CRT}, + {"MSI K8M Neo-V", VIA_K8M800, 0x1462, 0x0320, VIA_DEVICE_CRT}, + {"MSI K8MM-V", VIA_K8M800, 0x1462, 0x7142, VIA_DEVICE_CRT}, +@@ -113,6 +115,7 @@ {"Packard Bell Imedia 2097", VIA_K8M800, 0x1631, 0xD007, VIA_DEVICE_CRT}, {"Fujitsu-Siemens Amilo K7610", VIA_K8M800, 0x1734, 0x10B3, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, {"ASRock K8Upgrade-VM800", VIA_K8M800, 0x1849, 0x3108, VIA_DEVICE_CRT}, @@ -7915,7 +8452,7 @@ Index: src/via_id.c /*** PM800, PM880, PN800, CN400 ***/ {"VIA VT3118 (PM800)", VIA_PM800, 0x1106, 0x3118, VIA_DEVICE_CRT}, /* borrowed by ECS PM800-M2 */ -@@ -138,6 +140,7 @@ +@@ -138,6 +141,7 @@ {"PCChips V21G", VIA_VM800, 0x1019, 0xAA51, VIA_DEVICE_CRT}, {"Asustek P5VDC-MX", VIA_VM800, 0x1043, 0x3344, VIA_DEVICE_CRT}, {"Asustek P5VDC-TVM", VIA_VM800, 0x1043, 0x81CE, VIA_DEVICE_CRT}, @@ -7923,7 +8460,7 @@ Index: src/via_id.c {"Gateway MX3210", VIA_VM800, 0x107B, 0x0216, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, {"VIA VT3344 (VM800) - EPIA EN", VIA_VM800, 0x1106, 0x3344, VIA_DEVICE_CRT | VIA_DEVICE_TV}, {"Gigabyte GA-8VM800M-775", VIA_VM800, 0x1458, 0xD000, VIA_DEVICE_CRT}, -@@ -145,6 +148,7 @@ +@@ -145,6 +149,7 @@ {"MSI Fuzzy CN700/CN700T/CN700G", VIA_VM800, 0x1462, 0x7199, VIA_DEVICE_CRT | VIA_DEVICE_TV}, {"MSI PM8M3-V", VIA_VM800, 0x1462, 0x7211, VIA_DEVICE_CRT}, {"MSI PM8PM", VIA_VM800, 0x1462, 0x7222, VIA_DEVICE_CRT}, @@ -7931,7 +8468,7 @@ Index: src/via_id.c {"RoverBook Partner W500", VIA_VM800, 0x1509, 0x4330, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, {"Clevo/RoverBook Voyager V511L", VIA_VM800, 0x1558, 0x0662, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, {"Clevo M5xxS", VIA_VM800, 0x1558, 0x5406, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, -@@ -158,6 +162,7 @@ +@@ -158,6 +163,7 @@ {"Asustek P5V800-MX", VIA_VM800, 0x3344, 0x1122, VIA_DEVICE_CRT}, /*** K8M890 ***/ @@ -7939,7 +8476,7 @@ Index: src/via_id.c {"Asustek A8V-VM", VIA_K8M890, 0x1043, 0x81B5, VIA_DEVICE_CRT}, {"Asustek M2V-MX SE", VIA_K8M890, 0x1043, 0x8297, VIA_DEVICE_CRT}, {"Foxconn K8M890M2MA-RS2H", VIA_K8M890, 0x105B, 0x0C84, VIA_DEVICE_CRT}, -@@ -179,6 +184,7 @@ +@@ -179,6 +185,7 @@ {"Gigabyte GA-VM900M", VIA_P4M900, 0x1458, 0xD000, VIA_DEVICE_CRT}, {"MSI VR321", VIA_P4M900, 0x1462, 0x3355, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, {"MSI P4M900M / P4M900M2-F/L", VIA_P4M900, 0x1462, 0x7255, VIA_DEVICE_CRT}, @@ -7947,7 +8484,7 @@ Index: src/via_id.c {"Everex NC1501/NC1503", VIA_P4M900, 0x1509, 0x1E30, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, {"Clevo M660SE", VIA_P4M900, 0x1558, 0x0664, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, {"Clevo M660SR", VIA_P4M900, 0x1558, 0x0669, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, -@@ -196,6 +202,7 @@ +@@ -196,6 +203,7 @@ {"Samsung Q1B", VIA_CX700, 0x144D, 0xC02C, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, {"FIC CE260", VIA_CX700, 0x1509, 0x2D30, VIA_DEVICE_LCD}, {"FIC CE261", VIA_CX700, 0x1509, 0x2F07, VIA_DEVICE_LCD}, @@ -7955,7 +8492,7 @@ Index: src/via_id.c {"Packard Bell EasyNote XS", VIA_CX700, 0x1631, 0xC201, VIA_DEVICE_LCD}, /* aka Everex Cloudbook CE1200V */ /*** P4M890, VN890 ***/ -@@ -204,11 +211,17 @@ +@@ -204,11 +212,20 @@ {"Asustek P5V-VM ULTRA", VIA_P4M890, 0x1043, 0x81B5, VIA_DEVICE_CRT}, {"Asustek P5V-VM DH", VIA_P4M890, 0x1043, 0x81CE, VIA_DEVICE_CRT}, {"Mitac 8615", VIA_P4M890, 0x1071, 0x8615, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, @@ -7970,13 +8507,16 @@ Index: src/via_id.c + {"Samsung NC20", VIA_VX800, 0x144d, 0xc04e, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, + {"Quanta DreamBook Light IL1", VIA_VX800, 0x152d, 0x0771, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, + ++ /*** VX855 ***/ ++ {"VIA VT8562C", VIA_VX855, 0x1106, 0x5122, VIA_DEVICE_CRT}, ++ /* keep this */ {NULL, VIA_UNKNOWN, 0x0000, 0x0000, VIA_DEVICE_NONE} }; Index: src/via_timing.h =================================================================== --- src/via_timing.h (.../tags/release_0_2_903) (revision 0) -+++ src/via_timing.h (.../trunk) (revision 751) ++++ src/via_timing.h (.../trunk) (revision 758) @@ -0,0 +1,51 @@ +/* + * Copyright 2007-2008 Gabriel Mansi. diff --git a/openchrome-0.2.903-panel.patch b/openchrome-0.2.903-panel.patch deleted file mode 100644 index c6a5e9b..0000000 --- a/openchrome-0.2.903-panel.patch +++ /dev/null @@ -1,5189 +0,0 @@ -Index: src/via_panel.c -=================================================================== ---- src/via_panel.c (revision 0) -+++ src/via_panel.c (revision 0) -@@ -0,0 +1,461 @@ -+/* -+ * Copyright 2007 The Openchrome Project [openchrome.org] -+ * Copyright (c) 1997-2003 by The XFree86 Project, Inc. -+ * Copyright 1998-2007 VIA Technologies, Inc. All Rights Reserved. -+ * Copyright 2001-2007 S3 Graphics, Inc. All Rights Reserved. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sub license, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the -+ * next paragraph) shall be included in all copies or substantial portions -+ * of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -+ * DEALINGS IN THE SOFTWARE. -+ */ -+ -+/* -+ * Core panel functions. -+ */ -+ -+#ifdef HAVE_CONFIG_H -+#include "config.h" -+#endif -+ -+#include "via.h" -+#include "via_driver.h" -+#include "via_vgahw.h" -+#include "via_id.h" -+#include "via_timing.h" -+ -+static ViaPanelModeRec ViaPanelNativeModes[] = { -+ {640, 480}, -+ {800, 600}, -+ {1024, 768}, -+ {1280, 768}, -+ {1280, 1024}, -+ {1400, 1050}, -+ {1600, 1200}, -+ {1280, 800}, -+ {800, 480}, -+ {1366, 768}, -+ {1360, 768}, -+ {1920, 1080}, -+ {1920, 1200}, -+ {1024, 600}, -+ {1440, 900}, -+ {1280, 720} -+}; -+ -+static int -+ViaPanelLookUpModeIndex(int width, int height) -+{ -+ int i, index = VIA_PANEL_INVALID; -+ int length = sizeof(ViaPanelNativeModes) / sizeof(ViaPanelModeRec); -+ -+ for (i = 0; i < length; i++) { -+ if (ViaPanelNativeModes[i].Width == width -+ && ViaPanelNativeModes[i].Height == height) { -+ index = i; -+ break; -+ } -+ } -+ return index; -+} -+ -+/* -+ * Sets the panel dimensions from the configuration -+ * using name with format "9999x9999". -+ */ -+void -+ViaPanelGetNativeModeFromOption(ScrnInfoPtr pScrn, char *name) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; -+ ViaPanelInfoPtr panel = pBIOSInfo->Panel; -+ CARD8 index; -+ CARD8 length; -+ char aux[10]; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "ViaPanelGetNativeModeFromOption\n")); -+ -+ panel->NativeModeIndex = VIA_PANEL_INVALID; -+ if (strlen(name) < 10) { -+ length = sizeof(ViaPanelNativeModes) / sizeof(ViaPanelModeRec); -+ -+ for (index = 0; index < length; index++) { -+ sprintf(aux, "%dx%d", ViaPanelNativeModes[index].Width, -+ ViaPanelNativeModes[index].Height); -+ if (!xf86NameCmp(name, aux)) { -+ panel->NativeModeIndex = index; -+ panel->NativeMode->Width = ViaPanelNativeModes[index].Width; -+ panel->NativeMode->Height = ViaPanelNativeModes[index].Height; -+ break; -+ } -+ } -+ } else { -+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -+ "%s is not a valid panel size.\n", name); -+ } -+} -+ -+/* -+ * Gets the native panel resolution from scratch pad registers. -+ */ -+void -+ViaPanelGetNativeModeFromScratchPad(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ CARD8 index; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "ViaPanelGetNativeModeFromScratchPad\n")); -+ -+ index = hwp->readCrtc(hwp, 0x3F) & 0x0F; -+ -+ ViaPanelInfoPtr panel = pVia->pBIOSInfo->Panel; -+ -+ panel->NativeModeIndex = index; -+ panel->NativeMode->Width = ViaPanelNativeModes[index].Width; -+ panel->NativeMode->Height = ViaPanelNativeModes[index].Height; -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "Native Panel Resolution is %dx%d\n", -+ panel->NativeMode->Width, panel->NativeMode->Height); -+} -+ -+void -+ViaPanelScaleDisable(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ ViaCrtcMask(hwp, 0x79, 0x00, 0x01); -+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) -+ ViaCrtcMask(hwp, 0xA2, 0x00, 0xC8); -+} -+ -+void -+ViaPanelScale(ScrnInfoPtr pScrn, int resWidth, int resHeight, -+ int panelWidth, int panelHeight) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ int horScalingFactor = 0; -+ int verScalingFactor = 0; -+ CARD8 cra2 = 0; -+ CARD8 cr77 = 0; -+ CARD8 cr78 = 0; -+ CARD8 cr79 = 0; -+ CARD8 cr9f = 0; -+ Bool scaling = FALSE; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "ViaPanelScale: %d,%d -> %d,%d\n", -+ resWidth, resHeight, panelWidth, panelHeight)); -+ -+ if (resWidth < panelWidth) { -+ /* FIXME: It is different for chipset < K8M800 */ -+ horScalingFactor = ((resWidth - 1) * 4096) / (panelWidth - 1); -+ -+ /* Horizontal scaling enabled */ -+ cra2 = 0xC0; -+ cr9f = horScalingFactor & 0x0003; /* HSCaleFactor[1:0] at CR9F[1:0] */ -+ cr77 = (horScalingFactor & 0x03FC) >> 2; /* HSCaleFactor[9:2] at CR77[7:0] */ -+ cr79 = (horScalingFactor & 0x0C00) >> 10; /* HSCaleFactor[11:10] at CR79[5:4] */ -+ cr79 <<= 4; -+ scaling = TRUE; -+ } -+ -+ if (resHeight < panelHeight) { -+ verScalingFactor = ((resHeight - 1) * 2048) / (panelHeight - 1); -+ -+ /* Vertical scaling enabled */ -+ cra2 |= 0x08; -+ cr79 |= ((verScalingFactor & 0x0001) << 3); /* VSCaleFactor[0] at CR79[3] */ -+ cr78 |= (verScalingFactor & 0x01FE) >> 1; /* VSCaleFactor[8:1] at CR78[7:0] */ -+ cr79 |= ((verScalingFactor & 0x0600) >> 9) << 6; /* VSCaleFactor[10:9] at CR79[7:6] */ -+ scaling = TRUE; -+ } -+ -+ if (scaling) { -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "Scaling factor: horizontal %d (0x%x), vertical %d (0x%x)\n", -+ horScalingFactor, horScalingFactor, -+ verScalingFactor, verScalingFactor)); -+ -+ ViaCrtcMask(hwp, 0x77, cr77, 0xFF); -+ ViaCrtcMask(hwp, 0x78, cr78, 0xFF); -+ ViaCrtcMask(hwp, 0x79, cr79, 0xF8); -+ ViaCrtcMask(hwp, 0x9F, cr9f, 0x03); -+ ViaCrtcMask(hwp, 0x79, 0x03, 0x03); -+ } else -+ ViaCrtcMask(hwp, 0x79, 0x00, 0x01); -+ -+ ViaCrtcMask(hwp, 0xA2, cra2, 0xC8); -+ -+ /* Horizontal scaling selection: interpolation */ -+ // ViaCrtcMask(hwp, 0x79, 0x02, 0x02); -+ // else -+ // ViaCrtcMask(hwp, 0x79, 0x00, 0x02); -+ /* Horizontal scaling factor selection original / linear */ -+ //ViaCrtcMask(hwp, 0xA2, 0x40, 0x40); -+} -+ -+ -+/* -+ * Generates a display mode for the native panel resolution, using CVT. -+ */ -+static void -+ViaPanelGetNativeDisplayMode(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ ViaPanelModePtr panelMode = pVia->pBIOSInfo->Panel->NativeMode; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "ViaPanelGetNativeDisplayMode\n")); -+ -+ if (panelMode->Width && panelMode->Height) { -+ -+ /* TODO: fix refresh rate and check malloc */ -+ DisplayModePtr p = malloc( sizeof(DisplayModeRec) ) ; -+ memset(p, 0, sizeof(DisplayModeRec)); -+ -+ float refresh = 60.0f ; -+ -+ /* The following code is borrowed from xf86SetModeCrtc. */ -+ if (p) { -+ viaTimingCvt(p, panelMode->Width, panelMode->Height, refresh, FALSE, TRUE); -+ p->CrtcHDisplay = p->HDisplay; -+ p->CrtcHSyncStart = p->HSyncStart; -+ p->CrtcHSyncEnd = p->HSyncEnd; -+ p->CrtcHTotal = p->HTotal; -+ p->CrtcHSkew = p->HSkew; -+ p->CrtcVDisplay = p->VDisplay; -+ p->CrtcVSyncStart = p->VSyncStart; -+ p->CrtcVSyncEnd = p->VSyncEnd; -+ p->CrtcVTotal = p->VTotal; -+ -+ p->CrtcVBlankStart = min(p->CrtcVSyncStart, p->CrtcVDisplay); -+ p->CrtcVBlankEnd = max(p->CrtcVSyncEnd, p->CrtcVTotal); -+ p->CrtcHBlankStart = min(p->CrtcHSyncStart, p->CrtcHDisplay); -+ p->CrtcHBlankEnd = max(p->CrtcHSyncEnd, p->CrtcHTotal); -+ -+ } -+ pVia->pBIOSInfo->Panel->NativeDisplayMode = p; -+ } else { -+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -+ "Invalid panel dimension (%dx%d)\n", panelMode->Width, -+ panelMode->Height); -+ } -+} -+ -+void -+ViaPanelPreInit(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaPanelPreInit\n")); -+ -+ ViaPanelInfoPtr panel = pBIOSInfo->Panel; -+ -+ /* First try to get the mode from EDID. */ -+ if (panel->NativeModeIndex == VIA_PANEL_INVALID) { -+ int width, height; -+ Bool ret; -+ -+ ret = ViaPanelGetSizeFromDDCv1(pScrn, &width, &height); -+/* -+ if (!ret) -+ ret = ViaPanelGetSizeFromDDCv2(pScrn, &width, &height); -+*/ -+ if (ret) { -+ panel->NativeModeIndex = ViaPanelLookUpModeIndex(width, height); -+ if (panel->NativeModeIndex != VIA_PANEL_INVALID) { -+ panel->NativeMode->Width = width; -+ panel->NativeMode->Height = height; -+ } -+ } -+ } -+ -+ if (panel->NativeModeIndex == VIA_PANEL_INVALID) -+ ViaPanelGetNativeModeFromScratchPad(pScrn); -+ -+ if (panel->NativeModeIndex != VIA_PANEL_INVALID) -+ ViaPanelGetNativeDisplayMode(pScrn); -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NativeModeIndex: %d\n", panel->NativeModeIndex )) ; -+ -+} -+ -+void -+ViaPanelCenterMode(DisplayModePtr centerMode, DisplayModePtr panelMode, -+ DisplayModePtr mode) -+{ -+ memcpy(centerMode, mode, sizeof(DisplayModeRec)); -+ -+ CARD32 HDiff = (panelMode->CrtcHDisplay - mode->CrtcHDisplay) / 2; -+ CARD32 VDiff = (panelMode->CrtcVDisplay - mode->CrtcVDisplay) / 2; -+ -+ centerMode->CrtcHTotal += HDiff * 2; -+ centerMode->CrtcVTotal += VDiff * 2; -+ -+ centerMode->CrtcHSyncStart += HDiff; -+ centerMode->CrtcHSyncEnd += HDiff; -+ centerMode->CrtcHBlankStart += HDiff; -+ centerMode->CrtcHBlankEnd += HDiff; -+ -+ centerMode->CrtcVSyncStart += VDiff; -+ centerMode->CrtcVSyncEnd += VDiff;; -+ centerMode->CrtcVBlankStart += VDiff; -+ centerMode->CrtcVBlankEnd += VDiff; -+} -+ -+ -+/* -+ * Try to interprete EDID ourselves. -+ */ -+Bool -+ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon, -+ int *width, int *height) -+{ -+ int i, max = 0, vsize; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromEDID\n")); -+ -+ /* !!! Why are we not checking VESA modes? */ -+ -+ /* checking standard timings */ -+ for (i = 0; i < 8; i++) -+ if ((pMon->timings2[i].hsize > 256) -+ && (pMon->timings2[i].hsize > max)) { -+ max = pMon->timings2[i].hsize; -+ vsize = pMon->timings2[i].vsize; -+ } -+ -+ if (max != 0) { -+ *width = max; -+ *height = vsize; -+ return TRUE; -+ } -+ -+ /* checking detailed monitor section */ -+ -+ /* !!! skip Ranges and standard timings */ -+ -+ /* check detailed timings */ -+ for (i = 0; i < DET_TIMINGS; i++) -+ if (pMon->det_mon[i].type == DT) { -+ struct detailed_timings timing = pMon->det_mon[i].section.d_timings; -+ -+ /* ignore v_active for now */ -+ if ((timing.clock > 15000000) && (timing.h_active > max)) { -+ max = timing.h_active; -+ vsize = timing.v_active; -+ } -+ } -+ -+ if (max != 0) { -+ *width = max; -+ *height = vsize; -+ return TRUE; -+ } -+ -+ return FALSE; -+} -+ -+Bool -+ViaPanelGetSizeFromDDCv1(ScrnInfoPtr pScrn, int *width, int *height) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ xf86MonPtr pMon; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromDDCv1\n")); -+ -+ if (!xf86I2CProbeAddress(pVia->pI2CBus2, 0xA0)) -+ return FALSE; -+ -+ pMon = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus2); -+ if (!pMon) -+ return FALSE; -+ -+ pVia->DDC2 = pMon; -+ -+ if (!pVia->DDC1) { -+ xf86PrintEDID(pMon); -+ xf86SetDDCproperties(pScrn, pMon); -+ } -+ -+ if (!ViaPanelGetSizeFromEDID(pScrn, pMon, width, height)) { -+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, -+ "Unable to read PanelSize from EDID information\n"); -+ return FALSE; -+ } -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "VIAGetPanelSizeFromDDCv1: (%dx%d)\n", *width, *height)); -+ return TRUE; -+} -+ -+Bool -+ViaPanelGetSizeFromDDCv2(ScrnInfoPtr pScrn, int *width) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ CARD8 W_Buffer[1]; -+ CARD8 R_Buffer[4]; -+ I2CDevPtr dev; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromDDCv2\n")); -+ -+ if (!xf86I2CProbeAddress(pVia->pI2CBus2, 0xA2)) -+ return FALSE; -+ -+ dev = xf86CreateI2CDevRec(); -+ if (!dev) -+ return FALSE; -+ -+ dev->DevName = "EDID2"; -+ dev->SlaveAddr = 0xA2; -+ dev->ByteTimeout = 2200; /* VESA DDC spec 3 p. 43 (+10 %) */ -+ dev->StartTimeout = 550; -+ dev->BitTimeout = 40; -+ dev->ByteTimeout = 40; -+ dev->AcknTimeout = 40; -+ dev->pI2CBus = pVia->pI2CBus2; -+ -+ if (!xf86I2CDevInit(dev)) { -+ xf86DestroyI2CDevRec(dev, TRUE); -+ return FALSE; -+ } -+ -+ xf86I2CReadByte(dev, 0x00, R_Buffer); -+ if (R_Buffer[0] != 0x20) { -+ xf86DestroyI2CDevRec(dev, TRUE); -+ return FALSE; -+ } -+ -+ /* Found EDID2 Table */ -+ -+ W_Buffer[0] = 0x76; -+ xf86I2CWriteRead(dev, W_Buffer, 1, R_Buffer, 2); -+ xf86DestroyI2CDevRec(dev, TRUE); -+ -+ *width = R_Buffer[0] | (R_Buffer[1] << 8); -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "VIAGetPanelSizeFromDDCv2: %d\n", *width)); -+ -+ return TRUE; -+} -Index: src/via_video.c -=================================================================== ---- src/via_video.c (revision 590) -+++ src/via_video.c (working copy) -@@ -366,14 +366,14 @@ - - if (pVia->pVbe) { - refresh = 100; -- if (pBIOSInfo->PanelActive) -+ if (pBIOSInfo->Panel->IsActive) - refresh = 70; - if (pBIOSInfo->TVActive) - refresh = 60; - } else { -- if (pBIOSInfo->PanelActive) { -- width = pBIOSInfo->panelX; -- height = pBIOSInfo->panelY; -+ if (pBIOSInfo->Panel->IsActive) { -+ width = pBIOSInfo->Panel->NativeMode->Width; -+ height = pBIOSInfo->Panel->NativeMode->Height; - if ((width == 1400) && (height == 1050)) { - width = 1280; - height = 1024; -@@ -472,6 +472,10 @@ - { - VIAPtr pVia = VIAPTR(pScrn); - vmmtr viaVidEng = (vmmtr) pVia->VidMapBase; -+ -+ /* Save video registers */ -+ /* TODO: Identify which registers should be saved and restored */ -+ memcpy(pVia->VideoRegs, (void*)viaVidEng, sizeof(video_via_regs)); - - pVia->dwV1 = ((vmmtr) viaVidEng)->video1_ctl; - pVia->dwV3 = ((vmmtr) viaVidEng)->video3_ctl; -@@ -486,6 +490,10 @@ - { - VIAPtr pVia = VIAPTR(pScrn); - vmmtr viaVidEng = (vmmtr) pVia->VidMapBase; -+ -+ /* Restore video registers */ -+ /* TODO: Identify which registers should be saved and restored */ -+ memcpy((void*)viaVidEng, pVia->VideoRegs, sizeof(video_via_regs)); - - viaVidEng->video1_ctl = pVia->dwV1; - viaVidEng->video3_ctl = pVia->dwV3; -Index: src/via_lvds.c -=================================================================== ---- src/via_lvds.c (revision 0) -+++ src/via_lvds.c (revision 0) -@@ -0,0 +1,121 @@ -+/* -+ * Copyright 2007 The Openchrome Project [openchrome.org] -+ * Copyright 1998-2007 VIA Technologies, Inc. All Rights Reserved. -+ * Copyright 2001-2007 S3 Graphics, Inc. All Rights Reserved. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sub license, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the -+ * next paragraph) shall be included in all copies or substantial portions -+ * of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -+ * DEALINGS IN THE SOFTWARE. -+ */ -+ -+/* -+ * Integrated LVDS power management functions. -+ */ -+ -+#ifdef HAVE_CONFIG_H -+#include "config.h" -+#endif -+ -+#include "via.h" -+#include "via_driver.h" -+#include "via_vgahw.h" -+#include "via_id.h" -+ -+ -+static void -+ViaLVDSPowerFirstSequence(ScrnInfoPtr pScrn, Bool on) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ if (on) { -+ /* Use hardware control power sequence. */ -+ hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) & 0xFE); -+ /* Turn on back light. */ -+ hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) & 0x3F); -+ /* Turn on hardware power sequence. */ -+ hwp->writeCrtc(hwp, 0x6A, hwp->readCrtc(hwp, 0x6A) | 0x08); -+ } else { -+ /* Turn off power sequence. */ -+ hwp->writeCrtc(hwp, 0x6A, hwp->readCrtc(hwp, 0x6A) & 0xF7); -+ usleep(1); -+ /* Turn off back light. */ -+ hwp->writeCrtc(hwp, 0x91, 0xC0); -+ } -+} -+ -+static void -+ViaLVDSPowerSecondSequence(ScrnInfoPtr pScrn, Bool on) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ if (on) { -+ /* Use hardware control power sequence. */ -+ hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0xFE); -+ /* Turn on back light. */ -+ hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0x3F); -+ /* Turn on hardware power sequence. */ -+ hwp->writeCrtc(hwp, 0xD4, hwp->readCrtc(hwp, 0xD4) | 0x02); -+ } else { -+ /* Turn off power sequence. */ -+ hwp->writeCrtc(hwp, 0xD4, hwp->readCrtc(hwp, 0xD4) & 0xFD); -+ usleep(1); -+ /* Turn off back light. */ -+ hwp->writeCrtc(hwp, 0xD3, 0xC0); -+ } -+} -+ -+static void -+ViaLVDSDFPPower(ScrnInfoPtr pScrn, Bool on) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ if (on) { -+ /* Turn DFP High/Low pad on. */ -+ hwp->writeSeq(hwp, 0x2A, hwp->readSeq(hwp, 0x2A) | 0x0F); -+ } else { -+ /* Turn DFP High/Low pad off. */ -+ hwp->writeSeq(hwp, 0x2A, hwp->readSeq(hwp, 0x2A) & 0x0F); -+ } -+} -+ -+static void -+ViaLVDSPowerChannel(ScrnInfoPtr pScrn, Bool on) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ CARD8 lvdsMask; -+ -+ if (on) { -+ /* LVDS0: 0x7F, LVDS1: 0xBF */ -+ lvdsMask = 0x7F & 0xBF; -+ hwp->writeCrtc(hwp, 0xD2, hwp->readCrtc(hwp, 0xD2) & lvdsMask); -+ } else { -+ /* LVDS0: 0x80, LVDS1: 0x40 */ -+ lvdsMask = 0x80 | 0x40; -+ hwp->writeCrtc(hwp, 0xD2, hwp->readCrtc(hwp, 0xD2) | lvdsMask); -+ } -+} -+ -+void -+ViaLVDSPower(ScrnInfoPtr pScrn, Bool on) -+{ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaLVDSPower\n")); -+ ViaLVDSPowerFirstSequence(pScrn, on); -+ ViaLVDSPowerSecondSequence(pScrn, on); -+ ViaLVDSDFPPower(pScrn, on); -+ ViaLVDSPowerChannel(pScrn, on); -+} -Index: src/via_mode.c -=================================================================== ---- src/via_mode.c (revision 588) -+++ src/via_mode.c (working copy) -@@ -1,4 +1,5 @@ - /* -+ * Copyright 2005-2007 The Openchrome Project [openchrome.org] - * Copyright 2004-2005 The Unichrome Project [unichrome.sf.net] - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. -@@ -45,6 +46,54 @@ - */ - #include "via_mode.h" - -+static void -+ViaPrintMode(ScrnInfoPtr pScrn, DisplayModePtr mode) -+{ -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Name: %s\n", mode->name); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock: %d\n", mode->Clock); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VRefresh: %f\n", mode->VRefresh); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HSync: %f\n", mode->HSync); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HDisplay: %d\n", mode->HDisplay); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HSyncStart: %d\n", mode->HSyncStart); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HSyncEnd: %d\n", mode->HSyncEnd); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HTotal: %d\n", mode->HTotal); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HSkew: %d\n", mode->HSkew); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VDisplay: %d\n", mode->VDisplay); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VSyncStart: %d\n", mode->VSyncStart); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VSyncEnd: %d\n", mode->VSyncEnd); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VTotal: %d\n", mode->VTotal); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VScan: %d\n", mode->VScan); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Flags: %d\n", mode->Flags); -+ -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHDisplay: 0x%x\n", -+ mode->CrtcHDisplay); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankStart: 0x%x\n", -+ mode->CrtcHBlankStart); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncStart: 0x%x\n", -+ mode->CrtcHSyncStart); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncEnd: 0x%x\n", -+ mode->CrtcHSyncEnd); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankEnd: 0x%x\n", -+ mode->CrtcHBlankEnd); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHTotal: 0x%x\n", -+ mode->CrtcHTotal); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSkew: 0x%x\n", -+ mode->CrtcHSkew); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVDisplay: 0x%x\n", -+ mode->CrtcVDisplay); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankStart: 0x%x\n", -+ mode->CrtcVBlankStart); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncStart: 0x%x\n", -+ mode->CrtcVSyncStart); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd: 0x%x\n", -+ mode->CrtcVSyncEnd); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankEnd: 0x%x\n", -+ mode->CrtcVBlankEnd); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVTotal: 0x%x\n", -+ mode->CrtcVTotal); -+ -+} -+ - /* - * - * TV specific code. -@@ -277,7 +326,7 @@ - pBIOSInfo->CrtPresent = TRUE; - } - -- /* -+ /* - * FIXME: xf86I2CProbeAddress(pVia->pI2CBus3, 0x40) - * disables the panel on P4M900 - * See ViaTVDetect. -@@ -347,14 +396,14 @@ - " Initialised register: 0x%02x\n", - VIAGetActiveDisplay(pScrn))); - -- pBIOSInfo->PanelActive = FALSE; -+ pBIOSInfo->Panel->IsActive = FALSE; - pBIOSInfo->CrtActive = FALSE; - pBIOSInfo->TVActive = FALSE; - - if (!pVia->ActiveDevice) { - /* always enable the panel when present */ - if (pBIOSInfo->PanelPresent) -- pBIOSInfo->PanelActive = TRUE; -+ pBIOSInfo->Panel->IsActive = TRUE; - else if (pBIOSInfo->TVOutput != TVOUTPUT_NONE) /* cable is attached! */ - pBIOSInfo->TVActive = TRUE; - -@@ -364,7 +413,7 @@ - } else { - if (pVia->ActiveDevice & VIA_DEVICE_LCD) { - if (pBIOSInfo->PanelPresent) -- pBIOSInfo->PanelActive = TRUE; -+ pBIOSInfo->Panel->IsActive = TRUE; - else - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unable to activate" - " panel: no panel is present.\n"); -@@ -377,7 +426,7 @@ - else if (pBIOSInfo->TVOutput == TVOUTPUT_NONE) - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unable to activate" - " TV encoder: no cable attached.\n"); -- else if (pBIOSInfo->PanelActive) -+ else if (pBIOSInfo->Panel->IsActive) - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unable to activate" - " TV encoder and panel simultaneously. Not using" - " TV encoder.\n"); -@@ -386,17 +435,26 @@ - } - - if ((pVia->ActiveDevice & VIA_DEVICE_CRT) -- || (!pBIOSInfo->PanelActive && !pBIOSInfo->TVActive)) { -+ || (!pBIOSInfo->Panel->IsActive && !pBIOSInfo->TVActive)) { - pBIOSInfo->CrtPresent = TRUE; - pBIOSInfo->CrtActive = TRUE; - } - } -+ if (!pVia->UseLegacyModeSwitch) { -+ if (pBIOSInfo->CrtActive) -+ pBIOSInfo->FirstCRTC->IsActive = TRUE ; -+ if (pBIOSInfo->Panel->IsActive) { -+ pVia->pBIOSInfo->SecondCRTC->IsActive = TRUE ; -+ if (pVia->Chipset == VIA_P4M900 || pVia->Chipset == VIA_CX700) -+ pVia->pBIOSInfo->Lvds->IsActive = TRUE ; -+ } -+ } - - #ifdef HAVE_DEBUG - if (pBIOSInfo->CrtActive) - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "ViaOutputsSelect: CRT.\n")); -- if (pBIOSInfo->PanelActive) -+ if (pBIOSInfo->Panel->IsActive) - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "ViaOutputsSelect: Panel.\n")); - if (pBIOSInfo->TVActive) -@@ -407,141 +465,8 @@ - } - - /* -- * Try to interprete EDID ourselves. -- */ --static Bool --ViaGetPanelSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon, int *size) --{ -- int i, max = 0; -- -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromEDID\n")); -- -- /* !!! Why are we not checking VESA modes? */ -- -- /* checking standard timings */ -- for (i = 0; i < 8; i++) -- if ((pMon->timings2[i].hsize > 256) && (pMon->timings2[i].hsize > max)) -- max = pMon->timings2[i].hsize; -- -- if (max != 0) { -- *size = max; -- return TRUE; -- } -- -- /* checking detailed monitor section */ -- -- /* !!! skip Ranges and standard timings */ -- -- /* check detailed timings */ -- for (i = 0; i < DET_TIMINGS; i++) -- if (pMon->det_mon[i].type == DT) { -- struct detailed_timings timing = pMon->det_mon[i].section.d_timings; -- -- /* ignore v_active for now */ -- if ((timing.clock > 15000000) && (timing.h_active > max)) -- max = timing.h_active; -- } -- -- if (max != 0) { -- *size = max; -- return TRUE; -- } -- -- return FALSE; --} -- --/* - * - */ --static Bool --VIAGetPanelSizeFromDDCv1(ScrnInfoPtr pScrn, int *size) --{ -- VIAPtr pVia = VIAPTR(pScrn); -- xf86MonPtr pMon; -- -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromDDCv1\n")); -- -- if (!xf86I2CProbeAddress(pVia->pI2CBus2, 0xA0)) -- return FALSE; -- -- pMon = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus2); -- if (!pMon) -- return FALSE; -- -- pVia->DDC2 = pMon; -- -- if (!pVia->DDC1) { -- xf86PrintEDID(pMon); -- xf86SetDDCproperties(pScrn, pMon); -- } -- -- if (!ViaGetPanelSizeFromEDID(pScrn, pMon, size)) { -- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, -- "Unable to read PanelSize from EDID information\n"); -- return FALSE; -- } -- -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -- "VIAGetPanelSizeFromDDCv1: %d\n", *size)); -- return TRUE; --} -- --/* -- * -- */ --static Bool --VIAGetPanelSizeFromDDCv2(ScrnInfoPtr pScrn, int *size) --{ -- VIAPtr pVia = VIAPTR(pScrn); -- CARD8 W_Buffer[1]; -- CARD8 R_Buffer[2]; -- I2CDevPtr dev; -- -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromDDCv2\n")); -- -- if (!xf86I2CProbeAddress(pVia->pI2CBus2, 0xA2)) -- return FALSE; -- -- dev = xf86CreateI2CDevRec(); -- if (!dev) -- return FALSE; -- -- dev->DevName = "EDID2"; -- dev->SlaveAddr = 0xA2; -- dev->ByteTimeout = 2200; /* VESA DDC spec 3 p. 43 (+10 %) */ -- dev->StartTimeout = 550; -- dev->BitTimeout = 40; -- dev->ByteTimeout = 40; -- dev->AcknTimeout = 40; -- dev->pI2CBus = pVia->pI2CBus2; -- -- if (!xf86I2CDevInit(dev)) { -- xf86DestroyI2CDevRec(dev, TRUE); -- return FALSE; -- } -- -- xf86I2CReadByte(dev, 0x00, R_Buffer); -- if (R_Buffer[0] != 0x20) { -- xf86DestroyI2CDevRec(dev, TRUE); -- return FALSE; -- } -- -- /* Found EDID2 Table */ -- -- W_Buffer[0] = 0x76; -- xf86I2CWriteRead(dev, W_Buffer, 1, R_Buffer, 2); -- xf86DestroyI2CDevRec(dev, TRUE); -- -- *size = R_Buffer[0] | (R_Buffer[1] << 8); -- -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -- "VIAGetPanelSizeFromDDCv2: %d\n", *size)); -- return TRUE; --} -- --/* -- * -- */ - static void - VIAGetPanelSize(ScrnInfoPtr pScrn) - { -@@ -550,56 +475,57 @@ - VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; - char *PanelSizeString[7] = { "640x480", "800x600", "1024x768", "1280x768" - "1280x1024", "1400x1050", "1600x1200" }; -- int size = 0; -+ int width = 0; -+ int height = 0; - Bool ret; - - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSize\n")); - -- ret = VIAGetPanelSizeFromDDCv1(pScrn, &size); -+ ret = ViaPanelGetSizeFromDDCv1(pScrn, &width, &height); - if (!ret) -- ret = VIAGetPanelSizeFromDDCv2(pScrn, &size); -+ ret = ViaPanelGetSizeFromDDCv2(pScrn, &width); - - if (ret) { -- switch (size) { -+ switch (width) { - case 640: -- pBIOSInfo->PanelSize = VIA_PANEL6X4; -+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL6X4; - break; - case 800: -- pBIOSInfo->PanelSize = VIA_PANEL8X6; -+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL8X6; - break; - case 1024: -- pBIOSInfo->PanelSize = VIA_PANEL10X7; -+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL10X7; - break; - case 1280: -- pBIOSInfo->PanelSize = VIA_PANEL12X10; -+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL12X10; - break; - case 1400: -- pBIOSInfo->PanelSize = VIA_PANEL14X10; -+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL14X10; - break; - case 1600: -- pBIOSInfo->PanelSize = VIA_PANEL16X12; -+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL16X12; - break; - default: -- pBIOSInfo->PanelSize = VIA_PANEL_INVALID; -+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL_INVALID; - break; - } - } else { -- pBIOSInfo->PanelSize = hwp->readCrtc(hwp, 0x3F) >> 4; -- if (pBIOSInfo->PanelSize == 0) { -+ pBIOSInfo->Panel->NativeModeIndex = hwp->readCrtc(hwp, 0x3F) >> 4; -+ if (pBIOSInfo->Panel->NativeModeIndex == 0) { - /* VIA_PANEL6X4 == 0, but that value equals unset */ - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unable to " - "retrieve PanelSize: using default (1024x768)\n"); -- pBIOSInfo->PanelSize = VIA_PANEL10X7; -+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL10X7; - return; - } - } - -- if (pBIOSInfo->PanelSize < 7) -+ if (pBIOSInfo->Panel->NativeModeIndex < 7) - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using panel at %s.\n", -- PanelSizeString[pBIOSInfo->PanelSize]); -+ PanelSizeString[pBIOSInfo->Panel->NativeModeIndex]); - else - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unknown panel size " -- "detected: %d.\n", pBIOSInfo->PanelSize); -+ "detected: %d.\n", pBIOSInfo->Panel->NativeModeIndex); - } - - /* -@@ -656,7 +582,7 @@ - - /* - * -- * ViaResolutionTable[i].PanelIndex is pBIOSInfo->PanelSize -+ * ViaResolutionTable[i].PanelIndex is pBIOSInfo->PanelSize - * pBIOSInfo->PanelIndex is the index to lcdTable. - * - */ -@@ -670,9 +596,9 @@ - - pBIOSInfo->PanelIndex = VIA_BIOS_NUM_PANEL; - -- if (pBIOSInfo->PanelSize == VIA_PANEL_INVALID) { -+ if (pBIOSInfo->Panel->NativeModeIndex == VIA_PANEL_INVALID) { - VIAGetPanelSize(pScrn); -- if (pBIOSInfo->PanelSize == VIA_PANEL_INVALID) { -+ if (pBIOSInfo->Panel->NativeModeIndex == VIA_PANEL_INVALID) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "ViaPanelGetIndex: PanelSize not set.\n"); - return FALSE; -@@ -693,7 +619,8 @@ - } - - for (i = 0; ViaResolutionTable[i].Index != VIA_RES_INVALID; i++) -- if (ViaResolutionTable[i].PanelIndex == pBIOSInfo->PanelSize) { -+ if (ViaResolutionTable[i].PanelIndex -+ == pBIOSInfo->Panel->NativeModeIndex) { - pBIOSInfo->panelX = ViaResolutionTable[i].X; - pBIOSInfo->panelY = ViaResolutionTable[i].Y; - break; -@@ -713,7 +640,7 @@ - } - - for (i = 0; i < VIA_BIOS_NUM_PANEL; i++) -- if (lcdTable[i].fpSize == pBIOSInfo->PanelSize) { -+ if (lcdTable[i].fpSize == pBIOSInfo->Panel->NativeModeIndex) { - int modeNum, tmp; - - modeNum = ViaGetVesaMode(pScrn, mode); -@@ -778,7 +705,7 @@ - - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModesAttach\n")); - -- if (pBIOSInfo->PanelActive) -+ if (pBIOSInfo->Panel->IsActive) - ViaModesAttachHelper(pScrn, monitorp, ViaPanelModes); - if (pBIOSInfo->TVActive && pBIOSInfo->TVModes) - ViaModesAttachHelper(pScrn, monitorp, pBIOSInfo->TVModes); -@@ -815,155 +742,12 @@ - } - } - --/* -- * Checks for limitations imposed by the available VGA timing registers. -- * -- */ --static ModeStatus --ViaModePrimaryVGAValid(ScrnInfoPtr pScrn, DisplayModePtr mode) --{ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModePrimaryVGAValid\n")); -+static CARD32 -+ViaModeDotClockTranslate(ScrnInfoPtr pScrn, DisplayModePtr mode); - -- if (mode->CrtcHTotal > 4100) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHTotal out of range.\n"); -- return MODE_BAD_HVALUE; -- } -- -- if (mode->CrtcHDisplay > 2048) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHDisplay out of range.\n"); -- return MODE_BAD_HVALUE; -- } -- -- if (mode->CrtcHBlankStart > 2048) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankStart out of range.\n"); -- return MODE_BAD_HVALUE; -- } -- -- if ((mode->CrtcHBlankEnd - mode->CrtcHBlankStart) > 1025) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankEnd out of range.\n"); -- return MODE_HBLANK_WIDE; -- } -- -- if (mode->CrtcHSyncStart > 4095) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncStart out of range.\n"); -- return MODE_BAD_HVALUE; -- } -- -- if ((mode->CrtcHSyncEnd - mode->CrtcHSyncStart) > 256) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncEnd out of range.\n"); -- return MODE_HSYNC_WIDE; -- } -- -- if (mode->CrtcVTotal > 2049) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVTotal out of range.\n"); -- return MODE_BAD_VVALUE; -- } -- -- if (mode->CrtcVDisplay > 2048) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVDisplay out of range.\n"); -- return MODE_BAD_VVALUE; -- } -- -- if (mode->CrtcVSyncStart > 2047) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncStart out of range.\n"); -- return MODE_BAD_VVALUE; -- } -- -- if ((mode->CrtcVSyncEnd - mode->CrtcVSyncStart) > 16) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd out of range.\n"); -- return MODE_VSYNC_WIDE; -- } -- -- if (mode->CrtcVBlankStart > 2048) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankStart out of range.\n"); -- return MODE_BAD_VVALUE; -- } -- -- if ((mode->CrtcVBlankEnd - mode->CrtcVBlankStart) > 257) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankEnd out of range.\n"); -- return MODE_VBLANK_WIDE; -- } -- -- return MODE_OK; --} -- - /* - * - */ --static ModeStatus --ViaModeSecondaryVGAValid(ScrnInfoPtr pScrn, DisplayModePtr mode) --{ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeSecondaryVGAValid\n")); -- -- if (mode->CrtcHTotal > 4096) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHTotal out of range.\n"); -- return MODE_BAD_HVALUE; -- } -- -- if (mode->CrtcHDisplay > 2048) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHDisplay out of range.\n"); -- return MODE_BAD_HVALUE; -- } -- -- if (mode->CrtcHBlankStart > 2048) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankStart out of range.\n"); -- return MODE_BAD_HVALUE; -- } -- -- if (mode->CrtcHBlankEnd > 4096) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankEnd out of range.\n"); -- return MODE_HBLANK_WIDE; -- } -- -- if (mode->CrtcHSyncStart > 2047) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncStart out of range.\n"); -- return MODE_BAD_HVALUE; -- } -- -- if ((mode->CrtcHSyncEnd - mode->CrtcHSyncStart) > 512) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncEnd out of range.\n"); -- return MODE_HSYNC_WIDE; -- } -- -- if (mode->CrtcVTotal > 2048) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVTotal out of range.\n"); -- return MODE_BAD_VVALUE; -- } -- -- if (mode->CrtcVDisplay > 2048) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVDisplay out of range.\n"); -- return MODE_BAD_VVALUE; -- } -- -- if (mode->CrtcVBlankStart > 2048) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankStart out of range.\n"); -- return MODE_BAD_VVALUE; -- } -- -- if (mode->CrtcVBlankEnd > 2048) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankEnd out of range.\n"); -- return MODE_VBLANK_WIDE; -- } -- -- if (mode->CrtcVSyncStart > 2047) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncStart out of range.\n"); -- return MODE_BAD_VVALUE; -- } -- -- if ((mode->CrtcVSyncEnd - mode->CrtcVSyncStart) > 32) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd out of range.\n"); -- return MODE_VSYNC_WIDE; -- } -- -- return MODE_OK; --} -- -- --static CARD32 ViaModeDotClockTranslate(ScrnInfoPtr pScrn, DisplayModePtr mode); -- --/* -- * -- */ - ModeStatus - ViaValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags) - { -@@ -982,27 +766,57 @@ - if (mode->Flags & V_INTERLACE) - return MODE_NO_INTERLACE; - -- if (pVia->IsSecondary) -- ret = ViaModeSecondaryVGAValid(pScrn, mode); -- else -- ret = ViaModePrimaryVGAValid(pScrn, mode); -+ if (pVia->UseLegacyModeSwitch) { - -- if (ret != MODE_OK) -- return ret; -+ if (pVia->IsSecondary) -+ ret = ViaSecondCRTCModeValid(pScrn, mode); -+ else -+ ret = ViaFirstCRTCModeValid(pScrn, mode); - -- if (pBIOSInfo->TVActive) { -- ret = ViaTVModeValid(pScrn, mode); -- if (ret != MODE_OK) { -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, -- "Mode \"%s\" is not supported by TV encoder.\n", -- mode->name); -+ if (ret != MODE_OK) - return ret; -+ -+ if (pBIOSInfo->TVActive) { -+ ret = ViaTVModeValid(pScrn, mode); -+ if (ret != MODE_OK) { -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "Mode \"%s\" is not supported by TV encoder.\n", -+ mode->name); -+ return ret; -+ } -+ } else { -+ if (pBIOSInfo->Panel->IsActive && !ViaPanelGetIndex(pScrn, mode)) -+ return MODE_BAD; -+ else if (!ViaModeDotClockTranslate(pScrn, mode)) -+ return MODE_NOCLOCK; - } -- } else if (pBIOSInfo->PanelActive && !ViaPanelGetIndex(pScrn, mode)) -- return MODE_BAD; -- else if (!ViaModeDotClockTranslate(pScrn, mode)) -- return MODE_NOCLOCK; - -+ } else { -+ -+ if (pBIOSInfo->FirstCRTC->IsActive) { -+ ret = ViaFirstCRTCModeValid(pScrn, mode); -+ if (ret != MODE_OK) -+ return ret; -+ } -+ -+ if (pBIOSInfo->SecondCRTC->IsActive) { -+ ret = ViaSecondCRTCModeValid(pScrn, mode); -+ if (ret != MODE_OK) -+ return ret; -+ } -+ -+ if (pBIOSInfo->Panel->IsActive) { -+ ViaPanelModePtr nativeMode = pBIOSInfo->Panel->NativeMode; -+ -+ if (nativeMode->Width < mode->HDisplay -+ || nativeMode->Height < mode->VDisplay) -+ return MODE_PANEL; -+ } -+ -+ if (!ViaModeDotClockTranslate(pScrn, mode)) -+ return MODE_NOCLOCK; -+ } -+ - temp = mode->CrtcHDisplay * mode->CrtcVDisplay * mode->VRefresh - * (pScrn->bitsPerPixel >> 3); - if (pBIOSInfo->Bandwidth < temp) { -@@ -1037,7 +851,7 @@ - hwp->writeMiscOut(hwp, data | 0x0C); - } - --/* -+/* - * - */ - static void -@@ -1062,7 +876,7 @@ - ViaSeqMask(hwp, 0x40, 0x00, 0x02); - } - --/* -+/* - * - */ - static void -@@ -1104,7 +918,7 @@ - - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIASetLCDMode\n")); - -- if (pBIOSInfo->PanelSize == VIA_PANEL12X10) -+ if (pBIOSInfo->Panel->NativeModeIndex == VIA_PANEL12X10) - hwp->writeCrtc(hwp, 0x89, 0x07); - - /* LCD Expand Mode Y Scale Flag */ -@@ -1165,7 +979,7 @@ - case VIA_RES_1280X768: - case VIA_RES_1280X960: - case VIA_RES_1280X1024: -- if (pBIOSInfo->PanelSize == VIA_PANEL12X10) -+ if (pBIOSInfo->Panel->NativeModeIndex == VIA_PANEL12X10) - resIdx = VIA_RES_INVALID; - else - resIdx = 4; -@@ -1317,261 +1131,6 @@ - } - } - --/* -- * -- */ --static void --ViaModePrimaryVGA(ScrnInfoPtr pScrn, DisplayModePtr mode) --{ -- vgaHWPtr hwp = VGAHWPTR(pScrn); -- CARD16 temp; -- -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModePrimaryVGA\n")); -- -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModePrimaryVGA: " -- "Setting up %s\n", mode->name)); -- -- ViaCrtcMask(hwp, 0x11, 0x00, 0x80); /* modify starting address */ -- ViaCrtcMask(hwp, 0x03, 0x80, 0x80); /* enable vertical retrace access */ -- hwp->writeSeq(hwp, 0x10, 0x01); /* unlock extended registers */ -- ViaCrtcMask(hwp, 0x47, 0x00, 0x01); /* unlock CRT registers */ -- -- /* Set Misc Register */ -- temp = 0x23; -- if (mode->Flags & V_NHSYNC) -- temp |= 0x40; -- if (mode->Flags & V_NVSYNC) -- temp |= 0x80; -- temp |= 0x0C; /* undefined/external clock */ -- hwp->writeMiscOut(hwp, temp); -- -- /* Sequence registers */ -- hwp->writeSeq(hwp, 0x00, 0x00); -- -- /* if (mode->Flags & V_CLKDIV2) -- * hwp->writeSeq(hwp, 0x01, 0x09); -- * else */ -- hwp->writeSeq(hwp, 0x01, 0x01); -- -- hwp->writeSeq(hwp, 0x02, 0x0F); -- hwp->writeSeq(hwp, 0x03, 0x00); -- hwp->writeSeq(hwp, 0x04, 0x0E); -- -- ViaSeqMask(hwp, 0x15, 0x02, 0x02); -- -- /* bpp */ -- switch (pScrn->bitsPerPixel) { -- case 8: -- ViaSeqMask(hwp, 0x15, 0x20, 0xFC); -- break; -- case 16: -- ViaSeqMask(hwp, 0x15, 0xB4, 0xFC); -- break; -- case 24: -- case 32: -- ViaSeqMask(hwp, 0x15, 0xAC, 0xFC); -- break; -- default: -- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unhandled bitdepth: %d\n", -- pScrn->bitsPerPixel); -- break; -- } -- -- ViaSeqMask(hwp, 0x16, 0x08, 0xBF); -- ViaSeqMask(hwp, 0x17, 0x1F, 0xFF); -- ViaSeqMask(hwp, 0x18, 0x4E, 0xFF); -- ViaSeqMask(hwp, 0x1A, 0x08, 0xFD); -- -- /* graphics registers */ -- hwp->writeGr(hwp, 0x00, 0x00); -- hwp->writeGr(hwp, 0x01, 0x00); -- hwp->writeGr(hwp, 0x02, 0x00); -- hwp->writeGr(hwp, 0x03, 0x00); -- hwp->writeGr(hwp, 0x04, 0x00); -- hwp->writeGr(hwp, 0x05, 0x40); -- hwp->writeGr(hwp, 0x06, 0x05); -- hwp->writeGr(hwp, 0x07, 0x0F); -- hwp->writeGr(hwp, 0x08, 0xFF); -- -- ViaGrMask(hwp, 0x20, 0, 0xFF); -- ViaGrMask(hwp, 0x21, 0, 0xFF); -- ViaGrMask(hwp, 0x22, 0, 0xFF); -- -- /* attribute registers */ -- hwp->writeAttr(hwp, 0x00, 0x00); -- hwp->writeAttr(hwp, 0x01, 0x01); -- hwp->writeAttr(hwp, 0x02, 0x02); -- hwp->writeAttr(hwp, 0x03, 0x03); -- hwp->writeAttr(hwp, 0x04, 0x04); -- hwp->writeAttr(hwp, 0x05, 0x05); -- hwp->writeAttr(hwp, 0x06, 0x06); -- hwp->writeAttr(hwp, 0x07, 0x07); -- hwp->writeAttr(hwp, 0x08, 0x08); -- hwp->writeAttr(hwp, 0x09, 0x09); -- hwp->writeAttr(hwp, 0x0A, 0x0A); -- hwp->writeAttr(hwp, 0x0B, 0x0B); -- hwp->writeAttr(hwp, 0x0C, 0x0C); -- hwp->writeAttr(hwp, 0x0D, 0x0D); -- hwp->writeAttr(hwp, 0x0E, 0x0E); -- hwp->writeAttr(hwp, 0x0F, 0x0F); -- hwp->writeAttr(hwp, 0x10, 0x41); -- hwp->writeAttr(hwp, 0x11, 0xFF); -- hwp->writeAttr(hwp, 0x12, 0x0F); -- hwp->writeAttr(hwp, 0x13, 0x00); -- hwp->writeAttr(hwp, 0x14, 0x00); -- -- /* Crtc registers */ -- /* horizontal total : 4100 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHTotal: 0x%03X\n", -- mode->CrtcHTotal)); -- temp = (mode->CrtcHTotal >> 3) - 5; -- hwp->writeCrtc(hwp, 0x00, temp & 0xFF); -- ViaCrtcMask(hwp, 0x36, temp >> 5, 0x08); -- -- /* horizontal address : 2048 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHDisplay: 0x%03X\n", -- mode->CrtcHDisplay)); -- temp = (mode->CrtcHDisplay >> 3) - 1; -- hwp->writeCrtc(hwp, 0x01, temp & 0xFF); -- -- /* horizontal blanking start : 2048 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankStart: 0x%03X\n", -- mode->CrtcHBlankStart)); -- if (mode->CrtcHBlankStart != mode->CrtcHDisplay) /* FIXME */ -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around " -- "an old VGA limitation (HBlankStart).\n"); -- temp = (mode->CrtcHDisplay >> 3) - 1; -- hwp->writeCrtc(hwp, 0x02, temp & 0xFF); -- /* If HblankStart has more bits anywhere, add them here */ -- -- /* horizontal blanking end : start + 1025 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankEnd: 0x%03X\n", -- mode->CrtcHBlankEnd)); -- if (mode->CrtcHBlankEnd != mode->CrtcHTotal) /* FIXME */ -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around " -- "an old VGA limitation (HBlankEnd).\n"); -- temp = (mode->CrtcHTotal >> 3) - 1; -- ViaCrtcMask(hwp, 0x03, temp, 0x1F); -- ViaCrtcMask(hwp, 0x05, temp << 2, 0x80); -- ViaCrtcMask(hwp, 0x33, temp >> 1, 0x20); -- -- /* CrtcHSkew ??? */ -- -- /* horizontal sync start : 4095 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncStart: 0x%03X\n", -- mode->CrtcHSyncStart)); -- temp = mode->CrtcHSyncStart >> 3; -- hwp->writeCrtc(hwp, 0x04, temp & 0xFF); -- ViaCrtcMask(hwp, 0x33, temp >> 4, 0x10); -- -- /* horizontal sync end : start + 256 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncEnd: 0x%03X\n", -- mode->CrtcHSyncEnd)); -- temp = mode->CrtcHSyncEnd >> 3; -- ViaCrtcMask(hwp, 0x05, temp, 0x1F); -- -- /* vertical total : 2049 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVTotal: 0x%03X\n", -- mode->CrtcVTotal)); -- temp = mode->CrtcVTotal - 2; -- hwp->writeCrtc(hwp, 0x06, temp & 0xFF); -- ViaCrtcMask(hwp, 0x07, temp >> 8, 0x01); -- ViaCrtcMask(hwp, 0x07, temp >> 4, 0x20); -- ViaCrtcMask(hwp, 0x35, temp >> 10, 0x01); -- -- /* vertical address : 2048 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVDisplay: 0x%03X\n", -- mode->CrtcVDisplay)); -- temp = mode->CrtcVDisplay - 1; -- hwp->writeCrtc(hwp, 0x12, temp & 0xFF); -- ViaCrtcMask(hwp, 0x07, temp >> 7, 0x02); -- ViaCrtcMask(hwp, 0x07, temp >> 3, 0x40); -- ViaCrtcMask(hwp, 0x35, temp >> 8, 0x04); -- -- /* Primary starting address -> 0x00, adjustframe does the rest */ -- hwp->writeCrtc(hwp, 0x0C, 0x00); -- hwp->writeCrtc(hwp, 0x0D, 0x00); -- hwp->writeCrtc(hwp, 0x34, 0x00); -- ViaCrtcMask(hwp, 0x48, 0x00, 0x03); /* is this even possible on CLE266A ? */ -- -- /* vertical sync start : 2047 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncStart: 0x%03X\n", -- mode->CrtcVSyncStart)); -- temp = mode->CrtcVSyncStart; -- hwp->writeCrtc(hwp, 0x10, temp & 0xFF); -- ViaCrtcMask(hwp, 0x07, temp >> 6, 0x04); -- ViaCrtcMask(hwp, 0x07, temp >> 2, 0x80); -- ViaCrtcMask(hwp, 0x35, temp >> 9, 0x02); -- -- /* vertical sync end : start + 16 -- other bits someplace? */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd: 0x%03X\n", -- mode->CrtcVSyncEnd)); -- ViaCrtcMask(hwp, 0x11, mode->CrtcVSyncEnd, 0x0F); -- -- /* line compare: We are not doing splitscreen so 0x3FFF */ -- hwp->writeCrtc(hwp, 0x18, 0xFF); -- ViaCrtcMask(hwp, 0x07, 0x10, 0x10); -- ViaCrtcMask(hwp, 0x09, 0x40, 0x40); -- ViaCrtcMask(hwp, 0x33, 0x07, 0x06); -- ViaCrtcMask(hwp, 0x35, 0x10, 0x10); -- -- /* zero Maximum scan line */ -- ViaCrtcMask(hwp, 0x09, 0x00, 0x1F); -- hwp->writeCrtc(hwp, 0x14, 0x00); -- -- /* vertical blanking start : 2048 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankStart: 0x%03X\n", -- mode->CrtcVBlankStart)); -- if (mode->CrtcVBlankStart != mode->CrtcVDisplay) /* FIXME */ -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around " -- "an old VGA limitation (VBlankStart).\n"); -- temp = mode->CrtcVDisplay - 1; -- hwp->writeCrtc(hwp, 0x15, temp & 0xFF); -- ViaCrtcMask(hwp, 0x07, temp >> 5, 0x08); -- ViaCrtcMask(hwp, 0x09, temp >> 4, 0x20); -- ViaCrtcMask(hwp, 0x35, temp >> 7, 0x08); -- -- /* vertical blanking end : start + 257 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankEnd: 0x%03X\n", -- mode->CrtcVBlankEnd)); -- if (mode->CrtcVBlankEnd != mode->CrtcVTotal) /* FIXME */ -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around " -- "an old VGA limitation (VBlankEnd).\n"); -- temp = mode->CrtcVTotal - 1; -- hwp->writeCrtc(hwp, 0x16, temp); -- -- /* some leftovers */ -- hwp->writeCrtc(hwp, 0x08, 0x00); -- ViaCrtcMask(hwp, 0x32, 0, 0xFF); /* ? */ -- ViaCrtcMask(hwp, 0x33, 0, 0xC8); -- -- /* offset */ -- temp = (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3)) >> 3; -- /* Make sure that this is 32byte aligned */ -- if (temp & 0x03) { -- temp += 0x03; -- temp &= ~0x03; -- } -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Offset: 0x%03X\n", temp)); -- hwp->writeCrtc(hwp, 0x13, temp & 0xFF); -- ViaCrtcMask(hwp, 0x35, temp >> 3, 0xE0); -- -- /* fetch count */ -- temp = (mode->CrtcHDisplay * (pScrn->bitsPerPixel >> 3)) >> 3; -- /* Make sure that this is 32byte aligned */ -- if (temp & 0x03) { -- temp += 0x03; -- temp &= ~0x03; -- } -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Fetch Count: 0x%03X\n", temp)); -- hwp->writeSeq(hwp, 0x1C, (temp >> 1) & 0xFF); -- ViaSeqMask(hwp, 0x1D, temp >> 9, 0x03); -- -- /* some leftovers */ -- ViaCrtcMask(hwp, 0x32, 0, 0xFF); -- ViaCrtcMask(hwp, 0x33, 0, 0xC8); --} -- - static CARD32 - ViaComputeDotClock(unsigned clock) - { -@@ -1692,13 +1251,14 @@ - * - */ - void --ViaModePrimary(ScrnInfoPtr pScrn, DisplayModePtr mode) -+ViaModePrimaryLegacy(ScrnInfoPtr pScrn, DisplayModePtr mode) - { - vgaHWPtr hwp = VGAHWPTR(pScrn); - VIAPtr pVia = VIAPTR(pScrn); - VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; - - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModePrimary\n")); -+ DEBUG(ViaPrintMode(pScrn, mode)); - - /* Turn off Screen */ - ViaCrtcMask(hwp, 0x17, 0x00, 0x80); -@@ -1709,7 +1269,8 @@ - hwp->writeCrtc(hwp, 0x6C, 0x00); - hwp->writeCrtc(hwp, 0x93, 0x00); - -- ViaModePrimaryVGA(pScrn, mode); -+ ViaCRTCInit(pScrn); -+ ViaFirstCRTCSetMode(pScrn, mode); - pBIOSInfo->Clock = ViaModeDotClockTranslate(pScrn, mode); - pBIOSInfo->ClockExternal = FALSE; - -@@ -1721,7 +1282,7 @@ - else - ViaSeqMask(hwp, 0x16, 0x00, 0x40); - -- if (pBIOSInfo->PanelActive && ViaPanelGetIndex(pScrn, mode)) { -+ if (pBIOSInfo->Panel->IsActive && ViaPanelGetIndex(pScrn, mode)) { - VIASetLCDMode(pScrn, mode); - ViaLCDPower(pScrn, TRUE); - } else if (pBIOSInfo->PanelPresent) -@@ -1765,192 +1326,23 @@ - hwp->disablePalette(hwp); - } - --void --ViaModeSecondaryVGAFetchCount(ScrnInfoPtr pScrn, int width) --{ -- -- vgaHWPtr hwp = VGAHWPTR(pScrn); -- CARD16 temp; -- -- /* fetch count */ -- temp = (width * (pScrn->bitsPerPixel >> 3)) >> 3; -- /* Make sure that this is 32byte aligned */ -- if (temp & 0x03) { -- temp += 0x03; -- temp &= ~0x03; -- } -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Fetch Count: 0x%03X\n", temp)); -- hwp->writeCrtc(hwp, 0x65, (temp >> 1) & 0xFF); -- ViaCrtcMask(hwp, 0x67, temp >> 7, 0x0C); --} -- --void --ViaModeSecondaryVGAOffset(ScrnInfoPtr pScrn) --{ -- -- vgaHWPtr hwp = VGAHWPTR(pScrn); -- CARD16 temp; -- -- /* offset */ -- temp = (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3)) >> 3; -- if (temp & 0x03) { /* Make sure that this is 32byte aligned */ -- temp += 0x03; -- temp &= ~0x03; -- } -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Offset: 0x%03X\n", temp)); -- hwp->writeCrtc(hwp, 0x66, temp & 0xFF); -- ViaCrtcMask(hwp, 0x67, temp >> 8, 0x03); -- --} -- - /* - * - */ --static void --ViaModeSecondaryVGA(ScrnInfoPtr pScrn, DisplayModePtr mode) --{ -- vgaHWPtr hwp = VGAHWPTR(pScrn); -- CARD16 temp; -- -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeSecondaryVGA\n")); -- -- /* bpp */ -- switch (pScrn->bitsPerPixel) { -- case 8: -- ViaCrtcMask(hwp, 0x67, 0x00, 0xC0); -- break; -- case 16: -- ViaCrtcMask(hwp, 0x67, 0x40, 0xC0); -- break; -- case 24: -- case 32: -- ViaCrtcMask(hwp, 0x67, 0x80, 0xC0); -- break; -- default: -- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unhandled bitdepth: %d\n", -- pScrn->bitsPerPixel); -- break; -- } -- -- /* Crtc registers */ -- /* horizontal total : 4096 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHTotal: 0x%03X\n", -- mode->CrtcHTotal)); -- temp = mode->CrtcHTotal - 1; -- hwp->writeCrtc(hwp, 0x50, temp & 0xFF); -- ViaCrtcMask(hwp, 0x55, temp >> 8, 0x0F); -- -- /* horizontal address : 2048 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHDisplay: 0x%03X\n", -- mode->CrtcHDisplay)); -- temp = mode->CrtcHDisplay - 1; -- hwp->writeCrtc(hwp, 0x51, temp & 0xFF); -- ViaCrtcMask(hwp, 0x55, temp >> 4, 0x70); -- -- /* horizontal blanking start : 2048 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankStart: 0x%03X\n", -- mode->CrtcHBlankStart)); -- if (mode->CrtcHBlankStart != mode->CrtcHDisplay) /* FIXME */ -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around " -- "an old VGA limitation (HBlankStart).\n"); -- temp = mode->CrtcHDisplay - 1; -- hwp->writeCrtc(hwp, 0x52, temp & 0xFF); -- ViaCrtcMask(hwp, 0x54, temp >> 8, 0x07); -- -- /* horizontal blanking end : 4096 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankEnd: 0x%03X\n", -- mode->CrtcHBlankEnd)); -- if (mode->CrtcHBlankEnd != mode->CrtcHTotal) /* FIXME */ -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around " -- "an old VGA limitation (HBlankEnd).\n"); -- temp = mode->CrtcHTotal - 1; -- hwp->writeCrtc(hwp, 0x53, temp & 0xFF); -- ViaCrtcMask(hwp, 0x54, temp >> 5, 0x38); -- ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x40); -- -- /* horizontal sync start : 2047 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncStart: 0x%03X\n", -- mode->CrtcHSyncStart)); -- temp = mode->CrtcHSyncStart; -- hwp->writeCrtc(hwp, 0x56, temp & 0xFF); -- ViaCrtcMask(hwp, 0x54, temp >> 2, 0xC0); -- ViaCrtcMask(hwp, 0x5C, temp >> 3, 0x80); -- -- /* horizontal sync end : sync start + 512 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncEnd: 0x%03X\n", -- mode->CrtcHSyncEnd)); -- temp = mode->CrtcHSyncEnd; -- hwp->writeCrtc(hwp, 0x57, temp & 0xFF); -- ViaCrtcMask(hwp, 0x5C, temp >> 2, 0x40); -- -- /* vertical total : 2048 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVTotal: 0x%03X\n", -- mode->CrtcVTotal)); -- temp = mode->CrtcVTotal - 1; -- hwp->writeCrtc(hwp, 0x58, temp & 0xFF); -- ViaCrtcMask(hwp, 0x5D, temp >> 8, 0x07); -- -- /* vertical address : 2048 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVDisplay: 0x%03X\n", -- mode->CrtcVDisplay)); -- temp = mode->CrtcVDisplay - 1; -- hwp->writeCrtc(hwp, 0x59, temp & 0xFF); -- ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x38); -- -- /* vertical blanking start : 2048 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankStart: 0x%03X\n", -- mode->CrtcVBlankStart)); -- if (mode->CrtcVBlankStart != mode->CrtcVDisplay) /* FIXME */ -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around " -- "an old VGA limitation (VBlankStart).\n"); -- temp = mode->CrtcVDisplay - 1; -- hwp->writeCrtc(hwp, 0x5A, temp & 0xFF); -- ViaCrtcMask(hwp, 0x5C, temp >> 8, 0x07); -- -- /* vertical blanking end : 2048 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankEnd: 0x%03X\n", -- mode->CrtcVBlankEnd)); -- if (mode->CrtcVBlankEnd != mode->CrtcVTotal) /* FIXME */ -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around " -- "an old VGA limitation (VBlankEnd).\n"); -- temp = mode->CrtcVTotal - 1; -- hwp->writeCrtc(hwp, 0x5B, temp & 0xFF); -- ViaCrtcMask(hwp, 0x5C, temp >> 5, 0x38); -- -- /* vertical sync start : 2047 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncStart: 0x%03X\n", -- mode->CrtcVSyncStart)); -- temp = mode->CrtcVSyncStart; -- hwp->writeCrtc(hwp, 0x5E, temp & 0xFF); -- ViaCrtcMask(hwp, 0x5F, temp >> 3, 0xE0); -- -- /* vertical sync end : start + 32 */ -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd: 0x%03X\n", -- mode->CrtcVSyncEnd)); -- temp = mode->CrtcVSyncEnd; -- ViaCrtcMask(hwp, 0x5F, temp, 0x1F); -- -- ViaModeSecondaryVGAOffset(pScrn); -- ViaModeSecondaryVGAFetchCount(pScrn, mode->CrtcHDisplay); -- --} -- --/* -- * -- */ - void --ViaModeSecondary(ScrnInfoPtr pScrn, DisplayModePtr mode) -+ViaModeSecondaryLegacy(ScrnInfoPtr pScrn, DisplayModePtr mode) - { - vgaHWPtr hwp = VGAHWPTR(pScrn); - VIAPtr pVia = VIAPTR(pScrn); - VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; - - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeSecondary\n")); -+ DEBUG(ViaPrintMode(pScrn, mode)); - - /* Turn off Screen */ - ViaCrtcMask(hwp, 0x17, 0x00, 0x80); - -- ViaModeSecondaryVGA(pScrn, mode); -+ ViaSecondCRTCSetMode(pScrn, mode); - - if (pBIOSInfo->TVActive) - ViaTVSetMode(pScrn, mode); -@@ -1959,7 +1351,7 @@ - if (!(pVia->Chipset == VIA_CLE266 && pVia->ChipRev == 0x02)) - ViaCrtcMask(hwp, 0x6C, 0x00, 0x1E); - -- if (pBIOSInfo->PanelActive -+ if (pBIOSInfo->Panel->IsActive - && (pBIOSInfo->PanelIndex != VIA_BIOS_NUM_PANEL)) { - pBIOSInfo->SetDVI = TRUE; - VIASetLCDMode(pScrn, mode); -@@ -2019,7 +1411,7 @@ - - /* Find Panel Size Index for PowerSeq Table */ - if (pVia->Chipset == VIA_CLE266) { -- if (pBIOSInfo->PanelSize != VIA_PANEL_INVALID) { -+ if (pBIOSInfo->Panel->NativeModeIndex != VIA_PANEL_INVALID) { - for (i = 0; i < NumPowerOn; i++) { - if (lcdTable[pBIOSInfo->PanelIndex].powerSeq - == powerOn[i].powerSeq) -@@ -2038,3 +1430,106 @@ - ViaLCDPowerSequence(hwp, powerOff[i]); - usleep(1); - } -+ -+void -+ViaModeFirstCRTC(ScrnInfoPtr pScrn, DisplayModePtr mode) -+{ -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeFirstCRTC\n"); -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ VIAPtr pVia = VIAPTR(pScrn); -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; -+ -+ /* Turn off Screen */ -+ ViaCrtcMask(hwp, 0x17, 0x00, 0x80); -+ -+ ViaFirstCRTCSetMode(pScrn, mode); -+ pBIOSInfo->Clock = ViaModeDotClockTranslate(pScrn, mode); -+ pBIOSInfo->ClockExternal = FALSE; -+ -+ ViaSetPrimaryFIFO(pScrn, mode); -+ -+ ViaSetPrimaryDotclock(pScrn, pBIOSInfo->Clock); -+ ViaSetUseExternalClock(hwp); -+ ViaCrtcMask(hwp, 0x6B, 0x00, 0x01); -+ -+ hwp->disablePalette(hwp); -+ -+ /* Turn on Screen */ -+ ViaCrtcMask(hwp, 0x17, 0x80, 0x80); -+} -+ -+void -+ViaModeSecondCRTC(ScrnInfoPtr pScrn, DisplayModePtr mode) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ DisplayModePtr nativeDisplayMode = pBIOSInfo->Panel->NativeDisplayMode; -+ DisplayModePtr centeredMode = pBIOSInfo->Panel->CenteredMode; -+ DisplayModePtr realMode = mode; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeSecondCRTC\n")); -+ -+ if (pBIOSInfo->Panel->IsActive) { -+ if (nativeDisplayMode) { -+ ViaPanelScale(pScrn, mode->HDisplay, mode->VDisplay, -+ nativeDisplayMode->HDisplay, -+ nativeDisplayMode->VDisplay); -+ if (!pBIOSInfo->Center -+ && (mode->HDisplay < nativeDisplayMode->HDisplay -+ || mode->VDisplay < nativeDisplayMode->VDisplay)) { -+ pBIOSInfo->Panel->Scale = TRUE; -+ realMode = nativeDisplayMode; -+ } else { -+ pBIOSInfo->Panel->Scale = FALSE; -+ ViaPanelCenterMode(centeredMode, nativeDisplayMode, mode); -+ realMode = centeredMode; -+ ViaPanelScaleDisable(pScrn); -+ } -+ } -+ } -+ -+ ViaSecondCRTCSetMode(pScrn, realMode); -+ ViaSetSecondaryFIFO(pScrn, realMode); -+ pBIOSInfo->Clock = ViaModeDotClockTranslate(pScrn, realMode); -+ -+ /* Fix LCD scaling */ -+ ViaSecondCRTCHorizontalQWCount(pScrn, mode->CrtcHDisplay); -+ -+ pBIOSInfo->ClockExternal = FALSE; -+ ViaSetSecondaryDotclock(pScrn, pBIOSInfo->Clock); -+ ViaSetUseExternalClock(hwp); -+ -+ hwp->disablePalette(hwp); -+} -+ -+void -+ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeSet\n")); -+ -+ ViaPrintMode(pScrn, mode); -+ -+ if (pBIOSInfo->SecondCRTC->IsActive) { -+ ViaModeSecondCRTC(pScrn, mode); -+ ViaSecondDisplayChannelEnable(pScrn); -+ } -+ -+ if (pBIOSInfo->FirstCRTC->IsActive) { -+ /* CRT on FirstCRTC */ -+ ViaDisplaySetStreamOnCRT(pScrn, TRUE); -+ ViaDisplayEnableCRT(pScrn); -+ ViaModeFirstCRTC(pScrn, mode); -+ } else { -+ ViaDisplayDisableCRT(pScrn); -+ } -+ -+ if (pBIOSInfo->Simultaneous->IsActive) { -+ ViaDisplayEnableSimultaneous(pScrn); -+ } else { -+ ViaDisplayDisableSimultaneous(pScrn); -+ } -+} -Index: src/via_driver.c -=================================================================== ---- src/via_driver.c (revision 588) -+++ src/via_driver.c (working copy) -@@ -513,34 +513,99 @@ - static Bool - VIAGetRec(ScrnInfoPtr pScrn) - { -+ Bool ret; -+ - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetRec\n")); -+ -+ ret = FALSE; - if (pScrn->driverPrivate) - return TRUE; - - pScrn->driverPrivate = xnfcalloc(sizeof(VIARec), 1); -- ((VIARec *) (pScrn->driverPrivate))->pBIOSInfo = -- xnfcalloc(sizeof(VIABIOSInfoRec), 1); -- ((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->scrnIndex = -- pScrn->scrnIndex; -- ((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->TVI2CDev = NULL; -+ VIAPtr pVia = ((VIARec *) (pScrn->driverPrivate)); - -- ((VIARec *) (pScrn->driverPrivate))->CursorImage = NULL; -+ if (pVia) { - -- return TRUE; -+ pVia->pBIOSInfo = xnfcalloc(sizeof(VIABIOSInfoRec), 1); -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; - -+ if (pBIOSInfo) { -+ pBIOSInfo->scrnIndex = pScrn->scrnIndex; -+ pBIOSInfo->TVI2CDev = NULL; -+ -+ pBIOSInfo->Panel = -+ (ViaPanelInfoPtr) xnfcalloc(sizeof(ViaPanelInfoRec), 1); -+ if (pBIOSInfo->Panel) { -+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL_INVALID; -+ pBIOSInfo->Panel->NativeMode = -+ (ViaPanelModePtr) xnfcalloc(sizeof(ViaPanelModeRec), 1); -+ pBIOSInfo->Panel->CenteredMode = -+ (DisplayModePtr) xnfcalloc(sizeof(DisplayModeRec), 1); -+ pBIOSInfo->Lvds = -+ (ViaLVDSInfoPtr) xnfcalloc(sizeof(ViaLVDSInfoRec), 1); -+ pBIOSInfo->FirstCRTC = -+ (ViaCRTCInfoPtr) xnfcalloc(sizeof(ViaCRTCInfoRec), 1); -+ pBIOSInfo->SecondCRTC = -+ (ViaCRTCInfoPtr) xnfcalloc(sizeof(ViaCRTCInfoRec), 1); -+ pBIOSInfo->Simultaneous = -+ (ViaSimultaneousInfoPtr) -+ xnfcalloc(sizeof(ViaSimultaneousInfoRec), 1); -+ ret = pBIOSInfo->Panel->NativeMode -+ && pBIOSInfo->Panel->CenteredMode && pBIOSInfo->Lvds -+ && pBIOSInfo->FirstCRTC && pBIOSInfo->SecondCRTC -+ && pBIOSInfo->Simultaneous; -+ } -+ pVia->VideoRegs = -+ (video_via_regs *) xnfcalloc(sizeof(video_via_regs), 1); -+ if (!pVia->VideoRegs) -+ ret = FALSE; -+ } -+ } -+ -+ return ret; -+ - } /* VIAGetRec */ - - - static void - VIAFreeRec(ScrnInfoPtr pScrn) - { -+ VIAPtr pVia = VIAPTR(pScrn); -+ - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAFreeRec\n")); - if (!pScrn->driverPrivate) - return; - -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; -+ -+ if (pBIOSInfo) { -+ -+ if (pBIOSInfo->Panel) { -+ if (pBIOSInfo->Panel->NativeMode) -+ xfree(pBIOSInfo->Panel->NativeMode); -+ if (pBIOSInfo->Panel->CenteredMode) -+ xfree(pBIOSInfo->Panel->CenteredMode); -+ xfree(pBIOSInfo->Panel); -+ } -+ -+ if (pBIOSInfo->FirstCRTC) -+ xfree(pBIOSInfo->FirstCRTC); -+ if (pBIOSInfo->SecondCRTC) -+ xfree(pBIOSInfo->SecondCRTC); -+ if (pBIOSInfo->Simultaneous) -+ xfree(pBIOSInfo->Simultaneous); -+ if (pBIOSInfo->Lvds) -+ xfree(pBIOSInfo->Lvds); -+ } -+ -+ viaCursorRecDestroy(pScrn); -+ - if (VIAPTR(pScrn)->pVbe) - vbeFree(VIAPTR(pScrn)->pVbe); - -+ if (pVia->VideoRegs) -+ xfree(pVia->VideoRegs); -+ - if (((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->TVI2CDev) - xf86DestroyI2CDevRec((((VIARec *) (pScrn->driverPrivate))->pBIOSInfo-> - TVI2CDev), TRUE); -@@ -791,7 +856,7 @@ - pVia->noComposite = FALSE; - pVia->exaScratchSize = VIA_SCRATCH_SIZE / 1024; - #endif -- pVia->hwcursor = TRUE; -+ pVia->cursor->isHWCursorEnabled = TRUE; - pVia->VQEnable = TRUE; - pVia->DRIIrqEnable = TRUE; - pVia->agpEnable = TRUE; -@@ -813,6 +878,8 @@ - pVia->swov.maxHInterp = 600; - pVia->useLegacyVBE = TRUE; - -+ pVia->UseLegacyModeSwitch = TRUE; -+ - switch (pVia->Chipset) { - case VIA_KM400: - /* IRQ is not broken on KM400A, but testing (pVia->ChipRev < 0x80) -@@ -831,6 +898,7 @@ - pVia->VideoEngine = VIDEO_ENGINE_CME; - pVia->agpEnable = FALSE; - pVia->dmaXV = FALSE; -+ pVia->UseLegacyModeSwitch = FALSE; - break; - case VIA_P4M900: - pVia->VideoEngine = VIDEO_ENGINE_CME; -@@ -838,15 +906,18 @@ - pVia->useLegacyVBE = FALSE; - /* FIXME: this needs to be tested */ - pVia->dmaXV = FALSE; -+ pVia->UseLegacyModeSwitch = FALSE; - break; - case VIA_CX700: - pVia->VideoEngine = VIDEO_ENGINE_CME; - pVia->swov.maxWInterp = 1920; - pVia->swov.maxHInterp = 1080; -+ pVia->UseLegacyModeSwitch = FALSE; - break; - case VIA_P4M890: - pVia->VideoEngine = VIDEO_ENGINE_CME; - pVia->dmaXV = FALSE; -+ pVia->UseLegacyModeSwitch = FALSE; - break; - } - -@@ -1080,6 +1154,11 @@ - - xf86DrvMsg(pScrn->scrnIndex, from, "Chipset revision: %d\n", pVia->ChipRev); - -+ if (!viaCursorRecInit(pScrn)) { -+ VIAFreeRec(pScrn); -+ return FALSE; -+ } -+ - xfree(pEnt); - - /* Detect the amount of installed RAM */ -@@ -1240,12 +1319,13 @@ - /* Use a hardware cursor, unless on secondary or on shadow framebuffer. */ - from = X_DEFAULT; - if (pVia->IsSecondary || pVia->shadowFB) -- pVia->hwcursor = FALSE; -- else if (xf86GetOptValBool(VIAOptions, OPTION_SWCURSOR, &pVia->hwcursor)) { -- pVia->hwcursor = !pVia->hwcursor; -+ pVia->cursor->isHWCursorEnabled = FALSE; -+ else if (xf86GetOptValBool(VIAOptions, OPTION_SWCURSOR, -+ &pVia->cursor->isHWCursorEnabled)) { -+ pVia->cursor->isHWCursorEnabled = !pVia->cursor->isHWCursorEnabled; - from = X_CONFIG; - } -- if (pVia->hwcursor) -+ if (pVia->cursor->isHWCursorEnabled) - xf86DrvMsg(pScrn->scrnIndex, from, "Using hardware two-color " - "cursors and software full-color cursors.\n"); - else -@@ -1375,45 +1455,24 @@ - xf86DrvMsg(pScrn->scrnIndex, from, "DVI Center is %s.\n", - pBIOSInfo->Center ? "enabled" : "disabled"); - -- - /* Panel Size Option */ -- pBIOSInfo->PanelSize = VIA_PANEL_INVALID; - if ((s = xf86GetOptValString(VIAOptions, OPTION_PANELSIZE))) { -- if (!xf86NameCmp(s, "640x480")) { -- pBIOSInfo->PanelSize = VIA_PANEL6X4; -+ ViaPanelGetNativeModeFromOption(pScrn, s); -+ if (pBIOSInfo->Panel->NativeModeIndex != VIA_PANEL_INVALID) { -+ ViaPanelModePtr mode = pBIOSInfo->Panel->NativeMode; -+ -+ DEBUG(xf86DrvMsg -+ (pScrn->scrnIndex, X_CONFIG, "Panel mode index is %d\n", -+ pBIOSInfo->Panel->NativeModeIndex)); - xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, -- "Selected Panel Size is 640x480\n"); -- } else if (!xf86NameCmp(s, "800x600")) { -- pBIOSInfo->PanelSize = VIA_PANEL8X6; -- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, -- "Selected Panel Size is 800x600\n"); -- } else if (!xf86NameCmp(s, "1024x768")) { -- pBIOSInfo->PanelSize = VIA_PANEL10X7; -- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, -- "Selected Panel Size is 1024x768\n"); -- } else if (!xf86NameCmp(s, "1280x768")) { -- pBIOSInfo->PanelSize = VIA_PANEL12X7; -- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, -- "Selected Panel Size is 1280x768\n"); -- } else if (!xf86NameCmp(s, "1280x800")) { -- pBIOSInfo->PanelSize = VIA_PANEL12X8; -- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, -- "Selected Panel Size is 1280x800\n"); -- } else if (!xf86NameCmp(s, "1280x1024")) { -- pBIOSInfo->PanelSize = VIA_PANEL12X10; -- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, -- "Selected Panel Size is 1280x1024\n"); -- } else if (!xf86NameCmp(s, "1400x1050")) { -- pBIOSInfo->PanelSize = VIA_PANEL14X10; -- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, -- "Selected Panel Size is 1400x1050\n"); -+ "Selected Panel Size is %dx%d\n", mode->Width, -+ mode->Height); - } - } else { - xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, - "Panel size is not selected from config file.\n"); - } - -- - /* Force the use of the Panel? */ - pBIOSInfo->ForcePanel = FALSE; - from = xf86GetOptValBool(VIAOptions, OPTION_FORCEPANEL, -@@ -1605,17 +1661,17 @@ - return FALSE; - } - -- if (pBIOSInfo->PanelActive && -+ if (!pVia->UseLegacyModeSwitch) { -+ if (pBIOSInfo->Panel->IsActive) -+ ViaPanelPreInit(pScrn); -+ } -+ -+ if (pBIOSInfo->Panel->IsActive && - ((pVia->Chipset == VIA_K8M800) || - (pVia->Chipset == VIA_PM800) || -- (pVia->Chipset == VIA_VM800) || -- (pVia->Chipset == VIA_P4M890) || -- (pVia->Chipset == VIA_K8M890) || -- (pVia->Chipset == VIA_CX700) || -- (pVia->Chipset == VIA_P4M900))) { -- xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -- "Panel on K8M800, PM800, VM800, P4M890, K8M890, CX700 or " -- "P4M900 is currently not supported.\n"); -+ (pVia->Chipset == VIA_VM800))) { -+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Panel on K8M800, PM800 and " -+ "VM800 is currently not supported.\n"); - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, - "Using VBE to set modes to work around this.\n"); - pVia->useVBEModes = TRUE; -@@ -1787,7 +1849,7 @@ - xf86LoaderReqSymLists(xaaSymbols, NULL); - } - -- if (pVia->hwcursor) { -+ if (pVia->cursor->isHWCursorEnabled) { - if (!xf86LoadSubModule(pScrn, "ramdac")) { - VIAFreeRec(pScrn); - return FALSE; -@@ -1835,8 +1897,8 @@ - VIASaveScreen(pScrn->pScreen, SCREEN_SAVER_ON); - - /* A patch for APM suspend/resume, when HWCursor has garbage. */ -- if (pVia->hwcursor) -- ViaCursorRestore(pScrn); -+ if (pVia->cursor->isHWCursorEnabled) -+ viaCursorRestore(pScrn); - - /* Restore video status. */ - if (!pVia->IsSecondary) -@@ -1907,8 +1969,8 @@ - if (!pVia->IsSecondary) - viaSaveVideo(pScrn); - -- if (pVia->hwcursor) -- ViaCursorStore(pScrn); -+ if (pVia->cursor->isHWCursorEnabled) -+ viaCursorStore(pScrn); - - if (pVia->pVbe && pVia->vbeSR) - ViaVbeSaveRestore(pScrn, MODE_RESTORE); -@@ -1918,7 +1980,40 @@ - vgaHWLock(hwp); - } - -+static void -+ViaGammaDisable(ScrnInfoPtr pScrn) -+{ - -+ VIAPtr pVia = VIAPTR(pScrn); -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ switch (pVia->Chipset) { -+ case VIA_CLE266: -+ case VIA_KM400: -+ ViaSeqMask(hwp, 0x16, 0x00, 0x80); -+ break; -+ default: -+ ViaCrtcMask(hwp, 0x33, 0x00, 0x80); -+ break; -+ } -+ -+ /* Disable gamma on secondary */ -+ /* This is needed or the hardware will lockup */ -+ ViaSeqMask(hwp, 0x1A, 0x00, 0x01); -+ ViaCrtcMask(hwp, 0x6A, 0x00, 0x02); -+ switch (pVia->Chipset) { -+ case VIA_CLE266: -+ case VIA_KM400: -+ case VIA_K8M800: -+ case VIA_PM800: -+ break; -+ default: -+ ViaCrtcMask(hwp, 0x6A, 0x00, 0x20); -+ break; -+ } -+ -+} -+ - static void - VIASave(ScrnInfoPtr pScrn) - { -@@ -2009,6 +2104,7 @@ - Regs->CR35 = hwp->readCrtc(hwp, 0x35); - Regs->CR36 = hwp->readCrtc(hwp, 0x36); - -+ Regs->CR48 = hwp->readCrtc(hwp, 0x48); - Regs->CR49 = hwp->readCrtc(hwp, 0x49); - - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "TVSave...\n")); -@@ -2019,15 +2115,19 @@ - for (i = 0; i < 68; i++) - Regs->CRTCRegs[i] = hwp->readCrtc(hwp, i + 0x50); - -- Regs->CRA0 = hwp->readCrtc(hwp, 0xA0); -- Regs->CRA1 = hwp->readCrtc(hwp, 0xA1); -- Regs->CRA2 = hwp->readCrtc(hwp, 0xA2); -+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) { - -- Regs->CR97 = hwp->readCrtc(hwp, 0x97); -- Regs->CR99 = hwp->readCrtc(hwp, 0x99); -- Regs->CR9B = hwp->readCrtc(hwp, 0x9B); -- Regs->CR9F = hwp->readCrtc(hwp, 0x9F); -+ Regs->CRA0 = hwp->readCrtc(hwp, 0xA0); -+ Regs->CRA1 = hwp->readCrtc(hwp, 0xA1); -+ Regs->CRA2 = hwp->readCrtc(hwp, 0xA2); - -+ Regs->CR97 = hwp->readCrtc(hwp, 0x97); -+ Regs->CR99 = hwp->readCrtc(hwp, 0x99); -+ Regs->CR9B = hwp->readCrtc(hwp, 0x9B); -+ Regs->CR9F = hwp->readCrtc(hwp, 0x9F); -+ -+ } -+ - vgaHWProtect(pScrn, FALSE); - } - } -@@ -2055,6 +2155,8 @@ - hwp->writeCrtc(hwp, 0x6B, 0x00); - hwp->writeCrtc(hwp, 0x6C, 0x00); - -+ ViaGammaDisable(pScrn); -+ - if (pBIOSInfo->TVI2CDev) - ViaTVRestore(pScrn); - -@@ -2118,22 +2220,27 @@ - hwp->writeCrtc(hwp, 0x35, Regs->CR35); - hwp->writeCrtc(hwp, 0x36, Regs->CR36); - -+ hwp->writeCrtc(hwp, 0x48, Regs->CR48); - hwp->writeCrtc(hwp, 0x49, Regs->CR49); - - /* Restore LCD control registers. */ - for (i = 0; i < 68; i++) - hwp->writeCrtc(hwp, i + 0x50, Regs->CRTCRegs[i]); - -- hwp->writeCrtc(hwp, 0xA0, Regs->CRA0); -- hwp->writeCrtc(hwp, 0xA1, Regs->CRA1); -- hwp->writeCrtc(hwp, 0xA2, Regs->CRA2); --#if 0 -- hwp->writeCrtc(hwp, 0x97, Regs->CR97); -- hwp->writeCrtc(hwp, 0x99, Regs->CR99); -- hwp->writeCrtc(hwp, 0x9B, Regs->CR9B); -- hwp->writeCrtc(hwp, 0x9F, Regs->CR9F); --#endif -- if (pBIOSInfo->PanelActive) -+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) { -+ -+ hwp->writeCrtc(hwp, 0xA0, Regs->CRA0); -+ hwp->writeCrtc(hwp, 0xA1, Regs->CRA1); -+ hwp->writeCrtc(hwp, 0xA2, Regs->CRA2); -+ -+ hwp->writeCrtc(hwp, 0x97, Regs->CR97); -+ hwp->writeCrtc(hwp, 0x99, Regs->CR99); -+ hwp->writeCrtc(hwp, 0x9B, Regs->CR9B); -+ hwp->writeCrtc(hwp, 0x9F, Regs->CR9F); -+ -+ } -+ -+ if (pBIOSInfo->Panel->IsActive) - ViaLCDPower(pScrn, TRUE); - - ViaDisablePrimaryFIFO(pScrn); -@@ -2145,7 +2252,45 @@ - vgaHWProtect(pScrn, FALSE); - } - -+static void -+ViaMMIOEnable(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ vgaHWPtr hwp = VGAHWPTR(pScrn); - -+ switch (pVia->Chipset) { -+ case VIA_K8M890: -+ case VIA_CX700: -+ case VIA_P4M900: -+ ViaSeqMask(hwp, 0x1A, 0x08, 0x08); -+ break; -+ default: -+ if (pVia->IsSecondary) -+ ViaSeqMask(hwp, 0x1A, 0x38, 0x38); -+ else -+ ViaSeqMask(hwp, 0x1A, 0x68, 0x68); -+ break; -+ } -+} -+ -+static void -+ViaMMIODisable(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ switch (pVia->Chipset) { -+ case VIA_K8M890: -+ case VIA_CX700: -+ case VIA_P4M900: -+ ViaSeqMask(VGAHWPTR(pScrn), 0x1A, 0x00, 0x08); -+ break; -+ default: -+ ViaSeqMask(VGAHWPTR(pScrn), 0x1A, 0x00, 0x60); -+ break; -+ } -+} -+ - static Bool - VIAMapMMIO(ScrnInfoPtr pScrn) - { -@@ -2215,7 +2360,7 @@ - - if (!pVia->MapBase || !pVia->BltBase) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, -- "Internal error: cound not map registers\n"); -+ "BitBlit could not be mapped.\n"); - return FALSE; - } - -@@ -2238,14 +2383,15 @@ - hwp->writeMiscOut(hwp, val | 0x01); - - /* Unlock extended IO space. */ -- hwp->writeSeq(hwp, 0x10, 0x01); -+ ViaSeqMask(hwp, 0x10, 0x01, 0x01); - -- /* Enable MMIO. */ -- if (pVia->IsSecondary) -- ViaSeqMask(hwp, 0x1A, 0x38, 0x38); -- else -- ViaSeqMask(hwp, 0x1A, 0x68, 0x68); -+ ViaMMIOEnable(pScrn); - -+ vgaHWSetMmioFuncs(hwp, pVia->MapBase, 0x8000); -+ -+ /* Unlock CRTC. */ -+ ViaCrtcMask(hwp, 0x47, 0x00, 0x01); -+ - vgaHWGetIOBase(hwp); - } - -@@ -2346,8 +2492,7 @@ - - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAUnmapMem\n")); - -- /* Disable MMIO. */ -- ViaSeqMask(VGAHWPTR(pScrn), 0x1A, 0x00, 0x60); -+ ViaMMIODisable(pScrn); - - #ifdef XSERVER_LIBPCIACCESS - if (pVia->MapBase) -@@ -2431,75 +2576,65 @@ - { - vgaHWPtr hwp = VGAHWPTR(pScrn); - VIAPtr pVia = VIAPTR(pScrn); -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; -+ - int i, index; - int SR1A, SR1B, CR67, CR6A; - - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIALoadPalette\n")); - - if (pScrn->bitsPerPixel != 8) { -- switch (pVia->Chipset) { -- case VIA_CLE266: -- case VIA_KM400: -- ViaSeqMask(hwp, 0x16, 0x80, 0x80); -- break; -- case VIA_P4M900: -- xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "VIALoadPalette: " -- "Function not implemented for this chipset.\n"); -- return; -- default: -- ViaCrtcMask(hwp, 0x33, 0x80, 0x80); -- break; -- } - -- ViaSeqMask(hwp, 0x1A, 0x00, 0x01); -- VIALoadRgbLut(pScrn, numColors, indices, colors, pVisual); -+ if (pBIOSInfo->FirstCRTC->IsActive) { - -- /* If secondary is enabled, adjust its palette too. */ -- if (hwp->readCrtc(hwp, 0x6A) & 0x80) { -- ViaSeqMask(hwp, 0x1A, 0x01, 0x01); -- ViaCrtcMask(hwp, 0x6A, 0x02, 0x02); - switch (pVia->Chipset) { -- case VIA_K8M800: -- case VIA_PM800: -+ case VIA_CLE266: -+ case VIA_KM400: -+ ViaSeqMask(hwp, 0x16, 0x80, 0x80); - break; - default: -- ViaSeqMask(hwp, 0x6A, 0x20, 0x20); -+ ViaCrtcMask(hwp, 0x33, 0x80, 0x80); - break; - } -+ -+ ViaSeqMask(hwp, 0x1A, 0x00, 0x01); - VIALoadRgbLut(pScrn, numColors, indices, colors, pVisual); - } - -- return; -- } -+ /* If secondary is enabled, adjust its palette too. */ -+ if (pBIOSInfo->SecondCRTC->IsActive) { -+ if (!(pVia->Chipset == VIA_CLE266 -+ && CLE266_REV_IS_AX(pVia->ChipRev))) { -+ ViaSeqMask(hwp, 0x1A, 0x01, 0x01); -+ ViaCrtcMask(hwp, 0x6A, 0x02, 0x02); -+ switch (pVia->Chipset) { -+ case VIA_CLE266: -+ case VIA_KM400: -+ case VIA_K8M800: -+ case VIA_PM800: -+ break; -+ default: -+ ViaCrtcMask(hwp, 0x6A, 0x20, 0x20); -+ break; -+ } -+ VIALoadRgbLut(pScrn, numColors, indices, colors, pVisual); -+ } -+ } - -- SR1A = hwp->readSeq(hwp, 0x1A); -- SR1B = hwp->readSeq(hwp, 0x1B); -- CR67 = hwp->readCrtc(hwp, 0x67); -- CR6A = hwp->readCrtc(hwp, 0x6A); -+ } else { - -- if (pVia->IsSecondary) { -- ViaSeqMask(hwp, 0x1A, 0x01, 0x01); -- ViaSeqMask(hwp, 0x1B, 0x80, 0x80); -- ViaCrtcMask(hwp, 0x67, 0x00, 0xC0); -- ViaCrtcMask(hwp, 0x6A, 0xC0, 0xC0); -- } -+ SR1A = hwp->readSeq(hwp, 0x1A); -+ SR1B = hwp->readSeq(hwp, 0x1B); -+ CR67 = hwp->readCrtc(hwp, 0x67); -+ CR6A = hwp->readCrtc(hwp, 0x6A); - -- for (i = 0; i < numColors; i++) { -- index = indices[i]; -- hwp->writeDacWriteAddr(hwp, index); -- hwp->writeDacData(hwp, colors[index].red); -- hwp->writeDacData(hwp, colors[index].green); -- hwp->writeDacData(hwp, colors[index].blue); -- } -+ if (pBIOSInfo->SecondCRTC->IsActive) { -+ ViaSeqMask(hwp, 0x1A, 0x01, 0x01); -+ ViaSeqMask(hwp, 0x1B, 0x80, 0x80); -+ ViaCrtcMask(hwp, 0x67, 0x00, 0xC0); -+ ViaCrtcMask(hwp, 0x6A, 0xC0, 0xC0); -+ } - -- if (pVia->IsSecondary) { -- hwp->writeSeq(hwp, 0x1A, SR1A); -- hwp->writeSeq(hwp, 0x1B, SR1B); -- hwp->writeCrtc(hwp, 0x67, CR67); -- hwp->writeCrtc(hwp, 0x6A, CR6A); -- -- /* Screen 0 palette was changed by mode setting of Screen 1, -- * so load it again. */ - for (i = 0; i < numColors; i++) { - index = indices[i]; - hwp->writeDacWriteAddr(hwp, index); -@@ -2507,6 +2642,23 @@ - hwp->writeDacData(hwp, colors[index].green); - hwp->writeDacData(hwp, colors[index].blue); - } -+ -+ if (pBIOSInfo->SecondCRTC->IsActive) { -+ hwp->writeSeq(hwp, 0x1A, SR1A); -+ hwp->writeSeq(hwp, 0x1B, SR1B); -+ hwp->writeCrtc(hwp, 0x67, CR67); -+ hwp->writeCrtc(hwp, 0x6A, CR6A); -+ -+ /* Screen 0 palette was changed by mode setting of Screen 1, -+ * so load it again. */ -+ for (i = 0; i < numColors; i++) { -+ index = indices[i]; -+ hwp->writeDacWriteAddr(hwp, index); -+ hwp->writeDacData(hwp, colors[index].red); -+ hwp->writeDacData(hwp, colors[index].green); -+ hwp->writeDacData(hwp, colors[index].blue); -+ } -+ } - } - } - -@@ -2543,6 +2695,10 @@ - } - } else { - vgaHWBlankScreen(pScrn, FALSE); -+ -+ if (!pVia->UseLegacyModeSwitch && !pVia->IsSecondary) -+ ViaCRTCInit(pScrn); -+ - if (!VIAWriteMode(pScrn, pScrn->currentMode)) { - vgaHWBlankScreen(pScrn, TRUE); - return FALSE; -@@ -2622,8 +2778,8 @@ - miDCInitialize(pScreen, xf86GetPointerScreenFuncs()); - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- SW cursor set up\n")); - -- if (pVia->hwcursor) { -- if (!VIAHWCursorInit(pScreen)) { -+ if (pVia->cursor->isHWCursorEnabled) { -+ if (!viaCursorHWInit(pScreen)) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, - "Hardware cursor initialization failed\n"); - } -@@ -2787,6 +2943,7 @@ - VIAWriteMode(ScrnInfoPtr pScrn, DisplayModePtr mode) - { - VIAPtr pVia = VIAPTR(pScrn); -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; - - DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAWriteMode\n")); - -@@ -2799,10 +2956,14 @@ - if (!vgaHWInit(pScrn, mode)) - return FALSE; - -- if (!pVia->IsSecondary) -- ViaModePrimary(pScrn, mode); -- else -- ViaModeSecondary(pScrn, mode); -+ if (pVia->UseLegacyModeSwitch) { -+ if (!pVia->IsSecondary) -+ ViaModePrimaryLegacy(pScrn, mode); -+ else -+ ViaModeSecondaryLegacy(pScrn, mode); -+ } else { -+ ViaModeSet(pScrn, mode); -+ } - - } else { - -@@ -2813,14 +2974,13 @@ - * to detect when the display is using the secondary head. - * TODO: This should be enabled for other chipsets as well. - */ -- if (pVia->Chipset == VIA_P4M900 && pVia->pBIOSInfo->PanelActive) { -+ if (pVia->Chipset == VIA_P4M900 && pVia->pBIOSInfo->Panel->IsActive) { - /* - * Since we are using virtual, we need to adjust - * the offset to match the framebuffer alignment. - */ -- if (pScrn->displayWidth != mode->HDisplay) -- ViaModeSecondaryVGAOffset(pScrn); -- // ViaModeSecondaryVGAFixAlignment(pScrn, mode); -+ if (pScrn->displayWidth != mode->CrtcHDisplay) -+ ViaSecondCRTCHorizontalOffset(pScrn); - } - } - -@@ -2862,8 +3022,8 @@ - if (!pVia->IsSecondary) { - /* Turn off all video activities. */ - viaExitVideo(pScrn); -- -- VIAHideCursor(pScrn); -+ if (pVia->cursor->isHWCursorEnabled) -+ viaCursorHide(pScrn); - } - - if (pVia->VQEnable) -@@ -2875,9 +3035,9 @@ - #endif - - viaExitAccel(pScreen); -- if (pVia->CursorInfoRec) { -- xf86DestroyCursorInfoRec(pVia->CursorInfoRec); -- pVia->CursorInfoRec = NULL; -+ if (pVia->cursor->info) { -+ xf86DestroyCursorInfoRec(pVia->cursor->info); -+ pVia->cursor->info = NULL; - } - if (pVia->ShadowPtr) { - xfree(pVia->ShadowPtr); -@@ -2936,24 +3096,17 @@ - if (pVia->pVbe) { - ViaVbeAdjustFrame(scrnIndex, x, y, flags); - } else { -+ if (pVia->UseLegacyModeSwitch) { -+ if (!pVia->IsSecondary) -+ ViaFirstCRTCSetStartingAddress(pScrn, x, y); -+ else -+ ViaSecondCRTCSetStartingAddress(pScrn, x, y); -+ } else { -+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) -+ ViaFirstCRTCSetStartingAddress(pScrn, x, y); - -- Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8); -- -- /* Now program the start address registers. */ -- if (pVia->IsSecondary) { -- Base = (Base + pScrn->fbOffset) >> 3; -- ViaCrtcMask(hwp, 0x62, (Base & 0x7F) << 1, 0xFE); -- hwp->writeCrtc(hwp, 0x63, (Base & 0x7F80) >> 7); -- hwp->writeCrtc(hwp, 0x64, (Base & 0x7F8000) >> 15); -- } else { -- Base = Base >> 1; -- hwp->writeCrtc(hwp, 0x0C, (Base & 0xFF00) >> 8); -- hwp->writeCrtc(hwp, 0x0D, Base & 0xFF); -- hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16); --#if 0 -- /* The CLE266A doesn't have this implemented, it seems. -- Luc */ -- ViaCrtcMask(hwp, 0x48, Base >> 24, 0x03); --#endif -+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) -+ ViaSecondCRTCSetStartingAddress(pScrn, x, y); - } - } - -@@ -3003,49 +3156,57 @@ - vgaHWPtr hwp = VGAHWPTR(pScrn); - VIAPtr pVia = VIAPTR(pScrn); - VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; -- CARD8 val; - - if (pVia->pVbe) { - ViaVbeDPMS(pScrn, mode, flags); -- return; -- } -+ } else { - -- /* Clear DPMS setting. */ -- val = hwp->readCrtc(hwp, 0x36); -- val &= 0xCF; -+ switch (mode) { -+ case DPMSModeOn: - -- /* Turn CRT off, if user doesn't want it on. */ -- if (!pVia->IsSecondary && !pBIOSInfo->CrtActive) -- val |= 0x30; -+ if (pBIOSInfo->Lvds->IsActive) -+ ViaLVDSPower(pScrn, TRUE); - -- switch (mode) { -- case DPMSModeOn: -- if (pBIOSInfo->PanelActive) -- ViaLCDPower(pScrn, TRUE); -+ if (pBIOSInfo->CrtActive) -+ ViaDisplayEnableCRT(pScrn); - -- if (pBIOSInfo->TVActive) -- ViaTVPower(pScrn, TRUE); -+ if (pBIOSInfo->Panel->IsActive) -+ ViaLCDPower(pScrn, TRUE); - -- hwp->writeCrtc(hwp, 0x36, val); -- break; -- case DPMSModeStandby: -- case DPMSModeSuspend: -- case DPMSModeOff: -- if (pBIOSInfo->PanelActive) -- ViaLCDPower(pScrn, FALSE); -+ if (pBIOSInfo->TVActive) -+ ViaTVPower(pScrn, TRUE); - -- if (pBIOSInfo->TVActive) -- ViaTVPower(pScrn, FALSE); -+ if (pBIOSInfo->Simultaneous->IsActive) -+ ViaDisplayEnableSimultaneous(pScrn); - -- val |= 0x30; -- hwp->writeCrtc(hwp, 0x36, val); -- break; -- default: -- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, -- "Invalid DPMS mode %d\n", mode); -- break; -+ break; -+ case DPMSModeStandby: -+ case DPMSModeSuspend: -+ case DPMSModeOff: -+ -+ if (pBIOSInfo->Lvds->IsActive) -+ ViaLVDSPower(pScrn, FALSE); -+ -+ if (pBIOSInfo->CrtActive) -+ ViaDisplayDisableCRT(pScrn); -+ -+ if (pBIOSInfo->Panel->IsActive) -+ ViaLCDPower(pScrn, FALSE); -+ -+ if (pBIOSInfo->TVActive) -+ ViaTVPower(pScrn, FALSE); -+ -+ if (pBIOSInfo->Simultaneous->IsActive) -+ ViaDisplayDisableSimultaneous(pScrn); -+ -+ break; -+ default: -+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid DPMS mode %d\n", -+ mode); -+ break; -+ } - } -- return; -+ - } - - #if defined(XF86DRI) || defined(VIA_HAVE_EXA) -Index: src/via_crtc.c -=================================================================== ---- src/via_crtc.c (revision 0) -+++ src/via_crtc.c (revision 0) -@@ -0,0 +1,612 @@ -+/* -+ * Copyright 2005-2007 The Openchrome Project [openchrome.org] -+ * Copyright 2004-2005 The Unichrome Project [unichrome.sf.net] -+ * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. -+ * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sub license, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the -+ * next paragraph) shall be included in all copies or substantial portions -+ * of the Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -+ * DEALINGS IN THE SOFTWARE. -+ */ -+ -+#ifdef HAVE_CONFIG_H -+#include "config.h" -+#endif -+ -+#include "via.h" -+#include "via_driver.h" -+#include "via_vgahw.h" -+#include "via_id.h" -+ -+#include "via_mode.h" -+ -+static void -+ViaCRTCSetGraphicsRegisters(ScrnInfoPtr pScrn) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ /* graphics registers */ -+ hwp->writeGr(hwp, 0x00, 0x00); -+ hwp->writeGr(hwp, 0x01, 0x00); -+ hwp->writeGr(hwp, 0x02, 0x00); -+ hwp->writeGr(hwp, 0x03, 0x00); -+ hwp->writeGr(hwp, 0x04, 0x00); -+ hwp->writeGr(hwp, 0x05, 0x40); -+ hwp->writeGr(hwp, 0x06, 0x05); -+ hwp->writeGr(hwp, 0x07, 0x0F); -+ hwp->writeGr(hwp, 0x08, 0xFF); -+ -+ ViaGrMask(hwp, 0x20, 0, 0xFF); -+ ViaGrMask(hwp, 0x21, 0, 0xFF); -+ ViaGrMask(hwp, 0x22, 0, 0xFF); -+} -+ -+static void -+ViaCRTCSetAttributeRegisters(ScrnInfoPtr pScrn) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ CARD8 i; -+ -+ /* attribute registers */ -+ for (i = 0; i <= 0xF; i++) { -+ hwp->writeAttr(hwp, i, i); -+ } -+ hwp->writeAttr(hwp, 0x10, 0x41); -+ hwp->writeAttr(hwp, 0x11, 0xFF); -+ hwp->writeAttr(hwp, 0x12, 0x0F); -+ hwp->writeAttr(hwp, 0x13, 0x00); -+ hwp->writeAttr(hwp, 0x14, 0x00); -+} -+ -+void -+ViaCRTCInit(ScrnInfoPtr pScrn) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ hwp->writeSeq(hwp, 0x10, 0x01); /* unlock extended registers */ -+ ViaCrtcMask(hwp, 0x47, 0x00, 0x01); /* unlock CRT registers */ -+ ViaCRTCSetGraphicsRegisters(pScrn); -+ ViaCRTCSetAttributeRegisters(pScrn); -+} -+ -+void -+ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ VIAPtr pVia = VIAPTR(pScrn); -+ CARD16 temp; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaFirstCRTCSetMode\n")); -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting up %s\n", mode->name)); -+ -+ ViaCrtcMask(hwp, 0x11, 0x00, 0x80); /* modify starting address */ -+ ViaCrtcMask(hwp, 0x03, 0x80, 0x80); /* enable vertical retrace access */ -+ -+ /* Set Misc Register */ -+ temp = 0x23; -+ if (mode->Flags & V_NHSYNC) -+ temp |= 0x40; -+ if (mode->Flags & V_NVSYNC) -+ temp |= 0x80; -+ temp |= 0x0C; /* Undefined/external clock */ -+ hwp->writeMiscOut(hwp, temp); -+ -+ /* Sequence registers */ -+ hwp->writeSeq(hwp, 0x00, 0x00); -+ -+#if 0 -+ if (mode->Flags & V_CLKDIV2) -+ hwp->writeSeq(hwp, 0x01, 0x09); -+ else -+#endif -+ hwp->writeSeq(hwp, 0x01, 0x01); -+ -+ hwp->writeSeq(hwp, 0x02, 0x0F); -+ hwp->writeSeq(hwp, 0x03, 0x00); -+ hwp->writeSeq(hwp, 0x04, 0x0E); -+ -+ ViaSeqMask(hwp, 0x15, 0x02, 0x02); -+ -+ /* bpp */ -+ switch (pScrn->bitsPerPixel) { -+ case 8: -+ /* Only CLE266.AX use 6bits LUT. */ -+ if (pVia->Chipset == VIA_CLE266 && pVia->ChipRev < 15) -+ ViaSeqMask(hwp, 0x15, 0x22, 0xFE); -+ else -+ ViaSeqMask(hwp, 0x15, 0xA2, 0xFE); -+ -+ break; -+ case 16: -+ ViaSeqMask(hwp, 0x15, 0xB6, 0xFE); -+ break; -+ case 24: -+ case 32: -+ ViaSeqMask(hwp, 0x15, 0xAE, 0xFE); -+ break; -+ default: -+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unhandled bitdepth: %d\n", -+ pScrn->bitsPerPixel); -+ break; -+ } -+ -+ /* FIXME: check if this is really necessary here */ -+ switch (pVia->ChipId) { -+ case VIA_K8M890: -+ case VIA_CX700: -+ case VIA_P4M900: -+ break; -+ default: -+ ViaSeqMask(hwp, 0x16, 0x08, 0xBF); -+ ViaSeqMask(hwp, 0x17, 0x1F, 0xFF); -+ ViaSeqMask(hwp, 0x18, 0x4E, 0xFF); -+ ViaSeqMask(hwp, 0x1A, 0x08, 0xFD); -+ break; -+ } -+ -+ /* Crtc registers */ -+ /* horizontal total : 4100 */ -+ temp = (mode->CrtcHTotal >> 3) - 5; -+ hwp->writeCrtc(hwp, 0x00, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x36, temp >> 5, 0x08); -+ -+ /* horizontal address : 2048 */ -+ temp = (mode->CrtcHDisplay >> 3) - 1; -+ hwp->writeCrtc(hwp, 0x01, temp & 0xFF); -+ -+ /* horizontal blanking start : 2048 */ -+ /* temp = (mode->CrtcHDisplay >> 3) - 1; */ -+ temp = (mode->CrtcHBlankStart >> 3) - 1; -+ hwp->writeCrtc(hwp, 0x02, temp & 0xFF); -+ /* If HblankStart has more bits anywhere, add them here */ -+ -+ /* horizontal blanking end : start + 1025 */ -+ /* temp = (mode->CrtcHTotal >> 3) - 1; */ -+ temp = (mode->CrtcHBlankEnd >> 3) - 1; -+ ViaCrtcMask(hwp, 0x03, temp, 0x1F); -+ ViaCrtcMask(hwp, 0x05, temp << 2, 0x80); -+ ViaCrtcMask(hwp, 0x33, temp >> 1, 0x20); -+ -+ /* CrtcHSkew ??? */ -+ -+ /* horizontal sync start : 4095 */ -+ temp = mode->CrtcHSyncStart >> 3; -+ hwp->writeCrtc(hwp, 0x04, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x33, temp >> 4, 0x10); -+ -+ /* horizontal sync end : start + 256 */ -+ temp = mode->CrtcHSyncEnd >> 3; -+ ViaCrtcMask(hwp, 0x05, temp, 0x1F); -+ -+ /* vertical total : 2049 */ -+ temp = mode->CrtcVTotal - 2; -+ hwp->writeCrtc(hwp, 0x06, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x07, temp >> 8, 0x01); -+ ViaCrtcMask(hwp, 0x07, temp >> 4, 0x20); -+ ViaCrtcMask(hwp, 0x35, temp >> 10, 0x01); -+ -+ /* vertical address : 2048 */ -+ temp = mode->CrtcVDisplay - 1; -+ hwp->writeCrtc(hwp, 0x12, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x07, temp >> 7, 0x02); -+ ViaCrtcMask(hwp, 0x07, temp >> 3, 0x40); -+ ViaCrtcMask(hwp, 0x35, temp >> 8, 0x04); -+ -+ /* Primary starting address -> 0x00, adjustframe does the rest */ -+ hwp->writeCrtc(hwp, 0x0C, 0x00); -+ hwp->writeCrtc(hwp, 0x0D, 0x00); -+ hwp->writeCrtc(hwp, 0x34, 0x00); -+ ViaCrtcMask(hwp, 0x48, 0x00, 0x03); /* is this even possible on CLE266A ? */ -+ -+ /* vertical sync start : 2047 */ -+ temp = mode->CrtcVSyncStart; -+ hwp->writeCrtc(hwp, 0x10, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x07, temp >> 6, 0x04); -+ ViaCrtcMask(hwp, 0x07, temp >> 2, 0x80); -+ ViaCrtcMask(hwp, 0x35, temp >> 9, 0x02); -+ -+ /* vertical sync end : start + 16 -- other bits someplace? */ -+ ViaCrtcMask(hwp, 0x11, mode->CrtcVSyncEnd, 0x0F); -+ -+ /* line compare: We are not doing splitscreen so 0x3FFF */ -+ hwp->writeCrtc(hwp, 0x18, 0xFF); -+ ViaCrtcMask(hwp, 0x07, 0x10, 0x10); -+ ViaCrtcMask(hwp, 0x09, 0x40, 0x40); -+ ViaCrtcMask(hwp, 0x33, 0x07, 0x06); -+ ViaCrtcMask(hwp, 0x35, 0x10, 0x10); -+ -+ /* zero Maximum scan line */ -+ ViaCrtcMask(hwp, 0x09, 0x00, 0x1F); -+ hwp->writeCrtc(hwp, 0x14, 0x00); -+ -+ /* vertical blanking start : 2048 */ -+ /* temp = mode->CrtcVDisplay - 1; */ -+ temp = mode->CrtcVBlankStart - 1; -+ hwp->writeCrtc(hwp, 0x15, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x07, temp >> 5, 0x08); -+ ViaCrtcMask(hwp, 0x09, temp >> 4, 0x20); -+ ViaCrtcMask(hwp, 0x35, temp >> 7, 0x08); -+ -+ /* vertical blanking end : start + 257 */ -+ /* temp = mode->CrtcVTotal - 1; */ -+ temp = mode->CrtcVBlankEnd - 1; -+ hwp->writeCrtc(hwp, 0x16, temp); -+ -+ /* FIXME: check if this is really necessary here */ -+ switch (pVia->ChipId) { -+ case VIA_K8M890: -+ case VIA_CX700: -+ case VIA_P4M900: -+ break; -+ default: -+ /* some leftovers */ -+ hwp->writeCrtc(hwp, 0x08, 0x00); -+ ViaCrtcMask(hwp, 0x32, 0, 0xFF); /* ? */ -+ ViaCrtcMask(hwp, 0x33, 0, 0xC8); -+ break; -+ } -+ -+ /* offset */ -+ temp = (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3)) >> 3; -+ /* Make sure that this is 32-byte aligned. */ -+ if (temp & 0x03) { -+ temp += 0x03; -+ temp &= ~0x03; -+ } -+ hwp->writeCrtc(hwp, 0x13, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x35, temp >> 3, 0xE0); -+ -+ /* fetch count */ -+ temp = (mode->CrtcHDisplay * (pScrn->bitsPerPixel >> 3)) >> 3; -+ /* Make sure that this is 32-byte aligned. */ -+ if (temp & 0x03) { -+ temp += 0x03; -+ temp &= ~0x03; -+ } -+ hwp->writeSeq(hwp, 0x1C, (temp >> 1) & 0xFF); -+ ViaSeqMask(hwp, 0x1D, temp >> 9, 0x03); -+ -+ /* FIXME: check if this is really necessary here */ -+ switch (pVia->ChipId) { -+ case VIA_K8M890: -+ case VIA_CX700: -+ case VIA_P4M900: -+ break; -+ default: -+ /* some leftovers */ -+ ViaCrtcMask(hwp, 0x32, 0, 0xFF); -+ ViaCrtcMask(hwp, 0x33, 0, 0xC8); -+ break; -+ } -+} -+ -+void -+ViaFirstCRTCSetStartingAddress(ScrnInfoPtr pScrn, int x, int y) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ CARD32 Base; -+ CARD32 tmp; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "ViaFirstCRTCSetStartingAddress\n")); -+ -+ Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8); -+ Base = Base >> 1; -+ hwp->writeCrtc(hwp, 0x0C, (Base & 0xFF00) >> 8); -+ hwp->writeCrtc(hwp, 0x0D, Base & 0xFF); -+ hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16); -+ -+ if (!(pVia->Chipset == VIA_CLE266 && CLE266_REV_IS_AX(pVia->ChipRev))) -+ ViaCrtcMask(hwp, 0x48, Base >> 24, 0x0F); -+} -+ -+void -+ViaSecondCRTCSetStartingAddress(ScrnInfoPtr pScrn, int x, int y) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ CARD32 Base; -+ CARD32 tmp; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "ViaSecondCRTCSetStartingAddress\n")); -+ -+ Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8); -+ Base = (Base + pScrn->fbOffset) >> 3; -+ -+ tmp = hwp->readCrtc(hwp, 0x62) & 0x01; -+ tmp |= (Base & 0x7F) << 1; -+ hwp->writeCrtc(hwp, 0x62, tmp); -+ -+ hwp->writeCrtc(hwp, 0x63, (Base & 0x7F80) >> 7); -+ hwp->writeCrtc(hwp, 0x64, (Base & 0x7F8000) >> 15); -+ hwp->writeCrtc(hwp, 0xA3, (Base & 0x03800000) >> 23); -+} -+ -+void -+ViaSecondCRTCHorizontalQWCount(ScrnInfoPtr pScrn, int width) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ CARD16 temp; -+ -+ /* fetch count */ -+ temp = (width * (pScrn->bitsPerPixel >> 3)) >> 3; -+ /* Make sure that this is 32-byte aligned. */ -+ if (temp & 0x03) { -+ temp += 0x03; -+ temp &= ~0x03; -+ } -+ hwp->writeCrtc(hwp, 0x65, (temp >> 1) & 0xFF); -+ ViaCrtcMask(hwp, 0x67, temp >> 7, 0x0C); -+} -+ -+void -+ViaSecondCRTCHorizontalOffset(ScrnInfoPtr pScrn) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ CARD16 temp; -+ -+ /* offset */ -+ temp = (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3)) >> 3; -+ /* Make sure that this is 32-byte aligned. */ -+ if (temp & 0x03) { -+ temp += 0x03; -+ temp &= ~0x03; -+ } -+ hwp->writeCrtc(hwp, 0x66, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x67, temp >> 8, 0x03); -+} -+ -+void -+ViaSecondCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ CARD16 temp; -+ -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "mode: %p\n", mode); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "mode->name: %p\n", mode->name); -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "mode->name: %s\n", mode->name); -+ -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaSecondCRTCSetMode\n")); -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting up %s\n", mode->name)); -+ /* bpp */ -+ switch (pScrn->bitsPerPixel) { -+ case 8: -+ ViaCrtcMask(hwp, 0x67, 0x00, 0xC0); -+ break; -+ case 16: -+ ViaCrtcMask(hwp, 0x67, 0x40, 0xC0); -+ break; -+ case 24: -+ case 32: -+ ViaCrtcMask(hwp, 0x67, 0xC0, 0xC0); -+ break; -+ default: -+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unhandled bitdepth: %d\n", -+ pScrn->bitsPerPixel); -+ break; -+ } -+ -+ /* Crtc registers */ -+ /* horizontal total : 4096 */ -+ temp = mode->CrtcHTotal - 1; -+ hwp->writeCrtc(hwp, 0x50, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x55, temp >> 8, 0x0F); -+ -+ /* horizontal address : 2048 */ -+ temp = mode->CrtcHDisplay - 1; -+ hwp->writeCrtc(hwp, 0x51, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x55, temp >> 4, 0x70); -+ -+ /* horizontal blanking start : 2048 */ -+ /* temp = mode->CrtcHDisplay - 1; */ -+ temp = mode->CrtcHBlankStart - 1; -+ hwp->writeCrtc(hwp, 0x52, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x54, temp >> 8, 0x07); -+ -+ /* horizontal blanking end : 4096 */ -+ /* temp = mode->CrtcHTotal - 1; */ -+ temp = mode->CrtcHBlankEnd - 1; -+ hwp->writeCrtc(hwp, 0x53, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x54, temp >> 5, 0x38); -+ ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x40); -+ -+ /* horizontal sync start : 2047 */ -+ temp = mode->CrtcHSyncStart; -+ hwp->writeCrtc(hwp, 0x56, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x54, temp >> 2, 0xC0); -+ ViaCrtcMask(hwp, 0x5C, temp >> 3, 0x80); -+ -+ if (pVia->ChipId != VIA_CLE266 && pVia->ChipId != VIA_KM400) -+ ViaCrtcMask(hwp, 0x5D, temp >> 4, 0x80); -+ -+ /* horizontal sync end : sync start + 512 */ -+ temp = mode->CrtcHSyncEnd; -+ hwp->writeCrtc(hwp, 0x57, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x5C, temp >> 2, 0x40); -+ -+ /* vertical total : 2048 */ -+ temp = mode->CrtcVTotal - 1; -+ hwp->writeCrtc(hwp, 0x58, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x5D, temp >> 8, 0x07); -+ -+ /* vertical address : 2048 */ -+ temp = mode->CrtcVDisplay - 1; -+ hwp->writeCrtc(hwp, 0x59, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x38); -+ -+ /* vertical blanking start : 2048 */ -+ /* temp = mode->CrtcVDisplay - 1; */ -+ temp = mode->CrtcVBlankStart - 1; -+ hwp->writeCrtc(hwp, 0x5A, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x5C, temp >> 8, 0x07); -+ -+ /* vertical blanking end : 2048 */ -+ /* temp = mode->CrtcVTotal - 1; */ -+ temp = mode->CrtcVBlankEnd - 1; -+ hwp->writeCrtc(hwp, 0x5B, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x5C, temp >> 5, 0x38); -+ -+ /* vertical sync start : 2047 */ -+ temp = mode->CrtcVSyncStart; -+ hwp->writeCrtc(hwp, 0x5E, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x5F, temp >> 3, 0xE0); -+ -+ /* vertical sync end : start + 32 */ -+ temp = mode->CrtcVSyncEnd; -+ ViaCrtcMask(hwp, 0x5F, temp, 0x1F); -+ -+ ViaSecondCRTCHorizontalOffset(pScrn); -+ ViaSecondCRTCHorizontalQWCount(pScrn, mode->CrtcHDisplay); -+ -+} -+ -+/* -+ * Checks for limitations imposed by the available VGA timing registers. -+ */ -+ModeStatus -+ViaFirstCRTCModeValid(ScrnInfoPtr pScrn, DisplayModePtr mode) -+{ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaFirstCRTCModeValid\n")); -+ -+ if (mode->CrtcHTotal > 4100) -+ return MODE_BAD_HVALUE; -+ -+ if (mode->CrtcHDisplay > 2048) -+ return MODE_BAD_HVALUE; -+ -+ if (mode->CrtcHBlankStart > 2048) -+ return MODE_BAD_HVALUE; -+ -+ if ((mode->CrtcHBlankEnd - mode->CrtcHBlankStart) > 1025) -+ return MODE_HBLANK_WIDE; -+ -+ if (mode->CrtcHSyncStart > 4095) -+ return MODE_BAD_HVALUE; -+ -+ if ((mode->CrtcHSyncEnd - mode->CrtcHSyncStart) > 256) -+ return MODE_HSYNC_WIDE; -+ -+ if (mode->CrtcVTotal > 2049) -+ return MODE_BAD_VVALUE; -+ -+ if (mode->CrtcVDisplay > 2048) -+ return MODE_BAD_VVALUE; -+ -+ if (mode->CrtcVSyncStart > 2047) -+ return MODE_BAD_VVALUE; -+ -+ if ((mode->CrtcVSyncEnd - mode->CrtcVSyncStart) > 16) -+ return MODE_VSYNC_WIDE; -+ -+ if (mode->CrtcVBlankStart > 2048) -+ return MODE_BAD_VVALUE; -+ -+ if ((mode->CrtcVBlankEnd - mode->CrtcVBlankStart) > 257) -+ return MODE_VBLANK_WIDE; -+ -+ return MODE_OK; -+} -+ -+ModeStatus -+ViaSecondCRTCModeValid(ScrnInfoPtr pScrn, DisplayModePtr mode) -+{ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaSecondCRTCModeValid\n")); -+ -+ if (mode->CrtcHTotal > 4096) -+ return MODE_BAD_HVALUE; -+ -+ if (mode->CrtcHDisplay > 2048) -+ return MODE_BAD_HVALUE; -+ -+ if (mode->CrtcHBlankStart > 2048) -+ return MODE_BAD_HVALUE; -+ -+ if (mode->CrtcHBlankEnd > 4096) -+ return MODE_HBLANK_WIDE; -+ -+ if (mode->CrtcHSyncStart > 2047) -+ return MODE_BAD_HVALUE; -+ -+ if ((mode->CrtcHSyncEnd - mode->CrtcHSyncStart) > 512) -+ return MODE_HSYNC_WIDE; -+ -+ if (mode->CrtcVTotal > 2048) -+ return MODE_BAD_VVALUE; -+ -+ if (mode->CrtcVDisplay > 2048) -+ return MODE_BAD_VVALUE; -+ -+ if (mode->CrtcVBlankStart > 2048) -+ return MODE_BAD_VVALUE; -+ -+ if (mode->CrtcVBlankEnd > 2048) -+ return MODE_VBLANK_WIDE; -+ -+ if (mode->CrtcVSyncStart > 2047) -+ return MODE_BAD_VVALUE; -+ -+ if ((mode->CrtcVSyncEnd - mode->CrtcVSyncStart) > 32) -+ return MODE_VSYNC_WIDE; -+ -+ return MODE_OK; -+} -+ -+/* -+ * Not tested yet -+ */ -+void -+ViaShadowCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode) -+{ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaShadowCRTCSetMode\n")); -+ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ CARD16 temp; -+ -+ temp = (mode->CrtcHTotal >> 3) - 5; -+ hwp->writeCrtc(hwp, 0x6D, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x71, temp >> 5, 0x08); -+ -+ temp = (mode->CrtcHBlankEnd >> 3) - 1; -+ hwp->writeCrtc(hwp, 0x6E, temp & 0xFF); -+ -+ temp = mode->CrtcVTotal - 2; -+ hwp->writeCrtc(hwp, 0x6F, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x71, temp >> 8, 0x07); -+ -+ temp = mode->CrtcVDisplay - 1; -+ hwp->writeCrtc(hwp, 0x70, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x71, temp >> 4, 0x70); -+ -+ temp = mode->CrtcVBlankStart - 1; -+ hwp->writeCrtc(hwp, 0x72, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x74, temp >> 4, 0x70); -+ -+ temp = mode->CrtcVTotal - 1; -+ hwp->writeCrtc(hwp, 0x73, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x74, temp >> 8, 0x07); -+ -+ ViaCrtcMask(hwp, 0x76, mode->CrtcVSyncEnd, 0x0F); -+ -+ temp = mode->CrtcVSyncStart; -+ hwp->writeCrtc(hwp, 0x75, temp & 0xFF); -+ ViaCrtcMask(hwp, 0x76, temp >> 4, 0x70); -+} -Index: src/via_swov.c -=================================================================== ---- src/via_swov.c (revision 588) -+++ src/via_swov.c (working copy) -@@ -95,7 +95,8 @@ - pdwState = (CARD32 volatile *)(pVia->VidMapBase + (HQV_CONTROL + proReg)); - - if (pVia->VideoEngine == VIDEO_ENGINE_CME) { -- while (*pdwState & (HQV_SUBPIC_FLIP | HQV_SW_FLIP)) ; -+ // while (*pdwState & (HQV_SUBPIC_FLIP | HQV_SW_FLIP)) ; -+ while (*pdwState & HQV_SUBPIC_FLIP); - } else { - while (!(*pdwState & HQV_FLIP_STATUS)) ; - } -@@ -1674,6 +1675,7 @@ - unsigned long chromaKeyLow, unsigned long chromaKeyHigh) - { - VIAPtr pVia = VIAPTR(pScrn); -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; - vgaHWPtr hwp = VGAHWPTR(pScrn); - VIAHWDiff *hwDiff = &pVia->HWDiff; - -@@ -1707,8 +1709,15 @@ - pUpdate->DstLeft, pUpdate->DstRight, - pUpdate->DstTop, pUpdate->DstBottom)); - -- pVia->swov.overlayRecordV1.dwWidth = dstWidth = -- pUpdate->DstRight - pUpdate->DstLeft; -+ dstWidth = pUpdate->DstRight - pUpdate->DstLeft; -+ if (pBIOSInfo->Panel->IsActive && pBIOSInfo->Panel->Scale) { -+ /* FIXME: We need to determine if the panel is using V1 or V3 */ -+ float hfactor = (float)pBIOSInfo->Panel->NativeMode->Width -+ / pScrn->currentMode->HDisplay; -+ dstWidth *= hfactor; -+ } -+ -+ pVia->swov.overlayRecordV1.dwWidth = dstWidth; - pVia->swov.overlayRecordV1.dwHeight = dstHeight = - pUpdate->DstBottom - pUpdate->DstTop; - srcWidth = (unsigned long)pUpdate->SrcRight - pUpdate->SrcLeft; -@@ -1729,7 +1738,8 @@ - */ - if ((pVia->VideoEngine == VIDEO_ENGINE_CME - || pVia->Chipset == VIA_VM800) -- && pVia->pBIOSInfo->PanelActive) { -+ && pVia->pBIOSInfo->Panel->IsActive) { -+ - /* V1_ON_SND_DISPLAY */ - vidCtl |= 0x80000000; - /* SECOND_DISPLAY_COLOR_KEY_ENABLE */ -Index: src/via_driver.h -=================================================================== ---- src/via_driver.h (revision 590) -+++ src/via_driver.h (working copy) -@@ -65,6 +65,7 @@ - #include "via_swov.h" - #include "via_dmabuffer.h" - #include "via_3d.h" -+#include "via_video.h" - - #ifdef XSERVER_LIBPCIACCESS - #include -@@ -104,7 +105,6 @@ - #endif - #define VIA_VERSION ((VERSION_MAJOR<<24) | (VERSION_MINOR<<16) | PATCHLEVEL) - --#define VIA_CURSOR_SIZE (4 * 1024) - #define VIA_VQ_SIZE (256 * 1024) - - typedef struct { -@@ -195,9 +195,35 @@ - int major, minor; - } ViaVbeModeInfo; - -+typedef struct ViaCursorInfo { -+ xf86CursorInfoPtr info; -+ Bool isHWCursorEnabled; -+ /* Is hardware icon supported by this hardware? */ -+ Bool isARGBSupported; -+ /* disable/enable argb */ -+ Bool isARGBEnabled ; -+ /* Are we currently using ARGB cursor? see via_cursor.c */ -+ Bool useARGB; -+ /* */ -+ int fbCursorStart; -+ /* max width in pixels (64 or 32)*/ -+ int maxWidth; -+ /* max height in pixels (64 or 32)*/ -+ int maxHeight; -+ -+ /* size in bytes */ -+ int size; -+ -+ unsigned char *image; -+ -+ CARD32 foreground; -+ CARD32 background; -+ CARD32 mode; -+ -+} ViaCursorInfoRec, *ViaCursorInfoPtr ; -+ - typedef struct _VIA { - VIARegRec SavedReg; -- xf86CursorInfoPtr CursorInfoRec; - int Bpp, Bpl; - - Bool FirstInit; -@@ -207,7 +233,6 @@ - int FBFreeEnd; - int driSize; - int maxDriSize; -- int CursorStart; - int VQStart; - int VQEnd; - -@@ -226,7 +251,6 @@ - - /* Here are all the Options */ - Bool VQEnable; -- Bool hwcursor; - Bool NoAccel; - Bool shadowFB; - int rotate; -@@ -350,11 +374,8 @@ - Bool dmaXV; - - CARD8 ActiveDevice; /* Option */ -- unsigned char *CursorImage; -- CARD32 CursorFG; -- CARD32 CursorBG; -- CARD32 CursorMC; -- -+ ViaCursorInfoPtr cursor; -+ - /* Video */ - int VideoEngine; - swovRec swov; -@@ -377,6 +398,9 @@ - Bool PrintVGARegs; - Bool PrintTVRegs; - Bool I2CScan; -+ -+ Bool UseLegacyModeSwitch ; -+ video_via_regs* VideoRegs ; - #endif /* HAVE_DEBUG */ - } VIARec, *VIAPtr; - -@@ -403,11 +427,14 @@ - #endif - - /* In via_cursor.c. */ --Bool VIAHWCursorInit(ScreenPtr pScreen); --void VIAShowCursor(ScrnInfoPtr); --void VIAHideCursor(ScrnInfoPtr); --void ViaCursorStore(ScrnInfoPtr pScrn); --void ViaCursorRestore(ScrnInfoPtr pScrn); -+Bool viaCursorHWInit(ScreenPtr pScreen); -+void viaCursorShow(ScrnInfoPtr); -+void viaCursorHide(ScrnInfoPtr); -+void viaCursorStore(ScrnInfoPtr pScrn); -+void viaCursorRestore(ScrnInfoPtr pScrn); -+Bool viaCursorRecInit(ScrnInfoPtr pScrn); -+void viaCursorRecDestroy(ScrnInfoPtr pScrn); -+void viaCursorSetFB(ScrnInfoPtr pScrn); - - /* In via_accel.c. */ - Bool viaInitAccel(ScreenPtr); -Index: src/via_bios.h -=================================================================== ---- src/via_bios.h (revision 588) -+++ src/via_bios.h (working copy) -@@ -34,6 +34,14 @@ - #define VIA_PANEL14X10 5 - #define VIA_PANEL16X12 6 - #define VIA_PANEL12X8 7 -+#define VIA_PANEL8X4 8 -+#define VIA_PANEL1366X7 9 -+#define VIA_PANEL1360X7 10 -+#define VIA_PANEL1920x1080 11 -+#define VIA_PANEL1920x1200 12 -+#define VIA_PANEL10X6 13 -+#define VIA_PANEL14X9 14 -+#define VIA_PANEL1280X720 15 - #define VIA_PANEL_INVALID 255 - - #define TVTYPE_NONE 0x00 -@@ -90,6 +98,46 @@ - #define VIA_DI_12BIT 0x00 - #define VIA_DI_24BIT 0x01 - -+typedef struct ViaPanelMode { -+ int Width ; -+ int Height ; -+} ViaPanelModeRec, *ViaPanelModePtr ; -+ -+typedef struct ViaPanelInfo { -+ Bool IsActive ; -+ /* current native resolution */ -+ ViaPanelModePtr NativeMode ; -+ /* Native resolution index, see via_panel.c */ -+ CARD8 NativeModeIndex; -+ /* Generated mode for native resolution */ -+ DisplayModePtr NativeDisplayMode ; -+#if 0 -+ /* Panel size from configuration */ -+ char* PanelSizeFromOption; -+#endif -+ /* Current mode but centered */ -+ DisplayModePtr CenteredMode ; -+ /* Determine if we must use the hardware scaler -+ * It might be false even if the "Center" option -+ * was specified -+ */ -+ Bool Scale; -+} ViaPanelInfoRec, *ViaPanelInfoPtr ; -+ -+typedef struct ViaLVDSInfo { -+ Bool IsActive ; -+} ViaLVDSInfoRec, *ViaLVDSInfoPtr ; -+ -+typedef struct ViaCRTCInfo { -+ Bool IsActive ; -+ /* TODO: add CRTC constraints here */ -+} ViaCRTCInfoRec, *ViaCRTCInfoPtr ; -+ -+typedef struct ViaSimultaneousInfo { -+ Bool IsActive ; -+} ViaSimultaneousInfoRec, *ViaSimultaneousInfoPtr ; -+ -+ - typedef struct _VIABIOSINFO { - int scrnIndex; - -@@ -102,20 +150,29 @@ - CARD32 Bandwidth; /* available memory bandwidth */ - - /* Panel/LCD entries */ -+ ViaPanelInfoPtr Panel ; - Bool PanelPresent; -- Bool PanelActive; - Bool ForcePanel; - int PanelIndex; -- int PanelSize; - Bool Center; -- CARD8 BusWidth; /* Digital Output Bus Width */ -+ CARD8 BusWidth; /* Digital Output Bus Width */ - Bool SetDVI; - /* LCD Simultaneous Expand Mode HWCursor Y Scale */ - Bool scaleY; - int panelX; - int panelY; - int resY; -+ -+ /* Integrated LVDS */ -+ ViaLVDSInfoPtr Lvds; -+ -+ /* CRTCs */ -+ ViaCRTCInfoPtr FirstCRTC ; -+ ViaCRTCInfoPtr SecondCRTC ; - -+ /* Simultaneous */ -+ ViaSimultaneousInfoPtr Simultaneous ; -+ - /* TV entries */ - int TVEncoder; - int TVOutput; -@@ -156,10 +213,8 @@ - void ViaModesAttach(ScrnInfoPtr pScrn, MonPtr monitorp); - CARD32 ViaGetMemoryBandwidth(ScrnInfoPtr pScrn); - ModeStatus ViaValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags); --void ViaModePrimary(ScrnInfoPtr pScrn, DisplayModePtr mode); --void ViaModeSecondary(ScrnInfoPtr pScrn, DisplayModePtr mode); --void ViaModeSecondaryVGAOffset(ScrnInfoPtr pScrn); --void ViaModeSecondaryVGAFetchCount(ScrnInfoPtr pScrn, int width); -+void ViaModePrimaryLegacy(ScrnInfoPtr pScrn, DisplayModePtr mode); -+void ViaModeSecondaryLegacy(ScrnInfoPtr pScrn, DisplayModePtr mode); - void ViaLCDPower(ScrnInfoPtr pScrn, Bool On); - void ViaTVPower(ScrnInfoPtr pScrn, Bool On); - void ViaTVSave(ScrnInfoPtr pScrn); -@@ -167,7 +222,35 @@ - #ifdef HAVE_DEBUG - void ViaTVPrintRegs(ScrnInfoPtr pScrn); - #endif -+void ViaModeSecondCRTC(ScrnInfoPtr pScrn, DisplayModePtr mode); -+void ViaModeFirstCRTC(ScrnInfoPtr pScrn, DisplayModePtr mode); -+void ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode); - -+/* via_crtc.c */ -+void ViaCRTCInit(ScrnInfoPtr pScrn); -+void ViaFirstCRTCSetStartingAddress(ScrnInfoPtr pSCrn, int x, int y); -+void ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode); -+void ViaSecondCRTCSetStartingAddress(ScrnInfoPtr pScrn, int x, int y); -+void ViaSecondCRTCHorizontalOffset(ScrnInfoPtr pScrn); -+void ViaSecondCRTCHorizontalQWCount(ScrnInfoPtr pScrn, int width); -+void ViaSecondCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode); -+ModeStatus ViaFirstCRTCModeValid(ScrnInfoPtr pScrn, DisplayModePtr mode); -+ModeStatus ViaSecondCRTCModeValid(ScrnInfoPtr pScrn, DisplayModePtr mode); -+void ViaShadowCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode); -+ -+/* via_panel.c */ -+void ViaPanelScale(ScrnInfoPtr pScrn, int resWidth, int resHeight, int panelWidth, int panelHeight ); -+void ViaPanelScaleDisable(ScrnInfoPtr pScrn); -+void ViaPanelGetNativeModeFromScratchPad(ScrnInfoPtr pScrn); -+void ViaPanelGetNativeModeFromOption(ScrnInfoPtr pScrn, char* name); -+void ViaPanelPreInit(ScrnInfoPtr pScrn); -+void ViaPanelCenterMode(DisplayModePtr centerMode, DisplayModePtr panelMode, DisplayModePtr mode); -+Bool ViaPanelGetSizeFromDDCv1(ScrnInfoPtr pScrn, int* width, int* height); -+Bool ViaPanelGetSizeFromDDCv2(ScrnInfoPtr pScrn, int* width); -+Bool ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon, int* width, int* height); -+/* via_lvds.c */ -+void ViaLVDSPower(ScrnInfoPtr pScrn, Bool on); -+ - /* in via_bandwidth.c */ - void ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode); - void ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode); -@@ -181,4 +264,13 @@ - I2CDevPtr ViaCH7xxxDetect(ScrnInfoPtr pScrn, I2CBusPtr pBus, CARD8 Address); - void ViaCH7xxxInit(ScrnInfoPtr pScrn); - -+/* via_display.c */ -+void ViaSecondDisplayChannelEnable(ScrnInfoPtr pScrn); -+void ViaSecondDisplayChannelDisable(ScrnInfoPtr pScrn); -+void ViaDisplayInit(ScrnInfoPtr pScrn); -+void ViaDisplayEnableSimultaneous(ScrnInfoPtr pScrn); -+void ViaDisplayDisableSimultaneous(ScrnInfoPtr pScrn); -+void ViaDisplayEnableCRT(ScrnInfoPtr pScrn); -+void ViaDisplayDisableCRT(ScrnInfoPtr pScrn); -+ - #endif /* _VIA_BIOS_H_ */ -Index: src/via_display.c -=================================================================== ---- src/via_display.c (revision 0) -+++ src/via_display.c (revision 0) -@@ -0,0 +1,128 @@ -+#ifdef HAVE_CONFIG_H -+#include "config.h" -+#endif -+ -+#include "via.h" -+#include "via_driver.h" -+#include "via_vgahw.h" -+#include "via_id.h" -+ -+/* -+ * Enables the second display channel. -+ */ -+void -+ViaSecondDisplayChannelEnable(ScrnInfoPtr pScrn) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "ViaSecondDisplayChannelEnable\n")); -+ ViaCrtcMask(hwp, 0x6A, 0x00, 1 << 6); -+ ViaCrtcMask(hwp, 0x6A, 1 << 7, 1 << 7); -+ ViaCrtcMask(hwp, 0x6A, 1 << 6, 1 << 6); -+} -+ -+/* -+ * Disables the second display channel. -+ */ -+void -+ViaSecondDisplayChannelDisable(ScrnInfoPtr pScrn) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "ViaSecondDisplayChannelDisable\n")); -+ -+ ViaCrtcMask(hwp, 0x6A, 0x00, 1 << 6); -+ ViaCrtcMask(hwp, 0x6A, 0x00, 1 << 7); -+ ViaCrtcMask(hwp, 0x6A, 1 << 6, 1 << 6); -+} -+ -+/* -+ * Initial settings for displays. -+ */ -+void -+ViaDisplayInit(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplayPreInit\n")); -+ -+ ViaSecondDisplayChannelDisable(pScrn); -+ ViaCrtcMask(hwp, 0x6A, 0x00, 0x3D); -+ -+ hwp->writeCrtc(hwp, 0x6B, 0x00); -+ hwp->writeCrtc(hwp, 0x6C, 0x00); -+ hwp->writeCrtc(hwp, 0x79, 0x00); -+ -+ /* (IGA1 Timing Plus 2, added in VT3259 A3 or later) */ -+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) -+ ViaCrtcMask(hwp, 0x47, 0x00, 0xC8); -+} -+ -+/* -+ * Enables simultaneous mode. -+ */ -+void -+ViaDisplayEnableSimultaneous(ScrnInfoPtr pScrn) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "ViaDisplayEnableSimultaneous\n")); -+ ViaCrtcMask(hwp, 0x6B, 0x08, 0x08); -+} -+ -+/* -+ * Disables simultaneous mode. -+ */ -+void -+ViaDisplayDisableSimultaneous(ScrnInfoPtr pScrn) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "ViaDisplayDisableSimultaneous\n")); -+ ViaCrtcMask(hwp, 0x6B, 0x00, 0x08); -+} -+ -+/* -+ * Enables CRT using DPMS registers. -+ */ -+void -+ViaDisplayEnableCRT(ScrnInfoPtr pScrn) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplayEnableCRT\n")); -+ ViaCrtcMask(hwp, 0x36, 0x00, 0x30); -+} -+ -+/* -+ * Disables CRT using DPMS registers. -+ */ -+void -+ViaDisplayDisableCRT(ScrnInfoPtr pScrn) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplayDisableCRT\n")); -+ ViaCrtcMask(hwp, 0x36, 0x30, 0x30); -+} -+ -+/* -+ * Sets the primary or secondary display stream on CRT. -+ */ -+void -+ViaDisplaySetStreamOnCRT(ScrnInfoPtr pScrn, Bool primary) -+{ -+ vgaHWPtr hwp = VGAHWPTR(pScrn); -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplaySetStreamOnCRT\n")); -+ -+ if (primary) -+ ViaSeqMask(hwp, 0x16, 0x00, 0x40); -+ else -+ ViaSeqMask(hwp, 0x16, 0x40, 0x40); -+} -Index: src/via_regs.h -=================================================================== ---- src/via_regs.h (revision 588) -+++ src/via_regs.h (working copy) -@@ -42,7 +42,7 @@ - #define VIA_MMIO_REGBASE 0x0 - #define VIA_MMIO_VGABASE 0x8000 - #define VIA_MMIO_BLTBASE 0x200000 --#define VIA_MMIO_BLTSIZE 0x20000 -+#define VIA_MMIO_BLTSIZE 0x200000 - - - /* defines for VIA 2D registers */ -@@ -85,7 +85,26 @@ - #define VIA_REG_CURSOR_BG 0x2DC - #define VIA_REG_CURSOR_FG 0x2E0 - -+/*CN400 and older Hardware Icon engine register*/ -+#define VIA_REG_HI_POSSTART 0x208 -+#define VIA_REG_HI_CENTEROFFSET 0x20C -+#define VIA_REG_HI_FBOFFSET 0x224 -+#define VIA_REG_HI_CONTROL 0x260 -+#define VIA_REG_HI_TRANSPARENT_COLOR 0x270 -+#define VIA_REG_HI_INVTCOLOR 0x274 -+/* VT3324 primary Hardware Icon engine register */ -+#define VIA_REG_PRIM_HI_POSEND 0x290 -+#define VIA_REG_V327_HI_INVTCOLOR 0x2E4 -+#define VIA_REG_PRIM_HI_FIFO 0x2E8 -+#define VIA_REG_PRIM_HI_TRANSCOLOR 0x2EC -+#define VIA_REG_PRIM_HI_CTRL 0x2F0 -+#define VIA_REG_PRIM_HI_FBOFFSET 0x2F4 -+#define VIA_REG_PRIM_HI_POSSTART 0x2F8 -+#define VIA_REG_PRIM_HI_CENTEROFFSET 0x2FC -+#define VIA_REG_PRIM_HI_INVTCOLOR 0x120C - -+ -+ - /* defines for VIA 3D registers */ - #define VIA_REG_STATUS 0x400 - #define VIA_REG_TRANSET 0x43C -Index: src/via_accel.c -=================================================================== ---- src/via_accel.c (revision 588) -+++ src/via_accel.c (working copy) -@@ -2273,16 +2273,14 @@ - - pVia->VQStart = 0; - if (((pVia->FBFreeEnd - pVia->FBFreeStart) >= VIA_VQ_SIZE) -- && pVia->VQEnable) { -- pVia->VQStart = pVia->FBFreeEnd - VIA_VQ_SIZE; -- pVia->VQEnd = pVia->VQStart + VIA_VQ_SIZE - 1; -- pVia->FBFreeEnd -= VIA_VQ_SIZE; -+ && pVia->VQEnable) { -+ pVia->VQStart = pVia->FBFreeEnd - VIA_VQ_SIZE; -+ pVia->VQEnd = pVia->VQStart + VIA_VQ_SIZE - 1; -+ pVia->FBFreeEnd -= VIA_VQ_SIZE; - } - -- if (pVia->hwcursor) { -- pVia->FBFreeEnd -= VIA_CURSOR_SIZE; -- pVia->CursorStart = pVia->FBFreeEnd; -- } -+ if (pVia->cursor->isHWCursorEnabled) -+ viaCursorSetFB(pScrn); - - viaInitialize2DEngine(pScrn); - -Index: src/via_vbe.c -=================================================================== ---- src/via_vbe.c (revision 588) -+++ src/via_vbe.c (working copy) -@@ -95,7 +95,7 @@ - /* Set Active Device and translate BIOS byte definition. */ - if (pBIOSInfo->CrtActive) - activeDevices = 0x01; -- if (pBIOSInfo->PanelActive) -+ if (pBIOSInfo->Panel->IsActive) - activeDevices |= 0x02; - if (pBIOSInfo->TVActive) - activeDevices |= 0x04; -@@ -244,7 +244,7 @@ - } - } else { - -- if (pBIOSInfo->PanelActive && !pVia->useLegacyVBE) { -+ if (pBIOSInfo->Panel->IsActive && !pVia->useLegacyVBE) { - /* - * FIXME: Should we always set the panel expansion? - * Does it depend on the resolution? -@@ -437,7 +437,7 @@ - VIAPtr pVia = VIAPTR(pScrn); - VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; - -- if (pBIOSInfo->PanelActive) -+ if (pBIOSInfo->Panel->IsActive) - ViaVbePanelPower(pVia->pVbe, (mode == DPMSModeOn)); - - VBEDPMSSet(pVia->pVbe, mode); -Index: src/via_cursor.c -=================================================================== ---- src/via_cursor.c (revision 588) -+++ src/via_cursor.c (working copy) -@@ -1,5 +1,6 @@ - /* -- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. -+ * Copyright 2007 The Openchrome Project [openchrome.org] -+ * Copyright 1998-2007 VIA Technologies, Inc. All Rights Reserved. - * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a -@@ -35,109 +36,268 @@ - - #include "via.h" - #include "via_driver.h" -+#include "via_regs.h" -+#include "via_id.h" - --static void VIALoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src); --static void VIASetCursorPosition(ScrnInfoPtr pScrn, int x, int y); --static void VIASetCursorColors(ScrnInfoPtr pScrn, int bg, int fg); -+#ifdef ARGB_CURSOR -+#include "cursorstr.h" -+#endif - --#define MAX_CURS 32 -+static void viaCursorLoadImage(ScrnInfoPtr pScrn, unsigned char *src); -+static void viaCursorSetPosition(ScrnInfoPtr pScrn, int x, int y); -+static void viaCursorSetColors(ScrnInfoPtr pScrn, int bg, int fg); -+static Bool viaCursorHWUse(ScreenPtr screen, CursorPtr cursor); -+static void viaCursorHWHide(ScrnInfoPtr pScrn); - -+#ifdef ARGB_CURSOR -+static void viaCursorARGBShow(ScrnInfoPtr pScrn); -+static void viaCursorARGBHide(ScrnInfoPtr pScrn); -+static void viaCursorARGBSetPosition(ScrnInfoPtr pScrn, int x, int y); -+static Bool viaCursorARGBUse(ScreenPtr pScreen, CursorPtr pCurs); -+static void viaCursorARGBLoad(ScrnInfoPtr pScrn, CursorPtr pCurs); -+#endif -+ -+#ifdef ARGB_CURSOR -+static void -+viaCursorARGBInit(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; -+ -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "viaCursorARGBInit\n")); -+ -+ unsigned long fbOffset = pScrn->fbOffset + pVia->cursor->fbCursorStart; -+ -+ switch (pVia->Chipset) { -+ case VIA_CX700: -+ /* case VIA_CN750: */ -+ case VIA_P4M890: -+ case VIA_P4M900: -+ if (pBIOSInfo->FirstCRTC->IsActive) { -+ VIASETREG(VIA_REG_PRIM_HI_FBOFFSET, fbOffset); -+ /* Set 0 as transparent color key. */ -+ VIASETREG(VIA_REG_PRIM_HI_TRANSCOLOR, 0); -+ VIASETREG(VIA_REG_PRIM_HI_FIFO, 0x0D000D0F); -+ VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, 0X00FFFFFF); -+ VIASETREG(VIA_REG_V327_HI_INVTCOLOR, 0X00FFFFFF); -+ } -+ if (pBIOSInfo->SecondCRTC->IsActive) { -+ VIASETREG(VIA_REG_HI_FBOFFSET, fbOffset); -+ /* Set 0 as transparent color key. */ -+ VIASETREG(VIA_REG_HI_TRANSPARENT_COLOR, 0); -+ VIASETREG(VIA_REG_HI_INVTCOLOR, 0X00FFFFFF); -+ VIASETREG(ALPHA_V3_PREFIFO_CONTROL, 0xE0000); -+ VIASETREG(ALPHA_V3_FIFO_CONTROL, 0xE0F0000); -+ } -+ break; -+ default: -+ VIASETREG(VIA_REG_HI_FBOFFSET, fbOffset); -+ VIASETREG(VIA_REG_HI_TRANSPARENT_COLOR, 0); -+ VIASETREG(VIA_REG_HI_INVTCOLOR, 0X00FFFFFF); -+ VIASETREG(ALPHA_V3_PREFIFO_CONTROL, 0xE0000); -+ VIASETREG(ALPHA_V3_FIFO_CONTROL, 0xE0F0000); -+ break; -+ } -+} -+#endif -+ -+void -+viaCursorSetFB(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ -+ if (!pVia->cursor->fbCursorStart -+ && ((pVia->FBFreeEnd - pVia->FBFreeStart) > pVia->cursor->size)) { -+ pVia->cursor->fbCursorStart = pVia->FBFreeEnd - pVia->cursor->size; -+ pVia->FBFreeEnd -= pVia->cursor->size; -+ } -+} -+ - Bool --VIAHWCursorInit(ScreenPtr pScreen) -+viaCursorHWInit(ScreenPtr pScreen) - { - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - VIAPtr pVia = VIAPTR(pScrn); - xf86CursorInfoPtr infoPtr; - -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAHWCursorInit\n")); -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIACursorHWInit\n")); -+ - infoPtr = xf86CreateCursorInfoRec(); - if (!infoPtr) - return FALSE; - -- pVia->CursorInfoRec = infoPtr; -+ pVia->cursor->info = infoPtr; - -- infoPtr->MaxWidth = MAX_CURS; -- infoPtr->MaxHeight = MAX_CURS; -- infoPtr->Flags = (HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_32 | -- HARDWARE_CURSOR_AND_SOURCE_WITH_MASK | -+ infoPtr->MaxWidth = pVia->cursor->maxWidth; -+ infoPtr->MaxHeight = pVia->cursor->maxHeight; -+ infoPtr->Flags = (HARDWARE_CURSOR_AND_SOURCE_WITH_MASK | - /*HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK | */ - HARDWARE_CURSOR_TRUECOLOR_AT_8BPP | - HARDWARE_CURSOR_INVERT_MASK | - HARDWARE_CURSOR_BIT_ORDER_MSBFIRST | - 0); - -- infoPtr->SetCursorColors = VIASetCursorColors; -- infoPtr->SetCursorPosition = VIASetCursorPosition; -- infoPtr->LoadCursorImage = VIALoadCursorImage; -- infoPtr->HideCursor = VIAHideCursor; -- infoPtr->ShowCursor = VIAShowCursor; -- infoPtr->UseHWCursor = NULL; -+ if (pVia->cursor->maxWidth == 64) -+ infoPtr->Flags |= HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64; -+ else if (pVia->cursor->maxWidth == 32) -+ infoPtr->Flags |= HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_32; -+ else { -+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -+ "VIACursorHWInit: unhandled width\n"); -+ return FALSE; -+ } -+/* -+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled) -+ infoPtr->Flags |= HARDWARE_CURSOR_ARGB; -+*/ -+ infoPtr->SetCursorColors = viaCursorSetColors; -+ infoPtr->SetCursorPosition = viaCursorSetPosition; -+ infoPtr->LoadCursorImage = viaCursorLoadImage; -+ infoPtr->HideCursor = viaCursorHide; -+ infoPtr->ShowCursor = viaCursorShow; -+ infoPtr->UseHWCursor = viaCursorHWUse; - -- if (!pVia->CursorStart) { -- pVia->CursorStart = pVia->FBFreeEnd - VIA_CURSOR_SIZE; -- pVia->FBFreeEnd -= VIA_CURSOR_SIZE; -+#ifdef ARGB_CURSOR -+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled) { -+ infoPtr->UseHWCursorARGB = viaCursorARGBUse; -+ infoPtr->LoadCursorARGB = viaCursorARGBLoad; - } -+#endif - -+ viaCursorSetFB(pScrn); -+ -+#ifdef ARGB_CURSOR -+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled) -+ viaCursorARGBInit(pScrn); -+#endif -+ - /* Set cursor location in frame buffer. */ -- VIASETREG(VIA_REG_CURSOR_MODE, pVia->CursorStart); -+ VIASETREG(VIA_REG_CURSOR_MODE, pVia->cursor->fbCursorStart); -+ viaCursorHWHide(pScrn); - - return xf86InitCursor(pScreen, infoPtr); - } - -- --void --VIAShowCursor(ScrnInfoPtr pScrn) -+static void -+viaCursorHWShow(ScrnInfoPtr pScrn) - { - VIAPtr pVia = VIAPTR(pScrn); -- CARD32 dwCursorMode; -+ CARD32 mode; - -- dwCursorMode = VIAGETREG(VIA_REG_CURSOR_MODE); -+ mode = VIAGETREG(VIA_REG_CURSOR_MODE); -+ mode &= ~0x80000003; - -+ /* Hardware cursor size */ -+ if (pVia->cursor->maxWidth == 32) -+ mode |= 0x00000002 ; -+ -+ /* Enable cursor */ -+ mode |= 0x00000001 ; -+ -+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) -+ mode |= 0x80000000 ; -+ - /* Turn on hardware cursor. */ -- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode | 0x3); -+ VIASETREG(VIA_REG_CURSOR_MODE, mode); -+ - } - -+static void -+viaCursorHWHide(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ CARD32 mode = VIAGETREG(VIA_REG_CURSOR_MODE); - -+ /* Turn hardware cursor off. */ -+ VIASETREG(VIA_REG_CURSOR_MODE, mode & 0xFFFFFFFE); -+} -+ -+ - void --VIAHideCursor(ScrnInfoPtr pScrn) -+viaCursorShow(ScrnInfoPtr pScrn) - { - VIAPtr pVia = VIAPTR(pScrn); -- CARD32 dwCursorMode; - -- dwCursorMode = VIAGETREG(VIA_REG_CURSOR_MODE); -+#ifdef ARGB_CURSOR -+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled) -+ viaCursorARGBShow(pScrn); -+ else -+#endif -+ viaCursorHWShow(pScrn); -+} - -- /* Turn cursor off. */ -- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode & 0xFFFFFFFE); -+void -+viaCursorHide(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ -+#ifdef ARGB_CURSOR -+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled) -+ viaCursorARGBHide(pScrn); -+ else -+#endif -+ viaCursorHWHide(pScrn); - } - -- - static void --VIALoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src) -+viaCursorLoadImage(ScrnInfoPtr pScrn, unsigned char *src) - { - VIAPtr pVia = VIAPTR(pScrn); -- CARD32 dwCursorMode; -+ int x, y, i; - - viaAccelSync(pScrn); -+ CARD32 *dst = (CARD32 *) (pVia->FBBase + pVia->cursor->fbCursorStart); - -- dwCursorMode = VIAGETREG(VIA_REG_CURSOR_MODE); -+ memset(dst, 0x00, pVia->cursor->size); -+#ifdef ARGB_CURSOR -+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled) { -+ viaCursorARGBHide(pScrn); -+ /* Convert monochrome to ARGB. */ -+ int width = pVia->cursor->maxWidth / 8; - -- /* Turn cursor off. */ -- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode & 0xFFFFFFFE); -+ for (y = 0; y < (pVia->cursor->maxHeight / 8) * 2; y++) { -+ for (x = 0; x < width; x++) { -+ char t = *(src + width); /* is transparent? */ -+ char fb = *src++; /* foreground or background ? */ - -- /* Upload the cursor image to the frame buffer. */ -- memcpy(pVia->FBBase + pVia->CursorStart, src, MAX_CURS * MAX_CURS / 8 * 2); -+ for (i = 7; i >= 0; i--) { -+ if (t & (1 << i)) -+ *dst++ = 0x00000000; /* transparent */ -+ else -+ *dst++ = fb & (1 << i) ? -+ 0xFF000000 | pVia->cursor->foreground : -+ 0xFF000000 | pVia->cursor->background; -+ } -+ } -+ src += width; -+ } -+ } else -+#endif -+ { -+ viaCursorHWHide(pScrn); -+ /* Upload the cursor image to the frame buffer. */ -+ memcpy(dst, src, pVia->cursor->size); -+ } -+ viaCursorShow(pScrn); -+} - -- /* Restore cursor status */ -- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode); -+static void -+viaCursorHWSetPosition(ScrnInfoPtr pScrn, int x, int y, int xoff, int yoff) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ -+ /* viaCursorHWHide(pScrn); */ -+ VIASETREG(VIA_REG_CURSOR_ORG, ((xoff << 16) | (yoff & 0x003f))); -+ VIASETREG(VIA_REG_CURSOR_POS, ((x << 16) | (y & 0x07ff))); -+ /* viaCursorHWShow(pScrn); */ - } - - static void --VIASetCursorPosition(ScrnInfoPtr pScrn, int x, int y) -+viaCursorSetPosition(ScrnInfoPtr pScrn, int x, int y) - { - VIAPtr pVia = VIAPTR(pScrn); - VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; - unsigned char xoff, yoff; -- CARD32 dwCursorMode; - - if (x < 0) { - xoff = ((-x) & 0xFE); -@@ -158,66 +318,271 @@ - } - } - -- /* Hide cursor before set cursor position in order to avoid ghost cursor -- * image when directly set cursor position. It should be a HW bug but -- * we can use patch by SW. */ -- dwCursorMode = VIAGETREG(VIA_REG_CURSOR_MODE); -- -- /* Turn cursor off. */ -- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode & 0xFFFFFFFE); -- -- VIASETREG(VIA_REG_CURSOR_ORG, ((xoff << 16) | (yoff & 0x003f))); -- VIASETREG(VIA_REG_CURSOR_POS, ((x << 16) | (y & 0x07ff))); -- -- /* Restore cursor status */ -- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode); -+#ifdef ARGB_CURSOR -+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled) -+ viaCursorARGBSetPosition(pScrn, x, y); -+ else -+#endif -+ viaCursorHWSetPosition(pScrn, x, y, xoff, yoff); - } - - - static void --VIASetCursorColors(ScrnInfoPtr pScrn, int bg, int fg) -+viaCursorSetColors(ScrnInfoPtr pScrn, int bg, int fg) - { - VIAPtr pVia = VIAPTR(pScrn); - -+ pVia->cursor->foreground = fg; -+ pVia->cursor->background = bg; -+ -+#ifdef ARGB_CURSOR -+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled) -+ return; -+#endif -+ - VIASETREG(VIA_REG_CURSOR_FG, fg); - VIASETREG(VIA_REG_CURSOR_BG, bg); - } - - void --ViaCursorStore(ScrnInfoPtr pScrn) -+viaCursorStore(ScrnInfoPtr pScrn) - { - VIAPtr pVia = VIAPTR(pScrn); - -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaCursorStore\n")); -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "viaCursorStore\n")); - -- if (pVia->CursorImage) { -+ if (pVia->cursor->image) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, -- "ViaCursorStore: stale image left.\n"); -- xfree(pVia->CursorImage); -+ "viaCursorStore: stale image left.\n"); -+ xfree(pVia->cursor->image); - } - -- pVia->CursorImage = xcalloc(1, 0x1000); -- memcpy(pVia->CursorImage, pVia->FBBase + pVia->CursorStart, 0x1000); -- pVia->CursorFG = (CARD32) VIAGETREG(VIA_REG_CURSOR_FG); -- pVia->CursorBG = (CARD32) VIAGETREG(VIA_REG_CURSOR_BG); -- pVia->CursorMC = (CARD32) VIAGETREG(VIA_REG_CURSOR_MODE); -+ pVia->cursor->image = xcalloc(1, pVia->cursor->size); -+ if (pVia->cursor->image) -+ memcpy(pVia->cursor->image, pVia->FBBase + pVia->cursor->fbCursorStart, -+ pVia->cursor->size); -+ -+ pVia->cursor->foreground = (CARD32) VIAGETREG(VIA_REG_CURSOR_FG); -+ pVia->cursor->background = (CARD32) VIAGETREG(VIA_REG_CURSOR_BG); -+ pVia->cursor->mode = (CARD32) VIAGETREG(VIA_REG_CURSOR_MODE); - } - - void --ViaCursorRestore(ScrnInfoPtr pScrn) -+viaCursorRestore(ScrnInfoPtr pScrn) - { - VIAPtr pVia = VIAPTR(pScrn); - -- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaCursorRestore\n")); -+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "viaCursorRestore\n")); - -- if (pVia->CursorImage) { -- memcpy(pVia->FBBase + pVia->CursorStart, pVia->CursorImage, 0x1000); -- VIASETREG(VIA_REG_CURSOR_FG, pVia->CursorFG); -- VIASETREG(VIA_REG_CURSOR_BG, pVia->CursorBG); -- VIASETREG(VIA_REG_CURSOR_MODE, pVia->CursorMC); -- xfree(pVia->CursorImage); -- pVia->CursorImage = NULL; -+ if (pVia->cursor->image) { -+ memcpy(pVia->FBBase + pVia->cursor->fbCursorStart, pVia->cursor->image, -+ pVia->cursor->size); -+ VIASETREG(VIA_REG_CURSOR_FG, pVia->cursor->foreground); -+ VIASETREG(VIA_REG_CURSOR_BG, pVia->cursor->background); -+ VIASETREG(VIA_REG_CURSOR_MODE, pVia->cursor->mode); -+ xfree(pVia->cursor->image); -+ pVia->cursor->image = NULL; - } else - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, -- "ViaCursorRestore: No cursor image stored.\n"); -+ "viaCursorRestore: No cursor image stored.\n"); - } -+ -+#ifdef ARGB_CURSOR -+ -+static void -+viaCursorARGBShow(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ -+ switch (pVia->Chipset) { -+ case VIA_CX700: -+ /* case VIA_CN750: */ -+ case VIA_P4M890: -+ case VIA_P4M900: -+ /* Turn on hardware icon cursor. */ -+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) -+ VIASETREG(VIA_REG_PRIM_HI_CTRL, 0x76000005); -+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) -+ VIASETREG(VIA_REG_HI_CONTROL, 0xf6000005); -+ break; -+ default: -+ VIASETREG(VIA_REG_HI_CONTROL, 0xf6000005); -+ break; -+ } -+ -+} -+ -+static void -+viaCursorARGBHide(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ CARD32 hiControl; -+ -+ switch (pVia->Chipset) { -+ case VIA_CX700: -+ /* case VIA_CN750: */ -+ case VIA_P4M890: -+ case VIA_P4M900: -+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { -+ hiControl = VIAGETREG(VIA_REG_PRIM_HI_CTRL); -+ /* Turn hardware icon cursor off. */ -+ VIASETREG(VIA_REG_PRIM_HI_CTRL, hiControl & 0xFFFFFFFE); -+ } -+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { -+ hiControl = VIAGETREG(VIA_REG_HI_CONTROL); -+ /* Turn hardware icon cursor off. */ -+ VIASETREG(VIA_REG_HI_CONTROL, hiControl & 0xFFFFFFFE); -+ } -+ break; -+ default: -+ hiControl = VIAGETREG(VIA_REG_HI_CONTROL); -+ /* Turn hardware icon cursor off. */ -+ VIASETREG(VIA_REG_HI_CONTROL, hiControl & 0xFFFFFFFE); -+ } -+} -+ -+static void -+viaCursorARGBSetPosition(ScrnInfoPtr pScrn, int x, int y) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ -+ /* viaCursorARGBHide(pScrn); */ -+ switch (pVia->Chipset) { -+ case VIA_CX700: -+ /* case VIA_CN750: */ -+ case VIA_P4M890: -+ case VIA_P4M900: -+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { -+ /* Set hardware icon position. */ -+ VIASETREG(VIA_REG_PRIM_HI_POSSTART, ((x << 16) | (y & 0x07ff))); -+ VIASETREG(VIA_REG_PRIM_HI_CENTEROFFSET, -+ ((0 << 16) | (0 & 0x07ff))); -+ } -+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { -+ /* Set hardware icon position. */ -+ VIASETREG(VIA_REG_HI_POSSTART, ((x << 16) | (y & 0x07ff))); -+ VIASETREG(VIA_REG_HI_CENTEROFFSET, ((0 << 16) | (0 & 0x07ff))); -+ } -+ break; -+ default: -+ /* Set hardware icon position. */ -+ VIASETREG(VIA_REG_HI_POSSTART, ((x << 16) | (y & 0x07ff))); -+ VIASETREG(VIA_REG_HI_CENTEROFFSET, ((0 << 16) | (0 & 0x07ff))); -+ break; -+ } -+ /* viaCursorARGBShow(pScrn); */ -+} -+ -+static Bool -+viaCursorARGBUse(ScreenPtr pScreen, CursorPtr pCurs) -+{ -+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; -+ VIAPtr pVia = VIAPTR(pScrn); -+ -+ return (pVia->cursor->isHWCursorEnabled -+ && pVia->cursor->isARGBSupported -+ && pVia->cursor->isARGBEnabled -+ && pCurs->bits->width <= pVia->cursor->maxWidth -+ && pCurs->bits->height <= pVia->cursor->maxHeight); -+} -+ -+static void -+viaCursorARGBLoad(ScrnInfoPtr pScrn, CursorPtr pCurs) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; -+ CARD32 *dst = NULL; -+ CARD32 *image = pCurs->bits->argb; -+ int x, y, w, h; -+ -+ dst = (CARD32 *) (pVia->FBBase + pVia->cursor->fbCursorStart); -+ -+ if (!image) -+ return; -+ -+ w = pCurs->bits->width; -+ if (w > pVia->cursor->maxWidth) -+ w = pVia->cursor->maxWidth; -+ -+ h = pCurs->bits->height; -+ if (h > pVia->cursor->maxHeight) -+ h = pVia->cursor->maxHeight; -+ -+ memset(dst, 0, pVia->cursor->size); -+ -+ for (y = 0; y < h; y++) { -+ for (x = 0; x < w; x++) -+ *dst++ = *image++; -+ -+ /* Pad to the right with transparent. */ -+ for (; x < pVia->cursor->maxWidth; x++) -+ *dst++ = 0; -+ } -+ -+ /* Pad below with transparent. */ -+ for (; y < pVia->cursor->maxHeight; y++) { -+ for (x = 0; x < pVia->cursor->maxWidth; x++) -+ *dst++ = 0; -+ } -+ viaCursorShow(pScrn); -+} -+ -+#endif -+ -+Bool -+viaCursorRecInit(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ -+ if (!pVia->cursor) -+ pVia->cursor = -+ (ViaCursorInfoPtr) xnfcalloc(sizeof(ViaCursorInfoRec), 1); -+ -+ if (pVia->cursor) { -+ ViaCursorInfoPtr cursor = pVia->cursor; -+ -+ switch (pVia->Chipset) { -+ case VIA_CLE266: -+ case VIA_KM400: -+ case VIA_K8M800: -+ cursor->isARGBSupported = FALSE; -+ cursor->isARGBEnabled = FALSE; -+ cursor->maxWidth = 32; -+ cursor->maxHeight = 32; -+ cursor->size = ((cursor->maxWidth * cursor->maxHeight) / 8) * 2; -+ break; -+ default: -+ cursor->isARGBSupported = TRUE; -+ cursor->isARGBEnabled = TRUE; -+ cursor->maxWidth = 64; -+ cursor->maxHeight = 64; -+ cursor->size = cursor->maxWidth * cursor->maxHeight * 4; -+ break; -+ } -+ } -+ -+ return pVia->cursor != NULL; -+} -+ -+void -+viaCursorRecDestroy(ScrnInfoPtr pScrn) -+{ -+ VIAPtr pVia = VIAPTR(pScrn); -+ -+ if (pVia->cursor) -+ xfree(pVia->cursor); -+} -+ -+static Bool -+viaCursorHWUse(ScreenPtr pScreen, CursorPtr pCurs) -+{ -+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; -+ VIAPtr pVia = VIAPTR(pScrn); -+ -+ return (pVia->cursor->isHWCursorEnabled -+ /* Can't enable HW cursor on both CRTCs at the same time. */ -+ && !(pVia->pBIOSInfo->FirstCRTC->IsActive -+ && pVia->pBIOSInfo->SecondCRTC->IsActive) -+ && pCurs->bits->width <= pVia->cursor->maxWidth -+ && pCurs->bits->height <= pVia->cursor->maxHeight); -+} -Index: src/via_timing.c -=================================================================== ---- src/via_timing.c (revision 0) -+++ src/via_timing.c (revision 0) -@@ -0,0 +1,398 @@ -+/* -+ * Copyright 2007-2008 Gabriel Mansi. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sublicense, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the next -+ * paragraph) shall be included in all copies or substantial portions of the -+ * Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -+ * DEALINGS IN THE SOFTWARE. -+ * -+ * GTF and CVT timing calculator -+ * -+ * Based on -+ * GTF spreadsheet developed by Andy Morrish -+ * http://www.vesa.org/Public/GTF/GTF_V1R1.xls -+ * and -+ * CVT spreadsheet developed by Graham Loveridge -+ * http://www.vesa.org/Public/CVT/CVTd6r1.xls -+ * -+ */ -+ -+#include -+#include -+#include -+#include "via_timing.h" -+ -+__inline__ static float froundf(Bool gtf, float f) { -+ return gtf ? rintf(f) : floorf(f) ; -+} -+ -+#define MODE_NAME_LENGTH 20 -+static int timingGenerateMode(DisplayModePtr mode, Bool gtf, int width, int height, float refresh, Bool interlaced, Bool reducedBlanking) { -+ -+ if (!mode) return TIMING_ERR_BAD_ALLOC ; -+ -+ int ret = 0 ; -+ float H_PIXELS = width ; -+ float V_LINES = height ; -+ Bool MARGINS_RQD = FALSE ; -+ Bool INT_RQD = interlaced ; -+ float IP_FREQ_RQD = refresh ; -+ Bool RED_BLANK_RQD = reducedBlanking && !gtf ; -+ -+ if (!gtf) { -+ if (refresh != 50.0f -+ && refresh != 60.0f -+ && refresh != 75.0f -+ && refresh != 85.0f ) -+ ret |= TIMING_CVT_WARN_REFRESH_RATE ; -+ -+ if (reducedBlanking && refresh != 60.0f) -+ ret |= TIMING_CVT_WARN_REFRESH_RATE_NOT_RB ; -+ -+ } -+ /* 1) These are the default values that define the MARGIN size: */ -+ /* Top/ bottom MARGIN size as % of height (%) {DEFAULT = 1.8} */ -+ float TOP_BOTTOM_MARGIN = 1.8f ; -+ -+ /* 2) This default value defines the horizontal timing boundaries: */ -+ /* Character cell horizontal granularity (pixels) {DEFAULT = 8} */ -+ float CELL_GRAN = 8.0f ; -+ -+ /* 3) These default values define analog system sync pulse width limitations: */ -+ /* 4:3 -> 4, 16:9 -> 5, 16: -> 6, 5:4 -> 7, 15:9 -> 7, -+ * Reserved -> 8, Reserved -> 9, Custom -> 10 -+ */ -+ float V_SYNC_RQD = 3.0f ; -+ float vSync ; -+ if (gtf) { -+ vSync = V_SYNC_RQD ; -+ } else { -+ float aspectRatio = (float)width / height ; -+ if ( aspectRatio == 4.0f / 3.0f ) vSync = 4 ; -+ else if ( aspectRatio == 16.0f / 9.0f ) vSync = 5 ; -+ else if ( aspectRatio == 16.0f / 10.0f ) vSync = 6 ; -+ else if ( aspectRatio == 5.0f / 4.0f || aspectRatio == 15.0f / 9.0f ) vSync = 7 ; -+ else { -+ vSync = 10 ; -+ ret |= TIMING_CVT_WARN_ASPECT_RATIO ; -+ } -+ } -+ -+ /* Nominal H sync width (% of line period) {DEFAULT = 8} */ -+ float NOMINAL_H_SYNC_WIDTH = 8.0f ; -+ -+ /* 4) These default values define analog scan system vertical blanking time limitations: */ -+ /* Minimum time of vertical sync+back porch interval (us) */ -+ float MIN_V_SYNC_BP_INTERVAL = 550.0f ; -+ /* Minimum number of vertical back porch lines {DEFAULT = 6} */ -+ float MIN_V_BPORCH = 6 ; -+ /* Minimum vertical porch (no of lines) {DEFAULT = 3} */ -+ float MIN_V_PORCH = gtf ? 1.0f : 3.0f ; -+ /* 5) Definition of Horizontal blanking time limitation: */ -+ /* Generalized blanking limitation formula used of the form: -+ * =C - ( M / Fh) -+ * Where: -+ * M (gradient) (%/kHz) {DEFAULT = 600} -+ * C (offset) (%) {DEFAULT = 40} -+ * K (blanking time scaling factor) {DEFAULT = 128} -+ * J (scaling factor weighting) {DEFAULT = 20} -+ */ -+ float GTF_M_VAR = 600 ; -+ float GTF_C_VAR = 40 ; -+ float GTF_K_VAR = 128 ; -+ float GTF_J_VAR = 20 ; -+ -+ /* M' = K / 256 * M */ -+ float mPrime = GTF_K_VAR / 256 * GTF_M_VAR ; -+ /* C' = ( ( C - J ) * K / 256 ) + J */ -+ float cPrime = ( ( GTF_C_VAR - GTF_J_VAR ) * GTF_K_VAR / 256 ) + GTF_J_VAR ; -+ /* Fixed number of clocks for horizontal blanking {DEFAULT = 160} */ -+ float K130 = 160 ; -+ /* Fixed number of clocks for horizontal sync {DEFAULT = 32} */ -+ float K131 = 32 ; -+ /* Minimum vertical blanking interval time (us) {DEFAULT = 460} */ -+ float K133 = 460 ; -+ /* Fixed number of lines for vertical front porch {DEFAULT = 3} */ -+ float RB_V_FPORCH = 3 ; -+ -+ /* Minimum number of vertical back porch lines {DEFAULT = 6} */ -+ /* float RB_MIN_V_BPORCH = 6 ; */ -+ -+ float CLOCK_STEP = 0.25f ; -+ -+ /* CONSTANTS */ -+ -+ float cellGranRnd = floorf(CELL_GRAN) ; -+ float marginPer = TOP_BOTTOM_MARGIN; -+ float minVPorchRnd = floorf(MIN_V_PORCH) ; -+ -+ /* STANDARD CRT TIMING SCRATCH PAD: */ -+ float minVSyncBP = MIN_V_SYNC_BP_INTERVAL ; -+ float hSyncPer = NOMINAL_H_SYNC_WIDTH ; -+ -+ /* REDUCED BLANKING SCRATCH PAD: */ -+ float rbMinVBlank = K133 ; -+ float rbHSync = K131 ; -+ float rbHBlank = K130 ; -+ -+ /* COMMON TIMING PARAMETERS: */ -+ /* 1 REQUIRED FIELD RATE */ -+ float vFieldRateRqd = INT_RQD ? IP_FREQ_RQD * 2.0f : IP_FREQ_RQD ; -+ /* 2 HORIZONTAL PIXELS */ -+ float hPixelsRnd = froundf( gtf, ( H_PIXELS/cellGranRnd ) * cellGranRnd ); -+ /* 3 DETERMINE LEFT & RIGHT BORDERS */ -+ float leftMargin = MARGINS_RQD ? floorf( hPixelsRnd * marginPer / 100.0f / cellGranRnd ) * cellGranRnd : 0 ; -+ float rightMargin = leftMargin ; -+ /* 4 FIND TOTAL ACTIVE PIXELS */ -+ float totalActivePixels = hPixelsRnd + leftMargin + rightMargin ; -+ /* 5 FIND NUMBER OF LINES PER FIELD */ -+ float vLinesRnd = INT_RQD ? froundf( gtf, V_LINES / 2.0f ) : froundf( gtf, V_LINES ) ; -+ /* 6 FIND TOP & BOTTOM MARGINS */ -+ float topMargin = MARGINS_RQD ? froundf( gtf, marginPer/100.0f*vLinesRnd ) : 0 ; -+ float botMargin = topMargin ; -+ -+ float interlace = INT_RQD ? 0.5f : 0 ; -+ -+ -+ /* 8 ESTIMATE HORIZ. PERIOD (us): */ -+ float U23 = ( ( 1.0f / vFieldRateRqd ) - minVSyncBP / 1000000.0f ) -+ / ( vLinesRnd + ( 2.0f * topMargin ) + minVPorchRnd + interlace ) * 1000000.0f ; -+ -+ /* 8.1 Reduced blanking */ -+ float Y23 = ( ( 1000000.0f / vFieldRateRqd ) - rbMinVBlank ) / ( vLinesRnd + topMargin + botMargin ) ; -+ -+ /* RESULTS Estimated Horizontal Frequency (kHz): */ -+ float hPeriodEst = RED_BLANK_RQD ? Y23 : U23 ; -+ -+ /* 9 FIND NUMBER OF LINES IN (SYNC + BACK PORCH): */ -+ /* Estimated V_SYNC_BP */ -+ float U26 = froundf( gtf, minVSyncBP / hPeriodEst ) ; -+ if ( !gtf ) U26 += 1.0f ; -+ -+ /* float U27 = MIN_VSYNC_BP/H_PERIOD_EST ; */ -+ -+ /* 9.1 RB */ -+ float vbiLines = floorf( rbMinVBlank/hPeriodEst ) + 1.0f ; -+ /* float Y27 = RB_MIN_V_BLANK/H_PERIOD_EST ; */ -+ -+ float vSyncBP ; -+ if (gtf) -+ vSyncBP = rintf( MIN_V_SYNC_BP_INTERVAL / hPeriodEst ) ; -+ else -+ vSyncBP = U26 < ( vSync + MIN_V_BPORCH ) ? vSync + MIN_V_BPORCH : U26 ; -+ -+ /* RESULTS Ver Sync */ -+ float vSyncRnd = (int) vSync ; -+ -+ /* 10 FIND NUMBER OF LINES IN BACK PORCH (Lines): */ -+ /* float U31 = V_SYNC_BP-V_SYNC_RND ; */ -+ /* 10.1 RB */ -+ float rbMinVbi = RB_V_FPORCH + vSyncRnd + MIN_V_BPORCH ; -+ float actVbiLines = vbiLines < rbMinVbi ? rbMinVbi : vbiLines ; -+ -+ /*11 FIND TOTAL NUMBER OF LINES IN VERTICAL FIELD: */ -+ float U34 = vLinesRnd + topMargin + botMargin + vSyncBP + interlace + minVPorchRnd ; -+ /* 11.1 RB FIND TOTAL NUMBER OF LINES IN VERTICAL FIELD: */ -+ float Y34 = actVbiLines + vLinesRnd + topMargin + botMargin + interlace ; -+ -+ /* RESULTS */ -+ float totalVLines = RED_BLANK_RQD ? Y34 : U34 ; -+ -+ /* 12 FIND IDEAL BLANKING DUTY CYCLE FROM FORMULA (%): */ -+ float idealDutyCicle = cPrime - ( mPrime * hPeriodEst / 1000.0f ) ; -+ -+ float hPeriod ; -+ float vFieldRateEst ; -+ if (gtf) { -+ vFieldRateEst = 1.0f / hPeriodEst / totalVLines * 1000000.0f ; -+ hPeriod = hPeriodEst / ( vFieldRateRqd / vFieldRateEst ) ; -+ } else -+ hPeriod = idealDutyCicle ; -+ -+ /* 12.1 RB FIND TOTAL NUMBER OF PIXELS IN A LINE (Pixels): */ -+ float Y37 = rbHBlank + totalActivePixels ; -+ -+ /* 13 FIND BLANKING TIME TO NEAREST CHAR CELL (Pixels): */ -+ -+ float vFieldRate ; -+ if (gtf) { -+ vFieldRate = rintf( totalActivePixels * idealDutyCicle / ( 100.0f - idealDutyCicle ) / ( 2.0f * cellGranRnd ) ) * ( 2.0f * cellGranRnd ) ; -+ } else { -+ vFieldRate = hPeriod < 20.0f ? -+ floorf( totalActivePixels * 20.0f / ( 100.0f - 20.0f ) / ( 2.0f * cellGranRnd ) ) * (2.0f * cellGranRnd ) : -+ floorf( totalActivePixels * idealDutyCicle / ( 100.0f - idealDutyCicle ) / ( 2.0f * cellGranRnd ) ) * ( 2.0f * cellGranRnd ) ; -+ } -+ -+ /* RESULTS Horizontal Blanking (Pixels): */ -+ float hBlank = RED_BLANK_RQD ? rbHBlank : vFieldRate ; -+ -+ /* 14 FIND TOTAL NUMBER OF PIXELS IN A LINE (Pixels): */ -+ float vFrameRate = totalActivePixels + hBlank ; -+ -+ float totalPixels = RED_BLANK_RQD ? Y37 : vFrameRate ; -+ -+ /* 15 FIND PIXEL CLOCK FREQUENCY (MHz): */ -+ float pixelFreq ; -+ if (gtf) -+ pixelFreq = totalPixels / hPeriodEst ; -+ else -+ pixelFreq = CLOCK_STEP * floorf( ( totalPixels / hPeriodEst ) / CLOCK_STEP ) ; -+ -+ /* float U47 = TOTAL_PIXELS/H_PERIOD_EST ; */ -+ -+ /* 13 RB FIND PIXEL CLOCK FREQUENCY (MHz): Y40*/ -+ float Y40 = CLOCK_STEP * floorf( ( vFieldRateRqd * totalVLines * totalPixels / 1000000.0f ) / CLOCK_STEP ) ; -+ /* float Y41 = V_FIELD_RATE_RQD*TOTAL_V_LINES*TOTAL_PIXELS/1000000.0f ; */ -+ -+ /* RESULTS Actual Pixel Clock (MHz): */ -+ float actPixelFreq = RED_BLANK_RQD ? Y40 : pixelFreq ; -+ -+ /* 16 FIND ACTUAL HORIZONTAL FREQUENCY (kHz): */ -+ //float U50 = 1000.0f*ACT_PIXEL_FREQ/TOTAL_PIXELS ; -+ -+ /* 14 RB FIND ACTUAL HORIZONTAL FREQUENCY (kHz): */ -+ //float Y44 = 1000.0f*ACT_PIXEL_FREQ/TOTAL_PIXELS ; -+ -+ /* RESULTS Actual Horizontal Frequency (kHz): */ -+ //float ACT_H_FREQ = RED_BLANK_RQD ? Y44 : U50 ; -+ -+ float actHFreq ; -+ if (gtf) -+ actHFreq = 1000.0f / hPeriod ; -+ else -+ actHFreq = 1000.0f * actPixelFreq / totalPixels ; -+ -+ /* 17 FIND ACTUAL FIELD RATE (Hz): */ -+ // float U53 = 1000.0f*ACT_H_FREQ/TOTAL_V_LINES ; -+ -+ /* 15 RB FIND ACTUAL FIELD RATE (Hz): */ -+ // float Y47 = 1000.0f*ACT_H_FREQ/TOTAL_V_LINES ; -+ -+ /* RESULTS Actual Vertical Frequency (Hz): */ -+ // float ACT_FIELD_RATE = RED_BLANK_RQD ? Y47 : U53 ; -+ float actFieldRate = 1000.0f * actHFreq / totalVLines ; -+ -+ /* 16 RB FIND ACTUAL VERTICAL FRAME FREQUENCY (Hz): */ -+ //float Y50 = INT_RQD ? ACT_FIELD_RATE/2.0f : ACT_FIELD_RATE ; -+ -+ /* 18 FIND ACTUAL VERTICAL FRAME FREQUENCY (Hz): */ -+ //float U56 = INT_RQD ? ACT_FIELD_RATE/2.0f : ACT_FIELD_RATE ; -+ -+ /* RESULTS Actual Vertical Frequency (Hz): */ -+ //float ACT_FRAME_RATE = RED_BLANK_RQD ? Y50 : U56 ; -+ float actFrameRat = INT_RQD ? actFieldRate / 2.0f : actFieldRate ; -+ -+ /* RESULTS Hor Back porch*/ -+ float hBackPorch = hBlank / 2 ; -+ -+ /* RESULTS Ver Blank */ -+// float vBlank = RED_BLANK_RQD ? actVbiLines : vSyncBP + minVPorchRnd ; -+ -+ /* RESULTS Ver Front Porch*/ -+ float vFrontPorch = RED_BLANK_RQD ? RB_V_FPORCH : minVPorchRnd ; -+ -+ /* RESULTS Ver back porch */ -+// float vBackPorch = vBlank - vFrontPorch - vSyncRnd ; -+ -+ /* RESULTS Hor Sync */ -+ float hSyncRnd = RED_BLANK_RQD ? rbHSync : froundf( gtf, ( hSyncPer / 100.0f * totalPixels / cellGranRnd ) ) * cellGranRnd ; -+ -+ /* RESULTS Hor Front Porch: */ -+ float hFrontPorch ; -+ if (gtf) -+ hFrontPorch = ( hBlank / 2.0f ) - hSyncRnd ; -+ else -+ hFrontPorch = hBlank - hBackPorch - hSyncRnd ; -+ -+#if DEBUG -+ fprintf( stderr, "hFrontPorch:\t\t%f\n", hFrontPorch ) ; -+ fprintf( stderr, "totalActivePixels:\t\t%f\n", totalActivePixels ) ; -+ fprintf( stderr, "vFieldRateRqd:\t\t\t%f\n", vFieldRateRqd ) ; -+ fprintf( stderr, "minVSyncBP:\t\t\t%f\n", minVSyncBP ) ; -+ fprintf( stderr, "vLinesRnd:\t\t\t%f\n", vLinesRnd ) ; -+ fprintf( stderr, "minVPorchRnd:\t\t\t%f\n", minVPorchRnd ) ; -+ fprintf( stderr, "interlace:\t\t\t%f\n", interlace ) ; -+ fprintf( stderr, "vSyncBP:\t\t\t%f\n", vSyncBP ) ; -+ fprintf( stderr, "hSyncPer:\t\t\t%f\n", hSyncPer ) ; -+ fprintf( stderr, "totalPixels:\t\t\t%f\n", totalPixels ) ; -+ fprintf( stderr, "cellGranRnd:\t\t\t%f\n", cellGranRnd ) ; -+ fprintf( stderr, "hPeriod:\t\t\t%f\n", hPeriod ) ; -+ fprintf( stderr, "vFieldRate:\t\t\t%f\n", vFieldRate ) ; -+ fprintf( stderr, "hPeriodEst:\t\t\t%f\n", hPeriodEst ) ; -+ fprintf( stderr, "totalVLines:\t\t\t%f\n", totalVLines ) ; -+ fprintf( stderr, "vFieldRateEst:\t\t\t%f\n", vFieldRateEst ) ; -+ fprintf( stderr, "vFieldRateRqd:\t\t\t%f\n", vFieldRateRqd ) ; -+ fprintf( stderr, "idealDutyCicle:\t\t\t%f\n", idealDutyCicle ) ; -+ fprintf( stderr, "actHFreq:\t\t\t%f\n", actHFreq ) ; -+ fprintf( stderr, "hblank:\t\t\t\t%f\n", hBlank ) ; -+ fprintf( stderr, "actPixelFreq:\t\t\t%f\n", actPixelFreq ) ; -+#endif -+ -+ if (mode) { -+ if (mode->name == NULL) { -+ mode->name = malloc(MODE_NAME_LENGTH); -+ if (mode->name) { -+ memset(mode->name, 0, MODE_NAME_LENGTH) ; -+ char c = 0 ; -+ if (RED_BLANK_RQD) c = 'r' ; -+ if (INT_RQD) c = 'i' ; -+ sprintf(mode->name, "%dx%d@%d%c", width, height, (int)refresh, c ) ; -+ } -+ } -+ -+ mode->Clock = actPixelFreq * 1000.0f ; -+ mode->VRefresh = actFrameRat ; -+ -+ mode->HDisplay = width ; -+ mode->HSyncStart = width + hFrontPorch ; -+ mode->HSyncEnd = width + ( hFrontPorch + hSyncRnd ) ; -+ mode->HTotal = totalPixels ; -+ -+ mode->VDisplay = height ; -+ mode->VSyncStart = height + vFrontPorch ; -+ mode->VSyncEnd = height + (vFrontPorch + vSyncRnd) ; -+ mode->VTotal = INT_RQD ? totalVLines * 2 : totalVLines ; -+ mode->Flags = 0 ; -+ -+ if (RED_BLANK_RQD) { -+ mode->Flags |= V_PHSYNC ; -+ mode->Flags |= V_NVSYNC ; -+ } else { -+ mode->Flags |= V_NHSYNC ; -+ mode->Flags |= V_PVSYNC ; -+ } -+ -+ if (!(mode->Flags & V_PHSYNC)) mode->Flags |= V_NHSYNC ; -+ if (!(mode->Flags & V_NHSYNC)) mode->Flags |= V_PHSYNC ; -+ if (!(mode->Flags & V_PVSYNC)) mode->Flags |= V_NVSYNC ; -+ if (!(mode->Flags & V_NVSYNC)) mode->Flags |= V_PVSYNC ; -+ -+ if (INT_RQD) mode->Flags |= V_INTERLACE ; -+ } else { -+ ret |= TIMING_ERR_BAD_ALLOC ; -+ } -+ -+ return ret ; -+} -+ -+int viaTimingCvt(DisplayModePtr mode, int width, int height, float refresh, Bool interlaced, Bool reducedBlanking) { -+ return timingGenerateMode( mode, FALSE, width, height, refresh, interlaced, reducedBlanking ) ; -+} -+ -+int viaTimingGtf(DisplayModePtr mode, int width, int height, float refresh, Bool interlaced) { -+ return timingGenerateMode( mode, TRUE, width, height, refresh, interlaced, FALSE ) ; -+} -Index: src/Makefile.am -=================================================================== ---- src/Makefile.am (revision 588) -+++ src/Makefile.am (working copy) -@@ -43,23 +43,29 @@ - via_ch7xxx.c \ - via_ch7xxx.h \ - via_cursor.c \ -+ via_crtc.c \ - via_dga.c \ -+ via_display.c \ - via_dmabuffer.h \ - via_driver.c \ - via_driver.h \ - via_i2c.c \ - via_id.c \ - via_id.h \ -+ via_lvds.c \ - via_memcpy.c \ - via_memcpy.h \ - via_memory.c \ - via_mode.c \ - via_mode.h \ -+ via_panel.c \ - via_priv.h \ - via_regs.h \ - via_shadow.c \ - via_swov.c \ - via_swov.h \ -+ via_timing.c \ -+ via_timing.h \ - via_vbe.c \ - via_vgahw.c \ - via_vgahw.h \ -Index: src/via_dga.c -=================================================================== ---- src/via_dga.c (revision 588) -+++ src/via_dga.c (working copy) -@@ -247,8 +247,8 @@ - pScrn->depth = pVia->DGAOldDepth; - - pScrn->SwitchMode(index, pScrn->currentMode, 0); -- if (pVia->hwcursor) -- VIAShowCursor(pScrn); -+ if (pVia->cursor->isHWCursorEnabled) -+ viaCursorShow(pScrn); - - pVia->DGAactive = FALSE; - } -@@ -260,8 +260,8 @@ - pMode->bitsPerPixel, pMode->depth); - #endif - -- if (pVia->hwcursor) -- VIAHideCursor(pScrn); -+ if (pVia->cursor->isHWCursorEnabled) -+ viaCursorHide(pScrn); - - if (!pVia->DGAactive) { /* save the old parameters */ - pVia->DGAOldDisplayWidth = pScrn->displayWidth; -Index: src/via_timing.h -=================================================================== ---- src/via_timing.h (revision 0) -+++ src/via_timing.h (revision 0) -@@ -0,0 +1,51 @@ -+/* -+ * Copyright 2007-2008 Gabriel Mansi. -+ * -+ * Permission is hereby granted, free of charge, to any person obtaining a -+ * copy of this software and associated documentation files (the "Software"), -+ * to deal in the Software without restriction, including without limitation -+ * the rights to use, copy, modify, merge, publish, distribute, sublicense, -+ * and/or sell copies of the Software, and to permit persons to whom the -+ * Software is furnished to do so, subject to the following conditions: -+ * -+ * The above copyright notice and this permission notice (including the next -+ * paragraph) shall be included in all copies or substantial portions of the -+ * Software. -+ * -+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL -+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING -+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER -+ * DEALINGS IN THE SOFTWARE. -+ * -+ */ -+ -+#ifndef _TIMING_H_ -+#define _TIMING_H_ -+ -+#include "xf86.h" -+ -+/* Aspect ratio not CVT standard */ -+#define TIMING_CVT_WARN_ASPECT_RATIO 1 << 0 -+ -+/* Error allocating memory */ -+#define TIMING_ERR_BAD_ALLOC 1 << 1 -+ -+/* Refresh rate not CVT standard */ -+#define TIMING_CVT_WARN_REFRESH_RATE 1 << 2 -+ -+/* Refresh rate not valid for reducing blanking */ -+#define TIMING_CVT_WARN_REFRESH_RATE_NOT_RB 1 << 3 -+ -+/** -+ * Geneartes a CVT modeline -+ * mode must not be null, if mode->name is null a new char* will be allocated. -+ * -+ */ -+int viaTimingCvt(DisplayModePtr mode, int width, int height, float refresh, Bool interlaced, Bool reducedBlanking); -+ -+int viaTimingGtf(DisplayModePtr mode, int width, int height, float refresh, Bool interlaced) ; -+ -+#endif /*_TIMING_H_*/ -Index: ChangeLog -=================================================================== ---- ChangeLog (revision 588) -+++ ChangeLog (working copy) -@@ -1,3 +1,66 @@ -+2008-05-26 Gabriel Mansi -+ -+ * src/Makefile.am: -+ * src/via_accel.c: (viaInitAccel): -+ * src/via_bios.h: -+ * src/via_crtc.c: (ViaCRTCSetGraphicsRegisters), -+ (ViaCRTCSetAttributeRegisters), (ViaCRTCInit), -+ (ViaFirstCRTCSetMode), (ViaFirstCRTCSetStartingAddress), -+ (ViaSecondCRTCSetStartingAddress), -+ (ViaSecondCRTCHorizontalQWCount), (ViaSecondCRTCHorizontalOffset), -+ (ViaSecondCRTCSetMode), (ViaFirstCRTCModeValid), -+ (ViaSecondCRTCModeValid), (ViaShadowCRTCSetMode): -+ * src/via_cursor.c: (viaCursorARGBInit), (viaCursorSetFB), -+ (viaCursorHWInit), (viaCursorHWShow), (viaCursorHWHide), -+ (viaCursorShow), (viaCursorHide), (viaCursorLoadImage), -+ (viaCursorHWSetPosition), (viaCursorSetPosition), -+ (viaCursorSetColors), (viaCursorStore), (viaCursorRestore), -+ (viaCursorARGBShow), (viaCursorARGBHide), -+ (viaCursorARGBSetPosition), (viaCursorARGBUse), -+ (viaCursorARGBLoad), (viaCursorRecInit), (viaCursorRecDestroy), -+ (viaCursorHWUse): -+ * src/via_dga.c: (VIADGASetMode): -+ * src/via_display.c: (ViaSecondDisplayChannelEnable), -+ (ViaSecondDisplayChannelDisable), (ViaDisplayInit), -+ (ViaDisplayEnableSimultaneous), (ViaDisplayDisableSimultaneous), -+ (ViaDisplayEnableCRT), (ViaDisplayDisableCRT), -+ (ViaDisplaySetStreamOnCRT): -+ * src/via_driver.c: (VIAGetRec), (VIAFreeRec), -+ (VIASetupDefaultOptions), (VIAPreInit), (VIAEnterVT), (VIALeaveVT), -+ (ViaGammaDisable), (VIASave), (VIARestore), (ViaMMIOEnable), -+ (ViaMMIODisable), (VIAMapMMIO), (VIAUnmapMem), (VIALoadPalette), -+ (VIAScreenInit), (VIAWriteMode), (VIACloseScreen), -+ (VIAAdjustFrame), (VIADPMS): -+ * src/via_driver.h: -+ * src/via_lvds.c: (ViaLVDSPowerFirstSequence), -+ (ViaLVDSPowerSecondSequence), (ViaLVDSDFPPower), -+ (ViaLVDSPowerChannel), (ViaLVDSPower): -+ * src/via_mode.c: (ViaPrintMode), (ViaOutputsSelect), -+ (VIAGetPanelSize), (ViaPanelGetIndex), (ViaModesAttach), -+ (ViaValidMode), (VIASetLCDMode), (ViaModePrimaryLegacy), -+ (ViaModeSecondaryLegacy), (ViaLCDPower), (ViaModeFirstCRTC), -+ (ViaModeSecondCRTC), (ViaModeSet): -+ * src/via_panel.c: (ViaPanelLookUpModeIndex), -+ (ViaPanelGetNativeModeFromOption), -+ (ViaPanelGetNativeModeFromScratchPad), (ViaPanelScaleDisable), -+ (ViaPanelScale), (ViaPanelGetNativeDisplayMode), (ViaPanelPreInit), -+ (ViaPanelCenterMode), (ViaPanelGetSizeFromEDID), -+ (ViaPanelGetSizeFromDDCv1), (ViaPanelGetSizeFromDDCv2): -+ * src/via_regs.h: -+ * src/via_swov.c: (Upd_Video): -+ * src/via_timing.c: (froundf), (timingGenerateMode), -+ (viaTimingCvt), (viaTimingGtf): -+ * src/via_timing.h: -+ * src/via_vbe.c: (ViaVbeGetActiveDevices), (ViaVbeSetMode), -+ (ViaVbeDoDPMS): -+ * src/via_video.c: (DecideOverlaySupport), (viaSaveVideo), -+ (viaRestoreVideo): -+ -+ Merge panel code from randr branch (rev. 427 to 553) -+ Add native mode setting for P4M890, P4M900, K8M890 and CX700 -+ Add LVDS power functions for P4M900 and CX700 -+ Add ARGB hardware cursor support -+ - 2008-03-11 Xavier Bachelot - - * configure.ac: diff --git a/openchrome-0.2.903-pll_rework.patch b/openchrome-0.2.903-pll_rework.patch deleted file mode 100644 index ad07862..0000000 --- a/openchrome-0.2.903-pll_rework.patch +++ /dev/null @@ -1,294 +0,0 @@ ---- src/via_mode.c 2009-06-16 23:17:42.000000000 +0200 -+++ src/via_mode.c 2009-06-16 22:43:58.000000000 +0200 -@@ -974,21 +974,35 @@ - * - */ - static void --ViaSetPrimaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) -+ViaSetDotclock(ScrnInfoPtr pScrn, CARD32 clock, int base, int probase) - { - vgaHWPtr hwp = VGAHWPTR(pScrn); - VIAPtr pVia = VIAPTR(pScrn); - - DEBUG(xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, -- "ViaSetPrimaryDotclock to 0x%06x\n", (unsigned)clock)); -+ "ViaSetDotclock to 0x%06x\n", (unsigned)clock)); - - if ((pVia->Chipset == VIA_CLE266) || (pVia->Chipset == VIA_KM400)) { -- hwp->writeSeq(hwp, 0x46, clock >> 8); -- hwp->writeSeq(hwp, 0x47, clock & 0xFF); -+ hwp->writeSeq(hwp, base, clock >> 8); -+ hwp->writeSeq(hwp, base+1, clock & 0xFF); - } else { /* unichrome pro */ -- hwp->writeSeq(hwp, 0x44, clock >> 16); -- hwp->writeSeq(hwp, 0x45, (clock >> 8) & 0xFF); -- hwp->writeSeq(hwp, 0x46, clock & 0xFF); -+ union pllparams pll; -+ int dtz, dr, dn, dm; -+ pll.packed = clock; -+ dtz = pll.params.dtz; -+ dr = pll.params.dr; -+ dn = pll.params.dn; -+ dm = pll.params.dm; -+ -+ /* The VX855 does not modify dm/dn, but earlier chipsets do. */ -+ if (pVia->Chipset != VIA_VX855) { -+ dm -= 2; -+ dn -= 2; -+ } -+ -+ hwp->writeSeq(hwp, probase, dm & 0xff); -+ hwp->writeSeq(hwp, probase+1, ((dm >> 8) & 0x03) | (dr << 2) | ((dtz & 1) << 7)); -+ hwp->writeSeq(hwp, probase+2, (dn & 0x7f) | ((dtz & 2) << 6)); - } - - ViaSeqMask(hwp, 0x40, 0x02, 0x02); -@@ -999,25 +1013,28 @@ - * - */ - static void --ViaSetSecondaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) -+ViaSetPrimaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) - { -- vgaHWPtr hwp = VGAHWPTR(pScrn); -- VIAPtr pVia = VIAPTR(pScrn); -- -- DEBUG(xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, -- "ViaSetSecondaryDotclock to 0x%06x\n", (unsigned)clock)); -+ ViaSetDotclock(pScrn, clock, 0x46, 0x44); -+} - -- if ((pVia->Chipset == VIA_CLE266) || (pVia->Chipset == VIA_KM400)) { -- hwp->writeSeq(hwp, 0x44, clock >> 8); -- hwp->writeSeq(hwp, 0x45, clock & 0xFF); -- } else { /* unichrome pro */ -- hwp->writeSeq(hwp, 0x4A, clock >> 16); -- hwp->writeSeq(hwp, 0x4B, (clock >> 8) & 0xFF); -- hwp->writeSeq(hwp, 0x4C, clock & 0xFF); -- } -+/* -+ * -+ */ -+static void -+ViaSetSecondaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) -+{ -+ ViaSetDotclock(pScrn, clock, 0x44, 0x4A); -+} - -- ViaSeqMask(hwp, 0x40, 0x04, 0x04); -- ViaSeqMask(hwp, 0x40, 0x00, 0x04); -+/* -+ * -+ */ -+static void -+ViaSetECKDotclock(ScrnInfoPtr pScrn, CARD32 clock) -+{ -+ /* Does the non-pro chip have an ECK clock ? */ -+ ViaSetDotclock(pScrn, clock, 0, 0x47); - } - - /* -@@ -1287,15 +1304,16 @@ - { - double fvco, fout, fref, err, minErr; - CARD32 dr = 0, dn, dm, maxdm, maxdn; -- CARD32 factual, bestClock; -- -+ CARD32 factual; -+ union pllparams bestClock; -+ - fref = 14.318e6; - fout = (double)clock * 1.e3; - - factual = ~0; -- maxdm = factual / 14318000U - 2; -+ maxdm = factual / 14318000U; - minErr = 1.e10; -- bestClock = 0U; -+ bestClock.packed = 0U; - - do { - fvco = fout * (1 << dr); -@@ -1306,30 +1324,31 @@ - } - - if (clock < 30000) -- maxdn = 6; -+ maxdn = 8; - else if (clock < 45000) -- maxdn = 5; -+ maxdn = 7; - else if (clock < 170000) -- maxdn = 4; -+ maxdn = 6; - else -- maxdn = 3; -+ maxdn = 5; - -- for (dn = 0; dn < maxdn; ++dn) { -- for (dm = 0; dm < maxdm; ++dm) { -- factual = 14318000U * (dm + 2); -- factual /= (dn + 2) << dr; -+ for (dn = 2; dn < maxdn; ++dn) { -+ for (dm = 2; dm < maxdm; ++dm) { -+ factual = 14318000U * dm; -+ factual /= dn << dr; - if ((err = fabs((double)factual / fout - 1.)) < 0.005) { - if (err < minErr) { - minErr = err; -- bestClock = ((dm & 0xff) << 16) | -- (((1 << 7) | (dr << 2) | ((dm & 0x300) >> 8)) << 8) -- | (dn & 0x7f); -+ bestClock.params.dtz = 1; -+ bestClock.params.dr = dr; -+ bestClock.params.dn = dn; -+ bestClock.params.dm = dm; - } - } - } - } - -- return bestClock; -+ return bestClock.packed; - } - - /* -@@ -1356,15 +1375,10 @@ - "ViaComputeDotClock %d : %04x : %04x\n", - mode->Clock, best1, best2)); - return best2; -- } else if (pVia->Chipset == VIA_VX855) { -- for (i = 0; ViaDotClocks[i].DotClock; i++) -- if (ViaDotClocks[i].DotClock == mode->Clock && -- ViaDotClocks[i].Chrome9HCM) -- return ViaDotClocks[i].Chrome9HCM; - } else { - for (i = 0; ViaDotClocks[i].DotClock; i++) - if (ViaDotClocks[i].DotClock == mode->Clock) -- return ViaDotClocks[i].UniChromePro; -+ return ViaDotClocks[i].UniChromePro.packed; - return ViaComputeProDotClock(mode->Clock); - } - ---- src/via_mode.h 2009-06-16 23:08:20.000000000 +0200 -+++ src/via_mode.h 2009-06-16 22:43:58.000000000 +0200 -@@ -35,7 +35,16 @@ - #define VIA_BW_DDR400 498000000 /* > 1920x1080@60Hz@32bpp */ - #define VIA_BW_DDR667 922000000 - -- -+union pllparams { -+ struct { -+ CARD32 dtz : 2; -+ CARD32 dr : 3; -+ CARD32 dn : 7; -+ CARD32 dm :10; -+ } params; -+ CARD32 packed; -+}; -+ - /* - * simple lookup table for dotclocks - * -@@ -43,57 +52,51 @@ - static struct ViaDotClock { - int DotClock; - CARD16 UniChrome; -- CARD32 UniChromePro; -- CARD32 Chrome9HCM; -+ union pllparams UniChromePro; - } ViaDotClocks[] = { -- { 25200, 0x513C, 0xa79004 }, -- { 25312, 0xC763, 0xc49005 }, -- { 26591, 0x471A, 0xce9005 }, -- { 31500, 0xC558, 0xae9003, 0xb01005 }, -- { 31704, 0x471F, 0xaf9002 }, -- { 32663, 0xC449, 0x479000 }, -- { 33750, 0x4721, 0x959002, 0x921004 }, -- { 35500, 0x5877, 0x759001 }, -- { 36000, 0x5879, 0x9f9002, 0xa11004 }, -- { 39822, 0xC459, 0x578c02 }, -- { 40000, 0x515F, 0x848c04, 0x700c05 }, -- { 41164, 0x4417, 0x2c8c00 }, -- { 46981, 0x5069, 0x678c02, 0x690c04 }, -- { 49500, 0xC353, 0xa48c04, 0x530c03 }, -- { 50000, 0xC354, 0x368c00 }, -- { 56300, 0x4F76, 0x3d8c00, 0x9d0c05 }, -- { 57284, 0x4E70, 0x3e8c00 }, -- { 64995, 0x0D3B, 0x6b8c01, 0x6d0c03 }, -- { 65000, 0x0D3B, 0x6b8c01, 0x6d0c03 }, /* Slightly unstable on PM800 */ -- { 65028, 0x866D, 0x6b8c01 }, -- { 74480, 0x156E, 0x288800, 0xd10c05 }, -- { 75000, 0x156E, 0x288800 }, -- { 78800, 0x442C, 0x2a8800, 0x6e0805 }, -- { 81135, 0x0622, 0x428801 }, -- { 81613, 0x4539, 0x708803, 0x720805 }, -- { 94500, 0x4542, 0x4d8801, 0x840805 }, -- { 108000, 0x0B53, 0x778802, 0x970805 }, -- { 108280, 0x4879, 0x778802 }, -- { 122000, 0x0D6F, 0x428800 }, -- { 122726, 0x073C, 0x878802, 0xac0805 }, -- { 135000, 0x0742, 0x6f8801, 0xbd0805}, -- { 148500, 0x0853, 0x518800, 0xd00805}, -- { 155800, 0x0857, 0x558402 }, -- { 157500, 0x422C, 0x2a8400, 0x6e0405 }, -- { 161793, 0x4571, 0x6f8403 }, -- { 162000, 0x0A71, 0x6f8403, 0x710405 }, -- { 175500, 0x4231, 0x2f8400 }, -- { 189000, 0x0542, 0x4d8401 }, -- { 202500, 0x0763, 0x6F8402, 0x8e0405 }, -- { 204800, 0x0764, 0x548401 }, -- { 218300, 0x043D, 0x3b8400, 0x990405 }, -- { 229500, 0x0660, 0x3e8400, 0xa10405 }, /* Not tested on Pro */ -- { 234000, 0, 0xa20403, 0xa40405 }, -- { 267250, 0, 0xb90403, 0xbb0405 }, -- { 297500, 0, 0xce0403, 0xd00405 }, -- { 339500, 0, 0x5d0002, 0x770005 }, -- { 340772, 0, 0x750003, 0x770005 }, -- { 0, 0, 0 } -+ { 25200, 0x513C, /* 0xa79004 */ { 1, 4, 6, 169 } }, -+ { 25312, 0xC763, /* 0xc49005 */ { 1, 4, 7, 198 } }, -+ { 26591, 0x471A, /* 0xce9005 */ { 1, 4, 7, 208 } }, -+ { 31500, 0xC558, /* 0xae9003 */ { 1, 4, 5, 176 } }, -+ { 31704, 0x471F, /* 0xaf9002 */ { 1, 4, 4, 177 } }, -+ { 32663, 0xC449, /* 0x479000 */ { 1, 4, 2, 73 } }, -+ { 33750, 0x4721, /* 0x959002 */ { 1, 4, 4, 151 } }, -+ { 35500, 0x5877, /* 0x759001 */ { 1, 4, 3, 119 } }, -+ { 36000, 0x5879, /* 0x9f9002 */ { 1, 4, 4, 161 } }, -+ { 39822, 0xC459, /* 0x578c02 */ { 1, 3, 4, 89 } }, -+ { 40000, 0x515F, /* 0x848c04 */ { 1, 3, 6, 134 } }, -+ { 41164, 0x4417, /* 0x2c8c00 */ { 1, 3, 2, 46 } }, -+ { 46981, 0x5069, /* 0x678c02 */ { 1, 3, 4, 105 } }, -+ { 49500, 0xC353, /* 0xa48c04 */ { 3, 3, 5, 138 } }, -+ { 50000, 0xC354, /* 0x368c00 */ { 1, 3, 2, 56 } }, -+ { 56300, 0x4F76, /* 0x3d8c00 */ { 1, 3, 2, 63 } }, -+ { 57284, 0x4E70, /* 0x3e8c00 */ { 1, 3, 2, 64 } }, -+ { 64995, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, -+ { 65000, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, /* Slightly unstable on PM800 */ -+ { 65028, 0x866D, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, -+ { 74480, 0x156E, /* 0x288800 */ { 1, 2, 2, 42 } }, -+ { 75000, 0x156E, /* 0x288800 */ { 1, 2, 2, 42 } }, -+ { 78800, 0x442C, /* 0x2a8800 */ { 1, 2, 2, 44 } }, -+ { 81135, 0x0622, /* 0x428801 */ { 1, 2, 3, 68 } }, -+ { 81613, 0x4539, /* 0x708803 */ { 1, 2, 5, 114 } }, -+ { 94500, 0x4542, /* 0x4d8801 */ { 1, 2, 3, 79 } }, -+ { 108000, 0x0B53, /* 0x778802 */ { 1, 2, 4, 121 } }, -+ { 108280, 0x4879, /* 0x778802 */ { 1, 2, 4, 121 } }, -+ { 122000, 0x0D6F, /* 0x428800 */ { 1, 2, 2, 68 } }, -+ { 122726, 0x073C, /* 0x878802 */ { 1, 2, 4, 137 } }, -+ { 135000, 0x0742, /* 0x6f8801 */ { 1, 2, 3, 113 } }, -+ { 148500, 0x0853, /* 0x518800 */ { 1, 2, 2, 83 } }, -+ { 155800, 0x0857, /* 0x558402 */ { 1, 1, 4, 87 } }, -+ { 157500, 0x422C, /* 0x2a8400 */ { 1, 1, 2, 44 } }, -+ { 161793, 0x4571, /* 0x6f8403 */ { 1, 1, 5, 113 } }, -+ { 162000, 0x0A71, /* 0x6f8403 */ { 1, 1, 5, 113 } }, -+ { 175500, 0x4231, /* 0x2f8400 */ { 1, 1, 2, 49 } }, -+ { 189000, 0x0542, /* 0x4d8401 */ { 1, 1, 3, 79 } }, -+ { 202500, 0x0763, /* 0x6F8402 */ { 1, 1, 4, 113 } }, -+ { 204800, 0x0764, /* 0x548401 */ { 1, 1, 3, 86 } }, -+ { 218300, 0x043D, /* 0x3b8400 */ { 1, 1, 2, 61 } }, -+ { 229500, 0x0660, /* 0x3e8400 */ { 1, 1, 2, 64 } }, /* Not tested on Pro } */ -+ { 0, 0, { 0, 0, 0, 0 } } - }; - - /* diff --git a/openchrome-0.2.903-re_enable_AGPDMA.patch b/openchrome-0.2.903-re_enable_AGPDMA.patch deleted file mode 100644 index 267cd1f..0000000 --- a/openchrome-0.2.903-re_enable_AGPDMA.patch +++ /dev/null @@ -1,17 +0,0 @@ ---- src/via_driver.c.agpdma 2008-07-01 00:32:07.000000000 +0200 -+++ src/via_driver.c 2008-08-20 23:27:34.000000000 +0200 -@@ -820,14 +820,12 @@ - pVia->DRIIrqEnable = FALSE; - break; - case VIA_K8M800: -- pVia->agpEnable = FALSE; - pVia->DRIIrqEnable = FALSE; - break; - case VIA_PM800: - pVia->VideoEngine = VIDEO_ENGINE_CME; - break; - case VIA_VM800: -- pVia->agpEnable = FALSE; - break; - case VIA_K8M890: - pVia->VideoEngine = VIDEO_ENGINE_CME; diff --git a/openchrome-0.2.903-remove_loader_symbol_lists.patch b/openchrome-0.2.903-remove_loader_symbol_lists.patch new file mode 100644 index 0000000..253743a --- /dev/null +++ b/openchrome-0.2.903-remove_loader_symbol_lists.patch @@ -0,0 +1,323 @@ +Index: src/via_driver.c +=================================================================== +--- src/via_driver.c (revision 753) ++++ src/via_driver.c (working copy) +@@ -259,184 +259,7 @@ + }; + + +-static const char *vgaHWSymbols[] = { +- "vgaHWGetHWRec", +- "vgaHWSetMmioFuncs", +- "vgaHWSetStdFuncs", +- "vgaHWGetIOBase", +- "vgaHWSave", +- "vgaHWProtect", +- "vgaHWRestore", +- "vgaHWMapMem", +- "vgaHWUnmapMem", +- "vgaHWInit", +- "vgaHWSaveScreen", +- "vgaHWLock", +- "vgaHWUnlock", +- "vgaHWFreeHWRec", +- "vgaHWGetIndex", /* Through VGAHWPTR() */ +- NULL +-}; +- +-static const char *ramdacSymbols[] = { +- "xf86InitCursor", +- "xf86CreateCursorInfoRec", +- "xf86DestroyCursorInfoRec", +- NULL +-}; +- +-static const char *vbeSymbols[] = { +- "vbeDoEDID", +- "VBEDPMSSet", +- "VBEExtendedInit", +- "vbeFree", +- "VBEGetVBEInfo", +- "VBEGetVBEMode", +- "VBEGetModePool", +- "VBEInit", +- "VBEPrintModes", +- "VBESaveRestore", +- "VBESetDisplayStart", +- "VBESetGetLogicalScanlineLength", +- "VBESetLogicalScanline", +- "VBESetModeNames", +- "VBESetModeParameters", +- "VBESetVBEMode", +- "VBEValidateModes", +- "xf86ExecX86int10", +- "xf86Int10AllocPages", +- "xf86Int10FreePages", +- NULL +-}; +- +-static const char *ddcSymbols[] = { +- "xf86PrintEDID", +- "xf86DoEDID_DDC2", +- "xf86SetDDCproperties", +- NULL +-}; +- +-static const char *i2cSymbols[] = { +- "xf86CreateI2CBusRec", +- "xf86I2CBusInit", +- "xf86CreateI2CDevRec", +- "xf86I2CDevInit", +- "xf86I2CWriteRead", +- "xf86I2CProbeAddress", +- "xf86DestroyI2CDevRec", +- "xf86I2CReadByte", +- "xf86I2CWriteByte", +- NULL +-}; +- +-static const char *xaaSymbols[] = { +-#ifdef X_HAVE_XAAGETROP +- "XAAGetCopyROP", +- "XAAGetCopyROP_PM", +- "XAAGetPatternROP", +-#else +- "XAACopyROP", +- "XAACopyROP_PM", +- "XAAPatternROP", +-#endif +- "XAACreateInfoRec", +- "XAADestroyInfoRec", +- "XAAInit", +- "XAAFillSolidRects", +- NULL +-}; +- +-static const char *exaSymbols[] = { +- "exaGetVersion", +- "exaDriverInit", +- "exaDriverFini", +- "exaOffscreenAlloc", +- "exaOffscreenFree", +- "exaGetPixmapPitch", +- "exaGetPixmapOffset", +- "exaWaitSync", +- "exaDriverAlloc", +- NULL +-}; +- +-static const char *shadowSymbols[] = { +- "ShadowFBInit", +- NULL +-}; +- +-#ifdef USE_FB +-static const char *fbSymbols[] = { +- "fbScreenInit", +- "fbPictureInit", +- NULL +-}; +-#else +-static const char *cfbSymbols[] = { +- "cfbScreenInit", +- "cfb16ScreenInit", +- "cfb24ScreenInit", +- "cfb24_32ScreenInit", +- "cfb32ScreenInit", +- "cfb16BresS", +- "cfb24BresS", +- NULL +-}; +-#endif +- + #ifdef XFree86LOADER +-#ifdef XF86DRI +-static const char *drmSymbols[] = { +- "drmAddBufs", +- "drmAddMap", +- "drmAgpAcquire", +- "drmAgpAlloc", +- "drmAgpBase", +- "drmAgpBind", +- "drmAgpDeviceId", +- "drmAgpEnable", +- "drmAgpFree", +- "drmAgpGetMode", +- "drmAgpRelease", +- "drmAgpVendorId", +- "drmCtlInstHandler", +- "drmCtlUninstHandler", +- "drmCommandNone", +- "drmCommandWrite", +- "drmCommandWriteRead", +- "drmFreeVersion", +- "drmGetInterruptFromBusID", +- "drmGetLibVersion", +- "drmGetVersion", +- "drmMap", +- "drmMapBufs", +- "drmUnmap", +- "drmUnmapBufs", +- "drmAgpUnbind", +- "drmRmMap", +- "drmCreateContext", +- "drmAuthMagic", +- "drmDestroyContext", +- "drmSetContextFlags", +- NULL +-}; +- +-static const char *driSymbols[] = { +- "DRICloseScreen", +- "DRICreateInfoRec", +- "DRIDestroyInfoRec", +- "DRIFinishScreenInit", +- "DRIGetSAREAPrivate", +- "DRILock", +- "DRIQueryVersion", +- "DRIScreenInit", +- "DRIUnlock", +- "DRIOpenConnection", +- "DRICloseConnection", +- "GlxSetVisualConfigs", +- NULL +-}; +-#endif +- + static MODULESETUPPROTO(VIASetup); + + static XF86ModuleVersionInfo VIAVersRec = { +@@ -472,24 +295,6 @@ + 0 + #endif + ); +- LoaderRefSymLists(vgaHWSymbols, +-#ifdef USE_FB +- fbSymbols, +-#else +- cfbSymbols, +-#endif +- ramdacSymbols, +- xaaSymbols, +- exaSymbols, +- shadowSymbols, +- vbeSymbols, +- i2cSymbols, +- ddcSymbols, +-#ifdef XF86DRI +- drmSymbols, +- driSymbols, +-#endif +- NULL); + + return (pointer) 1; + } else { +@@ -826,7 +631,6 @@ + vbeInfoPtr pVbe; + + if (xf86LoadSubModule(pScrn, "vbe")) { +- xf86LoaderReqSymLists(vbeSymbols, NULL); + pVbe = VBEInit(NULL, index); + ConfiguredMonitor = vbeDoEDID(pVbe, NULL); + vbeFree(pVbe); +@@ -931,7 +735,6 @@ + + #ifndef USE_FB + char *mod = NULL; +- const char *reqSym = NULL; + #endif + vgaHWPtr hwp; + int i, bMemSize = 0; +@@ -952,7 +755,6 @@ + if (!xf86LoadSubModule(pScrn, "vgahw")) + return FALSE; + +- xf86LoaderReqSymLists(vgaHWSymbols, NULL); + if (!vgaHWGetHWRec(pScrn)) + return FALSE; + +@@ -1624,7 +1426,6 @@ + VIAFreeRec(pScrn); + return FALSE; + } else { +- xf86LoaderReqSymLists(i2cSymbols, NULL); + ViaI2CInit(pScrn); + } + +@@ -1632,7 +1433,6 @@ + VIAFreeRec(pScrn); + return FALSE; + } else { +- xf86LoaderReqSymLists(ddcSymbols, NULL); + + if (pVia->pI2CBus1) { + pVia->DDC1 = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus1); +@@ -1674,7 +1474,6 @@ + /* VBE doesn't properly initialise int10 itself. */ + if (xf86LoadSubModule(pScrn, "int10") + && xf86LoadSubModule(pScrn, "vbe")) { +- xf86LoaderReqSymLists(vbeSymbols, NULL); + pVia->pVbe = VBEExtendedInit(NULL, pVia->EntityIndex, + SET_BIOS_SCRATCH | + RESTORE_BIOS_SCRATCH); +@@ -1773,22 +1572,18 @@ + return FALSE; + } + +- xf86LoaderReqSymLists(fbSymbols, NULL); + + #else + /* Load bpp-specific modules. */ + switch (pScrn->bitsPerPixel) { + case 8: + mod = "cfb"; +- reqSym = "cfbScreenInit"; + break; + case 16: + mod = "cfb16"; +- reqSym = "cfb16ScreenInit"; + break; + case 32: + mod = "cfb32"; +- reqSym = "cfb32ScreenInit"; + break; + } + +@@ -1797,7 +1592,6 @@ + return FALSE; + } + +- xf86LoaderReqSymbols(reqSym, NULL); + #endif + + if (!pVia->NoAccel) { +@@ -1814,13 +1608,11 @@ + VIAFreeRec(pScrn); + return FALSE; + } +- xf86LoaderReqSymLists(exaSymbols, NULL); + } + if (!xf86LoadSubModule(pScrn, "xaa")) { + VIAFreeRec(pScrn); + return FALSE; + } +- xf86LoaderReqSymLists(xaaSymbols, NULL); + } + + if (pVia->hwcursor) { +@@ -1828,7 +1620,6 @@ + VIAFreeRec(pScrn); + return FALSE; + } +- xf86LoaderReqSymLists(ramdacSymbols, NULL); + } + + if (pVia->shadowFB) { +@@ -1836,7 +1627,6 @@ + VIAFreeRec(pScrn); + return FALSE; + } +- xf86LoaderReqSymLists(shadowSymbols, NULL); + } + + VIAUnmapMem(pScrn); diff --git a/openchrome-0.2.903-sync_pciids.patch b/openchrome-0.2.903-sync_pciids.patch deleted file mode 100644 index 1911481..0000000 --- a/openchrome-0.2.903-sync_pciids.patch +++ /dev/null @@ -1,18 +0,0 @@ ---- src/via_id.c -+++ src/via_id.c -@@ -158,6 +158,7 @@ - {"Asustek P5V800-MX", VIA_VM800, 0x3344, 0x1122, VIA_DEVICE_CRT}, - - /*** K8M890 ***/ -+ {"IBM AnyPlace Kiosk 3xx", VIA_K8M890, 0x1106, 0x3230, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, - {"Asustek A8V-VM", VIA_K8M890, 0x1043, 0x81B5, VIA_DEVICE_CRT}, - {"Asustek M2V-MX SE", VIA_K8M890, 0x1043, 0x8297, VIA_DEVICE_CRT}, - {"Foxconn K8M890M2MA-RS2H", VIA_K8M890, 0x105B, 0x0C84, VIA_DEVICE_CRT}, -@@ -196,6 +197,7 @@ - {"Samsung Q1B", VIA_CX700, 0x144D, 0xC02C, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, - {"FIC CE260", VIA_CX700, 0x1509, 0x2D30, VIA_DEVICE_LCD}, - {"FIC CE261", VIA_CX700, 0x1509, 0x2F07, VIA_DEVICE_LCD}, -+ {"Gigabyte M704 / RoverPC A700GQ", VIA_CX700, 0x161F, 0x2060, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, - {"Packard Bell EasyNote XS", VIA_CX700, 0x1631, 0xC201, VIA_DEVICE_LCD}, /* aka Everex Cloudbook CE1200V */ - - /*** P4M890, VN890 ***/ diff --git a/openchrome-0.2.903-vx855_support.patch b/openchrome-0.2.903-vx855_support.patch deleted file mode 100644 index 06749a7..0000000 --- a/openchrome-0.2.903-vx855_support.patch +++ /dev/null @@ -1,678 +0,0 @@ -Index: src/via_id.h -=================================================================== ---- src/via_id.h (revision 751) -+++ src/via_id.h (working copy) -@@ -38,6 +38,7 @@ - VIA_CX700, - VIA_P4M890, - VIA_VX800, -+ VIA_VX855, - VIA_LAST - }; - -@@ -54,6 +55,7 @@ - #define PCI_CHIP_VT3324 0x3157 /* CX700 */ - #define PCI_CHIP_VT3327 0x3343 /* P4M890 */ - #define PCI_CHIP_VT3353 0x1122 /* VX800 */ -+#define PCI_CHIP_VT3409 0x5122 /* VX855/VX875 */ - - /* There is some conflicting information about the two major revisions of - * the CLE266, often labelled Ax and Cx. The dividing line seems to be -Index: src/via_video.c -=================================================================== ---- src/via_video.c (revision 751) -+++ src/via_video.c (working copy) -@@ -277,6 +277,7 @@ - pVia->ChipId != PCI_CHIP_VT3314 && - pVia->ChipId != PCI_CHIP_VT3327 && - pVia->ChipId != PCI_CHIP_VT3336 && -+ pVia->ChipId != PCI_CHIP_VT3409 && - pVia->ChipId != PCI_CHIP_VT3364 && - pVia->ChipId != PCI_CHIP_VT3324 && - pVia->ChipId != PCI_CHIP_VT3353) { -Index: src/via_mode.c -=================================================================== ---- src/via_mode.c (revision 751) -+++ src/via_mode.c (working copy) -@@ -371,17 +371,20 @@ - } - } - -- if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) { -- -- if (ViaDFPDetect(pScrn)) { -- pBIOSInfo->DfpPresent = TRUE; -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, -- "DFP is connected.\n"); -- } else { -- pBIOSInfo->DfpPresent = FALSE; -- xf86DrvMsg(pScrn->scrnIndex, X_INFO, -- "DFP is disconnected.\n"); -- } -+ switch (pVia->Chipset) { -+ case VIA_CX700: -+ case VIA_VX800: -+ case VIA_VX855: -+ if (ViaDFPDetect(pScrn)) { -+ pBIOSInfo->DfpPresent = TRUE; -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "DFP is connected.\n"); -+ } else { -+ pBIOSInfo->DfpPresent = FALSE; -+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, -+ "DFP is disconnected.\n"); -+ } -+ break; - } - } - -@@ -496,8 +499,14 @@ - pBIOSInfo->FirstCRTC->IsActive = TRUE ; - if (pBIOSInfo->Panel->IsActive) { - pVia->pBIOSInfo->SecondCRTC->IsActive = TRUE ; -- if (pVia->Chipset == VIA_P4M900 || pVia->Chipset == VIA_CX700 || pVia->Chipset == VIA_VX800 ) -- pVia->pBIOSInfo->Lvds->IsActive = TRUE ; -+ switch (pVia->Chipset) { -+ case VIA_P4M900: -+ case VIA_CX700: -+ case VIA_VX800: -+ case VIA_VX855: -+ pVia->pBIOSInfo->Lvds->IsActive = TRUE ; -+ break; -+ } - } - } - -@@ -1347,6 +1356,11 @@ - "ViaComputeDotClock %d : %04x : %04x\n", - mode->Clock, best1, best2)); - return best2; -+ } else if (pVia->Chipset == VIA_VX855) { -+ for (i = 0; ViaDotClocks[i].DotClock; i++) -+ if (ViaDotClocks[i].DotClock == mode->Clock && -+ ViaDotClocks[i].Chrome9HCM) -+ return ViaDotClocks[i].Chrome9HCM; - } else { - for (i = 0; ViaDotClocks[i].DotClock; i++) - if (ViaDotClocks[i].DotClock == mode->Clock) -Index: src/via_mode.h -=================================================================== ---- src/via_mode.h (revision 751) -+++ src/via_mode.h (working copy) -@@ -44,49 +44,55 @@ - int DotClock; - CARD16 UniChrome; - CARD32 UniChromePro; -+ CARD32 Chrome9HCM; - } ViaDotClocks[] = { - { 25200, 0x513C, 0xa79004 }, - { 25312, 0xC763, 0xc49005 }, - { 26591, 0x471A, 0xce9005 }, -- { 31500, 0xC558, 0xae9003 }, -+ { 31500, 0xC558, 0xae9003, 0xb01005 }, - { 31704, 0x471F, 0xaf9002 }, - { 32663, 0xC449, 0x479000 }, -- { 33750, 0x4721, 0x959002 }, -+ { 33750, 0x4721, 0x959002, 0x921004 }, - { 35500, 0x5877, 0x759001 }, -- { 36000, 0x5879, 0x9f9002 }, -+ { 36000, 0x5879, 0x9f9002, 0xa11004 }, - { 39822, 0xC459, 0x578c02 }, -- { 40000, 0x515F, 0x848c04 }, -+ { 40000, 0x515F, 0x848c04, 0x700c05 }, - { 41164, 0x4417, 0x2c8c00 }, -- { 46981, 0x5069, 0x678c02 }, -- { 49500, 0xC353, 0xa48c04 }, -+ { 46981, 0x5069, 0x678c02, 0x690c04 }, -+ { 49500, 0xC353, 0xa48c04, 0x530c03 }, - { 50000, 0xC354, 0x368c00 }, -- { 56300, 0x4F76, 0x3d8c00 }, -+ { 56300, 0x4F76, 0x3d8c00, 0x9d0c05 }, - { 57284, 0x4E70, 0x3e8c00 }, -- { 64995, 0x0D3B, 0x6b8c01 }, -- { 65000, 0x0D3B, 0x6b8c01 }, /* Slightly unstable on PM800 */ -+ { 64995, 0x0D3B, 0x6b8c01, 0x6d0c03 }, -+ { 65000, 0x0D3B, 0x6b8c01, 0x6d0c03 }, /* Slightly unstable on PM800 */ - { 65028, 0x866D, 0x6b8c01 }, -- { 74480, 0x156E, 0x288800 }, -+ { 74480, 0x156E, 0x288800, 0xd10c05 }, - { 75000, 0x156E, 0x288800 }, -- { 78800, 0x442C, 0x2a8800 }, -+ { 78800, 0x442C, 0x2a8800, 0x6e0805 }, - { 81135, 0x0622, 0x428801 }, -- { 81613, 0x4539, 0x708803 }, -- { 94500, 0x4542, 0x4d8801 }, -- { 108000, 0x0B53, 0x778802 }, -+ { 81613, 0x4539, 0x708803, 0x720805 }, -+ { 94500, 0x4542, 0x4d8801, 0x840805 }, -+ { 108000, 0x0B53, 0x778802, 0x970805 }, - { 108280, 0x4879, 0x778802 }, - { 122000, 0x0D6F, 0x428800 }, -- { 122726, 0x073C, 0x878802 }, -- { 135000, 0x0742, 0x6f8801 }, -- { 148500, 0x0853, 0x518800 }, -+ { 122726, 0x073C, 0x878802, 0xac0805 }, -+ { 135000, 0x0742, 0x6f8801, 0xbd0805}, -+ { 148500, 0x0853, 0x518800, 0xd00805}, - { 155800, 0x0857, 0x558402 }, -- { 157500, 0x422C, 0x2a8400 }, -+ { 157500, 0x422C, 0x2a8400, 0x6e0405 }, - { 161793, 0x4571, 0x6f8403 }, -- { 162000, 0x0A71, 0x6f8403 }, -+ { 162000, 0x0A71, 0x6f8403, 0x710405 }, - { 175500, 0x4231, 0x2f8400 }, - { 189000, 0x0542, 0x4d8401 }, -- { 202500, 0x0763, 0x6F8402 }, -+ { 202500, 0x0763, 0x6F8402, 0x8e0405 }, - { 204800, 0x0764, 0x548401 }, -- { 218300, 0x043D, 0x3b8400 }, -- { 229500, 0x0660, 0x3e8400 }, /* Not tested on Pro */ -+ { 218300, 0x043D, 0x3b8400, 0x990405 }, -+ { 229500, 0x0660, 0x3e8400, 0xa10405 }, /* Not tested on Pro */ -+ { 234000, 0, 0xa20403, 0xa40405 }, -+ { 267250, 0, 0xb90403, 0xbb0405 }, -+ { 297500, 0, 0xce0403, 0xd00405 }, -+ { 339500, 0, 0x5d0002, 0x770005 }, -+ { 340772, 0, 0x750003, 0x770005 }, - { 0, 0, 0 } - }; - -Index: src/via_driver.c -=================================================================== ---- src/via_driver.c (revision 751) -+++ src/via_driver.c (working copy) -@@ -128,6 +128,7 @@ - VIA_DEVICE_MATCH (PCI_CHIP_VT3324, 0 ), - VIA_DEVICE_MATCH (PCI_CHIP_VT3327, 0 ), - VIA_DEVICE_MATCH (PCI_CHIP_VT3353, 0 ), -+ VIA_DEVICE_MATCH (PCI_CHIP_VT3409, 0 ), - { 0, 0, 0 }, - }; - -@@ -164,6 +165,7 @@ - {VIA_CX700, "CX700/VX700"}, - {VIA_P4M890, "P4M890"}, - {VIA_VX800, "VX800"}, -+ {VIA_VX855, "VX855"}, - {-1, NULL } - }; - -@@ -179,6 +181,7 @@ - {VIA_CX700, PCI_CHIP_VT3324, RES_SHARED_VGA}, - {VIA_P4M890, PCI_CHIP_VT3327, RES_SHARED_VGA}, - {VIA_VX800, PCI_CHIP_VT3353, RES_SHARED_VGA}, -+ {VIA_VX855, PCI_CHIP_VT3409, RES_SHARED_VGA}, - {-1, -1, RES_UNDEFINED} - }; - -@@ -908,6 +911,7 @@ - pVia->UseLegacyModeSwitch = FALSE; - break; - case VIA_VX800: -+ case VIA_VX855: - pVia->VideoEngine = VIDEO_ENGINE_CME; - /* pVia->agpEnable = FALSE; - pVia->dmaXV = FALSE;*/ -@@ -1180,6 +1184,7 @@ - case VIA_P4M900: - case VIA_CX700: - case VIA_VX800: -+ case VIA_VX855: - #ifdef XSERVER_LIBPCIACCESS - pci_device_cfg_read_u8(vgaDevice, &videoRam, 0xA1); - #else -@@ -1926,8 +1931,16 @@ - viaAccelSync(pScrn); - - /* A soft reset helps to avoid a 3D hang on VT switch. */ -- if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900 && pVia->Chipset != VIA_VX800) -- hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); -+ switch (pVia->Chipset) { -+ case VIA_K8M890: -+ case VIA_P4M900: -+ case VIA_VX800: -+ case VIA_VX855: -+ break; -+ default: -+ hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); -+ break; -+ } - - #ifdef XF86DRI - if (pVia->directRenderingEnabled) { -@@ -2103,8 +2116,13 @@ - } - - /* Save TMDS status */ -- if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) -- Regs->CRD2 = hwp->readCrtc(hwp, 0xD2); -+ switch (pVia->Chipset) { -+ case VIA_CX700: -+ case VIA_VX800: -+ case VIA_VX855: -+ Regs->CRD2 = hwp->readCrtc(hwp, 0xD2); -+ break; -+ } - - vgaHWProtect(pScrn, FALSE); - } -@@ -2219,8 +2237,13 @@ - } - - /* Restore TMDS status */ -- if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) -- hwp->writeCrtc(hwp, 0xD2, Regs->CRD2); -+ switch (pVia->Chipset) { -+ case VIA_CX700: -+ case VIA_VX800: -+ case VIA_VX855: -+ hwp->writeCrtc(hwp, 0xD2, Regs->CRD2); -+ break; -+ } - - if (pBIOSInfo->Panel->IsActive) - ViaLCDPower(pScrn, TRUE); -@@ -2245,6 +2268,7 @@ - case VIA_CX700: - case VIA_P4M900: - case VIA_VX800: -+ case VIA_VX855: - ViaSeqMask(hwp, 0x1A, 0x08, 0x08); - break; - default: -@@ -2267,6 +2291,7 @@ - case VIA_CX700: - case VIA_P4M900: - case VIA_VX800: -+ case VIA_VX855: - ViaSeqMask(hwp, 0x1A, 0x00, 0x08); - break; - default: -@@ -2956,13 +2981,19 @@ - * to detect when the display is using the secondary head. - * TODO: This should be enabled for other chipsets as well. - */ -- if ((pVia->Chipset == VIA_P4M900 || pVia->Chipset == VIA_VX800) && pVia->pBIOSInfo->Panel->IsActive) { -- /* -- * Since we are using virtual, we need to adjust -- * the offset to match the framebuffer alignment. -- */ -- if (pScrn->displayWidth != mode->CrtcHDisplay) -- ViaSecondCRTCHorizontalOffset(pScrn); -+ if (pVia->pBIOSInfo->Panel->IsActive) { -+ switch (pVia->Chipset) { -+ case VIA_P4M900: -+ case VIA_VX800: -+ case VIA_VX855: -+ /* -+ * Since we are using virtual, we need to adjust -+ * the offset to match the framebuffer alignment. -+ */ -+ if (pScrn->displayWidth != mode->CrtcHDisplay) -+ ViaSecondCRTCHorizontalOffset(pScrn); -+ break; -+ } - } - } - -@@ -2996,9 +3027,16 @@ - viaAccelSync(pScrn); - - /* A soft reset avoids a 3D hang after X restart. */ -- if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900 && -- pVia->Chipset != VIA_VX800) -- hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); -+ switch (pVia->Chipset) { -+ case VIA_K8M890: -+ case VIA_P4M900: -+ case VIA_VX800: -+ case VIA_VX855: -+ break; -+ default : -+ hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); -+ break; -+ } - - if (!pVia->IsSecondary) { - /* Turn off all video activities. */ -Index: src/via_crtc.c -=================================================================== ---- src/via_crtc.c (revision 751) -+++ src/via_crtc.c (working copy) -@@ -173,6 +173,7 @@ - case VIA_CX700: - case VIA_P4M900: - case VIA_VX800: -+ case VIA_VX855: - break; - default: - ViaSeqMask(hwp, 0x16, 0x08, 0xBF); -@@ -276,6 +277,7 @@ - case VIA_CX700: - case VIA_P4M900: - case VIA_VX800: -+ case VIA_VX855: - break; - default: - /* some leftovers */ -@@ -310,6 +312,7 @@ - case VIA_CX700: - case VIA_P4M900: - case VIA_VX800: -+ case VIA_VX855: - break; - default: - /* some leftovers */ -@@ -429,6 +432,7 @@ - case VIA_CX700: - case VIA_P4M900: - case VIA_VX800: -+ case VIA_VX855: - break; - default: - ViaSeqMask(hwp, 0x16, 0x08, 0xBF); -@@ -512,6 +516,7 @@ - case VIA_CX700: - case VIA_P4M900: - case VIA_VX800: -+ case VIA_VX855: - break; - default: - /* some leftovers */ -Index: src/via_swov.c -=================================================================== ---- src/via_swov.c (revision 751) -+++ src/via_swov.c (working copy) -@@ -282,6 +282,7 @@ - HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE; - break; - case VIA_VX800: -+ case VIA_VX855: - HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE; - HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE; - HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE; -@@ -784,6 +785,7 @@ - case PCI_CHIP_VT3324: - case PCI_CHIP_VT3327: - case PCI_CHIP_VT3353: -+ case PCI_CHIP_VT3409: - model = 0; - break; - case PCI_CHIP_CLE3122: -@@ -922,6 +924,7 @@ - case PCI_CHIP_VT3324: - case PCI_CHIP_VT3364: - case PCI_CHIP_VT3353: -+ case PCI_CHIP_VT3409: - case PCI_CHIP_CLE3122: - VIDOutD(V1_ColorSpaceReg_2, col2); - VIDOutD(V1_ColorSpaceReg_1, col1); -@@ -951,6 +954,7 @@ - case PCI_CHIP_VT3324: - case PCI_CHIP_VT3364: - case PCI_CHIP_VT3353: -+ case PCI_CHIP_VT3409: - return (VIDEO_HQV_INUSE | SW_USE_HQV | VIDEO_1_INUSE - | VIDEO_ACTIVE | VIDEO_SHOW); - case PCI_CHIP_CLE3122: -@@ -990,6 +994,8 @@ - case PCI_CHIP_VT3364: - case PCI_CHIP_VT3353: - return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3336; -+ case PCI_CHIP_VT3409: -+ return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3409; - case PCI_CHIP_CLE3122: - if (CLE266_REV_IS_CX(pVia->ChipRev)) - return V3_ENABLE | V3_EXPIRE_NUM_F; -@@ -1269,24 +1275,28 @@ - static void - SetFIFO_V3(VIAPtr pVia, CARD8 depth, CARD8 prethreshold, CARD8 threshold) - { -- if ((pVia->ChipId == PCI_CHIP_VT3314) -- || (pVia->ChipId == PCI_CHIP_VT3324) -- || (pVia->ChipId == PCI_CHIP_VT3327 -- || (pVia->ChipId == PCI_CHIP_VT3353))) { -- SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, -- (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) -- | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); -- SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, -- (VIDInD(ALPHA_V3_PREFIFO_CONTROL) -- & ~V3_FIFO_MASK_3314) | (prethreshold & 0xff)); -- } else { -- SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, -- (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) -- | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); -- SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, -- (VIDInD(ALPHA_V3_PREFIFO_CONTROL) & ~V3_FIFO_MASK) -- | (prethreshold & 0x7f)); -- } -+ switch (pVia->ChipId) { -+ case PCI_CHIP_VT3314: -+ case PCI_CHIP_VT3324: -+ case PCI_CHIP_VT3327: -+ case PCI_CHIP_VT3353: -+ case PCI_CHIP_VT3409: -+ SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, -+ (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) -+ | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); -+ SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, -+ (VIDInD(ALPHA_V3_PREFIFO_CONTROL) -+ & ~V3_FIFO_MASK_3314) | (prethreshold & 0xff)); -+ break; -+ default : -+ SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, -+ (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) -+ | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); -+ SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, -+ (VIDInD(ALPHA_V3_PREFIFO_CONTROL) & ~V3_FIFO_MASK) -+ | (prethreshold & 0x7f)); -+ break; -+ } - } - - static void -@@ -1335,6 +1345,7 @@ - case PCI_CHIP_VT3324: - case PCI_CHIP_VT3364: - case PCI_CHIP_VT3353: -+ case PCI_CHIP_VT3409: - SetFIFO_V3(pVia, 225, 200, 250); - break; - case PCI_CHIP_VT3204: -@@ -1367,6 +1378,7 @@ - case PCI_CHIP_VT3324: - case PCI_CHIP_VT3364: - case PCI_CHIP_VT3353: -+ case PCI_CHIP_VT3409: - SetFIFO_V3(pVia, 225, 200, 250); - break; - case PCI_CHIP_VT3204: -@@ -2011,7 +2023,7 @@ - if (pVia->VideoEngine == VIDEO_ENGINE_CME) { - VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL1,0); - VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL3,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1)); -- if (pVia->Chipset == VIA_VX800) { -+ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) { - VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL2,0); - VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL4,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1)); - } -Index: src/via_bandwidth.c -=================================================================== ---- src/via_bandwidth.c (revision 751) -+++ src/via_bandwidth.c (working copy) -@@ -244,6 +244,11 @@ - hwp->writeSeq(hwp, 0x18, 0x26); /* 152/4 = 38 */ - hwp->writeSeq(hwp, 0x22, 0x10); /* 64/4 = 16 */ - break; -+ case VIA_VX855: -+ hwp->writeSeq(hwp, 0x16, 0x50); /* 320/4 = 80 */ -+ hwp->writeSeq(hwp, 0x17, 0xC7); /* 400/2-1 = 199 */ -+ hwp->writeSeq(hwp, 0x18, 0x50); /* 320/4 = 80 */ -+ hwp->writeSeq(hwp, 0x22, 0x28); /* 160/4 = 40 */ - default: - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetPrimaryFIFO: " - "Chipset %d not implemented\n", pVia->Chipset); -@@ -412,6 +417,8 @@ - else - ViaCrtcMask(hwp, 0x94, 0x20, 0x7F); - break; -+ case VIA_VX855: -+ break; - default: - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetSecondaryFIFO: " - "Chipset %d not implemented\n", pVia->Chipset); -Index: src/via_accel.c -=================================================================== ---- src/via_accel.c (revision 751) -+++ src/via_accel.c (working copy) -@@ -195,6 +195,7 @@ - */ - switch (pVia->Chipset) { - case VIA_VX800: -+ case VIA_VX855: - while ((VIAGETREG(VIA_REG_STATUS) & - (VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5)) - && (loop++ < MAXLOOP)) ; -@@ -471,7 +472,7 @@ - VIASETREG(i, 0x0); - } - -- if (pVia->Chipset == VIA_VX800) { -+ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) { - for (i = 0x44; i < 0x5c; i += 4) { - VIASETREG(i, 0x0); - } -@@ -480,6 +481,7 @@ - /* Make the VIA_REG() macro magic work */ - switch (pVia->Chipset) { - case VIA_VX800: -+ case VIA_VX855: - pVia->TwodRegs = via_2d_regs_m1; - break; - default: -@@ -527,6 +529,7 @@ - - switch (pVia->Chipset) { - case VIA_VX800: -+ case VIA_VX855: - while ((VIAGETREG(VIA_REG_STATUS) & - (VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5 | VIA_3D_ENG_BUSY_H5)) - && (loop++ < MAXLOOP)) ; -@@ -587,7 +590,7 @@ - unsigned val = (dstPitch >> 3) << 16 | (srcPitch >> 3); - RING_VARS; - -- if (pVia->Chipset != VIA_VX800) { -+ if (pVia->Chipset != VIA_VX800 && pVia->Chipset != VIA_VX855) { - val |= VIA_PITCH_ENABLE; - } - OUT_RING_H1(VIA_REG(pVia, PITCH), val); -@@ -1289,17 +1292,23 @@ - * test with x11perf -shmput500! - */ - -- if (pVia->Chipset != VIA_K8M800 && -- pVia->Chipset != VIA_K8M890 && -- pVia->Chipset != VIA_P4M900 && -- pVia->Chipset != VIA_VX800) -- xaaptr->ImageWriteFlags |= NO_GXCOPY; -+ switch (pVia->Chipset) { -+ case VIA_K8M800: -+ case VIA_K8M890: -+ case VIA_P4M900: -+ case VIA_VX800: -+ case VIA_VX855: -+ break; -+ default: -+ xaaptr->ImageWriteFlags |= NO_GXCOPY; -+ break; -+ } - - xaaptr->SetupForImageWrite = viaSetupForImageWrite; - xaaptr->SubsequentImageWriteRect = viaSubsequentImageWriteRect; - xaaptr->ImageWriteBase = pVia->BltBase; - -- if (pVia->Chipset == VIA_VX800) -+ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) - xaaptr->ImageWriteRange = VIA_MMIO_BLTSIZE; - else - xaaptr->ImageWriteRange = (64 * 1024); -Index: src/via_cursor.c -=================================================================== ---- src/via_cursor.c (revision 751) -+++ src/via_cursor.c (working copy) -@@ -97,6 +97,7 @@ - case VIA_P4M890: - case VIA_P4M900: - case VIA_VX800: -+ case VIA_VX855: - if (pVia->pBIOSInfo->FirstCRTC->IsActive) { - pVia->CursorRegControl = VIA_REG_HI_CONTROL0; - pVia->CursorRegBase = VIA_REG_HI_BASE0; -@@ -164,6 +165,7 @@ - case VIA_P4M890: - case VIA_P4M900: - case VIA_VX800: -+ case VIA_VX855: - if (pVia->pBIOSInfo->FirstCRTC->IsActive) { - VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, 0x00FFFFFF); - VIASETREG(VIA_REG_V327_HI_INVTCOLOR, 0x00FFFFFF); -@@ -222,6 +224,7 @@ - case VIA_P4M890: - case VIA_P4M900: - case VIA_VX800: -+ case VIA_VX855: - if (pVia->pBIOSInfo->FirstCRTC->IsActive) { - pVia->CursorPrimHiInvtColor = VIAGETREG(VIA_REG_PRIM_HI_INVTCOLOR); - pVia->CursorV327HiInvtColor = VIAGETREG(VIA_REG_V327_HI_INVTCOLOR); -@@ -261,6 +264,7 @@ - case VIA_P4M890: - case VIA_P4M900: - case VIA_VX800: -+ case VIA_VX855: - if (pVia->pBIOSInfo->FirstCRTC->IsActive) { - VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, pVia->CursorPrimHiInvtColor); - VIASETREG(VIA_REG_V327_HI_INVTCOLOR, pVia->CursorV327HiInvtColor); -Index: src/via_xvmc.c -=================================================================== ---- src/via_xvmc.c (revision 751) -+++ src/via_xvmc.c (working copy) -@@ -322,6 +322,7 @@ - if ((pVia->Chipset == VIA_KM400) || - (pVia->Chipset == VIA_CX700) || - (pVia->Chipset == VIA_VX800) || -+ (pVia->Chipset == VIA_VX855) || - (pVia->Chipset == VIA_K8M890) || - (pVia->Chipset == VIA_P4M900)) { - xf86DrvMsg(pScrn->scrnIndex, X_WARNING, -Index: src/via.h -=================================================================== ---- src/via.h (revision 751) -+++ src/via.h (working copy) -@@ -327,6 +327,12 @@ - #define VIDEO_FIFO_PRETHRESHOLD_VT3336 250 - #define VIDEO_EXPIRE_NUM_VT3336 31 - -+/* Those values are only valid for IGA1 */ -+#define VIDEO_FIFO_DEPTH_VT3409 400 -+#define VIDEO_FIFO_THRESHOLD_VT3409 320 -+#define VIDEO_FIFO_PRETHRESHOLD_VT3409 230 -+#define VIDEO_EXPIRE_NUM_VT3409 160 -+ - /* ALPHA_V3_FIFO_CONTROL 0x278 - * IA2 has 32 level FIFO for packet mode video format - * 32 level FIFO for planar mode video YV12. with extension reg 230 bit 21 enable -Index: src/via_id.c -=================================================================== ---- src/via_id.c (revision 751) -+++ src/via_id.c (working copy) -@@ -222,6 +222,9 @@ - {"Samsung NC20", VIA_VX800, 0x144d, 0xc04e, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, - {"Quanta DreamBook Light IL1", VIA_VX800, 0x152d, 0x0771, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, - -+ /*** VX855 ***/ -+ {"VIA VT8562C", VIA_VX855, 0x1106, 0x5122, VIA_DEVICE_CRT}, -+ - /* keep this */ - {NULL, VIA_UNKNOWN, 0x0000, 0x0000, VIA_DEVICE_NONE} - }; diff --git a/openchrome-vt1625.patch b/openchrome-vt1625.patch new file mode 100644 index 0000000..e4cc9f9 --- /dev/null +++ b/openchrome-vt1625.patch @@ -0,0 +1,429 @@ +Index: src/via_mode.c +=================================================================== +--- src/via_mode.c (revision 758) ++++ src/via_mode.c (working copy) +@@ -250,6 +250,10 @@ ViaTVSetMode(ScrnInfoPtr pScrn, DisplayModePtr mod + + if (pBIOSInfo->TVModeCrtc) + pBIOSInfo->TVModeCrtc(pScrn, mode); ++ ++ /* TV reset. */ ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x1D, 0x00); ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x1D, 0x80); + } + + void +@@ -491,6 +495,8 @@ ViaOutputsSelect(ScrnInfoPtr pScrn) + pBIOSInfo->CrtPresent = TRUE; + pBIOSInfo->CrtActive = TRUE; + } ++ if (pBIOSInfo->TVActive) ++ pBIOSInfo->FirstCRTC->IsActive = TRUE ; + } + if (!pVia->UseLegacyModeSwitch) { + if (pBIOSInfo->CrtActive) +@@ -1693,6 +1699,13 @@ ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode) + ViaDisplaySetStreamOnDFP(pScrn, TRUE); + ViaDFPPower(pScrn, TRUE); + } ++ ++ if (pBIOSInfo->TVActive) { ++ /* TV on FirstCrtc */ ++ ViaDisplaySetStreamOnDVO(pScrn, pBIOSInfo->TVDIPort, TRUE); ++ ViaDisplayEnableDVO(pScrn, pBIOSInfo->TVDIPort); ++ ViaTVSetMode(pScrn, mode); ++ } + + ViaModeFirstCRTC(pScrn, mode); + } else { +Index: src/via_driver.c +=================================================================== +--- src/via_driver.c (revision 758) ++++ src/via_driver.c (working copy) +@@ -211,6 +211,7 @@ typedef enum + OPTION_TVDOTCRAWL, + OPTION_TVTYPE, + OPTION_TVOUTPUT, ++ OPTION_TVDIPORT, + OPTION_DISABLEVQ, + OPTION_DISABLEIRQ, + OPTION_TVDEFLICKER, +@@ -249,6 +250,7 @@ static OptionInfoRec VIAOptions[] = { + {OPTION_TVDEFLICKER, "TVDeflicker", OPTV_INTEGER, {0}, FALSE}, + {OPTION_TVTYPE, "TVType", OPTV_ANYSTR, {0}, FALSE}, + {OPTION_TVOUTPUT, "TVOutput", OPTV_ANYSTR, {0}, FALSE}, ++ {OPTION_TVDIPORT, "TVPort", OPTV_ANYSTR, {0}, FALSE}, + {OPTION_DISABLEVQ, "DisableVQ", OPTV_BOOLEAN, {0}, FALSE}, + {OPTION_DISABLEIRQ, "DisableIRQ", OPTV_BOOLEAN, {0}, FALSE}, + {OPTION_AGP_DMA, "EnableAGPDMA", OPTV_BOOLEAN, {0}, FALSE}, +@@ -840,6 +842,7 @@ static Bool + VIASetupDefaultOptions(ScrnInfoPtr pScrn) + { + VIAPtr pVia = VIAPTR(pScrn); ++ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; + + DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIASetupDefaultOptions\n")); + +@@ -890,6 +893,7 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn) + pVia->agpEnable = FALSE; + pVia->dmaXV = FALSE; + pVia->UseLegacyModeSwitch = FALSE; ++ pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP0; + break; + case VIA_P4M900: + pVia->VideoEngine = VIDEO_ENGINE_CME; +@@ -898,17 +902,20 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn) + /* FIXME: this needs to be tested */ + pVia->dmaXV = FALSE; + pVia->UseLegacyModeSwitch = FALSE; ++ pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP0; + break; + case VIA_CX700: + pVia->VideoEngine = VIDEO_ENGINE_CME; + pVia->swov.maxWInterp = 1920; + pVia->swov.maxHInterp = 1080; + pVia->UseLegacyModeSwitch = FALSE; ++ pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP1; + break; + case VIA_P4M890: + pVia->VideoEngine = VIDEO_ENGINE_CME; + pVia->dmaXV = FALSE; + pVia->UseLegacyModeSwitch = FALSE; ++ pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP1; + break; + case VIA_VX800: + case VIA_VX855: +@@ -916,6 +923,7 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn) + /* pVia->agpEnable = FALSE; + pVia->dmaXV = FALSE;*/ + pVia->UseLegacyModeSwitch = FALSE; ++ pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP1; + break; + } + +@@ -1540,6 +1548,30 @@ VIAPreInit(ScrnInfoPtr pScrn, int flags) + "No default TV output signal type is set.\n"); + } + ++ /* TV DI Port */ ++ if ((s = xf86GetOptValString(VIAOptions, OPTION_TVDIPORT))) { ++ if (!xf86NameCmp(s, "DVP0")) { ++ pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP0; ++ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, ++ "TV Output Port is DVP0.\n"); ++ } else if (!xf86NameCmp(s, "DVP1")) { ++ pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP1; ++ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, ++ "TV Output Port is DVP1.\n"); ++ } else if (!xf86NameCmp(s, "DFPHigh")) { ++ pBIOSInfo->TVDIPort = VIA_DI_PORT_DFPHIGH; ++ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, ++ "TV Output Port is DFPHigh.\n"); ++ } else if (!xf86NameCmp(s, "DFPLow")) { ++ pBIOSInfo->TVDIPort = VIA_DI_PORT_DFPLOW; ++ xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, ++ "TV Output Port is DFPLow.\n"); ++ } ++ } else { ++ xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT, ++ "No default TV output port is set.\n"); ++ } ++ + VIAVidHWDiffInit(pScrn); + + /* maybe throw in some more sanity checks here */ +Index: src/via_crtc.c +=================================================================== +--- src/via_crtc.c (revision 758) ++++ src/via_crtc.c (working copy) +@@ -304,7 +304,8 @@ ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayMode + temp += 0x03; + temp &= ~0x03; + } +- hwp->writeSeq(hwp, 0x1C, (temp >> 1) & 0xFF); ++ ++ hwp->writeSeq(hwp, 0x1C, ((temp >> 1)+1) & 0xFF); + ViaSeqMask(hwp, 0x1D, temp >> 9, 0x03); + + switch (pVia->ChipId) { +Index: src/via_bios.h +=================================================================== +--- src/via_bios.h (revision 758) ++++ src/via_bios.h (working copy) +@@ -98,6 +98,13 @@ + #define VIA_DI_12BIT 0x00 + #define VIA_DI_24BIT 0x01 + ++/* Digital Port */ ++#define VIA_DI_PORT_NONE 0x0 ++#define VIA_DI_PORT_DVP0 0x1 ++#define VIA_DI_PORT_DVP1 0x2 ++#define VIA_DI_PORT_DFPLOW 0x4 ++#define VIA_DI_PORT_DFPHIGH 0x8 ++ + typedef struct ViaPanelMode { + int Width ; + int Height ; +@@ -187,6 +194,7 @@ typedef struct _VIABIOSINFO { + int TVDeflicker; + CARD8 TVRegs[0xFF]; + int TVNumRegs; ++ int TVDIPort; + + /* TV Callbacks */ + void (*TVSave) (ScrnInfoPtr pScrn); +Index: src/via_display.c +=================================================================== +--- src/via_display.c (revision 758) ++++ src/via_display.c (working copy) +@@ -111,6 +111,38 @@ ViaDisplayDisableCRT(ScrnInfoPtr pScrn) + ViaCrtcMask(hwp, 0x36, 0x30, 0x30); + } + ++void ++ViaDisplayEnableDVO(ScrnInfoPtr pScrn, int port) ++{ ++ vgaHWPtr hwp = VGAHWPTR(pScrn); ++ ++ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplayEnableDVO\n")); ++ switch (port) { ++ case VIA_DI_PORT_DVP0: ++ ViaSeqMask(hwp, 0x1E, 0xC0, 0xC0); ++ break; ++ case VIA_DI_PORT_DVP1: ++ ViaSeqMask(hwp, 0x1E, 0x30, 0x30); ++ break; ++ } ++} ++ ++void ++ViaDisplayDisableDVO(ScrnInfoPtr pScrn, int port) ++{ ++ vgaHWPtr hwp = VGAHWPTR(pScrn); ++ ++ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplayEnableDVO\n")); ++ switch (port) { ++ case VIA_DI_PORT_DVP0: ++ ViaSeqMask(hwp, 0x1E, 0x00, 0xC0); ++ break; ++ case VIA_DI_PORT_DVP1: ++ ViaSeqMask(hwp, 0x1E, 0x00, 0x30); ++ break; ++ } ++} ++ + /* + * Sets the primary or secondary display stream on CRT. + */ +@@ -143,3 +175,32 @@ ViaDisplaySetStreamOnDFP(ScrnInfoPtr pScrn, Bool p + ViaCrtcMask(hwp, 0x99, 0x10, 0x10); + } + ++void ++ViaDisplaySetStreamOnDVO(ScrnInfoPtr pScrn, int port, Bool primary) ++{ ++ vgaHWPtr hwp = VGAHWPTR(pScrn); ++ int regNum; ++ ++ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplaySetStreamOnDVO\n")); ++ ++ switch (port) { ++ case VIA_DI_PORT_DVP0: ++ regNum = 0x96; ++ break; ++ case VIA_DI_PORT_DVP1: ++ regNum = 0x9B; ++ break; ++ case VIA_DI_PORT_DFPLOW: ++ regNum = 0x97; ++ break; ++ case VIA_DI_PORT_DFPHIGH: ++ regNum = 0x99; ++ break; ++ } ++ ++ if (primary) ++ ViaCrtcMask(hwp, regNum, 0x00, 0x10); ++ else ++ ViaCrtcMask(hwp, regNum, 0x10, 0x10); ++} ++ +Index: src/via_vt162x.c +=================================================================== +--- src/via_vt162x.c (revision 758) ++++ src/via_vt162x.c (working copy) +@@ -32,7 +32,41 @@ + #include "via_vt162x.h" + #include "via_id.h" + ++static void ++ViaSetTVClockSource(ScrnInfoPtr pScrn) ++{ ++ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaSetTVClockSource\n")); + ++ VIAPtr pVia = VIAPTR(pScrn); ++ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; ++ vgaHWPtr hwp = VGAHWPTR(pScrn); ++ ++ /* External TV: */ ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_VX800: ++ if (pBIOSInfo->FirstCRTC->IsActive) { ++ if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1) ++ ViaCrtcMask(hwp, 0x6C, 0xB0, 0xF0); ++ else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0) ++ ViaCrtcMask(hwp, 0x6C, 0x90, 0xF0); ++ } else { ++ /* IGA2 */ ++ if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1) ++ ViaCrtcMask(hwp, 0x6C, 0x0B, 0x0F); ++ else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0) ++ ViaCrtcMask(hwp, 0x6C, 0x09, 0x0F); ++ } ++ break; ++ default: ++ if (pBIOSInfo->FirstCRTC->IsActive) ++ ViaCrtcMask(hwp, 0x6C, 0x21, 0x21); ++ else ++ ViaCrtcMask(hwp, 0x6C, 0xA1, 0xA1); ++ break; ++ } ++} ++ + static void + VT162xPrintRegs(ScrnInfoPtr pScrn) + { +@@ -650,11 +684,30 @@ VT1622ModeI2C(ScrnInfoPtr pScrn, DisplayModePtr mo + xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x2B, Table.RGB[4]); + if (Table.RGB[5]) + xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x2C, Table.RGB[5]); ++ if (pBIOSInfo->TVEncoder == VIA_VT1625) { ++ if (pBIOSInfo->TVType < TVTYPE_480P) { ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x02, 0x12); ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x23, 0x7E); ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4A, 0x85); ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4B, 0x0A); ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4E, 0x00); ++ } else { ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x02, 0x12); ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4A, 0x85); ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4B, 0x0A); ++ } ++ } + } else if (pBIOSInfo->TVOutput == TVOUTPUT_YCBCR) { + xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x02, 0x03); + xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x65, Table.YCbCr[0]); + xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x66, Table.YCbCr[1]); + xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x67, Table.YCbCr[2]); ++ if (pBIOSInfo->TVEncoder == VIA_VT1625) { ++ if (pBIOSInfo->TVType < TVTYPE_480P) { ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x23, 0x7E); ++ xf86I2CWriteByte(pBIOSInfo->TVI2CDev, 0x4E, 0x00); ++ } ++ } + } + + /* Configure flicker filter. */ +@@ -721,8 +774,7 @@ VT1622ModeCrtc(ScrnInfoPtr pScrn, DisplayModePtr m + } + pBIOSInfo->ClockExternal = TRUE; + ViaCrtcMask(hwp, 0x6A, 0x40, 0x40); +- ViaCrtcMask(hwp, 0x6C, 0x01, 0x01); +- ViaSeqMask(hwp, 0x1E, 0xF0, 0xF0); /* enable DI0/DVP0 */ ++ ViaSetTVClockSource(pScrn); + } + + +Index: src/via_vt162x.h +=================================================================== +--- src/via_vt162x.h (revision 758) ++++ src/via_vt162x.h (working copy) +@@ -755,19 +755,19 @@ static DisplayModeRec VT1625Modes[] = { + { MODEPREFIX("1024x768Over"), ... , MODESUFFIXPAL }, + { MODEPREFIX("720x576Over"), ... , MODESUFFIXPAL },*/ + /* clock HR SH1 SH2 HFL VR SV1 SV2 VFL*/ +- { MODEPREFIX("640x480"), 30000, 640, 680, 808, 1000, 0, 480, 520, 523, 600, 0, V_NHSYNC | V_NVSYNC, MODESUFFIXPAL }, ++ { MODEPREFIX("640x480"), 30000, 640, 688, 744, 784, 0, 480, 488, 495, 600, 0, V_NHSYNC | V_NVSYNC, MODESUFFIXPAL }, + { MODEPREFIX("800x600"), 34500, 800, 816, 880, 920, 0, 600, 604, 620, 750, 0, V_PHSYNC | V_PVSYNC, MODESUFFIXPAL }, + { MODEPREFIX("1024x768"), 57000, 1024, 1040, 1112, 1200, 0, 768, 829, 840, 950, 0, V_NHSYNC | V_NVSYNC, MODESUFFIXPAL }, +- { MODEPREFIX("720x576"), 34500, 720, 766, 800, 1000, 0, 576, 576, 579, 690, 0, V_NHSYNC | V_PVSYNC, MODESUFFIXPAL }, ++ { MODEPREFIX("720x576"), 34500, 720, 760, 800, 1000, 0, 576, 577, 580, 690, 0, V_NHSYNC | V_PVSYNC, MODESUFFIXPAL }, + { MODEPREFIX("720x576Over"), 27000, 720, 768, 800, 864, 0, 576, 577, 579, 625, 0, V_NHSYNC | V_PVSYNC, MODESUFFIXPAL }, + + { MODEPREFIX("1280x720"), 74250, 1280, 1320, 1376, 1650, 0, 720, 722, 728, 750, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX720P }, +- { MODEPREFIX("1920x1080"), 74250, 1920, 1960, 2016, 2200, 0, 1080, 1082, 1088, 1125, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX1080I }, ++ { MODEPREFIX("1920x1080"), 74250, 1920, 1960, 2064, 2200, 0, 1080, 1083, 1087, 1125, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX1080I }, + + { MODEPREFIX("640x480"), 24696, 640, 656, 744, 784, 0, 480, 482, 483, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIXNTSC }, + { MODEPREFIX("720x480Under"), 34000, 720, 728, 744, 784, 0, 480, 490, 496, 600, 0, V_NHSYNC | V_NVSYNC, MODESUFFIXNTSC }, +- { MODEPREFIX("720x480Fit"), 28980, 720, 728, 744, 784, 0, 480, 490, 496, 600, 0, V_NHSYNC | V_NVSYNC, MODESUFFIXNTSC }, +- { MODEPREFIX("720x480Over"), 27025, 720, 728, 744, 784, 0, 480, 490, 496, 600, 0, V_NHSYNC | V_NVSYNC, MODESUFFIXNTSC }, ++ { MODEPREFIX("720x480Fit"), 28980, 720, 728, 776, 840, 0, 480, 484, 499, 575, 0, V_NHSYNC | V_NVSYNC, MODESUFFIXNTSC }, ++ { MODEPREFIX("720x480Over"), 27025, 720, 752, 792, 800, 0, 480, 482, 485, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIXNTSC }, + + { MODEPREFIX("720x480Under"), 28224, 720, 728, 744, 784, 0, 480, 490, 496, 600, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX480P }, + { MODEPREFIX("720x480Fit"), 28980, 720, 728, 776, 840, 0, 480, 484, 499, 575, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX480P }, +@@ -828,13 +828,13 @@ VT1625Table[] = { + }, + { "720x480Over", 720, 480, TVTYPE_NTSC, 0, 0, + /* 00 0F */ +- { 0x03, 0, 0x10, 0x1F, 0x00, 0, 0, 0x33, 0x1C, 0x06, 0x7B, 0x15, 0x50, 0x57, 0, 0x9E, +- 0, 0x80, 0x04, 0x08, 0x08, 0x10, 0xD6, 0x7B, 0xF0, 0x21, 0x00, 0x50, 0x43, 0x80, 0, 0x10, +- 0x1C, 0x08, 0xDC, 0x77, 0x02, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, ++ { 0x03, 0, 0x10, 0x1F, 0x00, 0, 0, 0x02, 0x10, 0x00, 0x7B, 0x15, 0x50, 0x57, 0, 0xB7, ++ 0, 0x80, 0xAD, 0x21, 0x64, 0x34, 0xD6, 0x7B, 0xF0, 0x21, 0x00, 0x50, 0x00, 0x80, 0, 0x10, ++ 0x1C, 0x08, 0xE5, 0x77, 0x02, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* 4A 4F 50 59 */ +- { 0xC5, 0x0F, 0, 0x01, 0x10, 0x4A, 0x59, 0xCF, 0x23, 0x0C, 0x22, 0x59, 0xCF, 0x7F, 0x23, 0x91, ++ { 0xC5, 0x0F, 0, 0x01, 0x10, 0x4A, 0x1F, 0xD2, 0x23, 0x0C, 0x22, 0x59, 0xC0, 0x7E, 0x23, 0x8C, + /* 5A 5F 60 64 */ +- 0xD2, 0xE1, 0x7D, 0x06, 0, 0, 0x80, 0x28, 0xFF, 0x59, 0x03 }, ++ 0xD0, 0xF6, 0x7C, 0x06, 0, 0x34, 0x80, 0x28, 0xFF, 0x1F, 0x03 }, + /* RBG 65,66,67,27,2b,2c */ + { 0x55, 0x37, 0x5C, 0, 0, 0 }, + /* Y-Cb-Cr 65,66,67 */ +@@ -876,8 +876,8 @@ VT1625Table[] = { + }, + { "720x480Over", 720, 480, TVTYPE_480P, 0, 0, + /* 00 0F */ +- { 0x03, 0, 0x10, 0x40, 0x10, 0, 0, 0x33, 0x20, 0xFF, 0x7B, 0, 0x50, 0x57, 0, 0x9E, +- 0, 0x80, 0x04, 0x08, 0x08, 0x10, 0xD6, 0x7B, 0xF0, 0x21, 0x02, 0x50, 0x43, 0x80, 0, 0x01, ++ { 0x03, 0, 0x10, 0x40, 0x10, 0, 0, 0x01, 0x20, 0, 0x7B, 0, 0x50, 0x57, 0, 0x9E, ++ 0, 0x80, 0x04, 0x08, 0x08, 0x10, 0xD6, 0x7B, 0xF0, 0x21, 0x02, 0x50, 0x00, 0x80, 0, 0x01, + 0x2F, 0x08, 0xDC, 0x7E, 0x02, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* 4A 4F 50 59 */ + { 0xC5, 0x0F, 0, 0x01, 0, 0x4A, 0x59, 0xCF, 0x23, 0x0C, 0x22, 0x59, 0xCF, 0x7F, 0x23, 0x91, +@@ -909,15 +909,15 @@ VT1625Table[] = { + 0x0, 0x0, + }, + +- { "1920x1080", 1920, 540, TVTYPE_1080I, 0, 0, ++ { "1920x1080", 1920, 1080, TVTYPE_1080I, 0, 0, + /* 00 0F */ +- { 0x83, 0, 0x10, 0x4A, 0x86, 0x39, 0, 0x8B, 0x3D, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9E, +- 0x00, 0x80, 0x4A, 0x08, 0x37, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x44, 0x80, 0x00, 0x03, ++ { 0x83, 0, 0x10, 0x4A, 0x86, 0x32, 0, 0x8B, 0x3D, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x9E, ++ 0x00, 0x80, 0x4A, 0x08, 0x37, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x04, 0x80, 0x00, 0x03, + 0x25, 0x00, 0x00, 0x7E, 0x00, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + /* 4A 4F 50 59 */ + { 0xC5, 0x0F, 0, 0x01, 0, 0x00, 0x97, 0x7F, 0x78, 0x64, 0x14, 0x97, 0x7f, 0x59, 0x78, 0xb0, + /* 5A 5F 60 64 */ +- 0x1a, 0xec, 0xfa, 0x08, 0x00, 0x00, 0x80, 0x20, 0xFF, 0x97, 0x28 }, ++ 0x1a, 0xdc, 0x5d, 0x08, 0x00, 0x00, 0x80, 0x28, 0xFF, 0x97, 0x28 }, + /* RBG 65,66,67,27,2b,2c */ + { 0x55, 0x39, 0x66, 0, 0, 0 }, + /* Y-Cb-Cr 65,66,67 */ +@@ -945,9 +945,9 @@ VT1625Table[] = { + + { "720x576", 720, 576, TVTYPE_PAL, 0, 0, + /* 00 0F */ +- { 0x03, 0x00, 0x10, 0x1f, 0x03, 0x00, 0x00, 0xc9, 0x4c, 0x11, 0x7c, 0x00, 0x56, 0x57, 0x07, 0xbf, +- 0x00, 0x80, 0x09, 0x08, 0x17, 0x24, 0xcb, 0x8a, 0x09, 0x2a, 0x06, 0x50, 0x01, 0x80, 0x00, 0x10, +- 0x14, 0x0c, 0x32, 0x7e, 0x00, 0x5f, 0x34, 0x8c, 0x4f, 0x5e, 0x15, 0xa2, 0x22, 0x80, 0xd3, 0x10 ++ { 0x03, 0x00, 0x10, 0x1f, 0x03, 0x00, 0x00, 0xc9, 0x4c, 0x10, 0x7c, 0x00, 0x56, 0x57, 0x07, 0xbf, ++ 0x00, 0x80, 0x09, 0x08, 0x17, 0x24, 0xcb, 0x8a, 0x09, 0x2a, 0x06, 0x50, 0x00, 0x80, 0x00, 0x10, ++ 0x14, 0x0c, 0x32, 0x7e, 0x00, 0x5f, 0x34, 0x8c, 0x4f, 0x5e, 0x15, 0xa2, 0x22, 0x80, 0xd3, 0x10 + }, + /* 4A 4F 50 59 */ + { 0xc5, 0x0f, 0x00, 0x01, 0x00, 0x4b, 0xe7, 0xd2, 0x23, 0xb1, 0x22, 0x5f, 0x61, 0x7f, 0x23, 0x90, diff --git a/xorg-x11-drv-openchrome.spec b/xorg-x11-drv-openchrome.spec index 0cc8fd5..d88c0f8 100644 --- a/xorg-x11-drv-openchrome.spec +++ b/xorg-x11-drv-openchrome.spec @@ -10,7 +10,7 @@ Summary: Xorg X11 openchrome video driver Name: xorg-x11-drv-openchrome Version: 0.2.903 -Release: 11%{?dist}.1 +Release: 12%{?dist} URL: http://www.openchrome.org License: MIT Group: User Interface/X Hardware Support @@ -25,10 +25,15 @@ Patch99: openchrome-0.2.903-latest_snapshot.patch # Fedora specific patches : #Patch100: openchrome-0.2.903-disable_hwcursor.patch # Experimental patches (branch backport, etc...): -Patch200: openchrome-0.2.903-vx855_support.patch -Patch201: openchrome-0.2.903-pll_rework.patch -Patch202: openchrome-0.2.903-fix_cursor_on_secondary.patch +#Patch200: openchrome-0.2.903-vx855_support.patch +#Patch201: openchrome-0.2.903-pll_rework.patch +#Patch202: openchrome-0.2.903-fix_cursor_on_secondary.patch Patch203: openchrome-0.2.903-disable_TMDS_by_default.patch +#Patch204: openchrome-switch-on-lvds-pads-only-for-active-channels.patch +Patch205: openchrome-0.2.903-XO-1.5-panel.patch +Patch206: openchrome-0.2.903-remove_loader_symbol_lists.patch +#Patch207: openchrome-0.2.903-fix_null_pointer_deref_in_viaExaCheckComposite.patch +Patch208: openchrome-vt1625.patch ExclusiveArch: %{ix86} x86_64 @@ -69,10 +74,10 @@ X.Org X11 openchrome video driver XvMC development package. %prep %setup -q -n %{tarball}-%{version} %patch99 -p0 -b .latest -%patch200 -p0 -%patch201 -p0 -%patch202 -p0 -%patch203 -p0 +%patch203 -p0 -b .tmds +%patch205 -p0 -b .XO_1.5_panel +%patch206 -p0 -b .loader_symbol +%patch208 -p0 -b .vt1625 %build @@ -130,6 +135,16 @@ fi %changelog +* Mon Jul 18 2009 Xavier Bachelot - 0.2.903-12 +- Update to latest snapshot (svn 758) : + - Basic VX855 support. + - Fix pci space corruption on P4M900 (RHBZ#506622). + - Fix null pointer dereference in viaExaCheckComposite (RHBZ#449034). +- Add patch to allow 1200x900 panel (X0-1.5). +- Add patch to remove loader symbol lists, needed for xserver 1.7 (RHBZ#510206). +- Add experimental patch for better VT1625 support. +- Drop upstreamed patches. + * Wed Jul 15 2009 Adam Jackson - 0.2.903-11.1 - ABI bump