diff --git a/openchrome-0.2.903-disable_TMDS_by_default.patch b/openchrome-0.2.903-disable_TMDS_by_default.patch new file mode 100644 index 0000000..1c1e972 --- /dev/null +++ b/openchrome-0.2.903-disable_TMDS_by_default.patch @@ -0,0 +1,17 @@ +Index: src/via_mode.c +=================================================================== +--- src/via_mode.c (revision 750) ++++ src/via_mode.c (working copy) +@@ -449,9 +449,12 @@ + if (pBIOSInfo->CrtPresent) + pBIOSInfo->CrtActive = TRUE; + ++#if 0 ++ # FIXME : DFP must be activated with the ActiveDevice option + /* DFP */ + if (pBIOSInfo->DfpPresent) + pBIOSInfo->DfpActive = TRUE; ++#endif + + } else { + if (pVia->ActiveDevice & VIA_DEVICE_LCD) { diff --git a/openchrome-0.2.903-fix_cursor_on_secondary.patch b/openchrome-0.2.903-fix_cursor_on_secondary.patch new file mode 100644 index 0000000..88735b9 --- /dev/null +++ b/openchrome-0.2.903-fix_cursor_on_secondary.patch @@ -0,0 +1,216 @@ +Index: src/via_cursor.c +=================================================================== +--- src/via_cursor.c (wersja 751) ++++ src/via_cursor.c (kopia robocza) +@@ -290,19 +286,36 @@ + CARD32 temp; + CARD32 control = pVia->CursorRegControl; + +- temp = +- (1 << 30) | +- (1 << 29) | +- (1 << 28) | +- (1 << 26) | +- (1 << 25) | +- (1 << 2) | +- (1 << 0); ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ VIASETREG(VIA_REG_HI_CONTROL0, 0x36000005); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ VIASETREG(VIA_REG_HI_CONTROL1, 0xb6000005); ++ } ++ break; ++ ++ default: ++ /* temp = 0x36000005 */ ++ temp = ++ (1 << 29) | ++ (1 << 28) | ++ (1 << 26) | ++ (1 << 25) | ++ (1 << 2) | ++ (1 << 0); + +- if (pVia->CursorPipe) +- temp |= (1 << 31); ++ temp |= (1 << 30); + +- VIASETREG(control, temp); ++ /* Duoview */ ++ if (pVia->CursorPipe) ++ temp |= (1 << 31); ++ VIASETREG(control, temp); ++ } + } + + void +@@ -313,7 +326,24 @@ + CARD32 control = pVia->CursorRegControl; + + temp = VIAGETREG(control); +- VIASETREG(control, temp & 0xFFFFFFFE); ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL0); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFA); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL1); ++ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFA); ++ } ++ break; ++ ++ default: ++ VIASETREG(control, temp & 0xFFFFFFFA); ++ } + } + + static void +@@ -340,13 +370,41 @@ + yoff = 0; + } + +- temp = VIAGETREG(control); +- VIASETREG(control, temp & 0xFFFFFFFE); ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL0); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); ++ ++ VIASETREG(VIA_REG_HI_POS0, ((x << 16) | (y & 0x07ff))); ++ VIASETREG(VIA_REG_HI_OFFSET0, ((xoff << 16) | (yoff & 0x07ff))); + +- VIASETREG(pos, ((x << 16) | (y & 0x07ff))); +- VIASETREG(offset, ((xoff << 16) | (yoff & 0x07ff))); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL1); ++ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); + +- VIASETREG(control, temp); ++ VIASETREG(VIA_REG_HI_POS1, ((x << 16) | (y & 0x07ff))); ++ VIASETREG(VIA_REG_HI_OFFSET1, ((xoff << 16) | (yoff & 0x07ff))); ++ ++ VIASETREG(VIA_REG_HI_CONTROL1, temp); ++ } ++ break; ++ ++ default: ++ temp = VIAGETREG(control); ++ VIASETREG(control, temp & 0xFFFFFFFE); ++ ++ VIASETREG(pos, ((x << 16) | (y & 0x07ff))); ++ VIASETREG(offset, ((xoff << 16) | (yoff & 0x07ff))); ++ ++ VIASETREG(control, temp); ++ } ++ + } + + static Bool +@@ -397,18 +455,34 @@ + if (pVia->CursorARGBSupported) { + #define ARGB_PER_CHUNK (8 * sizeof (chunk) / 2) + for (i = 0; i < (pVia->CursorMaxWidth * pVia->CursorMaxHeight / ARGB_PER_CHUNK); i++) { +- chunk = *s++; +- for (j = 0; j < ARGB_PER_CHUNK; j++, chunk >>= 2) ++ chunk = *s++; ++ for (j = 0; j < ARGB_PER_CHUNK; j++, chunk >>= 2) + *dst++ = mono_cursor_color[chunk & 3]; + } + + pVia->CursorFG = mono_cursor_color[3]; + pVia->CursorBG = mono_cursor_color[2]; +- } else { +- memcpy(dst, src, pVia->CursorSize); +- } +- +- VIASETREG(control, temp); ++ } else { ++ memcpy(dst, src, pVia->CursorSize); ++ } ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL0); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL1); ++ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); ++ } ++ break; ++ ++ default: ++ VIASETREG(control, temp); ++ } + } + + static void +@@ -441,7 +515,23 @@ + pVia->CursorFG = fg; + pVia->CursorBG = bg; + +- VIASETREG(control, temp); ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL0); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL1); ++ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); ++ } ++ break; ++ default: ++ VIASETREG(control, temp); ++ } + } + + static void +@@ -486,5 +576,22 @@ + for (x = 0; x < pVia->CursorMaxWidth; x++) + *dst++ = 0; + +- VIASETREG(control, temp); ++ switch(pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_P4M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ if (pVia->pBIOSInfo->FirstCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL0); ++ VIASETREG(VIA_REG_HI_CONTROL0, temp & 0xFFFFFFFE); ++ } ++ if (pVia->pBIOSInfo->SecondCRTC->IsActive) { ++ temp = VIAGETREG(VIA_REG_HI_CONTROL1); ++ VIASETREG(VIA_REG_HI_CONTROL1, temp & 0xFFFFFFFE); ++ } ++ break; ++ ++ default: ++ VIASETREG(control, temp); ++ } + } diff --git a/openchrome-0.2.903-latest_snapshot.patch b/openchrome-0.2.903-latest_snapshot.patch index 24591a2..11e56af 100644 --- a/openchrome-0.2.903-latest_snapshot.patch +++ b/openchrome-0.2.903-latest_snapshot.patch @@ -1,7 +1,7 @@ Index: configure.ac =================================================================== ---- configure.ac (.../tags/release_0_2_903) (revision 740) -+++ configure.ac (.../trunk) (revision 740) +--- configure.ac (.../tags/release_0_2_903) (revision 751) ++++ configure.ac (.../trunk) (revision 751) @@ -70,7 +70,7 @@ XORG_DRIVER_CHECK_EXT(DPMSExtension, xextproto) @@ -63,8 +63,8 @@ Index: configure.ac AC_SUBST([DRIVER_MAN_SUFFIX]) Index: libxvmc/Makefile.am =================================================================== ---- libxvmc/Makefile.am (.../tags/release_0_2_903) (revision 740) -+++ libxvmc/Makefile.am (.../trunk) (revision 740) +--- libxvmc/Makefile.am (.../tags/release_0_2_903) (revision 751) ++++ libxvmc/Makefile.am (.../trunk) (revision 751) @@ -24,13 +24,13 @@ xf86dristr.h \ vldXvMC.h @@ -85,8 +85,8 @@ Index: libxvmc/Makefile.am driDrawable.c \ Index: libxvmc/viaLowLevel.c =================================================================== ---- libxvmc/viaLowLevel.c (.../tags/release_0_2_903) (revision 740) -+++ libxvmc/viaLowLevel.c (.../trunk) (revision 740) +--- libxvmc/viaLowLevel.c (.../tags/release_0_2_903) (revision 751) ++++ libxvmc/viaLowLevel.c (.../trunk) (revision 751) @@ -276,8 +276,8 @@ xl->tsMem.context = *(xl->drmcontext); xl->tsMem.size = 64; @@ -100,8 +100,8 @@ Index: libxvmc/viaLowLevel.c return -1; Index: libxvmc/viaLowLevelPro.c =================================================================== ---- libxvmc/viaLowLevelPro.c (.../tags/release_0_2_903) (revision 740) -+++ libxvmc/viaLowLevelPro.c (.../trunk) (revision 740) +--- libxvmc/viaLowLevelPro.c (.../tags/release_0_2_903) (revision 751) ++++ libxvmc/viaLowLevelPro.c (.../trunk) (revision 751) @@ -1460,13 +1460,13 @@ if (size != mem->size) { @@ -129,8 +129,8 @@ Index: libxvmc/viaLowLevelPro.c Index: libxvmc/viaXvMC.c =================================================================== ---- libxvmc/viaXvMC.c (.../tags/release_0_2_903) (revision 740) -+++ libxvmc/viaXvMC.c (.../trunk) (revision 740) +--- libxvmc/viaXvMC.c (.../tags/release_0_2_903) (revision 751) ++++ libxvmc/viaXvMC.c (.../trunk) (revision 751) @@ -248,7 +248,7 @@ return errType; } @@ -407,8 +407,8 @@ Index: libxvmc/viaXvMC.c Index: ChangeLog =================================================================== ---- ChangeLog (.../tags/release_0_2_903) (revision 740) -+++ ChangeLog (.../trunk) (revision 740) +--- ChangeLog (.../tags/release_0_2_903) (revision 751) ++++ ChangeLog (.../trunk) (revision 751) @@ -1,3 +1,323 @@ +2009-03-21 Xavier Bachelot + @@ -736,7 +736,7 @@ Index: ChangeLog Index: src/via_panel.c =================================================================== --- src/via_panel.c (.../tags/release_0_2_903) (revision 0) -+++ src/via_panel.c (.../trunk) (revision 740) ++++ src/via_panel.c (.../trunk) (revision 751) @@ -0,0 +1,461 @@ +/* + * Copyright 2007 The Openchrome Project [openchrome.org] @@ -1201,8 +1201,8 @@ Index: src/via_panel.c +} Index: src/via_id.h =================================================================== ---- src/via_id.h (.../tags/release_0_2_903) (revision 740) -+++ src/via_id.h (.../trunk) (revision 740) +--- src/via_id.h (.../tags/release_0_2_903) (revision 751) ++++ src/via_id.h (.../trunk) (revision 751) @@ -37,6 +37,7 @@ VIA_P4M900, VIA_CX700, @@ -1221,8 +1221,8 @@ Index: src/via_id.h * the CLE266, often labelled Ax and Cx. The dividing line seems to be Index: src/via_video.c =================================================================== ---- src/via_video.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_video.c (.../trunk) (revision 740) +--- src/via_video.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_video.c (.../trunk) (revision 751) @@ -112,11 +112,7 @@ static int viaSetPortAttribute(ScrnInfoPtr, Atom, INT32, pointer); static int viaPutImage(ScrnInfoPtr, short, short, short, short, short, short, @@ -1407,8 +1407,8 @@ Index: src/via_video.c Index: src/via_lvds.c =================================================================== --- src/via_lvds.c (.../tags/release_0_2_903) (revision 0) -+++ src/via_lvds.c (.../trunk) (revision 740) -@@ -0,0 +1,121 @@ ++++ src/via_lvds.c (.../trunk) (revision 751) +@@ -0,0 +1,122 @@ +/* + * Copyright 2007 The Openchrome Project [openchrome.org] + * Copyright 1998-2007 VIA Technologies, Inc. All Rights Reserved. @@ -1500,7 +1500,8 @@ Index: src/via_lvds.c + hwp->writeSeq(hwp, 0x2A, hwp->readSeq(hwp, 0x2A) | 0x0F); + } else { + /* Turn DFP High/Low pad off. */ -+ hwp->writeSeq(hwp, 0x2A, hwp->readSeq(hwp, 0x2A) & 0x0F); ++ hwp->writeSeq(hwp, 0x2A, hwp->readSeq(hwp, 0x2A) & 0xF0); ++ + } +} + @@ -1532,8 +1533,8 @@ Index: src/via_lvds.c +} Index: src/via_mode.c =================================================================== ---- src/via_mode.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_mode.c (.../trunk) (revision 740) +--- src/via_mode.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_mode.c (.../trunk) (revision 751) @@ -1,4 +1,5 @@ /* + * Copyright 2005-2007 The Openchrome Project [openchrome.org] @@ -1607,7 +1608,7 @@ Index: src/via_mode.c + + VIAPtr pVia = VIAPTR(pScrn); + VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; -+ xf86MonPtr monPtr; ++ xf86MonPtr monPtr = NULL; + + if (pVia->pI2CBus2) + monPtr = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus2); @@ -1649,7 +1650,7 @@ Index: src/via_mode.c } } + -+ if (pVia->Chipset == VIA_CX700) { ++ if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) { + + if (ViaDFPDetect(pScrn)) { + pBIOSInfo->DfpPresent = TRUE; @@ -3029,8 +3030,8 @@ Index: src/via_mode.c +} Index: src/via_mode.h =================================================================== ---- src/via_mode.h (.../tags/release_0_2_903) (revision 740) -+++ src/via_mode.h (.../trunk) (revision 740) +--- src/via_mode.h (.../tags/release_0_2_903) (revision 751) ++++ src/via_mode.h (.../trunk) (revision 751) @@ -32,7 +32,7 @@ */ #define VIA_BW_MIN 74000000 /* > 640x480@60Hz@32bpp */ @@ -3086,8 +3087,8 @@ Index: src/via_mode.h Index: src/via_driver.c =================================================================== ---- src/via_driver.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_driver.c (.../trunk) (revision 740) +--- src/via_driver.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_driver.c (.../trunk) (revision 751) @@ -73,6 +73,7 @@ return via_pci_device(&bridge_match); } @@ -3369,7 +3370,16 @@ Index: src/via_driver.c #else pVia->ChipRev = pciReadByte(pciTag(0, 0, 0), 0xF6); #endif -@@ -1114,6 +1177,7 @@ +@@ -1090,6 +1153,8 @@ + struct pci_device *vgaDevice = viaPciDeviceVga(); + #endif + ++ hwp = VGAHWPTR(pScrn); ++ + switch (pVia->Chipset) { + case VIA_CLE266: + case VIA_KM400: +@@ -1114,6 +1179,7 @@ case VIA_P4M890: case VIA_P4M900: case VIA_CX700: @@ -3377,7 +3387,7 @@ Index: src/via_driver.c #ifdef XSERVER_LIBPCIACCESS pci_device_cfg_read_u8(vgaDevice, &videoRam, 0xA1); #else -@@ -1139,7 +1203,7 @@ +@@ -1139,7 +1205,7 @@ } else { from = X_DEFAULT; xf86DrvMsg(pScrn->scrnIndex, X_WARNING, @@ -3386,7 +3396,7 @@ Index: src/via_driver.c } } -@@ -1202,7 +1266,6 @@ +@@ -1202,7 +1268,6 @@ "Valid options are \"CW\" or \"CCW\".\n"); } } @@ -3394,7 +3404,7 @@ Index: src/via_driver.c if (!pVia->NoAccel) { from = X_DEFAULT; if ((s = (char *)xf86GetOptValString(VIAOptions, OPTION_ACCELMETHOD))) { -@@ -1235,13 +1298,13 @@ +@@ -1235,13 +1300,13 @@ pVia->exaScratchSize); } } @@ -3410,7 +3420,7 @@ Index: src/via_driver.c pVia->hwcursor = !pVia->hwcursor; from = X_CONFIG; } -@@ -1346,8 +1409,8 @@ +@@ -1346,8 +1411,8 @@ pVia->ActiveDevice |= VIA_DEVICE_CRT; if (strstr(s, "LCD")) pVia->ActiveDevice |= VIA_DEVICE_LCD; @@ -3421,7 +3431,7 @@ Index: src/via_driver.c if (strstr(s, "TV")) pVia->ActiveDevice |= VIA_DEVICE_TV; } -@@ -1375,45 +1438,24 @@ +@@ -1375,45 +1440,24 @@ xf86DrvMsg(pScrn->scrnIndex, from, "DVI Center is %s.\n", pBIOSInfo->Center ? "enabled" : "disabled"); @@ -3476,7 +3486,15 @@ Index: src/via_driver.c /* Force the use of the Panel? */ pBIOSInfo->ForcePanel = FALSE; from = xf86GetOptValBool(VIAOptions, OPTION_FORCEPANEL, -@@ -1607,18 +1649,21 @@ +@@ -1504,7 +1548,6 @@ + VIAFreeRec(pScrn); + return FALSE; + } +- hwp = VGAHWPTR(pScrn); + + #ifdef HAVE_DEBUG + //pVia->PrintVGARegs = FALSE; +@@ -1607,18 +1650,21 @@ return FALSE; } @@ -3507,7 +3525,7 @@ Index: src/via_driver.c "Using VBE to set modes to work around this.\n"); pVia->useVBEModes = TRUE; } -@@ -1755,9 +1800,7 @@ +@@ -1755,9 +1801,7 @@ #endif if (!pVia->NoAccel) { @@ -3517,7 +3535,7 @@ Index: src/via_driver.c XF86ModReqInfo req; int errmaj, errmin; -@@ -1770,16 +1813,8 @@ +@@ -1770,16 +1814,8 @@ VIAFreeRec(pScrn); return FALSE; } @@ -3534,7 +3552,7 @@ Index: src/via_driver.c if (!xf86LoadSubModule(pScrn, "xaa")) { VIAFreeRec(pScrn); return FALSE; -@@ -1836,7 +1871,7 @@ +@@ -1836,7 +1872,7 @@ /* A patch for APM suspend/resume, when HWCursor has garbage. */ if (pVia->hwcursor) @@ -3543,7 +3561,7 @@ Index: src/via_driver.c /* Restore video status. */ if (!pVia->IsSecondary) -@@ -1890,7 +1925,7 @@ +@@ -1890,7 +1926,7 @@ viaAccelSync(pScrn); /* A soft reset helps to avoid a 3D hang on VT switch. */ @@ -3552,7 +3570,7 @@ Index: src/via_driver.c hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); #ifdef XF86DRI -@@ -1908,7 +1943,7 @@ +@@ -1908,7 +1944,7 @@ viaSaveVideo(pScrn); if (pVia->hwcursor) @@ -3561,7 +3579,7 @@ Index: src/via_driver.c if (pVia->pVbe && pVia->vbeSR) ViaVbeSaveRestore(pScrn, MODE_RESTORE); -@@ -1918,7 +1953,40 @@ +@@ -1918,7 +1954,40 @@ vgaHWLock(hwp); } @@ -3602,7 +3620,7 @@ Index: src/via_driver.c static void VIASave(ScrnInfoPtr pScrn) { -@@ -2009,6 +2077,7 @@ +@@ -2009,6 +2078,7 @@ Regs->CR35 = hwp->readCrtc(hwp, 0x35); Regs->CR36 = hwp->readCrtc(hwp, 0x36); @@ -3610,7 +3628,7 @@ Index: src/via_driver.c Regs->CR49 = hwp->readCrtc(hwp, 0x49); DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "TVSave...\n")); -@@ -2019,15 +2088,23 @@ +@@ -2019,15 +2089,23 @@ for (i = 0; i < 68; i++) Regs->CRTCRegs[i] = hwp->readCrtc(hwp, i + 0x50); @@ -3635,13 +3653,13 @@ Index: src/via_driver.c + } + + /* Save TMDS status */ -+ if (pVia->Chipset == VIA_CX700) ++ if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) + Regs->CRD2 = hwp->readCrtc(hwp, 0xD2); + vgaHWProtect(pScrn, FALSE); } } -@@ -2055,6 +2132,8 @@ +@@ -2055,6 +2133,8 @@ hwp->writeCrtc(hwp, 0x6B, 0x00); hwp->writeCrtc(hwp, 0x6C, 0x00); @@ -3650,7 +3668,7 @@ Index: src/via_driver.c if (pBIOSInfo->TVI2CDev) ViaTVRestore(pScrn); -@@ -2118,22 +2197,31 @@ +@@ -2118,22 +2198,31 @@ hwp->writeCrtc(hwp, 0x35, Regs->CR35); hwp->writeCrtc(hwp, 0x36, Regs->CR36); @@ -3685,14 +3703,14 @@ Index: src/via_driver.c + } + + /* Restore TMDS status */ -+ if (pVia->Chipset == VIA_CX700) ++ if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) + hwp->writeCrtc(hwp, 0xD2, Regs->CRD2); + + if (pBIOSInfo->Panel->IsActive) ViaLCDPower(pScrn, TRUE); ViaDisablePrimaryFIFO(pScrn); -@@ -2145,26 +2233,61 @@ +@@ -2145,26 +2234,61 @@ vgaHWProtect(pScrn, FALSE); } @@ -3729,10 +3747,10 @@ Index: src/via_driver.c + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: -+ ViaSeqMask(VGAHWPTR(pScrn), 0x1A, 0x00, 0x08); ++ ViaSeqMask(hwp, 0x1A, 0x00, 0x08); + break; + default: -+ ViaSeqMask(VGAHWPTR(pScrn), 0x1A, 0x00, 0x60); ++ ViaSeqMask(hwp, 0x1A, 0x00, 0x60); + break; + } +} @@ -3762,7 +3780,7 @@ Index: src/via_driver.c xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "mapping MMIO @ 0x%lx with size 0x%x\n", pVia->MmioBase, VIA_MMIO_REGSIZE); -@@ -2196,8 +2319,7 @@ +@@ -2196,8 +2320,7 @@ err = pci_device_map_range(pVia->PciInfo, pVia->MmioBase + VIA_MMIO_BLTBASE, VIA_MMIO_BLTSIZE, @@ -3772,7 +3790,7 @@ Index: src/via_driver.c (void **)&pVia->BltBase); if (err) { -@@ -2215,7 +2337,7 @@ +@@ -2215,7 +2338,7 @@ if (!pVia->MapBase || !pVia->BltBase) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, @@ -3781,7 +3799,7 @@ Index: src/via_driver.c return FALSE; } -@@ -2238,14 +2360,15 @@ +@@ -2238,14 +2361,15 @@ hwp->writeMiscOut(hwp, val | 0x01); /* Unlock extended IO space. */ @@ -3803,7 +3821,7 @@ Index: src/via_driver.c vgaHWGetIOBase(hwp); } -@@ -2257,8 +2380,12 @@ +@@ -2257,8 +2381,12 @@ VIAMapFB(ScrnInfoPtr pScrn) { VIAPtr pVia = VIAPTR(pScrn); @@ -3816,7 +3834,7 @@ Index: src/via_driver.c #endif DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAMapFB\n")); -@@ -2298,7 +2425,8 @@ +@@ -2298,7 +2426,8 @@ #ifdef XSERVER_LIBPCIACCESS err = pci_device_map_range(pVia->PciInfo, pVia->FrameBufferBase, pVia->videoRambytes, @@ -3826,7 +3844,7 @@ Index: src/via_driver.c (void **)&pVia->FBBase); if (err) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, -@@ -2346,8 +2474,7 @@ +@@ -2346,8 +2475,7 @@ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAUnmapMem\n")); @@ -3836,7 +3854,7 @@ Index: src/via_driver.c #ifdef XSERVER_LIBPCIACCESS if (pVia->MapBase) -@@ -2431,75 +2558,65 @@ +@@ -2431,75 +2559,65 @@ { vgaHWPtr hwp = VGAHWPTR(pScrn); VIAPtr pVia = VIAPTR(pScrn); @@ -3951,7 +3969,7 @@ Index: src/via_driver.c for (i = 0; i < numColors; i++) { index = indices[i]; hwp->writeDacWriteAddr(hwp, index); -@@ -2507,6 +2624,23 @@ +@@ -2507,6 +2625,23 @@ hwp->writeDacData(hwp, colors[index].green); hwp->writeDacData(hwp, colors[index].blue); } @@ -3975,7 +3993,7 @@ Index: src/via_driver.c } } -@@ -2543,6 +2677,7 @@ +@@ -2543,6 +2678,7 @@ } } else { vgaHWBlankScreen(pScrn, FALSE); @@ -3983,7 +4001,7 @@ Index: src/via_driver.c if (!VIAWriteMode(pScrn, pScrn->currentMode)) { vgaHWBlankScreen(pScrn, TRUE); return FALSE; -@@ -2623,7 +2758,8 @@ +@@ -2623,7 +2759,8 @@ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- SW cursor set up\n")); if (pVia->hwcursor) { @@ -3993,7 +4011,7 @@ Index: src/via_driver.c xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Hardware cursor initialization failed\n"); } -@@ -2787,6 +2923,7 @@ +@@ -2787,6 +2924,7 @@ VIAWriteMode(ScrnInfoPtr pScrn, DisplayModePtr mode) { VIAPtr pVia = VIAPTR(pScrn); @@ -4001,7 +4019,7 @@ Index: src/via_driver.c DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAWriteMode\n")); -@@ -2799,10 +2936,15 @@ +@@ -2799,10 +2937,15 @@ if (!vgaHWInit(pScrn, mode)) return FALSE; @@ -4021,7 +4039,7 @@ Index: src/via_driver.c } else { -@@ -2813,22 +2955,19 @@ +@@ -2813,22 +2956,19 @@ * to detect when the display is using the secondary head. * TODO: This should be enabled for other chipsets as well. */ @@ -4047,7 +4065,7 @@ Index: src/via_driver.c viaInitialize2DEngine(pScrn); } -@@ -2856,14 +2995,15 @@ +@@ -2856,14 +2996,15 @@ viaAccelSync(pScrn); /* A soft reset avoids a 3D hang after X restart. */ @@ -4066,7 +4084,7 @@ Index: src/via_driver.c } if (pVia->VQEnable) -@@ -2875,10 +3015,6 @@ +@@ -2875,10 +3016,6 @@ #endif viaExitAccel(pScreen); @@ -4077,7 +4095,7 @@ Index: src/via_driver.c if (pVia->ShadowPtr) { xfree(pVia->ShadowPtr); pVia->ShadowPtr = NULL; -@@ -2936,24 +3072,17 @@ +@@ -2936,24 +3073,17 @@ if (pVia->pVbe) { ViaVbeAdjustFrame(scrnIndex, x, y, flags); } else { @@ -4112,7 +4130,7 @@ Index: src/via_driver.c } } -@@ -3003,52 +3132,65 @@ +@@ -3003,52 +3133,65 @@ vgaHWPtr hwp = VGAHWPTR(pScrn); VIAPtr pVia = VIAPTR(pScrn); VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo; @@ -4211,7 +4229,7 @@ Index: src/via_driver.c void VIAInitialize3DEngine(ScrnInfoPtr pScrn) { -@@ -3111,4 +3253,3 @@ +@@ -3111,4 +3254,3 @@ VIASETREG(VIA_REG_TRANSPACE, 0x11000000); VIASETREG(VIA_REG_TRANSPACE, 0x20000000); } @@ -4219,7 +4237,7 @@ Index: src/via_driver.c Index: src/via_crtc.c =================================================================== --- src/via_crtc.c (.../tags/release_0_2_903) (revision 0) -+++ src/via_crtc.c (.../trunk) (revision 740) ++++ src/via_crtc.c (.../trunk) (revision 751) @@ -0,0 +1,659 @@ +/* + * Copyright 2005-2007 The Openchrome Project [openchrome.org] @@ -4882,8 +4900,8 @@ Index: src/via_crtc.c +} Index: src/via_swov.c =================================================================== ---- src/via_swov.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_swov.c (.../trunk) (revision 740) +--- src/via_swov.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_swov.c (.../trunk) (revision 751) @@ -95,7 +95,8 @@ pdwState = (CARD32 volatile *)(pVia->VidMapBase + (HQV_CONTROL + proReg)); @@ -5021,8 +5039,8 @@ Index: src/via_swov.c Index: src/via_driver.h =================================================================== ---- src/via_driver.h (.../tags/release_0_2_903) (revision 740) -+++ src/via_driver.h (.../trunk) (revision 740) +--- src/via_driver.h (.../tags/release_0_2_903) (revision 751) ++++ src/via_driver.h (.../trunk) (revision 751) @@ -65,6 +65,7 @@ #include "via_swov.h" #include "via_dmabuffer.h" @@ -5191,8 +5209,8 @@ Index: src/via_driver.h Bool viaInitAccel(ScreenPtr); Index: src/via_bios.h =================================================================== ---- src/via_bios.h (.../tags/release_0_2_903) (revision 740) -+++ src/via_bios.h (.../trunk) (revision 740) +--- src/via_bios.h (.../tags/release_0_2_903) (revision 751) ++++ src/via_bios.h (.../trunk) (revision 751) @@ -34,6 +34,14 @@ #define VIA_PANEL14X10 5 #define VIA_PANEL16X12 6 @@ -5359,8 +5377,8 @@ Index: src/via_bios.h #endif /* _VIA_BIOS_H_ */ Index: src/via_bandwidth.c =================================================================== ---- src/via_bandwidth.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_bandwidth.c (.../trunk) (revision 740) +--- src/via_bandwidth.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_bandwidth.c (.../trunk) (revision 751) @@ -227,6 +227,10 @@ ViaSeqMask(hwp, 0x18, 0x00, 0x80); break; @@ -5412,7 +5430,7 @@ Index: src/via_bandwidth.c Index: src/via_display.c =================================================================== --- src/via_display.c (.../tags/release_0_2_903) (revision 0) -+++ src/via_display.c (.../trunk) (revision 740) ++++ src/via_display.c (.../trunk) (revision 751) @@ -0,0 +1,145 @@ +#ifdef HAVE_CONFIG_H +#include "config.h" @@ -5561,8 +5579,8 @@ Index: src/via_display.c + Index: src/via_regs.h =================================================================== ---- src/via_regs.h (.../tags/release_0_2_903) (revision 740) -+++ src/via_regs.h (.../trunk) (revision 740) +--- src/via_regs.h (.../tags/release_0_2_903) (revision 751) ++++ src/via_regs.h (.../trunk) (revision 751) @@ -42,7 +42,7 @@ #define VIA_MMIO_REGBASE 0x0 #define VIA_MMIO_VGABASE 0x8000 @@ -5606,7 +5624,7 @@ Index: src/via_regs.h /* defines for VIA video registers */ -@@ -86,6 +113,104 @@ +@@ -86,6 +113,51 @@ #define VIA_REG_CURSOR_FG 0x2E0 @@ -5627,42 +5645,6 @@ Index: src/via_regs.h +#define VIA_REG_ALPHA_FIFO 0x278 +#define VIA_REG_ALPHA_TRANSKEY 0x270 + -+ -+/* These regs move about on diffrent hw */ -+#define VIA_REG_HI_CONTROL1 VIA_REG_ALPHA_CONTROL -+#define VIA_REG_HI_BASE1 VIA_REG_ALPHA_BASE -+#define VIA_REG_HI_POS1 VIA_REG_ALPHA_POS -+#define VIA_REG_HI_OFFSET1 VIA_REG_ALPHA_OFFSET -+#define VIA_REG_HI_FIFO1 VIA_REG_ALPHA_FIFO -+#define VIA_REG_HI_TRANSKEY1 VIA_REG_ALPHA_TRANSKEY -+ -+/* Note that Hardware Icon and Alpha Window overlap */ -+#define VIA_REG_ALPHA_CONTROL 0x260 -+#define VIA_REG_ALPHA_BASE 0x224 -+#define VIA_REG_ALPHA_POS 0x208 -+#define VIA_REG_ALPHA_OFFSET 0x20C -+#define VIA_REG_ALPHA_PREFIFO 0x268 -+#define VIA_REG_ALPHA_FIFO 0x278 -+#define VIA_REG_ALPHA_TRANSKEY 0x270 -+ -+ -+/* These regs move about on diffrent hw */ -+#define VIA_REG_HI_CONTROL1 VIA_REG_ALPHA_CONTROL -+#define VIA_REG_HI_BASE1 VIA_REG_ALPHA_BASE -+#define VIA_REG_HI_POS1 VIA_REG_ALPHA_POS -+#define VIA_REG_HI_OFFSET1 VIA_REG_ALPHA_OFFSET -+#define VIA_REG_HI_FIFO1 VIA_REG_ALPHA_FIFO -+#define VIA_REG_HI_TRANSKEY1 VIA_REG_ALPHA_TRANSKEY -+ -+/* Note that Hardware Icon and Alpha Window overlap */ -+#define VIA_REG_ALPHA_CONTROL 0x260 -+#define VIA_REG_ALPHA_BASE 0x224 -+#define VIA_REG_ALPHA_POS 0x208 -+#define VIA_REG_ALPHA_OFFSET 0x20C -+#define VIA_REG_ALPHA_PREFIFO 0x268 -+#define VIA_REG_ALPHA_FIFO 0x278 -+#define VIA_REG_ALPHA_TRANSKEY 0x270 -+ +/* secret regs */ +#define VIA_REG_HI_CONTROL0 0x2F0 +#define VIA_REG_HI_BASE0 0x2F4 @@ -5671,23 +5653,6 @@ Index: src/via_regs.h +#define VIA_REG_HI_FIFO0 0x2E8 +#define VIA_REG_HI_TRANSKEY0 0x2EC + -+/* These regs move about on diffrent hw */ -+#define VIA_REG_HI_CONTROL1 VIA_REG_ALPHA_CONTROL -+#define VIA_REG_HI_BASE1 VIA_REG_ALPHA_BASE -+#define VIA_REG_HI_POS1 VIA_REG_ALPHA_POS -+#define VIA_REG_HI_OFFSET1 VIA_REG_ALPHA_OFFSET -+#define VIA_REG_HI_FIFO1 VIA_REG_ALPHA_FIFO -+#define VIA_REG_HI_TRANSKEY1 VIA_REG_ALPHA_TRANSKEY -+ -+/* Note that Hardware Icon and Alpha Window overlap */ -+#define VIA_REG_ALPHA_CONTROL 0x260 -+#define VIA_REG_ALPHA_BASE 0x224 -+#define VIA_REG_ALPHA_POS 0x208 -+#define VIA_REG_ALPHA_OFFSET 0x20C -+#define VIA_REG_ALPHA_PREFIFO 0x268 -+#define VIA_REG_ALPHA_FIFO 0x278 -+#define VIA_REG_ALPHA_TRANSKEY 0x270 -+ +/*CN400 and older Hardware Icon engine register*/ +#define VIA_REG_HI_POSSTART 0x208 +#define VIA_REG_HI_CENTEROFFSET 0x20C @@ -5711,7 +5676,7 @@ Index: src/via_regs.h /* defines for VIA 3D registers */ #define VIA_REG_STATUS 0x400 #define VIA_REG_TRANSET 0x43C -@@ -97,6 +222,11 @@ +@@ -97,6 +169,11 @@ #define VIA_3D_ENG_BUSY 0x00000001 /* 3D Engine is busy */ #define VIA_VR_QUEUE_BUSY 0x00020000 /* Virtual Queue is busy */ @@ -5725,8 +5690,8 @@ Index: src/via_regs.h #define VIA_GEC_NOOP 0x00000000 Index: src/via_accel.c =================================================================== ---- src/via_accel.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_accel.c (.../trunk) (revision 740) +--- src/via_accel.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_accel.c (.../trunk) (revision 751) @@ -1,5 +1,5 @@ /* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. @@ -6653,8 +6618,8 @@ Index: src/via_accel.c ADVANCE_RING; Index: src/via_memory.c =================================================================== ---- src/via_memory.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_memory.c (.../trunk) (revision 740) +--- src/via_memory.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_memory.c (.../trunk) (revision 751) @@ -52,7 +52,6 @@ * 2 - DRM */ @@ -6717,8 +6682,8 @@ Index: src/via_memory.c long size = pVia->FBFreeEnd / pVia->Bpp - offset; Index: src/via_vbe.c =================================================================== ---- src/via_vbe.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_vbe.c (.../trunk) (revision 740) +--- src/via_vbe.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_vbe.c (.../trunk) (revision 751) @@ -95,7 +95,7 @@ /* Set Active Device and translate BIOS byte definition. */ if (pBIOSInfo->CrtActive) @@ -6748,8 +6713,8 @@ Index: src/via_vbe.c VBEDPMSSet(pVia->pVbe, mode); Index: src/via_cursor.c =================================================================== ---- src/via_cursor.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_cursor.c (.../trunk) (revision 740) +--- src/via_cursor.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_cursor.c (.../trunk) (revision 751) @@ -1,5 +1,6 @@ /* - * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved. @@ -7314,8 +7279,8 @@ Index: src/via_cursor.c } Index: src/via_xvmc.c =================================================================== ---- src/via_xvmc.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_xvmc.c (.../trunk) (revision 740) +--- src/via_xvmc.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_xvmc.c (.../trunk) (revision 751) @@ -114,11 +114,7 @@ static int viaXvMCInterceptPutImage(ScrnInfoPtr, short, short, short, short, short, short, short, short, int, @@ -7329,7 +7294,15 @@ Index: src/via_xvmc.c static int viaXvMCInterceptXvGetAttribute(ScrnInfoPtr pScrn, Atom attribute, INT32 * value, pointer data); -@@ -923,11 +919,7 @@ +@@ -325,6 +321,7 @@ + + if ((pVia->Chipset == VIA_KM400) || + (pVia->Chipset == VIA_CX700) || ++ (pVia->Chipset == VIA_VX800) || + (pVia->Chipset == VIA_K8M890) || + (pVia->Chipset == VIA_P4M900)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, +@@ -923,11 +920,7 @@ short src_h, short drw_w, short drw_h, int id, unsigned char *buf, short width, short height, Bool sync, RegionPtr clipBoxes, @@ -7342,7 +7315,7 @@ Index: src/via_xvmc.c { viaPortPrivPtr pPriv = (viaPortPrivPtr) data; ViaXvMCXVPriv *vx = (ViaXvMCXVPriv *) pPriv->xvmc_priv; -@@ -984,11 +976,7 @@ +@@ -984,11 +977,7 @@ } return vx->PutImage(pScrn, src_x, src_y, drw_x, drw_y, src_w, src_h, drw_w, drw_h, id, buf, width, height, sync, clipBoxes, @@ -7355,10 +7328,32 @@ Index: src/via_xvmc.c } unsigned long +Index: src/via_dri.c +=================================================================== +--- src/via_dri.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_dri.c (.../trunk) (revision 751) +@@ -588,7 +588,16 @@ + + pDRIInfo = pVia->pDRIInfo; + pDRIInfo->drmDriverName = VIAKernelDriverName; +- pDRIInfo->clientDriverName = VIAClientDriverName; ++ switch (pVia->Chipset) { ++ case VIA_K8M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ pDRIInfo->clientDriverName = "swrast"; ++ break; ++ default: ++ pDRIInfo->clientDriverName = VIAClientDriverName; ++ break; ++ } + pDRIInfo->busIdString = xalloc(64); + sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d", + #ifdef XSERVER_LIBPCIACCESS Index: src/via_vt162x.h =================================================================== ---- src/via_vt162x.h (.../tags/release_0_2_903) (revision 740) -+++ src/via_vt162x.h (.../trunk) (revision 740) +--- src/via_vt162x.h (.../tags/release_0_2_903) (revision 751) ++++ src/via_vt162x.h (.../trunk) (revision 751) @@ -926,6 +926,23 @@ 0x0, 0x0, }, @@ -7385,8 +7380,8 @@ Index: src/via_vt162x.h { 0x03, 0x00, 0x10, 0x1f, 0x03, 0x00, 0x00, 0xc9, 0x4c, 0x11, 0x7c, 0x00, 0x56, 0x57, 0x07, 0xbf, Index: src/via.h =================================================================== ---- src/via.h (.../tags/release_0_2_903) (revision 740) -+++ src/via.h (.../trunk) (revision 740) +--- src/via.h (.../tags/release_0_2_903) (revision 751) ++++ src/via.h (.../trunk) (revision 751) @@ -561,9 +561,6 @@ #define HQV_V_FILTER_DEFAULT 0x00420000 #define HQV_H_FILTER_DEFAULT 0x00000040 @@ -7419,8 +7414,8 @@ Index: src/via.h #define CHROMA_KEY_HIGH 0x00FFFFFF Index: src/via_priv.h =================================================================== ---- src/via_priv.h (.../tags/release_0_2_903) (revision 740) -+++ src/via_priv.h (.../trunk) (revision 740) +--- src/via_priv.h (.../tags/release_0_2_903) (revision 751) ++++ src/via_priv.h (.../trunk) (revision 751) @@ -29,9 +29,7 @@ #ifdef XF86DRI #include "via_drm.h" @@ -7444,7 +7439,7 @@ Index: src/via_priv.h Index: src/via_timing.c =================================================================== --- src/via_timing.c (.../tags/release_0_2_903) (revision 0) -+++ src/via_timing.c (.../trunk) (revision 740) ++++ src/via_timing.c (.../trunk) (revision 751) @@ -0,0 +1,398 @@ +/* + * Copyright 2007-2008 Gabriel Mansi. @@ -7846,8 +7841,8 @@ Index: src/via_timing.c +} Index: src/Makefile.am =================================================================== ---- src/Makefile.am (.../tags/release_0_2_903) (revision 740) -+++ src/Makefile.am (.../trunk) (revision 740) +--- src/Makefile.am (.../tags/release_0_2_903) (revision 751) ++++ src/Makefile.am (.../trunk) (revision 751) @@ -43,23 +43,29 @@ via_ch7xxx.c \ via_ch7xxx.h \ @@ -7880,8 +7875,8 @@ Index: src/Makefile.am via_vgahw.h \ Index: src/via_dga.c =================================================================== ---- src/via_dga.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_dga.c (.../trunk) (revision 740) +--- src/via_dga.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_dga.c (.../trunk) (revision 751) @@ -248,7 +248,7 @@ pScrn->SwitchMode(index, pScrn->currentMode, 0); @@ -7902,8 +7897,8 @@ Index: src/via_dga.c pVia->DGAOldDisplayWidth = pScrn->displayWidth; Index: src/via_id.c =================================================================== ---- src/via_id.c (.../tags/release_0_2_903) (revision 740) -+++ src/via_id.c (.../trunk) (revision 740) +--- src/via_id.c (.../tags/release_0_2_903) (revision 751) ++++ src/via_id.c (.../trunk) (revision 751) @@ -87,6 +87,7 @@ {"Asustek K8V-MX", VIA_K8M800, 0x1043, 0x8129, VIA_DEVICE_CRT}, {"Mitac 8399", VIA_K8M800, 0x1071, 0x8399, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV}, /* aka "Pogolinux Konabook 3100" */ @@ -7920,7 +7915,15 @@ Index: src/via_id.c /*** PM800, PM880, PN800, CN400 ***/ {"VIA VT3118 (PM800)", VIA_PM800, 0x1106, 0x3118, VIA_DEVICE_CRT}, /* borrowed by ECS PM800-M2 */ -@@ -145,6 +147,7 @@ +@@ -138,6 +140,7 @@ + {"PCChips V21G", VIA_VM800, 0x1019, 0xAA51, VIA_DEVICE_CRT}, + {"Asustek P5VDC-MX", VIA_VM800, 0x1043, 0x3344, VIA_DEVICE_CRT}, + {"Asustek P5VDC-TVM", VIA_VM800, 0x1043, 0x81CE, VIA_DEVICE_CRT}, ++ {"Foxconn P4M800P7MB-RS2H", VIA_VM800, 0x105B, 0x0CF0, VIA_DEVICE_CRT}, + {"Gateway MX3210", VIA_VM800, 0x107B, 0x0216, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, + {"VIA VT3344 (VM800) - EPIA EN", VIA_VM800, 0x1106, 0x3344, VIA_DEVICE_CRT | VIA_DEVICE_TV}, + {"Gigabyte GA-8VM800M-775", VIA_VM800, 0x1458, 0xD000, VIA_DEVICE_CRT}, +@@ -145,6 +148,7 @@ {"MSI Fuzzy CN700/CN700T/CN700G", VIA_VM800, 0x1462, 0x7199, VIA_DEVICE_CRT | VIA_DEVICE_TV}, {"MSI PM8M3-V", VIA_VM800, 0x1462, 0x7211, VIA_DEVICE_CRT}, {"MSI PM8PM", VIA_VM800, 0x1462, 0x7222, VIA_DEVICE_CRT}, @@ -7928,7 +7931,7 @@ Index: src/via_id.c {"RoverBook Partner W500", VIA_VM800, 0x1509, 0x4330, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, {"Clevo/RoverBook Voyager V511L", VIA_VM800, 0x1558, 0x0662, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, {"Clevo M5xxS", VIA_VM800, 0x1558, 0x5406, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, -@@ -158,6 +161,7 @@ +@@ -158,6 +162,7 @@ {"Asustek P5V800-MX", VIA_VM800, 0x3344, 0x1122, VIA_DEVICE_CRT}, /*** K8M890 ***/ @@ -7936,14 +7939,15 @@ Index: src/via_id.c {"Asustek A8V-VM", VIA_K8M890, 0x1043, 0x81B5, VIA_DEVICE_CRT}, {"Asustek M2V-MX SE", VIA_K8M890, 0x1043, 0x8297, VIA_DEVICE_CRT}, {"Foxconn K8M890M2MA-RS2H", VIA_K8M890, 0x105B, 0x0C84, VIA_DEVICE_CRT}, -@@ -190,12 +194,13 @@ - {"ASRock P4VM900-SATA2", VIA_P4M900, 0x1849, 0x3371, VIA_DEVICE_CRT}, - - /*** CX700 ***/ -- {"VIA VT8454B", VIA_CX700, 0x0908, 0x1975, VIA_DEVICE_CRT}, /* Evaluation board, reference possibly wrong */ -+ {"VIA VT8454B", VIA_CX700, 0x0908, 0x1975, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, /* Evaluation board, reference possibly wrong */ - {"VIA VT3324 (CX700)", VIA_CX700, 0x1106, 0x3157, VIA_DEVICE_CRT}, - {"MSI Fuzzy CX700/CX700D", VIA_CX700, 0x1462, 0x8020, VIA_DEVICE_CRT | VIA_DEVICE_LCD | VIA_DEVICE_TV}, +@@ -179,6 +184,7 @@ + {"Gigabyte GA-VM900M", VIA_P4M900, 0x1458, 0xD000, VIA_DEVICE_CRT}, + {"MSI VR321", VIA_P4M900, 0x1462, 0x3355, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, + {"MSI P4M900M / P4M900M2-F/L", VIA_P4M900, 0x1462, 0x7255, VIA_DEVICE_CRT}, ++ {"MSI P4M900M3-L", VIA_P4M900, 0x1462, 0x7387, VIA_DEVICE_CRT}, + {"Everex NC1501/NC1503", VIA_P4M900, 0x1509, 0x1E30, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, + {"Clevo M660SE", VIA_P4M900, 0x1558, 0x0664, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, + {"Clevo M660SR", VIA_P4M900, 0x1558, 0x0669, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, +@@ -196,6 +202,7 @@ {"Samsung Q1B", VIA_CX700, 0x144D, 0xC02C, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, {"FIC CE260", VIA_CX700, 0x1509, 0x2D30, VIA_DEVICE_LCD}, {"FIC CE261", VIA_CX700, 0x1509, 0x2F07, VIA_DEVICE_LCD}, @@ -7951,7 +7955,7 @@ Index: src/via_id.c {"Packard Bell EasyNote XS", VIA_CX700, 0x1631, 0xC201, VIA_DEVICE_LCD}, /* aka Everex Cloudbook CE1200V */ /*** P4M890, VN890 ***/ -@@ -204,11 +209,17 @@ +@@ -204,11 +211,17 @@ {"Asustek P5V-VM ULTRA", VIA_P4M890, 0x1043, 0x81B5, VIA_DEVICE_CRT}, {"Asustek P5V-VM DH", VIA_P4M890, 0x1043, 0x81CE, VIA_DEVICE_CRT}, {"Mitac 8615", VIA_P4M890, 0x1071, 0x8615, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, @@ -7972,7 +7976,7 @@ Index: src/via_id.c Index: src/via_timing.h =================================================================== --- src/via_timing.h (.../tags/release_0_2_903) (revision 0) -+++ src/via_timing.h (.../trunk) (revision 740) ++++ src/via_timing.h (.../trunk) (revision 751) @@ -0,0 +1,51 @@ +/* + * Copyright 2007-2008 Gabriel Mansi. diff --git a/openchrome-0.2.903-pll_rework.patch b/openchrome-0.2.903-pll_rework.patch new file mode 100644 index 0000000..ad07862 --- /dev/null +++ b/openchrome-0.2.903-pll_rework.patch @@ -0,0 +1,294 @@ +--- src/via_mode.c 2009-06-16 23:17:42.000000000 +0200 ++++ src/via_mode.c 2009-06-16 22:43:58.000000000 +0200 +@@ -974,21 +974,35 @@ + * + */ + static void +-ViaSetPrimaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) ++ViaSetDotclock(ScrnInfoPtr pScrn, CARD32 clock, int base, int probase) + { + vgaHWPtr hwp = VGAHWPTR(pScrn); + VIAPtr pVia = VIAPTR(pScrn); + + DEBUG(xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, +- "ViaSetPrimaryDotclock to 0x%06x\n", (unsigned)clock)); ++ "ViaSetDotclock to 0x%06x\n", (unsigned)clock)); + + if ((pVia->Chipset == VIA_CLE266) || (pVia->Chipset == VIA_KM400)) { +- hwp->writeSeq(hwp, 0x46, clock >> 8); +- hwp->writeSeq(hwp, 0x47, clock & 0xFF); ++ hwp->writeSeq(hwp, base, clock >> 8); ++ hwp->writeSeq(hwp, base+1, clock & 0xFF); + } else { /* unichrome pro */ +- hwp->writeSeq(hwp, 0x44, clock >> 16); +- hwp->writeSeq(hwp, 0x45, (clock >> 8) & 0xFF); +- hwp->writeSeq(hwp, 0x46, clock & 0xFF); ++ union pllparams pll; ++ int dtz, dr, dn, dm; ++ pll.packed = clock; ++ dtz = pll.params.dtz; ++ dr = pll.params.dr; ++ dn = pll.params.dn; ++ dm = pll.params.dm; ++ ++ /* The VX855 does not modify dm/dn, but earlier chipsets do. */ ++ if (pVia->Chipset != VIA_VX855) { ++ dm -= 2; ++ dn -= 2; ++ } ++ ++ hwp->writeSeq(hwp, probase, dm & 0xff); ++ hwp->writeSeq(hwp, probase+1, ((dm >> 8) & 0x03) | (dr << 2) | ((dtz & 1) << 7)); ++ hwp->writeSeq(hwp, probase+2, (dn & 0x7f) | ((dtz & 2) << 6)); + } + + ViaSeqMask(hwp, 0x40, 0x02, 0x02); +@@ -999,25 +1013,28 @@ + * + */ + static void +-ViaSetSecondaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) ++ViaSetPrimaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) + { +- vgaHWPtr hwp = VGAHWPTR(pScrn); +- VIAPtr pVia = VIAPTR(pScrn); +- +- DEBUG(xf86DrvMsg(hwp->pScrn->scrnIndex, X_INFO, +- "ViaSetSecondaryDotclock to 0x%06x\n", (unsigned)clock)); ++ ViaSetDotclock(pScrn, clock, 0x46, 0x44); ++} + +- if ((pVia->Chipset == VIA_CLE266) || (pVia->Chipset == VIA_KM400)) { +- hwp->writeSeq(hwp, 0x44, clock >> 8); +- hwp->writeSeq(hwp, 0x45, clock & 0xFF); +- } else { /* unichrome pro */ +- hwp->writeSeq(hwp, 0x4A, clock >> 16); +- hwp->writeSeq(hwp, 0x4B, (clock >> 8) & 0xFF); +- hwp->writeSeq(hwp, 0x4C, clock & 0xFF); +- } ++/* ++ * ++ */ ++static void ++ViaSetSecondaryDotclock(ScrnInfoPtr pScrn, CARD32 clock) ++{ ++ ViaSetDotclock(pScrn, clock, 0x44, 0x4A); ++} + +- ViaSeqMask(hwp, 0x40, 0x04, 0x04); +- ViaSeqMask(hwp, 0x40, 0x00, 0x04); ++/* ++ * ++ */ ++static void ++ViaSetECKDotclock(ScrnInfoPtr pScrn, CARD32 clock) ++{ ++ /* Does the non-pro chip have an ECK clock ? */ ++ ViaSetDotclock(pScrn, clock, 0, 0x47); + } + + /* +@@ -1287,15 +1304,16 @@ + { + double fvco, fout, fref, err, minErr; + CARD32 dr = 0, dn, dm, maxdm, maxdn; +- CARD32 factual, bestClock; +- ++ CARD32 factual; ++ union pllparams bestClock; ++ + fref = 14.318e6; + fout = (double)clock * 1.e3; + + factual = ~0; +- maxdm = factual / 14318000U - 2; ++ maxdm = factual / 14318000U; + minErr = 1.e10; +- bestClock = 0U; ++ bestClock.packed = 0U; + + do { + fvco = fout * (1 << dr); +@@ -1306,30 +1324,31 @@ + } + + if (clock < 30000) +- maxdn = 6; ++ maxdn = 8; + else if (clock < 45000) +- maxdn = 5; ++ maxdn = 7; + else if (clock < 170000) +- maxdn = 4; ++ maxdn = 6; + else +- maxdn = 3; ++ maxdn = 5; + +- for (dn = 0; dn < maxdn; ++dn) { +- for (dm = 0; dm < maxdm; ++dm) { +- factual = 14318000U * (dm + 2); +- factual /= (dn + 2) << dr; ++ for (dn = 2; dn < maxdn; ++dn) { ++ for (dm = 2; dm < maxdm; ++dm) { ++ factual = 14318000U * dm; ++ factual /= dn << dr; + if ((err = fabs((double)factual / fout - 1.)) < 0.005) { + if (err < minErr) { + minErr = err; +- bestClock = ((dm & 0xff) << 16) | +- (((1 << 7) | (dr << 2) | ((dm & 0x300) >> 8)) << 8) +- | (dn & 0x7f); ++ bestClock.params.dtz = 1; ++ bestClock.params.dr = dr; ++ bestClock.params.dn = dn; ++ bestClock.params.dm = dm; + } + } + } + } + +- return bestClock; ++ return bestClock.packed; + } + + /* +@@ -1356,15 +1375,10 @@ + "ViaComputeDotClock %d : %04x : %04x\n", + mode->Clock, best1, best2)); + return best2; +- } else if (pVia->Chipset == VIA_VX855) { +- for (i = 0; ViaDotClocks[i].DotClock; i++) +- if (ViaDotClocks[i].DotClock == mode->Clock && +- ViaDotClocks[i].Chrome9HCM) +- return ViaDotClocks[i].Chrome9HCM; + } else { + for (i = 0; ViaDotClocks[i].DotClock; i++) + if (ViaDotClocks[i].DotClock == mode->Clock) +- return ViaDotClocks[i].UniChromePro; ++ return ViaDotClocks[i].UniChromePro.packed; + return ViaComputeProDotClock(mode->Clock); + } + +--- src/via_mode.h 2009-06-16 23:08:20.000000000 +0200 ++++ src/via_mode.h 2009-06-16 22:43:58.000000000 +0200 +@@ -35,7 +35,16 @@ + #define VIA_BW_DDR400 498000000 /* > 1920x1080@60Hz@32bpp */ + #define VIA_BW_DDR667 922000000 + +- ++union pllparams { ++ struct { ++ CARD32 dtz : 2; ++ CARD32 dr : 3; ++ CARD32 dn : 7; ++ CARD32 dm :10; ++ } params; ++ CARD32 packed; ++}; ++ + /* + * simple lookup table for dotclocks + * +@@ -43,57 +52,51 @@ + static struct ViaDotClock { + int DotClock; + CARD16 UniChrome; +- CARD32 UniChromePro; +- CARD32 Chrome9HCM; ++ union pllparams UniChromePro; + } ViaDotClocks[] = { +- { 25200, 0x513C, 0xa79004 }, +- { 25312, 0xC763, 0xc49005 }, +- { 26591, 0x471A, 0xce9005 }, +- { 31500, 0xC558, 0xae9003, 0xb01005 }, +- { 31704, 0x471F, 0xaf9002 }, +- { 32663, 0xC449, 0x479000 }, +- { 33750, 0x4721, 0x959002, 0x921004 }, +- { 35500, 0x5877, 0x759001 }, +- { 36000, 0x5879, 0x9f9002, 0xa11004 }, +- { 39822, 0xC459, 0x578c02 }, +- { 40000, 0x515F, 0x848c04, 0x700c05 }, +- { 41164, 0x4417, 0x2c8c00 }, +- { 46981, 0x5069, 0x678c02, 0x690c04 }, +- { 49500, 0xC353, 0xa48c04, 0x530c03 }, +- { 50000, 0xC354, 0x368c00 }, +- { 56300, 0x4F76, 0x3d8c00, 0x9d0c05 }, +- { 57284, 0x4E70, 0x3e8c00 }, +- { 64995, 0x0D3B, 0x6b8c01, 0x6d0c03 }, +- { 65000, 0x0D3B, 0x6b8c01, 0x6d0c03 }, /* Slightly unstable on PM800 */ +- { 65028, 0x866D, 0x6b8c01 }, +- { 74480, 0x156E, 0x288800, 0xd10c05 }, +- { 75000, 0x156E, 0x288800 }, +- { 78800, 0x442C, 0x2a8800, 0x6e0805 }, +- { 81135, 0x0622, 0x428801 }, +- { 81613, 0x4539, 0x708803, 0x720805 }, +- { 94500, 0x4542, 0x4d8801, 0x840805 }, +- { 108000, 0x0B53, 0x778802, 0x970805 }, +- { 108280, 0x4879, 0x778802 }, +- { 122000, 0x0D6F, 0x428800 }, +- { 122726, 0x073C, 0x878802, 0xac0805 }, +- { 135000, 0x0742, 0x6f8801, 0xbd0805}, +- { 148500, 0x0853, 0x518800, 0xd00805}, +- { 155800, 0x0857, 0x558402 }, +- { 157500, 0x422C, 0x2a8400, 0x6e0405 }, +- { 161793, 0x4571, 0x6f8403 }, +- { 162000, 0x0A71, 0x6f8403, 0x710405 }, +- { 175500, 0x4231, 0x2f8400 }, +- { 189000, 0x0542, 0x4d8401 }, +- { 202500, 0x0763, 0x6F8402, 0x8e0405 }, +- { 204800, 0x0764, 0x548401 }, +- { 218300, 0x043D, 0x3b8400, 0x990405 }, +- { 229500, 0x0660, 0x3e8400, 0xa10405 }, /* Not tested on Pro */ +- { 234000, 0, 0xa20403, 0xa40405 }, +- { 267250, 0, 0xb90403, 0xbb0405 }, +- { 297500, 0, 0xce0403, 0xd00405 }, +- { 339500, 0, 0x5d0002, 0x770005 }, +- { 340772, 0, 0x750003, 0x770005 }, +- { 0, 0, 0 } ++ { 25200, 0x513C, /* 0xa79004 */ { 1, 4, 6, 169 } }, ++ { 25312, 0xC763, /* 0xc49005 */ { 1, 4, 7, 198 } }, ++ { 26591, 0x471A, /* 0xce9005 */ { 1, 4, 7, 208 } }, ++ { 31500, 0xC558, /* 0xae9003 */ { 1, 4, 5, 176 } }, ++ { 31704, 0x471F, /* 0xaf9002 */ { 1, 4, 4, 177 } }, ++ { 32663, 0xC449, /* 0x479000 */ { 1, 4, 2, 73 } }, ++ { 33750, 0x4721, /* 0x959002 */ { 1, 4, 4, 151 } }, ++ { 35500, 0x5877, /* 0x759001 */ { 1, 4, 3, 119 } }, ++ { 36000, 0x5879, /* 0x9f9002 */ { 1, 4, 4, 161 } }, ++ { 39822, 0xC459, /* 0x578c02 */ { 1, 3, 4, 89 } }, ++ { 40000, 0x515F, /* 0x848c04 */ { 1, 3, 6, 134 } }, ++ { 41164, 0x4417, /* 0x2c8c00 */ { 1, 3, 2, 46 } }, ++ { 46981, 0x5069, /* 0x678c02 */ { 1, 3, 4, 105 } }, ++ { 49500, 0xC353, /* 0xa48c04 */ { 3, 3, 5, 138 } }, ++ { 50000, 0xC354, /* 0x368c00 */ { 1, 3, 2, 56 } }, ++ { 56300, 0x4F76, /* 0x3d8c00 */ { 1, 3, 2, 63 } }, ++ { 57284, 0x4E70, /* 0x3e8c00 */ { 1, 3, 2, 64 } }, ++ { 64995, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, ++ { 65000, 0x0D3B, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, /* Slightly unstable on PM800 */ ++ { 65028, 0x866D, /* 0x6b8c01 */ { 1, 3, 3, 109 } }, ++ { 74480, 0x156E, /* 0x288800 */ { 1, 2, 2, 42 } }, ++ { 75000, 0x156E, /* 0x288800 */ { 1, 2, 2, 42 } }, ++ { 78800, 0x442C, /* 0x2a8800 */ { 1, 2, 2, 44 } }, ++ { 81135, 0x0622, /* 0x428801 */ { 1, 2, 3, 68 } }, ++ { 81613, 0x4539, /* 0x708803 */ { 1, 2, 5, 114 } }, ++ { 94500, 0x4542, /* 0x4d8801 */ { 1, 2, 3, 79 } }, ++ { 108000, 0x0B53, /* 0x778802 */ { 1, 2, 4, 121 } }, ++ { 108280, 0x4879, /* 0x778802 */ { 1, 2, 4, 121 } }, ++ { 122000, 0x0D6F, /* 0x428800 */ { 1, 2, 2, 68 } }, ++ { 122726, 0x073C, /* 0x878802 */ { 1, 2, 4, 137 } }, ++ { 135000, 0x0742, /* 0x6f8801 */ { 1, 2, 3, 113 } }, ++ { 148500, 0x0853, /* 0x518800 */ { 1, 2, 2, 83 } }, ++ { 155800, 0x0857, /* 0x558402 */ { 1, 1, 4, 87 } }, ++ { 157500, 0x422C, /* 0x2a8400 */ { 1, 1, 2, 44 } }, ++ { 161793, 0x4571, /* 0x6f8403 */ { 1, 1, 5, 113 } }, ++ { 162000, 0x0A71, /* 0x6f8403 */ { 1, 1, 5, 113 } }, ++ { 175500, 0x4231, /* 0x2f8400 */ { 1, 1, 2, 49 } }, ++ { 189000, 0x0542, /* 0x4d8401 */ { 1, 1, 3, 79 } }, ++ { 202500, 0x0763, /* 0x6F8402 */ { 1, 1, 4, 113 } }, ++ { 204800, 0x0764, /* 0x548401 */ { 1, 1, 3, 86 } }, ++ { 218300, 0x043D, /* 0x3b8400 */ { 1, 1, 2, 61 } }, ++ { 229500, 0x0660, /* 0x3e8400 */ { 1, 1, 2, 64 } }, /* Not tested on Pro } */ ++ { 0, 0, { 0, 0, 0, 0 } } + }; + + /* diff --git a/openchrome-0.2.903-vx855_support.patch b/openchrome-0.2.903-vx855_support.patch new file mode 100644 index 0000000..06749a7 --- /dev/null +++ b/openchrome-0.2.903-vx855_support.patch @@ -0,0 +1,678 @@ +Index: src/via_id.h +=================================================================== +--- src/via_id.h (revision 751) ++++ src/via_id.h (working copy) +@@ -38,6 +38,7 @@ + VIA_CX700, + VIA_P4M890, + VIA_VX800, ++ VIA_VX855, + VIA_LAST + }; + +@@ -54,6 +55,7 @@ + #define PCI_CHIP_VT3324 0x3157 /* CX700 */ + #define PCI_CHIP_VT3327 0x3343 /* P4M890 */ + #define PCI_CHIP_VT3353 0x1122 /* VX800 */ ++#define PCI_CHIP_VT3409 0x5122 /* VX855/VX875 */ + + /* There is some conflicting information about the two major revisions of + * the CLE266, often labelled Ax and Cx. The dividing line seems to be +Index: src/via_video.c +=================================================================== +--- src/via_video.c (revision 751) ++++ src/via_video.c (working copy) +@@ -277,6 +277,7 @@ + pVia->ChipId != PCI_CHIP_VT3314 && + pVia->ChipId != PCI_CHIP_VT3327 && + pVia->ChipId != PCI_CHIP_VT3336 && ++ pVia->ChipId != PCI_CHIP_VT3409 && + pVia->ChipId != PCI_CHIP_VT3364 && + pVia->ChipId != PCI_CHIP_VT3324 && + pVia->ChipId != PCI_CHIP_VT3353) { +Index: src/via_mode.c +=================================================================== +--- src/via_mode.c (revision 751) ++++ src/via_mode.c (working copy) +@@ -371,17 +371,20 @@ + } + } + +- if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) { +- +- if (ViaDFPDetect(pScrn)) { +- pBIOSInfo->DfpPresent = TRUE; +- xf86DrvMsg(pScrn->scrnIndex, X_INFO, +- "DFP is connected.\n"); +- } else { +- pBIOSInfo->DfpPresent = FALSE; +- xf86DrvMsg(pScrn->scrnIndex, X_INFO, +- "DFP is disconnected.\n"); +- } ++ switch (pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_VX800: ++ case VIA_VX855: ++ if (ViaDFPDetect(pScrn)) { ++ pBIOSInfo->DfpPresent = TRUE; ++ xf86DrvMsg(pScrn->scrnIndex, X_INFO, ++ "DFP is connected.\n"); ++ } else { ++ pBIOSInfo->DfpPresent = FALSE; ++ xf86DrvMsg(pScrn->scrnIndex, X_INFO, ++ "DFP is disconnected.\n"); ++ } ++ break; + } + } + +@@ -496,8 +499,14 @@ + pBIOSInfo->FirstCRTC->IsActive = TRUE ; + if (pBIOSInfo->Panel->IsActive) { + pVia->pBIOSInfo->SecondCRTC->IsActive = TRUE ; +- if (pVia->Chipset == VIA_P4M900 || pVia->Chipset == VIA_CX700 || pVia->Chipset == VIA_VX800 ) +- pVia->pBIOSInfo->Lvds->IsActive = TRUE ; ++ switch (pVia->Chipset) { ++ case VIA_P4M900: ++ case VIA_CX700: ++ case VIA_VX800: ++ case VIA_VX855: ++ pVia->pBIOSInfo->Lvds->IsActive = TRUE ; ++ break; ++ } + } + } + +@@ -1347,6 +1356,11 @@ + "ViaComputeDotClock %d : %04x : %04x\n", + mode->Clock, best1, best2)); + return best2; ++ } else if (pVia->Chipset == VIA_VX855) { ++ for (i = 0; ViaDotClocks[i].DotClock; i++) ++ if (ViaDotClocks[i].DotClock == mode->Clock && ++ ViaDotClocks[i].Chrome9HCM) ++ return ViaDotClocks[i].Chrome9HCM; + } else { + for (i = 0; ViaDotClocks[i].DotClock; i++) + if (ViaDotClocks[i].DotClock == mode->Clock) +Index: src/via_mode.h +=================================================================== +--- src/via_mode.h (revision 751) ++++ src/via_mode.h (working copy) +@@ -44,49 +44,55 @@ + int DotClock; + CARD16 UniChrome; + CARD32 UniChromePro; ++ CARD32 Chrome9HCM; + } ViaDotClocks[] = { + { 25200, 0x513C, 0xa79004 }, + { 25312, 0xC763, 0xc49005 }, + { 26591, 0x471A, 0xce9005 }, +- { 31500, 0xC558, 0xae9003 }, ++ { 31500, 0xC558, 0xae9003, 0xb01005 }, + { 31704, 0x471F, 0xaf9002 }, + { 32663, 0xC449, 0x479000 }, +- { 33750, 0x4721, 0x959002 }, ++ { 33750, 0x4721, 0x959002, 0x921004 }, + { 35500, 0x5877, 0x759001 }, +- { 36000, 0x5879, 0x9f9002 }, ++ { 36000, 0x5879, 0x9f9002, 0xa11004 }, + { 39822, 0xC459, 0x578c02 }, +- { 40000, 0x515F, 0x848c04 }, ++ { 40000, 0x515F, 0x848c04, 0x700c05 }, + { 41164, 0x4417, 0x2c8c00 }, +- { 46981, 0x5069, 0x678c02 }, +- { 49500, 0xC353, 0xa48c04 }, ++ { 46981, 0x5069, 0x678c02, 0x690c04 }, ++ { 49500, 0xC353, 0xa48c04, 0x530c03 }, + { 50000, 0xC354, 0x368c00 }, +- { 56300, 0x4F76, 0x3d8c00 }, ++ { 56300, 0x4F76, 0x3d8c00, 0x9d0c05 }, + { 57284, 0x4E70, 0x3e8c00 }, +- { 64995, 0x0D3B, 0x6b8c01 }, +- { 65000, 0x0D3B, 0x6b8c01 }, /* Slightly unstable on PM800 */ ++ { 64995, 0x0D3B, 0x6b8c01, 0x6d0c03 }, ++ { 65000, 0x0D3B, 0x6b8c01, 0x6d0c03 }, /* Slightly unstable on PM800 */ + { 65028, 0x866D, 0x6b8c01 }, +- { 74480, 0x156E, 0x288800 }, ++ { 74480, 0x156E, 0x288800, 0xd10c05 }, + { 75000, 0x156E, 0x288800 }, +- { 78800, 0x442C, 0x2a8800 }, ++ { 78800, 0x442C, 0x2a8800, 0x6e0805 }, + { 81135, 0x0622, 0x428801 }, +- { 81613, 0x4539, 0x708803 }, +- { 94500, 0x4542, 0x4d8801 }, +- { 108000, 0x0B53, 0x778802 }, ++ { 81613, 0x4539, 0x708803, 0x720805 }, ++ { 94500, 0x4542, 0x4d8801, 0x840805 }, ++ { 108000, 0x0B53, 0x778802, 0x970805 }, + { 108280, 0x4879, 0x778802 }, + { 122000, 0x0D6F, 0x428800 }, +- { 122726, 0x073C, 0x878802 }, +- { 135000, 0x0742, 0x6f8801 }, +- { 148500, 0x0853, 0x518800 }, ++ { 122726, 0x073C, 0x878802, 0xac0805 }, ++ { 135000, 0x0742, 0x6f8801, 0xbd0805}, ++ { 148500, 0x0853, 0x518800, 0xd00805}, + { 155800, 0x0857, 0x558402 }, +- { 157500, 0x422C, 0x2a8400 }, ++ { 157500, 0x422C, 0x2a8400, 0x6e0405 }, + { 161793, 0x4571, 0x6f8403 }, +- { 162000, 0x0A71, 0x6f8403 }, ++ { 162000, 0x0A71, 0x6f8403, 0x710405 }, + { 175500, 0x4231, 0x2f8400 }, + { 189000, 0x0542, 0x4d8401 }, +- { 202500, 0x0763, 0x6F8402 }, ++ { 202500, 0x0763, 0x6F8402, 0x8e0405 }, + { 204800, 0x0764, 0x548401 }, +- { 218300, 0x043D, 0x3b8400 }, +- { 229500, 0x0660, 0x3e8400 }, /* Not tested on Pro */ ++ { 218300, 0x043D, 0x3b8400, 0x990405 }, ++ { 229500, 0x0660, 0x3e8400, 0xa10405 }, /* Not tested on Pro */ ++ { 234000, 0, 0xa20403, 0xa40405 }, ++ { 267250, 0, 0xb90403, 0xbb0405 }, ++ { 297500, 0, 0xce0403, 0xd00405 }, ++ { 339500, 0, 0x5d0002, 0x770005 }, ++ { 340772, 0, 0x750003, 0x770005 }, + { 0, 0, 0 } + }; + +Index: src/via_driver.c +=================================================================== +--- src/via_driver.c (revision 751) ++++ src/via_driver.c (working copy) +@@ -128,6 +128,7 @@ + VIA_DEVICE_MATCH (PCI_CHIP_VT3324, 0 ), + VIA_DEVICE_MATCH (PCI_CHIP_VT3327, 0 ), + VIA_DEVICE_MATCH (PCI_CHIP_VT3353, 0 ), ++ VIA_DEVICE_MATCH (PCI_CHIP_VT3409, 0 ), + { 0, 0, 0 }, + }; + +@@ -164,6 +165,7 @@ + {VIA_CX700, "CX700/VX700"}, + {VIA_P4M890, "P4M890"}, + {VIA_VX800, "VX800"}, ++ {VIA_VX855, "VX855"}, + {-1, NULL } + }; + +@@ -179,6 +181,7 @@ + {VIA_CX700, PCI_CHIP_VT3324, RES_SHARED_VGA}, + {VIA_P4M890, PCI_CHIP_VT3327, RES_SHARED_VGA}, + {VIA_VX800, PCI_CHIP_VT3353, RES_SHARED_VGA}, ++ {VIA_VX855, PCI_CHIP_VT3409, RES_SHARED_VGA}, + {-1, -1, RES_UNDEFINED} + }; + +@@ -908,6 +911,7 @@ + pVia->UseLegacyModeSwitch = FALSE; + break; + case VIA_VX800: ++ case VIA_VX855: + pVia->VideoEngine = VIDEO_ENGINE_CME; + /* pVia->agpEnable = FALSE; + pVia->dmaXV = FALSE;*/ +@@ -1180,6 +1184,7 @@ + case VIA_P4M900: + case VIA_CX700: + case VIA_VX800: ++ case VIA_VX855: + #ifdef XSERVER_LIBPCIACCESS + pci_device_cfg_read_u8(vgaDevice, &videoRam, 0xA1); + #else +@@ -1926,8 +1931,16 @@ + viaAccelSync(pScrn); + + /* A soft reset helps to avoid a 3D hang on VT switch. */ +- if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900 && pVia->Chipset != VIA_VX800) +- hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); ++ switch (pVia->Chipset) { ++ case VIA_K8M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ case VIA_VX855: ++ break; ++ default: ++ hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); ++ break; ++ } + + #ifdef XF86DRI + if (pVia->directRenderingEnabled) { +@@ -2103,8 +2116,13 @@ + } + + /* Save TMDS status */ +- if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) +- Regs->CRD2 = hwp->readCrtc(hwp, 0xD2); ++ switch (pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_VX800: ++ case VIA_VX855: ++ Regs->CRD2 = hwp->readCrtc(hwp, 0xD2); ++ break; ++ } + + vgaHWProtect(pScrn, FALSE); + } +@@ -2219,8 +2237,13 @@ + } + + /* Restore TMDS status */ +- if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) +- hwp->writeCrtc(hwp, 0xD2, Regs->CRD2); ++ switch (pVia->Chipset) { ++ case VIA_CX700: ++ case VIA_VX800: ++ case VIA_VX855: ++ hwp->writeCrtc(hwp, 0xD2, Regs->CRD2); ++ break; ++ } + + if (pBIOSInfo->Panel->IsActive) + ViaLCDPower(pScrn, TRUE); +@@ -2245,6 +2268,7 @@ + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + ViaSeqMask(hwp, 0x1A, 0x08, 0x08); + break; + default: +@@ -2267,6 +2291,7 @@ + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + ViaSeqMask(hwp, 0x1A, 0x00, 0x08); + break; + default: +@@ -2956,13 +2981,19 @@ + * to detect when the display is using the secondary head. + * TODO: This should be enabled for other chipsets as well. + */ +- if ((pVia->Chipset == VIA_P4M900 || pVia->Chipset == VIA_VX800) && pVia->pBIOSInfo->Panel->IsActive) { +- /* +- * Since we are using virtual, we need to adjust +- * the offset to match the framebuffer alignment. +- */ +- if (pScrn->displayWidth != mode->CrtcHDisplay) +- ViaSecondCRTCHorizontalOffset(pScrn); ++ if (pVia->pBIOSInfo->Panel->IsActive) { ++ switch (pVia->Chipset) { ++ case VIA_P4M900: ++ case VIA_VX800: ++ case VIA_VX855: ++ /* ++ * Since we are using virtual, we need to adjust ++ * the offset to match the framebuffer alignment. ++ */ ++ if (pScrn->displayWidth != mode->CrtcHDisplay) ++ ViaSecondCRTCHorizontalOffset(pScrn); ++ break; ++ } + } + } + +@@ -2996,9 +3027,16 @@ + viaAccelSync(pScrn); + + /* A soft reset avoids a 3D hang after X restart. */ +- if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900 && +- pVia->Chipset != VIA_VX800) +- hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); ++ switch (pVia->Chipset) { ++ case VIA_K8M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ case VIA_VX855: ++ break; ++ default : ++ hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40); ++ break; ++ } + + if (!pVia->IsSecondary) { + /* Turn off all video activities. */ +Index: src/via_crtc.c +=================================================================== +--- src/via_crtc.c (revision 751) ++++ src/via_crtc.c (working copy) +@@ -173,6 +173,7 @@ + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + break; + default: + ViaSeqMask(hwp, 0x16, 0x08, 0xBF); +@@ -276,6 +277,7 @@ + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + break; + default: + /* some leftovers */ +@@ -310,6 +312,7 @@ + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + break; + default: + /* some leftovers */ +@@ -429,6 +432,7 @@ + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + break; + default: + ViaSeqMask(hwp, 0x16, 0x08, 0xBF); +@@ -512,6 +516,7 @@ + case VIA_CX700: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + break; + default: + /* some leftovers */ +Index: src/via_swov.c +=================================================================== +--- src/via_swov.c (revision 751) ++++ src/via_swov.c (working copy) +@@ -282,6 +282,7 @@ + HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE; + break; + case VIA_VX800: ++ case VIA_VX855: + HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE; + HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE; + HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE; +@@ -784,6 +785,7 @@ + case PCI_CHIP_VT3324: + case PCI_CHIP_VT3327: + case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: + model = 0; + break; + case PCI_CHIP_CLE3122: +@@ -922,6 +924,7 @@ + case PCI_CHIP_VT3324: + case PCI_CHIP_VT3364: + case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: + case PCI_CHIP_CLE3122: + VIDOutD(V1_ColorSpaceReg_2, col2); + VIDOutD(V1_ColorSpaceReg_1, col1); +@@ -951,6 +954,7 @@ + case PCI_CHIP_VT3324: + case PCI_CHIP_VT3364: + case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: + return (VIDEO_HQV_INUSE | SW_USE_HQV | VIDEO_1_INUSE + | VIDEO_ACTIVE | VIDEO_SHOW); + case PCI_CHIP_CLE3122: +@@ -990,6 +994,8 @@ + case PCI_CHIP_VT3364: + case PCI_CHIP_VT3353: + return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3336; ++ case PCI_CHIP_VT3409: ++ return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3409; + case PCI_CHIP_CLE3122: + if (CLE266_REV_IS_CX(pVia->ChipRev)) + return V3_ENABLE | V3_EXPIRE_NUM_F; +@@ -1269,24 +1275,28 @@ + static void + SetFIFO_V3(VIAPtr pVia, CARD8 depth, CARD8 prethreshold, CARD8 threshold) + { +- if ((pVia->ChipId == PCI_CHIP_VT3314) +- || (pVia->ChipId == PCI_CHIP_VT3324) +- || (pVia->ChipId == PCI_CHIP_VT3327 +- || (pVia->ChipId == PCI_CHIP_VT3353))) { +- SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, +- (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) +- | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); +- SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, +- (VIDInD(ALPHA_V3_PREFIFO_CONTROL) +- & ~V3_FIFO_MASK_3314) | (prethreshold & 0xff)); +- } else { +- SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, +- (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) +- | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); +- SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, +- (VIDInD(ALPHA_V3_PREFIFO_CONTROL) & ~V3_FIFO_MASK) +- | (prethreshold & 0x7f)); +- } ++ switch (pVia->ChipId) { ++ case PCI_CHIP_VT3314: ++ case PCI_CHIP_VT3324: ++ case PCI_CHIP_VT3327: ++ case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: ++ SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, ++ (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) ++ | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); ++ SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, ++ (VIDInD(ALPHA_V3_PREFIFO_CONTROL) ++ & ~V3_FIFO_MASK_3314) | (prethreshold & 0xff)); ++ break; ++ default : ++ SaveVideoRegister(pVia, ALPHA_V3_FIFO_CONTROL, ++ (VIDInD(ALPHA_V3_FIFO_CONTROL) & ALPHA_FIFO_MASK) ++ | ((depth - 1) & 0xff) | ((threshold & 0xff) << 8)); ++ SaveVideoRegister(pVia, ALPHA_V3_PREFIFO_CONTROL, ++ (VIDInD(ALPHA_V3_PREFIFO_CONTROL) & ~V3_FIFO_MASK) ++ | (prethreshold & 0x7f)); ++ break; ++ } + } + + static void +@@ -1335,6 +1345,7 @@ + case PCI_CHIP_VT3324: + case PCI_CHIP_VT3364: + case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: + SetFIFO_V3(pVia, 225, 200, 250); + break; + case PCI_CHIP_VT3204: +@@ -1367,6 +1378,7 @@ + case PCI_CHIP_VT3324: + case PCI_CHIP_VT3364: + case PCI_CHIP_VT3353: ++ case PCI_CHIP_VT3409: + SetFIFO_V3(pVia, 225, 200, 250); + break; + case PCI_CHIP_VT3204: +@@ -2011,7 +2023,7 @@ + if (pVia->VideoEngine == VIDEO_ENGINE_CME) { + VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL1,0); + VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL3,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1)); +- if (pVia->Chipset == VIA_VX800) { ++ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) { + VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL2,0); + VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL4,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1)); + } +Index: src/via_bandwidth.c +=================================================================== +--- src/via_bandwidth.c (revision 751) ++++ src/via_bandwidth.c (working copy) +@@ -244,6 +244,11 @@ + hwp->writeSeq(hwp, 0x18, 0x26); /* 152/4 = 38 */ + hwp->writeSeq(hwp, 0x22, 0x10); /* 64/4 = 16 */ + break; ++ case VIA_VX855: ++ hwp->writeSeq(hwp, 0x16, 0x50); /* 320/4 = 80 */ ++ hwp->writeSeq(hwp, 0x17, 0xC7); /* 400/2-1 = 199 */ ++ hwp->writeSeq(hwp, 0x18, 0x50); /* 320/4 = 80 */ ++ hwp->writeSeq(hwp, 0x22, 0x28); /* 160/4 = 40 */ + default: + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetPrimaryFIFO: " + "Chipset %d not implemented\n", pVia->Chipset); +@@ -412,6 +417,8 @@ + else + ViaCrtcMask(hwp, 0x94, 0x20, 0x7F); + break; ++ case VIA_VX855: ++ break; + default: + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetSecondaryFIFO: " + "Chipset %d not implemented\n", pVia->Chipset); +Index: src/via_accel.c +=================================================================== +--- src/via_accel.c (revision 751) ++++ src/via_accel.c (working copy) +@@ -195,6 +195,7 @@ + */ + switch (pVia->Chipset) { + case VIA_VX800: ++ case VIA_VX855: + while ((VIAGETREG(VIA_REG_STATUS) & + (VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5)) + && (loop++ < MAXLOOP)) ; +@@ -471,7 +472,7 @@ + VIASETREG(i, 0x0); + } + +- if (pVia->Chipset == VIA_VX800) { ++ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) { + for (i = 0x44; i < 0x5c; i += 4) { + VIASETREG(i, 0x0); + } +@@ -480,6 +481,7 @@ + /* Make the VIA_REG() macro magic work */ + switch (pVia->Chipset) { + case VIA_VX800: ++ case VIA_VX855: + pVia->TwodRegs = via_2d_regs_m1; + break; + default: +@@ -527,6 +529,7 @@ + + switch (pVia->Chipset) { + case VIA_VX800: ++ case VIA_VX855: + while ((VIAGETREG(VIA_REG_STATUS) & + (VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5 | VIA_3D_ENG_BUSY_H5)) + && (loop++ < MAXLOOP)) ; +@@ -587,7 +590,7 @@ + unsigned val = (dstPitch >> 3) << 16 | (srcPitch >> 3); + RING_VARS; + +- if (pVia->Chipset != VIA_VX800) { ++ if (pVia->Chipset != VIA_VX800 && pVia->Chipset != VIA_VX855) { + val |= VIA_PITCH_ENABLE; + } + OUT_RING_H1(VIA_REG(pVia, PITCH), val); +@@ -1289,17 +1292,23 @@ + * test with x11perf -shmput500! + */ + +- if (pVia->Chipset != VIA_K8M800 && +- pVia->Chipset != VIA_K8M890 && +- pVia->Chipset != VIA_P4M900 && +- pVia->Chipset != VIA_VX800) +- xaaptr->ImageWriteFlags |= NO_GXCOPY; ++ switch (pVia->Chipset) { ++ case VIA_K8M800: ++ case VIA_K8M890: ++ case VIA_P4M900: ++ case VIA_VX800: ++ case VIA_VX855: ++ break; ++ default: ++ xaaptr->ImageWriteFlags |= NO_GXCOPY; ++ break; ++ } + + xaaptr->SetupForImageWrite = viaSetupForImageWrite; + xaaptr->SubsequentImageWriteRect = viaSubsequentImageWriteRect; + xaaptr->ImageWriteBase = pVia->BltBase; + +- if (pVia->Chipset == VIA_VX800) ++ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) + xaaptr->ImageWriteRange = VIA_MMIO_BLTSIZE; + else + xaaptr->ImageWriteRange = (64 * 1024); +Index: src/via_cursor.c +=================================================================== +--- src/via_cursor.c (revision 751) ++++ src/via_cursor.c (working copy) +@@ -97,6 +97,7 @@ + case VIA_P4M890: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + if (pVia->pBIOSInfo->FirstCRTC->IsActive) { + pVia->CursorRegControl = VIA_REG_HI_CONTROL0; + pVia->CursorRegBase = VIA_REG_HI_BASE0; +@@ -164,6 +165,7 @@ + case VIA_P4M890: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + if (pVia->pBIOSInfo->FirstCRTC->IsActive) { + VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, 0x00FFFFFF); + VIASETREG(VIA_REG_V327_HI_INVTCOLOR, 0x00FFFFFF); +@@ -222,6 +224,7 @@ + case VIA_P4M890: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + if (pVia->pBIOSInfo->FirstCRTC->IsActive) { + pVia->CursorPrimHiInvtColor = VIAGETREG(VIA_REG_PRIM_HI_INVTCOLOR); + pVia->CursorV327HiInvtColor = VIAGETREG(VIA_REG_V327_HI_INVTCOLOR); +@@ -261,6 +264,7 @@ + case VIA_P4M890: + case VIA_P4M900: + case VIA_VX800: ++ case VIA_VX855: + if (pVia->pBIOSInfo->FirstCRTC->IsActive) { + VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, pVia->CursorPrimHiInvtColor); + VIASETREG(VIA_REG_V327_HI_INVTCOLOR, pVia->CursorV327HiInvtColor); +Index: src/via_xvmc.c +=================================================================== +--- src/via_xvmc.c (revision 751) ++++ src/via_xvmc.c (working copy) +@@ -322,6 +322,7 @@ + if ((pVia->Chipset == VIA_KM400) || + (pVia->Chipset == VIA_CX700) || + (pVia->Chipset == VIA_VX800) || ++ (pVia->Chipset == VIA_VX855) || + (pVia->Chipset == VIA_K8M890) || + (pVia->Chipset == VIA_P4M900)) { + xf86DrvMsg(pScrn->scrnIndex, X_WARNING, +Index: src/via.h +=================================================================== +--- src/via.h (revision 751) ++++ src/via.h (working copy) +@@ -327,6 +327,12 @@ + #define VIDEO_FIFO_PRETHRESHOLD_VT3336 250 + #define VIDEO_EXPIRE_NUM_VT3336 31 + ++/* Those values are only valid for IGA1 */ ++#define VIDEO_FIFO_DEPTH_VT3409 400 ++#define VIDEO_FIFO_THRESHOLD_VT3409 320 ++#define VIDEO_FIFO_PRETHRESHOLD_VT3409 230 ++#define VIDEO_EXPIRE_NUM_VT3409 160 ++ + /* ALPHA_V3_FIFO_CONTROL 0x278 + * IA2 has 32 level FIFO for packet mode video format + * 32 level FIFO for planar mode video YV12. with extension reg 230 bit 21 enable +Index: src/via_id.c +=================================================================== +--- src/via_id.c (revision 751) ++++ src/via_id.c (working copy) +@@ -222,6 +222,9 @@ + {"Samsung NC20", VIA_VX800, 0x144d, 0xc04e, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, + {"Quanta DreamBook Light IL1", VIA_VX800, 0x152d, 0x0771, VIA_DEVICE_CRT | VIA_DEVICE_LCD}, + ++ /*** VX855 ***/ ++ {"VIA VT8562C", VIA_VX855, 0x1106, 0x5122, VIA_DEVICE_CRT}, ++ + /* keep this */ + {NULL, VIA_UNKNOWN, 0x0000, 0x0000, VIA_DEVICE_NONE} + }; diff --git a/openchrome.xinf b/openchrome.xinf index d31422f..dd293e2 100644 --- a/openchrome.xinf +++ b/openchrome.xinf @@ -31,3 +31,6 @@ alias pcivideo:v00001106d00003371sv*sd*bc*sc*i* openchrome # 1106:1122 - VX800 (PCI_CHIP_VT3353) alias pcivideo:v00001106d00001122sv*sd*bc*sc*i* openchrome + +# 1106:5122 - VX855 (PCI_CHIP_VT3409) +alias pcivideo:v00001106d00005122sv*sd*bc*sc*i* openchrome diff --git a/xorg-x11-drv-openchrome.spec b/xorg-x11-drv-openchrome.spec index 0283c83..b5daa62 100644 --- a/xorg-x11-drv-openchrome.spec +++ b/xorg-x11-drv-openchrome.spec @@ -10,7 +10,7 @@ Summary: Xorg X11 openchrome video driver Name: xorg-x11-drv-openchrome Version: 0.2.903 -Release: 10%{?dist} +Release: 11%{?dist} URL: http://www.openchrome.org License: MIT Group: User Interface/X Hardware Support @@ -20,14 +20,15 @@ Source0: http://www.openchrome.org/releases/%{tarball}-%{version}.tar.bz2 Source1: openchrome.xinf # Patches from upstream trunk : -#Patch1: openchrome-0.2.903-sync_pciids.patch -#Patch2: openchrome-0.2.903-fix_bltsize.patch -#Patch98: openchrome-0.2.903-PreInitCRTC.patch +# svn diff http://svn.openchrome.org/svn/tags/release_0_2_903 http://svn.openchrome.org/svn/trunk Patch99: openchrome-0.2.903-latest_snapshot.patch # Fedora specific patches : -#Patch100: openchrome-0.2.903-re_enable_AGPDMA.patch +#Patch100: openchrome-0.2.903-disable_hwcursor.patch # Experimental patches (branch backport, etc...): -#Patch200: openchrome-0.2.903-panel.patch +Patch200: openchrome-0.2.903-vx855_support.patch +Patch201: openchrome-0.2.903-pll_rework.patch +Patch202: openchrome-0.2.903-fix_cursor_on_secondary.patch +Patch203: openchrome-0.2.903-disable_TMDS_by_default.patch ExclusiveArch: %{ix86} x86_64 @@ -47,9 +48,11 @@ Requires: xorg-x11-server-Xorg Obsoletes: xorg-x11-drv-via <= 0.2.2-4 Provides: xorg-x11-drv-via = 0.2.2-5 + %description X.Org X11 openchrome video driver. + %if %{with_xvmc} %package devel Summary: Xorg X11 openchrome video driver XvMC development package @@ -62,14 +65,14 @@ Provides: xorg-x11-drv-via-devel = 0.2.2-5 X.Org X11 openchrome video driver XvMC development package. %endif + %prep %setup -q -n %{tarball}-%{version} -#%patch1 -p0 -b .pciids -#%patch2 -p0 -b .bltsize %patch99 -p0 -b .latest -#%patch98 -p0 -b .PreInitCRTC -#%patch100 -p0 -b .agpdma -#%patch200 -p0 -b .panel +%patch200 -p0 +%patch201 -p0 +%patch202 -p0 +%patch203 -p0 %build @@ -127,6 +130,15 @@ fi %changelog +* Tue May 26 2009 Xavier Bachelot - 0.2.903-11 +- Update to latest snapshot (svn 751) : + - Add support for VX800 integrated TMDS encoder. + - Make sure Chrome9 chipsets use software rasterizer for 3D. + - Various small fixes. +- Add patch for VX855 support. +- Add patch to fix cursor on secondary display. +- Add patch to fix disable TMDS by default. + * Sat Mar 21 2009 Xavier Bachelot - 0.2.903-10 - Update to latest snapshot (svn 740) : - Fix panel resolution detection fallback (RHBZ#491417).