From: Cole Robinson <crobinso@redhat.com>
Date: Mon, 7 Jun 2021 19:53:33 -0400
Subject: [PATCH] Revert "target/i386: define a new MSR based feature word -
 FEAT_PERF_CAPABILITIES"

This reverts commit ea39f9b643959d759b8643b4c11c4cbb3683d0ff.

Non-upstream. This is to workaround the fedora infrastructure
issue tracked here:
https://pagure.io/releng/failed-composes/issue/2548

There is no proper bug for this at time of writing, Paolo hasn't
isolated a reproducer. Let's carry this for f34 but leave it
out of f35, and hopefully in 6 months when fedora infra
updates again this is 'fixed' :)
---
 target/i386/cpu.c | 23 -----------------------
 target/i386/cpu.h |  3 ---
 target/i386/kvm.c | 20 --------------------
 3 files changed, 46 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 5a8c96072e..dd86c801e9 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1128,22 +1128,6 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
             .index = MSR_IA32_CORE_CAPABILITY,
         },
     },
-    [FEAT_PERF_CAPABILITIES] = {
-        .type = MSR_FEATURE_WORD,
-        .feat_names = {
-            NULL, NULL, NULL, NULL,
-            NULL, NULL, NULL, NULL,
-            NULL, NULL, NULL, NULL,
-            NULL, "full-width-write", NULL, NULL,
-            NULL, NULL, NULL, NULL,
-            NULL, NULL, NULL, NULL,
-            NULL, NULL, NULL, NULL,
-            NULL, NULL, NULL, NULL,
-        },
-        .msr = {
-            .index = MSR_IA32_PERF_CAPABILITIES,
-        },
-    },
 
     [FEAT_VMX_PROCBASED_CTLS] = {
         .type = MSR_FEATURE_WORD,
@@ -1321,10 +1305,6 @@ static FeatureDep feature_dependencies[] = {
         .from = { FEAT_7_0_EDX,             CPUID_7_0_EDX_CORE_CAPABILITY },
         .to = { FEAT_CORE_CAPABILITY,       ~0ull },
     },
-    {
-        .from = { FEAT_1_ECX,             CPUID_EXT_PDCM },
-        .to = { FEAT_PERF_CAPABILITIES,       ~0ull },
-    },
     {
         .from = { FEAT_1_ECX,               CPUID_EXT_VMX },
         .to = { FEAT_VMX_PROCBASED_CTLS,    ~0ull },
@@ -5514,9 +5494,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
             *ebx |= (cs->nr_cores * cs->nr_threads) << 16;
             *edx |= CPUID_HT;
         }
-        if (!cpu->enable_pmu) {
-            *ecx &= ~CPUID_EXT_PDCM;
-        }
         break;
     case 2:
         /* cache info: needed for Pentium Pro compatibility */
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 88e8586f8f..2fc8bc8358 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -356,8 +356,6 @@ typedef enum X86Seg {
 #define MSR_IA32_ARCH_CAPABILITIES      0x10a
 #define ARCH_CAP_TSX_CTRL_MSR		(1<<7)
 
-#define MSR_IA32_PERF_CAPABILITIES      0x345
-
 #define MSR_IA32_TSX_CTRL		0x122
 #define MSR_IA32_TSCDEADLINE            0x6e0
 
@@ -531,7 +529,6 @@ typedef enum FeatureWord {
     FEAT_XSAVE_COMP_HI, /* CPUID[EAX=0xd,ECX=0].EDX */
     FEAT_ARCH_CAPABILITIES,
     FEAT_CORE_CAPABILITY,
-    FEAT_PERF_CAPABILITIES,
     FEAT_VMX_PROCBASED_CTLS,
     FEAT_VMX_SECONDARY_CTLS,
     FEAT_VMX_PINBASED_CTLS,
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index a2934dda02..1fddf93c93 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -111,7 +111,6 @@ static bool has_msr_core_capabs;
 static bool has_msr_vmx_vmfunc;
 static bool has_msr_ucode_rev;
 static bool has_msr_vmx_procbased_ctls2;
-static bool has_msr_perf_capabs;
 
 static uint32_t has_architectural_pmu_version;
 static uint32_t num_architectural_pmu_gp_counters;
@@ -2049,9 +2048,6 @@ static int kvm_get_supported_msrs(KVMState *s)
             case MSR_IA32_CORE_CAPABILITY:
                 has_msr_core_capabs = true;
                 break;
-            case MSR_IA32_PERF_CAPABILITIES:
-                has_msr_perf_capabs = true;
-                break;
             case MSR_IA32_VMX_VMFUNC:
                 has_msr_vmx_vmfunc = true;
                 break;
@@ -2673,18 +2669,6 @@ static void kvm_msr_entry_add_vmx(X86CPU *cpu, FeatureWordArray f)
                       VMCS12_MAX_FIELD_INDEX << 1);
 }
 
-static void kvm_msr_entry_add_perf(X86CPU *cpu, FeatureWordArray f)
-{
-    uint64_t kvm_perf_cap =
-        kvm_arch_get_supported_msr_feature(kvm_state,
-                                           MSR_IA32_PERF_CAPABILITIES);
-
-    if (kvm_perf_cap) {
-        kvm_msr_entry_add(cpu, MSR_IA32_PERF_CAPABILITIES,
-                        kvm_perf_cap & f[FEAT_PERF_CAPABILITIES]);
-    }
-}
-
 static int kvm_buf_set_msrs(X86CPU *cpu)
 {
     int ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, cpu->kvm_msr_buf);
@@ -2717,10 +2701,6 @@ static void kvm_init_msrs(X86CPU *cpu)
                           env->features[FEAT_CORE_CAPABILITY]);
     }
 
-    if (has_msr_perf_capabs && cpu->enable_pmu) {
-        kvm_msr_entry_add_perf(cpu, env->features);
-    }
-
     if (has_msr_ucode_rev) {
         kvm_msr_entry_add(cpu, MSR_IA32_UCODE_REV, cpu->ucode_rev);
     }