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From: Simon South <simon@simonsouth.net>
To: u-boot@lists.denx.de
Date: Sun,  6 Oct 2019 12:28:13 -0400
Message-Id: <c633e31b9ceb238153d8f767a2d5681deaaa8985.1570376078.git.simon@simonsouth.net>
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Subject: [U-Boot] [PATCH 1/2] ram: rk3328: Use correct frequency units in
 function
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Fix a pair of tests in phy_dll_bypass_set() that used incorrect units
for the DDR frequency, causing the DRAM controller to be misconfigured
in most cases.

Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
---
 drivers/ram/rockchip/sdram_rk3328.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 656696ac3c..0541bbadf0 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -311,12 +311,12 @@ static void phy_dll_bypass_set(struct dram_info *dram, u32 freq)
 	setbits_le32(PHY_REG(phy_base, 0x56), 1 << 4);
 	clrbits_le32(PHY_REG(phy_base, 0x57), 1 << 3);
 
-	if (freq <= (400 * MHz))
+	if (freq <= 400)
 		/* DLL bypass */
 		setbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
 	else
 		clrbits_le32(PHY_REG(phy_base, 0xa4), 0x1f);
-	if (freq <= (680 * MHz))
+	if (freq <= 680)
 		tmp = 2;
 	else
 		tmp = 1;

From patchwork Sun Oct  6 16:28:14 2019
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From: Simon South <simon@simonsouth.net>
To: u-boot@lists.denx.de
Date: Sun,  6 Oct 2019 12:28:14 -0400
Message-Id: <17f58d8cdf7d32de26cb36950fa8676e0dd54d49.1570376078.git.simon@simonsouth.net>
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Subject: [U-Boot] [PATCH 2/2] ram: rk3328: Fix loading of skew values
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Fix a typo that caused incorrect values to be loaded into the DRAM
controller's deskew registers.

Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
---
 drivers/ram/rockchip/sdram_rk3328.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/ram/rockchip/sdram_rk3328.c b/drivers/ram/rockchip/sdram_rk3328.c
index 0541bbadf0..e84c9be6a2 100644
--- a/drivers/ram/rockchip/sdram_rk3328.c
+++ b/drivers/ram/rockchip/sdram_rk3328.c
@@ -394,7 +394,7 @@ static void phy_cfg(struct dram_info *dram,
 	copy_to_reg(PHY_REG(phy_base, 0x70),
 		    &sdram_params->skew.cs0_dm0_skew[0], 44 * 4);
 	copy_to_reg(PHY_REG(phy_base, 0xc0),
-		    &sdram_params->skew.cs0_dm1_skew[0], 44 * 4);
+		    &sdram_params->skew.cs1_dm0_skew[0], 44 * 4);
 }
 
 static int update_refresh_reg(struct dram_info *dram)