From 8aa3833db97e8fe1143c5ece110b9321ce1494ea Mon Sep 17 00:00:00 2001
From: Bertrand Marquis <bertrand.marquis@arm.com>
Date: Wed, 23 Feb 2022 09:42:18 +0000
Subject: xen/arm: Add ECBHB and CLEARBHB ID fields
Introduce ID coprocessor register ID_AA64ISAR2_EL1.
Add definitions in cpufeature and sysregs of ECBHB field in mmfr1 and
CLEARBHB in isar2 ID coprocessor registers.
This is part of XSA-398 / CVE-2022-23960.
Signed-off-by: Bertrand Marquis <bertrand.marquis@arm.com>
Acked-by: Julien Grall <julien@xen.org>
(cherry picked from commit 4b68d12d98b8790d8002fcc2c25a9d713374a4d7)
diff --git a/xen/arch/arm/cpufeature.c b/xen/arch/arm/cpufeature.c
index 6e51f530a80e..a58965f7b9bf 100644
--- a/xen/arch/arm/cpufeature.c
+++ b/xen/arch/arm/cpufeature.c
@@ -122,6 +122,7 @@ void identify_cpu(struct cpuinfo_arm *c)
c->isa64.bits[0] = READ_SYSREG(ID_AA64ISAR0_EL1);
c->isa64.bits[1] = READ_SYSREG(ID_AA64ISAR1_EL1);
+ c->isa64.bits[2] = READ_SYSREG(ID_AA64ISAR2_EL1);
c->zfr64.bits[0] = READ_SYSREG(ID_AA64ZFR0_EL1);
diff --git a/xen/include/asm-arm/arm64/sysregs.h b/xen/include/asm-arm/arm64/sysregs.h
index d7e4772f217f..eac08ed33f53 100644
--- a/xen/include/asm-arm/arm64/sysregs.h
+++ b/xen/include/asm-arm/arm64/sysregs.h
@@ -84,6 +84,9 @@
#ifndef ID_DFR1_EL1
#define ID_DFR1_EL1 S3_0_C0_C3_5
#endif
+#ifndef ID_AA64ISAR2_EL1
+#define ID_AA64ISAR2_EL1 S3_0_C0_C6_2
+#endif
/* ID registers (imported from arm64/include/asm/sysreg.h in Linux) */
@@ -139,6 +142,9 @@
#define ID_AA64ISAR1_GPI_NI 0x0
#define ID_AA64ISAR1_GPI_IMP_DEF 0x1
+/* id_aa64isar2 */
+#define ID_AA64ISAR2_CLEARBHB_SHIFT 28
+
/* id_aa64pfr0 */
#define ID_AA64PFR0_CSV3_SHIFT 60
#define ID_AA64PFR0_CSV2_SHIFT 56
@@ -232,6 +238,7 @@
#define ID_AA64MMFR0_PARANGE_52 0x6
/* id_aa64mmfr1 */
+#define ID_AA64MMFR1_ECBHB_SHIFT 60
#define ID_AA64MMFR1_ETS_SHIFT 36
#define ID_AA64MMFR1_TWED_SHIFT 32
#define ID_AA64MMFR1_XNX_SHIFT 28
diff --git a/xen/include/asm-arm/cpufeature.h b/xen/include/asm-arm/cpufeature.h
index 8a5afbaf0baf..db126508f159 100644
--- a/xen/include/asm-arm/cpufeature.h
+++ b/xen/include/asm-arm/cpufeature.h
@@ -243,14 +243,15 @@ struct cpuinfo_arm {
unsigned long lo:4;
unsigned long pan:4;
unsigned long __res1:8;
- unsigned long __res2:32;
+ unsigned long __res2:28;
+ unsigned long ecbhb:4;
unsigned long __res3:64;
};
} mm64;
union {
- register_t bits[2];
+ register_t bits[3];
struct {
/* ISAR0 */
unsigned long __res0:4;
@@ -286,6 +287,12 @@ struct cpuinfo_arm {
unsigned long dgh:4;
unsigned long i8mm:4;
unsigned long __res2:8;
+
+ /* ISAR2 */
+ unsigned long __res3:28;
+ unsigned long clearbhb:4;
+
+ unsigned long __res4:32;
};
} isa64;