diff --git src/via.h src/via.h
index c961e1a..7b07965 100644
--- src/via.h
+++ src/via.h
@@ -515,6 +515,11 @@
#define HQV_FIFO_STATUS 0x00001000
#define HQV_GEN_IRQ 0x00000080
#define HQV_FIFO_DEPTH_1 0x00010000
+/* for CME engine */
+#define HQV_SW_FLIP_QUEUE_ENABLE 0x00100000
+
+/* HQV Default Vodeo Color 0x3B8 */
+#define HQV_FIX_COLOR 0x0643212c
/* HQV_FILTER_CONTROL 0x3E4 */
#define HQV_H_LOWPASS_2TAP 0x00000001
@@ -575,6 +580,25 @@
#define HQV_VDEBLOCK_FILTER 0x80000000
#define HQV_HDEBLOCK_FILTER 0x00008000
+/* new added registers for VT3409.For some registers have different meanings
+ * but the same address,we add postfix _409 to distinguish */
+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL1 0x160
+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL2 0x164
+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL3 0x168
+#define HQV_COLOR_ADJUSTMENT_PRE_CTRL4 0x16C
+#define HQV_SRC_DATA_OFFSET_CTRL1_409 0x170
+#define HQV_SRC_DATA_OFFSET_CTRL2_409 0x174
+#define HQV_SRC_DATA_OFFSET_CTRL3_409 0x178
+#define HQV_SRC_DATA_OFFSET_CTRL4_409 0x17C
+#define HQV_DST_DATA_OFFSET_CTRL1 0x180
+#define HQV_DST_DATA_OFFSET_CTRL2 0x184
+#define HQV_DST_DATA_OFFSET_CTRL3 0x188
+#define HQV_DST_DATA_OFFSET_CTRL4 0x18C
+#define HQV_RESIDUE_PIXEL_FRAME_STARTADDR 0x1BC
+#define HQV_BACKGROUND_DATA_OFFSET 0x1CC
+#define HQV_SUBP_HSCALE_CTRL 0x1E0
+#define HQV_SUBP_VSCALE_CTRL 0x1E8
+
/* Add new HQV Registers for VT3353: */
#define HQV_SRC_DATA_OFFSET_CONTROL1 0x180
#define HQV_SRC_DATA_OFFSET_CONTROL2 0x184
@@ -588,6 +612,7 @@
#define HQV_COLOR_ADJUSTMENT_CONTROL2 0x1A4
#define HQV_COLOR_ADJUSTMENT_CONTROL3 0x1A8
#define HQV_COLOR_ADJUSTMENT_CONTROL5 0x1AC
+#define HQV_DEFAULT_VIDEO_COLOR 0x1B8
#define CHROMA_KEY_LOW 0x00FFFFFF
#define CHROMA_KEY_HIGH 0x00FFFFFF
diff --git src/via_accel.c src/via_accel.c
index 4a5810e..fc07f38 100644
--- src/via_accel.c
+++ src/via_accel.c
@@ -417,6 +417,8 @@ viaDisableVQ(ScrnInfoPtr pScrn)
switch (pVia->Chipset) {
case VIA_K8M890:
case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
VIASETREG(0x41c, 0x00100000);
VIASETREG(0x420, 0x74301000);
break;
@@ -492,6 +494,8 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
switch (pVia->Chipset) {
case VIA_K8M890:
case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
viaInitPCIe(pVia);
break;
default:
@@ -503,6 +507,8 @@ viaInitialize2DEngine(ScrnInfoPtr pScrn)
switch (pVia->Chipset) {
case VIA_K8M890:
case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
viaEnablePCIeVQ(pVia);
break;
default:
diff --git src/via_bandwidth.c src/via_bandwidth.c
index 842bc2c..b01974d 100644
--- src/via_bandwidth.c
+++ src/via_bandwidth.c
@@ -462,6 +462,21 @@ ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode)
ViaCrtcMask(hwp, 0x94, 0x20, 0x7F);
break;
case VIA_VX855:
+ /* {CR68,4,7},{CR94,7,7},{CR95,7,7} : 200/8-1 = 0x7c */
+ ViaCrtcMask(hwp, 0x68, 0xF0, 0xF0);
+ ViaCrtcMask(hwp, 0x94, 0x00, 0x80);
+ ViaCrtcMask(hwp, 0x95, 0x00, 0x80);
+ /* {CR68,0,3},{CR95,4,6} : 160/4 = 0x28 */
+ ViaCrtcMask(hwp, 0x68, 0x00, 0x0F);
+ ViaCrtcMask(hwp, 0x95, 0x10, 0x70);
+ /* {CR92,0,3},{CR95,0,2} : 160/4 = 0x28 */
+ ViaCrtcMask(hwp, 0x92, 0x00, 0x08);
+ ViaCrtcMask(hwp, 0x95, 0x01, 0x07);
+ /* {CR94,0,6} : 320/4 = 0x50 */
+ if ((mode->HDisplay >= 1400) && (pScrn->bitsPerPixel == 32))
+ ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
+ else
+ ViaCrtcMask(hwp, 0x94, 0x08, 0x7F);
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "ViaSetSecondaryFIFO: "
diff --git src/via_driver.h src/via_driver.h
index 9e31b98..25af449 100644
--- src/via_driver.h
+++ src/via_driver.h
@@ -286,6 +286,7 @@ typedef struct _VIA {
Bool agpDMA;
Bool nPOT[VIA_NUM_TEXUNITS];
const unsigned *TwodRegs;
+ const unsigned *HqvCmeRegs;
ExaDriverPtr exaDriverPtr;
ExaOffscreenArea *exa_scratch;
unsigned int exa_scratch_next;
diff --git src/via_swov.c src/via_swov.c
index 40d5608..acd0d81 100644
--- src/via_swov.c
+++ src/via_swov.c
@@ -65,6 +65,31 @@
#define IN_VIDEO_DISPLAY (*((unsigned long volatile *)(pVia->VidMapBase+V_FLAGS))&VBI_STATUS)
#define VIA_FIRETIMEOUT 40000
+enum HQV_CME_Regs {
+ HQV_SDO_CTRL1,
+ HQV_SDO_CTRL2,
+ HQV_SDO_CTRL3,
+ HQV_SDO_CTRL4
+};
+
+/* register offsets for VT3553/VX800 */
+static const unsigned hqv_cme_regs[] = {
+ [HQV_SDO_CTRL1] = HQV_SRC_DATA_OFFSET_CONTROL1,
+ [HQV_SDO_CTRL2] = HQV_SRC_DATA_OFFSET_CONTROL2,
+ [HQV_SDO_CTRL3] = HQV_SRC_DATA_OFFSET_CONTROL3,
+ [HQV_SDO_CTRL4] = HQV_SRC_DATA_OFFSET_CONTROL4
+};
+
+/* register hqv offsets for new VT3409/VX855 */
+static const unsigned hqv_cme_regs_409[] = {
+ [HQV_SDO_CTRL1] = HQV_SRC_DATA_OFFSET_CTRL1_409,
+ [HQV_SDO_CTRL2] = HQV_SRC_DATA_OFFSET_CTRL2_409,
+ [HQV_SDO_CTRL3] = HQV_SRC_DATA_OFFSET_CTRL3_409,
+ [HQV_SDO_CTRL4] = HQV_SRC_DATA_OFFSET_CTRL4_409
+};
+
+#define HQV_CME_REG(HWDiff, name) (HWDiff)->HQVCmeRegs[name]
+
static void
viaWaitVideoCommandFire(VIAPtr pVia)
{
@@ -283,6 +308,13 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
break;
case VIA_VX800:
+ HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
+ HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
+ HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE;
+ HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
+ HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
+ HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+ HWDiff->HQVCmeRegs = hqv_cme_regs;
case VIA_VX855:
HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
@@ -290,6 +322,7 @@ VIAVidHWDiffInit(ScrnInfoPtr pScrn)
HWDiff->dwHQVInitPatch = VID_HWDIFF_FALSE;
HWDiff->dwHQVDisablePatch = VID_HWDIFF_FALSE;
HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
+ HWDiff->HQVCmeRegs = hqv_cme_regs_409;
break;
default:
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
@@ -1561,8 +1594,9 @@ SetHQVFetch(VIAPtr pVia, CARD32 srcFetch, unsigned long srcHeight)
srcFetch >>= 3; /* fetch unit is 8 bytes */
}
- SaveVideoRegister(pVia, HQV_SRC_FETCH_LINE + proReg,
- ((srcFetch - 1) << 16) | (srcHeight - 1));
+ if (pVia->ChipId != PCI_CHIP_VT3409)
+ SaveVideoRegister(pVia, HQV_SRC_FETCH_LINE + proReg,
+ ((srcFetch - 1) << 16) | (srcHeight - 1));
}
static void
@@ -1772,6 +1806,8 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
vidCtl |= 0x80000000;
/* SECOND_DISPLAY_COLOR_KEY_ENABLE */
compose |= 0x00010000 | 0x1;
+ compose |= SECOND_DISPLAY_COLOR_KEY_ENABLE;
+ compose |= COMPOSE_V3_V1;
}
viaOverlayGetV1V3Format(pVia, (videoFlag & VIDEO_1_INUSE) ? 1 : 3,
@@ -1891,7 +1927,7 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
if (pVia->HWDiff.dwHQVFetchByteUnit)
SaveVideoRegister(pVia, HQV_SRC_STRIDE + proReg,
((srcPitch >> 1) << 16) | srcPitch |
- HQV_FIFO_DEPTH_1);
+ HQV_FIFO_DEPTH_1 | HQV_SW_FLIP_QUEUE_ENABLE);
else
SaveVideoRegister(pVia, HQV_SRC_STRIDE + proReg,
((srcPitch >> 1) << 16) | srcPitch);
@@ -2022,11 +2058,24 @@ Upd_Video(ScrnInfoPtr pScrn, unsigned long videoFlag,
miniCtl, compose);
if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
- VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL1,0);
- VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL3,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
+ SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL1),0);
+ SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL3),((srcWidth - 1 ) << 16) | (srcHeight - 1));
if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) {
- VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL2,0);
- VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL4,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
+ SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL2),0);
+ SaveVideoRegister(pVia, HQV_CME_REG(hwDiff, HQV_SDO_CTRL4),((srcWidth - 1 ) << 16) | (srcHeight - 1));
+ if (pVia->Chipset == VIA_VX855) {
+ SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL1,0);
+ SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL3,((srcWidth - 1 ) << 16) | (srcHeight - 1));
+ SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL2,0);
+ SaveVideoRegister(pVia, HQV_DST_DATA_OFFSET_CTRL4,((srcWidth - 1 ) << 16) | (srcHeight - 1));
+ SaveVideoRegister(pVia, HQV_BACKGROUND_DATA_OFFSET,((srcWidth - 1 ) << 16) | (srcHeight - 1));
+ SaveVideoRegister(pVia, HQV_EXTENDED_CONTROL,0);
+ /*0x3e0*/
+ SaveVideoRegister(pVia, HQV_SUBP_HSCALE_CTRL,0);
+ /*0x3e8*/
+ SaveVideoRegister(pVia, HQV_SUBP_VSCALE_CTRL,0);
+ }
+ SaveVideoRegister(pVia, HQV_DEFAULT_VIDEO_COLOR, HQV_FIX_COLOR);
}
}
diff --git src/via_swov.h src/via_swov.h
index d93aa83..7daf4d1 100644
--- src/via_swov.h
+++ src/via_swov.h
@@ -73,6 +73,7 @@ typedef struct __VIAHWDiff
/*unsigned long dwV3FIFOPatch; *//* For CLE V3 FIFO Bug (srcWidth <= 8) */
unsigned long dwSupportTwoColorKey; /* Support two color key */
/* unsigned long dwCxColorSpace; *//* CLE_Cx ColorSpace */
+ const unsigned *HQVCmeRegs; /* Which set of CME regs to use for newer chipsets */
} VIAHWDiff;
void VIAVidHWDiffInit(ScrnInfoPtr pScrn);