Index: src/via_panel.c
===================================================================
--- src/via_panel.c (revision 0)
+++ src/via_panel.c (revision 0)
@@ -0,0 +1,461 @@
+/*
+ * Copyright 2007 The Openchrome Project [openchrome.org]
+ * Copyright (c) 1997-2003 by The XFree86 Project, Inc.
+ * Copyright 1998-2007 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2007 S3 Graphics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Core panel functions.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "via.h"
+#include "via_driver.h"
+#include "via_vgahw.h"
+#include "via_id.h"
+#include "via_timing.h"
+
+static ViaPanelModeRec ViaPanelNativeModes[] = {
+ {640, 480},
+ {800, 600},
+ {1024, 768},
+ {1280, 768},
+ {1280, 1024},
+ {1400, 1050},
+ {1600, 1200},
+ {1280, 800},
+ {800, 480},
+ {1366, 768},
+ {1360, 768},
+ {1920, 1080},
+ {1920, 1200},
+ {1024, 600},
+ {1440, 900},
+ {1280, 720}
+};
+
+static int
+ViaPanelLookUpModeIndex(int width, int height)
+{
+ int i, index = VIA_PANEL_INVALID;
+ int length = sizeof(ViaPanelNativeModes) / sizeof(ViaPanelModeRec);
+
+ for (i = 0; i < length; i++) {
+ if (ViaPanelNativeModes[i].Width == width
+ && ViaPanelNativeModes[i].Height == height) {
+ index = i;
+ break;
+ }
+ }
+ return index;
+}
+
+/*
+ * Sets the panel dimensions from the configuration
+ * using name with format "9999x9999".
+ */
+void
+ViaPanelGetNativeModeFromOption(ScrnInfoPtr pScrn, char *name)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
+ ViaPanelInfoPtr panel = pBIOSInfo->Panel;
+ CARD8 index;
+ CARD8 length;
+ char aux[10];
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "ViaPanelGetNativeModeFromOption\n"));
+
+ panel->NativeModeIndex = VIA_PANEL_INVALID;
+ if (strlen(name) < 10) {
+ length = sizeof(ViaPanelNativeModes) / sizeof(ViaPanelModeRec);
+
+ for (index = 0; index < length; index++) {
+ sprintf(aux, "%dx%d", ViaPanelNativeModes[index].Width,
+ ViaPanelNativeModes[index].Height);
+ if (!xf86NameCmp(name, aux)) {
+ panel->NativeModeIndex = index;
+ panel->NativeMode->Width = ViaPanelNativeModes[index].Width;
+ panel->NativeMode->Height = ViaPanelNativeModes[index].Height;
+ break;
+ }
+ }
+ } else {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "%s is not a valid panel size.\n", name);
+ }
+}
+
+/*
+ * Gets the native panel resolution from scratch pad registers.
+ */
+void
+ViaPanelGetNativeModeFromScratchPad(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD8 index;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "ViaPanelGetNativeModeFromScratchPad\n"));
+
+ index = hwp->readCrtc(hwp, 0x3F) & 0x0F;
+
+ ViaPanelInfoPtr panel = pVia->pBIOSInfo->Panel;
+
+ panel->NativeModeIndex = index;
+ panel->NativeMode->Width = ViaPanelNativeModes[index].Width;
+ panel->NativeMode->Height = ViaPanelNativeModes[index].Height;
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Native Panel Resolution is %dx%d\n",
+ panel->NativeMode->Width, panel->NativeMode->Height);
+}
+
+void
+ViaPanelScaleDisable(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ ViaCrtcMask(hwp, 0x79, 0x00, 0x01);
+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400)
+ ViaCrtcMask(hwp, 0xA2, 0x00, 0xC8);
+}
+
+void
+ViaPanelScale(ScrnInfoPtr pScrn, int resWidth, int resHeight,
+ int panelWidth, int panelHeight)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ int horScalingFactor = 0;
+ int verScalingFactor = 0;
+ CARD8 cra2 = 0;
+ CARD8 cr77 = 0;
+ CARD8 cr78 = 0;
+ CARD8 cr79 = 0;
+ CARD8 cr9f = 0;
+ Bool scaling = FALSE;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "ViaPanelScale: %d,%d -> %d,%d\n",
+ resWidth, resHeight, panelWidth, panelHeight));
+
+ if (resWidth < panelWidth) {
+ /* FIXME: It is different for chipset < K8M800 */
+ horScalingFactor = ((resWidth - 1) * 4096) / (panelWidth - 1);
+
+ /* Horizontal scaling enabled */
+ cra2 = 0xC0;
+ cr9f = horScalingFactor & 0x0003; /* HSCaleFactor[1:0] at CR9F[1:0] */
+ cr77 = (horScalingFactor & 0x03FC) >> 2; /* HSCaleFactor[9:2] at CR77[7:0] */
+ cr79 = (horScalingFactor & 0x0C00) >> 10; /* HSCaleFactor[11:10] at CR79[5:4] */
+ cr79 <<= 4;
+ scaling = TRUE;
+ }
+
+ if (resHeight < panelHeight) {
+ verScalingFactor = ((resHeight - 1) * 2048) / (panelHeight - 1);
+
+ /* Vertical scaling enabled */
+ cra2 |= 0x08;
+ cr79 |= ((verScalingFactor & 0x0001) << 3); /* VSCaleFactor[0] at CR79[3] */
+ cr78 |= (verScalingFactor & 0x01FE) >> 1; /* VSCaleFactor[8:1] at CR78[7:0] */
+ cr79 |= ((verScalingFactor & 0x0600) >> 9) << 6; /* VSCaleFactor[10:9] at CR79[7:6] */
+ scaling = TRUE;
+ }
+
+ if (scaling) {
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Scaling factor: horizontal %d (0x%x), vertical %d (0x%x)\n",
+ horScalingFactor, horScalingFactor,
+ verScalingFactor, verScalingFactor));
+
+ ViaCrtcMask(hwp, 0x77, cr77, 0xFF);
+ ViaCrtcMask(hwp, 0x78, cr78, 0xFF);
+ ViaCrtcMask(hwp, 0x79, cr79, 0xF8);
+ ViaCrtcMask(hwp, 0x9F, cr9f, 0x03);
+ ViaCrtcMask(hwp, 0x79, 0x03, 0x03);
+ } else
+ ViaCrtcMask(hwp, 0x79, 0x00, 0x01);
+
+ ViaCrtcMask(hwp, 0xA2, cra2, 0xC8);
+
+ /* Horizontal scaling selection: interpolation */
+ // ViaCrtcMask(hwp, 0x79, 0x02, 0x02);
+ // else
+ // ViaCrtcMask(hwp, 0x79, 0x00, 0x02);
+ /* Horizontal scaling factor selection original / linear */
+ //ViaCrtcMask(hwp, 0xA2, 0x40, 0x40);
+}
+
+
+/*
+ * Generates a display mode for the native panel resolution, using CVT.
+ */
+static void
+ViaPanelGetNativeDisplayMode(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ ViaPanelModePtr panelMode = pVia->pBIOSInfo->Panel->NativeMode;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "ViaPanelGetNativeDisplayMode\n"));
+
+ if (panelMode->Width && panelMode->Height) {
+
+ /* TODO: fix refresh rate and check malloc */
+ DisplayModePtr p = malloc( sizeof(DisplayModeRec) ) ;
+ memset(p, 0, sizeof(DisplayModeRec));
+
+ float refresh = 60.0f ;
+
+ /* The following code is borrowed from xf86SetModeCrtc. */
+ if (p) {
+ viaTimingCvt(p, panelMode->Width, panelMode->Height, refresh, FALSE, TRUE);
+ p->CrtcHDisplay = p->HDisplay;
+ p->CrtcHSyncStart = p->HSyncStart;
+ p->CrtcHSyncEnd = p->HSyncEnd;
+ p->CrtcHTotal = p->HTotal;
+ p->CrtcHSkew = p->HSkew;
+ p->CrtcVDisplay = p->VDisplay;
+ p->CrtcVSyncStart = p->VSyncStart;
+ p->CrtcVSyncEnd = p->VSyncEnd;
+ p->CrtcVTotal = p->VTotal;
+
+ p->CrtcVBlankStart = min(p->CrtcVSyncStart, p->CrtcVDisplay);
+ p->CrtcVBlankEnd = max(p->CrtcVSyncEnd, p->CrtcVTotal);
+ p->CrtcHBlankStart = min(p->CrtcHSyncStart, p->CrtcHDisplay);
+ p->CrtcHBlankEnd = max(p->CrtcHSyncEnd, p->CrtcHTotal);
+
+ }
+ pVia->pBIOSInfo->Panel->NativeDisplayMode = p;
+ } else {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "Invalid panel dimension (%dx%d)\n", panelMode->Width,
+ panelMode->Height);
+ }
+}
+
+void
+ViaPanelPreInit(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaPanelPreInit\n"));
+
+ ViaPanelInfoPtr panel = pBIOSInfo->Panel;
+
+ /* First try to get the mode from EDID. */
+ if (panel->NativeModeIndex == VIA_PANEL_INVALID) {
+ int width, height;
+ Bool ret;
+
+ ret = ViaPanelGetSizeFromDDCv1(pScrn, &width, &height);
+/*
+ if (!ret)
+ ret = ViaPanelGetSizeFromDDCv2(pScrn, &width, &height);
+*/
+ if (ret) {
+ panel->NativeModeIndex = ViaPanelLookUpModeIndex(width, height);
+ if (panel->NativeModeIndex != VIA_PANEL_INVALID) {
+ panel->NativeMode->Width = width;
+ panel->NativeMode->Height = height;
+ }
+ }
+ }
+
+ if (panel->NativeModeIndex == VIA_PANEL_INVALID)
+ ViaPanelGetNativeModeFromScratchPad(pScrn);
+
+ if (panel->NativeModeIndex != VIA_PANEL_INVALID)
+ ViaPanelGetNativeDisplayMode(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "NativeModeIndex: %d\n", panel->NativeModeIndex )) ;
+
+}
+
+void
+ViaPanelCenterMode(DisplayModePtr centerMode, DisplayModePtr panelMode,
+ DisplayModePtr mode)
+{
+ memcpy(centerMode, mode, sizeof(DisplayModeRec));
+
+ CARD32 HDiff = (panelMode->CrtcHDisplay - mode->CrtcHDisplay) / 2;
+ CARD32 VDiff = (panelMode->CrtcVDisplay - mode->CrtcVDisplay) / 2;
+
+ centerMode->CrtcHTotal += HDiff * 2;
+ centerMode->CrtcVTotal += VDiff * 2;
+
+ centerMode->CrtcHSyncStart += HDiff;
+ centerMode->CrtcHSyncEnd += HDiff;
+ centerMode->CrtcHBlankStart += HDiff;
+ centerMode->CrtcHBlankEnd += HDiff;
+
+ centerMode->CrtcVSyncStart += VDiff;
+ centerMode->CrtcVSyncEnd += VDiff;;
+ centerMode->CrtcVBlankStart += VDiff;
+ centerMode->CrtcVBlankEnd += VDiff;
+}
+
+
+/*
+ * Try to interprete EDID ourselves.
+ */
+Bool
+ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon,
+ int *width, int *height)
+{
+ int i, max = 0, vsize;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromEDID\n"));
+
+ /* !!! Why are we not checking VESA modes? */
+
+ /* checking standard timings */
+ for (i = 0; i < 8; i++)
+ if ((pMon->timings2[i].hsize > 256)
+ && (pMon->timings2[i].hsize > max)) {
+ max = pMon->timings2[i].hsize;
+ vsize = pMon->timings2[i].vsize;
+ }
+
+ if (max != 0) {
+ *width = max;
+ *height = vsize;
+ return TRUE;
+ }
+
+ /* checking detailed monitor section */
+
+ /* !!! skip Ranges and standard timings */
+
+ /* check detailed timings */
+ for (i = 0; i < DET_TIMINGS; i++)
+ if (pMon->det_mon[i].type == DT) {
+ struct detailed_timings timing = pMon->det_mon[i].section.d_timings;
+
+ /* ignore v_active for now */
+ if ((timing.clock > 15000000) && (timing.h_active > max)) {
+ max = timing.h_active;
+ vsize = timing.v_active;
+ }
+ }
+
+ if (max != 0) {
+ *width = max;
+ *height = vsize;
+ return TRUE;
+ }
+
+ return FALSE;
+}
+
+Bool
+ViaPanelGetSizeFromDDCv1(ScrnInfoPtr pScrn, int *width, int *height)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ xf86MonPtr pMon;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromDDCv1\n"));
+
+ if (!xf86I2CProbeAddress(pVia->pI2CBus2, 0xA0))
+ return FALSE;
+
+ pMon = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus2);
+ if (!pMon)
+ return FALSE;
+
+ pVia->DDC2 = pMon;
+
+ if (!pVia->DDC1) {
+ xf86PrintEDID(pMon);
+ xf86SetDDCproperties(pScrn, pMon);
+ }
+
+ if (!ViaPanelGetSizeFromEDID(pScrn, pMon, width, height)) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+ "Unable to read PanelSize from EDID information\n");
+ return FALSE;
+ }
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "VIAGetPanelSizeFromDDCv1: (%dx%d)\n", *width, *height));
+ return TRUE;
+}
+
+Bool
+ViaPanelGetSizeFromDDCv2(ScrnInfoPtr pScrn, int *width)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ CARD8 W_Buffer[1];
+ CARD8 R_Buffer[4];
+ I2CDevPtr dev;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromDDCv2\n"));
+
+ if (!xf86I2CProbeAddress(pVia->pI2CBus2, 0xA2))
+ return FALSE;
+
+ dev = xf86CreateI2CDevRec();
+ if (!dev)
+ return FALSE;
+
+ dev->DevName = "EDID2";
+ dev->SlaveAddr = 0xA2;
+ dev->ByteTimeout = 2200; /* VESA DDC spec 3 p. 43 (+10 %) */
+ dev->StartTimeout = 550;
+ dev->BitTimeout = 40;
+ dev->ByteTimeout = 40;
+ dev->AcknTimeout = 40;
+ dev->pI2CBus = pVia->pI2CBus2;
+
+ if (!xf86I2CDevInit(dev)) {
+ xf86DestroyI2CDevRec(dev, TRUE);
+ return FALSE;
+ }
+
+ xf86I2CReadByte(dev, 0x00, R_Buffer);
+ if (R_Buffer[0] != 0x20) {
+ xf86DestroyI2CDevRec(dev, TRUE);
+ return FALSE;
+ }
+
+ /* Found EDID2 Table */
+
+ W_Buffer[0] = 0x76;
+ xf86I2CWriteRead(dev, W_Buffer, 1, R_Buffer, 2);
+ xf86DestroyI2CDevRec(dev, TRUE);
+
+ *width = R_Buffer[0] | (R_Buffer[1] << 8);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "VIAGetPanelSizeFromDDCv2: %d\n", *width));
+
+ return TRUE;
+}
Index: src/via_video.c
===================================================================
--- src/via_video.c (revision 590)
+++ src/via_video.c (working copy)
@@ -366,14 +366,14 @@
if (pVia->pVbe) {
refresh = 100;
- if (pBIOSInfo->PanelActive)
+ if (pBIOSInfo->Panel->IsActive)
refresh = 70;
if (pBIOSInfo->TVActive)
refresh = 60;
} else {
- if (pBIOSInfo->PanelActive) {
- width = pBIOSInfo->panelX;
- height = pBIOSInfo->panelY;
+ if (pBIOSInfo->Panel->IsActive) {
+ width = pBIOSInfo->Panel->NativeMode->Width;
+ height = pBIOSInfo->Panel->NativeMode->Height;
if ((width == 1400) && (height == 1050)) {
width = 1280;
height = 1024;
@@ -472,6 +472,10 @@
{
VIAPtr pVia = VIAPTR(pScrn);
vmmtr viaVidEng = (vmmtr) pVia->VidMapBase;
+
+ /* Save video registers */
+ /* TODO: Identify which registers should be saved and restored */
+ memcpy(pVia->VideoRegs, (void*)viaVidEng, sizeof(video_via_regs));
pVia->dwV1 = ((vmmtr) viaVidEng)->video1_ctl;
pVia->dwV3 = ((vmmtr) viaVidEng)->video3_ctl;
@@ -486,6 +490,10 @@
{
VIAPtr pVia = VIAPTR(pScrn);
vmmtr viaVidEng = (vmmtr) pVia->VidMapBase;
+
+ /* Restore video registers */
+ /* TODO: Identify which registers should be saved and restored */
+ memcpy((void*)viaVidEng, pVia->VideoRegs, sizeof(video_via_regs));
viaVidEng->video1_ctl = pVia->dwV1;
viaVidEng->video3_ctl = pVia->dwV3;
Index: src/via_lvds.c
===================================================================
--- src/via_lvds.c (revision 0)
+++ src/via_lvds.c (revision 0)
@@ -0,0 +1,121 @@
+/*
+ * Copyright 2007 The Openchrome Project [openchrome.org]
+ * Copyright 1998-2007 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2007 S3 Graphics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+/*
+ * Integrated LVDS power management functions.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "via.h"
+#include "via_driver.h"
+#include "via_vgahw.h"
+#include "via_id.h"
+
+
+static void
+ViaLVDSPowerFirstSequence(ScrnInfoPtr pScrn, Bool on)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ if (on) {
+ /* Use hardware control power sequence. */
+ hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) & 0xFE);
+ /* Turn on back light. */
+ hwp->writeCrtc(hwp, 0x91, hwp->readCrtc(hwp, 0x91) & 0x3F);
+ /* Turn on hardware power sequence. */
+ hwp->writeCrtc(hwp, 0x6A, hwp->readCrtc(hwp, 0x6A) | 0x08);
+ } else {
+ /* Turn off power sequence. */
+ hwp->writeCrtc(hwp, 0x6A, hwp->readCrtc(hwp, 0x6A) & 0xF7);
+ usleep(1);
+ /* Turn off back light. */
+ hwp->writeCrtc(hwp, 0x91, 0xC0);
+ }
+}
+
+static void
+ViaLVDSPowerSecondSequence(ScrnInfoPtr pScrn, Bool on)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ if (on) {
+ /* Use hardware control power sequence. */
+ hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0xFE);
+ /* Turn on back light. */
+ hwp->writeCrtc(hwp, 0xD3, hwp->readCrtc(hwp, 0xD3) & 0x3F);
+ /* Turn on hardware power sequence. */
+ hwp->writeCrtc(hwp, 0xD4, hwp->readCrtc(hwp, 0xD4) | 0x02);
+ } else {
+ /* Turn off power sequence. */
+ hwp->writeCrtc(hwp, 0xD4, hwp->readCrtc(hwp, 0xD4) & 0xFD);
+ usleep(1);
+ /* Turn off back light. */
+ hwp->writeCrtc(hwp, 0xD3, 0xC0);
+ }
+}
+
+static void
+ViaLVDSDFPPower(ScrnInfoPtr pScrn, Bool on)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ if (on) {
+ /* Turn DFP High/Low pad on. */
+ hwp->writeSeq(hwp, 0x2A, hwp->readSeq(hwp, 0x2A) | 0x0F);
+ } else {
+ /* Turn DFP High/Low pad off. */
+ hwp->writeSeq(hwp, 0x2A, hwp->readSeq(hwp, 0x2A) & 0x0F);
+ }
+}
+
+static void
+ViaLVDSPowerChannel(ScrnInfoPtr pScrn, Bool on)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD8 lvdsMask;
+
+ if (on) {
+ /* LVDS0: 0x7F, LVDS1: 0xBF */
+ lvdsMask = 0x7F & 0xBF;
+ hwp->writeCrtc(hwp, 0xD2, hwp->readCrtc(hwp, 0xD2) & lvdsMask);
+ } else {
+ /* LVDS0: 0x80, LVDS1: 0x40 */
+ lvdsMask = 0x80 | 0x40;
+ hwp->writeCrtc(hwp, 0xD2, hwp->readCrtc(hwp, 0xD2) | lvdsMask);
+ }
+}
+
+void
+ViaLVDSPower(ScrnInfoPtr pScrn, Bool on)
+{
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaLVDSPower\n"));
+ ViaLVDSPowerFirstSequence(pScrn, on);
+ ViaLVDSPowerSecondSequence(pScrn, on);
+ ViaLVDSDFPPower(pScrn, on);
+ ViaLVDSPowerChannel(pScrn, on);
+}
Index: src/via_mode.c
===================================================================
--- src/via_mode.c (revision 588)
+++ src/via_mode.c (working copy)
@@ -1,4 +1,5 @@
/*
+ * Copyright 2005-2007 The Openchrome Project [openchrome.org]
* Copyright 2004-2005 The Unichrome Project [unichrome.sf.net]
* Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
* Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
@@ -45,6 +46,54 @@
*/
#include "via_mode.h"
+static void
+ViaPrintMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Name: %s\n", mode->name);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock: %d\n", mode->Clock);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VRefresh: %f\n", mode->VRefresh);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HSync: %f\n", mode->HSync);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HDisplay: %d\n", mode->HDisplay);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HSyncStart: %d\n", mode->HSyncStart);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HSyncEnd: %d\n", mode->HSyncEnd);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HTotal: %d\n", mode->HTotal);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "HSkew: %d\n", mode->HSkew);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VDisplay: %d\n", mode->VDisplay);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VSyncStart: %d\n", mode->VSyncStart);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VSyncEnd: %d\n", mode->VSyncEnd);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VTotal: %d\n", mode->VTotal);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VScan: %d\n", mode->VScan);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Flags: %d\n", mode->Flags);
+
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHDisplay: 0x%x\n",
+ mode->CrtcHDisplay);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankStart: 0x%x\n",
+ mode->CrtcHBlankStart);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncStart: 0x%x\n",
+ mode->CrtcHSyncStart);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncEnd: 0x%x\n",
+ mode->CrtcHSyncEnd);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankEnd: 0x%x\n",
+ mode->CrtcHBlankEnd);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHTotal: 0x%x\n",
+ mode->CrtcHTotal);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSkew: 0x%x\n",
+ mode->CrtcHSkew);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVDisplay: 0x%x\n",
+ mode->CrtcVDisplay);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankStart: 0x%x\n",
+ mode->CrtcVBlankStart);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncStart: 0x%x\n",
+ mode->CrtcVSyncStart);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd: 0x%x\n",
+ mode->CrtcVSyncEnd);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankEnd: 0x%x\n",
+ mode->CrtcVBlankEnd);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVTotal: 0x%x\n",
+ mode->CrtcVTotal);
+
+}
+
/*
*
* TV specific code.
@@ -277,7 +326,7 @@
pBIOSInfo->CrtPresent = TRUE;
}
- /*
+ /*
* FIXME: xf86I2CProbeAddress(pVia->pI2CBus3, 0x40)
* disables the panel on P4M900
* See ViaTVDetect.
@@ -347,14 +396,14 @@
" Initialised register: 0x%02x\n",
VIAGetActiveDisplay(pScrn)));
- pBIOSInfo->PanelActive = FALSE;
+ pBIOSInfo->Panel->IsActive = FALSE;
pBIOSInfo->CrtActive = FALSE;
pBIOSInfo->TVActive = FALSE;
if (!pVia->ActiveDevice) {
/* always enable the panel when present */
if (pBIOSInfo->PanelPresent)
- pBIOSInfo->PanelActive = TRUE;
+ pBIOSInfo->Panel->IsActive = TRUE;
else if (pBIOSInfo->TVOutput != TVOUTPUT_NONE) /* cable is attached! */
pBIOSInfo->TVActive = TRUE;
@@ -364,7 +413,7 @@
} else {
if (pVia->ActiveDevice & VIA_DEVICE_LCD) {
if (pBIOSInfo->PanelPresent)
- pBIOSInfo->PanelActive = TRUE;
+ pBIOSInfo->Panel->IsActive = TRUE;
else
xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unable to activate"
" panel: no panel is present.\n");
@@ -377,7 +426,7 @@
else if (pBIOSInfo->TVOutput == TVOUTPUT_NONE)
xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unable to activate"
" TV encoder: no cable attached.\n");
- else if (pBIOSInfo->PanelActive)
+ else if (pBIOSInfo->Panel->IsActive)
xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unable to activate"
" TV encoder and panel simultaneously. Not using"
" TV encoder.\n");
@@ -386,17 +435,26 @@
}
if ((pVia->ActiveDevice & VIA_DEVICE_CRT)
- || (!pBIOSInfo->PanelActive && !pBIOSInfo->TVActive)) {
+ || (!pBIOSInfo->Panel->IsActive && !pBIOSInfo->TVActive)) {
pBIOSInfo->CrtPresent = TRUE;
pBIOSInfo->CrtActive = TRUE;
}
}
+ if (!pVia->UseLegacyModeSwitch) {
+ if (pBIOSInfo->CrtActive)
+ pBIOSInfo->FirstCRTC->IsActive = TRUE ;
+ if (pBIOSInfo->Panel->IsActive) {
+ pVia->pBIOSInfo->SecondCRTC->IsActive = TRUE ;
+ if (pVia->Chipset == VIA_P4M900 || pVia->Chipset == VIA_CX700)
+ pVia->pBIOSInfo->Lvds->IsActive = TRUE ;
+ }
+ }
#ifdef HAVE_DEBUG
if (pBIOSInfo->CrtActive)
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"ViaOutputsSelect: CRT.\n"));
- if (pBIOSInfo->PanelActive)
+ if (pBIOSInfo->Panel->IsActive)
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
"ViaOutputsSelect: Panel.\n"));
if (pBIOSInfo->TVActive)
@@ -407,141 +465,8 @@
}
/*
- * Try to interprete EDID ourselves.
- */
-static Bool
-ViaGetPanelSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon, int *size)
-{
- int i, max = 0;
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromEDID\n"));
-
- /* !!! Why are we not checking VESA modes? */
-
- /* checking standard timings */
- for (i = 0; i < 8; i++)
- if ((pMon->timings2[i].hsize > 256) && (pMon->timings2[i].hsize > max))
- max = pMon->timings2[i].hsize;
-
- if (max != 0) {
- *size = max;
- return TRUE;
- }
-
- /* checking detailed monitor section */
-
- /* !!! skip Ranges and standard timings */
-
- /* check detailed timings */
- for (i = 0; i < DET_TIMINGS; i++)
- if (pMon->det_mon[i].type == DT) {
- struct detailed_timings timing = pMon->det_mon[i].section.d_timings;
-
- /* ignore v_active for now */
- if ((timing.clock > 15000000) && (timing.h_active > max))
- max = timing.h_active;
- }
-
- if (max != 0) {
- *size = max;
- return TRUE;
- }
-
- return FALSE;
-}
-
-/*
*
*/
-static Bool
-VIAGetPanelSizeFromDDCv1(ScrnInfoPtr pScrn, int *size)
-{
- VIAPtr pVia = VIAPTR(pScrn);
- xf86MonPtr pMon;
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromDDCv1\n"));
-
- if (!xf86I2CProbeAddress(pVia->pI2CBus2, 0xA0))
- return FALSE;
-
- pMon = xf86DoEDID_DDC2(pScrn->scrnIndex, pVia->pI2CBus2);
- if (!pMon)
- return FALSE;
-
- pVia->DDC2 = pMon;
-
- if (!pVia->DDC1) {
- xf86PrintEDID(pMon);
- xf86SetDDCproperties(pScrn, pMon);
- }
-
- if (!ViaGetPanelSizeFromEDID(pScrn, pMon, size)) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Unable to read PanelSize from EDID information\n");
- return FALSE;
- }
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "VIAGetPanelSizeFromDDCv1: %d\n", *size));
- return TRUE;
-}
-
-/*
- *
- */
-static Bool
-VIAGetPanelSizeFromDDCv2(ScrnInfoPtr pScrn, int *size)
-{
- VIAPtr pVia = VIAPTR(pScrn);
- CARD8 W_Buffer[1];
- CARD8 R_Buffer[2];
- I2CDevPtr dev;
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSizeFromDDCv2\n"));
-
- if (!xf86I2CProbeAddress(pVia->pI2CBus2, 0xA2))
- return FALSE;
-
- dev = xf86CreateI2CDevRec();
- if (!dev)
- return FALSE;
-
- dev->DevName = "EDID2";
- dev->SlaveAddr = 0xA2;
- dev->ByteTimeout = 2200; /* VESA DDC spec 3 p. 43 (+10 %) */
- dev->StartTimeout = 550;
- dev->BitTimeout = 40;
- dev->ByteTimeout = 40;
- dev->AcknTimeout = 40;
- dev->pI2CBus = pVia->pI2CBus2;
-
- if (!xf86I2CDevInit(dev)) {
- xf86DestroyI2CDevRec(dev, TRUE);
- return FALSE;
- }
-
- xf86I2CReadByte(dev, 0x00, R_Buffer);
- if (R_Buffer[0] != 0x20) {
- xf86DestroyI2CDevRec(dev, TRUE);
- return FALSE;
- }
-
- /* Found EDID2 Table */
-
- W_Buffer[0] = 0x76;
- xf86I2CWriteRead(dev, W_Buffer, 1, R_Buffer, 2);
- xf86DestroyI2CDevRec(dev, TRUE);
-
- *size = R_Buffer[0] | (R_Buffer[1] << 8);
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "VIAGetPanelSizeFromDDCv2: %d\n", *size));
- return TRUE;
-}
-
-/*
- *
- */
static void
VIAGetPanelSize(ScrnInfoPtr pScrn)
{
@@ -550,56 +475,57 @@
VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
char *PanelSizeString[7] = { "640x480", "800x600", "1024x768", "1280x768"
"1280x1024", "1400x1050", "1600x1200" };
- int size = 0;
+ int width = 0;
+ int height = 0;
Bool ret;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetPanelSize\n"));
- ret = VIAGetPanelSizeFromDDCv1(pScrn, &size);
+ ret = ViaPanelGetSizeFromDDCv1(pScrn, &width, &height);
if (!ret)
- ret = VIAGetPanelSizeFromDDCv2(pScrn, &size);
+ ret = ViaPanelGetSizeFromDDCv2(pScrn, &width);
if (ret) {
- switch (size) {
+ switch (width) {
case 640:
- pBIOSInfo->PanelSize = VIA_PANEL6X4;
+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL6X4;
break;
case 800:
- pBIOSInfo->PanelSize = VIA_PANEL8X6;
+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL8X6;
break;
case 1024:
- pBIOSInfo->PanelSize = VIA_PANEL10X7;
+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL10X7;
break;
case 1280:
- pBIOSInfo->PanelSize = VIA_PANEL12X10;
+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL12X10;
break;
case 1400:
- pBIOSInfo->PanelSize = VIA_PANEL14X10;
+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL14X10;
break;
case 1600:
- pBIOSInfo->PanelSize = VIA_PANEL16X12;
+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL16X12;
break;
default:
- pBIOSInfo->PanelSize = VIA_PANEL_INVALID;
+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL_INVALID;
break;
}
} else {
- pBIOSInfo->PanelSize = hwp->readCrtc(hwp, 0x3F) >> 4;
- if (pBIOSInfo->PanelSize == 0) {
+ pBIOSInfo->Panel->NativeModeIndex = hwp->readCrtc(hwp, 0x3F) >> 4;
+ if (pBIOSInfo->Panel->NativeModeIndex == 0) {
/* VIA_PANEL6X4 == 0, but that value equals unset */
xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unable to "
"retrieve PanelSize: using default (1024x768)\n");
- pBIOSInfo->PanelSize = VIA_PANEL10X7;
+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL10X7;
return;
}
}
- if (pBIOSInfo->PanelSize < 7)
+ if (pBIOSInfo->Panel->NativeModeIndex < 7)
xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Using panel at %s.\n",
- PanelSizeString[pBIOSInfo->PanelSize]);
+ PanelSizeString[pBIOSInfo->Panel->NativeModeIndex]);
else
xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Unknown panel size "
- "detected: %d.\n", pBIOSInfo->PanelSize);
+ "detected: %d.\n", pBIOSInfo->Panel->NativeModeIndex);
}
/*
@@ -656,7 +582,7 @@
/*
*
- * ViaResolutionTable[i].PanelIndex is pBIOSInfo->PanelSize
+ * ViaResolutionTable[i].PanelIndex is pBIOSInfo->PanelSize
* pBIOSInfo->PanelIndex is the index to lcdTable.
*
*/
@@ -670,9 +596,9 @@
pBIOSInfo->PanelIndex = VIA_BIOS_NUM_PANEL;
- if (pBIOSInfo->PanelSize == VIA_PANEL_INVALID) {
+ if (pBIOSInfo->Panel->NativeModeIndex == VIA_PANEL_INVALID) {
VIAGetPanelSize(pScrn);
- if (pBIOSInfo->PanelSize == VIA_PANEL_INVALID) {
+ if (pBIOSInfo->Panel->NativeModeIndex == VIA_PANEL_INVALID) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"ViaPanelGetIndex: PanelSize not set.\n");
return FALSE;
@@ -693,7 +619,8 @@
}
for (i = 0; ViaResolutionTable[i].Index != VIA_RES_INVALID; i++)
- if (ViaResolutionTable[i].PanelIndex == pBIOSInfo->PanelSize) {
+ if (ViaResolutionTable[i].PanelIndex
+ == pBIOSInfo->Panel->NativeModeIndex) {
pBIOSInfo->panelX = ViaResolutionTable[i].X;
pBIOSInfo->panelY = ViaResolutionTable[i].Y;
break;
@@ -713,7 +640,7 @@
}
for (i = 0; i < VIA_BIOS_NUM_PANEL; i++)
- if (lcdTable[i].fpSize == pBIOSInfo->PanelSize) {
+ if (lcdTable[i].fpSize == pBIOSInfo->Panel->NativeModeIndex) {
int modeNum, tmp;
modeNum = ViaGetVesaMode(pScrn, mode);
@@ -778,7 +705,7 @@
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModesAttach\n"));
- if (pBIOSInfo->PanelActive)
+ if (pBIOSInfo->Panel->IsActive)
ViaModesAttachHelper(pScrn, monitorp, ViaPanelModes);
if (pBIOSInfo->TVActive && pBIOSInfo->TVModes)
ViaModesAttachHelper(pScrn, monitorp, pBIOSInfo->TVModes);
@@ -815,155 +742,12 @@
}
}
-/*
- * Checks for limitations imposed by the available VGA timing registers.
- *
- */
-static ModeStatus
-ViaModePrimaryVGAValid(ScrnInfoPtr pScrn, DisplayModePtr mode)
-{
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModePrimaryVGAValid\n"));
+static CARD32
+ViaModeDotClockTranslate(ScrnInfoPtr pScrn, DisplayModePtr mode);
- if (mode->CrtcHTotal > 4100) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHTotal out of range.\n");
- return MODE_BAD_HVALUE;
- }
-
- if (mode->CrtcHDisplay > 2048) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHDisplay out of range.\n");
- return MODE_BAD_HVALUE;
- }
-
- if (mode->CrtcHBlankStart > 2048) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankStart out of range.\n");
- return MODE_BAD_HVALUE;
- }
-
- if ((mode->CrtcHBlankEnd - mode->CrtcHBlankStart) > 1025) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankEnd out of range.\n");
- return MODE_HBLANK_WIDE;
- }
-
- if (mode->CrtcHSyncStart > 4095) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncStart out of range.\n");
- return MODE_BAD_HVALUE;
- }
-
- if ((mode->CrtcHSyncEnd - mode->CrtcHSyncStart) > 256) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncEnd out of range.\n");
- return MODE_HSYNC_WIDE;
- }
-
- if (mode->CrtcVTotal > 2049) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVTotal out of range.\n");
- return MODE_BAD_VVALUE;
- }
-
- if (mode->CrtcVDisplay > 2048) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVDisplay out of range.\n");
- return MODE_BAD_VVALUE;
- }
-
- if (mode->CrtcVSyncStart > 2047) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncStart out of range.\n");
- return MODE_BAD_VVALUE;
- }
-
- if ((mode->CrtcVSyncEnd - mode->CrtcVSyncStart) > 16) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd out of range.\n");
- return MODE_VSYNC_WIDE;
- }
-
- if (mode->CrtcVBlankStart > 2048) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankStart out of range.\n");
- return MODE_BAD_VVALUE;
- }
-
- if ((mode->CrtcVBlankEnd - mode->CrtcVBlankStart) > 257) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankEnd out of range.\n");
- return MODE_VBLANK_WIDE;
- }
-
- return MODE_OK;
-}
-
/*
*
*/
-static ModeStatus
-ViaModeSecondaryVGAValid(ScrnInfoPtr pScrn, DisplayModePtr mode)
-{
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeSecondaryVGAValid\n"));
-
- if (mode->CrtcHTotal > 4096) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHTotal out of range.\n");
- return MODE_BAD_HVALUE;
- }
-
- if (mode->CrtcHDisplay > 2048) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHDisplay out of range.\n");
- return MODE_BAD_HVALUE;
- }
-
- if (mode->CrtcHBlankStart > 2048) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankStart out of range.\n");
- return MODE_BAD_HVALUE;
- }
-
- if (mode->CrtcHBlankEnd > 4096) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankEnd out of range.\n");
- return MODE_HBLANK_WIDE;
- }
-
- if (mode->CrtcHSyncStart > 2047) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncStart out of range.\n");
- return MODE_BAD_HVALUE;
- }
-
- if ((mode->CrtcHSyncEnd - mode->CrtcHSyncStart) > 512) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncEnd out of range.\n");
- return MODE_HSYNC_WIDE;
- }
-
- if (mode->CrtcVTotal > 2048) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVTotal out of range.\n");
- return MODE_BAD_VVALUE;
- }
-
- if (mode->CrtcVDisplay > 2048) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVDisplay out of range.\n");
- return MODE_BAD_VVALUE;
- }
-
- if (mode->CrtcVBlankStart > 2048) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankStart out of range.\n");
- return MODE_BAD_VVALUE;
- }
-
- if (mode->CrtcVBlankEnd > 2048) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankEnd out of range.\n");
- return MODE_VBLANK_WIDE;
- }
-
- if (mode->CrtcVSyncStart > 2047) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncStart out of range.\n");
- return MODE_BAD_VVALUE;
- }
-
- if ((mode->CrtcVSyncEnd - mode->CrtcVSyncStart) > 32) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd out of range.\n");
- return MODE_VSYNC_WIDE;
- }
-
- return MODE_OK;
-}
-
-
-static CARD32 ViaModeDotClockTranslate(ScrnInfoPtr pScrn, DisplayModePtr mode);
-
-/*
- *
- */
ModeStatus
ViaValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags)
{
@@ -982,27 +766,57 @@
if (mode->Flags & V_INTERLACE)
return MODE_NO_INTERLACE;
- if (pVia->IsSecondary)
- ret = ViaModeSecondaryVGAValid(pScrn, mode);
- else
- ret = ViaModePrimaryVGAValid(pScrn, mode);
+ if (pVia->UseLegacyModeSwitch) {
- if (ret != MODE_OK)
- return ret;
+ if (pVia->IsSecondary)
+ ret = ViaSecondCRTCModeValid(pScrn, mode);
+ else
+ ret = ViaFirstCRTCModeValid(pScrn, mode);
- if (pBIOSInfo->TVActive) {
- ret = ViaTVModeValid(pScrn, mode);
- if (ret != MODE_OK) {
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Mode \"%s\" is not supported by TV encoder.\n",
- mode->name);
+ if (ret != MODE_OK)
return ret;
+
+ if (pBIOSInfo->TVActive) {
+ ret = ViaTVModeValid(pScrn, mode);
+ if (ret != MODE_OK) {
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Mode \"%s\" is not supported by TV encoder.\n",
+ mode->name);
+ return ret;
+ }
+ } else {
+ if (pBIOSInfo->Panel->IsActive && !ViaPanelGetIndex(pScrn, mode))
+ return MODE_BAD;
+ else if (!ViaModeDotClockTranslate(pScrn, mode))
+ return MODE_NOCLOCK;
}
- } else if (pBIOSInfo->PanelActive && !ViaPanelGetIndex(pScrn, mode))
- return MODE_BAD;
- else if (!ViaModeDotClockTranslate(pScrn, mode))
- return MODE_NOCLOCK;
+ } else {
+
+ if (pBIOSInfo->FirstCRTC->IsActive) {
+ ret = ViaFirstCRTCModeValid(pScrn, mode);
+ if (ret != MODE_OK)
+ return ret;
+ }
+
+ if (pBIOSInfo->SecondCRTC->IsActive) {
+ ret = ViaSecondCRTCModeValid(pScrn, mode);
+ if (ret != MODE_OK)
+ return ret;
+ }
+
+ if (pBIOSInfo->Panel->IsActive) {
+ ViaPanelModePtr nativeMode = pBIOSInfo->Panel->NativeMode;
+
+ if (nativeMode->Width < mode->HDisplay
+ || nativeMode->Height < mode->VDisplay)
+ return MODE_PANEL;
+ }
+
+ if (!ViaModeDotClockTranslate(pScrn, mode))
+ return MODE_NOCLOCK;
+ }
+
temp = mode->CrtcHDisplay * mode->CrtcVDisplay * mode->VRefresh
* (pScrn->bitsPerPixel >> 3);
if (pBIOSInfo->Bandwidth < temp) {
@@ -1037,7 +851,7 @@
hwp->writeMiscOut(hwp, data | 0x0C);
}
-/*
+/*
*
*/
static void
@@ -1062,7 +876,7 @@
ViaSeqMask(hwp, 0x40, 0x00, 0x02);
}
-/*
+/*
*
*/
static void
@@ -1104,7 +918,7 @@
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIASetLCDMode\n"));
- if (pBIOSInfo->PanelSize == VIA_PANEL12X10)
+ if (pBIOSInfo->Panel->NativeModeIndex == VIA_PANEL12X10)
hwp->writeCrtc(hwp, 0x89, 0x07);
/* LCD Expand Mode Y Scale Flag */
@@ -1165,7 +979,7 @@
case VIA_RES_1280X768:
case VIA_RES_1280X960:
case VIA_RES_1280X1024:
- if (pBIOSInfo->PanelSize == VIA_PANEL12X10)
+ if (pBIOSInfo->Panel->NativeModeIndex == VIA_PANEL12X10)
resIdx = VIA_RES_INVALID;
else
resIdx = 4;
@@ -1317,261 +1131,6 @@
}
}
-/*
- *
- */
-static void
-ViaModePrimaryVGA(ScrnInfoPtr pScrn, DisplayModePtr mode)
-{
- vgaHWPtr hwp = VGAHWPTR(pScrn);
- CARD16 temp;
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModePrimaryVGA\n"));
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModePrimaryVGA: "
- "Setting up %s\n", mode->name));
-
- ViaCrtcMask(hwp, 0x11, 0x00, 0x80); /* modify starting address */
- ViaCrtcMask(hwp, 0x03, 0x80, 0x80); /* enable vertical retrace access */
- hwp->writeSeq(hwp, 0x10, 0x01); /* unlock extended registers */
- ViaCrtcMask(hwp, 0x47, 0x00, 0x01); /* unlock CRT registers */
-
- /* Set Misc Register */
- temp = 0x23;
- if (mode->Flags & V_NHSYNC)
- temp |= 0x40;
- if (mode->Flags & V_NVSYNC)
- temp |= 0x80;
- temp |= 0x0C; /* undefined/external clock */
- hwp->writeMiscOut(hwp, temp);
-
- /* Sequence registers */
- hwp->writeSeq(hwp, 0x00, 0x00);
-
- /* if (mode->Flags & V_CLKDIV2)
- * hwp->writeSeq(hwp, 0x01, 0x09);
- * else */
- hwp->writeSeq(hwp, 0x01, 0x01);
-
- hwp->writeSeq(hwp, 0x02, 0x0F);
- hwp->writeSeq(hwp, 0x03, 0x00);
- hwp->writeSeq(hwp, 0x04, 0x0E);
-
- ViaSeqMask(hwp, 0x15, 0x02, 0x02);
-
- /* bpp */
- switch (pScrn->bitsPerPixel) {
- case 8:
- ViaSeqMask(hwp, 0x15, 0x20, 0xFC);
- break;
- case 16:
- ViaSeqMask(hwp, 0x15, 0xB4, 0xFC);
- break;
- case 24:
- case 32:
- ViaSeqMask(hwp, 0x15, 0xAC, 0xFC);
- break;
- default:
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unhandled bitdepth: %d\n",
- pScrn->bitsPerPixel);
- break;
- }
-
- ViaSeqMask(hwp, 0x16, 0x08, 0xBF);
- ViaSeqMask(hwp, 0x17, 0x1F, 0xFF);
- ViaSeqMask(hwp, 0x18, 0x4E, 0xFF);
- ViaSeqMask(hwp, 0x1A, 0x08, 0xFD);
-
- /* graphics registers */
- hwp->writeGr(hwp, 0x00, 0x00);
- hwp->writeGr(hwp, 0x01, 0x00);
- hwp->writeGr(hwp, 0x02, 0x00);
- hwp->writeGr(hwp, 0x03, 0x00);
- hwp->writeGr(hwp, 0x04, 0x00);
- hwp->writeGr(hwp, 0x05, 0x40);
- hwp->writeGr(hwp, 0x06, 0x05);
- hwp->writeGr(hwp, 0x07, 0x0F);
- hwp->writeGr(hwp, 0x08, 0xFF);
-
- ViaGrMask(hwp, 0x20, 0, 0xFF);
- ViaGrMask(hwp, 0x21, 0, 0xFF);
- ViaGrMask(hwp, 0x22, 0, 0xFF);
-
- /* attribute registers */
- hwp->writeAttr(hwp, 0x00, 0x00);
- hwp->writeAttr(hwp, 0x01, 0x01);
- hwp->writeAttr(hwp, 0x02, 0x02);
- hwp->writeAttr(hwp, 0x03, 0x03);
- hwp->writeAttr(hwp, 0x04, 0x04);
- hwp->writeAttr(hwp, 0x05, 0x05);
- hwp->writeAttr(hwp, 0x06, 0x06);
- hwp->writeAttr(hwp, 0x07, 0x07);
- hwp->writeAttr(hwp, 0x08, 0x08);
- hwp->writeAttr(hwp, 0x09, 0x09);
- hwp->writeAttr(hwp, 0x0A, 0x0A);
- hwp->writeAttr(hwp, 0x0B, 0x0B);
- hwp->writeAttr(hwp, 0x0C, 0x0C);
- hwp->writeAttr(hwp, 0x0D, 0x0D);
- hwp->writeAttr(hwp, 0x0E, 0x0E);
- hwp->writeAttr(hwp, 0x0F, 0x0F);
- hwp->writeAttr(hwp, 0x10, 0x41);
- hwp->writeAttr(hwp, 0x11, 0xFF);
- hwp->writeAttr(hwp, 0x12, 0x0F);
- hwp->writeAttr(hwp, 0x13, 0x00);
- hwp->writeAttr(hwp, 0x14, 0x00);
-
- /* Crtc registers */
- /* horizontal total : 4100 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHTotal: 0x%03X\n",
- mode->CrtcHTotal));
- temp = (mode->CrtcHTotal >> 3) - 5;
- hwp->writeCrtc(hwp, 0x00, temp & 0xFF);
- ViaCrtcMask(hwp, 0x36, temp >> 5, 0x08);
-
- /* horizontal address : 2048 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHDisplay: 0x%03X\n",
- mode->CrtcHDisplay));
- temp = (mode->CrtcHDisplay >> 3) - 1;
- hwp->writeCrtc(hwp, 0x01, temp & 0xFF);
-
- /* horizontal blanking start : 2048 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankStart: 0x%03X\n",
- mode->CrtcHBlankStart));
- if (mode->CrtcHBlankStart != mode->CrtcHDisplay) /* FIXME */
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around "
- "an old VGA limitation (HBlankStart).\n");
- temp = (mode->CrtcHDisplay >> 3) - 1;
- hwp->writeCrtc(hwp, 0x02, temp & 0xFF);
- /* If HblankStart has more bits anywhere, add them here */
-
- /* horizontal blanking end : start + 1025 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankEnd: 0x%03X\n",
- mode->CrtcHBlankEnd));
- if (mode->CrtcHBlankEnd != mode->CrtcHTotal) /* FIXME */
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around "
- "an old VGA limitation (HBlankEnd).\n");
- temp = (mode->CrtcHTotal >> 3) - 1;
- ViaCrtcMask(hwp, 0x03, temp, 0x1F);
- ViaCrtcMask(hwp, 0x05, temp << 2, 0x80);
- ViaCrtcMask(hwp, 0x33, temp >> 1, 0x20);
-
- /* CrtcHSkew ??? */
-
- /* horizontal sync start : 4095 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncStart: 0x%03X\n",
- mode->CrtcHSyncStart));
- temp = mode->CrtcHSyncStart >> 3;
- hwp->writeCrtc(hwp, 0x04, temp & 0xFF);
- ViaCrtcMask(hwp, 0x33, temp >> 4, 0x10);
-
- /* horizontal sync end : start + 256 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncEnd: 0x%03X\n",
- mode->CrtcHSyncEnd));
- temp = mode->CrtcHSyncEnd >> 3;
- ViaCrtcMask(hwp, 0x05, temp, 0x1F);
-
- /* vertical total : 2049 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVTotal: 0x%03X\n",
- mode->CrtcVTotal));
- temp = mode->CrtcVTotal - 2;
- hwp->writeCrtc(hwp, 0x06, temp & 0xFF);
- ViaCrtcMask(hwp, 0x07, temp >> 8, 0x01);
- ViaCrtcMask(hwp, 0x07, temp >> 4, 0x20);
- ViaCrtcMask(hwp, 0x35, temp >> 10, 0x01);
-
- /* vertical address : 2048 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVDisplay: 0x%03X\n",
- mode->CrtcVDisplay));
- temp = mode->CrtcVDisplay - 1;
- hwp->writeCrtc(hwp, 0x12, temp & 0xFF);
- ViaCrtcMask(hwp, 0x07, temp >> 7, 0x02);
- ViaCrtcMask(hwp, 0x07, temp >> 3, 0x40);
- ViaCrtcMask(hwp, 0x35, temp >> 8, 0x04);
-
- /* Primary starting address -> 0x00, adjustframe does the rest */
- hwp->writeCrtc(hwp, 0x0C, 0x00);
- hwp->writeCrtc(hwp, 0x0D, 0x00);
- hwp->writeCrtc(hwp, 0x34, 0x00);
- ViaCrtcMask(hwp, 0x48, 0x00, 0x03); /* is this even possible on CLE266A ? */
-
- /* vertical sync start : 2047 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncStart: 0x%03X\n",
- mode->CrtcVSyncStart));
- temp = mode->CrtcVSyncStart;
- hwp->writeCrtc(hwp, 0x10, temp & 0xFF);
- ViaCrtcMask(hwp, 0x07, temp >> 6, 0x04);
- ViaCrtcMask(hwp, 0x07, temp >> 2, 0x80);
- ViaCrtcMask(hwp, 0x35, temp >> 9, 0x02);
-
- /* vertical sync end : start + 16 -- other bits someplace? */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd: 0x%03X\n",
- mode->CrtcVSyncEnd));
- ViaCrtcMask(hwp, 0x11, mode->CrtcVSyncEnd, 0x0F);
-
- /* line compare: We are not doing splitscreen so 0x3FFF */
- hwp->writeCrtc(hwp, 0x18, 0xFF);
- ViaCrtcMask(hwp, 0x07, 0x10, 0x10);
- ViaCrtcMask(hwp, 0x09, 0x40, 0x40);
- ViaCrtcMask(hwp, 0x33, 0x07, 0x06);
- ViaCrtcMask(hwp, 0x35, 0x10, 0x10);
-
- /* zero Maximum scan line */
- ViaCrtcMask(hwp, 0x09, 0x00, 0x1F);
- hwp->writeCrtc(hwp, 0x14, 0x00);
-
- /* vertical blanking start : 2048 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankStart: 0x%03X\n",
- mode->CrtcVBlankStart));
- if (mode->CrtcVBlankStart != mode->CrtcVDisplay) /* FIXME */
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around "
- "an old VGA limitation (VBlankStart).\n");
- temp = mode->CrtcVDisplay - 1;
- hwp->writeCrtc(hwp, 0x15, temp & 0xFF);
- ViaCrtcMask(hwp, 0x07, temp >> 5, 0x08);
- ViaCrtcMask(hwp, 0x09, temp >> 4, 0x20);
- ViaCrtcMask(hwp, 0x35, temp >> 7, 0x08);
-
- /* vertical blanking end : start + 257 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankEnd: 0x%03X\n",
- mode->CrtcVBlankEnd));
- if (mode->CrtcVBlankEnd != mode->CrtcVTotal) /* FIXME */
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around "
- "an old VGA limitation (VBlankEnd).\n");
- temp = mode->CrtcVTotal - 1;
- hwp->writeCrtc(hwp, 0x16, temp);
-
- /* some leftovers */
- hwp->writeCrtc(hwp, 0x08, 0x00);
- ViaCrtcMask(hwp, 0x32, 0, 0xFF); /* ? */
- ViaCrtcMask(hwp, 0x33, 0, 0xC8);
-
- /* offset */
- temp = (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3)) >> 3;
- /* Make sure that this is 32byte aligned */
- if (temp & 0x03) {
- temp += 0x03;
- temp &= ~0x03;
- }
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Offset: 0x%03X\n", temp));
- hwp->writeCrtc(hwp, 0x13, temp & 0xFF);
- ViaCrtcMask(hwp, 0x35, temp >> 3, 0xE0);
-
- /* fetch count */
- temp = (mode->CrtcHDisplay * (pScrn->bitsPerPixel >> 3)) >> 3;
- /* Make sure that this is 32byte aligned */
- if (temp & 0x03) {
- temp += 0x03;
- temp &= ~0x03;
- }
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Fetch Count: 0x%03X\n", temp));
- hwp->writeSeq(hwp, 0x1C, (temp >> 1) & 0xFF);
- ViaSeqMask(hwp, 0x1D, temp >> 9, 0x03);
-
- /* some leftovers */
- ViaCrtcMask(hwp, 0x32, 0, 0xFF);
- ViaCrtcMask(hwp, 0x33, 0, 0xC8);
-}
-
static CARD32
ViaComputeDotClock(unsigned clock)
{
@@ -1692,13 +1251,14 @@
*
*/
void
-ViaModePrimary(ScrnInfoPtr pScrn, DisplayModePtr mode)
+ViaModePrimaryLegacy(ScrnInfoPtr pScrn, DisplayModePtr mode)
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
VIAPtr pVia = VIAPTR(pScrn);
VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModePrimary\n"));
+ DEBUG(ViaPrintMode(pScrn, mode));
/* Turn off Screen */
ViaCrtcMask(hwp, 0x17, 0x00, 0x80);
@@ -1709,7 +1269,8 @@
hwp->writeCrtc(hwp, 0x6C, 0x00);
hwp->writeCrtc(hwp, 0x93, 0x00);
- ViaModePrimaryVGA(pScrn, mode);
+ ViaCRTCInit(pScrn);
+ ViaFirstCRTCSetMode(pScrn, mode);
pBIOSInfo->Clock = ViaModeDotClockTranslate(pScrn, mode);
pBIOSInfo->ClockExternal = FALSE;
@@ -1721,7 +1282,7 @@
else
ViaSeqMask(hwp, 0x16, 0x00, 0x40);
- if (pBIOSInfo->PanelActive && ViaPanelGetIndex(pScrn, mode)) {
+ if (pBIOSInfo->Panel->IsActive && ViaPanelGetIndex(pScrn, mode)) {
VIASetLCDMode(pScrn, mode);
ViaLCDPower(pScrn, TRUE);
} else if (pBIOSInfo->PanelPresent)
@@ -1765,192 +1326,23 @@
hwp->disablePalette(hwp);
}
-void
-ViaModeSecondaryVGAFetchCount(ScrnInfoPtr pScrn, int width)
-{
-
- vgaHWPtr hwp = VGAHWPTR(pScrn);
- CARD16 temp;
-
- /* fetch count */
- temp = (width * (pScrn->bitsPerPixel >> 3)) >> 3;
- /* Make sure that this is 32byte aligned */
- if (temp & 0x03) {
- temp += 0x03;
- temp &= ~0x03;
- }
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Fetch Count: 0x%03X\n", temp));
- hwp->writeCrtc(hwp, 0x65, (temp >> 1) & 0xFF);
- ViaCrtcMask(hwp, 0x67, temp >> 7, 0x0C);
-}
-
-void
-ViaModeSecondaryVGAOffset(ScrnInfoPtr pScrn)
-{
-
- vgaHWPtr hwp = VGAHWPTR(pScrn);
- CARD16 temp;
-
- /* offset */
- temp = (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3)) >> 3;
- if (temp & 0x03) { /* Make sure that this is 32byte aligned */
- temp += 0x03;
- temp &= ~0x03;
- }
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Offset: 0x%03X\n", temp));
- hwp->writeCrtc(hwp, 0x66, temp & 0xFF);
- ViaCrtcMask(hwp, 0x67, temp >> 8, 0x03);
-
-}
-
/*
*
*/
-static void
-ViaModeSecondaryVGA(ScrnInfoPtr pScrn, DisplayModePtr mode)
-{
- vgaHWPtr hwp = VGAHWPTR(pScrn);
- CARD16 temp;
-
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeSecondaryVGA\n"));
-
- /* bpp */
- switch (pScrn->bitsPerPixel) {
- case 8:
- ViaCrtcMask(hwp, 0x67, 0x00, 0xC0);
- break;
- case 16:
- ViaCrtcMask(hwp, 0x67, 0x40, 0xC0);
- break;
- case 24:
- case 32:
- ViaCrtcMask(hwp, 0x67, 0x80, 0xC0);
- break;
- default:
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unhandled bitdepth: %d\n",
- pScrn->bitsPerPixel);
- break;
- }
-
- /* Crtc registers */
- /* horizontal total : 4096 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHTotal: 0x%03X\n",
- mode->CrtcHTotal));
- temp = mode->CrtcHTotal - 1;
- hwp->writeCrtc(hwp, 0x50, temp & 0xFF);
- ViaCrtcMask(hwp, 0x55, temp >> 8, 0x0F);
-
- /* horizontal address : 2048 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHDisplay: 0x%03X\n",
- mode->CrtcHDisplay));
- temp = mode->CrtcHDisplay - 1;
- hwp->writeCrtc(hwp, 0x51, temp & 0xFF);
- ViaCrtcMask(hwp, 0x55, temp >> 4, 0x70);
-
- /* horizontal blanking start : 2048 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankStart: 0x%03X\n",
- mode->CrtcHBlankStart));
- if (mode->CrtcHBlankStart != mode->CrtcHDisplay) /* FIXME */
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around "
- "an old VGA limitation (HBlankStart).\n");
- temp = mode->CrtcHDisplay - 1;
- hwp->writeCrtc(hwp, 0x52, temp & 0xFF);
- ViaCrtcMask(hwp, 0x54, temp >> 8, 0x07);
-
- /* horizontal blanking end : 4096 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHBlankEnd: 0x%03X\n",
- mode->CrtcHBlankEnd));
- if (mode->CrtcHBlankEnd != mode->CrtcHTotal) /* FIXME */
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around "
- "an old VGA limitation (HBlankEnd).\n");
- temp = mode->CrtcHTotal - 1;
- hwp->writeCrtc(hwp, 0x53, temp & 0xFF);
- ViaCrtcMask(hwp, 0x54, temp >> 5, 0x38);
- ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x40);
-
- /* horizontal sync start : 2047 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncStart: 0x%03X\n",
- mode->CrtcHSyncStart));
- temp = mode->CrtcHSyncStart;
- hwp->writeCrtc(hwp, 0x56, temp & 0xFF);
- ViaCrtcMask(hwp, 0x54, temp >> 2, 0xC0);
- ViaCrtcMask(hwp, 0x5C, temp >> 3, 0x80);
-
- /* horizontal sync end : sync start + 512 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcHSyncEnd: 0x%03X\n",
- mode->CrtcHSyncEnd));
- temp = mode->CrtcHSyncEnd;
- hwp->writeCrtc(hwp, 0x57, temp & 0xFF);
- ViaCrtcMask(hwp, 0x5C, temp >> 2, 0x40);
-
- /* vertical total : 2048 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVTotal: 0x%03X\n",
- mode->CrtcVTotal));
- temp = mode->CrtcVTotal - 1;
- hwp->writeCrtc(hwp, 0x58, temp & 0xFF);
- ViaCrtcMask(hwp, 0x5D, temp >> 8, 0x07);
-
- /* vertical address : 2048 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVDisplay: 0x%03X\n",
- mode->CrtcVDisplay));
- temp = mode->CrtcVDisplay - 1;
- hwp->writeCrtc(hwp, 0x59, temp & 0xFF);
- ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x38);
-
- /* vertical blanking start : 2048 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankStart: 0x%03X\n",
- mode->CrtcVBlankStart));
- if (mode->CrtcVBlankStart != mode->CrtcVDisplay) /* FIXME */
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around "
- "an old VGA limitation (VBlankStart).\n");
- temp = mode->CrtcVDisplay - 1;
- hwp->writeCrtc(hwp, 0x5A, temp & 0xFF);
- ViaCrtcMask(hwp, 0x5C, temp >> 8, 0x07);
-
- /* vertical blanking end : 2048 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVBlankEnd: 0x%03X\n",
- mode->CrtcVBlankEnd));
- if (mode->CrtcVBlankEnd != mode->CrtcVTotal) /* FIXME */
- xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Caught X working around "
- "an old VGA limitation (VBlankEnd).\n");
- temp = mode->CrtcVTotal - 1;
- hwp->writeCrtc(hwp, 0x5B, temp & 0xFF);
- ViaCrtcMask(hwp, 0x5C, temp >> 5, 0x38);
-
- /* vertical sync start : 2047 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncStart: 0x%03X\n",
- mode->CrtcVSyncStart));
- temp = mode->CrtcVSyncStart;
- hwp->writeCrtc(hwp, 0x5E, temp & 0xFF);
- ViaCrtcMask(hwp, 0x5F, temp >> 3, 0xE0);
-
- /* vertical sync end : start + 32 */
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "CrtcVSyncEnd: 0x%03X\n",
- mode->CrtcVSyncEnd));
- temp = mode->CrtcVSyncEnd;
- ViaCrtcMask(hwp, 0x5F, temp, 0x1F);
-
- ViaModeSecondaryVGAOffset(pScrn);
- ViaModeSecondaryVGAFetchCount(pScrn, mode->CrtcHDisplay);
-
-}
-
-/*
- *
- */
void
-ViaModeSecondary(ScrnInfoPtr pScrn, DisplayModePtr mode)
+ViaModeSecondaryLegacy(ScrnInfoPtr pScrn, DisplayModePtr mode)
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
VIAPtr pVia = VIAPTR(pScrn);
VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeSecondary\n"));
+ DEBUG(ViaPrintMode(pScrn, mode));
/* Turn off Screen */
ViaCrtcMask(hwp, 0x17, 0x00, 0x80);
- ViaModeSecondaryVGA(pScrn, mode);
+ ViaSecondCRTCSetMode(pScrn, mode);
if (pBIOSInfo->TVActive)
ViaTVSetMode(pScrn, mode);
@@ -1959,7 +1351,7 @@
if (!(pVia->Chipset == VIA_CLE266 && pVia->ChipRev == 0x02))
ViaCrtcMask(hwp, 0x6C, 0x00, 0x1E);
- if (pBIOSInfo->PanelActive
+ if (pBIOSInfo->Panel->IsActive
&& (pBIOSInfo->PanelIndex != VIA_BIOS_NUM_PANEL)) {
pBIOSInfo->SetDVI = TRUE;
VIASetLCDMode(pScrn, mode);
@@ -2019,7 +1411,7 @@
/* Find Panel Size Index for PowerSeq Table */
if (pVia->Chipset == VIA_CLE266) {
- if (pBIOSInfo->PanelSize != VIA_PANEL_INVALID) {
+ if (pBIOSInfo->Panel->NativeModeIndex != VIA_PANEL_INVALID) {
for (i = 0; i < NumPowerOn; i++) {
if (lcdTable[pBIOSInfo->PanelIndex].powerSeq
== powerOn[i].powerSeq)
@@ -2038,3 +1430,106 @@
ViaLCDPowerSequence(hwp, powerOff[i]);
usleep(1);
}
+
+void
+ViaModeFirstCRTC(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeFirstCRTC\n");
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ VIAPtr pVia = VIAPTR(pScrn);
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
+
+ /* Turn off Screen */
+ ViaCrtcMask(hwp, 0x17, 0x00, 0x80);
+
+ ViaFirstCRTCSetMode(pScrn, mode);
+ pBIOSInfo->Clock = ViaModeDotClockTranslate(pScrn, mode);
+ pBIOSInfo->ClockExternal = FALSE;
+
+ ViaSetPrimaryFIFO(pScrn, mode);
+
+ ViaSetPrimaryDotclock(pScrn, pBIOSInfo->Clock);
+ ViaSetUseExternalClock(hwp);
+ ViaCrtcMask(hwp, 0x6B, 0x00, 0x01);
+
+ hwp->disablePalette(hwp);
+
+ /* Turn on Screen */
+ ViaCrtcMask(hwp, 0x17, 0x80, 0x80);
+}
+
+void
+ViaModeSecondCRTC(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ DisplayModePtr nativeDisplayMode = pBIOSInfo->Panel->NativeDisplayMode;
+ DisplayModePtr centeredMode = pBIOSInfo->Panel->CenteredMode;
+ DisplayModePtr realMode = mode;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeSecondCRTC\n"));
+
+ if (pBIOSInfo->Panel->IsActive) {
+ if (nativeDisplayMode) {
+ ViaPanelScale(pScrn, mode->HDisplay, mode->VDisplay,
+ nativeDisplayMode->HDisplay,
+ nativeDisplayMode->VDisplay);
+ if (!pBIOSInfo->Center
+ && (mode->HDisplay < nativeDisplayMode->HDisplay
+ || mode->VDisplay < nativeDisplayMode->VDisplay)) {
+ pBIOSInfo->Panel->Scale = TRUE;
+ realMode = nativeDisplayMode;
+ } else {
+ pBIOSInfo->Panel->Scale = FALSE;
+ ViaPanelCenterMode(centeredMode, nativeDisplayMode, mode);
+ realMode = centeredMode;
+ ViaPanelScaleDisable(pScrn);
+ }
+ }
+ }
+
+ ViaSecondCRTCSetMode(pScrn, realMode);
+ ViaSetSecondaryFIFO(pScrn, realMode);
+ pBIOSInfo->Clock = ViaModeDotClockTranslate(pScrn, realMode);
+
+ /* Fix LCD scaling */
+ ViaSecondCRTCHorizontalQWCount(pScrn, mode->CrtcHDisplay);
+
+ pBIOSInfo->ClockExternal = FALSE;
+ ViaSetSecondaryDotclock(pScrn, pBIOSInfo->Clock);
+ ViaSetUseExternalClock(hwp);
+
+ hwp->disablePalette(hwp);
+}
+
+void
+ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaModeSet\n"));
+
+ ViaPrintMode(pScrn, mode);
+
+ if (pBIOSInfo->SecondCRTC->IsActive) {
+ ViaModeSecondCRTC(pScrn, mode);
+ ViaSecondDisplayChannelEnable(pScrn);
+ }
+
+ if (pBIOSInfo->FirstCRTC->IsActive) {
+ /* CRT on FirstCRTC */
+ ViaDisplaySetStreamOnCRT(pScrn, TRUE);
+ ViaDisplayEnableCRT(pScrn);
+ ViaModeFirstCRTC(pScrn, mode);
+ } else {
+ ViaDisplayDisableCRT(pScrn);
+ }
+
+ if (pBIOSInfo->Simultaneous->IsActive) {
+ ViaDisplayEnableSimultaneous(pScrn);
+ } else {
+ ViaDisplayDisableSimultaneous(pScrn);
+ }
+}
Index: src/via_driver.c
===================================================================
--- src/via_driver.c (revision 588)
+++ src/via_driver.c (working copy)
@@ -513,34 +513,99 @@
static Bool
VIAGetRec(ScrnInfoPtr pScrn)
{
+ Bool ret;
+
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAGetRec\n"));
+
+ ret = FALSE;
if (pScrn->driverPrivate)
return TRUE;
pScrn->driverPrivate = xnfcalloc(sizeof(VIARec), 1);
- ((VIARec *) (pScrn->driverPrivate))->pBIOSInfo =
- xnfcalloc(sizeof(VIABIOSInfoRec), 1);
- ((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->scrnIndex =
- pScrn->scrnIndex;
- ((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->TVI2CDev = NULL;
+ VIAPtr pVia = ((VIARec *) (pScrn->driverPrivate));
- ((VIARec *) (pScrn->driverPrivate))->CursorImage = NULL;
+ if (pVia) {
- return TRUE;
+ pVia->pBIOSInfo = xnfcalloc(sizeof(VIABIOSInfoRec), 1);
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
+ if (pBIOSInfo) {
+ pBIOSInfo->scrnIndex = pScrn->scrnIndex;
+ pBIOSInfo->TVI2CDev = NULL;
+
+ pBIOSInfo->Panel =
+ (ViaPanelInfoPtr) xnfcalloc(sizeof(ViaPanelInfoRec), 1);
+ if (pBIOSInfo->Panel) {
+ pBIOSInfo->Panel->NativeModeIndex = VIA_PANEL_INVALID;
+ pBIOSInfo->Panel->NativeMode =
+ (ViaPanelModePtr) xnfcalloc(sizeof(ViaPanelModeRec), 1);
+ pBIOSInfo->Panel->CenteredMode =
+ (DisplayModePtr) xnfcalloc(sizeof(DisplayModeRec), 1);
+ pBIOSInfo->Lvds =
+ (ViaLVDSInfoPtr) xnfcalloc(sizeof(ViaLVDSInfoRec), 1);
+ pBIOSInfo->FirstCRTC =
+ (ViaCRTCInfoPtr) xnfcalloc(sizeof(ViaCRTCInfoRec), 1);
+ pBIOSInfo->SecondCRTC =
+ (ViaCRTCInfoPtr) xnfcalloc(sizeof(ViaCRTCInfoRec), 1);
+ pBIOSInfo->Simultaneous =
+ (ViaSimultaneousInfoPtr)
+ xnfcalloc(sizeof(ViaSimultaneousInfoRec), 1);
+ ret = pBIOSInfo->Panel->NativeMode
+ && pBIOSInfo->Panel->CenteredMode && pBIOSInfo->Lvds
+ && pBIOSInfo->FirstCRTC && pBIOSInfo->SecondCRTC
+ && pBIOSInfo->Simultaneous;
+ }
+ pVia->VideoRegs =
+ (video_via_regs *) xnfcalloc(sizeof(video_via_regs), 1);
+ if (!pVia->VideoRegs)
+ ret = FALSE;
+ }
+ }
+
+ return ret;
+
} /* VIAGetRec */
static void
VIAFreeRec(ScrnInfoPtr pScrn)
{
+ VIAPtr pVia = VIAPTR(pScrn);
+
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAFreeRec\n"));
if (!pScrn->driverPrivate)
return;
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
+
+ if (pBIOSInfo) {
+
+ if (pBIOSInfo->Panel) {
+ if (pBIOSInfo->Panel->NativeMode)
+ xfree(pBIOSInfo->Panel->NativeMode);
+ if (pBIOSInfo->Panel->CenteredMode)
+ xfree(pBIOSInfo->Panel->CenteredMode);
+ xfree(pBIOSInfo->Panel);
+ }
+
+ if (pBIOSInfo->FirstCRTC)
+ xfree(pBIOSInfo->FirstCRTC);
+ if (pBIOSInfo->SecondCRTC)
+ xfree(pBIOSInfo->SecondCRTC);
+ if (pBIOSInfo->Simultaneous)
+ xfree(pBIOSInfo->Simultaneous);
+ if (pBIOSInfo->Lvds)
+ xfree(pBIOSInfo->Lvds);
+ }
+
+ viaCursorRecDestroy(pScrn);
+
if (VIAPTR(pScrn)->pVbe)
vbeFree(VIAPTR(pScrn)->pVbe);
+ if (pVia->VideoRegs)
+ xfree(pVia->VideoRegs);
+
if (((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->TVI2CDev)
xf86DestroyI2CDevRec((((VIARec *) (pScrn->driverPrivate))->pBIOSInfo->
TVI2CDev), TRUE);
@@ -791,7 +856,7 @@
pVia->noComposite = FALSE;
pVia->exaScratchSize = VIA_SCRATCH_SIZE / 1024;
#endif
- pVia->hwcursor = TRUE;
+ pVia->cursor->isHWCursorEnabled = TRUE;
pVia->VQEnable = TRUE;
pVia->DRIIrqEnable = TRUE;
pVia->agpEnable = TRUE;
@@ -813,6 +878,8 @@
pVia->swov.maxHInterp = 600;
pVia->useLegacyVBE = TRUE;
+ pVia->UseLegacyModeSwitch = TRUE;
+
switch (pVia->Chipset) {
case VIA_KM400:
/* IRQ is not broken on KM400A, but testing (pVia->ChipRev < 0x80)
@@ -831,6 +898,7 @@
pVia->VideoEngine = VIDEO_ENGINE_CME;
pVia->agpEnable = FALSE;
pVia->dmaXV = FALSE;
+ pVia->UseLegacyModeSwitch = FALSE;
break;
case VIA_P4M900:
pVia->VideoEngine = VIDEO_ENGINE_CME;
@@ -838,15 +906,18 @@
pVia->useLegacyVBE = FALSE;
/* FIXME: this needs to be tested */
pVia->dmaXV = FALSE;
+ pVia->UseLegacyModeSwitch = FALSE;
break;
case VIA_CX700:
pVia->VideoEngine = VIDEO_ENGINE_CME;
pVia->swov.maxWInterp = 1920;
pVia->swov.maxHInterp = 1080;
+ pVia->UseLegacyModeSwitch = FALSE;
break;
case VIA_P4M890:
pVia->VideoEngine = VIDEO_ENGINE_CME;
pVia->dmaXV = FALSE;
+ pVia->UseLegacyModeSwitch = FALSE;
break;
}
@@ -1080,6 +1154,11 @@
xf86DrvMsg(pScrn->scrnIndex, from, "Chipset revision: %d\n", pVia->ChipRev);
+ if (!viaCursorRecInit(pScrn)) {
+ VIAFreeRec(pScrn);
+ return FALSE;
+ }
+
xfree(pEnt);
/* Detect the amount of installed RAM */
@@ -1240,12 +1319,13 @@
/* Use a hardware cursor, unless on secondary or on shadow framebuffer. */
from = X_DEFAULT;
if (pVia->IsSecondary || pVia->shadowFB)
- pVia->hwcursor = FALSE;
- else if (xf86GetOptValBool(VIAOptions, OPTION_SWCURSOR, &pVia->hwcursor)) {
- pVia->hwcursor = !pVia->hwcursor;
+ pVia->cursor->isHWCursorEnabled = FALSE;
+ else if (xf86GetOptValBool(VIAOptions, OPTION_SWCURSOR,
+ &pVia->cursor->isHWCursorEnabled)) {
+ pVia->cursor->isHWCursorEnabled = !pVia->cursor->isHWCursorEnabled;
from = X_CONFIG;
}
- if (pVia->hwcursor)
+ if (pVia->cursor->isHWCursorEnabled)
xf86DrvMsg(pScrn->scrnIndex, from, "Using hardware two-color "
"cursors and software full-color cursors.\n");
else
@@ -1375,45 +1455,24 @@
xf86DrvMsg(pScrn->scrnIndex, from, "DVI Center is %s.\n",
pBIOSInfo->Center ? "enabled" : "disabled");
-
/* Panel Size Option */
- pBIOSInfo->PanelSize = VIA_PANEL_INVALID;
if ((s = xf86GetOptValString(VIAOptions, OPTION_PANELSIZE))) {
- if (!xf86NameCmp(s, "640x480")) {
- pBIOSInfo->PanelSize = VIA_PANEL6X4;
+ ViaPanelGetNativeModeFromOption(pScrn, s);
+ if (pBIOSInfo->Panel->NativeModeIndex != VIA_PANEL_INVALID) {
+ ViaPanelModePtr mode = pBIOSInfo->Panel->NativeMode;
+
+ DEBUG(xf86DrvMsg
+ (pScrn->scrnIndex, X_CONFIG, "Panel mode index is %d\n",
+ pBIOSInfo->Panel->NativeModeIndex));
xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Selected Panel Size is 640x480\n");
- } else if (!xf86NameCmp(s, "800x600")) {
- pBIOSInfo->PanelSize = VIA_PANEL8X6;
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Selected Panel Size is 800x600\n");
- } else if (!xf86NameCmp(s, "1024x768")) {
- pBIOSInfo->PanelSize = VIA_PANEL10X7;
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Selected Panel Size is 1024x768\n");
- } else if (!xf86NameCmp(s, "1280x768")) {
- pBIOSInfo->PanelSize = VIA_PANEL12X7;
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Selected Panel Size is 1280x768\n");
- } else if (!xf86NameCmp(s, "1280x800")) {
- pBIOSInfo->PanelSize = VIA_PANEL12X8;
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Selected Panel Size is 1280x800\n");
- } else if (!xf86NameCmp(s, "1280x1024")) {
- pBIOSInfo->PanelSize = VIA_PANEL12X10;
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Selected Panel Size is 1280x1024\n");
- } else if (!xf86NameCmp(s, "1400x1050")) {
- pBIOSInfo->PanelSize = VIA_PANEL14X10;
- xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
- "Selected Panel Size is 1400x1050\n");
+ "Selected Panel Size is %dx%d\n", mode->Width,
+ mode->Height);
}
} else {
xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT,
"Panel size is not selected from config file.\n");
}
-
/* Force the use of the Panel? */
pBIOSInfo->ForcePanel = FALSE;
from = xf86GetOptValBool(VIAOptions, OPTION_FORCEPANEL,
@@ -1605,17 +1661,17 @@
return FALSE;
}
- if (pBIOSInfo->PanelActive &&
+ if (!pVia->UseLegacyModeSwitch) {
+ if (pBIOSInfo->Panel->IsActive)
+ ViaPanelPreInit(pScrn);
+ }
+
+ if (pBIOSInfo->Panel->IsActive &&
((pVia->Chipset == VIA_K8M800) ||
(pVia->Chipset == VIA_PM800) ||
- (pVia->Chipset == VIA_VM800) ||
- (pVia->Chipset == VIA_P4M890) ||
- (pVia->Chipset == VIA_K8M890) ||
- (pVia->Chipset == VIA_CX700) ||
- (pVia->Chipset == VIA_P4M900))) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Panel on K8M800, PM800, VM800, P4M890, K8M890, CX700 or "
- "P4M900 is currently not supported.\n");
+ (pVia->Chipset == VIA_VM800))) {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "Panel on K8M800, PM800 and "
+ "VM800 is currently not supported.\n");
xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
"Using VBE to set modes to work around this.\n");
pVia->useVBEModes = TRUE;
@@ -1787,7 +1849,7 @@
xf86LoaderReqSymLists(xaaSymbols, NULL);
}
- if (pVia->hwcursor) {
+ if (pVia->cursor->isHWCursorEnabled) {
if (!xf86LoadSubModule(pScrn, "ramdac")) {
VIAFreeRec(pScrn);
return FALSE;
@@ -1835,8 +1897,8 @@
VIASaveScreen(pScrn->pScreen, SCREEN_SAVER_ON);
/* A patch for APM suspend/resume, when HWCursor has garbage. */
- if (pVia->hwcursor)
- ViaCursorRestore(pScrn);
+ if (pVia->cursor->isHWCursorEnabled)
+ viaCursorRestore(pScrn);
/* Restore video status. */
if (!pVia->IsSecondary)
@@ -1907,8 +1969,8 @@
if (!pVia->IsSecondary)
viaSaveVideo(pScrn);
- if (pVia->hwcursor)
- ViaCursorStore(pScrn);
+ if (pVia->cursor->isHWCursorEnabled)
+ viaCursorStore(pScrn);
if (pVia->pVbe && pVia->vbeSR)
ViaVbeSaveRestore(pScrn, MODE_RESTORE);
@@ -1918,7 +1980,40 @@
vgaHWLock(hwp);
}
+static void
+ViaGammaDisable(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ switch (pVia->Chipset) {
+ case VIA_CLE266:
+ case VIA_KM400:
+ ViaSeqMask(hwp, 0x16, 0x00, 0x80);
+ break;
+ default:
+ ViaCrtcMask(hwp, 0x33, 0x00, 0x80);
+ break;
+ }
+
+ /* Disable gamma on secondary */
+ /* This is needed or the hardware will lockup */
+ ViaSeqMask(hwp, 0x1A, 0x00, 0x01);
+ ViaCrtcMask(hwp, 0x6A, 0x00, 0x02);
+ switch (pVia->Chipset) {
+ case VIA_CLE266:
+ case VIA_KM400:
+ case VIA_K8M800:
+ case VIA_PM800:
+ break;
+ default:
+ ViaCrtcMask(hwp, 0x6A, 0x00, 0x20);
+ break;
+ }
+
+}
+
static void
VIASave(ScrnInfoPtr pScrn)
{
@@ -2009,6 +2104,7 @@
Regs->CR35 = hwp->readCrtc(hwp, 0x35);
Regs->CR36 = hwp->readCrtc(hwp, 0x36);
+ Regs->CR48 = hwp->readCrtc(hwp, 0x48);
Regs->CR49 = hwp->readCrtc(hwp, 0x49);
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "TVSave...\n"));
@@ -2019,15 +2115,19 @@
for (i = 0; i < 68; i++)
Regs->CRTCRegs[i] = hwp->readCrtc(hwp, i + 0x50);
- Regs->CRA0 = hwp->readCrtc(hwp, 0xA0);
- Regs->CRA1 = hwp->readCrtc(hwp, 0xA1);
- Regs->CRA2 = hwp->readCrtc(hwp, 0xA2);
+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) {
- Regs->CR97 = hwp->readCrtc(hwp, 0x97);
- Regs->CR99 = hwp->readCrtc(hwp, 0x99);
- Regs->CR9B = hwp->readCrtc(hwp, 0x9B);
- Regs->CR9F = hwp->readCrtc(hwp, 0x9F);
+ Regs->CRA0 = hwp->readCrtc(hwp, 0xA0);
+ Regs->CRA1 = hwp->readCrtc(hwp, 0xA1);
+ Regs->CRA2 = hwp->readCrtc(hwp, 0xA2);
+ Regs->CR97 = hwp->readCrtc(hwp, 0x97);
+ Regs->CR99 = hwp->readCrtc(hwp, 0x99);
+ Regs->CR9B = hwp->readCrtc(hwp, 0x9B);
+ Regs->CR9F = hwp->readCrtc(hwp, 0x9F);
+
+ }
+
vgaHWProtect(pScrn, FALSE);
}
}
@@ -2055,6 +2155,8 @@
hwp->writeCrtc(hwp, 0x6B, 0x00);
hwp->writeCrtc(hwp, 0x6C, 0x00);
+ ViaGammaDisable(pScrn);
+
if (pBIOSInfo->TVI2CDev)
ViaTVRestore(pScrn);
@@ -2118,22 +2220,27 @@
hwp->writeCrtc(hwp, 0x35, Regs->CR35);
hwp->writeCrtc(hwp, 0x36, Regs->CR36);
+ hwp->writeCrtc(hwp, 0x48, Regs->CR48);
hwp->writeCrtc(hwp, 0x49, Regs->CR49);
/* Restore LCD control registers. */
for (i = 0; i < 68; i++)
hwp->writeCrtc(hwp, i + 0x50, Regs->CRTCRegs[i]);
- hwp->writeCrtc(hwp, 0xA0, Regs->CRA0);
- hwp->writeCrtc(hwp, 0xA1, Regs->CRA1);
- hwp->writeCrtc(hwp, 0xA2, Regs->CRA2);
-#if 0
- hwp->writeCrtc(hwp, 0x97, Regs->CR97);
- hwp->writeCrtc(hwp, 0x99, Regs->CR99);
- hwp->writeCrtc(hwp, 0x9B, Regs->CR9B);
- hwp->writeCrtc(hwp, 0x9F, Regs->CR9F);
-#endif
- if (pBIOSInfo->PanelActive)
+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400) {
+
+ hwp->writeCrtc(hwp, 0xA0, Regs->CRA0);
+ hwp->writeCrtc(hwp, 0xA1, Regs->CRA1);
+ hwp->writeCrtc(hwp, 0xA2, Regs->CRA2);
+
+ hwp->writeCrtc(hwp, 0x97, Regs->CR97);
+ hwp->writeCrtc(hwp, 0x99, Regs->CR99);
+ hwp->writeCrtc(hwp, 0x9B, Regs->CR9B);
+ hwp->writeCrtc(hwp, 0x9F, Regs->CR9F);
+
+ }
+
+ if (pBIOSInfo->Panel->IsActive)
ViaLCDPower(pScrn, TRUE);
ViaDisablePrimaryFIFO(pScrn);
@@ -2145,7 +2252,45 @@
vgaHWProtect(pScrn, FALSE);
}
+static void
+ViaMMIOEnable(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ switch (pVia->Chipset) {
+ case VIA_K8M890:
+ case VIA_CX700:
+ case VIA_P4M900:
+ ViaSeqMask(hwp, 0x1A, 0x08, 0x08);
+ break;
+ default:
+ if (pVia->IsSecondary)
+ ViaSeqMask(hwp, 0x1A, 0x38, 0x38);
+ else
+ ViaSeqMask(hwp, 0x1A, 0x68, 0x68);
+ break;
+ }
+}
+
+static void
+ViaMMIODisable(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ switch (pVia->Chipset) {
+ case VIA_K8M890:
+ case VIA_CX700:
+ case VIA_P4M900:
+ ViaSeqMask(VGAHWPTR(pScrn), 0x1A, 0x00, 0x08);
+ break;
+ default:
+ ViaSeqMask(VGAHWPTR(pScrn), 0x1A, 0x00, 0x60);
+ break;
+ }
+}
+
static Bool
VIAMapMMIO(ScrnInfoPtr pScrn)
{
@@ -2215,7 +2360,7 @@
if (!pVia->MapBase || !pVia->BltBase) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Internal error: cound not map registers\n");
+ "BitBlit could not be mapped.\n");
return FALSE;
}
@@ -2238,14 +2383,15 @@
hwp->writeMiscOut(hwp, val | 0x01);
/* Unlock extended IO space. */
- hwp->writeSeq(hwp, 0x10, 0x01);
+ ViaSeqMask(hwp, 0x10, 0x01, 0x01);
- /* Enable MMIO. */
- if (pVia->IsSecondary)
- ViaSeqMask(hwp, 0x1A, 0x38, 0x38);
- else
- ViaSeqMask(hwp, 0x1A, 0x68, 0x68);
+ ViaMMIOEnable(pScrn);
+ vgaHWSetMmioFuncs(hwp, pVia->MapBase, 0x8000);
+
+ /* Unlock CRTC. */
+ ViaCrtcMask(hwp, 0x47, 0x00, 0x01);
+
vgaHWGetIOBase(hwp);
}
@@ -2346,8 +2492,7 @@
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAUnmapMem\n"));
- /* Disable MMIO. */
- ViaSeqMask(VGAHWPTR(pScrn), 0x1A, 0x00, 0x60);
+ ViaMMIODisable(pScrn);
#ifdef XSERVER_LIBPCIACCESS
if (pVia->MapBase)
@@ -2431,75 +2576,65 @@
{
vgaHWPtr hwp = VGAHWPTR(pScrn);
VIAPtr pVia = VIAPTR(pScrn);
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
+
int i, index;
int SR1A, SR1B, CR67, CR6A;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIALoadPalette\n"));
if (pScrn->bitsPerPixel != 8) {
- switch (pVia->Chipset) {
- case VIA_CLE266:
- case VIA_KM400:
- ViaSeqMask(hwp, 0x16, 0x80, 0x80);
- break;
- case VIA_P4M900:
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING, "VIALoadPalette: "
- "Function not implemented for this chipset.\n");
- return;
- default:
- ViaCrtcMask(hwp, 0x33, 0x80, 0x80);
- break;
- }
- ViaSeqMask(hwp, 0x1A, 0x00, 0x01);
- VIALoadRgbLut(pScrn, numColors, indices, colors, pVisual);
+ if (pBIOSInfo->FirstCRTC->IsActive) {
- /* If secondary is enabled, adjust its palette too. */
- if (hwp->readCrtc(hwp, 0x6A) & 0x80) {
- ViaSeqMask(hwp, 0x1A, 0x01, 0x01);
- ViaCrtcMask(hwp, 0x6A, 0x02, 0x02);
switch (pVia->Chipset) {
- case VIA_K8M800:
- case VIA_PM800:
+ case VIA_CLE266:
+ case VIA_KM400:
+ ViaSeqMask(hwp, 0x16, 0x80, 0x80);
break;
default:
- ViaSeqMask(hwp, 0x6A, 0x20, 0x20);
+ ViaCrtcMask(hwp, 0x33, 0x80, 0x80);
break;
}
+
+ ViaSeqMask(hwp, 0x1A, 0x00, 0x01);
VIALoadRgbLut(pScrn, numColors, indices, colors, pVisual);
}
- return;
- }
+ /* If secondary is enabled, adjust its palette too. */
+ if (pBIOSInfo->SecondCRTC->IsActive) {
+ if (!(pVia->Chipset == VIA_CLE266
+ && CLE266_REV_IS_AX(pVia->ChipRev))) {
+ ViaSeqMask(hwp, 0x1A, 0x01, 0x01);
+ ViaCrtcMask(hwp, 0x6A, 0x02, 0x02);
+ switch (pVia->Chipset) {
+ case VIA_CLE266:
+ case VIA_KM400:
+ case VIA_K8M800:
+ case VIA_PM800:
+ break;
+ default:
+ ViaCrtcMask(hwp, 0x6A, 0x20, 0x20);
+ break;
+ }
+ VIALoadRgbLut(pScrn, numColors, indices, colors, pVisual);
+ }
+ }
- SR1A = hwp->readSeq(hwp, 0x1A);
- SR1B = hwp->readSeq(hwp, 0x1B);
- CR67 = hwp->readCrtc(hwp, 0x67);
- CR6A = hwp->readCrtc(hwp, 0x6A);
+ } else {
- if (pVia->IsSecondary) {
- ViaSeqMask(hwp, 0x1A, 0x01, 0x01);
- ViaSeqMask(hwp, 0x1B, 0x80, 0x80);
- ViaCrtcMask(hwp, 0x67, 0x00, 0xC0);
- ViaCrtcMask(hwp, 0x6A, 0xC0, 0xC0);
- }
+ SR1A = hwp->readSeq(hwp, 0x1A);
+ SR1B = hwp->readSeq(hwp, 0x1B);
+ CR67 = hwp->readCrtc(hwp, 0x67);
+ CR6A = hwp->readCrtc(hwp, 0x6A);
- for (i = 0; i < numColors; i++) {
- index = indices[i];
- hwp->writeDacWriteAddr(hwp, index);
- hwp->writeDacData(hwp, colors[index].red);
- hwp->writeDacData(hwp, colors[index].green);
- hwp->writeDacData(hwp, colors[index].blue);
- }
+ if (pBIOSInfo->SecondCRTC->IsActive) {
+ ViaSeqMask(hwp, 0x1A, 0x01, 0x01);
+ ViaSeqMask(hwp, 0x1B, 0x80, 0x80);
+ ViaCrtcMask(hwp, 0x67, 0x00, 0xC0);
+ ViaCrtcMask(hwp, 0x6A, 0xC0, 0xC0);
+ }
- if (pVia->IsSecondary) {
- hwp->writeSeq(hwp, 0x1A, SR1A);
- hwp->writeSeq(hwp, 0x1B, SR1B);
- hwp->writeCrtc(hwp, 0x67, CR67);
- hwp->writeCrtc(hwp, 0x6A, CR6A);
-
- /* Screen 0 palette was changed by mode setting of Screen 1,
- * so load it again. */
for (i = 0; i < numColors; i++) {
index = indices[i];
hwp->writeDacWriteAddr(hwp, index);
@@ -2507,6 +2642,23 @@
hwp->writeDacData(hwp, colors[index].green);
hwp->writeDacData(hwp, colors[index].blue);
}
+
+ if (pBIOSInfo->SecondCRTC->IsActive) {
+ hwp->writeSeq(hwp, 0x1A, SR1A);
+ hwp->writeSeq(hwp, 0x1B, SR1B);
+ hwp->writeCrtc(hwp, 0x67, CR67);
+ hwp->writeCrtc(hwp, 0x6A, CR6A);
+
+ /* Screen 0 palette was changed by mode setting of Screen 1,
+ * so load it again. */
+ for (i = 0; i < numColors; i++) {
+ index = indices[i];
+ hwp->writeDacWriteAddr(hwp, index);
+ hwp->writeDacData(hwp, colors[index].red);
+ hwp->writeDacData(hwp, colors[index].green);
+ hwp->writeDacData(hwp, colors[index].blue);
+ }
+ }
}
}
@@ -2543,6 +2695,10 @@
}
} else {
vgaHWBlankScreen(pScrn, FALSE);
+
+ if (!pVia->UseLegacyModeSwitch && !pVia->IsSecondary)
+ ViaCRTCInit(pScrn);
+
if (!VIAWriteMode(pScrn, pScrn->currentMode)) {
vgaHWBlankScreen(pScrn, TRUE);
return FALSE;
@@ -2622,8 +2778,8 @@
miDCInitialize(pScreen, xf86GetPointerScreenFuncs());
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "- SW cursor set up\n"));
- if (pVia->hwcursor) {
- if (!VIAHWCursorInit(pScreen)) {
+ if (pVia->cursor->isHWCursorEnabled) {
+ if (!viaCursorHWInit(pScreen)) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
"Hardware cursor initialization failed\n");
}
@@ -2787,6 +2943,7 @@
VIAWriteMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
{
VIAPtr pVia = VIAPTR(pScrn);
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAWriteMode\n"));
@@ -2799,10 +2956,14 @@
if (!vgaHWInit(pScrn, mode))
return FALSE;
- if (!pVia->IsSecondary)
- ViaModePrimary(pScrn, mode);
- else
- ViaModeSecondary(pScrn, mode);
+ if (pVia->UseLegacyModeSwitch) {
+ if (!pVia->IsSecondary)
+ ViaModePrimaryLegacy(pScrn, mode);
+ else
+ ViaModeSecondaryLegacy(pScrn, mode);
+ } else {
+ ViaModeSet(pScrn, mode);
+ }
} else {
@@ -2813,14 +2974,13 @@
* to detect when the display is using the secondary head.
* TODO: This should be enabled for other chipsets as well.
*/
- if (pVia->Chipset == VIA_P4M900 && pVia->pBIOSInfo->PanelActive) {
+ if (pVia->Chipset == VIA_P4M900 && pVia->pBIOSInfo->Panel->IsActive) {
/*
* Since we are using virtual, we need to adjust
* the offset to match the framebuffer alignment.
*/
- if (pScrn->displayWidth != mode->HDisplay)
- ViaModeSecondaryVGAOffset(pScrn);
- // ViaModeSecondaryVGAFixAlignment(pScrn, mode);
+ if (pScrn->displayWidth != mode->CrtcHDisplay)
+ ViaSecondCRTCHorizontalOffset(pScrn);
}
}
@@ -2862,8 +3022,8 @@
if (!pVia->IsSecondary) {
/* Turn off all video activities. */
viaExitVideo(pScrn);
-
- VIAHideCursor(pScrn);
+ if (pVia->cursor->isHWCursorEnabled)
+ viaCursorHide(pScrn);
}
if (pVia->VQEnable)
@@ -2875,9 +3035,9 @@
#endif
viaExitAccel(pScreen);
- if (pVia->CursorInfoRec) {
- xf86DestroyCursorInfoRec(pVia->CursorInfoRec);
- pVia->CursorInfoRec = NULL;
+ if (pVia->cursor->info) {
+ xf86DestroyCursorInfoRec(pVia->cursor->info);
+ pVia->cursor->info = NULL;
}
if (pVia->ShadowPtr) {
xfree(pVia->ShadowPtr);
@@ -2936,24 +3096,17 @@
if (pVia->pVbe) {
ViaVbeAdjustFrame(scrnIndex, x, y, flags);
} else {
+ if (pVia->UseLegacyModeSwitch) {
+ if (!pVia->IsSecondary)
+ ViaFirstCRTCSetStartingAddress(pScrn, x, y);
+ else
+ ViaSecondCRTCSetStartingAddress(pScrn, x, y);
+ } else {
+ if (pVia->pBIOSInfo->FirstCRTC->IsActive)
+ ViaFirstCRTCSetStartingAddress(pScrn, x, y);
- Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8);
-
- /* Now program the start address registers. */
- if (pVia->IsSecondary) {
- Base = (Base + pScrn->fbOffset) >> 3;
- ViaCrtcMask(hwp, 0x62, (Base & 0x7F) << 1, 0xFE);
- hwp->writeCrtc(hwp, 0x63, (Base & 0x7F80) >> 7);
- hwp->writeCrtc(hwp, 0x64, (Base & 0x7F8000) >> 15);
- } else {
- Base = Base >> 1;
- hwp->writeCrtc(hwp, 0x0C, (Base & 0xFF00) >> 8);
- hwp->writeCrtc(hwp, 0x0D, Base & 0xFF);
- hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16);
-#if 0
- /* The CLE266A doesn't have this implemented, it seems. -- Luc */
- ViaCrtcMask(hwp, 0x48, Base >> 24, 0x03);
-#endif
+ if (pVia->pBIOSInfo->SecondCRTC->IsActive)
+ ViaSecondCRTCSetStartingAddress(pScrn, x, y);
}
}
@@ -3003,49 +3156,57 @@
vgaHWPtr hwp = VGAHWPTR(pScrn);
VIAPtr pVia = VIAPTR(pScrn);
VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
- CARD8 val;
if (pVia->pVbe) {
ViaVbeDPMS(pScrn, mode, flags);
- return;
- }
+ } else {
- /* Clear DPMS setting. */
- val = hwp->readCrtc(hwp, 0x36);
- val &= 0xCF;
+ switch (mode) {
+ case DPMSModeOn:
- /* Turn CRT off, if user doesn't want it on. */
- if (!pVia->IsSecondary && !pBIOSInfo->CrtActive)
- val |= 0x30;
+ if (pBIOSInfo->Lvds->IsActive)
+ ViaLVDSPower(pScrn, TRUE);
- switch (mode) {
- case DPMSModeOn:
- if (pBIOSInfo->PanelActive)
- ViaLCDPower(pScrn, TRUE);
+ if (pBIOSInfo->CrtActive)
+ ViaDisplayEnableCRT(pScrn);
- if (pBIOSInfo->TVActive)
- ViaTVPower(pScrn, TRUE);
+ if (pBIOSInfo->Panel->IsActive)
+ ViaLCDPower(pScrn, TRUE);
- hwp->writeCrtc(hwp, 0x36, val);
- break;
- case DPMSModeStandby:
- case DPMSModeSuspend:
- case DPMSModeOff:
- if (pBIOSInfo->PanelActive)
- ViaLCDPower(pScrn, FALSE);
+ if (pBIOSInfo->TVActive)
+ ViaTVPower(pScrn, TRUE);
- if (pBIOSInfo->TVActive)
- ViaTVPower(pScrn, FALSE);
+ if (pBIOSInfo->Simultaneous->IsActive)
+ ViaDisplayEnableSimultaneous(pScrn);
- val |= 0x30;
- hwp->writeCrtc(hwp, 0x36, val);
- break;
- default:
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "Invalid DPMS mode %d\n", mode);
- break;
+ break;
+ case DPMSModeStandby:
+ case DPMSModeSuspend:
+ case DPMSModeOff:
+
+ if (pBIOSInfo->Lvds->IsActive)
+ ViaLVDSPower(pScrn, FALSE);
+
+ if (pBIOSInfo->CrtActive)
+ ViaDisplayDisableCRT(pScrn);
+
+ if (pBIOSInfo->Panel->IsActive)
+ ViaLCDPower(pScrn, FALSE);
+
+ if (pBIOSInfo->TVActive)
+ ViaTVPower(pScrn, FALSE);
+
+ if (pBIOSInfo->Simultaneous->IsActive)
+ ViaDisplayDisableSimultaneous(pScrn);
+
+ break;
+ default:
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Invalid DPMS mode %d\n",
+ mode);
+ break;
+ }
}
- return;
+
}
#if defined(XF86DRI) || defined(VIA_HAVE_EXA)
Index: src/via_crtc.c
===================================================================
--- src/via_crtc.c (revision 0)
+++ src/via_crtc.c (revision 0)
@@ -0,0 +1,612 @@
+/*
+ * Copyright 2005-2007 The Openchrome Project [openchrome.org]
+ * Copyright 2004-2005 The Unichrome Project [unichrome.sf.net]
+ * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "via.h"
+#include "via_driver.h"
+#include "via_vgahw.h"
+#include "via_id.h"
+
+#include "via_mode.h"
+
+static void
+ViaCRTCSetGraphicsRegisters(ScrnInfoPtr pScrn)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ /* graphics registers */
+ hwp->writeGr(hwp, 0x00, 0x00);
+ hwp->writeGr(hwp, 0x01, 0x00);
+ hwp->writeGr(hwp, 0x02, 0x00);
+ hwp->writeGr(hwp, 0x03, 0x00);
+ hwp->writeGr(hwp, 0x04, 0x00);
+ hwp->writeGr(hwp, 0x05, 0x40);
+ hwp->writeGr(hwp, 0x06, 0x05);
+ hwp->writeGr(hwp, 0x07, 0x0F);
+ hwp->writeGr(hwp, 0x08, 0xFF);
+
+ ViaGrMask(hwp, 0x20, 0, 0xFF);
+ ViaGrMask(hwp, 0x21, 0, 0xFF);
+ ViaGrMask(hwp, 0x22, 0, 0xFF);
+}
+
+static void
+ViaCRTCSetAttributeRegisters(ScrnInfoPtr pScrn)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD8 i;
+
+ /* attribute registers */
+ for (i = 0; i <= 0xF; i++) {
+ hwp->writeAttr(hwp, i, i);
+ }
+ hwp->writeAttr(hwp, 0x10, 0x41);
+ hwp->writeAttr(hwp, 0x11, 0xFF);
+ hwp->writeAttr(hwp, 0x12, 0x0F);
+ hwp->writeAttr(hwp, 0x13, 0x00);
+ hwp->writeAttr(hwp, 0x14, 0x00);
+}
+
+void
+ViaCRTCInit(ScrnInfoPtr pScrn)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ hwp->writeSeq(hwp, 0x10, 0x01); /* unlock extended registers */
+ ViaCrtcMask(hwp, 0x47, 0x00, 0x01); /* unlock CRT registers */
+ ViaCRTCSetGraphicsRegisters(pScrn);
+ ViaCRTCSetAttributeRegisters(pScrn);
+}
+
+void
+ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ VIAPtr pVia = VIAPTR(pScrn);
+ CARD16 temp;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaFirstCRTCSetMode\n"));
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting up %s\n", mode->name));
+
+ ViaCrtcMask(hwp, 0x11, 0x00, 0x80); /* modify starting address */
+ ViaCrtcMask(hwp, 0x03, 0x80, 0x80); /* enable vertical retrace access */
+
+ /* Set Misc Register */
+ temp = 0x23;
+ if (mode->Flags & V_NHSYNC)
+ temp |= 0x40;
+ if (mode->Flags & V_NVSYNC)
+ temp |= 0x80;
+ temp |= 0x0C; /* Undefined/external clock */
+ hwp->writeMiscOut(hwp, temp);
+
+ /* Sequence registers */
+ hwp->writeSeq(hwp, 0x00, 0x00);
+
+#if 0
+ if (mode->Flags & V_CLKDIV2)
+ hwp->writeSeq(hwp, 0x01, 0x09);
+ else
+#endif
+ hwp->writeSeq(hwp, 0x01, 0x01);
+
+ hwp->writeSeq(hwp, 0x02, 0x0F);
+ hwp->writeSeq(hwp, 0x03, 0x00);
+ hwp->writeSeq(hwp, 0x04, 0x0E);
+
+ ViaSeqMask(hwp, 0x15, 0x02, 0x02);
+
+ /* bpp */
+ switch (pScrn->bitsPerPixel) {
+ case 8:
+ /* Only CLE266.AX use 6bits LUT. */
+ if (pVia->Chipset == VIA_CLE266 && pVia->ChipRev < 15)
+ ViaSeqMask(hwp, 0x15, 0x22, 0xFE);
+ else
+ ViaSeqMask(hwp, 0x15, 0xA2, 0xFE);
+
+ break;
+ case 16:
+ ViaSeqMask(hwp, 0x15, 0xB6, 0xFE);
+ break;
+ case 24:
+ case 32:
+ ViaSeqMask(hwp, 0x15, 0xAE, 0xFE);
+ break;
+ default:
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unhandled bitdepth: %d\n",
+ pScrn->bitsPerPixel);
+ break;
+ }
+
+ /* FIXME: check if this is really necessary here */
+ switch (pVia->ChipId) {
+ case VIA_K8M890:
+ case VIA_CX700:
+ case VIA_P4M900:
+ break;
+ default:
+ ViaSeqMask(hwp, 0x16, 0x08, 0xBF);
+ ViaSeqMask(hwp, 0x17, 0x1F, 0xFF);
+ ViaSeqMask(hwp, 0x18, 0x4E, 0xFF);
+ ViaSeqMask(hwp, 0x1A, 0x08, 0xFD);
+ break;
+ }
+
+ /* Crtc registers */
+ /* horizontal total : 4100 */
+ temp = (mode->CrtcHTotal >> 3) - 5;
+ hwp->writeCrtc(hwp, 0x00, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x36, temp >> 5, 0x08);
+
+ /* horizontal address : 2048 */
+ temp = (mode->CrtcHDisplay >> 3) - 1;
+ hwp->writeCrtc(hwp, 0x01, temp & 0xFF);
+
+ /* horizontal blanking start : 2048 */
+ /* temp = (mode->CrtcHDisplay >> 3) - 1; */
+ temp = (mode->CrtcHBlankStart >> 3) - 1;
+ hwp->writeCrtc(hwp, 0x02, temp & 0xFF);
+ /* If HblankStart has more bits anywhere, add them here */
+
+ /* horizontal blanking end : start + 1025 */
+ /* temp = (mode->CrtcHTotal >> 3) - 1; */
+ temp = (mode->CrtcHBlankEnd >> 3) - 1;
+ ViaCrtcMask(hwp, 0x03, temp, 0x1F);
+ ViaCrtcMask(hwp, 0x05, temp << 2, 0x80);
+ ViaCrtcMask(hwp, 0x33, temp >> 1, 0x20);
+
+ /* CrtcHSkew ??? */
+
+ /* horizontal sync start : 4095 */
+ temp = mode->CrtcHSyncStart >> 3;
+ hwp->writeCrtc(hwp, 0x04, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x33, temp >> 4, 0x10);
+
+ /* horizontal sync end : start + 256 */
+ temp = mode->CrtcHSyncEnd >> 3;
+ ViaCrtcMask(hwp, 0x05, temp, 0x1F);
+
+ /* vertical total : 2049 */
+ temp = mode->CrtcVTotal - 2;
+ hwp->writeCrtc(hwp, 0x06, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x07, temp >> 8, 0x01);
+ ViaCrtcMask(hwp, 0x07, temp >> 4, 0x20);
+ ViaCrtcMask(hwp, 0x35, temp >> 10, 0x01);
+
+ /* vertical address : 2048 */
+ temp = mode->CrtcVDisplay - 1;
+ hwp->writeCrtc(hwp, 0x12, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x07, temp >> 7, 0x02);
+ ViaCrtcMask(hwp, 0x07, temp >> 3, 0x40);
+ ViaCrtcMask(hwp, 0x35, temp >> 8, 0x04);
+
+ /* Primary starting address -> 0x00, adjustframe does the rest */
+ hwp->writeCrtc(hwp, 0x0C, 0x00);
+ hwp->writeCrtc(hwp, 0x0D, 0x00);
+ hwp->writeCrtc(hwp, 0x34, 0x00);
+ ViaCrtcMask(hwp, 0x48, 0x00, 0x03); /* is this even possible on CLE266A ? */
+
+ /* vertical sync start : 2047 */
+ temp = mode->CrtcVSyncStart;
+ hwp->writeCrtc(hwp, 0x10, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x07, temp >> 6, 0x04);
+ ViaCrtcMask(hwp, 0x07, temp >> 2, 0x80);
+ ViaCrtcMask(hwp, 0x35, temp >> 9, 0x02);
+
+ /* vertical sync end : start + 16 -- other bits someplace? */
+ ViaCrtcMask(hwp, 0x11, mode->CrtcVSyncEnd, 0x0F);
+
+ /* line compare: We are not doing splitscreen so 0x3FFF */
+ hwp->writeCrtc(hwp, 0x18, 0xFF);
+ ViaCrtcMask(hwp, 0x07, 0x10, 0x10);
+ ViaCrtcMask(hwp, 0x09, 0x40, 0x40);
+ ViaCrtcMask(hwp, 0x33, 0x07, 0x06);
+ ViaCrtcMask(hwp, 0x35, 0x10, 0x10);
+
+ /* zero Maximum scan line */
+ ViaCrtcMask(hwp, 0x09, 0x00, 0x1F);
+ hwp->writeCrtc(hwp, 0x14, 0x00);
+
+ /* vertical blanking start : 2048 */
+ /* temp = mode->CrtcVDisplay - 1; */
+ temp = mode->CrtcVBlankStart - 1;
+ hwp->writeCrtc(hwp, 0x15, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x07, temp >> 5, 0x08);
+ ViaCrtcMask(hwp, 0x09, temp >> 4, 0x20);
+ ViaCrtcMask(hwp, 0x35, temp >> 7, 0x08);
+
+ /* vertical blanking end : start + 257 */
+ /* temp = mode->CrtcVTotal - 1; */
+ temp = mode->CrtcVBlankEnd - 1;
+ hwp->writeCrtc(hwp, 0x16, temp);
+
+ /* FIXME: check if this is really necessary here */
+ switch (pVia->ChipId) {
+ case VIA_K8M890:
+ case VIA_CX700:
+ case VIA_P4M900:
+ break;
+ default:
+ /* some leftovers */
+ hwp->writeCrtc(hwp, 0x08, 0x00);
+ ViaCrtcMask(hwp, 0x32, 0, 0xFF); /* ? */
+ ViaCrtcMask(hwp, 0x33, 0, 0xC8);
+ break;
+ }
+
+ /* offset */
+ temp = (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3)) >> 3;
+ /* Make sure that this is 32-byte aligned. */
+ if (temp & 0x03) {
+ temp += 0x03;
+ temp &= ~0x03;
+ }
+ hwp->writeCrtc(hwp, 0x13, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x35, temp >> 3, 0xE0);
+
+ /* fetch count */
+ temp = (mode->CrtcHDisplay * (pScrn->bitsPerPixel >> 3)) >> 3;
+ /* Make sure that this is 32-byte aligned. */
+ if (temp & 0x03) {
+ temp += 0x03;
+ temp &= ~0x03;
+ }
+ hwp->writeSeq(hwp, 0x1C, (temp >> 1) & 0xFF);
+ ViaSeqMask(hwp, 0x1D, temp >> 9, 0x03);
+
+ /* FIXME: check if this is really necessary here */
+ switch (pVia->ChipId) {
+ case VIA_K8M890:
+ case VIA_CX700:
+ case VIA_P4M900:
+ break;
+ default:
+ /* some leftovers */
+ ViaCrtcMask(hwp, 0x32, 0, 0xFF);
+ ViaCrtcMask(hwp, 0x33, 0, 0xC8);
+ break;
+ }
+}
+
+void
+ViaFirstCRTCSetStartingAddress(ScrnInfoPtr pScrn, int x, int y)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD32 Base;
+ CARD32 tmp;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "ViaFirstCRTCSetStartingAddress\n"));
+
+ Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8);
+ Base = Base >> 1;
+ hwp->writeCrtc(hwp, 0x0C, (Base & 0xFF00) >> 8);
+ hwp->writeCrtc(hwp, 0x0D, Base & 0xFF);
+ hwp->writeCrtc(hwp, 0x34, (Base & 0xFF0000) >> 16);
+
+ if (!(pVia->Chipset == VIA_CLE266 && CLE266_REV_IS_AX(pVia->ChipRev)))
+ ViaCrtcMask(hwp, 0x48, Base >> 24, 0x0F);
+}
+
+void
+ViaSecondCRTCSetStartingAddress(ScrnInfoPtr pScrn, int x, int y)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD32 Base;
+ CARD32 tmp;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "ViaSecondCRTCSetStartingAddress\n"));
+
+ Base = (y * pScrn->displayWidth + x) * (pScrn->bitsPerPixel / 8);
+ Base = (Base + pScrn->fbOffset) >> 3;
+
+ tmp = hwp->readCrtc(hwp, 0x62) & 0x01;
+ tmp |= (Base & 0x7F) << 1;
+ hwp->writeCrtc(hwp, 0x62, tmp);
+
+ hwp->writeCrtc(hwp, 0x63, (Base & 0x7F80) >> 7);
+ hwp->writeCrtc(hwp, 0x64, (Base & 0x7F8000) >> 15);
+ hwp->writeCrtc(hwp, 0xA3, (Base & 0x03800000) >> 23);
+}
+
+void
+ViaSecondCRTCHorizontalQWCount(ScrnInfoPtr pScrn, int width)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD16 temp;
+
+ /* fetch count */
+ temp = (width * (pScrn->bitsPerPixel >> 3)) >> 3;
+ /* Make sure that this is 32-byte aligned. */
+ if (temp & 0x03) {
+ temp += 0x03;
+ temp &= ~0x03;
+ }
+ hwp->writeCrtc(hwp, 0x65, (temp >> 1) & 0xFF);
+ ViaCrtcMask(hwp, 0x67, temp >> 7, 0x0C);
+}
+
+void
+ViaSecondCRTCHorizontalOffset(ScrnInfoPtr pScrn)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD16 temp;
+
+ /* offset */
+ temp = (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3)) >> 3;
+ /* Make sure that this is 32-byte aligned. */
+ if (temp & 0x03) {
+ temp += 0x03;
+ temp &= ~0x03;
+ }
+ hwp->writeCrtc(hwp, 0x66, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x67, temp >> 8, 0x03);
+}
+
+void
+ViaSecondCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD16 temp;
+
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "mode: %p\n", mode);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "mode->name: %p\n", mode->name);
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO, "mode->name: %s\n", mode->name);
+
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaSecondCRTCSetMode\n"));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Setting up %s\n", mode->name));
+ /* bpp */
+ switch (pScrn->bitsPerPixel) {
+ case 8:
+ ViaCrtcMask(hwp, 0x67, 0x00, 0xC0);
+ break;
+ case 16:
+ ViaCrtcMask(hwp, 0x67, 0x40, 0xC0);
+ break;
+ case 24:
+ case 32:
+ ViaCrtcMask(hwp, 0x67, 0xC0, 0xC0);
+ break;
+ default:
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Unhandled bitdepth: %d\n",
+ pScrn->bitsPerPixel);
+ break;
+ }
+
+ /* Crtc registers */
+ /* horizontal total : 4096 */
+ temp = mode->CrtcHTotal - 1;
+ hwp->writeCrtc(hwp, 0x50, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x55, temp >> 8, 0x0F);
+
+ /* horizontal address : 2048 */
+ temp = mode->CrtcHDisplay - 1;
+ hwp->writeCrtc(hwp, 0x51, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x55, temp >> 4, 0x70);
+
+ /* horizontal blanking start : 2048 */
+ /* temp = mode->CrtcHDisplay - 1; */
+ temp = mode->CrtcHBlankStart - 1;
+ hwp->writeCrtc(hwp, 0x52, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x54, temp >> 8, 0x07);
+
+ /* horizontal blanking end : 4096 */
+ /* temp = mode->CrtcHTotal - 1; */
+ temp = mode->CrtcHBlankEnd - 1;
+ hwp->writeCrtc(hwp, 0x53, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x54, temp >> 5, 0x38);
+ ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x40);
+
+ /* horizontal sync start : 2047 */
+ temp = mode->CrtcHSyncStart;
+ hwp->writeCrtc(hwp, 0x56, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x54, temp >> 2, 0xC0);
+ ViaCrtcMask(hwp, 0x5C, temp >> 3, 0x80);
+
+ if (pVia->ChipId != VIA_CLE266 && pVia->ChipId != VIA_KM400)
+ ViaCrtcMask(hwp, 0x5D, temp >> 4, 0x80);
+
+ /* horizontal sync end : sync start + 512 */
+ temp = mode->CrtcHSyncEnd;
+ hwp->writeCrtc(hwp, 0x57, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x5C, temp >> 2, 0x40);
+
+ /* vertical total : 2048 */
+ temp = mode->CrtcVTotal - 1;
+ hwp->writeCrtc(hwp, 0x58, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x5D, temp >> 8, 0x07);
+
+ /* vertical address : 2048 */
+ temp = mode->CrtcVDisplay - 1;
+ hwp->writeCrtc(hwp, 0x59, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x5D, temp >> 5, 0x38);
+
+ /* vertical blanking start : 2048 */
+ /* temp = mode->CrtcVDisplay - 1; */
+ temp = mode->CrtcVBlankStart - 1;
+ hwp->writeCrtc(hwp, 0x5A, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x5C, temp >> 8, 0x07);
+
+ /* vertical blanking end : 2048 */
+ /* temp = mode->CrtcVTotal - 1; */
+ temp = mode->CrtcVBlankEnd - 1;
+ hwp->writeCrtc(hwp, 0x5B, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x5C, temp >> 5, 0x38);
+
+ /* vertical sync start : 2047 */
+ temp = mode->CrtcVSyncStart;
+ hwp->writeCrtc(hwp, 0x5E, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x5F, temp >> 3, 0xE0);
+
+ /* vertical sync end : start + 32 */
+ temp = mode->CrtcVSyncEnd;
+ ViaCrtcMask(hwp, 0x5F, temp, 0x1F);
+
+ ViaSecondCRTCHorizontalOffset(pScrn);
+ ViaSecondCRTCHorizontalQWCount(pScrn, mode->CrtcHDisplay);
+
+}
+
+/*
+ * Checks for limitations imposed by the available VGA timing registers.
+ */
+ModeStatus
+ViaFirstCRTCModeValid(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaFirstCRTCModeValid\n"));
+
+ if (mode->CrtcHTotal > 4100)
+ return MODE_BAD_HVALUE;
+
+ if (mode->CrtcHDisplay > 2048)
+ return MODE_BAD_HVALUE;
+
+ if (mode->CrtcHBlankStart > 2048)
+ return MODE_BAD_HVALUE;
+
+ if ((mode->CrtcHBlankEnd - mode->CrtcHBlankStart) > 1025)
+ return MODE_HBLANK_WIDE;
+
+ if (mode->CrtcHSyncStart > 4095)
+ return MODE_BAD_HVALUE;
+
+ if ((mode->CrtcHSyncEnd - mode->CrtcHSyncStart) > 256)
+ return MODE_HSYNC_WIDE;
+
+ if (mode->CrtcVTotal > 2049)
+ return MODE_BAD_VVALUE;
+
+ if (mode->CrtcVDisplay > 2048)
+ return MODE_BAD_VVALUE;
+
+ if (mode->CrtcVSyncStart > 2047)
+ return MODE_BAD_VVALUE;
+
+ if ((mode->CrtcVSyncEnd - mode->CrtcVSyncStart) > 16)
+ return MODE_VSYNC_WIDE;
+
+ if (mode->CrtcVBlankStart > 2048)
+ return MODE_BAD_VVALUE;
+
+ if ((mode->CrtcVBlankEnd - mode->CrtcVBlankStart) > 257)
+ return MODE_VBLANK_WIDE;
+
+ return MODE_OK;
+}
+
+ModeStatus
+ViaSecondCRTCModeValid(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaSecondCRTCModeValid\n"));
+
+ if (mode->CrtcHTotal > 4096)
+ return MODE_BAD_HVALUE;
+
+ if (mode->CrtcHDisplay > 2048)
+ return MODE_BAD_HVALUE;
+
+ if (mode->CrtcHBlankStart > 2048)
+ return MODE_BAD_HVALUE;
+
+ if (mode->CrtcHBlankEnd > 4096)
+ return MODE_HBLANK_WIDE;
+
+ if (mode->CrtcHSyncStart > 2047)
+ return MODE_BAD_HVALUE;
+
+ if ((mode->CrtcHSyncEnd - mode->CrtcHSyncStart) > 512)
+ return MODE_HSYNC_WIDE;
+
+ if (mode->CrtcVTotal > 2048)
+ return MODE_BAD_VVALUE;
+
+ if (mode->CrtcVDisplay > 2048)
+ return MODE_BAD_VVALUE;
+
+ if (mode->CrtcVBlankStart > 2048)
+ return MODE_BAD_VVALUE;
+
+ if (mode->CrtcVBlankEnd > 2048)
+ return MODE_VBLANK_WIDE;
+
+ if (mode->CrtcVSyncStart > 2047)
+ return MODE_BAD_VVALUE;
+
+ if ((mode->CrtcVSyncEnd - mode->CrtcVSyncStart) > 32)
+ return MODE_VSYNC_WIDE;
+
+ return MODE_OK;
+}
+
+/*
+ * Not tested yet
+ */
+void
+ViaShadowCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode)
+{
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaShadowCRTCSetMode\n"));
+
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ CARD16 temp;
+
+ temp = (mode->CrtcHTotal >> 3) - 5;
+ hwp->writeCrtc(hwp, 0x6D, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x71, temp >> 5, 0x08);
+
+ temp = (mode->CrtcHBlankEnd >> 3) - 1;
+ hwp->writeCrtc(hwp, 0x6E, temp & 0xFF);
+
+ temp = mode->CrtcVTotal - 2;
+ hwp->writeCrtc(hwp, 0x6F, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x71, temp >> 8, 0x07);
+
+ temp = mode->CrtcVDisplay - 1;
+ hwp->writeCrtc(hwp, 0x70, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x71, temp >> 4, 0x70);
+
+ temp = mode->CrtcVBlankStart - 1;
+ hwp->writeCrtc(hwp, 0x72, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x74, temp >> 4, 0x70);
+
+ temp = mode->CrtcVTotal - 1;
+ hwp->writeCrtc(hwp, 0x73, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x74, temp >> 8, 0x07);
+
+ ViaCrtcMask(hwp, 0x76, mode->CrtcVSyncEnd, 0x0F);
+
+ temp = mode->CrtcVSyncStart;
+ hwp->writeCrtc(hwp, 0x75, temp & 0xFF);
+ ViaCrtcMask(hwp, 0x76, temp >> 4, 0x70);
+}
Index: src/via_swov.c
===================================================================
--- src/via_swov.c (revision 588)
+++ src/via_swov.c (working copy)
@@ -95,7 +95,8 @@
pdwState = (CARD32 volatile *)(pVia->VidMapBase + (HQV_CONTROL + proReg));
if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
- while (*pdwState & (HQV_SUBPIC_FLIP | HQV_SW_FLIP)) ;
+ // while (*pdwState & (HQV_SUBPIC_FLIP | HQV_SW_FLIP)) ;
+ while (*pdwState & HQV_SUBPIC_FLIP);
} else {
while (!(*pdwState & HQV_FLIP_STATUS)) ;
}
@@ -1674,6 +1675,7 @@
unsigned long chromaKeyLow, unsigned long chromaKeyHigh)
{
VIAPtr pVia = VIAPTR(pScrn);
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
vgaHWPtr hwp = VGAHWPTR(pScrn);
VIAHWDiff *hwDiff = &pVia->HWDiff;
@@ -1707,8 +1709,15 @@
pUpdate->DstLeft, pUpdate->DstRight,
pUpdate->DstTop, pUpdate->DstBottom));
- pVia->swov.overlayRecordV1.dwWidth = dstWidth =
- pUpdate->DstRight - pUpdate->DstLeft;
+ dstWidth = pUpdate->DstRight - pUpdate->DstLeft;
+ if (pBIOSInfo->Panel->IsActive && pBIOSInfo->Panel->Scale) {
+ /* FIXME: We need to determine if the panel is using V1 or V3 */
+ float hfactor = (float)pBIOSInfo->Panel->NativeMode->Width
+ / pScrn->currentMode->HDisplay;
+ dstWidth *= hfactor;
+ }
+
+ pVia->swov.overlayRecordV1.dwWidth = dstWidth;
pVia->swov.overlayRecordV1.dwHeight = dstHeight =
pUpdate->DstBottom - pUpdate->DstTop;
srcWidth = (unsigned long)pUpdate->SrcRight - pUpdate->SrcLeft;
@@ -1729,7 +1738,8 @@
*/
if ((pVia->VideoEngine == VIDEO_ENGINE_CME
|| pVia->Chipset == VIA_VM800)
- && pVia->pBIOSInfo->PanelActive) {
+ && pVia->pBIOSInfo->Panel->IsActive) {
+
/* V1_ON_SND_DISPLAY */
vidCtl |= 0x80000000;
/* SECOND_DISPLAY_COLOR_KEY_ENABLE */
Index: src/via_driver.h
===================================================================
--- src/via_driver.h (revision 590)
+++ src/via_driver.h (working copy)
@@ -65,6 +65,7 @@
#include "via_swov.h"
#include "via_dmabuffer.h"
#include "via_3d.h"
+#include "via_video.h"
#ifdef XSERVER_LIBPCIACCESS
#include <pciaccess.h>
@@ -104,7 +105,6 @@
#endif
#define VIA_VERSION ((VERSION_MAJOR<<24) | (VERSION_MINOR<<16) | PATCHLEVEL)
-#define VIA_CURSOR_SIZE (4 * 1024)
#define VIA_VQ_SIZE (256 * 1024)
typedef struct {
@@ -195,9 +195,35 @@
int major, minor;
} ViaVbeModeInfo;
+typedef struct ViaCursorInfo {
+ xf86CursorInfoPtr info;
+ Bool isHWCursorEnabled;
+ /* Is hardware icon supported by this hardware? */
+ Bool isARGBSupported;
+ /* disable/enable argb */
+ Bool isARGBEnabled ;
+ /* Are we currently using ARGB cursor? see via_cursor.c */
+ Bool useARGB;
+ /* */
+ int fbCursorStart;
+ /* max width in pixels (64 or 32)*/
+ int maxWidth;
+ /* max height in pixels (64 or 32)*/
+ int maxHeight;
+
+ /* size in bytes */
+ int size;
+
+ unsigned char *image;
+
+ CARD32 foreground;
+ CARD32 background;
+ CARD32 mode;
+
+} ViaCursorInfoRec, *ViaCursorInfoPtr ;
+
typedef struct _VIA {
VIARegRec SavedReg;
- xf86CursorInfoPtr CursorInfoRec;
int Bpp, Bpl;
Bool FirstInit;
@@ -207,7 +233,6 @@
int FBFreeEnd;
int driSize;
int maxDriSize;
- int CursorStart;
int VQStart;
int VQEnd;
@@ -226,7 +251,6 @@
/* Here are all the Options */
Bool VQEnable;
- Bool hwcursor;
Bool NoAccel;
Bool shadowFB;
int rotate;
@@ -350,11 +374,8 @@
Bool dmaXV;
CARD8 ActiveDevice; /* Option */
- unsigned char *CursorImage;
- CARD32 CursorFG;
- CARD32 CursorBG;
- CARD32 CursorMC;
-
+ ViaCursorInfoPtr cursor;
+
/* Video */
int VideoEngine;
swovRec swov;
@@ -377,6 +398,9 @@
Bool PrintVGARegs;
Bool PrintTVRegs;
Bool I2CScan;
+
+ Bool UseLegacyModeSwitch ;
+ video_via_regs* VideoRegs ;
#endif /* HAVE_DEBUG */
} VIARec, *VIAPtr;
@@ -403,11 +427,14 @@
#endif
/* In via_cursor.c. */
-Bool VIAHWCursorInit(ScreenPtr pScreen);
-void VIAShowCursor(ScrnInfoPtr);
-void VIAHideCursor(ScrnInfoPtr);
-void ViaCursorStore(ScrnInfoPtr pScrn);
-void ViaCursorRestore(ScrnInfoPtr pScrn);
+Bool viaCursorHWInit(ScreenPtr pScreen);
+void viaCursorShow(ScrnInfoPtr);
+void viaCursorHide(ScrnInfoPtr);
+void viaCursorStore(ScrnInfoPtr pScrn);
+void viaCursorRestore(ScrnInfoPtr pScrn);
+Bool viaCursorRecInit(ScrnInfoPtr pScrn);
+void viaCursorRecDestroy(ScrnInfoPtr pScrn);
+void viaCursorSetFB(ScrnInfoPtr pScrn);
/* In via_accel.c. */
Bool viaInitAccel(ScreenPtr);
Index: src/via_bios.h
===================================================================
--- src/via_bios.h (revision 588)
+++ src/via_bios.h (working copy)
@@ -34,6 +34,14 @@
#define VIA_PANEL14X10 5
#define VIA_PANEL16X12 6
#define VIA_PANEL12X8 7
+#define VIA_PANEL8X4 8
+#define VIA_PANEL1366X7 9
+#define VIA_PANEL1360X7 10
+#define VIA_PANEL1920x1080 11
+#define VIA_PANEL1920x1200 12
+#define VIA_PANEL10X6 13
+#define VIA_PANEL14X9 14
+#define VIA_PANEL1280X720 15
#define VIA_PANEL_INVALID 255
#define TVTYPE_NONE 0x00
@@ -90,6 +98,46 @@
#define VIA_DI_12BIT 0x00
#define VIA_DI_24BIT 0x01
+typedef struct ViaPanelMode {
+ int Width ;
+ int Height ;
+} ViaPanelModeRec, *ViaPanelModePtr ;
+
+typedef struct ViaPanelInfo {
+ Bool IsActive ;
+ /* current native resolution */
+ ViaPanelModePtr NativeMode ;
+ /* Native resolution index, see via_panel.c */
+ CARD8 NativeModeIndex;
+ /* Generated mode for native resolution */
+ DisplayModePtr NativeDisplayMode ;
+#if 0
+ /* Panel size from configuration */
+ char* PanelSizeFromOption;
+#endif
+ /* Current mode but centered */
+ DisplayModePtr CenteredMode ;
+ /* Determine if we must use the hardware scaler
+ * It might be false even if the "Center" option
+ * was specified
+ */
+ Bool Scale;
+} ViaPanelInfoRec, *ViaPanelInfoPtr ;
+
+typedef struct ViaLVDSInfo {
+ Bool IsActive ;
+} ViaLVDSInfoRec, *ViaLVDSInfoPtr ;
+
+typedef struct ViaCRTCInfo {
+ Bool IsActive ;
+ /* TODO: add CRTC constraints here */
+} ViaCRTCInfoRec, *ViaCRTCInfoPtr ;
+
+typedef struct ViaSimultaneousInfo {
+ Bool IsActive ;
+} ViaSimultaneousInfoRec, *ViaSimultaneousInfoPtr ;
+
+
typedef struct _VIABIOSINFO {
int scrnIndex;
@@ -102,20 +150,29 @@
CARD32 Bandwidth; /* available memory bandwidth */
/* Panel/LCD entries */
+ ViaPanelInfoPtr Panel ;
Bool PanelPresent;
- Bool PanelActive;
Bool ForcePanel;
int PanelIndex;
- int PanelSize;
Bool Center;
- CARD8 BusWidth; /* Digital Output Bus Width */
+ CARD8 BusWidth; /* Digital Output Bus Width */
Bool SetDVI;
/* LCD Simultaneous Expand Mode HWCursor Y Scale */
Bool scaleY;
int panelX;
int panelY;
int resY;
+
+ /* Integrated LVDS */
+ ViaLVDSInfoPtr Lvds;
+
+ /* CRTCs */
+ ViaCRTCInfoPtr FirstCRTC ;
+ ViaCRTCInfoPtr SecondCRTC ;
+ /* Simultaneous */
+ ViaSimultaneousInfoPtr Simultaneous ;
+
/* TV entries */
int TVEncoder;
int TVOutput;
@@ -156,10 +213,8 @@
void ViaModesAttach(ScrnInfoPtr pScrn, MonPtr monitorp);
CARD32 ViaGetMemoryBandwidth(ScrnInfoPtr pScrn);
ModeStatus ViaValidMode(int scrnIndex, DisplayModePtr mode, Bool verbose, int flags);
-void ViaModePrimary(ScrnInfoPtr pScrn, DisplayModePtr mode);
-void ViaModeSecondary(ScrnInfoPtr pScrn, DisplayModePtr mode);
-void ViaModeSecondaryVGAOffset(ScrnInfoPtr pScrn);
-void ViaModeSecondaryVGAFetchCount(ScrnInfoPtr pScrn, int width);
+void ViaModePrimaryLegacy(ScrnInfoPtr pScrn, DisplayModePtr mode);
+void ViaModeSecondaryLegacy(ScrnInfoPtr pScrn, DisplayModePtr mode);
void ViaLCDPower(ScrnInfoPtr pScrn, Bool On);
void ViaTVPower(ScrnInfoPtr pScrn, Bool On);
void ViaTVSave(ScrnInfoPtr pScrn);
@@ -167,7 +222,35 @@
#ifdef HAVE_DEBUG
void ViaTVPrintRegs(ScrnInfoPtr pScrn);
#endif
+void ViaModeSecondCRTC(ScrnInfoPtr pScrn, DisplayModePtr mode);
+void ViaModeFirstCRTC(ScrnInfoPtr pScrn, DisplayModePtr mode);
+void ViaModeSet(ScrnInfoPtr pScrn, DisplayModePtr mode);
+/* via_crtc.c */
+void ViaCRTCInit(ScrnInfoPtr pScrn);
+void ViaFirstCRTCSetStartingAddress(ScrnInfoPtr pSCrn, int x, int y);
+void ViaFirstCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode);
+void ViaSecondCRTCSetStartingAddress(ScrnInfoPtr pScrn, int x, int y);
+void ViaSecondCRTCHorizontalOffset(ScrnInfoPtr pScrn);
+void ViaSecondCRTCHorizontalQWCount(ScrnInfoPtr pScrn, int width);
+void ViaSecondCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode);
+ModeStatus ViaFirstCRTCModeValid(ScrnInfoPtr pScrn, DisplayModePtr mode);
+ModeStatus ViaSecondCRTCModeValid(ScrnInfoPtr pScrn, DisplayModePtr mode);
+void ViaShadowCRTCSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode);
+
+/* via_panel.c */
+void ViaPanelScale(ScrnInfoPtr pScrn, int resWidth, int resHeight, int panelWidth, int panelHeight );
+void ViaPanelScaleDisable(ScrnInfoPtr pScrn);
+void ViaPanelGetNativeModeFromScratchPad(ScrnInfoPtr pScrn);
+void ViaPanelGetNativeModeFromOption(ScrnInfoPtr pScrn, char* name);
+void ViaPanelPreInit(ScrnInfoPtr pScrn);
+void ViaPanelCenterMode(DisplayModePtr centerMode, DisplayModePtr panelMode, DisplayModePtr mode);
+Bool ViaPanelGetSizeFromDDCv1(ScrnInfoPtr pScrn, int* width, int* height);
+Bool ViaPanelGetSizeFromDDCv2(ScrnInfoPtr pScrn, int* width);
+Bool ViaPanelGetSizeFromEDID(ScrnInfoPtr pScrn, xf86MonPtr pMon, int* width, int* height);
+/* via_lvds.c */
+void ViaLVDSPower(ScrnInfoPtr pScrn, Bool on);
+
/* in via_bandwidth.c */
void ViaSetPrimaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode);
void ViaSetSecondaryFIFO(ScrnInfoPtr pScrn, DisplayModePtr mode);
@@ -181,4 +264,13 @@
I2CDevPtr ViaCH7xxxDetect(ScrnInfoPtr pScrn, I2CBusPtr pBus, CARD8 Address);
void ViaCH7xxxInit(ScrnInfoPtr pScrn);
+/* via_display.c */
+void ViaSecondDisplayChannelEnable(ScrnInfoPtr pScrn);
+void ViaSecondDisplayChannelDisable(ScrnInfoPtr pScrn);
+void ViaDisplayInit(ScrnInfoPtr pScrn);
+void ViaDisplayEnableSimultaneous(ScrnInfoPtr pScrn);
+void ViaDisplayDisableSimultaneous(ScrnInfoPtr pScrn);
+void ViaDisplayEnableCRT(ScrnInfoPtr pScrn);
+void ViaDisplayDisableCRT(ScrnInfoPtr pScrn);
+
#endif /* _VIA_BIOS_H_ */
Index: src/via_display.c
===================================================================
--- src/via_display.c (revision 0)
+++ src/via_display.c (revision 0)
@@ -0,0 +1,128 @@
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include "via.h"
+#include "via_driver.h"
+#include "via_vgahw.h"
+#include "via_id.h"
+
+/*
+ * Enables the second display channel.
+ */
+void
+ViaSecondDisplayChannelEnable(ScrnInfoPtr pScrn)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "ViaSecondDisplayChannelEnable\n"));
+ ViaCrtcMask(hwp, 0x6A, 0x00, 1 << 6);
+ ViaCrtcMask(hwp, 0x6A, 1 << 7, 1 << 7);
+ ViaCrtcMask(hwp, 0x6A, 1 << 6, 1 << 6);
+}
+
+/*
+ * Disables the second display channel.
+ */
+void
+ViaSecondDisplayChannelDisable(ScrnInfoPtr pScrn)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "ViaSecondDisplayChannelDisable\n"));
+
+ ViaCrtcMask(hwp, 0x6A, 0x00, 1 << 6);
+ ViaCrtcMask(hwp, 0x6A, 0x00, 1 << 7);
+ ViaCrtcMask(hwp, 0x6A, 1 << 6, 1 << 6);
+}
+
+/*
+ * Initial settings for displays.
+ */
+void
+ViaDisplayInit(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplayPreInit\n"));
+
+ ViaSecondDisplayChannelDisable(pScrn);
+ ViaCrtcMask(hwp, 0x6A, 0x00, 0x3D);
+
+ hwp->writeCrtc(hwp, 0x6B, 0x00);
+ hwp->writeCrtc(hwp, 0x6C, 0x00);
+ hwp->writeCrtc(hwp, 0x79, 0x00);
+
+ /* (IGA1 Timing Plus 2, added in VT3259 A3 or later) */
+ if (pVia->Chipset != VIA_CLE266 && pVia->Chipset != VIA_KM400)
+ ViaCrtcMask(hwp, 0x47, 0x00, 0xC8);
+}
+
+/*
+ * Enables simultaneous mode.
+ */
+void
+ViaDisplayEnableSimultaneous(ScrnInfoPtr pScrn)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "ViaDisplayEnableSimultaneous\n"));
+ ViaCrtcMask(hwp, 0x6B, 0x08, 0x08);
+}
+
+/*
+ * Disables simultaneous mode.
+ */
+void
+ViaDisplayDisableSimultaneous(ScrnInfoPtr pScrn)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "ViaDisplayDisableSimultaneous\n"));
+ ViaCrtcMask(hwp, 0x6B, 0x00, 0x08);
+}
+
+/*
+ * Enables CRT using DPMS registers.
+ */
+void
+ViaDisplayEnableCRT(ScrnInfoPtr pScrn)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplayEnableCRT\n"));
+ ViaCrtcMask(hwp, 0x36, 0x00, 0x30);
+}
+
+/*
+ * Disables CRT using DPMS registers.
+ */
+void
+ViaDisplayDisableCRT(ScrnInfoPtr pScrn)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplayDisableCRT\n"));
+ ViaCrtcMask(hwp, 0x36, 0x30, 0x30);
+}
+
+/*
+ * Sets the primary or secondary display stream on CRT.
+ */
+void
+ViaDisplaySetStreamOnCRT(ScrnInfoPtr pScrn, Bool primary)
+{
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplaySetStreamOnCRT\n"));
+
+ if (primary)
+ ViaSeqMask(hwp, 0x16, 0x00, 0x40);
+ else
+ ViaSeqMask(hwp, 0x16, 0x40, 0x40);
+}
Index: src/via_regs.h
===================================================================
--- src/via_regs.h (revision 588)
+++ src/via_regs.h (working copy)
@@ -42,7 +42,7 @@
#define VIA_MMIO_REGBASE 0x0
#define VIA_MMIO_VGABASE 0x8000
#define VIA_MMIO_BLTBASE 0x200000
-#define VIA_MMIO_BLTSIZE 0x20000
+#define VIA_MMIO_BLTSIZE 0x200000
/* defines for VIA 2D registers */
@@ -85,7 +85,26 @@
#define VIA_REG_CURSOR_BG 0x2DC
#define VIA_REG_CURSOR_FG 0x2E0
+/*CN400 and older Hardware Icon engine register*/
+#define VIA_REG_HI_POSSTART 0x208
+#define VIA_REG_HI_CENTEROFFSET 0x20C
+#define VIA_REG_HI_FBOFFSET 0x224
+#define VIA_REG_HI_CONTROL 0x260
+#define VIA_REG_HI_TRANSPARENT_COLOR 0x270
+#define VIA_REG_HI_INVTCOLOR 0x274
+/* VT3324 primary Hardware Icon engine register */
+#define VIA_REG_PRIM_HI_POSEND 0x290
+#define VIA_REG_V327_HI_INVTCOLOR 0x2E4
+#define VIA_REG_PRIM_HI_FIFO 0x2E8
+#define VIA_REG_PRIM_HI_TRANSCOLOR 0x2EC
+#define VIA_REG_PRIM_HI_CTRL 0x2F0
+#define VIA_REG_PRIM_HI_FBOFFSET 0x2F4
+#define VIA_REG_PRIM_HI_POSSTART 0x2F8
+#define VIA_REG_PRIM_HI_CENTEROFFSET 0x2FC
+#define VIA_REG_PRIM_HI_INVTCOLOR 0x120C
+
+
/* defines for VIA 3D registers */
#define VIA_REG_STATUS 0x400
#define VIA_REG_TRANSET 0x43C
Index: src/via_accel.c
===================================================================
--- src/via_accel.c (revision 588)
+++ src/via_accel.c (working copy)
@@ -2273,16 +2273,14 @@
pVia->VQStart = 0;
if (((pVia->FBFreeEnd - pVia->FBFreeStart) >= VIA_VQ_SIZE)
- && pVia->VQEnable) {
- pVia->VQStart = pVia->FBFreeEnd - VIA_VQ_SIZE;
- pVia->VQEnd = pVia->VQStart + VIA_VQ_SIZE - 1;
- pVia->FBFreeEnd -= VIA_VQ_SIZE;
+ && pVia->VQEnable) {
+ pVia->VQStart = pVia->FBFreeEnd - VIA_VQ_SIZE;
+ pVia->VQEnd = pVia->VQStart + VIA_VQ_SIZE - 1;
+ pVia->FBFreeEnd -= VIA_VQ_SIZE;
}
- if (pVia->hwcursor) {
- pVia->FBFreeEnd -= VIA_CURSOR_SIZE;
- pVia->CursorStart = pVia->FBFreeEnd;
- }
+ if (pVia->cursor->isHWCursorEnabled)
+ viaCursorSetFB(pScrn);
viaInitialize2DEngine(pScrn);
Index: src/via_vbe.c
===================================================================
--- src/via_vbe.c (revision 588)
+++ src/via_vbe.c (working copy)
@@ -95,7 +95,7 @@
/* Set Active Device and translate BIOS byte definition. */
if (pBIOSInfo->CrtActive)
activeDevices = 0x01;
- if (pBIOSInfo->PanelActive)
+ if (pBIOSInfo->Panel->IsActive)
activeDevices |= 0x02;
if (pBIOSInfo->TVActive)
activeDevices |= 0x04;
@@ -244,7 +244,7 @@
}
} else {
- if (pBIOSInfo->PanelActive && !pVia->useLegacyVBE) {
+ if (pBIOSInfo->Panel->IsActive && !pVia->useLegacyVBE) {
/*
* FIXME: Should we always set the panel expansion?
* Does it depend on the resolution?
@@ -437,7 +437,7 @@
VIAPtr pVia = VIAPTR(pScrn);
VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
- if (pBIOSInfo->PanelActive)
+ if (pBIOSInfo->Panel->IsActive)
ViaVbePanelPower(pVia->pVbe, (mode == DPMSModeOn));
VBEDPMSSet(pVia->pVbe, mode);
Index: src/via_cursor.c
===================================================================
--- src/via_cursor.c (revision 588)
+++ src/via_cursor.c (working copy)
@@ -1,5 +1,6 @@
/*
- * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
+ * Copyright 2007 The Openchrome Project [openchrome.org]
+ * Copyright 1998-2007 VIA Technologies, Inc. All Rights Reserved.
* Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
@@ -35,109 +36,268 @@
#include "via.h"
#include "via_driver.h"
+#include "via_regs.h"
+#include "via_id.h"
-static void VIALoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src);
-static void VIASetCursorPosition(ScrnInfoPtr pScrn, int x, int y);
-static void VIASetCursorColors(ScrnInfoPtr pScrn, int bg, int fg);
+#ifdef ARGB_CURSOR
+#include "cursorstr.h"
+#endif
-#define MAX_CURS 32
+static void viaCursorLoadImage(ScrnInfoPtr pScrn, unsigned char *src);
+static void viaCursorSetPosition(ScrnInfoPtr pScrn, int x, int y);
+static void viaCursorSetColors(ScrnInfoPtr pScrn, int bg, int fg);
+static Bool viaCursorHWUse(ScreenPtr screen, CursorPtr cursor);
+static void viaCursorHWHide(ScrnInfoPtr pScrn);
+#ifdef ARGB_CURSOR
+static void viaCursorARGBShow(ScrnInfoPtr pScrn);
+static void viaCursorARGBHide(ScrnInfoPtr pScrn);
+static void viaCursorARGBSetPosition(ScrnInfoPtr pScrn, int x, int y);
+static Bool viaCursorARGBUse(ScreenPtr pScreen, CursorPtr pCurs);
+static void viaCursorARGBLoad(ScrnInfoPtr pScrn, CursorPtr pCurs);
+#endif
+
+#ifdef ARGB_CURSOR
+static void
+viaCursorARGBInit(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
+
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "viaCursorARGBInit\n"));
+
+ unsigned long fbOffset = pScrn->fbOffset + pVia->cursor->fbCursorStart;
+
+ switch (pVia->Chipset) {
+ case VIA_CX700:
+ /* case VIA_CN750: */
+ case VIA_P4M890:
+ case VIA_P4M900:
+ if (pBIOSInfo->FirstCRTC->IsActive) {
+ VIASETREG(VIA_REG_PRIM_HI_FBOFFSET, fbOffset);
+ /* Set 0 as transparent color key. */
+ VIASETREG(VIA_REG_PRIM_HI_TRANSCOLOR, 0);
+ VIASETREG(VIA_REG_PRIM_HI_FIFO, 0x0D000D0F);
+ VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, 0X00FFFFFF);
+ VIASETREG(VIA_REG_V327_HI_INVTCOLOR, 0X00FFFFFF);
+ }
+ if (pBIOSInfo->SecondCRTC->IsActive) {
+ VIASETREG(VIA_REG_HI_FBOFFSET, fbOffset);
+ /* Set 0 as transparent color key. */
+ VIASETREG(VIA_REG_HI_TRANSPARENT_COLOR, 0);
+ VIASETREG(VIA_REG_HI_INVTCOLOR, 0X00FFFFFF);
+ VIASETREG(ALPHA_V3_PREFIFO_CONTROL, 0xE0000);
+ VIASETREG(ALPHA_V3_FIFO_CONTROL, 0xE0F0000);
+ }
+ break;
+ default:
+ VIASETREG(VIA_REG_HI_FBOFFSET, fbOffset);
+ VIASETREG(VIA_REG_HI_TRANSPARENT_COLOR, 0);
+ VIASETREG(VIA_REG_HI_INVTCOLOR, 0X00FFFFFF);
+ VIASETREG(ALPHA_V3_PREFIFO_CONTROL, 0xE0000);
+ VIASETREG(ALPHA_V3_FIFO_CONTROL, 0xE0F0000);
+ break;
+ }
+}
+#endif
+
+void
+viaCursorSetFB(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+
+ if (!pVia->cursor->fbCursorStart
+ && ((pVia->FBFreeEnd - pVia->FBFreeStart) > pVia->cursor->size)) {
+ pVia->cursor->fbCursorStart = pVia->FBFreeEnd - pVia->cursor->size;
+ pVia->FBFreeEnd -= pVia->cursor->size;
+ }
+}
+
Bool
-VIAHWCursorInit(ScreenPtr pScreen)
+viaCursorHWInit(ScreenPtr pScreen)
{
ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
VIAPtr pVia = VIAPTR(pScrn);
xf86CursorInfoPtr infoPtr;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIAHWCursorInit\n"));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "VIACursorHWInit\n"));
+
infoPtr = xf86CreateCursorInfoRec();
if (!infoPtr)
return FALSE;
- pVia->CursorInfoRec = infoPtr;
+ pVia->cursor->info = infoPtr;
- infoPtr->MaxWidth = MAX_CURS;
- infoPtr->MaxHeight = MAX_CURS;
- infoPtr->Flags = (HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_32 |
- HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
+ infoPtr->MaxWidth = pVia->cursor->maxWidth;
+ infoPtr->MaxHeight = pVia->cursor->maxHeight;
+ infoPtr->Flags = (HARDWARE_CURSOR_AND_SOURCE_WITH_MASK |
/*HARDWARE_CURSOR_SWAP_SOURCE_AND_MASK | */
HARDWARE_CURSOR_TRUECOLOR_AT_8BPP |
HARDWARE_CURSOR_INVERT_MASK |
HARDWARE_CURSOR_BIT_ORDER_MSBFIRST |
0);
- infoPtr->SetCursorColors = VIASetCursorColors;
- infoPtr->SetCursorPosition = VIASetCursorPosition;
- infoPtr->LoadCursorImage = VIALoadCursorImage;
- infoPtr->HideCursor = VIAHideCursor;
- infoPtr->ShowCursor = VIAShowCursor;
- infoPtr->UseHWCursor = NULL;
+ if (pVia->cursor->maxWidth == 64)
+ infoPtr->Flags |= HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_64;
+ else if (pVia->cursor->maxWidth == 32)
+ infoPtr->Flags |= HARDWARE_CURSOR_SOURCE_MASK_INTERLEAVE_32;
+ else {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "VIACursorHWInit: unhandled width\n");
+ return FALSE;
+ }
+/*
+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled)
+ infoPtr->Flags |= HARDWARE_CURSOR_ARGB;
+*/
+ infoPtr->SetCursorColors = viaCursorSetColors;
+ infoPtr->SetCursorPosition = viaCursorSetPosition;
+ infoPtr->LoadCursorImage = viaCursorLoadImage;
+ infoPtr->HideCursor = viaCursorHide;
+ infoPtr->ShowCursor = viaCursorShow;
+ infoPtr->UseHWCursor = viaCursorHWUse;
- if (!pVia->CursorStart) {
- pVia->CursorStart = pVia->FBFreeEnd - VIA_CURSOR_SIZE;
- pVia->FBFreeEnd -= VIA_CURSOR_SIZE;
+#ifdef ARGB_CURSOR
+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled) {
+ infoPtr->UseHWCursorARGB = viaCursorARGBUse;
+ infoPtr->LoadCursorARGB = viaCursorARGBLoad;
}
+#endif
+ viaCursorSetFB(pScrn);
+
+#ifdef ARGB_CURSOR
+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled)
+ viaCursorARGBInit(pScrn);
+#endif
+
/* Set cursor location in frame buffer. */
- VIASETREG(VIA_REG_CURSOR_MODE, pVia->CursorStart);
+ VIASETREG(VIA_REG_CURSOR_MODE, pVia->cursor->fbCursorStart);
+ viaCursorHWHide(pScrn);
return xf86InitCursor(pScreen, infoPtr);
}
-
-void
-VIAShowCursor(ScrnInfoPtr pScrn)
+static void
+viaCursorHWShow(ScrnInfoPtr pScrn)
{
VIAPtr pVia = VIAPTR(pScrn);
- CARD32 dwCursorMode;
+ CARD32 mode;
- dwCursorMode = VIAGETREG(VIA_REG_CURSOR_MODE);
+ mode = VIAGETREG(VIA_REG_CURSOR_MODE);
+ mode &= ~0x80000003;
+ /* Hardware cursor size */
+ if (pVia->cursor->maxWidth == 32)
+ mode |= 0x00000002 ;
+
+ /* Enable cursor */
+ mode |= 0x00000001 ;
+
+ if (pVia->pBIOSInfo->SecondCRTC->IsActive)
+ mode |= 0x80000000 ;
+
/* Turn on hardware cursor. */
- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode | 0x3);
+ VIASETREG(VIA_REG_CURSOR_MODE, mode);
+
}
+static void
+viaCursorHWHide(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ CARD32 mode = VIAGETREG(VIA_REG_CURSOR_MODE);
+ /* Turn hardware cursor off. */
+ VIASETREG(VIA_REG_CURSOR_MODE, mode & 0xFFFFFFFE);
+}
+
+
void
-VIAHideCursor(ScrnInfoPtr pScrn)
+viaCursorShow(ScrnInfoPtr pScrn)
{
VIAPtr pVia = VIAPTR(pScrn);
- CARD32 dwCursorMode;
- dwCursorMode = VIAGETREG(VIA_REG_CURSOR_MODE);
+#ifdef ARGB_CURSOR
+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled)
+ viaCursorARGBShow(pScrn);
+ else
+#endif
+ viaCursorHWShow(pScrn);
+}
- /* Turn cursor off. */
- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode & 0xFFFFFFFE);
+void
+viaCursorHide(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+
+#ifdef ARGB_CURSOR
+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled)
+ viaCursorARGBHide(pScrn);
+ else
+#endif
+ viaCursorHWHide(pScrn);
}
-
static void
-VIALoadCursorImage(ScrnInfoPtr pScrn, unsigned char *src)
+viaCursorLoadImage(ScrnInfoPtr pScrn, unsigned char *src)
{
VIAPtr pVia = VIAPTR(pScrn);
- CARD32 dwCursorMode;
+ int x, y, i;
viaAccelSync(pScrn);
+ CARD32 *dst = (CARD32 *) (pVia->FBBase + pVia->cursor->fbCursorStart);
- dwCursorMode = VIAGETREG(VIA_REG_CURSOR_MODE);
+ memset(dst, 0x00, pVia->cursor->size);
+#ifdef ARGB_CURSOR
+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled) {
+ viaCursorARGBHide(pScrn);
+ /* Convert monochrome to ARGB. */
+ int width = pVia->cursor->maxWidth / 8;
- /* Turn cursor off. */
- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode & 0xFFFFFFFE);
+ for (y = 0; y < (pVia->cursor->maxHeight / 8) * 2; y++) {
+ for (x = 0; x < width; x++) {
+ char t = *(src + width); /* is transparent? */
+ char fb = *src++; /* foreground or background ? */
- /* Upload the cursor image to the frame buffer. */
- memcpy(pVia->FBBase + pVia->CursorStart, src, MAX_CURS * MAX_CURS / 8 * 2);
+ for (i = 7; i >= 0; i--) {
+ if (t & (1 << i))
+ *dst++ = 0x00000000; /* transparent */
+ else
+ *dst++ = fb & (1 << i) ?
+ 0xFF000000 | pVia->cursor->foreground :
+ 0xFF000000 | pVia->cursor->background;
+ }
+ }
+ src += width;
+ }
+ } else
+#endif
+ {
+ viaCursorHWHide(pScrn);
+ /* Upload the cursor image to the frame buffer. */
+ memcpy(dst, src, pVia->cursor->size);
+ }
+ viaCursorShow(pScrn);
+}
- /* Restore cursor status */
- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode);
+static void
+viaCursorHWSetPosition(ScrnInfoPtr pScrn, int x, int y, int xoff, int yoff)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+
+ /* viaCursorHWHide(pScrn); */
+ VIASETREG(VIA_REG_CURSOR_ORG, ((xoff << 16) | (yoff & 0x003f)));
+ VIASETREG(VIA_REG_CURSOR_POS, ((x << 16) | (y & 0x07ff)));
+ /* viaCursorHWShow(pScrn); */
}
static void
-VIASetCursorPosition(ScrnInfoPtr pScrn, int x, int y)
+viaCursorSetPosition(ScrnInfoPtr pScrn, int x, int y)
{
VIAPtr pVia = VIAPTR(pScrn);
VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
unsigned char xoff, yoff;
- CARD32 dwCursorMode;
if (x < 0) {
xoff = ((-x) & 0xFE);
@@ -158,66 +318,271 @@
}
}
- /* Hide cursor before set cursor position in order to avoid ghost cursor
- * image when directly set cursor position. It should be a HW bug but
- * we can use patch by SW. */
- dwCursorMode = VIAGETREG(VIA_REG_CURSOR_MODE);
-
- /* Turn cursor off. */
- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode & 0xFFFFFFFE);
-
- VIASETREG(VIA_REG_CURSOR_ORG, ((xoff << 16) | (yoff & 0x003f)));
- VIASETREG(VIA_REG_CURSOR_POS, ((x << 16) | (y & 0x07ff)));
-
- /* Restore cursor status */
- VIASETREG(VIA_REG_CURSOR_MODE, dwCursorMode);
+#ifdef ARGB_CURSOR
+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled)
+ viaCursorARGBSetPosition(pScrn, x, y);
+ else
+#endif
+ viaCursorHWSetPosition(pScrn, x, y, xoff, yoff);
}
static void
-VIASetCursorColors(ScrnInfoPtr pScrn, int bg, int fg)
+viaCursorSetColors(ScrnInfoPtr pScrn, int bg, int fg)
{
VIAPtr pVia = VIAPTR(pScrn);
+ pVia->cursor->foreground = fg;
+ pVia->cursor->background = bg;
+
+#ifdef ARGB_CURSOR
+ if (pVia->cursor->isARGBSupported && pVia->cursor->isARGBEnabled)
+ return;
+#endif
+
VIASETREG(VIA_REG_CURSOR_FG, fg);
VIASETREG(VIA_REG_CURSOR_BG, bg);
}
void
-ViaCursorStore(ScrnInfoPtr pScrn)
+viaCursorStore(ScrnInfoPtr pScrn)
{
VIAPtr pVia = VIAPTR(pScrn);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaCursorStore\n"));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "viaCursorStore\n"));
- if (pVia->CursorImage) {
+ if (pVia->cursor->image) {
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "ViaCursorStore: stale image left.\n");
- xfree(pVia->CursorImage);
+ "viaCursorStore: stale image left.\n");
+ xfree(pVia->cursor->image);
}
- pVia->CursorImage = xcalloc(1, 0x1000);
- memcpy(pVia->CursorImage, pVia->FBBase + pVia->CursorStart, 0x1000);
- pVia->CursorFG = (CARD32) VIAGETREG(VIA_REG_CURSOR_FG);
- pVia->CursorBG = (CARD32) VIAGETREG(VIA_REG_CURSOR_BG);
- pVia->CursorMC = (CARD32) VIAGETREG(VIA_REG_CURSOR_MODE);
+ pVia->cursor->image = xcalloc(1, pVia->cursor->size);
+ if (pVia->cursor->image)
+ memcpy(pVia->cursor->image, pVia->FBBase + pVia->cursor->fbCursorStart,
+ pVia->cursor->size);
+
+ pVia->cursor->foreground = (CARD32) VIAGETREG(VIA_REG_CURSOR_FG);
+ pVia->cursor->background = (CARD32) VIAGETREG(VIA_REG_CURSOR_BG);
+ pVia->cursor->mode = (CARD32) VIAGETREG(VIA_REG_CURSOR_MODE);
}
void
-ViaCursorRestore(ScrnInfoPtr pScrn)
+viaCursorRestore(ScrnInfoPtr pScrn)
{
VIAPtr pVia = VIAPTR(pScrn);
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaCursorRestore\n"));
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "viaCursorRestore\n"));
- if (pVia->CursorImage) {
- memcpy(pVia->FBBase + pVia->CursorStart, pVia->CursorImage, 0x1000);
- VIASETREG(VIA_REG_CURSOR_FG, pVia->CursorFG);
- VIASETREG(VIA_REG_CURSOR_BG, pVia->CursorBG);
- VIASETREG(VIA_REG_CURSOR_MODE, pVia->CursorMC);
- xfree(pVia->CursorImage);
- pVia->CursorImage = NULL;
+ if (pVia->cursor->image) {
+ memcpy(pVia->FBBase + pVia->cursor->fbCursorStart, pVia->cursor->image,
+ pVia->cursor->size);
+ VIASETREG(VIA_REG_CURSOR_FG, pVia->cursor->foreground);
+ VIASETREG(VIA_REG_CURSOR_BG, pVia->cursor->background);
+ VIASETREG(VIA_REG_CURSOR_MODE, pVia->cursor->mode);
+ xfree(pVia->cursor->image);
+ pVia->cursor->image = NULL;
} else
xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
- "ViaCursorRestore: No cursor image stored.\n");
+ "viaCursorRestore: No cursor image stored.\n");
}
+
+#ifdef ARGB_CURSOR
+
+static void
+viaCursorARGBShow(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+
+ switch (pVia->Chipset) {
+ case VIA_CX700:
+ /* case VIA_CN750: */
+ case VIA_P4M890:
+ case VIA_P4M900:
+ /* Turn on hardware icon cursor. */
+ if (pVia->pBIOSInfo->FirstCRTC->IsActive)
+ VIASETREG(VIA_REG_PRIM_HI_CTRL, 0x76000005);
+ if (pVia->pBIOSInfo->SecondCRTC->IsActive)
+ VIASETREG(VIA_REG_HI_CONTROL, 0xf6000005);
+ break;
+ default:
+ VIASETREG(VIA_REG_HI_CONTROL, 0xf6000005);
+ break;
+ }
+
+}
+
+static void
+viaCursorARGBHide(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ CARD32 hiControl;
+
+ switch (pVia->Chipset) {
+ case VIA_CX700:
+ /* case VIA_CN750: */
+ case VIA_P4M890:
+ case VIA_P4M900:
+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
+ hiControl = VIAGETREG(VIA_REG_PRIM_HI_CTRL);
+ /* Turn hardware icon cursor off. */
+ VIASETREG(VIA_REG_PRIM_HI_CTRL, hiControl & 0xFFFFFFFE);
+ }
+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) {
+ hiControl = VIAGETREG(VIA_REG_HI_CONTROL);
+ /* Turn hardware icon cursor off. */
+ VIASETREG(VIA_REG_HI_CONTROL, hiControl & 0xFFFFFFFE);
+ }
+ break;
+ default:
+ hiControl = VIAGETREG(VIA_REG_HI_CONTROL);
+ /* Turn hardware icon cursor off. */
+ VIASETREG(VIA_REG_HI_CONTROL, hiControl & 0xFFFFFFFE);
+ }
+}
+
+static void
+viaCursorARGBSetPosition(ScrnInfoPtr pScrn, int x, int y)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+
+ /* viaCursorARGBHide(pScrn); */
+ switch (pVia->Chipset) {
+ case VIA_CX700:
+ /* case VIA_CN750: */
+ case VIA_P4M890:
+ case VIA_P4M900:
+ if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
+ /* Set hardware icon position. */
+ VIASETREG(VIA_REG_PRIM_HI_POSSTART, ((x << 16) | (y & 0x07ff)));
+ VIASETREG(VIA_REG_PRIM_HI_CENTEROFFSET,
+ ((0 << 16) | (0 & 0x07ff)));
+ }
+ if (pVia->pBIOSInfo->SecondCRTC->IsActive) {
+ /* Set hardware icon position. */
+ VIASETREG(VIA_REG_HI_POSSTART, ((x << 16) | (y & 0x07ff)));
+ VIASETREG(VIA_REG_HI_CENTEROFFSET, ((0 << 16) | (0 & 0x07ff)));
+ }
+ break;
+ default:
+ /* Set hardware icon position. */
+ VIASETREG(VIA_REG_HI_POSSTART, ((x << 16) | (y & 0x07ff)));
+ VIASETREG(VIA_REG_HI_CENTEROFFSET, ((0 << 16) | (0 & 0x07ff)));
+ break;
+ }
+ /* viaCursorARGBShow(pScrn); */
+}
+
+static Bool
+viaCursorARGBUse(ScreenPtr pScreen, CursorPtr pCurs)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ VIAPtr pVia = VIAPTR(pScrn);
+
+ return (pVia->cursor->isHWCursorEnabled
+ && pVia->cursor->isARGBSupported
+ && pVia->cursor->isARGBEnabled
+ && pCurs->bits->width <= pVia->cursor->maxWidth
+ && pCurs->bits->height <= pVia->cursor->maxHeight);
+}
+
+static void
+viaCursorARGBLoad(ScrnInfoPtr pScrn, CursorPtr pCurs)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+ VIABIOSInfoPtr pBIOSInfo = pVia->pBIOSInfo;
+ CARD32 *dst = NULL;
+ CARD32 *image = pCurs->bits->argb;
+ int x, y, w, h;
+
+ dst = (CARD32 *) (pVia->FBBase + pVia->cursor->fbCursorStart);
+
+ if (!image)
+ return;
+
+ w = pCurs->bits->width;
+ if (w > pVia->cursor->maxWidth)
+ w = pVia->cursor->maxWidth;
+
+ h = pCurs->bits->height;
+ if (h > pVia->cursor->maxHeight)
+ h = pVia->cursor->maxHeight;
+
+ memset(dst, 0, pVia->cursor->size);
+
+ for (y = 0; y < h; y++) {
+ for (x = 0; x < w; x++)
+ *dst++ = *image++;
+
+ /* Pad to the right with transparent. */
+ for (; x < pVia->cursor->maxWidth; x++)
+ *dst++ = 0;
+ }
+
+ /* Pad below with transparent. */
+ for (; y < pVia->cursor->maxHeight; y++) {
+ for (x = 0; x < pVia->cursor->maxWidth; x++)
+ *dst++ = 0;
+ }
+ viaCursorShow(pScrn);
+}
+
+#endif
+
+Bool
+viaCursorRecInit(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+
+ if (!pVia->cursor)
+ pVia->cursor =
+ (ViaCursorInfoPtr) xnfcalloc(sizeof(ViaCursorInfoRec), 1);
+
+ if (pVia->cursor) {
+ ViaCursorInfoPtr cursor = pVia->cursor;
+
+ switch (pVia->Chipset) {
+ case VIA_CLE266:
+ case VIA_KM400:
+ case VIA_K8M800:
+ cursor->isARGBSupported = FALSE;
+ cursor->isARGBEnabled = FALSE;
+ cursor->maxWidth = 32;
+ cursor->maxHeight = 32;
+ cursor->size = ((cursor->maxWidth * cursor->maxHeight) / 8) * 2;
+ break;
+ default:
+ cursor->isARGBSupported = TRUE;
+ cursor->isARGBEnabled = TRUE;
+ cursor->maxWidth = 64;
+ cursor->maxHeight = 64;
+ cursor->size = cursor->maxWidth * cursor->maxHeight * 4;
+ break;
+ }
+ }
+
+ return pVia->cursor != NULL;
+}
+
+void
+viaCursorRecDestroy(ScrnInfoPtr pScrn)
+{
+ VIAPtr pVia = VIAPTR(pScrn);
+
+ if (pVia->cursor)
+ xfree(pVia->cursor);
+}
+
+static Bool
+viaCursorHWUse(ScreenPtr pScreen, CursorPtr pCurs)
+{
+ ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
+ VIAPtr pVia = VIAPTR(pScrn);
+
+ return (pVia->cursor->isHWCursorEnabled
+ /* Can't enable HW cursor on both CRTCs at the same time. */
+ && !(pVia->pBIOSInfo->FirstCRTC->IsActive
+ && pVia->pBIOSInfo->SecondCRTC->IsActive)
+ && pCurs->bits->width <= pVia->cursor->maxWidth
+ && pCurs->bits->height <= pVia->cursor->maxHeight);
+}
Index: src/via_timing.c
===================================================================
--- src/via_timing.c (revision 0)
+++ src/via_timing.c (revision 0)
@@ -0,0 +1,398 @@
+/*
+ * Copyright 2007-2008 Gabriel Mansi.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * GTF and CVT timing calculator
+ *
+ * Based on
+ * GTF spreadsheet developed by Andy Morrish
+ * http://www.vesa.org/Public/GTF/GTF_V1R1.xls
+ * and
+ * CVT spreadsheet developed by Graham Loveridge
+ * http://www.vesa.org/Public/CVT/CVTd6r1.xls
+ *
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <math.h>
+#include "via_timing.h"
+
+__inline__ static float froundf(Bool gtf, float f) {
+ return gtf ? rintf(f) : floorf(f) ;
+}
+
+#define MODE_NAME_LENGTH 20
+static int timingGenerateMode(DisplayModePtr mode, Bool gtf, int width, int height, float refresh, Bool interlaced, Bool reducedBlanking) {
+
+ if (!mode) return TIMING_ERR_BAD_ALLOC ;
+
+ int ret = 0 ;
+ float H_PIXELS = width ;
+ float V_LINES = height ;
+ Bool MARGINS_RQD = FALSE ;
+ Bool INT_RQD = interlaced ;
+ float IP_FREQ_RQD = refresh ;
+ Bool RED_BLANK_RQD = reducedBlanking && !gtf ;
+
+ if (!gtf) {
+ if (refresh != 50.0f
+ && refresh != 60.0f
+ && refresh != 75.0f
+ && refresh != 85.0f )
+ ret |= TIMING_CVT_WARN_REFRESH_RATE ;
+
+ if (reducedBlanking && refresh != 60.0f)
+ ret |= TIMING_CVT_WARN_REFRESH_RATE_NOT_RB ;
+
+ }
+ /* 1) These are the default values that define the MARGIN size: */
+ /* Top/ bottom MARGIN size as % of height (%) {DEFAULT = 1.8} */
+ float TOP_BOTTOM_MARGIN = 1.8f ;
+
+ /* 2) This default value defines the horizontal timing boundaries: */
+ /* Character cell horizontal granularity (pixels) {DEFAULT = 8} */
+ float CELL_GRAN = 8.0f ;
+
+ /* 3) These default values define analog system sync pulse width limitations: */
+ /* 4:3 -> 4, 16:9 -> 5, 16: -> 6, 5:4 -> 7, 15:9 -> 7,
+ * Reserved -> 8, Reserved -> 9, Custom -> 10
+ */
+ float V_SYNC_RQD = 3.0f ;
+ float vSync ;
+ if (gtf) {
+ vSync = V_SYNC_RQD ;
+ } else {
+ float aspectRatio = (float)width / height ;
+ if ( aspectRatio == 4.0f / 3.0f ) vSync = 4 ;
+ else if ( aspectRatio == 16.0f / 9.0f ) vSync = 5 ;
+ else if ( aspectRatio == 16.0f / 10.0f ) vSync = 6 ;
+ else if ( aspectRatio == 5.0f / 4.0f || aspectRatio == 15.0f / 9.0f ) vSync = 7 ;
+ else {
+ vSync = 10 ;
+ ret |= TIMING_CVT_WARN_ASPECT_RATIO ;
+ }
+ }
+
+ /* Nominal H sync width (% of line period) {DEFAULT = 8} */
+ float NOMINAL_H_SYNC_WIDTH = 8.0f ;
+
+ /* 4) These default values define analog scan system vertical blanking time limitations: */
+ /* Minimum time of vertical sync+back porch interval (us) */
+ float MIN_V_SYNC_BP_INTERVAL = 550.0f ;
+ /* Minimum number of vertical back porch lines {DEFAULT = 6} */
+ float MIN_V_BPORCH = 6 ;
+ /* Minimum vertical porch (no of lines) {DEFAULT = 3} */
+ float MIN_V_PORCH = gtf ? 1.0f : 3.0f ;
+ /* 5) Definition of Horizontal blanking time limitation: */
+ /* Generalized blanking limitation formula used of the form:
+ * <H BLANKING TIME (%)> =C - ( M / Fh)
+ * Where:
+ * M (gradient) (%/kHz) {DEFAULT = 600}
+ * C (offset) (%) {DEFAULT = 40}
+ * K (blanking time scaling factor) {DEFAULT = 128}
+ * J (scaling factor weighting) {DEFAULT = 20}
+ */
+ float GTF_M_VAR = 600 ;
+ float GTF_C_VAR = 40 ;
+ float GTF_K_VAR = 128 ;
+ float GTF_J_VAR = 20 ;
+
+ /* M' = K / 256 * M */
+ float mPrime = GTF_K_VAR / 256 * GTF_M_VAR ;
+ /* C' = ( ( C - J ) * K / 256 ) + J */
+ float cPrime = ( ( GTF_C_VAR - GTF_J_VAR ) * GTF_K_VAR / 256 ) + GTF_J_VAR ;
+ /* Fixed number of clocks for horizontal blanking {DEFAULT = 160} */
+ float K130 = 160 ;
+ /* Fixed number of clocks for horizontal sync {DEFAULT = 32} */
+ float K131 = 32 ;
+ /* Minimum vertical blanking interval time (us) {DEFAULT = 460} */
+ float K133 = 460 ;
+ /* Fixed number of lines for vertical front porch {DEFAULT = 3} */
+ float RB_V_FPORCH = 3 ;
+
+ /* Minimum number of vertical back porch lines {DEFAULT = 6} */
+ /* float RB_MIN_V_BPORCH = 6 ; */
+
+ float CLOCK_STEP = 0.25f ;
+
+ /* CONSTANTS */
+
+ float cellGranRnd = floorf(CELL_GRAN) ;
+ float marginPer = TOP_BOTTOM_MARGIN;
+ float minVPorchRnd = floorf(MIN_V_PORCH) ;
+
+ /* STANDARD CRT TIMING SCRATCH PAD: */
+ float minVSyncBP = MIN_V_SYNC_BP_INTERVAL ;
+ float hSyncPer = NOMINAL_H_SYNC_WIDTH ;
+
+ /* REDUCED BLANKING SCRATCH PAD: */
+ float rbMinVBlank = K133 ;
+ float rbHSync = K131 ;
+ float rbHBlank = K130 ;
+
+ /* COMMON TIMING PARAMETERS: */
+ /* 1 REQUIRED FIELD RATE */
+ float vFieldRateRqd = INT_RQD ? IP_FREQ_RQD * 2.0f : IP_FREQ_RQD ;
+ /* 2 HORIZONTAL PIXELS */
+ float hPixelsRnd = froundf( gtf, ( H_PIXELS/cellGranRnd ) * cellGranRnd );
+ /* 3 DETERMINE LEFT & RIGHT BORDERS */
+ float leftMargin = MARGINS_RQD ? floorf( hPixelsRnd * marginPer / 100.0f / cellGranRnd ) * cellGranRnd : 0 ;
+ float rightMargin = leftMargin ;
+ /* 4 FIND TOTAL ACTIVE PIXELS */
+ float totalActivePixels = hPixelsRnd + leftMargin + rightMargin ;
+ /* 5 FIND NUMBER OF LINES PER FIELD */
+ float vLinesRnd = INT_RQD ? froundf( gtf, V_LINES / 2.0f ) : froundf( gtf, V_LINES ) ;
+ /* 6 FIND TOP & BOTTOM MARGINS */
+ float topMargin = MARGINS_RQD ? froundf( gtf, marginPer/100.0f*vLinesRnd ) : 0 ;
+ float botMargin = topMargin ;
+
+ float interlace = INT_RQD ? 0.5f : 0 ;
+
+
+ /* 8 ESTIMATE HORIZ. PERIOD (us): */
+ float U23 = ( ( 1.0f / vFieldRateRqd ) - minVSyncBP / 1000000.0f )
+ / ( vLinesRnd + ( 2.0f * topMargin ) + minVPorchRnd + interlace ) * 1000000.0f ;
+
+ /* 8.1 Reduced blanking */
+ float Y23 = ( ( 1000000.0f / vFieldRateRqd ) - rbMinVBlank ) / ( vLinesRnd + topMargin + botMargin ) ;
+
+ /* RESULTS Estimated Horizontal Frequency (kHz): */
+ float hPeriodEst = RED_BLANK_RQD ? Y23 : U23 ;
+
+ /* 9 FIND NUMBER OF LINES IN (SYNC + BACK PORCH): */
+ /* Estimated V_SYNC_BP */
+ float U26 = froundf( gtf, minVSyncBP / hPeriodEst ) ;
+ if ( !gtf ) U26 += 1.0f ;
+
+ /* float U27 = MIN_VSYNC_BP/H_PERIOD_EST ; */
+
+ /* 9.1 RB */
+ float vbiLines = floorf( rbMinVBlank/hPeriodEst ) + 1.0f ;
+ /* float Y27 = RB_MIN_V_BLANK/H_PERIOD_EST ; */
+
+ float vSyncBP ;
+ if (gtf)
+ vSyncBP = rintf( MIN_V_SYNC_BP_INTERVAL / hPeriodEst ) ;
+ else
+ vSyncBP = U26 < ( vSync + MIN_V_BPORCH ) ? vSync + MIN_V_BPORCH : U26 ;
+
+ /* RESULTS Ver Sync */
+ float vSyncRnd = (int) vSync ;
+
+ /* 10 FIND NUMBER OF LINES IN BACK PORCH (Lines): */
+ /* float U31 = V_SYNC_BP-V_SYNC_RND ; */
+ /* 10.1 RB */
+ float rbMinVbi = RB_V_FPORCH + vSyncRnd + MIN_V_BPORCH ;
+ float actVbiLines = vbiLines < rbMinVbi ? rbMinVbi : vbiLines ;
+
+ /*11 FIND TOTAL NUMBER OF LINES IN VERTICAL FIELD: */
+ float U34 = vLinesRnd + topMargin + botMargin + vSyncBP + interlace + minVPorchRnd ;
+ /* 11.1 RB FIND TOTAL NUMBER OF LINES IN VERTICAL FIELD: */
+ float Y34 = actVbiLines + vLinesRnd + topMargin + botMargin + interlace ;
+
+ /* RESULTS */
+ float totalVLines = RED_BLANK_RQD ? Y34 : U34 ;
+
+ /* 12 FIND IDEAL BLANKING DUTY CYCLE FROM FORMULA (%): */
+ float idealDutyCicle = cPrime - ( mPrime * hPeriodEst / 1000.0f ) ;
+
+ float hPeriod ;
+ float vFieldRateEst ;
+ if (gtf) {
+ vFieldRateEst = 1.0f / hPeriodEst / totalVLines * 1000000.0f ;
+ hPeriod = hPeriodEst / ( vFieldRateRqd / vFieldRateEst ) ;
+ } else
+ hPeriod = idealDutyCicle ;
+
+ /* 12.1 RB FIND TOTAL NUMBER OF PIXELS IN A LINE (Pixels): */
+ float Y37 = rbHBlank + totalActivePixels ;
+
+ /* 13 FIND BLANKING TIME TO NEAREST CHAR CELL (Pixels): */
+
+ float vFieldRate ;
+ if (gtf) {
+ vFieldRate = rintf( totalActivePixels * idealDutyCicle / ( 100.0f - idealDutyCicle ) / ( 2.0f * cellGranRnd ) ) * ( 2.0f * cellGranRnd ) ;
+ } else {
+ vFieldRate = hPeriod < 20.0f ?
+ floorf( totalActivePixels * 20.0f / ( 100.0f - 20.0f ) / ( 2.0f * cellGranRnd ) ) * (2.0f * cellGranRnd ) :
+ floorf( totalActivePixels * idealDutyCicle / ( 100.0f - idealDutyCicle ) / ( 2.0f * cellGranRnd ) ) * ( 2.0f * cellGranRnd ) ;
+ }
+
+ /* RESULTS Horizontal Blanking (Pixels): */
+ float hBlank = RED_BLANK_RQD ? rbHBlank : vFieldRate ;
+
+ /* 14 FIND TOTAL NUMBER OF PIXELS IN A LINE (Pixels): */
+ float vFrameRate = totalActivePixels + hBlank ;
+
+ float totalPixels = RED_BLANK_RQD ? Y37 : vFrameRate ;
+
+ /* 15 FIND PIXEL CLOCK FREQUENCY (MHz): */
+ float pixelFreq ;
+ if (gtf)
+ pixelFreq = totalPixels / hPeriodEst ;
+ else
+ pixelFreq = CLOCK_STEP * floorf( ( totalPixels / hPeriodEst ) / CLOCK_STEP ) ;
+
+ /* float U47 = TOTAL_PIXELS/H_PERIOD_EST ; */
+
+ /* 13 RB FIND PIXEL CLOCK FREQUENCY (MHz): Y40*/
+ float Y40 = CLOCK_STEP * floorf( ( vFieldRateRqd * totalVLines * totalPixels / 1000000.0f ) / CLOCK_STEP ) ;
+ /* float Y41 = V_FIELD_RATE_RQD*TOTAL_V_LINES*TOTAL_PIXELS/1000000.0f ; */
+
+ /* RESULTS Actual Pixel Clock (MHz): */
+ float actPixelFreq = RED_BLANK_RQD ? Y40 : pixelFreq ;
+
+ /* 16 FIND ACTUAL HORIZONTAL FREQUENCY (kHz): */
+ //float U50 = 1000.0f*ACT_PIXEL_FREQ/TOTAL_PIXELS ;
+
+ /* 14 RB FIND ACTUAL HORIZONTAL FREQUENCY (kHz): */
+ //float Y44 = 1000.0f*ACT_PIXEL_FREQ/TOTAL_PIXELS ;
+
+ /* RESULTS Actual Horizontal Frequency (kHz): */
+ //float ACT_H_FREQ = RED_BLANK_RQD ? Y44 : U50 ;
+
+ float actHFreq ;
+ if (gtf)
+ actHFreq = 1000.0f / hPeriod ;
+ else
+ actHFreq = 1000.0f * actPixelFreq / totalPixels ;
+
+ /* 17 FIND ACTUAL FIELD RATE (Hz): */
+ // float U53 = 1000.0f*ACT_H_FREQ/TOTAL_V_LINES ;
+
+ /* 15 RB FIND ACTUAL FIELD RATE (Hz): */
+ // float Y47 = 1000.0f*ACT_H_FREQ/TOTAL_V_LINES ;
+
+ /* RESULTS Actual Vertical Frequency (Hz): */
+ // float ACT_FIELD_RATE = RED_BLANK_RQD ? Y47 : U53 ;
+ float actFieldRate = 1000.0f * actHFreq / totalVLines ;
+
+ /* 16 RB FIND ACTUAL VERTICAL FRAME FREQUENCY (Hz): */
+ //float Y50 = INT_RQD ? ACT_FIELD_RATE/2.0f : ACT_FIELD_RATE ;
+
+ /* 18 FIND ACTUAL VERTICAL FRAME FREQUENCY (Hz): */
+ //float U56 = INT_RQD ? ACT_FIELD_RATE/2.0f : ACT_FIELD_RATE ;
+
+ /* RESULTS Actual Vertical Frequency (Hz): */
+ //float ACT_FRAME_RATE = RED_BLANK_RQD ? Y50 : U56 ;
+ float actFrameRat = INT_RQD ? actFieldRate / 2.0f : actFieldRate ;
+
+ /* RESULTS Hor Back porch*/
+ float hBackPorch = hBlank / 2 ;
+
+ /* RESULTS Ver Blank */
+// float vBlank = RED_BLANK_RQD ? actVbiLines : vSyncBP + minVPorchRnd ;
+
+ /* RESULTS Ver Front Porch*/
+ float vFrontPorch = RED_BLANK_RQD ? RB_V_FPORCH : minVPorchRnd ;
+
+ /* RESULTS Ver back porch */
+// float vBackPorch = vBlank - vFrontPorch - vSyncRnd ;
+
+ /* RESULTS Hor Sync */
+ float hSyncRnd = RED_BLANK_RQD ? rbHSync : froundf( gtf, ( hSyncPer / 100.0f * totalPixels / cellGranRnd ) ) * cellGranRnd ;
+
+ /* RESULTS Hor Front Porch: */
+ float hFrontPorch ;
+ if (gtf)
+ hFrontPorch = ( hBlank / 2.0f ) - hSyncRnd ;
+ else
+ hFrontPorch = hBlank - hBackPorch - hSyncRnd ;
+
+#if DEBUG
+ fprintf( stderr, "hFrontPorch:\t\t%f\n", hFrontPorch ) ;
+ fprintf( stderr, "totalActivePixels:\t\t%f\n", totalActivePixels ) ;
+ fprintf( stderr, "vFieldRateRqd:\t\t\t%f\n", vFieldRateRqd ) ;
+ fprintf( stderr, "minVSyncBP:\t\t\t%f\n", minVSyncBP ) ;
+ fprintf( stderr, "vLinesRnd:\t\t\t%f\n", vLinesRnd ) ;
+ fprintf( stderr, "minVPorchRnd:\t\t\t%f\n", minVPorchRnd ) ;
+ fprintf( stderr, "interlace:\t\t\t%f\n", interlace ) ;
+ fprintf( stderr, "vSyncBP:\t\t\t%f\n", vSyncBP ) ;
+ fprintf( stderr, "hSyncPer:\t\t\t%f\n", hSyncPer ) ;
+ fprintf( stderr, "totalPixels:\t\t\t%f\n", totalPixels ) ;
+ fprintf( stderr, "cellGranRnd:\t\t\t%f\n", cellGranRnd ) ;
+ fprintf( stderr, "hPeriod:\t\t\t%f\n", hPeriod ) ;
+ fprintf( stderr, "vFieldRate:\t\t\t%f\n", vFieldRate ) ;
+ fprintf( stderr, "hPeriodEst:\t\t\t%f\n", hPeriodEst ) ;
+ fprintf( stderr, "totalVLines:\t\t\t%f\n", totalVLines ) ;
+ fprintf( stderr, "vFieldRateEst:\t\t\t%f\n", vFieldRateEst ) ;
+ fprintf( stderr, "vFieldRateRqd:\t\t\t%f\n", vFieldRateRqd ) ;
+ fprintf( stderr, "idealDutyCicle:\t\t\t%f\n", idealDutyCicle ) ;
+ fprintf( stderr, "actHFreq:\t\t\t%f\n", actHFreq ) ;
+ fprintf( stderr, "hblank:\t\t\t\t%f\n", hBlank ) ;
+ fprintf( stderr, "actPixelFreq:\t\t\t%f\n", actPixelFreq ) ;
+#endif
+
+ if (mode) {
+ if (mode->name == NULL) {
+ mode->name = malloc(MODE_NAME_LENGTH);
+ if (mode->name) {
+ memset(mode->name, 0, MODE_NAME_LENGTH) ;
+ char c = 0 ;
+ if (RED_BLANK_RQD) c = 'r' ;
+ if (INT_RQD) c = 'i' ;
+ sprintf(mode->name, "%dx%d@%d%c", width, height, (int)refresh, c ) ;
+ }
+ }
+
+ mode->Clock = actPixelFreq * 1000.0f ;
+ mode->VRefresh = actFrameRat ;
+
+ mode->HDisplay = width ;
+ mode->HSyncStart = width + hFrontPorch ;
+ mode->HSyncEnd = width + ( hFrontPorch + hSyncRnd ) ;
+ mode->HTotal = totalPixels ;
+
+ mode->VDisplay = height ;
+ mode->VSyncStart = height + vFrontPorch ;
+ mode->VSyncEnd = height + (vFrontPorch + vSyncRnd) ;
+ mode->VTotal = INT_RQD ? totalVLines * 2 : totalVLines ;
+ mode->Flags = 0 ;
+
+ if (RED_BLANK_RQD) {
+ mode->Flags |= V_PHSYNC ;
+ mode->Flags |= V_NVSYNC ;
+ } else {
+ mode->Flags |= V_NHSYNC ;
+ mode->Flags |= V_PVSYNC ;
+ }
+
+ if (!(mode->Flags & V_PHSYNC)) mode->Flags |= V_NHSYNC ;
+ if (!(mode->Flags & V_NHSYNC)) mode->Flags |= V_PHSYNC ;
+ if (!(mode->Flags & V_PVSYNC)) mode->Flags |= V_NVSYNC ;
+ if (!(mode->Flags & V_NVSYNC)) mode->Flags |= V_PVSYNC ;
+
+ if (INT_RQD) mode->Flags |= V_INTERLACE ;
+ } else {
+ ret |= TIMING_ERR_BAD_ALLOC ;
+ }
+
+ return ret ;
+}
+
+int viaTimingCvt(DisplayModePtr mode, int width, int height, float refresh, Bool interlaced, Bool reducedBlanking) {
+ return timingGenerateMode( mode, FALSE, width, height, refresh, interlaced, reducedBlanking ) ;
+}
+
+int viaTimingGtf(DisplayModePtr mode, int width, int height, float refresh, Bool interlaced) {
+ return timingGenerateMode( mode, TRUE, width, height, refresh, interlaced, FALSE ) ;
+}
Index: src/Makefile.am
===================================================================
--- src/Makefile.am (revision 588)
+++ src/Makefile.am (working copy)
@@ -43,23 +43,29 @@
via_ch7xxx.c \
via_ch7xxx.h \
via_cursor.c \
+ via_crtc.c \
via_dga.c \
+ via_display.c \
via_dmabuffer.h \
via_driver.c \
via_driver.h \
via_i2c.c \
via_id.c \
via_id.h \
+ via_lvds.c \
via_memcpy.c \
via_memcpy.h \
via_memory.c \
via_mode.c \
via_mode.h \
+ via_panel.c \
via_priv.h \
via_regs.h \
via_shadow.c \
via_swov.c \
via_swov.h \
+ via_timing.c \
+ via_timing.h \
via_vbe.c \
via_vgahw.c \
via_vgahw.h \
Index: src/via_dga.c
===================================================================
--- src/via_dga.c (revision 588)
+++ src/via_dga.c (working copy)
@@ -247,8 +247,8 @@
pScrn->depth = pVia->DGAOldDepth;
pScrn->SwitchMode(index, pScrn->currentMode, 0);
- if (pVia->hwcursor)
- VIAShowCursor(pScrn);
+ if (pVia->cursor->isHWCursorEnabled)
+ viaCursorShow(pScrn);
pVia->DGAactive = FALSE;
}
@@ -260,8 +260,8 @@
pMode->bitsPerPixel, pMode->depth);
#endif
- if (pVia->hwcursor)
- VIAHideCursor(pScrn);
+ if (pVia->cursor->isHWCursorEnabled)
+ viaCursorHide(pScrn);
if (!pVia->DGAactive) { /* save the old parameters */
pVia->DGAOldDisplayWidth = pScrn->displayWidth;
Index: src/via_timing.h
===================================================================
--- src/via_timing.h (revision 0)
+++ src/via_timing.h (revision 0)
@@ -0,0 +1,51 @@
+/*
+ * Copyright 2007-2008 Gabriel Mansi.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ */
+
+#ifndef _TIMING_H_
+#define _TIMING_H_
+
+#include "xf86.h"
+
+/* Aspect ratio not CVT standard */
+#define TIMING_CVT_WARN_ASPECT_RATIO 1 << 0
+
+/* Error allocating memory */
+#define TIMING_ERR_BAD_ALLOC 1 << 1
+
+/* Refresh rate not CVT standard */
+#define TIMING_CVT_WARN_REFRESH_RATE 1 << 2
+
+/* Refresh rate not valid for reducing blanking */
+#define TIMING_CVT_WARN_REFRESH_RATE_NOT_RB 1 << 3
+
+/**
+ * Geneartes a CVT modeline
+ * mode must not be null, if mode->name is null a new char* will be allocated.
+ *
+ */
+int viaTimingCvt(DisplayModePtr mode, int width, int height, float refresh, Bool interlaced, Bool reducedBlanking);
+
+int viaTimingGtf(DisplayModePtr mode, int width, int height, float refresh, Bool interlaced) ;
+
+#endif /*_TIMING_H_*/
Index: ChangeLog
===================================================================
--- ChangeLog (revision 588)
+++ ChangeLog (working copy)
@@ -1,3 +1,66 @@
+2008-05-26 Gabriel Mansi <gabriel.mansi@gmail.com>
+
+ * src/Makefile.am:
+ * src/via_accel.c: (viaInitAccel):
+ * src/via_bios.h:
+ * src/via_crtc.c: (ViaCRTCSetGraphicsRegisters),
+ (ViaCRTCSetAttributeRegisters), (ViaCRTCInit),
+ (ViaFirstCRTCSetMode), (ViaFirstCRTCSetStartingAddress),
+ (ViaSecondCRTCSetStartingAddress),
+ (ViaSecondCRTCHorizontalQWCount), (ViaSecondCRTCHorizontalOffset),
+ (ViaSecondCRTCSetMode), (ViaFirstCRTCModeValid),
+ (ViaSecondCRTCModeValid), (ViaShadowCRTCSetMode):
+ * src/via_cursor.c: (viaCursorARGBInit), (viaCursorSetFB),
+ (viaCursorHWInit), (viaCursorHWShow), (viaCursorHWHide),
+ (viaCursorShow), (viaCursorHide), (viaCursorLoadImage),
+ (viaCursorHWSetPosition), (viaCursorSetPosition),
+ (viaCursorSetColors), (viaCursorStore), (viaCursorRestore),
+ (viaCursorARGBShow), (viaCursorARGBHide),
+ (viaCursorARGBSetPosition), (viaCursorARGBUse),
+ (viaCursorARGBLoad), (viaCursorRecInit), (viaCursorRecDestroy),
+ (viaCursorHWUse):
+ * src/via_dga.c: (VIADGASetMode):
+ * src/via_display.c: (ViaSecondDisplayChannelEnable),
+ (ViaSecondDisplayChannelDisable), (ViaDisplayInit),
+ (ViaDisplayEnableSimultaneous), (ViaDisplayDisableSimultaneous),
+ (ViaDisplayEnableCRT), (ViaDisplayDisableCRT),
+ (ViaDisplaySetStreamOnCRT):
+ * src/via_driver.c: (VIAGetRec), (VIAFreeRec),
+ (VIASetupDefaultOptions), (VIAPreInit), (VIAEnterVT), (VIALeaveVT),
+ (ViaGammaDisable), (VIASave), (VIARestore), (ViaMMIOEnable),
+ (ViaMMIODisable), (VIAMapMMIO), (VIAUnmapMem), (VIALoadPalette),
+ (VIAScreenInit), (VIAWriteMode), (VIACloseScreen),
+ (VIAAdjustFrame), (VIADPMS):
+ * src/via_driver.h:
+ * src/via_lvds.c: (ViaLVDSPowerFirstSequence),
+ (ViaLVDSPowerSecondSequence), (ViaLVDSDFPPower),
+ (ViaLVDSPowerChannel), (ViaLVDSPower):
+ * src/via_mode.c: (ViaPrintMode), (ViaOutputsSelect),
+ (VIAGetPanelSize), (ViaPanelGetIndex), (ViaModesAttach),
+ (ViaValidMode), (VIASetLCDMode), (ViaModePrimaryLegacy),
+ (ViaModeSecondaryLegacy), (ViaLCDPower), (ViaModeFirstCRTC),
+ (ViaModeSecondCRTC), (ViaModeSet):
+ * src/via_panel.c: (ViaPanelLookUpModeIndex),
+ (ViaPanelGetNativeModeFromOption),
+ (ViaPanelGetNativeModeFromScratchPad), (ViaPanelScaleDisable),
+ (ViaPanelScale), (ViaPanelGetNativeDisplayMode), (ViaPanelPreInit),
+ (ViaPanelCenterMode), (ViaPanelGetSizeFromEDID),
+ (ViaPanelGetSizeFromDDCv1), (ViaPanelGetSizeFromDDCv2):
+ * src/via_regs.h:
+ * src/via_swov.c: (Upd_Video):
+ * src/via_timing.c: (froundf), (timingGenerateMode),
+ (viaTimingCvt), (viaTimingGtf):
+ * src/via_timing.h:
+ * src/via_vbe.c: (ViaVbeGetActiveDevices), (ViaVbeSetMode),
+ (ViaVbeDoDPMS):
+ * src/via_video.c: (DecideOverlaySupport), (viaSaveVideo),
+ (viaRestoreVideo):
+
+ Merge panel code from randr branch (rev. 427 to 553)
+ Add native mode setting for P4M890, P4M900, K8M890 and CX700
+ Add LVDS power functions for P4M900 and CX700
+ Add ARGB hardware cursor support
+
2008-03-11 Xavier Bachelot <xavier-at-bachelot-dot-org>
* configure.ac: